705 files changed, 64679 insertions, 15241 deletions

diff --git a/drivers/Makefile b/drivers/Makefile
index a280ab3d0833..2735bde73475 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_ATA_OVER_ETH)	+= block/aoe/
 obj-$(CONFIG_PARIDE)            += block/paride/
 obj-$(CONFIG_TC)                += tc/
 obj-$(CONFIG_USB)               += usb/
+obj-$(CONFIG_USB_MUSB_HDRC)     += usb/musb/
 obj-$(CONFIG_PCI)               += usb/
 obj-$(CONFIG_USB_GADGET)        += usb/gadget/
 obj-$(CONFIG_SERIO)             += input/serio/
diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c
index bb7c51f712bd..7d2edf143f16 100644
--- a/drivers/acpi/dock.c
+++ b/drivers/acpi/dock.c
@@ -563,9 +563,6 @@ EXPORT_SYMBOL_GPL(unregister_hotplug_dock_device);
  */
 static int handle_eject_request(struct dock_station *ds, u32 event)
 {
-        if (!dock_present(ds))
-                return -ENODEV;
-
         if (dock_in_progress(ds))
                 return -EBUSY;
 
@@ -573,8 +570,16 @@ static int handle_eject_request(struct dock_station *ds, u32 event)
          * here we need to generate the undock
          * event prior to actually doing the undock
          * so that the device struct still exists.
+         * Also, even send the dock event if the
+         * device is not present anymore
          */
         dock_event(ds, event, UNDOCK_EVENT);
+
+        if (!dock_present(ds)) {
+                complete_undock(ds);
+                return -ENODEV;
+        }
+
         hotplug_dock_devices(ds, ACPI_NOTIFY_EJECT_REQUEST);
         undock(ds);
         eject_dock(ds);
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 5622aee996b2..13593f9f2197 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -110,6 +110,31 @@ static struct acpi_ec {
         u8 handlers_installed;
 } *boot_ec, *first_ec;
 
+/* 
+ * Some Asus system have exchanged ECDT data/command IO addresses.
+ */
+static int print_ecdt_error(const struct dmi_system_id *id)
+{
+        printk(KERN_NOTICE PREFIX "%s detected - "
+                "ECDT has exchanged control/data I/O address\n",
+                id->ident);
+        return 0;
+}
+
+static struct dmi_system_id __cpuinitdata ec_dmi_table[] = {
+        {
+        print_ecdt_error, "Asus L4R", {
+        DMI_MATCH(DMI_BIOS_VERSION, "1008.006"),
+        DMI_MATCH(DMI_PRODUCT_NAME, "L4R"),
+        DMI_MATCH(DMI_BOARD_NAME, "L4R") }, NULL},
+        {
+        print_ecdt_error, "Asus M6R", {
+        DMI_MATCH(DMI_BIOS_VERSION, "0207"),
+        DMI_MATCH(DMI_PRODUCT_NAME, "M6R"),
+        DMI_MATCH(DMI_BOARD_NAME, "M6R") }, NULL},
+        {},
+};
+
 /* --------------------------------------------------------------------------
                              Transaction Management
    -------------------------------------------------------------------------- */
@@ -196,6 +221,8 @@ static int acpi_ec_wait(struct acpi_ec *ec, enum ec_event event, int force_poll)
                                 return 0;
                         msleep(1);
                 }
+                if (acpi_ec_check_status(ec,event))
+                        return 0;
         }
         pr_err(PREFIX "acpi_ec_wait timeout, status = 0x%2.2x, event = %s\n",
                 acpi_ec_read_status(ec),
@@ -911,6 +938,15 @@ int __init acpi_ec_ecdt_probe(void)
                 pr_info(PREFIX "EC description table is found, configuring boot EC\n");
                 boot_ec->command_addr = ecdt_ptr->control.address;
                 boot_ec->data_addr = ecdt_ptr->data.address;
+                if (dmi_check_system(ec_dmi_table)) {
+                        /*
+                         * If the board falls into ec_dmi_table, it means
+                         * that ECDT table gives the incorrect command/status
+                         * & data I/O address. Just fix it.
+                         */
+                        boot_ec->data_addr = ecdt_ptr->control.address;
+                        boot_ec->command_addr = ecdt_ptr->data.address;
+                }
                 boot_ec->gpe = ecdt_ptr->gpe;
                 boot_ec->handle = ACPI_ROOT_OBJECT;
                 acpi_get_handle(ACPI_ROOT_OBJECT, ecdt_ptr->id, &boot_ec->handle);
diff --git a/drivers/acpi/executer/exconfig.c b/drivers/acpi/executer/exconfig.c
index 2a32c843cb4a..8892b9824fae 100644
--- a/drivers/acpi/executer/exconfig.c
+++ b/drivers/acpi/executer/exconfig.c
@@ -479,5 +479,8 @@ acpi_status acpi_ex_unload_table(union acpi_operand_object *ddb_handle)
 
         acpi_tb_set_table_loaded_flag(table_index, FALSE);
 
+        /* Table unloaded, remove a reference to the ddb_handle object */
+
+        acpi_ut_remove_reference(ddb_handle);
         return_ACPI_STATUS(AE_OK);
 }
diff --git a/drivers/acpi/namespace/nsnames.c b/drivers/acpi/namespace/nsnames.c
index 549db42f16cf..bd5773878009 100644
--- a/drivers/acpi/namespace/nsnames.c
+++ b/drivers/acpi/namespace/nsnames.c
@@ -56,13 +56,14 @@ ACPI_MODULE_NAME("nsnames")
  *              Size            - Size of the pathname
  *              *name_buffer    - Where to return the pathname
  *
- * RETURN:      Places the pathname into the name_buffer, in external format
+ * RETURN:      Status
+ *              Places the pathname into the name_buffer, in external format
  *              (name segments separated by path separators)
  *
  * DESCRIPTION: Generate a full pathaname
  *
  ******************************************************************************/
-void
+acpi_status
 acpi_ns_build_external_path(struct acpi_namespace_node *node,
                             acpi_size size, char *name_buffer)
 {
@@ -77,7 +78,7 @@ acpi_ns_build_external_path(struct acpi_namespace_node *node,
         if (index < ACPI_NAME_SIZE) {
                 name_buffer[0] = AML_ROOT_PREFIX;
                 name_buffer[1] = 0;
-                return;
+                return (AE_OK);
         }
 
         /* Store terminator byte, then build name backwards */
@@ -105,11 +106,13 @@ acpi_ns_build_external_path(struct acpi_namespace_node *node,
 
         if (index != 0) {
                 ACPI_ERROR((AE_INFO,
-                            "Could not construct pathname; index=%X, size=%X, Path=%s",
+                            "Could not construct external pathname; index=%X, size=%X, Path=%s",
                             (u32) index, (u32) size, &name_buffer[size]));
+
+                return (AE_BAD_PARAMETER);
         }
 
-        return;
+        return (AE_OK);
 }
 
 #ifdef ACPI_DEBUG_OUTPUT
@@ -129,6 +132,7 @@ acpi_ns_build_external_path(struct acpi_namespace_node *node,
 
 char *acpi_ns_get_external_pathname(struct acpi_namespace_node *node)
 {
+        acpi_status status;
         char *name_buffer;
         acpi_size size;
 
@@ -138,8 +142,7 @@ char *acpi_ns_get_external_pathname(struct acpi_namespace_node *node)
 
         size = acpi_ns_get_pathname_length(node);
         if (!size) {
-                ACPI_ERROR((AE_INFO, "Invalid node failure"));
-                return_PTR(NULL);
+                return (NULL);
         }
 
         /* Allocate a buffer to be returned to caller */
@@ -152,7 +155,11 @@ char *acpi_ns_get_external_pathname(struct acpi_namespace_node *node)
 
         /* Build the path in the allocated buffer */
 
-        acpi_ns_build_external_path(node, size, name_buffer);
+        status = acpi_ns_build_external_path(node, size, name_buffer);
+        if (ACPI_FAILURE(status)) {
+                return (NULL);
+        }
+
         return_PTR(name_buffer);
 }
 #endif
@@ -186,7 +193,7 @@ acpi_size acpi_ns_get_pathname_length(struct acpi_namespace_node *node)
         while (next_node && (next_node != acpi_gbl_root_node)) {
                 if (ACPI_GET_DESCRIPTOR_TYPE(next_node) != ACPI_DESC_TYPE_NAMED) {
                         ACPI_ERROR((AE_INFO,
-                                    "Invalid NS Node (%p) while traversing path",
+                                    "Invalid Namespace Node (%p) while traversing namespace",
                                     next_node));
                         return 0;
                 }
@@ -234,8 +241,7 @@ acpi_ns_handle_to_pathname(acpi_handle target_handle,
 
         required_size = acpi_ns_get_pathname_length(node);
         if (!required_size) {
-                ACPI_ERROR((AE_INFO, "Invalid node failure"));
-                return_ACPI_STATUS(AE_ERROR);
+                return_ACPI_STATUS(AE_BAD_PARAMETER);
         }
 
         /* Validate/Allocate/Clear caller buffer */
@@ -247,7 +253,11 @@ acpi_ns_handle_to_pathname(acpi_handle target_handle,
 
         /* Build the path in the caller buffer */
 
-        acpi_ns_build_external_path(node, required_size, buffer->pointer);
+        status =
+            acpi_ns_build_external_path(node, required_size, buffer->pointer);
+        if (ACPI_FAILURE(status)) {
+                return_ACPI_STATUS(status);
+        }
 
         ACPI_DEBUG_PRINT((ACPI_DB_EXEC, "%s [%X]\n",
                           (char *)buffer->pointer, (u32) required_size));
diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c
index 89f3b2abfdc7..cf47805a7448 100644
--- a/drivers/acpi/pci_link.c
+++ b/drivers/acpi/pci_link.c
@@ -849,7 +849,7 @@ static int __init acpi_irq_penalty_update(char *str, int used)
                 if (irq < 0)
                         continue;
 
-                if (irq >= ACPI_MAX_IRQS)
+                if (irq >= ARRAY_SIZE(acpi_irq_penalty))
                         continue;
 
                 if (used)
@@ -872,10 +872,12 @@ static int __init acpi_irq_penalty_update(char *str, int used)
  */
 void acpi_penalize_isa_irq(int irq, int active)
 {
-        if (active)
-                acpi_irq_penalty[irq] += PIRQ_PENALTY_ISA_USED;
-        else
-                acpi_irq_penalty[irq] += PIRQ_PENALTY_PCI_USING;
+        if (irq >= 0 && irq < ARRAY_SIZE(acpi_irq_penalty)) {
+                if (active)
+                        acpi_irq_penalty[irq] += PIRQ_PENALTY_ISA_USED;
+                else
+                        acpi_irq_penalty[irq] += PIRQ_PENALTY_PCI_USING;
+        }
 }
 
 /*
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index e36422a7122c..d3f0a62efcc1 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -123,7 +123,7 @@ struct acpi_processor_errata errata __read_mostly;
 static int set_no_mwait(const struct dmi_system_id *id)
 {
         printk(KERN_NOTICE PREFIX "%s detected - "
-                "disable mwait for CPU C-stetes\n", id->ident);
+                "disabling mwait for CPU C-states\n", id->ident);
         idle_nomwait = 1;
         return 0;
 }
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 283c08f5f4d4..cf5b1b7b684f 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -41,7 +41,6 @@
 #include <linux/pm_qos_params.h>
 #include <linux/clockchips.h>
 #include <linux/cpuidle.h>
-#include <linux/cpuidle.h>
 
 /*
  * Include the apic definitions for x86 to have the APIC timer related defines
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 0133af49cf06..80e32093e977 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -70,7 +70,7 @@ static DEFINE_MUTEX(performance_mutex);
  *  0 -> cpufreq low level drivers initialized -> consider _PPC values
  *  1 -> ignore _PPC totally -> forced by user through boot param
  */
-static unsigned int ignore_ppc = -1;
+static int ignore_ppc = -1;
 module_param(ignore_ppc, uint, 0644);
 MODULE_PARM_DESC(ignore_ppc, "If the frequency of your machine gets wrongly" \
                  "limited by BIOS, this should help");
diff --git a/drivers/acpi/resources/rscalc.c b/drivers/acpi/resources/rscalc.c
index f61ebc679e66..d9063ea414e3 100644
--- a/drivers/acpi/resources/rscalc.c
+++ b/drivers/acpi/resources/rscalc.c
@@ -587,6 +587,9 @@ acpi_rs_get_pci_routing_table_length(union acpi_operand_object *package_object,
                         } else {
                                 temp_size_needed +=
                                     acpi_ns_get_pathname_length((*sub_object_list)->reference.node);
+                                if (!temp_size_needed) {
+                                        return_ACPI_STATUS(AE_BAD_PARAMETER);
+                                }
                         }
                 } else {
                         /*
diff --git a/drivers/acpi/utilities/utalloc.c b/drivers/acpi/utilities/utalloc.c
index e7bf34a7b1d2..7dcb67e0b215 100644
--- a/drivers/acpi/utilities/utalloc.c
+++ b/drivers/acpi/utilities/utalloc.c
@@ -242,10 +242,12 @@ acpi_ut_initialize_buffer(struct acpi_buffer * buffer,
 {
         acpi_status status = AE_OK;
 
-        if (!required_length) {
-                WARN_ON(1);
-                return AE_ERROR;
+        /* Parameter validation */
+
+        if (!buffer || !required_length) {
+                return (AE_BAD_PARAMETER);
         }
+
         switch (buffer->length) {
         case ACPI_NO_BUFFER:
 
diff --git a/drivers/acpi/utilities/utdelete.c b/drivers/acpi/utilities/utdelete.c
index c5c791a575c9..42609d3a8aa9 100644
--- a/drivers/acpi/utilities/utdelete.c
+++ b/drivers/acpi/utilities/utdelete.c
@@ -135,6 +135,10 @@ static void acpi_ut_delete_internal_obj(union acpi_operand_object *object)
                 obj_pointer = object->package.elements;
                 break;
 
+                /*
+                 * These objects have a possible list of notify handlers.
+                 * Device object also may have a GPE block.
+                 */
         case ACPI_TYPE_DEVICE:
 
                 if (object->device.gpe_block) {
@@ -142,9 +146,14 @@ static void acpi_ut_delete_internal_obj(union acpi_operand_object *object)
                                                        gpe_block);
                 }
 
-                /* Walk the handler list for this device */
+                /*lint -fallthrough */
+
+        case ACPI_TYPE_PROCESSOR:
+        case ACPI_TYPE_THERMAL:
+
+                /* Walk the notify handler list for this object */
 
-                handler_desc = object->device.handler;
+                handler_desc = object->common_notify.handler;
                 while (handler_desc) {
                         next_desc = handler_desc->address_space.next;
                         acpi_ut_remove_reference(handler_desc);
diff --git a/drivers/acpi/utilities/utobject.c b/drivers/acpi/utilities/utobject.c
index e25484495e65..916eff399eb3 100644
--- a/drivers/acpi/utilities/utobject.c
+++ b/drivers/acpi/utilities/utobject.c
@@ -425,6 +425,7 @@ acpi_ut_get_simple_object_size(union acpi_operand_object *internal_object,
                                acpi_size * obj_length)
 {
         acpi_size length;
+        acpi_size size;
         acpi_status status = AE_OK;
 
         ACPI_FUNCTION_TRACE_PTR(ut_get_simple_object_size, internal_object);
@@ -484,10 +485,14 @@ acpi_ut_get_simple_object_size(union acpi_operand_object *internal_object,
                          * Get the actual length of the full pathname to this object.
                          * The reference will be converted to the pathname to the object
                          */
-                        length +=
-                            ACPI_ROUND_UP_TO_NATIVE_WORD
-                            (acpi_ns_get_pathname_length
-                             (internal_object->reference.node));
+                        size =
+                            acpi_ns_get_pathname_length(internal_object->
+                                                        reference.node);
+                        if (!size) {
+                                return_ACPI_STATUS(AE_BAD_PARAMETER);
+                        }
+
+                        length += ACPI_ROUND_UP_TO_NATIVE_WORD(size);
                         break;
 
                 default:
diff --git a/drivers/acpi/wmi.c b/drivers/acpi/wmi.c
index c33b1c6e93b1..cfe2c833474d 100644
--- a/drivers/acpi/wmi.c
+++ b/drivers/acpi/wmi.c
@@ -347,7 +347,7 @@ struct acpi_buffer *out)
         strcpy(method, "WQ");
         strncat(method, block->object_id, 2);
 
-        status = acpi_evaluate_object(handle, method, NULL, out);
+        status = acpi_evaluate_object(handle, method, &input, out);
 
         /*
          * If ACPI_WMI_EXPENSIVE, call the relevant WCxx method, even if
diff --git a/drivers/ata/pata_at32.c b/drivers/ata/pata_at32.c
index 82fb6e273169..ab61095093b9 100644
--- a/drivers/ata/pata_at32.c
+++ b/drivers/ata/pata_at32.c
@@ -24,8 +24,8 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <asm/arch/board.h>
-#include <asm/arch/smc.h>
+#include <mach/board.h>
+#include <mach/smc.h>
 
 #define DRV_NAME "pata_at32"
 #define DRV_VERSION "0.0.3"
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index 0ce0c279aabf..b73116ef9236 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -159,7 +159,7 @@ static int cciss_ioctl(struct inode *inode, struct file *filep,
 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 
 static int cciss_revalidate(struct gendisk *disk);
-static int rebuild_lun_table(ctlr_info_t *h, struct gendisk *del_disk);
+static int rebuild_lun_table(ctlr_info_t *h, int first_time);
 static int deregister_disk(struct gendisk *disk, drive_info_struct *drv,
                            int clear_all);
 
@@ -171,7 +171,6 @@ static void cciss_geometry_inquiry(int ctlr, int logvol,
                         int withirq, sector_t total_size,
                         unsigned int block_size, InquiryData_struct *inq_buff,
                                    drive_info_struct *drv);
-static void cciss_getgeometry(int cntl_num);
 static void __devinit cciss_interrupt_mode(ctlr_info_t *, struct pci_dev *,
                                            __u32);
 static void start_io(ctlr_info_t *h);
@@ -929,8 +928,10 @@ static int cciss_ioctl(struct inode *inode, struct file *filep,
                         return 0;
                 }
 
+        case CCISS_DEREGDISK:
+        case CCISS_REGNEWD:
         case CCISS_REVALIDVOLS:
-                return rebuild_lun_table(host, NULL);
+                return rebuild_lun_table(host, 0);
 
         case CCISS_GETLUNINFO:{
                         LogvolInfo_struct luninfo;
@@ -943,12 +944,6 @@ static int cciss_ioctl(struct inode *inode, struct file *filep,
                                 return -EFAULT;
                         return 0;
                 }
-        case CCISS_DEREGDISK:
-                return rebuild_lun_table(host, disk);
-
-        case CCISS_REGNEWD:
-                return rebuild_lun_table(host, NULL);
-
         case CCISS_PASSTHRU:
                 {
                         IOCTL_Command_struct iocommand;
@@ -1134,7 +1129,7 @@ static int cciss_ioctl(struct inode *inode, struct file *filep,
                                 if (ioc->Request.Type.Direction == XFER_WRITE) {
                                         if (copy_from_user
                                             (buff[sg_used], data_ptr, sz)) {
-                                                status = -ENOMEM;
+                                                status = -EFAULT;
                                                 goto cleanup1;
                                         }
                                 } else {
@@ -1330,15 +1325,84 @@ static void cciss_softirq_done(struct request *rq)
         spin_unlock_irqrestore(&h->lock, flags);
 }
 
+/* This function gets the serial number of a logical drive via
+ * inquiry page 0x83.  Serial no. is 16 bytes.  If the serial
+ * number cannot be had, for whatever reason, 16 bytes of 0xff
+ * are returned instead.
+ */
+static void cciss_get_serial_no(int ctlr, int logvol, int withirq,
+                                unsigned char *serial_no, int buflen)
+{
+#define PAGE_83_INQ_BYTES 64
+        int rc;
+        unsigned char *buf;
+
+        if (buflen > 16)
+                buflen = 16;
+        memset(serial_no, 0xff, buflen);
+        buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
+        if (!buf)
+                return;
+        memset(serial_no, 0, buflen);
+        if (withirq)
+                rc = sendcmd_withirq(CISS_INQUIRY, ctlr, buf,
+                        PAGE_83_INQ_BYTES, 1, logvol, 0x83, TYPE_CMD);
+        else
+                rc = sendcmd(CISS_INQUIRY, ctlr, buf,
+                        PAGE_83_INQ_BYTES, 1, logvol, 0x83, NULL, TYPE_CMD);
+        if (rc == IO_OK)
+                memcpy(serial_no, &buf[8], buflen);
+        kfree(buf);
+        return;
+}
+
+static void cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
+                                int drv_index)
+{
+        disk->queue = blk_init_queue(do_cciss_request, &h->lock);
+        sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
+        disk->major = h->major;
+        disk->first_minor = drv_index << NWD_SHIFT;
+        disk->fops = &cciss_fops;
+        disk->private_data = &h->drv[drv_index];
+
+        /* Set up queue information */
+        blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
+
+        /* This is a hardware imposed limit. */
+        blk_queue_max_hw_segments(disk->queue, MAXSGENTRIES);
+
+        /* This is a limit in the driver and could be eliminated. */
+        blk_queue_max_phys_segments(disk->queue, MAXSGENTRIES);
+
+        blk_queue_max_sectors(disk->queue, h->cciss_max_sectors);
+
+        blk_queue_softirq_done(disk->queue, cciss_softirq_done);
+
+        disk->queue->queuedata = h;
+
+        blk_queue_hardsect_size(disk->queue,
+                                h->drv[drv_index].block_size);
+
+        /* Make sure all queue data is written out before */
+        /* setting h->drv[drv_index].queue, as setting this */
+        /* allows the interrupt handler to start the queue */
+        wmb();
+        h->drv[drv_index].queue = disk->queue;
+        add_disk(disk);
+}
+
 /* This function will check the usage_count of the drive to be updated/added.
- * If the usage_count is zero then the drive information will be updated and
- * the disk will be re-registered with the kernel.  If not then it will be
- * left alone for the next reboot.  The exception to this is disk 0 which
- * will always be left registered with the kernel since it is also the
- * controller node.  Any changes to disk 0 will show up on the next
- * reboot.
+ * If the usage_count is zero and it is a heretofore unknown drive, or,
+ * the drive's capacity, geometry, or serial number has changed,
+ * then the drive information will be updated and the disk will be
+ * re-registered with the kernel.  If these conditions don't hold,
+ * then it will be left alone for the next reboot.  The exception to this
+ * is disk 0 which will always be left registered with the kernel since it
+ * is also the controller node.  Any changes to disk 0 will show up on
+ * the next reboot.
  */
-static void cciss_update_drive_info(int ctlr, int drv_index)
+static void cciss_update_drive_info(int ctlr, int drv_index, int first_time)
 {
         ctlr_info_t *h = hba[ctlr];
         struct gendisk *disk;
@@ -1347,16 +1411,81 @@ static void cciss_update_drive_info(int ctlr, int drv_index)
         sector_t total_size;
         unsigned long flags = 0;
         int ret = 0;
+        drive_info_struct *drvinfo;
+        int was_only_controller_node;
+
+        /* Get information about the disk and modify the driver structure */
+        inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
+        drvinfo = kmalloc(sizeof(*drvinfo), GFP_KERNEL);
+        if (inq_buff == NULL || drvinfo == NULL)
+                goto mem_msg;
+
+        /* See if we're trying to update the "controller node"
+         * this will happen the when the first logical drive gets
+         * created by ACU.
+         */
+        was_only_controller_node = (drv_index == 0 &&
+                                h->drv[0].raid_level == -1);
 
-        /* if the disk already exists then deregister it before proceeding */
-        if (h->drv[drv_index].raid_level != -1) {
+        /* testing to see if 16-byte CDBs are already being used */
+        if (h->cciss_read == CCISS_READ_16) {
+                cciss_read_capacity_16(h->ctlr, drv_index, 1,
+                        &total_size, &block_size);
+
+        } else {
+                cciss_read_capacity(ctlr, drv_index, 1,
+                                    &total_size, &block_size);
+
+                /* if read_capacity returns all F's this volume is >2TB */
+                /* in size so we switch to 16-byte CDB's for all */
+                /* read/write ops */
+                if (total_size == 0xFFFFFFFFULL) {
+                        cciss_read_capacity_16(ctlr, drv_index, 1,
+                        &total_size, &block_size);
+                        h->cciss_read = CCISS_READ_16;
+                        h->cciss_write = CCISS_WRITE_16;
+                } else {
+                        h->cciss_read = CCISS_READ_10;
+                        h->cciss_write = CCISS_WRITE_10;
+                }
+        }
+
+        cciss_geometry_inquiry(ctlr, drv_index, 1, total_size, block_size,
+                               inq_buff, drvinfo);
+        drvinfo->block_size = block_size;
+        drvinfo->nr_blocks = total_size + 1;
+
+        cciss_get_serial_no(ctlr, drv_index, 1, drvinfo->serial_no,
+                        sizeof(drvinfo->serial_no));
+
+        /* Is it the same disk we already know, and nothing's changed? */
+        if (h->drv[drv_index].raid_level != -1 &&
+                ((memcmp(drvinfo->serial_no,
+                                h->drv[drv_index].serial_no, 16) == 0) &&
+                drvinfo->block_size == h->drv[drv_index].block_size &&
+                drvinfo->nr_blocks == h->drv[drv_index].nr_blocks &&
+                drvinfo->heads == h->drv[drv_index].heads &&
+                drvinfo->sectors == h->drv[drv_index].sectors &&
+                drvinfo->cylinders == h->drv[drv_index].cylinders))
+                        /* The disk is unchanged, nothing to update */
+                        goto freeret;
+
+        /* If we get here it's not the same disk, or something's changed,
+         * so we need to * deregister it, and re-register it, if it's not
+         * in use.
+         * If the disk already exists then deregister it before proceeding
+         * (unless it's the first disk (for the controller node).
+         */
+        if (h->drv[drv_index].raid_level != -1 && drv_index != 0) {
+                printk(KERN_WARNING "disk %d has changed.\n", drv_index);
                 spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
                 h->drv[drv_index].busy_configuring = 1;
                 spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
 
-                /* deregister_disk sets h->drv[drv_index].queue = NULL */
-                /* which keeps the interrupt handler from starting */
-                /* the queue. */
+                /* deregister_disk sets h->drv[drv_index].queue = NULL
+                 * which keeps the interrupt handler from starting
+                 * the queue.
+                 */
                 ret = deregister_disk(h->gendisk[drv_index],
                                       &h->drv[drv_index], 0);
                 h->drv[drv_index].busy_configuring = 0;
@@ -1364,81 +1493,37 @@ static void cciss_update_drive_info(int ctlr, int drv_index)
 
         /* If the disk is in use return */
         if (ret)
-                return;
+                goto freeret;
 
-        /* Get information about the disk and modify the driver structure */
-        inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
-        if (inq_buff == NULL)
-                goto mem_msg;
-
-        /* testing to see if 16-byte CDBs are already being used */
-        if (h->cciss_read == CCISS_READ_16) {
-                cciss_read_capacity_16(h->ctlr, drv_index, 1,
-                        &total_size, &block_size);
-                goto geo_inq;
-        }
-
-        cciss_read_capacity(ctlr, drv_index, 1,
-                            &total_size, &block_size);
-
-        /* if read_capacity returns all F's this volume is >2TB in size */
-        /* so we switch to 16-byte CDB's for all read/write ops */
-        if (total_size == 0xFFFFFFFFULL) {
-                cciss_read_capacity_16(ctlr, drv_index, 1,
-                &total_size, &block_size);
-                h->cciss_read = CCISS_READ_16;
-                h->cciss_write = CCISS_WRITE_16;
-        } else {
-                h->cciss_read = CCISS_READ_10;
-                h->cciss_write = CCISS_WRITE_10;
-        }
-geo_inq:
-        cciss_geometry_inquiry(ctlr, drv_index, 1, total_size, block_size,
-                               inq_buff, &h->drv[drv_index]);
+        /* Save the new information from cciss_geometry_inquiry
+         * and serial number inquiry.
+         */
+        h->drv[drv_index].block_size = drvinfo->block_size;
+        h->drv[drv_index].nr_blocks = drvinfo->nr_blocks;
+        h->drv[drv_index].heads = drvinfo->heads;
+        h->drv[drv_index].sectors = drvinfo->sectors;
+        h->drv[drv_index].cylinders = drvinfo->cylinders;
+        h->drv[drv_index].raid_level = drvinfo->raid_level;
+        memcpy(h->drv[drv_index].serial_no, drvinfo->serial_no, 16);
 
         ++h->num_luns;
         disk = h->gendisk[drv_index];
         set_capacity(disk, h->drv[drv_index].nr_blocks);
 
-        /* if it's the controller it's already added */
-        if (drv_index) {
-                disk->queue = blk_init_queue(do_cciss_request, &h->lock);
-                sprintf(disk->disk_name, "cciss/c%dd%d", ctlr, drv_index);
-                disk->major = h->major;
-                disk->first_minor = drv_index << NWD_SHIFT;
-                disk->fops = &cciss_fops;
-                disk->private_data = &h->drv[drv_index];
-
-                /* Set up queue information */
-                blk_queue_bounce_limit(disk->queue, hba[ctlr]->pdev->dma_mask);
-
-                /* This is a hardware imposed limit. */
-                blk_queue_max_hw_segments(disk->queue, MAXSGENTRIES);
-
-                /* This is a limit in the driver and could be eliminated. */
-                blk_queue_max_phys_segments(disk->queue, MAXSGENTRIES);
-
-                blk_queue_max_sectors(disk->queue, h->cciss_max_sectors);
-
-                blk_queue_softirq_done(disk->queue, cciss_softirq_done);
-
-                disk->queue->queuedata = hba[ctlr];
-
-                blk_queue_hardsect_size(disk->queue,
-                                        hba[ctlr]->drv[drv_index].block_size);
-
-                /* Make sure all queue data is written out before */
-                /* setting h->drv[drv_index].queue, as setting this */
-                /* allows the interrupt handler to start the queue */
-                wmb();
-                h->drv[drv_index].queue = disk->queue;
-                add_disk(disk);
-        }
+        /* If it's not disk 0 (drv_index != 0)
+         * or if it was disk 0, but there was previously
+         * no actual corresponding configured logical drive
+         * (raid_leve == -1) then we want to update the
+         * logical drive's information.
+         */
+        if (drv_index || first_time)
+                cciss_add_disk(h, disk, drv_index);
 
-      freeret:
+freeret:
         kfree(inq_buff);
+        kfree(drvinfo);
         return;
-      mem_msg:
+mem_msg:
         printk(KERN_ERR "cciss: out of memory\n");
         goto freeret;
 }
@@ -1448,21 +1533,91 @@ geo_inq:
  * where new drives will be added.  If the index to be returned is greater
  * than the highest_lun index for the controller then highest_lun is set
  * to this new index.  If there are no available indexes then -1 is returned.
+ * "controller_node" is used to know if this is a real logical drive, or just
+ * the controller node, which determines if this counts towards highest_lun.
  */
-static int cciss_find_free_drive_index(int ctlr)
+static int cciss_find_free_drive_index(int ctlr, int controller_node)
 {
         int i;
 
         for (i = 0; i < CISS_MAX_LUN; i++) {
                 if (hba[ctlr]->drv[i].raid_level == -1) {
                         if (i > hba[ctlr]->highest_lun)
-                                hba[ctlr]->highest_lun = i;
+                                if (!controller_node)
+                                        hba[ctlr]->highest_lun = i;
                         return i;
                 }
         }
         return -1;
 }
 
+/* cciss_add_gendisk finds a free hba[]->drv structure
+ * and allocates a gendisk if needed, and sets the lunid
+ * in the drvinfo structure.   It returns the index into
+ * the ->drv[] array, or -1 if none are free.
+ * is_controller_node indicates whether highest_lun should
+ * count this disk, or if it's only being added to provide
+ * a means to talk to the controller in case no logical
+ * drives have yet been configured.
+ */
+static int cciss_add_gendisk(ctlr_info_t *h, __u32 lunid, int controller_node)
+{
+        int drv_index;
+
+        drv_index = cciss_find_free_drive_index(h->ctlr, controller_node);
+        if (drv_index == -1)
+                return -1;
+        /*Check if the gendisk needs to be allocated */
+        if (!h->gendisk[drv_index]) {
+                h->gendisk[drv_index] =
+                        alloc_disk(1 << NWD_SHIFT);
+                if (!h->gendisk[drv_index]) {
+                        printk(KERN_ERR "cciss%d: could not "
+                                "allocate a new disk %d\n",
+                                h->ctlr, drv_index);
+                        return -1;
+                }
+        }
+        h->drv[drv_index].LunID = lunid;
+
+        /* Don't need to mark this busy because nobody */
+        /* else knows about this disk yet to contend */
+        /* for access to it. */
+        h->drv[drv_index].busy_configuring = 0;
+        wmb();
+        return drv_index;
+}
+
+/* This is for the special case of a controller which
+ * has no logical drives.  In this case, we still need
+ * to register a disk so the controller can be accessed
+ * by the Array Config Utility.
+ */
+static void cciss_add_controller_node(ctlr_info_t *h)
+{
+        struct gendisk *disk;
+        int drv_index;
+
+        if (h->gendisk[0] != NULL) /* already did this? Then bail. */
+                return;
+
+        drv_index = cciss_add_gendisk(h, 0, 1);
+        if (drv_index == -1) {
+                printk(KERN_WARNING "cciss%d: could not "
+                        "add disk 0.\n", h->ctlr);
+                return;
+        }
+        h->drv[drv_index].block_size = 512;
+        h->drv[drv_index].nr_blocks = 0;
+        h->drv[drv_index].heads = 0;
+        h->drv[drv_index].sectors = 0;
+        h->drv[drv_index].cylinders = 0;
+        h->drv[drv_index].raid_level = -1;
+        memset(h->drv[drv_index].serial_no, 0, 16);
+        disk = h->gendisk[drv_index];
+        cciss_add_disk(h, disk, drv_index);
+}
+
 /* This function will add and remove logical drives from the Logical
  * drive array of the controller and maintain persistency of ordering
  * so that mount points are preserved until the next reboot.  This allows
@@ -1470,15 +1625,12 @@ static int cciss_find_free_drive_index(int ctlr)
  * without a re-ordering of those drives.
  * INPUT
  * h            = The controller to perform the operations on
- * del_disk     = The disk to remove if specified.  If the value given
- *                is NULL then no disk is removed.
  */
-static int rebuild_lun_table(ctlr_info_t *h, struct gendisk *del_disk)
+static int rebuild_lun_table(ctlr_info_t *h, int first_time)
 {
         int ctlr = h->ctlr;
         int num_luns;
         ReportLunData_struct *ld_buff = NULL;
-        drive_info_struct *drv = NULL;
         int return_code;
         int listlength = 0;
         int i;
@@ -1487,6 +1639,9 @@ static int rebuild_lun_table(ctlr_info_t *h, struct gendisk *del_disk)
         __u32 lunid = 0;
         unsigned long flags;
 
+        if (!capable(CAP_SYS_RAWIO))
+                return -EPERM;
+
         /* Set busy_configuring flag for this operation */
         spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
         if (h->busy_configuring) {
@@ -1494,100 +1649,100 @@ static int rebuild_lun_table(ctlr_info_t *h, struct gendisk *del_disk)
                 return -EBUSY;
         }
         h->busy_configuring = 1;
+        spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
 
-        /* if del_disk is NULL then we are being called to add a new disk
-         * and update the logical drive table.  If it is not NULL then
-         * we will check if the disk is in use or not.
-         */
-        if (del_disk != NULL) {
-                drv = get_drv(del_disk);
-                drv->busy_configuring = 1;
-                spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
-                return_code = deregister_disk(del_disk, drv, 1);
-                drv->busy_configuring = 0;
-                h->busy_configuring = 0;
-                return return_code;
-        } else {
-                spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
-                if (!capable(CAP_SYS_RAWIO))
-                        return -EPERM;
+        ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
+        if (ld_buff == NULL)
+                goto mem_msg;
 
-                ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
-                if (ld_buff == NULL)
-                        goto mem_msg;
-
-                return_code = sendcmd_withirq(CISS_REPORT_LOG, ctlr, ld_buff,
-                                              sizeof(ReportLunData_struct), 0,
-                                              0, 0, TYPE_CMD);
-
-                if (return_code == IO_OK) {
-                        listlength =
-                                be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
-                } else {        /* reading number of logical volumes failed */
-                        printk(KERN_WARNING "cciss: report logical volume"
-                               " command failed\n");
-                        listlength = 0;
-                        goto freeret;
-                }
+        return_code = sendcmd_withirq(CISS_REPORT_LOG, ctlr, ld_buff,
+                                      sizeof(ReportLunData_struct), 0,
+                                      0, 0, TYPE_CMD);
 
-                num_luns = listlength / 8;      /* 8 bytes per entry */
-                if (num_luns > CISS_MAX_LUN) {
-                        num_luns = CISS_MAX_LUN;
-                        printk(KERN_WARNING "cciss: more luns configured"
-                               " on controller than can be handled by"
-                               " this driver.\n");
+        if (return_code == IO_OK)
+                listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
+        else {  /* reading number of logical volumes failed */
+                printk(KERN_WARNING "cciss: report logical volume"
+                       " command failed\n");
+                listlength = 0;
+                goto freeret;
+        }
+
+        num_luns = listlength / 8;      /* 8 bytes per entry */
+        if (num_luns > CISS_MAX_LUN) {
+                num_luns = CISS_MAX_LUN;
+                printk(KERN_WARNING "cciss: more luns configured"
+                       " on controller than can be handled by"
+                       " this driver.\n");
+        }
+
+        if (num_luns == 0)
+                cciss_add_controller_node(h);
+
+        /* Compare controller drive array to driver's drive array
+         * to see if any drives are missing on the controller due
+         * to action of Array Config Utility (user deletes drive)
+         * and deregister logical drives which have disappeared.
+         */
+        for (i = 0; i <= h->highest_lun; i++) {
+                int j;
+                drv_found = 0;
+                for (j = 0; j < num_luns; j++) {
+                        memcpy(&lunid, &ld_buff->LUN[j][0], 4);
+                        lunid = le32_to_cpu(lunid);
+                        if (h->drv[i].LunID == lunid) {
+                                drv_found = 1;
+                                break;
+                        }
                 }
+                if (!drv_found) {
+                        /* Deregister it from the OS, it's gone. */
+                        spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
+                        h->drv[i].busy_configuring = 1;
+                        spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
+                        return_code = deregister_disk(h->gendisk[i],
+                                &h->drv[i], 1);
+                        h->drv[i].busy_configuring = 0;
+                }
+        }
+
+        /* Compare controller drive array to driver's drive array.
+         * Check for updates in the drive information and any new drives
+         * on the controller due to ACU adding logical drives, or changing
+         * a logical drive's size, etc.  Reregister any new/changed drives
+         */
+        for (i = 0; i < num_luns; i++) {
+                int j;
 
-                /* Compare controller drive array to drivers drive array.
-                 * Check for updates in the drive information and any new drives
-                 * on the controller.
+                drv_found = 0;
+
+                memcpy(&lunid, &ld_buff->LUN[i][0], 4);
+                lunid = le32_to_cpu(lunid);
+
+                /* Find if the LUN is already in the drive array
+                 * of the driver.  If so then update its info
+                 * if not in use.  If it does not exist then find
+                 * the first free index and add it.
                  */
-                for (i = 0; i < num_luns; i++) {
-                        int j;
-
-                        drv_found = 0;
-
-                        lunid = (0xff &
-                                 (unsigned int)(ld_buff->LUN[i][3])) << 24;
-                        lunid |= (0xff &
-                                  (unsigned int)(ld_buff->LUN[i][2])) << 16;
-                        lunid |= (0xff &
-                                  (unsigned int)(ld_buff->LUN[i][1])) << 8;
-                        lunid |= 0xff & (unsigned int)(ld_buff->LUN[i][0]);
-
-                        /* Find if the LUN is already in the drive array
-                         * of the controller.  If so then update its info
-                         * if not is use.  If it does not exist then find
-                         * the first free index and add it.
-                         */
-                        for (j = 0; j <= h->highest_lun; j++) {
-                                if (h->drv[j].LunID == lunid) {
-                                        drv_index = j;
-                                        drv_found = 1;
-                                }
+                for (j = 0; j <= h->highest_lun; j++) {
+                        if (h->drv[j].raid_level != -1 &&
+                                h->drv[j].LunID == lunid) {
+                                drv_index = j;
+                                drv_found = 1;
+                                break;
                         }
+                }
 
-                        /* check if the drive was found already in the array */
-                        if (!drv_found) {
-                                drv_index = cciss_find_free_drive_index(ctlr);
-                                if (drv_index == -1)
-                                        goto freeret;
-
-                                /*Check if the gendisk needs to be allocated */
-                                if (!h->gendisk[drv_index]){
-                                        h->gendisk[drv_index] = alloc_disk(1 << NWD_SHIFT);
-                                        if (!h->gendisk[drv_index]){
-                                                printk(KERN_ERR "cciss: could not allocate new disk %d\n", drv_index);
-                                                goto mem_msg;
-                                        }
-                                }
-                        }
-                        h->drv[drv_index].LunID = lunid;
-                        cciss_update_drive_info(ctlr, drv_index);
-                }               /* end for */
-        }                       /* end else */
+                /* check if the drive was found already in the array */
+                if (!drv_found) {
+                        drv_index = cciss_add_gendisk(h, lunid, 0);
+                        if (drv_index == -1)
+                                goto freeret;
+                }
+                cciss_update_drive_info(ctlr, drv_index, first_time);
+        }               /* end for */
 
-      freeret:
+freeret:
         kfree(ld_buff);
         h->busy_configuring = 0;
         /* We return -1 here to tell the ACU that we have registered/updated
@@ -1595,8 +1750,9 @@ static int rebuild_lun_table(ctlr_info_t *h, struct gendisk *del_disk)
          * additional times.
          */
         return -1;
-      mem_msg:
+mem_msg:
         printk(KERN_ERR "cciss: out of memory\n");
+        h->busy_configuring = 0;
         goto freeret;
 }
 
@@ -1652,15 +1808,15 @@ static int deregister_disk(struct gendisk *disk, drive_info_struct *drv,
                  * other than disk 0 we will call put_disk.  We do not
                  * do this for disk 0 as we need it to be able to
                  * configure the controller.
-                */
+                 */
                 if (clear_all){
                         /* This isn't pretty, but we need to find the
                          * disk in our array and NULL our the pointer.
                          * This is so that we will call alloc_disk if
                          * this index is used again later.
-                        */
+                         */
                         for (i=0; i < CISS_MAX_LUN; i++){
-                                if(h->gendisk[i] == disk){
+                                if (h->gendisk[i] == disk) {
                                         h->gendisk[i] = NULL;
                                         break;
                                 }
@@ -1688,7 +1844,7 @@ static int deregister_disk(struct gendisk *disk, drive_info_struct *drv,
                 if (drv == h->drv + h->highest_lun) {
                         /* if so, find the new hightest lun */
                         int i, newhighest = -1;
-                        for (i = 0; i < h->highest_lun; i++) {
+                        for (i = 0; i <= h->highest_lun; i++) {
                                 /* if the disk has size > 0, it is available */
                                 if (h->drv[i].heads)
                                         newhighest = i;
@@ -3199,136 +3355,9 @@ err_out_free_res:
         return err;
 }
 
-/*
- * Gets information about the local volumes attached to the controller.
+/* Function to find the first free pointer into our hba[] array
+ * Returns -1 if no free entries are left.
  */
-static void cciss_getgeometry(int cntl_num)
-{
-        ReportLunData_struct *ld_buff;
-        InquiryData_struct *inq_buff;
-        int return_code;
-        int i;
-        int listlength = 0;
-        __u32 lunid = 0;
-        unsigned block_size;
-        sector_t total_size;
-
-        ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
-        if (ld_buff == NULL) {
-                printk(KERN_ERR "cciss: out of memory\n");
-                return;
-        }
-        inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
-        if (inq_buff == NULL) {
-                printk(KERN_ERR "cciss: out of memory\n");
-                kfree(ld_buff);
-                return;
-        }
-        /* Get the firmware version */
-        return_code = sendcmd(CISS_INQUIRY, cntl_num, inq_buff,
-                              sizeof(InquiryData_struct), 0, 0, 0, NULL,
-                              TYPE_CMD);
-        if (return_code == IO_OK) {
-                hba[cntl_num]->firm_ver[0] = inq_buff->data_byte[32];
-                hba[cntl_num]->firm_ver[1] = inq_buff->data_byte[33];
-                hba[cntl_num]->firm_ver[2] = inq_buff->data_byte[34];
-                hba[cntl_num]->firm_ver[3] = inq_buff->data_byte[35];
-        } else {                /* send command failed */
-
-                printk(KERN_WARNING "cciss: unable to determine firmware"
-                       " version of controller\n");
-        }
-        /* Get the number of logical volumes */
-        return_code = sendcmd(CISS_REPORT_LOG, cntl_num, ld_buff,
-                              sizeof(ReportLunData_struct), 0, 0, 0, NULL,
-                              TYPE_CMD);
-
-        if (return_code == IO_OK) {
-#ifdef CCISS_DEBUG
-                printk("LUN Data\n--------------------------\n");
-#endif                          /* CCISS_DEBUG */
-
-                listlength |=
-                    (0xff & (unsigned int)(ld_buff->LUNListLength[0])) << 24;
-                listlength |=
-                    (0xff & (unsigned int)(ld_buff->LUNListLength[1])) << 16;
-                listlength |=
-                    (0xff & (unsigned int)(ld_buff->LUNListLength[2])) << 8;
-                listlength |= 0xff & (unsigned int)(ld_buff->LUNListLength[3]);
-        } else {                /* reading number of logical volumes failed */
-
-                printk(KERN_WARNING "cciss: report logical volume"
-                       " command failed\n");
-                listlength = 0;
-        }
-        hba[cntl_num]->num_luns = listlength / 8;       // 8 bytes pre entry
-        if (hba[cntl_num]->num_luns > CISS_MAX_LUN) {
-                printk(KERN_ERR
-                       "ciss:  only %d number of logical volumes supported\n",
-                       CISS_MAX_LUN);
-                hba[cntl_num]->num_luns = CISS_MAX_LUN;
-        }
-#ifdef CCISS_DEBUG
-        printk(KERN_DEBUG "Length = %x %x %x %x = %d\n",
-               ld_buff->LUNListLength[0], ld_buff->LUNListLength[1],
-               ld_buff->LUNListLength[2], ld_buff->LUNListLength[3],
-               hba[cntl_num]->num_luns);
-#endif                          /* CCISS_DEBUG */
-
-        hba[cntl_num]->highest_lun = hba[cntl_num]->num_luns - 1;
-        for (i = 0; i < CISS_MAX_LUN; i++) {
-                if (i < hba[cntl_num]->num_luns) {
-                        lunid = (0xff & (unsigned int)(ld_buff->LUN[i][3]))
-                            << 24;
-                        lunid |= (0xff & (unsigned int)(ld_buff->LUN[i][2]))
-                            << 16;
-                        lunid |= (0xff & (unsigned int)(ld_buff->LUN[i][1]))
-                            << 8;
-                        lunid |= 0xff & (unsigned int)(ld_buff->LUN[i][0]);
-
-                        hba[cntl_num]->drv[i].LunID = lunid;
-
-#ifdef CCISS_DEBUG
-                        printk(KERN_DEBUG "LUN[%d]:  %x %x %x %x = %x\n", i,
-                               ld_buff->LUN[i][0], ld_buff->LUN[i][1],
-                               ld_buff->LUN[i][2], ld_buff->LUN[i][3],
-                               hba[cntl_num]->drv[i].LunID);
-#endif                          /* CCISS_DEBUG */
-
-                /* testing to see if 16-byte CDBs are already being used */
-                if(hba[cntl_num]->cciss_read == CCISS_READ_16) {
-                        cciss_read_capacity_16(cntl_num, i, 0,
-                                            &total_size, &block_size);
-                        goto geo_inq;
-                }
-                cciss_read_capacity(cntl_num, i, 0, &total_size, &block_size);
-
-                /* If read_capacity returns all F's the logical is >2TB */
-                /* so we switch to 16-byte CDBs for all read/write ops */
-                if(total_size == 0xFFFFFFFFULL) {
-                        cciss_read_capacity_16(cntl_num, i, 0,
-                        &total_size, &block_size);
-                        hba[cntl_num]->cciss_read = CCISS_READ_16;
-                        hba[cntl_num]->cciss_write = CCISS_WRITE_16;
-                } else {
-                        hba[cntl_num]->cciss_read = CCISS_READ_10;
-                        hba[cntl_num]->cciss_write = CCISS_WRITE_10;
-                }
-geo_inq:
-                        cciss_geometry_inquiry(cntl_num, i, 0, total_size,
-                                               block_size, inq_buff,
-                                               &hba[cntl_num]->drv[i]);
-                } else {
-                        /* initialize raid_level to indicate a free space */
-                        hba[cntl_num]->drv[i].raid_level = -1;
-                }
-        }
-        kfree(ld_buff);
-        kfree(inq_buff);
-}
-
-/* Function to find the first free pointer into our hba[] array */
-/* Returns -1 if no free entries are left.  */
 static int alloc_cciss_hba(void)
 {
         int i;
@@ -3340,11 +3369,6 @@ static int alloc_cciss_hba(void)
                         p = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
                         if (!p)
                                 goto Enomem;
-                        p->gendisk[0] = alloc_disk(1 << NWD_SHIFT);
-                        if (!p->gendisk[0]) {
-                                kfree(p);
-                                goto Enomem;
-                        }
                         hba[i] = p;
                         return i;
                 }
@@ -3472,11 +3496,13 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
                ((hba[i]->nr_cmds + BITS_PER_LONG -
                  1) / BITS_PER_LONG) * sizeof(unsigned long));
 
-#ifdef CCISS_DEBUG
-        printk(KERN_DEBUG "Scanning for drives on controller cciss%d\n", i);
-#endif                          /* CCISS_DEBUG */
-
-        cciss_getgeometry(i);
+        hba[i]->num_luns = 0;
+        hba[i]->highest_lun = -1;
+        for (j = 0; j < CISS_MAX_LUN; j++) {
+                hba[i]->drv[j].raid_level = -1;
+                hba[i]->drv[j].queue = NULL;
+                hba[i]->gendisk[j] = NULL;
+        }
 
         cciss_scsi_setup(i);
 
@@ -3489,76 +3515,10 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
 
         hba[i]->busy_initializing = 0;
 
-        do {
-                drive_info_struct *drv = &(hba[i]->drv[j]);
-                struct gendisk *disk = hba[i]->gendisk[j];
-                struct request_queue *q;
-
-                /* Check if the disk was allocated already */
-                if (!disk){
-                        hba[i]->gendisk[j] = alloc_disk(1 << NWD_SHIFT);
-                        disk = hba[i]->gendisk[j];
-                }
-
-                /* Check that the disk was able to be allocated */
-                if (!disk) {
-                        printk(KERN_ERR "cciss: unable to allocate memory for disk %d\n", j);
-                        goto clean4;
-                }
-
-                q = blk_init_queue(do_cciss_request, &hba[i]->lock);
-                if (!q) {
-                        printk(KERN_ERR
-                               "cciss:  unable to allocate queue for disk %d\n",
-                               j);
-                        goto clean4;
-                }
-                drv->queue = q;
-
-                blk_queue_bounce_limit(q, hba[i]->pdev->dma_mask);
-
-                /* This is a hardware imposed limit. */
-                blk_queue_max_hw_segments(q, MAXSGENTRIES);
-
-                /* This is a limit in the driver and could be eliminated. */
-                blk_queue_max_phys_segments(q, MAXSGENTRIES);
-
-                blk_queue_max_sectors(q, hba[i]->cciss_max_sectors);
-
-                blk_queue_softirq_done(q, cciss_softirq_done);
-
-                q->queuedata = hba[i];
-                sprintf(disk->disk_name, "cciss/c%dd%d", i, j);
-                disk->major = hba[i]->major;
-                disk->first_minor = j << NWD_SHIFT;
-                disk->fops = &cciss_fops;
-                disk->queue = q;
-                disk->private_data = drv;
-                disk->driverfs_dev = &pdev->dev;
-                /* we must register the controller even if no disks exist */
-                /* this is for the online array utilities */
-                if (!drv->heads && j)
-                        continue;
-                blk_queue_hardsect_size(q, drv->block_size);
-                set_capacity(disk, drv->nr_blocks);
-                j++;
-        } while (j <= hba[i]->highest_lun);
-
-        /* Make sure all queue data is written out before */
-        /* interrupt handler, triggered by add_disk,  */
-        /* is allowed to start them. */
-        wmb();
-
-        for (j = 0; j <= hba[i]->highest_lun; j++)
-                add_disk(hba[i]->gendisk[j]);
-
-        /* we must register the controller even if no disks exist */
-        if (hba[i]->highest_lun == -1)
-                add_disk(hba[i]->gendisk[0]);
-
+        rebuild_lun_table(hba[i], 1);
         return 1;
 
-      clean4:
+clean4:
 #ifdef CONFIG_CISS_SCSI_TAPE
         kfree(hba[i]->scsi_rejects.complete);
 #endif
@@ -3573,9 +3533,9 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
                                     hba[i]->errinfo_pool,
                                     hba[i]->errinfo_pool_dhandle);
         free_irq(hba[i]->intr[SIMPLE_MODE_INT], hba[i]);
-      clean2:
+clean2:
         unregister_blkdev(hba[i]->major, hba[i]->devname);
-      clean1:
+clean1:
         hba[i]->busy_initializing = 0;
         /* cleanup any queues that may have been initialized */
         for (j=0; j <= hba[i]->highest_lun; j++){
@@ -3654,7 +3614,9 @@ static void __devexit cciss_remove_one(struct pci_dev *pdev)
                 }
         }
 
+#ifdef CONFIG_CISS_SCSI_TAPE
         cciss_unregister_scsi(i);       /* unhook from SCSI subsystem */
+#endif
 
         cciss_shutdown(pdev);
 
diff --git a/drivers/block/cciss.h b/drivers/block/cciss.h
index b70988dd33ec..24a7efa993ab 100644
--- a/drivers/block/cciss.h
+++ b/drivers/block/cciss.h
@@ -39,6 +39,8 @@ typedef struct _drive_info_struct
                                    *to prevent it from being opened or it's queue
                                    *from being started.
                                   */
+        __u8 serial_no[16]; /* from inquiry page 0x83, */
+                            /* not necc. null terminated. */
 } drive_info_struct;
 
 #ifdef CONFIG_CISS_SCSI_TAPE
diff --git a/drivers/block/cciss_scsi.c b/drivers/block/cciss_scsi.c
index e4bf9a11ca0d..e1233aabda77 100644
--- a/drivers/block/cciss_scsi.c
+++ b/drivers/block/cciss_scsi.c
@@ -358,23 +358,68 @@ find_bus_target_lun(int ctlr, int *bus, int *target, int *lun)
         }
         return (!found);        
 }
+struct scsi2map {
+        char scsi3addr[8];
+        int bus, target, lun;
+};
 
 static int 
 cciss_scsi_add_entry(int ctlr, int hostno, 
-                unsigned char *scsi3addr, int devtype)
+                unsigned char *scsi3addr, int devtype,
+                struct scsi2map *added, int *nadded)
 {
         /* assumes hba[ctlr]->scsi_ctlr->lock is held */ 
         int n = ccissscsi[ctlr].ndevices;
         struct cciss_scsi_dev_t *sd;
+        int i, bus, target, lun;
+        unsigned char addr1[8], addr2[8];
 
         if (n >= CCISS_MAX_SCSI_DEVS_PER_HBA) {
                 printk("cciss%d: Too many devices, "
                         "some will be inaccessible.\n", ctlr);
                 return -1;
         }
+
+        bus = target = -1;
+        lun = 0;
+        /* Is this device a non-zero lun of a multi-lun device */
+        /* byte 4 of the 8-byte LUN addr will contain the logical unit no. */
+        if (scsi3addr[4] != 0) {
+                /* Search through our list and find the device which */
+                /* has the same 8 byte LUN address, excepting byte 4. */
+                /* Assign the same bus and target for this new LUN. */
+                /* Use the logical unit number from the firmware. */
+                memcpy(addr1, scsi3addr, 8);
+                addr1[4] = 0;
+                for (i = 0; i < n; i++) {
+                        sd = &ccissscsi[ctlr].dev[i];
+                        memcpy(addr2, sd->scsi3addr, 8);
+                        addr2[4] = 0;
+                        /* differ only in byte 4? */
+                        if (memcmp(addr1, addr2, 8) == 0) {
+                                bus = sd->bus;
+                                target = sd->target;
+                                lun = scsi3addr[4];
+                                break;
+                        }
+                }
+        }
+
         sd = &ccissscsi[ctlr].dev[n];
-        if (find_bus_target_lun(ctlr, &sd->bus, &sd->target, &sd->lun) != 0)
-                return -1;
+        if (lun == 0) {
+                if (find_bus_target_lun(ctlr,
+                        &sd->bus, &sd->target, &sd->lun) != 0)
+                        return -1;
+        } else {
+                sd->bus = bus;
+                sd->target = target;
+                sd->lun = lun;
+        }
+        added[*nadded].bus = sd->bus;
+        added[*nadded].target = sd->target;
+        added[*nadded].lun = sd->lun;
+        (*nadded)++;
+
         memcpy(&sd->scsi3addr[0], scsi3addr, 8);
         sd->devtype = devtype;
         ccissscsi[ctlr].ndevices++;
@@ -390,7 +435,8 @@ cciss_scsi_add_entry(int ctlr, int hostno,
 }
 
 static void
-cciss_scsi_remove_entry(int ctlr, int hostno, int entry)
+cciss_scsi_remove_entry(int ctlr, int hostno, int entry,
+        struct scsi2map *removed, int *nremoved)
 {
         /* assumes hba[ctlr]->scsi_ctlr->lock is held */ 
         int i;
@@ -398,6 +444,10 @@ cciss_scsi_remove_entry(int ctlr, int hostno, int entry)
 
         if (entry < 0 || entry >= CCISS_MAX_SCSI_DEVS_PER_HBA) return;
         sd = ccissscsi[ctlr].dev[entry];
+        removed[*nremoved].bus    = sd.bus;
+        removed[*nremoved].target = sd.target;
+        removed[*nremoved].lun    = sd.lun;
+        (*nremoved)++;
         for (i=entry;i<ccissscsi[ctlr].ndevices-1;i++)
                 ccissscsi[ctlr].dev[i] = ccissscsi[ctlr].dev[i+1];
         ccissscsi[ctlr].ndevices--;
@@ -417,6 +467,26 @@ cciss_scsi_remove_entry(int ctlr, int hostno, int entry)
         (a)[1] == (b)[1] && \
         (a)[0] == (b)[0])
 
+static void fixup_botched_add(int ctlr, char *scsi3addr)
+{
+        /* called when scsi_add_device fails in order to re-adjust */
+        /* ccissscsi[] to match the mid layer's view. */
+        unsigned long flags;
+        int i, j;
+        CPQ_TAPE_LOCK(ctlr, flags);
+        for (i = 0; i < ccissscsi[ctlr].ndevices; i++) {
+                if (memcmp(scsi3addr,
+                                ccissscsi[ctlr].dev[i].scsi3addr, 8) == 0) {
+                        for (j = i; j < ccissscsi[ctlr].ndevices-1; j++)
+                                ccissscsi[ctlr].dev[j] =
+                                        ccissscsi[ctlr].dev[j+1];
+                        ccissscsi[ctlr].ndevices--;
+                        break;
+                }
+        }
+        CPQ_TAPE_UNLOCK(ctlr, flags);
+}
+
 static int
 adjust_cciss_scsi_table(int ctlr, int hostno,
         struct cciss_scsi_dev_t sd[], int nsds)
@@ -429,13 +499,33 @@ adjust_cciss_scsi_table(int ctlr, int hostno,
         int i,j, found, changes=0;
         struct cciss_scsi_dev_t *csd;
         unsigned long flags;
+        struct scsi2map *added, *removed;
+        int nadded, nremoved;
+        struct Scsi_Host *sh = NULL;
+
+        added = kzalloc(sizeof(*added) * CCISS_MAX_SCSI_DEVS_PER_HBA,
+                        GFP_KERNEL);
+        removed = kzalloc(sizeof(*removed) * CCISS_MAX_SCSI_DEVS_PER_HBA,
+                        GFP_KERNEL);
+
+        if (!added || !removed) {
+                printk(KERN_WARNING "cciss%d: Out of memory in "
+                        "adjust_cciss_scsi_table\n", ctlr);
+                goto free_and_out;
+        }
 
         CPQ_TAPE_LOCK(ctlr, flags);
 
+        if (hostno != -1)  /* if it's not the first time... */
+                sh = ((struct cciss_scsi_adapter_data_t *)
+                        hba[ctlr]->scsi_ctlr)->scsi_host;
+
         /* find any devices in ccissscsi[] that are not in 
            sd[] and remove them from ccissscsi[] */
 
         i = 0;
+        nremoved = 0;
+        nadded = 0;
         while(i<ccissscsi[ctlr].ndevices) {
                 csd = &ccissscsi[ctlr].dev[i];
                 found=0;
@@ -455,8 +545,9 @@ adjust_cciss_scsi_table(int ctlr, int hostno,
                         /* printk("cciss%d: %s device c%db%dt%dl%d removed.\n",
                                 ctlr, scsi_device_type(csd->devtype), hostno,
                                         csd->bus, csd->target, csd->lun); */
-                        cciss_scsi_remove_entry(ctlr, hostno, i);
-                        /* note, i not incremented */
+                        cciss_scsi_remove_entry(ctlr, hostno, i,
+                                removed, &nremoved);
+                        /* remove ^^^, hence i not incremented */
                 } 
                 else if (found == 1) { /* device is different kind */
                         changes++;
@@ -464,8 +555,15 @@ adjust_cciss_scsi_table(int ctlr, int hostno,
                                 "(device type now %s).\n",
                                 ctlr, hostno, csd->bus, csd->target, csd->lun,
                                         scsi_device_type(csd->devtype));
+                        cciss_scsi_remove_entry(ctlr, hostno, i,
+                                removed, &nremoved);
+                        /* remove ^^^, hence i not incremented */
+                        if (cciss_scsi_add_entry(ctlr, hostno,
+                                &sd[j].scsi3addr[0], sd[j].devtype,
+                                added, &nadded) != 0)
+                                /* we just removed one, so add can't fail. */
+                                        BUG();
                         csd->devtype = sd[j].devtype;
-                        i++;    /* so just move along. */
                 } else          /* device is same as it ever was, */
                         i++;    /* so just move along. */
         }
@@ -489,7 +587,9 @@ adjust_cciss_scsi_table(int ctlr, int hostno,
                 if (!found) {
                         changes++;
                         if (cciss_scsi_add_entry(ctlr, hostno, 
-                                &sd[i].scsi3addr[0], sd[i].devtype) != 0)
+
+                                &sd[i].scsi3addr[0], sd[i].devtype,
+                                added, &nadded) != 0)
                                 break;
                 } else if (found == 1) {
                         /* should never happen... */
@@ -501,9 +601,50 @@ adjust_cciss_scsi_table(int ctlr, int hostno,
         }
         CPQ_TAPE_UNLOCK(ctlr, flags);
 
-        if (!changes) 
-                printk("cciss%d: No device changes detected.\n", ctlr);
+        /* Don't notify scsi mid layer of any changes the first time through */
+        /* (or if there are no changes) scsi_scan_host will do it later the */
+        /* first time through. */
+        if (hostno == -1 || !changes)
+                goto free_and_out;
+
+        /* Notify scsi mid layer of any removed devices */
+        for (i = 0; i < nremoved; i++) {
+                struct scsi_device *sdev =
+                        scsi_device_lookup(sh, removed[i].bus,
+                                removed[i].target, removed[i].lun);
+                if (sdev != NULL) {
+                        scsi_remove_device(sdev);
+                        scsi_device_put(sdev);
+                } else {
+                        /* We don't expect to get here. */
+                        /* future cmds to this device will get selection */
+                        /* timeout as if the device was gone. */
+                        printk(KERN_WARNING "cciss%d: didn't find "
+                                "c%db%dt%dl%d\n for removal.",
+                                ctlr, hostno, removed[i].bus,
+                                removed[i].target, removed[i].lun);
+                }
+        }
+
+        /* Notify scsi mid layer of any added devices */
+        for (i = 0; i < nadded; i++) {
+                int rc;
+                rc = scsi_add_device(sh, added[i].bus,
+                        added[i].target, added[i].lun);
+                if (rc == 0)
+                        continue;
+                printk(KERN_WARNING "cciss%d: scsi_add_device "
+                        "c%db%dt%dl%d failed, device not added.\n",
+                        ctlr, hostno,
+                        added[i].bus, added[i].target, added[i].lun);
+                /* now we have to remove it from ccissscsi, */
+                /* since it didn't get added to scsi mid layer */
+                fixup_botched_add(ctlr, added[i].scsi3addr);
+        }
 
+free_and_out:
+        kfree(added);
+        kfree(removed);
         return 0;
 }
 
@@ -1355,32 +1496,6 @@ cciss_unregister_scsi(int ctlr)
 }
 
 static int 
-cciss_register_scsi(int ctlr)
-{
-        unsigned long flags;
-
-        CPQ_TAPE_LOCK(ctlr, flags);
-
-        /* Since this is really a block driver, the SCSI core may not be 
-           initialized at init time, in which case, calling scsi_register_host
-           would hang.  Instead, we do it later, via /proc filesystem
-           and rc scripts, when we know SCSI core is good to go. */
-
-        /* Only register if SCSI devices are detected. */
-        if (ccissscsi[ctlr].ndevices != 0) {
-                ((struct cciss_scsi_adapter_data_t *) 
-                        hba[ctlr]->scsi_ctlr)->registered = 1;
-                CPQ_TAPE_UNLOCK(ctlr, flags);
-                return cciss_scsi_detect(ctlr);
-        }
-        CPQ_TAPE_UNLOCK(ctlr, flags);
-        printk(KERN_INFO 
-                "cciss%d: No appropriate SCSI device detected, "
-                "SCSI subsystem not engaged.\n", ctlr);
-        return 0;
-}
-
-static int 
 cciss_engage_scsi(int ctlr)
 {
         struct cciss_scsi_adapter_data_t *sa;
@@ -1391,15 +1506,15 @@ cciss_engage_scsi(int ctlr)
         sa = (struct cciss_scsi_adapter_data_t *) hba[ctlr]->scsi_ctlr;
         stk = &sa->cmd_stack; 
 
-        if (((struct cciss_scsi_adapter_data_t *) 
-                hba[ctlr]->scsi_ctlr)->registered) {
+        if (sa->registered) {
                 printk("cciss%d: SCSI subsystem already engaged.\n", ctlr);
                 spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
                 return ENXIO;
         }
+        sa->registered = 1;
         spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
         cciss_update_non_disk_devices(ctlr, -1);
-        cciss_register_scsi(ctlr);
+        cciss_scsi_detect(ctlr);
         return 0;
 }
 
@@ -1493,7 +1608,5 @@ static int  cciss_eh_abort_handler(struct scsi_cmnd *scsicmd)
 /* If no tape support, then these become defined out of existence */
 
 #define cciss_scsi_setup(cntl_num)
-#define cciss_unregister_scsi(ctlr)
-#define cciss_register_scsi(ctlr)
 
 #endif /* CONFIG_CISS_SCSI_TAPE */
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index 9ae05c584234..3ca643cafccd 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c
@@ -154,8 +154,8 @@ static int blkif_getgeo(struct block_device *bd, struct hd_geometry *hg)
         return 0;
 }
 
-int blkif_ioctl(struct inode *inode, struct file *filep,
-                unsigned command, unsigned long argument)
+static int blkif_ioctl(struct inode *inode, struct file *filep,
+                       unsigned command, unsigned long argument)
 {
         struct blkfront_info *info =
                 inode->i_bdev->bd_disk->private_data;
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index a235ca787465..7cb4029a5375 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -3,8 +3,8 @@ menu "Bluetooth device drivers"
         depends on BT
 
 config BT_HCIUSB
-        tristate "HCI USB driver"
-        depends on USB
+        tristate "HCI USB driver (old version)"
+        depends on USB && BT_HCIBTUSB=n
         help
           Bluetooth HCI USB driver.
           This driver is required if you want to use Bluetooth devices with
@@ -23,15 +23,13 @@ config BT_HCIUSB_SCO
           Say Y here to compile support for SCO over HCI USB.
 
 config BT_HCIBTUSB
-        tristate "HCI USB driver (alternate version)"
-        depends on USB && EXPERIMENTAL && BT_HCIUSB=n
+        tristate "HCI USB driver"
+        depends on USB
         help
           Bluetooth HCI USB driver.
           This driver is required if you want to use Bluetooth devices with
           USB interface.
 
-          This driver is still experimental and has no SCO support.
-
           Say Y here to compile support for Bluetooth USB devices into the
           kernel or say M to compile it as module (btusb).
 
diff --git a/drivers/bluetooth/bcm203x.c b/drivers/bluetooth/bcm203x.c
index 8919ccf8274b..ee40201c7278 100644
--- a/drivers/bluetooth/bcm203x.c
+++ b/drivers/bluetooth/bcm203x.c
@@ -42,9 +42,7 @@
 #define BT_DBG(D...)
 #endif
 
-#define VERSION "1.1"
-
-static int ignore = 0;
+#define VERSION "1.2"
 
 static struct usb_device_id bcm203x_table[] = {
         /* Broadcom Blutonium (BCM2033) */
@@ -175,7 +173,7 @@ static int bcm203x_probe(struct usb_interface *intf, const struct usb_device_id
 
         BT_DBG("intf %p id %p", intf, id);
 
-        if (ignore || (intf->cur_altsetting->desc.bInterfaceNumber != 0))
+        if (intf->cur_altsetting->desc.bInterfaceNumber != 0)
                 return -ENODEV;
 
         data = kzalloc(sizeof(*data), GFP_KERNEL);
@@ -300,9 +298,6 @@ static void __exit bcm203x_exit(void)
 module_init(bcm203x_init);
 module_exit(bcm203x_exit);
 
-module_param(ignore, bool, 0644);
-MODULE_PARM_DESC(ignore, "Ignore devices from the matching table");
-
 MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
 MODULE_DESCRIPTION("Broadcom Blutonium firmware driver ver " VERSION);
 MODULE_VERSION(VERSION);
diff --git a/drivers/bluetooth/bfusb.c b/drivers/bluetooth/bfusb.c
index 0c211adbc063..90a094634630 100644
--- a/drivers/bluetooth/bfusb.c
+++ b/drivers/bluetooth/bfusb.c
@@ -43,9 +43,7 @@
 #define BT_DBG(D...)
 #endif
 
-#define VERSION "1.1"
-
-static int ignore = 0;
+#define VERSION "1.2"
 
 static struct usb_driver bfusb_driver;
 
@@ -656,9 +654,6 @@ static int bfusb_probe(struct usb_interface *intf, const struct usb_device_id *i
 
         BT_DBG("intf %p id %p", intf, id);
 
-        if (ignore)
-                return -ENODEV;
-
         /* Check number of endpoints */
         if (intf->cur_altsetting->desc.bNumEndpoints < 2)
                 return -EIO;
@@ -795,9 +790,6 @@ static void __exit bfusb_exit(void)
 module_init(bfusb_init);
 module_exit(bfusb_exit);
 
-module_param(ignore, bool, 0644);
-MODULE_PARM_DESC(ignore, "Ignore devices from the matching table");
-
 MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
 MODULE_DESCRIPTION("BlueFRITZ! USB driver ver " VERSION);
 MODULE_VERSION(VERSION);
diff --git a/drivers/bluetooth/bpa10x.c b/drivers/bluetooth/bpa10x.c
index 3b28658f5a1f..1e55a658e6ce 100644
--- a/drivers/bluetooth/bpa10x.c
+++ b/drivers/bluetooth/bpa10x.c
@@ -40,9 +40,7 @@
 #define BT_DBG(D...)
 #endif
 
-#define VERSION "0.9"
-
-static int ignore = 0;
+#define VERSION "0.10"
 
 static struct usb_device_id bpa10x_table[] = {
         /* Tektronix BPA 100/105 (Digianswer) */
@@ -460,9 +458,6 @@ static int bpa10x_probe(struct usb_interface *intf, const struct usb_device_id *
 
         BT_DBG("intf %p id %p", intf, id);
 
-        if (ignore)
-                return -ENODEV;
-
         if (intf->cur_altsetting->desc.bInterfaceNumber != 0)
                 return -ENODEV;
 
@@ -546,9 +541,6 @@ static void __exit bpa10x_exit(void)
 module_init(bpa10x_init);
 module_exit(bpa10x_exit);
 
-module_param(ignore, bool, 0644);
-MODULE_PARM_DESC(ignore, "Ignore devices from the matching table");
-
 MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
 MODULE_DESCRIPTION("Digianswer Bluetooth USB driver ver " VERSION);
 MODULE_VERSION(VERSION);
diff --git a/drivers/bluetooth/bt3c_cs.c b/drivers/bluetooth/bt3c_cs.c
index 593b7c595038..27058477cc8b 100644
--- a/drivers/bluetooth/bt3c_cs.c
+++ b/drivers/bluetooth/bt3c_cs.c
@@ -60,7 +60,7 @@
 /* ======================== Module parameters ======================== */
 
 
-MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>, Jose Orlando Pereira <jop@di.uminho.pt>");
+MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
 MODULE_DESCRIPTION("Bluetooth driver for the 3Com Bluetooth PCMCIA card");
 MODULE_LICENSE("GPL");
 MODULE_FIRMWARE("BT3CPCC.bin");
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 12e108914f19..6a010681ecf3 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -2,7 +2,7 @@
  *
  *  Generic Bluetooth USB driver
  *
- *  Copyright (C) 2005-2007  Marcel Holtmann <marcel@holtmann.org>
+ *  Copyright (C) 2005-2008  Marcel Holtmann <marcel@holtmann.org>
  *
  *
  *  This program is free software; you can redistribute it and/or modify
@@ -41,27 +41,135 @@
 #define BT_DBG(D...)
 #endif
 
-#define VERSION "0.1"
+#define VERSION "0.3"
+
+static int ignore_dga;
+static int ignore_csr;
+static int ignore_sniffer;
+static int disable_scofix;
+static int force_scofix;
+static int reset;
+
+static struct usb_driver btusb_driver;
+
+#define BTUSB_IGNORE            0x01
+#define BTUSB_RESET             0x02
+#define BTUSB_DIGIANSWER        0x04
+#define BTUSB_CSR               0x08
+#define BTUSB_SNIFFER           0x10
+#define BTUSB_BCM92035          0x20
+#define BTUSB_BROKEN_ISOC       0x40
+#define BTUSB_WRONG_SCO_MTU     0x80
 
 static struct usb_device_id btusb_table[] = {
         /* Generic Bluetooth USB device */
         { USB_DEVICE_INFO(0xe0, 0x01, 0x01) },
 
+        /* AVM BlueFRITZ! USB v2.0 */
+        { USB_DEVICE(0x057c, 0x3800) },
+
+        /* Bluetooth Ultraport Module from IBM */
+        { USB_DEVICE(0x04bf, 0x030a) },
+
+        /* ALPS Modules with non-standard id */
+        { USB_DEVICE(0x044e, 0x3001) },
+        { USB_DEVICE(0x044e, 0x3002) },
+
+        /* Ericsson with non-standard id */
+        { USB_DEVICE(0x0bdb, 0x1002) },
+
+        /* Canyon CN-BTU1 with HID interfaces */
+        { USB_DEVICE(0x0c10, 0x0000), .driver_info = BTUSB_RESET },
+
         { }     /* Terminating entry */
 };
 
 MODULE_DEVICE_TABLE(usb, btusb_table);
 
 static struct usb_device_id blacklist_table[] = {
+        /* CSR BlueCore devices */
+        { USB_DEVICE(0x0a12, 0x0001), .driver_info = BTUSB_CSR },
+
+        /* Broadcom BCM2033 without firmware */
+        { USB_DEVICE(0x0a5c, 0x2033), .driver_info = BTUSB_IGNORE },
+
+        /* Broadcom BCM2035 */
+        { USB_DEVICE(0x0a5c, 0x2035), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+        { USB_DEVICE(0x0a5c, 0x200a), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* Broadcom BCM2045 */
+        { USB_DEVICE(0x0a5c, 0x2039), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+        { USB_DEVICE(0x0a5c, 0x2101), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* Broadcom BCM2046 */
+        { USB_DEVICE(0x0a5c, 0x2151), .driver_info = BTUSB_RESET },
+
+        /* IBM/Lenovo ThinkPad with Broadcom chip */
+        { USB_DEVICE(0x0a5c, 0x201e), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+        { USB_DEVICE(0x0a5c, 0x2110), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* Targus ACB10US */
+        { USB_DEVICE(0x0a5c, 0x2100), .driver_info = BTUSB_RESET },
+
+        /* ANYCOM Bluetooth USB-200 and USB-250 */
+        { USB_DEVICE(0x0a5c, 0x2111), .driver_info = BTUSB_RESET },
+
+        /* HP laptop with Broadcom chip */
+        { USB_DEVICE(0x03f0, 0x171d), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* Dell laptop with Broadcom chip */
+        { USB_DEVICE(0x413c, 0x8126), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* Dell Wireless 370 */
+        { USB_DEVICE(0x413c, 0x8156), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* Dell Wireless 410 */
+        { USB_DEVICE(0x413c, 0x8152), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* Microsoft Wireless Transceiver for Bluetooth 2.0 */
+        { USB_DEVICE(0x045e, 0x009c), .driver_info = BTUSB_RESET },
+
+        /* Kensington Bluetooth USB adapter */
+        { USB_DEVICE(0x047d, 0x105d), .driver_info = BTUSB_RESET },
+        { USB_DEVICE(0x047d, 0x105e), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* ISSC Bluetooth Adapter v3.1 */
+        { USB_DEVICE(0x1131, 0x1001), .driver_info = BTUSB_RESET },
+
+        /* RTX Telecom based adapters with buggy SCO support */
+        { USB_DEVICE(0x0400, 0x0807), .driver_info = BTUSB_BROKEN_ISOC },
+        { USB_DEVICE(0x0400, 0x080a), .driver_info = BTUSB_BROKEN_ISOC },
+
+        /* CONWISE Technology based adapters with buggy SCO support */
+        { USB_DEVICE(0x0e5e, 0x6622), .driver_info = BTUSB_BROKEN_ISOC },
+
+        /* Belkin F8T012 and F8T013 devices */
+        { USB_DEVICE(0x050d, 0x0012), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+        { USB_DEVICE(0x050d, 0x0013), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
+
+        /* Digianswer devices */
+        { USB_DEVICE(0x08fd, 0x0001), .driver_info = BTUSB_DIGIANSWER },
+        { USB_DEVICE(0x08fd, 0x0002), .driver_info = BTUSB_IGNORE },
+
+        /* CSR BlueCore Bluetooth Sniffer */
+        { USB_DEVICE(0x0a12, 0x0002), .driver_info = BTUSB_SNIFFER },
+
+        /* Frontline ComProbe Bluetooth Sniffer */
+        { USB_DEVICE(0x16d3, 0x0002), .driver_info = BTUSB_SNIFFER },
+
         { }     /* Terminating entry */
 };
 
+#define BTUSB_MAX_ISOC_FRAMES   10
+
 #define BTUSB_INTR_RUNNING      0
 #define BTUSB_BULK_RUNNING      1
+#define BTUSB_ISOC_RUNNING      2
 
 struct btusb_data {
         struct hci_dev       *hdev;
         struct usb_device    *udev;
+        struct usb_interface *isoc;
 
         spinlock_t lock;
 
@@ -72,10 +180,15 @@ struct btusb_data {
         struct usb_anchor tx_anchor;
         struct usb_anchor intr_anchor;
         struct usb_anchor bulk_anchor;
+        struct usb_anchor isoc_anchor;
 
         struct usb_endpoint_descriptor *intr_ep;
         struct usb_endpoint_descriptor *bulk_tx_ep;
         struct usb_endpoint_descriptor *bulk_rx_ep;
+        struct usb_endpoint_descriptor *isoc_tx_ep;
+        struct usb_endpoint_descriptor *isoc_rx_ep;
+
+        int isoc_altsetting;
 };
 
 static void btusb_intr_complete(struct urb *urb)
@@ -91,6 +204,8 @@ static void btusb_intr_complete(struct urb *urb)
                 return;
 
         if (urb->status == 0) {
+                hdev->stat.byte_rx += urb->actual_length;
+
                 if (hci_recv_fragment(hdev, HCI_EVENT_PKT,
                                                 urb->transfer_buffer,
                                                 urb->actual_length) < 0) {
@@ -112,7 +227,7 @@ static void btusb_intr_complete(struct urb *urb)
         }
 }
 
-static inline int btusb_submit_intr_urb(struct hci_dev *hdev)
+static int btusb_submit_intr_urb(struct hci_dev *hdev)
 {
         struct btusb_data *data = hdev->driver_data;
         struct urb *urb;
@@ -122,6 +237,9 @@ static inline int btusb_submit_intr_urb(struct hci_dev *hdev)
 
         BT_DBG("%s", hdev->name);
 
+        if (!data->intr_ep)
+                return -ENODEV;
+
         urb = usb_alloc_urb(0, GFP_ATOMIC);
         if (!urb)
                 return -ENOMEM;
@@ -170,6 +288,8 @@ static void btusb_bulk_complete(struct urb *urb)
                 return;
 
         if (urb->status == 0) {
+                hdev->stat.byte_rx += urb->actual_length;
+
                 if (hci_recv_fragment(hdev, HCI_ACLDATA_PKT,
                                                 urb->transfer_buffer,
                                                 urb->actual_length) < 0) {
@@ -191,7 +311,7 @@ static void btusb_bulk_complete(struct urb *urb)
         }
 }
 
-static inline int btusb_submit_bulk_urb(struct hci_dev *hdev)
+static int btusb_submit_bulk_urb(struct hci_dev *hdev)
 {
         struct btusb_data *data = hdev->driver_data;
         struct urb *urb;
@@ -201,6 +321,9 @@ static inline int btusb_submit_bulk_urb(struct hci_dev *hdev)
 
         BT_DBG("%s", hdev->name);
 
+        if (!data->bulk_rx_ep)
+                return -ENODEV;
+
         urb = usb_alloc_urb(0, GFP_KERNEL);
         if (!urb)
                 return -ENOMEM;
@@ -235,6 +358,127 @@ static inline int btusb_submit_bulk_urb(struct hci_dev *hdev)
         return err;
 }
 
+static void btusb_isoc_complete(struct urb *urb)
+{
+        struct hci_dev *hdev = urb->context;
+        struct btusb_data *data = hdev->driver_data;
+        int i, err;
+
+        BT_DBG("%s urb %p status %d count %d", hdev->name,
+                                        urb, urb->status, urb->actual_length);
+
+        if (!test_bit(HCI_RUNNING, &hdev->flags))
+                return;
+
+        if (urb->status == 0) {
+                for (i = 0; i < urb->number_of_packets; i++) {
+                        unsigned int offset = urb->iso_frame_desc[i].offset;
+                        unsigned int length = urb->iso_frame_desc[i].actual_length;
+
+                        if (urb->iso_frame_desc[i].status)
+                                continue;
+
+                        hdev->stat.byte_rx += length;
+
+                        if (hci_recv_fragment(hdev, HCI_SCODATA_PKT,
+                                                urb->transfer_buffer + offset,
+                                                                length) < 0) {
+                                BT_ERR("%s corrupted SCO packet", hdev->name);
+                                hdev->stat.err_rx++;
+                        }
+                }
+        }
+
+        if (!test_bit(BTUSB_ISOC_RUNNING, &data->flags))
+                return;
+
+        usb_anchor_urb(urb, &data->isoc_anchor);
+
+        err = usb_submit_urb(urb, GFP_ATOMIC);
+        if (err < 0) {
+                BT_ERR("%s urb %p failed to resubmit (%d)",
+                                                hdev->name, urb, -err);
+                usb_unanchor_urb(urb);
+        }
+}
+
+static void inline __fill_isoc_descriptor(struct urb *urb, int len, int mtu)
+{
+        int i, offset = 0;
+
+        BT_DBG("len %d mtu %d", len, mtu);
+
+        for (i = 0; i < BTUSB_MAX_ISOC_FRAMES && len >= mtu;
+                                        i++, offset += mtu, len -= mtu) {
+                urb->iso_frame_desc[i].offset = offset;
+                urb->iso_frame_desc[i].length = mtu;
+        }
+
+        if (len && i < BTUSB_MAX_ISOC_FRAMES) {
+                urb->iso_frame_desc[i].offset = offset;
+                urb->iso_frame_desc[i].length = len;
+                i++;
+        }
+
+        urb->number_of_packets = i;
+}
+
+static int btusb_submit_isoc_urb(struct hci_dev *hdev)
+{
+        struct btusb_data *data = hdev->driver_data;
+        struct urb *urb;
+        unsigned char *buf;
+        unsigned int pipe;
+        int err, size;
+
+        BT_DBG("%s", hdev->name);
+
+        if (!data->isoc_rx_ep)
+                return -ENODEV;
+
+        urb = usb_alloc_urb(BTUSB_MAX_ISOC_FRAMES, GFP_KERNEL);
+        if (!urb)
+                return -ENOMEM;
+
+        size = le16_to_cpu(data->isoc_rx_ep->wMaxPacketSize) *
+                                                BTUSB_MAX_ISOC_FRAMES;
+
+        buf = kmalloc(size, GFP_KERNEL);
+        if (!buf) {
+                usb_free_urb(urb);
+                return -ENOMEM;
+        }
+
+        pipe = usb_rcvisocpipe(data->udev, data->isoc_rx_ep->bEndpointAddress);
+
+        urb->dev      = data->udev;
+        urb->pipe     = pipe;
+        urb->context  = hdev;
+        urb->complete = btusb_isoc_complete;
+        urb->interval = data->isoc_rx_ep->bInterval;
+
+        urb->transfer_flags  = URB_FREE_BUFFER | URB_ISO_ASAP;
+        urb->transfer_buffer = buf;
+        urb->transfer_buffer_length = size;
+
+        __fill_isoc_descriptor(urb, size,
+                        le16_to_cpu(data->isoc_rx_ep->wMaxPacketSize));
+
+        usb_anchor_urb(urb, &data->isoc_anchor);
+
+        err = usb_submit_urb(urb, GFP_KERNEL);
+        if (err < 0) {
+                BT_ERR("%s urb %p submission failed (%d)",
+                                                hdev->name, urb, -err);
+                usb_unanchor_urb(urb);
+                kfree(buf);
+        }
+
+        usb_free_urb(urb);
+
+        return err;
+}
+
 static void btusb_tx_complete(struct urb *urb)
 {
         struct sk_buff *skb = urb->context;
@@ -288,6 +532,9 @@ static int btusb_close(struct hci_dev *hdev)
         if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags))
                 return 0;
 
+        clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
+        usb_kill_anchored_urbs(&data->intr_anchor);
+
         clear_bit(BTUSB_BULK_RUNNING, &data->flags);
         usb_kill_anchored_urbs(&data->bulk_anchor);
 
@@ -349,6 +596,9 @@ static int btusb_send_frame(struct sk_buff *skb)
                 break;
 
         case HCI_ACLDATA_PKT:
+                if (!data->bulk_tx_ep || hdev->conn_hash.acl_num < 1)
+                        return -ENODEV;
+
                 urb = usb_alloc_urb(0, GFP_ATOMIC);
                 if (!urb)
                         return -ENOMEM;
@@ -363,9 +613,31 @@ static int btusb_send_frame(struct sk_buff *skb)
                 break;
 
         case HCI_SCODATA_PKT:
+                if (!data->isoc_tx_ep || hdev->conn_hash.sco_num < 1)
+                        return -ENODEV;
+
+                urb = usb_alloc_urb(BTUSB_MAX_ISOC_FRAMES, GFP_ATOMIC);
+                if (!urb)
+                        return -ENOMEM;
+
+                pipe = usb_sndisocpipe(data->udev,
+                                        data->isoc_tx_ep->bEndpointAddress);
+
+                urb->dev      = data->udev;
+                urb->pipe     = pipe;
+                urb->context  = skb;
+                urb->complete = btusb_tx_complete;
+                urb->interval = data->isoc_tx_ep->bInterval;
+
+                urb->transfer_flags  = URB_ISO_ASAP;
+                urb->transfer_buffer = skb->data;
+                urb->transfer_buffer_length = skb->len;
+
+                __fill_isoc_descriptor(urb, skb->len,
+                                le16_to_cpu(data->isoc_tx_ep->wMaxPacketSize));
+
                 hdev->stat.sco_tx++;
-                kfree_skb(skb);
-                return 0;
+                break;
 
         default:
                 return -EILSEQ;
@@ -404,22 +676,86 @@ static void btusb_notify(struct hci_dev *hdev, unsigned int evt)
                 schedule_work(&data->work);
 }
 
+static int inline __set_isoc_interface(struct hci_dev *hdev, int altsetting)
+{
+        struct btusb_data *data = hdev->driver_data;
+        struct usb_interface *intf = data->isoc;
+        struct usb_endpoint_descriptor *ep_desc;
+        int i, err;
+
+        if (!data->isoc)
+                return -ENODEV;
+
+        err = usb_set_interface(data->udev, 1, altsetting);
+        if (err < 0) {
+                BT_ERR("%s setting interface failed (%d)", hdev->name, -err);
+                return err;
+        }
+
+        data->isoc_altsetting = altsetting;
+
+        data->isoc_tx_ep = NULL;
+        data->isoc_rx_ep = NULL;
+
+        for (i = 0; i < intf->cur_altsetting->desc.bNumEndpoints; i++) {
+                ep_desc = &intf->cur_altsetting->endpoint[i].desc;
+
+                if (!data->isoc_tx_ep && usb_endpoint_is_isoc_out(ep_desc)) {
+                        data->isoc_tx_ep = ep_desc;
+                        continue;
+                }
+
+                if (!data->isoc_rx_ep && usb_endpoint_is_isoc_in(ep_desc)) {
+                        data->isoc_rx_ep = ep_desc;
+                        continue;
+                }
+        }
+
+        if (!data->isoc_tx_ep || !data->isoc_rx_ep) {
+                BT_ERR("%s invalid SCO descriptors", hdev->name);
+                return -ENODEV;
+        }
+
+        return 0;
+}
+
 static void btusb_work(struct work_struct *work)
 {
         struct btusb_data *data = container_of(work, struct btusb_data, work);
         struct hci_dev *hdev = data->hdev;
 
-        if (hdev->conn_hash.acl_num == 0) {
+        if (hdev->conn_hash.acl_num > 0) {
+                if (!test_and_set_bit(BTUSB_BULK_RUNNING, &data->flags)) {
+                        if (btusb_submit_bulk_urb(hdev) < 0)
+                                clear_bit(BTUSB_BULK_RUNNING, &data->flags);
+                        else
+                                btusb_submit_bulk_urb(hdev);
+                }
+        } else {
                 clear_bit(BTUSB_BULK_RUNNING, &data->flags);
                 usb_kill_anchored_urbs(&data->bulk_anchor);
-                return;
         }
 
-        if (!test_and_set_bit(BTUSB_BULK_RUNNING, &data->flags)) {
-                if (btusb_submit_bulk_urb(hdev) < 0)
-                        clear_bit(BTUSB_BULK_RUNNING, &data->flags);
-                else
-                        btusb_submit_bulk_urb(hdev);
+        if (hdev->conn_hash.sco_num > 0) {
+                if (data->isoc_altsetting != 2) {
+                        clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
+                        usb_kill_anchored_urbs(&data->isoc_anchor);
+
+                        if (__set_isoc_interface(hdev, 2) < 0)
+                                return;
+                }
+
+                if (!test_and_set_bit(BTUSB_ISOC_RUNNING, &data->flags)) {
+                        if (btusb_submit_isoc_urb(hdev) < 0)
+                                clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
+                        else
+                                btusb_submit_isoc_urb(hdev);
+                }
+        } else {
+                clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
+                usb_kill_anchored_urbs(&data->isoc_anchor);
+
+                __set_isoc_interface(hdev, 0);
         }
 }
 
@@ -433,6 +769,7 @@ static int btusb_probe(struct usb_interface *intf,
 
         BT_DBG("intf %p id %p", intf, id);
 
+        /* interface numbers are hardcoded in the spec */
         if (intf->cur_altsetting->desc.bInterfaceNumber != 0)
                 return -ENODEV;
 
@@ -443,6 +780,18 @@ static int btusb_probe(struct usb_interface *intf,
                         id = match;
         }
 
+        if (id->driver_info == BTUSB_IGNORE)
+                return -ENODEV;
+
+        if (ignore_dga && id->driver_info & BTUSB_DIGIANSWER)
+                return -ENODEV;
+
+        if (ignore_csr && id->driver_info & BTUSB_CSR)
+                return -ENODEV;
+
+        if (ignore_sniffer && id->driver_info & BTUSB_SNIFFER)
+                return -ENODEV;
+
         data = kzalloc(sizeof(*data), GFP_KERNEL);
         if (!data)
                 return -ENOMEM;
@@ -480,6 +829,7 @@ static int btusb_probe(struct usb_interface *intf,
         init_usb_anchor(&data->tx_anchor);
         init_usb_anchor(&data->intr_anchor);
         init_usb_anchor(&data->bulk_anchor);
+        init_usb_anchor(&data->isoc_anchor);
 
         hdev = hci_alloc_dev();
         if (!hdev) {
@@ -503,7 +853,49 @@ static int btusb_probe(struct usb_interface *intf,
 
         hdev->owner = THIS_MODULE;
 
-        set_bit(HCI_QUIRK_RESET_ON_INIT, &hdev->quirks);
+        /* interface numbers are hardcoded in the spec */
+        data->isoc = usb_ifnum_to_if(data->udev, 1);
+
+        if (reset || id->driver_info & BTUSB_RESET)
+                set_bit(HCI_QUIRK_RESET_ON_INIT, &hdev->quirks);
+
+        if (force_scofix || id->driver_info & BTUSB_WRONG_SCO_MTU) {
+                if (!disable_scofix)
+                        set_bit(HCI_QUIRK_FIXUP_BUFFER_SIZE, &hdev->quirks);
+        }
+
+        if (id->driver_info & BTUSB_BROKEN_ISOC)
+                data->isoc = NULL;
+
+        if (id->driver_info & BTUSB_SNIFFER) {
+                struct usb_device *udev = data->udev;
+
+                if (le16_to_cpu(udev->descriptor.bcdDevice) > 0x997)
+                        set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks);
+
+                data->isoc = NULL;
+        }
+
+        if (id->driver_info & BTUSB_BCM92035) {
+                unsigned char cmd[] = { 0x3b, 0xfc, 0x01, 0x00 };
+                struct sk_buff *skb;
+
+                skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
+                if (skb) {
+                        memcpy(skb_put(skb, sizeof(cmd)), cmd, sizeof(cmd));
+                        skb_queue_tail(&hdev->driver_init, skb);
+                }
+        }
+
+        if (data->isoc) {
+                err = usb_driver_claim_interface(&btusb_driver,
+                                                        data->isoc, NULL);
+                if (err < 0) {
+                        hci_free_dev(hdev);
+                        kfree(data);
+                        return err;
+                }
+        }
 
         err = hci_register_dev(hdev);
         if (err < 0) {
@@ -529,6 +921,9 @@ static void btusb_disconnect(struct usb_interface *intf)
 
         hdev = data->hdev;
 
+        if (data->isoc)
+                usb_driver_release_interface(&btusb_driver, data->isoc);
+
         usb_set_intfdata(intf, NULL);
 
         hci_unregister_dev(hdev);
@@ -558,6 +953,24 @@ static void __exit btusb_exit(void)
 module_init(btusb_init);
 module_exit(btusb_exit);
 
+module_param(ignore_dga, bool, 0644);
+MODULE_PARM_DESC(ignore_dga, "Ignore devices with id 08fd:0001");
+
+module_param(ignore_csr, bool, 0644);
+MODULE_PARM_DESC(ignore_csr, "Ignore devices with id 0a12:0001");
+
+module_param(ignore_sniffer, bool, 0644);
+MODULE_PARM_DESC(ignore_sniffer, "Ignore devices with id 0a12:0002");
+
+module_param(disable_scofix, bool, 0644);
+MODULE_PARM_DESC(disable_scofix, "Disable fixup of wrong SCO buffer size");
+
+module_param(force_scofix, bool, 0644);
+MODULE_PARM_DESC(force_scofix, "Force fixup of wrong SCO buffers size");
+
+module_param(reset, bool, 0644);
+MODULE_PARM_DESC(reset, "Send HCI reset command on initialization");
+
 MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
 MODULE_DESCRIPTION("Generic Bluetooth USB driver ver " VERSION);
 MODULE_VERSION(VERSION);
diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index 69df187d74ce..8dfcf77cb717 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
@@ -577,7 +577,7 @@ module_exit(hci_uart_exit);
 module_param(reset, bool, 0644);
 MODULE_PARM_DESC(reset, "Send HCI reset command on initialization");
 
-MODULE_AUTHOR("Maxim Krasnyansky <maxk@qualcomm.com>, Marcel Holtmann <marcel@holtmann.org>");
+MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
 MODULE_DESCRIPTION("Bluetooth HCI UART driver ver " VERSION);
 MODULE_VERSION(VERSION);
 MODULE_LICENSE("GPL");
diff --git a/drivers/bluetooth/hci_usb.c b/drivers/bluetooth/hci_usb.c
index c33bb59ed1fa..3c453924f838 100644
--- a/drivers/bluetooth/hci_usb.c
+++ b/drivers/bluetooth/hci_usb.c
@@ -62,7 +62,6 @@
 #define URB_ZERO_PACKET 0
 #endif
 
-static int ignore;
 static int ignore_dga;
 static int ignore_csr;
 static int ignore_sniffer;
@@ -74,7 +73,7 @@ static int reset;
 static int isoc = 2;
 #endif
 
-#define VERSION "2.9"
+#define VERSION "2.10"
 
 static struct usb_driver hci_usb_driver; 
 
@@ -801,7 +800,7 @@ static int hci_usb_probe(struct usb_interface *intf, const struct usb_device_id
                         id = match;
         }
 
-        if (ignore || id->driver_info & HCI_IGNORE)
+        if (id->driver_info & HCI_IGNORE)
                 return -ENODEV;
 
         if (ignore_dga && id->driver_info & HCI_DIGIANSWER)
@@ -1108,9 +1107,6 @@ static void __exit hci_usb_exit(void)
 module_init(hci_usb_init);
 module_exit(hci_usb_exit);
 
-module_param(ignore, bool, 0644);
-MODULE_PARM_DESC(ignore, "Ignore devices from the matching table");
-
 module_param(ignore_dga, bool, 0644);
 MODULE_PARM_DESC(ignore_dga, "Ignore devices with id 08fd:0001");
 
@@ -1134,7 +1130,7 @@ module_param(isoc, int, 0644);
 MODULE_PARM_DESC(isoc, "Set isochronous transfers for SCO over HCI support");
 #endif
 
-MODULE_AUTHOR("Maxim Krasnyansky <maxk@qualcomm.com>, Marcel Holtmann <marcel@holtmann.org>");
+MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
 MODULE_DESCRIPTION("Bluetooth HCI USB driver ver " VERSION);
 MODULE_VERSION(VERSION);
 MODULE_LICENSE("GPL");
diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c
index d97700aa54a9..7320a71b6368 100644
--- a/drivers/bluetooth/hci_vhci.c
+++ b/drivers/bluetooth/hci_vhci.c
@@ -377,7 +377,7 @@ module_exit(vhci_exit);
 module_param(minor, int, 0444);
 MODULE_PARM_DESC(minor, "Miscellaneous minor device number");
 
-MODULE_AUTHOR("Maxim Krasnyansky <maxk@qualcomm.com>, Marcel Holtmann <marcel@holtmann.org>");
+MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
 MODULE_DESCRIPTION("Bluetooth virtual HCI driver ver " VERSION);
 MODULE_VERSION(VERSION);
 MODULE_LICENSE("GPL");
diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c
index d9d1b65d206c..74031de517e6 100644
--- a/drivers/cdrom/cdrom.c
+++ b/drivers/cdrom/cdrom.c
@@ -408,7 +408,6 @@ int register_cdrom(struct cdrom_device_info *cdi)
         ENSURE(get_last_session, CDC_MULTI_SESSION);
         ENSURE(get_mcn, CDC_MCN);
         ENSURE(reset, CDC_RESET);
-        ENSURE(audio_ioctl, CDC_PLAY_AUDIO);
         ENSURE(generic_packet, CDC_GENERIC_PACKET);
         cdi->mc_flags = 0;
         cdo->n_minors = 0;
@@ -2506,8 +2505,6 @@ static int cdrom_ioctl_get_subchnl(struct cdrom_device_info *cdi,
 
         /* cdinfo(CD_DO_IOCTL,"entering CDROMSUBCHNL\n");*/
 
-        if (!CDROM_CAN(CDC_PLAY_AUDIO))
-                return -ENOSYS;
         if (copy_from_user(&q, argp, sizeof(q)))
                 return -EFAULT;
 
@@ -2538,8 +2535,6 @@ static int cdrom_ioctl_read_tochdr(struct cdrom_device_info *cdi,
 
         /* cdinfo(CD_DO_IOCTL, "entering CDROMREADTOCHDR\n"); */
 
-        if (!CDROM_CAN(CDC_PLAY_AUDIO))
-                return -ENOSYS;
         if (copy_from_user(&header, argp, sizeof(header)))
                 return -EFAULT;
 
@@ -2562,8 +2557,6 @@ static int cdrom_ioctl_read_tocentry(struct cdrom_device_info *cdi,
 
         /* cdinfo(CD_DO_IOCTL, "entering CDROMREADTOCENTRY\n"); */
 
-        if (!CDROM_CAN(CDC_PLAY_AUDIO))
-                return -ENOSYS;
         if (copy_from_user(&entry, argp, sizeof(entry)))
                 return -EFAULT;
 
diff --git a/drivers/cdrom/gdrom.c b/drivers/cdrom/gdrom.c
index 1e0455bd6df9..1231d95aa695 100644
--- a/drivers/cdrom/gdrom.c
+++ b/drivers/cdrom/gdrom.c
@@ -471,6 +471,12 @@ cleanup_sense_final:
         return err;
 }
 
+static int gdrom_audio_ioctl(struct cdrom_device_info *cdi, unsigned int cmd,
+                             void *arg)
+{
+        return -EINVAL;
+}
+
 static struct cdrom_device_ops gdrom_ops = {
         .open                   = gdrom_open,
         .release                = gdrom_release,
@@ -478,6 +484,7 @@ static struct cdrom_device_ops gdrom_ops = {
         .media_changed          = gdrom_mediachanged,
         .get_last_session       = gdrom_get_last_session,
         .reset                  = gdrom_hardreset,
+        .audio_ioctl            = gdrom_audio_ioctl,
         .capability             = CDC_MULTI_SESSION | CDC_MEDIA_CHANGED |
                                   CDC_RESET | CDC_DRIVE_STATUS | CDC_CD_R,
         .n_minors               = 1,
diff --git a/drivers/cdrom/viocd.c b/drivers/cdrom/viocd.c
index 9d0dfe6e0d63..031e0e1a1a3b 100644
--- a/drivers/cdrom/viocd.c
+++ b/drivers/cdrom/viocd.c
@@ -550,12 +550,19 @@ return_complete:
         }
 }
 
+static int viocd_audio_ioctl(struct cdrom_device_info *cdi, unsigned int cmd,
+                             void *arg)
+{
+        return -EINVAL;
+}
+
 static struct cdrom_device_ops viocd_dops = {
         .open = viocd_open,
         .release = viocd_release,
         .media_changed = viocd_media_changed,
         .lock_door = viocd_lock_door,
         .generic_packet = viocd_packet,
+        .audio_ioctl = viocd_audio_ioctl,
         .capability = CDC_CLOSE_TRAY | CDC_OPEN_TRAY | CDC_LOCK | CDC_SELECT_SPEED | CDC_SELECT_DISC | CDC_MULTI_SESSION | CDC_MCN | CDC_MEDIA_CHANGED | CDC_PLAY_AUDIO | CDC_RESET | CDC_DRIVE_STATUS | CDC_GENERIC_PACKET | CDC_CD_R | CDC_CD_RW | CDC_DVD | CDC_DVD_R | CDC_DVD_RAM | CDC_RAM
 };
 
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index d0ac944e1696..caff85149b9d 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -8,7 +8,7 @@ config VT
         bool "Virtual terminal" if EMBEDDED
         depends on !S390
         select INPUT
-        default y if !VIOCONS
+        default y
         ---help---
           If you say Y here, you will get support for terminal devices with
           display and keyboard devices. These are called "virtual" because you
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 8a161c30e1dc..6850f6da7576 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -55,7 +55,6 @@ obj-$(CONFIG_RAW_DRIVER)	+= raw.o
 obj-$(CONFIG_SGI_SNSC)          += snsc.o snsc_event.o
 obj-$(CONFIG_MSPEC)             += mspec.o
 obj-$(CONFIG_MMTIMER)           += mmtimer.o
-obj-$(CONFIG_VIOCONS)           += viocons.o
 obj-$(CONFIG_VIOTAPE)           += viotape.o
 obj-$(CONFIG_HVCS)              += hvcs.o
 obj-$(CONFIG_IBM_BSR)           += bsr.o
diff --git a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
index 81e14bea54bd..4bada0e8b812 100644
--- a/drivers/char/agp/agp.h
+++ b/drivers/char/agp/agp.h
@@ -148,6 +148,9 @@ struct agp_bridge_data {
         char minor_version;
         struct list_head list;
         u32 apbase_config;
+        /* list of agp_memory mapped to the aperture */
+        struct list_head mapped_list;
+        spinlock_t mapped_lock;
 };
 
 #define KB(x)   ((x) * 1024)
diff --git a/drivers/char/agp/ali-agp.c b/drivers/char/agp/ali-agp.c
index 1ffb381130c3..31dcd9142d54 100644
--- a/drivers/char/agp/ali-agp.c
+++ b/drivers/char/agp/ali-agp.c
@@ -110,7 +110,8 @@ static int ali_configure(void)
 
                 nlvm_addr+= agp_bridge->gart_bus_addr;
                 nlvm_addr|=(agp_bridge->gart_bus_addr>>12);
-                printk(KERN_INFO PFX "nlvm top &base = %8x\n",nlvm_addr);
+                dev_info(&agp_bridge->dev->dev, "nlvm top &base = %8x\n",
+                         nlvm_addr);
         }
 #endif
 
@@ -315,8 +316,8 @@ static int __devinit agp_ali_probe(struct pci_dev *pdev,
                         goto found;
         }
 
-        printk(KERN_ERR PFX "Unsupported ALi chipset (device id: %04x)\n",
-             pdev->device);
+        dev_err(&pdev->dev, "unsupported ALi chipset [%04x/%04x])\n",
+                pdev->vendor, pdev->device);
         return -ENODEV;
 
 
@@ -361,8 +362,7 @@ found:
                 bridge->driver = &ali_generic_bridge;
         }
 
-        printk(KERN_INFO PFX "Detected ALi %s chipset\n",
-                        devs[j].chipset_name);
+        dev_info(&pdev->dev, "ALi %s chipset\n", devs[j].chipset_name);
 
         /* Fill in the mode register */
         pci_read_config_dword(pdev,
diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c
index 39a0718bc616..e280531843be 100644
--- a/drivers/char/agp/amd-k7-agp.c
+++ b/drivers/char/agp/amd-k7-agp.c
@@ -419,8 +419,8 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
                 return -ENODEV;
 
         j = ent - agp_amdk7_pci_table;
-        printk(KERN_INFO PFX "Detected AMD %s chipset\n",
-               amd_agp_device_ids[j].chipset_name);
+        dev_info(&pdev->dev, "AMD %s chipset\n",
+                 amd_agp_device_ids[j].chipset_name);
 
         bridge = agp_alloc_bridge();
         if (!bridge)
@@ -442,7 +442,7 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
                 while (!cap_ptr) {
                         gfxcard = pci_get_class(PCI_CLASS_DISPLAY_VGA<<8, gfxcard);
                         if (!gfxcard) {
-                                printk (KERN_INFO PFX "Couldn't find an AGP VGA controller.\n");
+                                dev_info(&pdev->dev, "no AGP VGA controller\n");
                                 return -ENODEV;
                         }
                         cap_ptr = pci_find_capability(gfxcard, PCI_CAP_ID_AGP);
@@ -453,7 +453,7 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
                    (if necessary at all). */
                 if (gfxcard->vendor == PCI_VENDOR_ID_NVIDIA) {
                         agp_bridge->flags |= AGP_ERRATA_1X;
-                        printk (KERN_INFO PFX "AMD 751 chipset with NVidia GeForce detected. Forcing to 1X due to errata.\n");
+                        dev_info(&pdev->dev, "AMD 751 chipset with NVidia GeForce; forcing 1X due to errata\n");
                 }
                 pci_dev_put(gfxcard);
         }
@@ -469,7 +469,7 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
                         agp_bridge->flags = AGP_ERRATA_FASTWRITES;
                         agp_bridge->flags |= AGP_ERRATA_SBA;
                         agp_bridge->flags |= AGP_ERRATA_1X;
-                        printk (KERN_INFO PFX "AMD 761 chipset with errata detected - disabling AGP fast writes & SBA and forcing to 1X.\n");
+                        dev_info(&pdev->dev, "AMD 761 chipset with errata; disabling AGP fast writes & SBA and forcing to 1X\n");
                 }
         }
 
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c
index 481ffe87c716..7495c522d8e4 100644
--- a/drivers/char/agp/amd64-agp.c
+++ b/drivers/char/agp/amd64-agp.c
@@ -34,6 +34,7 @@
 
 static struct resource *aperture_resource;
 static int __initdata agp_try_unsupported = 1;
+static int agp_bridges_found;
 
 static void amd64_tlbflush(struct agp_memory *temp)
 {
@@ -293,12 +294,13 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp,
          * so let double check that order, and lets trust the AMD NB settings
          */
         if (order >=0 && aper + (32ULL<<(20 + order)) > 0x100000000ULL) {
-                printk(KERN_INFO "Aperture size %u MB is not right, using settings from NB\n",
-                                  32 << order);
+                dev_info(&agp->dev, "aperture size %u MB is not right, using settings from NB\n",
+                         32 << order);
                 order = nb_order;
         }
 
-        printk(KERN_INFO PFX "Aperture from AGP @ %Lx size %u MB\n", aper, 32 << order);
+        dev_info(&agp->dev, "aperture from AGP @ %Lx size %u MB\n",
+                 aper, 32 << order);
         if (order < 0 || !agp_aperture_valid(aper, (32*1024*1024)<<order))
                 return -1;
 
@@ -319,10 +321,10 @@ static __devinit int cache_nbs (struct pci_dev *pdev, u32 cap_ptr)
         for (i = 0; i < num_k8_northbridges; i++) {
                 struct pci_dev *dev = k8_northbridges[i];
                 if (fix_northbridge(dev, pdev, cap_ptr) < 0) {
-                        printk(KERN_ERR PFX "No usable aperture found.\n");
+                        dev_err(&dev->dev, "no usable aperture found\n");
 #ifdef __x86_64__
                         /* should port this to i386 */
-                        printk(KERN_ERR PFX "Consider rebooting with iommu=memaper=2 to get a good aperture.\n");
+                        dev_err(&dev->dev, "consider rebooting with iommu=memaper=2 to get a good aperture\n");
 #endif
                         return -1;
                 }
@@ -345,14 +347,14 @@ static void __devinit amd8151_init(struct pci_dev *pdev, struct agp_bridge_data
         default:   revstring="??"; break;
         }
 
-        printk (KERN_INFO PFX "Detected AMD 8151 AGP Bridge rev %s\n", revstring);
+        dev_info(&pdev->dev, "AMD 8151 AGP Bridge rev %s\n", revstring);
 
         /*
          * Work around errata.
          * Chips before B2 stepping incorrectly reporting v3.5
          */
         if (pdev->revision < 0x13) {
-                printk (KERN_INFO PFX "Correcting AGP revision (reports 3.5, is really 3.0)\n");
+                dev_info(&pdev->dev, "correcting AGP revision (reports 3.5, is really 3.0)\n");
                 bridge->major_version = 3;
                 bridge->minor_version = 0;
         }
@@ -375,11 +377,11 @@ static int __devinit uli_agp_init(struct pci_dev *pdev)
         struct pci_dev *dev1;
         int i;
         unsigned size = amd64_fetch_size();
-        printk(KERN_INFO "Setting up ULi AGP.\n");
+
+        dev_info(&pdev->dev, "setting up ULi AGP\n");
         dev1 = pci_get_slot (pdev->bus,PCI_DEVFN(0,0));
         if (dev1 == NULL) {
-                printk(KERN_INFO PFX "Detected a ULi chipset, "
-                        "but could not fine the secondary device.\n");
+                dev_info(&pdev->dev, "can't find ULi secondary device\n");
                 return -ENODEV;
         }
 
@@ -388,7 +390,7 @@ static int __devinit uli_agp_init(struct pci_dev *pdev)
                         break;
 
         if (i == ARRAY_SIZE(uli_sizes)) {
-                printk(KERN_INFO PFX "No ULi size found for %d\n", size);
+                dev_info(&pdev->dev, "no ULi size found for %d\n", size);
                 return -ENODEV;
         }
 
@@ -433,13 +435,11 @@ static int nforce3_agp_init(struct pci_dev *pdev)
         int i;
         unsigned size = amd64_fetch_size();
 
-        printk(KERN_INFO PFX "Setting up Nforce3 AGP.\n");
+        dev_info(&pdev->dev, "setting up Nforce3 AGP\n");
 
         dev1 = pci_get_slot(pdev->bus, PCI_DEVFN(11, 0));
         if (dev1 == NULL) {
-                printk(KERN_INFO PFX "agpgart: Detected an NVIDIA "
-                        "nForce3 chipset, but could not find "
-                        "the secondary device.\n");
+                dev_info(&pdev->dev, "can't find Nforce3 secondary device\n");
                 return -ENODEV;
         }
 
@@ -448,7 +448,7 @@ static int nforce3_agp_init(struct pci_dev *pdev)
                         break;
 
         if (i == ARRAY_SIZE(nforce3_sizes)) {
-                printk(KERN_INFO PFX "No NForce3 size found for %d\n", size);
+                dev_info(&pdev->dev, "no NForce3 size found for %d\n", size);
                 return -ENODEV;
         }
 
@@ -462,7 +462,7 @@ static int nforce3_agp_init(struct pci_dev *pdev)
 
         /* if x86-64 aperture base is beyond 4G, exit here */
         if ( (apbase & 0x7fff) >> (32 - 25) ) {
-                printk(KERN_INFO PFX "aperture base > 4G\n");
+                dev_info(&pdev->dev, "aperture base > 4G\n");
                 return -ENODEV;
         }
 
@@ -489,6 +489,7 @@ static int __devinit agp_amd64_probe(struct pci_dev *pdev,
 {
         struct agp_bridge_data *bridge;
         u8 cap_ptr;
+        int err;
 
         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
         if (!cap_ptr)
@@ -504,7 +505,8 @@ static int __devinit agp_amd64_probe(struct pci_dev *pdev,
             pdev->device == PCI_DEVICE_ID_AMD_8151_0) {
                 amd8151_init(pdev, bridge);
         } else {
-                printk(KERN_INFO PFX "Detected AGP bridge %x\n", pdev->devfn);
+                dev_info(&pdev->dev, "AGP bridge [%04x/%04x]\n",
+                         pdev->vendor, pdev->device);
         }
 
         bridge->driver = &amd_8151_driver;
@@ -536,7 +538,12 @@ static int __devinit agp_amd64_probe(struct pci_dev *pdev,
         }
 
         pci_set_drvdata(pdev, bridge);
-        return agp_add_bridge(bridge);
+        err = agp_add_bridge(bridge);
+        if (err < 0)
+                return err;
+
+        agp_bridges_found++;
+        return 0;
 }
 
 static void __devexit agp_amd64_remove(struct pci_dev *pdev)
@@ -713,7 +720,11 @@ int __init agp_amd64_init(void)
 
         if (agp_off)
                 return -EINVAL;
-        if (pci_register_driver(&agp_amd64_pci_driver) < 0) {
+        err = pci_register_driver(&agp_amd64_pci_driver);
+        if (err < 0)
+                return err;
+
+        if (agp_bridges_found == 0) {
                 struct pci_dev *dev;
                 if (!agp_try_unsupported && !agp_try_unsupported_boot) {
                         printk(KERN_INFO PFX "No supported AGP bridge found.\n");
diff --git a/drivers/char/agp/ati-agp.c b/drivers/char/agp/ati-agp.c
index 3a4566c0d84f..6ecbcafb34b1 100644
--- a/drivers/char/agp/ati-agp.c
+++ b/drivers/char/agp/ati-agp.c
@@ -486,8 +486,8 @@ static int __devinit agp_ati_probe(struct pci_dev *pdev,
                         goto found;
         }
 
-        printk(KERN_ERR PFX
-             "Unsupported Ati chipset (device id: %04x)\n", pdev->device);
+        dev_err(&pdev->dev, "unsupported Ati chipset [%04x/%04x])\n",
+                pdev->vendor, pdev->device);
         return -ENODEV;
 
 found:
@@ -500,8 +500,7 @@ found:
 
         bridge->driver = &ati_generic_bridge;
 
-        printk(KERN_INFO PFX "Detected Ati %s chipset\n",
-                        devs[j].chipset_name);
+        dev_info(&pdev->dev, "Ati %s chipset\n", devs[j].chipset_name);
 
         /* Fill in the mode register */
         pci_read_config_dword(pdev,
diff --git a/drivers/char/agp/backend.c b/drivers/char/agp/backend.c
index 1ec87104e68c..3a3cc03d401c 100644
--- a/drivers/char/agp/backend.c
+++ b/drivers/char/agp/backend.c
@@ -144,7 +144,8 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
                 void *addr = bridge->driver->agp_alloc_page(bridge);
 
                 if (!addr) {
-                        printk(KERN_ERR PFX "unable to get memory for scratch page.\n");
+                        dev_err(&bridge->dev->dev,
+                                "can't get memory for scratch page\n");
                         return -ENOMEM;
                 }
 
@@ -155,13 +156,13 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
 
         size_value = bridge->driver->fetch_size();
         if (size_value == 0) {
-                printk(KERN_ERR PFX "unable to determine aperture size.\n");
+                dev_err(&bridge->dev->dev, "can't determine aperture size\n");
                 rc = -EINVAL;
                 goto err_out;
         }
         if (bridge->driver->create_gatt_table(bridge)) {
-                printk(KERN_ERR PFX
-                    "unable to get memory for graphics translation table.\n");
+                dev_err(&bridge->dev->dev,
+                        "can't get memory for graphics translation table\n");
                 rc = -ENOMEM;
                 goto err_out;
         }
@@ -169,7 +170,8 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
 
         bridge->key_list = vmalloc(PAGE_SIZE * 4);
         if (bridge->key_list == NULL) {
-                printk(KERN_ERR PFX "error allocating memory for key lists.\n");
+                dev_err(&bridge->dev->dev,
+                        "can't allocate memory for key lists\n");
                 rc = -ENOMEM;
                 goto err_out;
         }
@@ -179,10 +181,12 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
         memset(bridge->key_list, 0, PAGE_SIZE * 4);
 
         if (bridge->driver->configure()) {
-                printk(KERN_ERR PFX "error configuring host chipset.\n");
+                dev_err(&bridge->dev->dev, "error configuring host chipset\n");
                 rc = -EINVAL;
                 goto err_out;
         }
+        INIT_LIST_HEAD(&bridge->mapped_list);
+        spin_lock_init(&bridge->mapped_lock);
 
         return 0;
 
@@ -269,25 +273,27 @@ int agp_add_bridge(struct agp_bridge_data *bridge)
 
         /* Grab reference on the chipset driver. */
         if (!try_module_get(bridge->driver->owner)) {
-                printk (KERN_INFO PFX "Couldn't lock chipset driver.\n");
+                dev_info(&bridge->dev->dev, "can't lock chipset driver\n");
                 return -EINVAL;
         }
 
         error = agp_backend_initialize(bridge);
         if (error) {
-                printk (KERN_INFO PFX "agp_backend_initialize() failed.\n");
+                dev_info(&bridge->dev->dev,
+                         "agp_backend_initialize() failed\n");
                 goto err_out;
         }
 
         if (list_empty(&agp_bridges)) {
                 error = agp_frontend_initialize();
                 if (error) {
-                        printk (KERN_INFO PFX "agp_frontend_initialize() failed.\n");
+                        dev_info(&bridge->dev->dev,
+                                 "agp_frontend_initialize() failed\n");
                         goto frontend_err;
                 }
 
-                printk(KERN_INFO PFX "AGP aperture is %dM @ 0x%lx\n",
-                        bridge->driver->fetch_size(), bridge->gart_bus_addr);
+                dev_info(&bridge->dev->dev, "AGP aperture is %dM @ 0x%lx\n",
+                         bridge->driver->fetch_size(), bridge->gart_bus_addr);
 
         }
 
diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index eaa1a355bb32..118dbde25dc7 100644
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -429,6 +429,10 @@ int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
 
         curr->is_bound = true;
         curr->pg_start = pg_start;
+        spin_lock(&agp_bridge->mapped_lock);
+        list_add(&curr->mapped_list, &agp_bridge->mapped_list);
+        spin_unlock(&agp_bridge->mapped_lock);
+
         return 0;
 }
 EXPORT_SYMBOL(agp_bind_memory);
@@ -461,10 +465,34 @@ int agp_unbind_memory(struct agp_memory *curr)
 
         curr->is_bound = false;
         curr->pg_start = 0;
+        spin_lock(&curr->bridge->mapped_lock);
+        list_del(&curr->mapped_list);
+        spin_unlock(&curr->bridge->mapped_lock);
         return 0;
 }
 EXPORT_SYMBOL(agp_unbind_memory);
 
+/**
+ *      agp_rebind_emmory  -  Rewrite the entire GATT, useful on resume
+ */
+int agp_rebind_memory(void)
+{
+        struct agp_memory *curr;
+        int ret_val = 0;
+
+        spin_lock(&agp_bridge->mapped_lock);
+        list_for_each_entry(curr, &agp_bridge->mapped_list, mapped_list) {
+                ret_val = curr->bridge->driver->insert_memory(curr,
+                                                              curr->pg_start,
+                                                              curr->type);
+                if (ret_val != 0)
+                        break;
+        }
+        spin_unlock(&agp_bridge->mapped_lock);
+        return ret_val;
+}
+EXPORT_SYMBOL(agp_rebind_memory);
+
 /* End - Routines for handling swapping of agp_memory into the GATT */
 
 
@@ -771,8 +799,8 @@ void agp_device_command(u32 bridge_agpstat, bool agp_v3)
                 if (!agp)
                         continue;
 
-                printk(KERN_INFO PFX "Putting AGP V%d device at %s into %dx mode\n",
-                                agp_v3 ? 3 : 2, pci_name(device), mode);
+                dev_info(&device->dev, "putting AGP V%d device into %dx mode\n",
+                         agp_v3 ? 3 : 2, mode);
                 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat);
         }
 }
@@ -800,10 +828,8 @@ void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
 
         get_agp_version(agp_bridge);
 
-        printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
-                                agp_bridge->major_version,
-                                agp_bridge->minor_version,
-                                pci_name(agp_bridge->dev));
+        dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
+                 agp_bridge->major_version, agp_bridge->minor_version);
 
         pci_read_config_dword(agp_bridge->dev,
                       agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat);
@@ -832,8 +858,7 @@ void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
                     pci_write_config_dword(bridge->dev,
                                         bridge->capndx+AGPCTRL, temp);
 
-                    printk(KERN_INFO PFX "Device is in legacy mode,"
-                                " falling back to 2.x\n");
+                    dev_info(&bridge->dev->dev, "bridge is in legacy mode, falling back to 2.x\n");
                 }
         }
 
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index df702642ab8f..016fdf0623a4 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -32,8 +32,8 @@
 #define PCI_DEVICE_ID_INTEL_Q35_IG          0x29B2
 #define PCI_DEVICE_ID_INTEL_Q33_HB          0x29D0
 #define PCI_DEVICE_ID_INTEL_Q33_IG          0x29D2
-#define PCI_DEVICE_ID_INTEL_IGD_HB          0x2A40
-#define PCI_DEVICE_ID_INTEL_IGD_IG          0x2A42
+#define PCI_DEVICE_ID_INTEL_GM45_HB         0x2A40
+#define PCI_DEVICE_ID_INTEL_GM45_IG         0x2A42
 #define PCI_DEVICE_ID_INTEL_IGD_E_HB        0x2E00
 #define PCI_DEVICE_ID_INTEL_IGD_E_IG        0x2E02
 #define PCI_DEVICE_ID_INTEL_Q45_HB          0x2E10
@@ -55,7 +55,7 @@
                  agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
                  agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
                  agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB || \
-                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_HB)
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB)
 
 #define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
@@ -161,7 +161,7 @@ static int intel_i810_fetch_size(void)
         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 
         if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
-                printk(KERN_WARNING PFX "i810 is disabled\n");
+                dev_warn(&agp_bridge->dev->dev, "i810 is disabled\n");
                 return 0;
         }
         if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
@@ -193,7 +193,8 @@ static int intel_i810_configure(void)
 
                 intel_private.registers = ioremap(temp, 128 * 4096);
                 if (!intel_private.registers) {
-                        printk(KERN_ERR PFX "Unable to remap memory.\n");
+                        dev_err(&intel_private.pcidev->dev,
+                                "can't remap memory\n");
                         return -ENOMEM;
                 }
         }
@@ -201,7 +202,8 @@ static int intel_i810_configure(void)
         if ((readl(intel_private.registers+I810_DRAM_CTL)
                 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
                 /* This will need to be dynamically assigned */
-                printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
+                dev_info(&intel_private.pcidev->dev,
+                         "detected 4MB dedicated video ram\n");
                 intel_private.num_dcache_entries = 1024;
         }
         pci_read_config_dword(intel_private.pcidev, I810_GMADDR, &temp);
@@ -500,8 +502,8 @@ static void intel_i830_init_gtt_entries(void)
                         size = 1024 + 512;
                         break;
                 default:
-                        printk(KERN_INFO PFX "Unknown page table size, "
-                               "assuming 512KB\n");
+                        dev_info(&intel_private.pcidev->dev,
+                                 "unknown page table size, assuming 512KB\n");
                         size = 512;
                 }
                 size += 4; /* add in BIOS popup space */
@@ -515,8 +517,8 @@ static void intel_i830_init_gtt_entries(void)
                         size = 2048;
                         break;
                 default:
-                        printk(KERN_INFO PFX "Unknown page table size 0x%x, "
-                                "assuming 512KB\n",
+                        dev_info(&agp_bridge->dev->dev,
+                                 "unknown page table size 0x%x, assuming 512KB\n",
                                 (gmch_ctrl & G33_PGETBL_SIZE_MASK));
                         size = 512;
                 }
@@ -627,11 +629,11 @@ static void intel_i830_init_gtt_entries(void)
                 }
         }
         if (gtt_entries > 0)
-                printk(KERN_INFO PFX "Detected %dK %s memory.\n",
+                dev_info(&agp_bridge->dev->dev, "detected %dK %s memory\n",
                        gtt_entries / KB(1), local ? "local" : "stolen");
         else
-                printk(KERN_INFO PFX
-                       "No pre-allocated video memory detected.\n");
+                dev_info(&agp_bridge->dev->dev,
+                       "no pre-allocated video memory detected\n");
         gtt_entries /= KB(4);
 
         intel_private.gtt_entries = gtt_entries;
@@ -801,10 +803,12 @@ static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
         if (pg_start < intel_private.gtt_entries) {
-                printk(KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
-                                pg_start, intel_private.gtt_entries);
+                dev_printk(KERN_DEBUG, &intel_private.pcidev->dev,
+                           "pg_start == 0x%.8lx, intel_private.gtt_entries == 0x%.8x\n",
+                           pg_start, intel_private.gtt_entries);
 
-                printk(KERN_INFO PFX "Trying to insert into local/stolen memory\n");
+                dev_info(&intel_private.pcidev->dev,
+                         "trying to insert into local/stolen memory\n");
                 goto out_err;
         }
 
@@ -851,7 +855,8 @@ static int intel_i830_remove_entries(struct agp_memory *mem, off_t pg_start,
                 return 0;
 
         if (pg_start < intel_private.gtt_entries) {
-                printk(KERN_INFO PFX "Trying to disable local/stolen memory\n");
+                dev_info(&intel_private.pcidev->dev,
+                         "trying to disable local/stolen memory\n");
                 return -EINVAL;
         }
 
@@ -957,7 +962,7 @@ static void intel_i9xx_setup_flush(void)
         if (intel_private.ifp_resource.start) {
                 intel_private.i9xx_flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE);
                 if (!intel_private.i9xx_flush_page)
-                        printk(KERN_INFO "unable to ioremap flush  page - no chipset flushing");
+                        dev_info(&intel_private.pcidev->dev, "can't ioremap flush page - no chipset flushing");
         }
 }
 
@@ -1028,10 +1033,12 @@ static int intel_i915_insert_entries(struct agp_memory *mem, off_t pg_start,
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
         if (pg_start < intel_private.gtt_entries) {
-                printk(KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
-                                pg_start, intel_private.gtt_entries);
+                dev_printk(KERN_DEBUG, &intel_private.pcidev->dev,
+                           "pg_start == 0x%.8lx, intel_private.gtt_entries == 0x%.8x\n",
+                           pg_start, intel_private.gtt_entries);
 
-                printk(KERN_INFO PFX "Trying to insert into local/stolen memory\n");
+                dev_info(&intel_private.pcidev->dev,
+                         "trying to insert into local/stolen memory\n");
                 goto out_err;
         }
 
@@ -1078,7 +1085,8 @@ static int intel_i915_remove_entries(struct agp_memory *mem, off_t pg_start,
                 return 0;
 
         if (pg_start < intel_private.gtt_entries) {
-                printk(KERN_INFO PFX "Trying to disable local/stolen memory\n");
+                dev_info(&intel_private.pcidev->dev,
+                         "trying to disable local/stolen memory\n");
                 return -EINVAL;
         }
 
@@ -1182,7 +1190,7 @@ static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
 static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
 {
         switch (agp_bridge->dev->device) {
-        case PCI_DEVICE_ID_INTEL_IGD_HB:
+        case PCI_DEVICE_ID_INTEL_GM45_HB:
         case PCI_DEVICE_ID_INTEL_IGD_E_HB:
         case PCI_DEVICE_ID_INTEL_Q45_HB:
         case PCI_DEVICE_ID_INTEL_G45_HB:
@@ -1379,7 +1387,7 @@ static int intel_815_configure(void)
         /* the Intel 815 chipset spec. says that bits 29-31 in the
         * ATTBASE register are reserved -> try not to write them */
         if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
-                printk(KERN_EMERG PFX "gatt bus addr too high");
+                dev_emerg(&agp_bridge->dev->dev, "gatt bus addr too high");
                 return -EINVAL;
         }
 
@@ -2117,8 +2125,8 @@ static const struct intel_driver_description {
                 NULL, &intel_g33_driver },
         { PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33",
                 NULL, &intel_g33_driver },
-        { PCI_DEVICE_ID_INTEL_IGD_HB, PCI_DEVICE_ID_INTEL_IGD_IG, 0,
-            "Intel Integrated Graphics Device", NULL, &intel_i965_driver },
+        { PCI_DEVICE_ID_INTEL_GM45_HB, PCI_DEVICE_ID_INTEL_GM45_IG, 0,
+            "Mobile Intel? GM45 Express", NULL, &intel_i965_driver },
         { PCI_DEVICE_ID_INTEL_IGD_E_HB, PCI_DEVICE_ID_INTEL_IGD_E_IG, 0,
             "Intel Integrated Graphics Device", NULL, &intel_i965_driver },
         { PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG, 0,
@@ -2163,8 +2171,8 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
 
         if (intel_agp_chipsets[i].name == NULL) {
                 if (cap_ptr)
-                        printk(KERN_WARNING PFX "Unsupported Intel chipset"
-                               "(device id: %04x)\n", pdev->device);
+                        dev_warn(&pdev->dev, "unsupported Intel chipset [%04x/%04x]\n",
+                                 pdev->vendor, pdev->device);
                 agp_put_bridge(bridge);
                 return -ENODEV;
         }
@@ -2172,9 +2180,8 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
         if (bridge->driver == NULL) {
                 /* bridge has no AGP and no IGD detected */
                 if (cap_ptr)
-                        printk(KERN_WARNING PFX "Failed to find bridge device "
-                                "(chip_id: %04x)\n",
-                                intel_agp_chipsets[i].gmch_chip_id);
+                        dev_warn(&pdev->dev, "can't find bridge device (chip_id: %04x)\n",
+                                 intel_agp_chipsets[i].gmch_chip_id);
                 agp_put_bridge(bridge);
                 return -ENODEV;
         }
@@ -2183,8 +2190,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
         bridge->capndx = cap_ptr;
         bridge->dev_private_data = &intel_private;
 
-        printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n",
-                intel_agp_chipsets[i].name);
+        dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);
 
         /*
         * The following fixes the case where the BIOS has "forgotten" to
@@ -2194,7 +2200,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
         r = &pdev->resource[0];
         if (!r->start && r->end) {
                 if (pci_assign_resource(pdev, 0)) {
-                        printk(KERN_ERR PFX "could not assign resource 0\n");
+                        dev_err(&pdev->dev, "can't assign resource 0\n");
                         agp_put_bridge(bridge);
                         return -ENODEV;
                 }
@@ -2206,7 +2212,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
         * 20030610 - hamish@zot.org
         */
         if (pci_enable_device(pdev)) {
-                printk(KERN_ERR PFX "Unable to Enable PCI device\n");
+                dev_err(&pdev->dev, "can't enable PCI device\n");
                 agp_put_bridge(bridge);
                 return -ENODEV;
         }
@@ -2238,6 +2244,7 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev)
 static int agp_intel_resume(struct pci_dev *pdev)
 {
         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
+        int ret_val;
 
         pci_restore_state(pdev);
 
@@ -2265,6 +2272,10 @@ static int agp_intel_resume(struct pci_dev *pdev)
         else if (bridge->driver == &intel_i965_driver)
                 intel_i915_configure();
 
+        ret_val = agp_rebind_memory();
+        if (ret_val != 0)
+                return ret_val;
+
         return 0;
 }
 #endif
@@ -2315,7 +2326,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
         ID(PCI_DEVICE_ID_INTEL_G33_HB),
         ID(PCI_DEVICE_ID_INTEL_Q35_HB),
         ID(PCI_DEVICE_ID_INTEL_Q33_HB),
-        ID(PCI_DEVICE_ID_INTEL_IGD_HB),
+        ID(PCI_DEVICE_ID_INTEL_GM45_HB),
         ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),
         ID(PCI_DEVICE_ID_INTEL_Q45_HB),
         ID(PCI_DEVICE_ID_INTEL_G45_HB),
diff --git a/drivers/char/agp/isoch.c b/drivers/char/agp/isoch.c
index 3f9ccde62377..c73385cc4b8a 100644
--- a/drivers/char/agp/isoch.c
+++ b/drivers/char/agp/isoch.c
@@ -153,7 +153,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
 
         /* Check if this configuration has any chance of working */
         if (tot_bw > target.maxbw) {
-                printk(KERN_ERR PFX "isochronous bandwidth required "
+                dev_err(&td->dev, "isochronous bandwidth required "
                         "by AGP 3.0 devices exceeds that which is supported by "
                         "the AGP 3.0 bridge!\n");
                 ret = -ENODEV;
@@ -188,7 +188,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
         /* Exit if the minimal ISOCH_N allocation among the masters is more
          * than the target can handle. */
         if (tot_n > target.n) {
-                printk(KERN_ERR PFX "number of isochronous "
+                dev_err(&td->dev, "number of isochronous "
                         "transactions per period required by AGP 3.0 devices "
                         "exceeds that which is supported by the AGP 3.0 "
                         "bridge!\n");
@@ -229,7 +229,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
         /* Exit if the minimal RQ needs of the masters exceeds what the target
          * can provide. */
         if (tot_rq > rq_isoch) {
-                printk(KERN_ERR PFX "number of request queue slots "
+                dev_err(&td->dev, "number of request queue slots "
                         "required by the isochronous bandwidth requested by "
                         "AGP 3.0 devices exceeds the number provided by the "
                         "AGP 3.0 bridge!\n");
@@ -359,8 +359,9 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
                         case 0x0001:    /* Unclassified device */
                                 /* Don't know what this is, but log it for investigation. */
                                 if (mcapndx != 0) {
-                                        printk (KERN_INFO PFX "Wacky, found unclassified AGP device. %x:%x\n",
-                                                dev->vendor, dev->device);
+                                        dev_info(&td->dev, "wacky, found unclassified AGP device %s [%04x/%04x]\n",
+                                                 pci_name(dev),
+                                                 dev->vendor, dev->device);
                                 }
                                 continue;
 
@@ -407,17 +408,18 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
                 }
 
                 if (mcapndx == 0) {
-                        printk(KERN_ERR PFX "woah!  Non-AGP device "
-                                "found on the secondary bus of an AGP 3.5 bridge!\n");
+                        dev_err(&td->dev, "woah!  Non-AGP device %s on "
+                                "secondary bus of AGP 3.5 bridge!\n",
+                                pci_name(dev));
                         ret = -ENODEV;
                         goto free_and_exit;
                 }
 
                 mmajor = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
                 if (mmajor < 3) {
-                        printk(KERN_ERR PFX "woah!  AGP 2.0 device "
-                                "found on the secondary bus of an AGP 3.5 "
-                                "bridge operating with AGP 3.0 electricals!\n");
+                        dev_err(&td->dev, "woah!  AGP 2.0 device %s on "
+                                "secondary bus of AGP 3.5 bridge operating "
+                                "with AGP 3.0 electricals!\n", pci_name(dev));
                         ret = -ENODEV;
                         goto free_and_exit;
                 }
@@ -427,10 +429,10 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
                 pci_read_config_dword(dev, cur->capndx+AGPSTAT, &mstatus);
 
                 if (((mstatus >> 3) & 0x1) == 0) {
-                        printk(KERN_ERR PFX "woah!  AGP 3.x device "
-                                "not operating in AGP 3.x mode found on the "
-                                "secondary bus of an AGP 3.5 bridge operating "
-                                "with AGP 3.0 electricals!\n");
+                        dev_err(&td->dev, "woah!  AGP 3.x device %s not "
+                                "operating in AGP 3.x mode on secondary bus "
+                                "of AGP 3.5 bridge operating with AGP 3.0 "
+                                "electricals!\n", pci_name(dev));
                         ret = -ENODEV;
                         goto free_and_exit;
                 }
@@ -444,9 +446,9 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
         if (isoch) {
                 ret = agp_3_5_isochronous_node_enable(bridge, dev_list, ndevs);
                 if (ret) {
-                        printk(KERN_INFO PFX "Something bad happened setting "
-                               "up isochronous xfers.  Falling back to "
-                               "non-isochronous xfer mode.\n");
+                        dev_info(&td->dev, "something bad happened setting "
+                                 "up isochronous xfers; falling back to "
+                                 "non-isochronous xfer mode\n");
                 } else {
                         goto free_and_exit;
                 }
@@ -466,4 +468,3 @@ free_and_exit:
 get_out:
         return ret;
 }
-
diff --git a/drivers/char/agp/sis-agp.c b/drivers/char/agp/sis-agp.c
index b6791846809f..2587ef96a960 100644
--- a/drivers/char/agp/sis-agp.c
+++ b/drivers/char/agp/sis-agp.c
@@ -79,10 +79,8 @@ static void sis_delayed_enable(struct agp_bridge_data *bridge, u32 mode)
         u32 command;
         int rate;
 
-        printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
-                agp_bridge->major_version,
-                agp_bridge->minor_version,
-                pci_name(agp_bridge->dev));
+        dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
+                 agp_bridge->major_version, agp_bridge->minor_version);
 
         pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx + PCI_AGP_STATUS, &command);
         command = agp_collect_device_status(bridge, mode, command);
@@ -94,8 +92,8 @@ static void sis_delayed_enable(struct agp_bridge_data *bridge, u32 mode)
                 if (!agp)
                         continue;
 
-                printk(KERN_INFO PFX "Putting AGP V3 device at %s into %dx mode\n",
-                        pci_name(device), rate);
+                dev_info(&agp_bridge->dev->dev, "putting AGP V3 device at %s into %dx mode\n",
+                         pci_name(device), rate);
 
                 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
 
@@ -105,7 +103,7 @@ static void sis_delayed_enable(struct agp_bridge_data *bridge, u32 mode)
                  * cannot be configured
                  */
                 if (device->device == bridge->dev->device) {
-                        printk(KERN_INFO PFX "SiS delay workaround: giving bridge time to recover.\n");
+                        dev_info(&agp_bridge->dev->dev, "SiS delay workaround: giving bridge time to recover\n");
                         msleep(10);
                 }
         }
@@ -190,7 +188,8 @@ static int __devinit agp_sis_probe(struct pci_dev *pdev,
                 return -ENODEV;
 
 
-        printk(KERN_INFO PFX "Detected SiS chipset - id:%i\n", pdev->device);
+        dev_info(&pdev->dev, "SiS chipset [%04x/%04x]\n",
+                 pdev->vendor, pdev->device);
         bridge = agp_alloc_bridge();
         if (!bridge)
                 return -ENOMEM;
@@ -242,7 +241,7 @@ static struct pci_device_id agp_sis_pci_table[] = {
                 .class          = (PCI_CLASS_BRIDGE_HOST << 8),
                 .class_mask     = ~0,
                 .vendor         = PCI_VENDOR_ID_SI,
-                .device         = PCI_DEVICE_ID_SI_5591_AGP,
+                .device         = PCI_DEVICE_ID_SI_5591,
                 .subvendor      = PCI_ANY_ID,
                 .subdevice      = PCI_ANY_ID,
         },
diff --git a/drivers/char/agp/sworks-agp.c b/drivers/char/agp/sworks-agp.c
index 0e054c134490..2fb27fe4c10c 100644
--- a/drivers/char/agp/sworks-agp.c
+++ b/drivers/char/agp/sworks-agp.c
@@ -241,7 +241,8 @@ static void serverworks_tlbflush(struct agp_memory *temp)
         while (readb(serverworks_private.registers+SVWRKS_POSTFLUSH) == 1) {
                 cpu_relax();
                 if (time_after(jiffies, timeout)) {
-                        printk(KERN_ERR PFX "TLB post flush took more than 3 seconds\n");
+                        dev_err(&serverworks_private.svrwrks_dev->dev,
+                                "TLB post flush took more than 3 seconds\n");
                         break;
                 }
         }
@@ -251,7 +252,8 @@ static void serverworks_tlbflush(struct agp_memory *temp)
         while (readl(serverworks_private.registers+SVWRKS_DIRFLUSH) == 1) {
                 cpu_relax();
                 if (time_after(jiffies, timeout)) {
-                        printk(KERN_ERR PFX "TLB Dir flush took more than 3 seconds\n");
+                        dev_err(&serverworks_private.svrwrks_dev->dev,
+                                "TLB Dir flush took more than 3 seconds\n");
                         break;
                 }
         }
@@ -271,7 +273,7 @@ static int serverworks_configure(void)
         temp = (temp & PCI_BASE_ADDRESS_MEM_MASK);
         serverworks_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
         if (!serverworks_private.registers) {
-                printk (KERN_ERR PFX "Unable to ioremap() memory.\n");
+                dev_err(&agp_bridge->dev->dev, "can't ioremap(%#x)\n", temp);
                 return -ENOMEM;
         }
 
@@ -451,7 +453,7 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
 
         switch (pdev->device) {
         case 0x0006:
-                printk (KERN_ERR PFX "ServerWorks CNB20HE is unsupported due to lack of documentation.\n");
+                dev_err(&pdev->dev, "ServerWorks CNB20HE is unsupported due to lack of documentation\n");
                 return -ENODEV;
 
         case PCI_DEVICE_ID_SERVERWORKS_HE:
@@ -461,8 +463,8 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
 
         default:
                 if (cap_ptr)
-                        printk(KERN_ERR PFX "Unsupported Serverworks chipset "
-                                        "(device id: %04x)\n", pdev->device);
+                        dev_err(&pdev->dev, "unsupported Serverworks chipset "
+                                "[%04x/%04x]\n", pdev->vendor, pdev->device);
                 return -ENODEV;
         }
 
@@ -470,8 +472,7 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
         bridge_dev = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
                         PCI_DEVFN(0, 1));
         if (!bridge_dev) {
-                printk(KERN_INFO PFX "Detected a Serverworks chipset "
-                       "but could not find the secondary device.\n");
+                dev_info(&pdev->dev, "can't find secondary device\n");
                 return -ENODEV;
         }
 
@@ -482,8 +483,8 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
         if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) {
                 pci_read_config_dword(pdev, SVWRKS_APSIZE + 4, &temp2);
                 if (temp2 != 0) {
-                        printk(KERN_INFO PFX "Detected 64 bit aperture address, "
-                               "but top bits are not zero.  Disabling agp\n");
+                        dev_info(&pdev->dev, "64 bit aperture address, "
+                                 "but top bits are not zero; disabling AGP\n");
                         return -ENODEV;
                 }
                 serverworks_private.mm_addr_ofs = 0x18;
@@ -495,8 +496,8 @@ static int __devinit agp_serverworks_probe(struct pci_dev *pdev,
                 pci_read_config_dword(pdev,
                                 serverworks_private.mm_addr_ofs + 4, &temp2);
                 if (temp2 != 0) {
-                        printk(KERN_INFO PFX "Detected 64 bit MMIO address, "
-                               "but top bits are not zero.  Disabling agp\n");
+                        dev_info(&pdev->dev, "64 bit MMIO address, but top "
+                                 "bits are not zero; disabling AGP\n");
                         return -ENODEV;
                 }
         }
diff --git a/drivers/char/agp/uninorth-agp.c b/drivers/char/agp/uninorth-agp.c
index d2fa3cfca02a..eef72709ec53 100644
--- a/drivers/char/agp/uninorth-agp.c
+++ b/drivers/char/agp/uninorth-agp.c
@@ -46,8 +46,8 @@ static int uninorth_fetch_size(void)
                                 break;
 
                 if (i == agp_bridge->driver->num_aperture_sizes) {
-                        printk(KERN_ERR PFX "Invalid aperture size, using"
-                               " default\n");
+                        dev_err(&agp_bridge->dev->dev, "invalid aperture size, "
+                                "using default\n");
                         size = 0;
                         aperture = NULL;
                 }
@@ -108,8 +108,8 @@ static int uninorth_configure(void)
 
         current_size = A_SIZE_32(agp_bridge->current_size);
 
-        printk(KERN_INFO PFX "configuring for size idx: %d\n",
-               current_size->size_value);
+        dev_info(&agp_bridge->dev->dev, "configuring for size idx: %d\n",
+                 current_size->size_value);
 
         /* aperture size and gatt addr */
         pci_write_config_dword(agp_bridge->dev,
@@ -197,8 +197,9 @@ static int u3_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
         gp = (u32 *) &agp_bridge->gatt_table[pg_start];
         for (i = 0; i < mem->page_count; ++i) {
                 if (gp[i]) {
-                        printk("u3_insert_memory: entry 0x%x occupied (%x)\n",
-                               i, gp[i]);
+                        dev_info(&agp_bridge->dev->dev,
+                                 "u3_insert_memory: entry 0x%x occupied (%x)\n",
+                                 i, gp[i]);
                         return -EBUSY;
                 }
         }
@@ -276,8 +277,8 @@ static void uninorth_agp_enable(struct agp_bridge_data *bridge, u32 mode)
                                        &scratch);
         } while ((scratch & PCI_AGP_COMMAND_AGP) == 0 && ++timeout < 1000);
         if ((scratch & PCI_AGP_COMMAND_AGP) == 0)
-                printk(KERN_ERR PFX "failed to write UniNorth AGP"
-                       " command register\n");
+                dev_err(&bridge->dev->dev, "can't write UniNorth AGP "
+                        "command register\n");
 
         if (uninorth_rev >= 0x30) {
                 /* This is an AGP V3 */
@@ -330,8 +331,8 @@ static int agp_uninorth_suspend(struct pci_dev *pdev)
                 pci_read_config_dword(device, agp + PCI_AGP_COMMAND, &cmd);
                 if (!(cmd & PCI_AGP_COMMAND_AGP))
                         continue;
-                printk("uninorth-agp: disabling AGP on device %s\n",
-                                pci_name(device));
+                dev_info(&pdev->dev, "disabling AGP on device %s\n",
+                         pci_name(device));
                 cmd &= ~PCI_AGP_COMMAND_AGP;
                 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, cmd);
         }
@@ -341,8 +342,7 @@ static int agp_uninorth_suspend(struct pci_dev *pdev)
         pci_read_config_dword(pdev, agp + PCI_AGP_COMMAND, &cmd);
         bridge->dev_private_data = (void *)(long)cmd;
         if (cmd & PCI_AGP_COMMAND_AGP) {
-                printk("uninorth-agp: disabling AGP on bridge %s\n",
-                                pci_name(pdev));
+                dev_info(&pdev->dev, "disabling AGP on bridge\n");
                 cmd &= ~PCI_AGP_COMMAND_AGP;
                 pci_write_config_dword(pdev, agp + PCI_AGP_COMMAND, cmd);
         }
@@ -591,14 +591,14 @@ static int __devinit agp_uninorth_probe(struct pci_dev *pdev,
         /* probe for known chipsets */
         for (j = 0; devs[j].chipset_name != NULL; ++j) {
                 if (pdev->device == devs[j].device_id) {
-                        printk(KERN_INFO PFX "Detected Apple %s chipset\n",
-                               devs[j].chipset_name);
+                        dev_info(&pdev->dev, "Apple %s chipset\n",
+                                 devs[j].chipset_name);
                         goto found;
                 }
         }
 
-        printk(KERN_ERR PFX "Unsupported Apple chipset (device id: %04x).\n",
-                pdev->device);
+        dev_err(&pdev->dev, "unsupported Apple chipset [%04x/%04x]\n",
+                pdev->vendor, pdev->device);
         return -ENODEV;
 
  found:
diff --git a/drivers/char/amiserial.c b/drivers/char/amiserial.c
index 3530ff417a51..6e763e3f5a81 100644
--- a/drivers/char/amiserial.c
+++ b/drivers/char/amiserial.c
@@ -1254,7 +1254,7 @@ static int rs_break(struct tty_struct *tty, int break_state)
         unsigned long flags;
 
         if (serial_paranoia_check(info, tty->name, "rs_break"))
-                return;
+                return -EINVAL;
 
         local_irq_save(flags);
         if (break_state == -1)
diff --git a/drivers/char/ds1620.c b/drivers/char/ds1620.c
index 34275c6f1da2..74e9cd81b5b2 100644
--- a/drivers/char/ds1620.c
+++ b/drivers/char/ds1620.c
@@ -10,7 +10,7 @@
 #include <linux/init.h>
 #include <linux/smp_lock.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/uaccess.h>
 #include <asm/therm.h>
diff --git a/drivers/char/hvc_console.c b/drivers/char/hvc_console.c
index 02aac104842d..fd64137b1ab9 100644
--- a/drivers/char/hvc_console.c
+++ b/drivers/char/hvc_console.c
@@ -322,11 +322,10 @@ static int hvc_open(struct tty_struct *tty, struct file * filp)
 
         hp->tty = tty;
 
-        if (hp->ops->notifier_add)
-                rc = hp->ops->notifier_add(hp, hp->data);
-
         spin_unlock_irqrestore(&hp->lock, flags);
 
+        if (hp->ops->notifier_add)
+                rc = hp->ops->notifier_add(hp, hp->data);
 
         /*
          * If the notifier fails we return an error.  The tty layer
diff --git a/drivers/char/hw_random/ixp4xx-rng.c b/drivers/char/hw_random/ixp4xx-rng.c
index bab43ca32ac1..263567f5f392 100644
--- a/drivers/char/hw_random/ixp4xx-rng.c
+++ b/drivers/char/hw_random/ixp4xx-rng.c
@@ -23,7 +23,7 @@
 #include <linux/hw_random.h>
 
 #include <asm/io.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 
 static int ixp4xx_rng_data_read(struct hwrng *rng, u32 *buffer)
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index f7feae4ebb5e..128202e18fc9 100644
--- a/drivers/char/hw_random/via-rng.c
+++ b/drivers/char/hw_random/via-rng.c
@@ -31,6 +31,7 @@
 #include <asm/io.h>
 #include <asm/msr.h>
 #include <asm/cpufeature.h>
+#include <asm/i387.h>
 
 
 #define PFX     KBUILD_MODNAME ": "
@@ -67,16 +68,23 @@ enum {
  * Another possible performance boost may come from simply buffering
  * until we have 4 bytes, thus returning a u32 at a time,
  * instead of the current u8-at-a-time.
+ *
+ * Padlock instructions can generate a spurious DNA fault, so
+ * we have to call them in the context of irq_ts_save/restore()
  */
 
 static inline u32 xstore(u32 *addr, u32 edx_in)
 {
         u32 eax_out;
+        int ts_state;
+
+        ts_state = irq_ts_save();
 
         asm(".byte 0x0F,0xA7,0xC0 /* xstore %%edi (addr=%0) */"
                 :"=m"(*addr), "=a"(eax_out)
                 :"D"(addr), "d"(edx_in));
 
+        irq_ts_restore(ts_state);
         return eax_out;
 }
 
diff --git a/drivers/char/pcmcia/ipwireless/tty.c b/drivers/char/pcmcia/ipwireless/tty.c
index b1414507997c..3a23e7694d55 100644
--- a/drivers/char/pcmcia/ipwireless/tty.c
+++ b/drivers/char/pcmcia/ipwireless/tty.c
@@ -29,7 +29,6 @@
 #include <linux/tty_driver.h>
 #include <linux/tty_flip.h>
 #include <linux/uaccess.h>
-#include <linux/version.h>
 
 #include "tty.h"
 #include "network.h"
diff --git a/drivers/char/pcmcia/synclink_cs.c b/drivers/char/pcmcia/synclink_cs.c
index d1fceabe3aef..c240562c218b 100644
--- a/drivers/char/pcmcia/synclink_cs.c
+++ b/drivers/char/pcmcia/synclink_cs.c
@@ -232,7 +232,6 @@ typedef struct _mgslpc_info {
 
         /* SPPP/Cisco HDLC device parts */
         int netcount;
-        int dosyncppp;
         spinlock_t netlock;
 
 #if SYNCLINK_GENERIC_HDLC
@@ -459,13 +458,11 @@ static int ttymajor=0;
 
 static int debug_level = 0;
 static int maxframe[MAX_DEVICE_COUNT] = {0,};
-static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
 
 module_param(break_on_load, bool, 0);
 module_param(ttymajor, int, 0);
 module_param(debug_level, int, 0);
 module_param_array(maxframe, int, NULL, 0);
-module_param_array(dosyncppp, int, NULL, 0);
 
 MODULE_LICENSE("GPL");
 
@@ -2915,7 +2912,6 @@ static void mgslpc_add_device(MGSLPC_INFO *info)
         if (info->line < MAX_DEVICE_COUNT) {
                 if (maxframe[info->line])
                         info->max_frame_size = maxframe[info->line];
-                info->dosyncppp = dosyncppp[info->line];
         }
 
         mgslpc_device_count++;
diff --git a/drivers/char/random.c b/drivers/char/random.c
index e0d0e371909c..1838aa3d24fe 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -1571,6 +1571,7 @@ u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport)
 
         return half_md4_transform(hash, keyptr->secret);
 }
+EXPORT_SYMBOL_GPL(secure_ipv4_port_ephemeral);
 
 #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
 u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr,
diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c
index d9799e2bcfbf..f53d4d00faf0 100644
--- a/drivers/char/rtc.c
+++ b/drivers/char/rtc.c
@@ -78,7 +78,6 @@
 #include <linux/wait.h>
 #include <linux/bcd.h>
 #include <linux/delay.h>
-#include <linux/smp_lock.h>
 #include <linux/uaccess.h>
 
 #include <asm/current.h>
diff --git a/drivers/char/synclink.c b/drivers/char/synclink.c
index ef6706f09061..500f5176b6ba 100644
--- a/drivers/char/synclink.c
+++ b/drivers/char/synclink.c
@@ -304,7 +304,6 @@ struct mgsl_struct {
 
         /* generic HDLC device parts */
         int netcount;
-        int dosyncppp;
         spinlock_t netlock;
 
 #if SYNCLINK_GENERIC_HDLC
@@ -868,7 +867,6 @@ static int irq[MAX_ISA_DEVICES];
 static int dma[MAX_ISA_DEVICES];
 static int debug_level;
 static int maxframe[MAX_TOTAL_DEVICES];
-static int dosyncppp[MAX_TOTAL_DEVICES];
 static int txdmabufs[MAX_TOTAL_DEVICES];
 static int txholdbufs[MAX_TOTAL_DEVICES];
         
@@ -879,7 +877,6 @@ module_param_array(irq, int, NULL, 0);
 module_param_array(dma, int, NULL, 0);
 module_param(debug_level, int, 0);
 module_param_array(maxframe, int, NULL, 0);
-module_param_array(dosyncppp, int, NULL, 0);
 module_param_array(txdmabufs, int, NULL, 0);
 module_param_array(txholdbufs, int, NULL, 0);
 
@@ -4258,7 +4255,6 @@ static void mgsl_add_device( struct mgsl_struct *info )
         if (info->line < MAX_TOTAL_DEVICES) {
                 if (maxframe[info->line])
                         info->max_frame_size = maxframe[info->line];
-                info->dosyncppp = dosyncppp[info->line];
 
                 if (txdmabufs[info->line]) {
                         info->num_tx_dma_buffers = txdmabufs[info->line];
diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c
index 3e9058993e41..08911ed66494 100644
--- a/drivers/char/synclink_gt.c
+++ b/drivers/char/synclink_gt.c
@@ -47,7 +47,6 @@
 
 
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/errno.h>
 #include <linux/signal.h>
 #include <linux/sched.h>
@@ -128,17 +127,14 @@ static int slgt_device_count;
 static int ttymajor;
 static int debug_level;
 static int maxframe[MAX_DEVICES];
-static int dosyncppp[MAX_DEVICES];
 
 module_param(ttymajor, int, 0);
 module_param(debug_level, int, 0);
 module_param_array(maxframe, int, NULL, 0);
-module_param_array(dosyncppp, int, NULL, 0);
 
 MODULE_PARM_DESC(ttymajor, "TTY major device number override: 0=auto assigned");
 MODULE_PARM_DESC(debug_level, "Debug syslog output: 0=disabled, 1 to 5=increasing detail");
 MODULE_PARM_DESC(maxframe, "Maximum frame size used by device (4096 to 65535)");
-MODULE_PARM_DESC(dosyncppp, "Enable synchronous net device, 0=disable 1=enable");
 
 /*
  * tty support and callbacks
@@ -349,7 +345,6 @@ struct slgt_info {
         /* SPPP/Cisco HDLC device parts */
 
         int netcount;
-        int dosyncppp;
         spinlock_t netlock;
 #if SYNCLINK_GENERIC_HDLC
         struct net_device *netdev;
@@ -3405,7 +3400,6 @@ static void add_device(struct slgt_info *info)
         if (info->line < MAX_DEVICES) {
                 if (maxframe[info->line])
                         info->max_frame_size = maxframe[info->line];
-                info->dosyncppp = dosyncppp[info->line];
         }
 
         slgt_device_count++;
diff --git a/drivers/char/synclinkmp.c b/drivers/char/synclinkmp.c
index c0490cbd0db2..6bdb44f7bec2 100644
--- a/drivers/char/synclinkmp.c
+++ b/drivers/char/synclinkmp.c
@@ -270,7 +270,6 @@ typedef struct _synclinkmp_info {
 
         /* SPPP/Cisco HDLC device parts */
         int netcount;
-        int dosyncppp;
         spinlock_t netlock;
 
 #if SYNCLINK_GENERIC_HDLC
@@ -469,13 +468,11 @@ static int ttymajor = 0;
  */
 static int debug_level = 0;
 static int maxframe[MAX_DEVICES] = {0,};
-static int dosyncppp[MAX_DEVICES] = {0,};
 
 module_param(break_on_load, bool, 0);
 module_param(ttymajor, int, 0);
 module_param(debug_level, int, 0);
 module_param_array(maxframe, int, NULL, 0);
-module_param_array(dosyncppp, int, NULL, 0);
 
 static char *driver_name = "SyncLink MultiPort driver";
 static char *driver_version = "$Revision: 4.38 $";
@@ -3752,7 +3749,6 @@ static void add_device(SLMP_INFO *info)
         if (info->line < MAX_DEVICES) {
                 if (maxframe[info->line])
                         info->max_frame_size = maxframe[info->line];
-                info->dosyncppp = dosyncppp[info->line];
         }
 
         synclinkmp_device_count++;
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index e1b46bc7e43c..a27160ba21d7 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -1161,8 +1161,8 @@ void disassociate_ctty(int on_exit)
         tty = get_current_tty();
         if (tty) {
                 tty_pgrp = get_pid(tty->pgrp);
-                mutex_unlock(&tty_mutex);
                 lock_kernel();
+                mutex_unlock(&tty_mutex);
                 /* XXX: here we race, there is nothing protecting tty */
                 if (on_exit && tty->driver->type != TTY_DRIVER_TYPE_PTY)
                         tty_vhangup(tty);
@@ -2496,45 +2496,25 @@ static int tiocgwinsz(struct tty_struct *tty, struct winsize __user *arg)
 }
 
 /**
- *      tiocswinsz              -       implement window size set ioctl
- *      @tty; tty
- *      @arg: user buffer for result
+ *      tty_do_resize           -       resize event
+ *      @tty: tty being resized
+ *      @real_tty: real tty (if using a pty/tty pair)
+ *      @rows: rows (character)
+ *      @cols: cols (character)
  *
- *      Copies the user idea of the window size to the kernel. Traditionally
- *      this is just advisory information but for the Linux console it
- *      actually has driver level meaning and triggers a VC resize.
- *
- *      Locking:
- *              Called function use the console_sem is used to ensure we do
- *      not try and resize the console twice at once.
- *              The tty->termios_mutex is used to ensure we don't double
- *      resize and get confused. Lock order - tty->termios_mutex before
- *      console sem
+ *      Update the termios variables and send the neccessary signals to
+ *      peform a terminal resize correctly
  */
 
-static int tiocswinsz(struct tty_struct *tty, struct tty_struct *real_tty,
-        struct winsize __user *arg)
+int tty_do_resize(struct tty_struct *tty, struct tty_struct *real_tty,
+                                        struct winsize *ws)
 {
-        struct winsize tmp_ws;
         struct pid *pgrp, *rpgrp;
         unsigned long flags;
 
-        if (copy_from_user(&tmp_ws, arg, sizeof(*arg)))
-                return -EFAULT;
-
         mutex_lock(&tty->termios_mutex);
-        if (!memcmp(&tmp_ws, &tty->winsize, sizeof(*arg)))
+        if (!memcmp(ws, &tty->winsize, sizeof(*ws)))
                 goto done;
-
-#ifdef CONFIG_VT
-        if (tty->driver->type == TTY_DRIVER_TYPE_CONSOLE) {
-                if (vc_lock_resize(tty->driver_data, tmp_ws.ws_col,
-                                        tmp_ws.ws_row)) {
-                        mutex_unlock(&tty->termios_mutex);
-                        return -ENXIO;
-                }
-        }
-#endif
         /* Get the PID values and reference them so we can
            avoid holding the tty ctrl lock while sending signals */
         spin_lock_irqsave(&tty->ctrl_lock, flags);
@@ -2550,14 +2530,42 @@ static int tiocswinsz(struct tty_struct *tty, struct tty_struct *real_tty,
         put_pid(pgrp);
         put_pid(rpgrp);
 
-        tty->winsize = tmp_ws;
-        real_tty->winsize = tmp_ws;
+        tty->winsize = *ws;
+        real_tty->winsize = *ws;
 done:
         mutex_unlock(&tty->termios_mutex);
         return 0;
 }
 
 /**
+ *      tiocswinsz              -       implement window size set ioctl
+ *      @tty; tty
+ *      @arg: user buffer for result
+ *
+ *      Copies the user idea of the window size to the kernel. Traditionally
+ *      this is just advisory information but for the Linux console it
+ *      actually has driver level meaning and triggers a VC resize.
+ *
+ *      Locking:
+ *              Driver dependant. The default do_resize method takes the
+ *      tty termios mutex and ctrl_lock. The console takes its own lock
+ *      then calls into the default method.
+ */
+
+static int tiocswinsz(struct tty_struct *tty, struct tty_struct *real_tty,
+        struct winsize __user *arg)
+{
+        struct winsize tmp_ws;
+        if (copy_from_user(&tmp_ws, arg, sizeof(*arg)))
+                return -EFAULT;
+
+        if (tty->ops->resize)
+                return tty->ops->resize(tty, real_tty, &tmp_ws);
+        else
+                return tty_do_resize(tty, real_tty, &tmp_ws);
+}
+
+/**
  *      tioccons        -       allow admin to move logical console
  *      @file: the file to become console
  *
diff --git a/drivers/char/viocons.c b/drivers/char/viocons.c
deleted file mode 100644
index 65fb848e1cce..000000000000
--- a/drivers/char/viocons.c
+++ /dev/null
@@ -1,1171 +0,0 @@
-/* -*- linux-c -*-
- *
- *  drivers/char/viocons.c
- *
- *  iSeries Virtual Terminal
- *
- *  Authors: Dave Boutcher <boutcher@us.ibm.com>
- *           Ryan Arnold <ryanarn@us.ibm.com>
- *           Colin Devilbiss <devilbis@us.ibm.com>
- *           Stephen Rothwell
- *
- * (C) Copyright 2000, 2001, 2002, 2003, 2004 IBM Corporation
- *
- * This program is free software;  you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) anyu later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software Foundation,
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/proc_fs.h>
-#include <linux/errno.h>
-#include <linux/vmalloc.h>
-#include <linux/mm.h>
-#include <linux/console.h>
-#include <linux/module.h>
-#include <asm/uaccess.h>
-#include <linux/init.h>
-#include <linux/wait.h>
-#include <linux/spinlock.h>
-#include <asm/ioctls.h>
-#include <linux/kd.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/sysrq.h>
-
-#include <asm/firmware.h>
-#include <asm/iseries/vio.h>
-#include <asm/iseries/hv_lp_event.h>
-#include <asm/iseries/hv_call_event.h>
-#include <asm/iseries/hv_lp_config.h>
-#include <asm/iseries/hv_call.h>
-
-#ifdef CONFIG_VT
-#error You must turn off CONFIG_VT to use CONFIG_VIOCONS
-#endif
-
-#define VIOTTY_MAGIC (0x0DCB)
-#define VTTY_PORTS 10
-
-#define VIOCONS_KERN_WARN       KERN_WARNING "viocons: "
-#define VIOCONS_KERN_INFO       KERN_INFO "viocons: "
-
-static DEFINE_SPINLOCK(consolelock);
-static DEFINE_SPINLOCK(consoleloglock);
-
-static int vio_sysrq_pressed;
-
-#define VIOCHAR_NUM_BUF         16
-
-/*
- * Our port information.  We store a pointer to one entry in the
- * tty_driver_data
- */
-static struct port_info {
-        int magic;
-        struct tty_struct *tty;
-        HvLpIndex lp;
-        u8 vcons;
-        u64 seq;        /* sequence number of last HV send */
-        u64 ack;        /* last ack from HV */
-/*
- * When we get writes faster than we can send it to the partition,
- * buffer the data here. Note that used is a bit map of used buffers.
- * It had better have enough bits to hold VIOCHAR_NUM_BUF the bitops assume
- * it is a multiple of unsigned long
- */
-        unsigned long used;
-        u8 *buffer[VIOCHAR_NUM_BUF];
-        int bufferBytes[VIOCHAR_NUM_BUF];
-        int curbuf;
-        int bufferOverflow;
-        int overflowMessage;
-} port_info[VTTY_PORTS];
-
-#define viochar_is_console(pi)  ((pi) == &port_info[0])
-#define viochar_port(pi)        ((pi) - &port_info[0])
-
-static void initDataEvent(struct viocharlpevent *viochar, HvLpIndex lp);
-
-static struct tty_driver *viotty_driver;
-
-static void hvlog(char *fmt, ...)
-{
-        int i;
-        unsigned long flags;
-        va_list args;
-        static char buf[256];
-
-        spin_lock_irqsave(&consoleloglock, flags);
-        va_start(args, fmt);
-        i = vscnprintf(buf, sizeof(buf) - 1, fmt, args);
-        va_end(args);
-        buf[i++] = '\r';
-        HvCall_writeLogBuffer(buf, i);
-        spin_unlock_irqrestore(&consoleloglock, flags);
-}
-
-static void hvlogOutput(const char *buf, int count)
-{
-        unsigned long flags;
-        int begin;
-        int index;
-        static const char cr = '\r';
-
-        begin = 0;
-        spin_lock_irqsave(&consoleloglock, flags);
-        for (index = 0; index < count; index++) {
-                if (buf[index] == '\n') {
-                        /*
-                         * Start right after the last '\n' or at the zeroth
-                         * array position and output the number of characters
-                         * including the newline.
-                         */
-                        HvCall_writeLogBuffer(&buf[begin], index - begin + 1);
-                        begin = index + 1;
-                        HvCall_writeLogBuffer(&cr, 1);
-                }
-        }
-        if ((index - begin) > 0)
-                HvCall_writeLogBuffer(&buf[begin], index - begin);
-        spin_unlock_irqrestore(&consoleloglock, flags);
-}
-
-/*
- * Make sure we're pointing to a valid port_info structure.  Shamelessly
- * plagerized from serial.c
- */
-static inline int viotty_paranoia_check(struct port_info *pi,
-                                        char *name, const char *routine)
-{
-        static const char *bad_pi_addr = VIOCONS_KERN_WARN
-                "warning: bad address for port_info struct (%s) in %s\n";
-        static const char *badmagic = VIOCONS_KERN_WARN
-                "warning: bad magic number for port_info struct (%s) in %s\n";
-
-        if ((pi < &port_info[0]) || (viochar_port(pi) > VTTY_PORTS)) {
-                printk(bad_pi_addr, name, routine);
-                return 1;
-        }
-        if (pi->magic != VIOTTY_MAGIC) {
-                printk(badmagic, name, routine);
-                return 1;
-        }
-        return 0;
-}
-
-/*
- * Add data to our pending-send buffers.  
- *
- * NOTE: Don't use printk in here because it gets nastily recursive.
- * hvlog can be used to log to the hypervisor buffer
- */
-static int buffer_add(struct port_info *pi, const char *buf, size_t len)
-{
-        size_t bleft;
-        size_t curlen;
-        const char *curbuf;
-        int nextbuf;
-
-        curbuf = buf;
-        bleft = len;
-        while (bleft > 0) {
-                /*
-                 * If there is no space left in the current buffer, we have
-                 * filled everything up, so return.  If we filled the previous
-                 * buffer we would already have moved to the next one.
-                 */
-                if (pi->bufferBytes[pi->curbuf] == VIOCHAR_MAX_DATA) {
-                        hvlog ("\n\rviocons: No overflow buffer available for memcpy().\n");
-                        pi->bufferOverflow++;
-                        pi->overflowMessage = 1;
-                        break;
-                }
-
-                /*
-                 * Turn on the "used" bit for this buffer.  If it's already on,
-                 * that's fine.
-                 */
-                set_bit(pi->curbuf, &pi->used);
-
-                /*
-                 * See if this buffer has been allocated.  If not, allocate it.
-                 */
-                if (pi->buffer[pi->curbuf] == NULL) {
-                        pi->buffer[pi->curbuf] =
-                            kmalloc(VIOCHAR_MAX_DATA, GFP_ATOMIC);
-                        if (pi->buffer[pi->curbuf] == NULL) {
-                                hvlog("\n\rviocons: kmalloc failed allocating spaces for buffer %d.",
-                                        pi->curbuf);
-                                break;
-                        }
-                }
-
-                /* Figure out how much we can copy into this buffer. */
-                if (bleft < (VIOCHAR_MAX_DATA - pi->bufferBytes[pi->curbuf]))
-                        curlen = bleft;
-                else
-                        curlen = VIOCHAR_MAX_DATA - pi->bufferBytes[pi->curbuf];
-
-                /* Copy the data into the buffer. */
-                memcpy(pi->buffer[pi->curbuf] + pi->bufferBytes[pi->curbuf],
-                                curbuf, curlen);
-
-                pi->bufferBytes[pi->curbuf] += curlen;
-                curbuf += curlen;
-                bleft -= curlen;
-
-                /*
-                 * Now see if we've filled this buffer.  If not then
-                 * we'll try to use it again later.  If we've filled it
-                 * up then we'll advance the curbuf to the next in the
-                 * circular queue.
-                 */
-                if (pi->bufferBytes[pi->curbuf] == VIOCHAR_MAX_DATA) {
-                        nextbuf = (pi->curbuf + 1) % VIOCHAR_NUM_BUF;
-                        /*
-                         * Move to the next buffer if it hasn't been used yet
-                         */
-                        if (test_bit(nextbuf, &pi->used) == 0)
-                                pi->curbuf = nextbuf;
-                }
-        }
-        return len - bleft;
-}
-
-/*
- * Send pending data
- *
- * NOTE: Don't use printk in here because it gets nastily recursive.
- * hvlog can be used to log to the hypervisor buffer
- */
-static void send_buffers(struct port_info *pi)
-{
-        HvLpEvent_Rc hvrc;
-        int nextbuf;
-        struct viocharlpevent *viochar;
-        unsigned long flags;
-
-        spin_lock_irqsave(&consolelock, flags);
-
-        viochar = (struct viocharlpevent *)
-            vio_get_event_buffer(viomajorsubtype_chario);
-
-        /* Make sure we got a buffer */
-        if (viochar == NULL) {
-                hvlog("\n\rviocons: Can't get viochar buffer in sendBuffers().");
-                spin_unlock_irqrestore(&consolelock, flags);
-                return;
-        }
-
-        if (pi->used == 0) {
-                hvlog("\n\rviocons: in sendbuffers(), but no buffers used.\n");
-                vio_free_event_buffer(viomajorsubtype_chario, viochar);
-                spin_unlock_irqrestore(&consolelock, flags);
-                return;
-        }
-
-        /*
-         * curbuf points to the buffer we're filling.  We want to
-         * start sending AFTER this one.  
-         */
-        nextbuf = (pi->curbuf + 1) % VIOCHAR_NUM_BUF;
-
-        /*
-         * Loop until we find a buffer with the used bit on
-         */
-        while (test_bit(nextbuf, &pi->used) == 0)
-                nextbuf = (nextbuf + 1) % VIOCHAR_NUM_BUF;
-
-        initDataEvent(viochar, pi->lp);
-
-        /*
-         * While we have buffers with data, and our send window
-         * is open, send them
-         */
-        while ((test_bit(nextbuf, &pi->used)) &&
-               ((pi->seq - pi->ack) < VIOCHAR_WINDOW)) {
-                viochar->len = pi->bufferBytes[nextbuf];
-                viochar->event.xCorrelationToken = pi->seq++;
-                viochar->event.xSizeMinus1 =
-                        offsetof(struct viocharlpevent, data) + viochar->len;
-
-                memcpy(viochar->data, pi->buffer[nextbuf], viochar->len);
-
-                hvrc = HvCallEvent_signalLpEvent(&viochar->event);
-                if (hvrc) {
-                        /*
-                         * MUST unlock the spinlock before doing a printk
-                         */
-                        vio_free_event_buffer(viomajorsubtype_chario, viochar);
-                        spin_unlock_irqrestore(&consolelock, flags);
-
-                        printk(VIOCONS_KERN_WARN
-                               "error sending event! return code %d\n",
-                               (int)hvrc);
-                        return;
-                }
-
-                /*
-                 * clear the used bit, zero the number of bytes in
-                 * this buffer, and move to the next buffer
-                 */
-                clear_bit(nextbuf, &pi->used);
-                pi->bufferBytes[nextbuf] = 0;
-                nextbuf = (nextbuf + 1) % VIOCHAR_NUM_BUF;
-        }
-
-        /*
-         * If we have emptied all the buffers, start at 0 again.
-         * this will re-use any allocated buffers
-         */
-        if (pi->used == 0) {
-                pi->curbuf = 0;
-
-                if (pi->overflowMessage)
-                        pi->overflowMessage = 0;
-
-                if (pi->tty) {
-                        tty_wakeup(pi->tty);
-                }
-        }
-
-        vio_free_event_buffer(viomajorsubtype_chario, viochar);
-        spin_unlock_irqrestore(&consolelock, flags);
-}
-
-/*
- * Our internal writer.  Gets called both from the console device and
- * the tty device.  the tty pointer will be NULL if called from the console.
- * Return total number of bytes "written".
- *
- * NOTE: Don't use printk in here because it gets nastily recursive.  hvlog
- * can be used to log to the hypervisor buffer
- */
-static int internal_write(struct port_info *pi, const char *buf, size_t len)
-{
-        HvLpEvent_Rc hvrc;
-        size_t bleft;
-        size_t curlen;
-        const char *curbuf;
-        unsigned long flags;
-        struct viocharlpevent *viochar;
-
-        /*
-         * Write to the hvlog of inbound data are now done prior to
-         * calling internal_write() since internal_write() is only called in
-         * the event that an lp event path is active, which isn't the case for
-         * logging attempts prior to console initialization.
-         *
-         * If there is already data queued for this port, send it prior to
-         * attempting to send any new data.
-         */
-        if (pi->used)
-                send_buffers(pi);
-
-        spin_lock_irqsave(&consolelock, flags);
-
-        viochar = vio_get_event_buffer(viomajorsubtype_chario);
-        if (viochar == NULL) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                hvlog("\n\rviocons: Can't get vio buffer in internal_write().");
-                return -EAGAIN;
-        }
-        initDataEvent(viochar, pi->lp);
-
-        curbuf = buf;
-        bleft = len;
-
-        while ((bleft > 0) && (pi->used == 0) &&
-               ((pi->seq - pi->ack) < VIOCHAR_WINDOW)) {
-                if (bleft > VIOCHAR_MAX_DATA)
-                        curlen = VIOCHAR_MAX_DATA;
-                else
-                        curlen = bleft;
-
-                viochar->event.xCorrelationToken = pi->seq++;
-                memcpy(viochar->data, curbuf, curlen);
-                viochar->len = curlen;
-                viochar->event.xSizeMinus1 =
-                    offsetof(struct viocharlpevent, data) + curlen;
-
-                hvrc = HvCallEvent_signalLpEvent(&viochar->event);
-                if (hvrc) {
-                        hvlog("viocons: error sending event! %d\n", (int)hvrc);
-                        goto out;
-                }
-                curbuf += curlen;
-                bleft -= curlen;
-        }
-
-        /* If we didn't send it all, buffer as much of it as we can. */
-        if (bleft > 0)
-                bleft -= buffer_add(pi, curbuf, bleft);
-out:
-        vio_free_event_buffer(viomajorsubtype_chario, viochar);
-        spin_unlock_irqrestore(&consolelock, flags);
-        return len - bleft;
-}
-
-static struct port_info *get_port_data(struct tty_struct *tty)
-{
-        unsigned long flags;
-        struct port_info *pi;
-
-        spin_lock_irqsave(&consolelock, flags);
-        if (tty) {
-                pi = (struct port_info *)tty->driver_data;
-                if (!pi || viotty_paranoia_check(pi, tty->name,
-                                             "get_port_data")) {
-                        pi = NULL;
-                }
-        } else
-                /*
-                 * If this is the console device, use the lp from
-                 * the first port entry
-                 */
-                pi = &port_info[0];
-        spin_unlock_irqrestore(&consolelock, flags);
-        return pi;
-}
-
-/*
- * Initialize the common fields in a charLpEvent
- */
-static void initDataEvent(struct viocharlpevent *viochar, HvLpIndex lp)
-{
-        struct HvLpEvent *hev = &viochar->event;
-
-        memset(viochar, 0, sizeof(struct viocharlpevent));
-
-        hev->flags = HV_LP_EVENT_VALID | HV_LP_EVENT_DEFERRED_ACK |
-                HV_LP_EVENT_INT;
-        hev->xType = HvLpEvent_Type_VirtualIo;
-        hev->xSubtype = viomajorsubtype_chario | viochardata;
-        hev->xSourceLp = HvLpConfig_getLpIndex();
-        hev->xTargetLp = lp;
-        hev->xSizeMinus1 = sizeof(struct viocharlpevent);
-        hev->xSourceInstanceId = viopath_sourceinst(lp);
-        hev->xTargetInstanceId = viopath_targetinst(lp);
-}
-
-/*
- * early console device write
- */
-static void viocons_write_early(struct console *co, const char *s, unsigned count)
-{
-        hvlogOutput(s, count);
-}
-
-/*
- * console device write
- */
-static void viocons_write(struct console *co, const char *s, unsigned count)
-{
-        int index;
-        int begin;
-        struct port_info *pi;
-
-        static const char cr = '\r';
-
-        /*
-         * Check port data first because the target LP might be valid but
-         * simply not active, in which case we want to hvlog the output.
-         */
-        pi = get_port_data(NULL);
-        if (pi == NULL) {
-                hvlog("\n\rviocons_write: unable to get port data.");
-                return;
-        }
-
-        hvlogOutput(s, count);
-
-        if (!viopath_isactive(pi->lp))
-                return;
-
-        /* 
-         * Any newline character found will cause a
-         * carriage return character to be emitted as well. 
-         */
-        begin = 0;
-        for (index = 0; index < count; index++) {
-                if (s[index] == '\n') {
-                        /* 
-                         * Newline found. Print everything up to and 
-                         * including the newline
-                         */
-                        internal_write(pi, &s[begin], index - begin + 1);
-                        begin = index + 1;
-                        /* Emit a carriage return as well */
-                        internal_write(pi, &cr, 1);
-                }
-        }
-
-        /* If any characters left to write, write them now */
-        if ((index - begin) > 0)
-                internal_write(pi, &s[begin], index - begin);
-}
-
-/*
- * Work out the device associate with this console
- */
-static struct tty_driver *viocons_device(struct console *c, int *index)
-{
-        *index = c->index;
-        return viotty_driver;
-}
-
-/*
- * console device I/O methods
- */
-static struct console viocons_early = {
-        .name = "viocons",
-        .write = viocons_write_early,
-        .flags = CON_PRINTBUFFER,
-        .index = -1,
-};
-
-static struct console viocons = {
-        .name = "viocons",
-        .write = viocons_write,
-        .device = viocons_device,
-        .flags = CON_PRINTBUFFER,
-        .index = -1,
-};
-
-/*
- * TTY Open method
- */
-static int viotty_open(struct tty_struct *tty, struct file *filp)
-{
-        int port;
-        unsigned long flags;
-        struct port_info *pi;
-
-        port = tty->index;
-
-        if ((port < 0) || (port >= VTTY_PORTS))
-                return -ENODEV;
-
-        spin_lock_irqsave(&consolelock, flags);
-
-        pi = &port_info[port];
-        /* If some other TTY is already connected here, reject the open */
-        if ((pi->tty) && (pi->tty != tty)) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                printk(VIOCONS_KERN_WARN
-                       "attempt to open device twice from different ttys\n");
-                return -EBUSY;
-        }
-        tty->driver_data = pi;
-        pi->tty = tty;
-        spin_unlock_irqrestore(&consolelock, flags);
-
-        return 0;
-}
-
-/*
- * TTY Close method
- */
-static void viotty_close(struct tty_struct *tty, struct file *filp)
-{
-        unsigned long flags;
-        struct port_info *pi;
-
-        spin_lock_irqsave(&consolelock, flags);
-        pi = (struct port_info *)tty->driver_data;
-
-        if (!pi || viotty_paranoia_check(pi, tty->name, "viotty_close")) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                return;
-        }
-        if (tty->count == 1)
-                pi->tty = NULL;
-        spin_unlock_irqrestore(&consolelock, flags);
-}
-
-/*
- * TTY Write method
- */
-static int viotty_write(struct tty_struct *tty, const unsigned char *buf,
-                int count)
-{
-        struct port_info *pi;
-
-        pi = get_port_data(tty);
-        if (pi == NULL) {
-                hvlog("\n\rviotty_write: no port data.");
-                return -ENODEV;
-        }
-
-        if (viochar_is_console(pi))
-                hvlogOutput(buf, count);
-
-        /*
-         * If the path to this LP is closed, don't bother doing anything more.
-         * just dump the data on the floor and return count.  For some reason
-         * some user level programs will attempt to probe available tty's and
-         * they'll attempt a viotty_write on an invalid port which maps to an
-         * invalid target lp.  If this is the case then ignore the
-         * viotty_write call and, since the viopath isn't active to this
-         * partition, return count.
-         */
-        if (!viopath_isactive(pi->lp))
-                return count;
-
-        return internal_write(pi, buf, count);
-}
-
-/*
- * TTY put_char method
- */
-static int viotty_put_char(struct tty_struct *tty, unsigned char ch)
-{
-        struct port_info *pi;
-
-        pi = get_port_data(tty);
-        if (pi == NULL)
-                return 0;
-
-        /* This will append '\r' as well if the char is '\n' */
-        if (viochar_is_console(pi))
-                hvlogOutput(&ch, 1);
-
-        if (viopath_isactive(pi->lp))
-                internal_write(pi, &ch, 1);
-        return 1;
-}
-
-/*
- * TTY write_room method
- */
-static int viotty_write_room(struct tty_struct *tty)
-{
-        int i;
-        int room = 0;
-        struct port_info *pi;
-        unsigned long flags;
-
-        spin_lock_irqsave(&consolelock, flags);
-        pi = (struct port_info *)tty->driver_data;
-        if (!pi || viotty_paranoia_check(pi, tty->name, "viotty_write_room")) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                return 0;
-        }
-
-        /* If no buffers are used, return the max size. */
-        if (pi->used == 0) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                return VIOCHAR_MAX_DATA * VIOCHAR_NUM_BUF;
-        }
-
-        /*
-         * We retain the spinlock because we want to get an accurate
-         * count and it can change on us between each operation if we
-         * don't hold the spinlock.
-         */
-        for (i = 0; ((i < VIOCHAR_NUM_BUF) && (room < VIOCHAR_MAX_DATA)); i++)
-                room += (VIOCHAR_MAX_DATA - pi->bufferBytes[i]);
-        spin_unlock_irqrestore(&consolelock, flags);
-
-        if (room > VIOCHAR_MAX_DATA)
-                room = VIOCHAR_MAX_DATA;
-        return room;
-}
-
-/*
- * TTY chars_in_buffer method
- */
-static int viotty_chars_in_buffer(struct tty_struct *tty)
-{
-        return 0;
-}
-
-static int viotty_ioctl(struct tty_struct *tty, struct file *file,
-                        unsigned int cmd, unsigned long arg)
-{
-        switch (cmd) {
-        /*
-         * the ioctls below read/set the flags usually shown in the leds
-         * don't use them - they will go away without warning
-         */
-        case KDGETLED:
-        case KDGKBLED:
-                return put_user(0, (char *)arg);
-
-        case KDSKBLED:
-                return 0;
-        }
-        /* FIXME: WTF is this being called for ??? */
-        lock_kernel();
-        ret =  n_tty_ioctl(tty, file, cmd, arg);
-        unlock_kernel();
-        return ret;
-}
-
-/*
- * Handle an open charLpEvent.  Could be either interrupt or ack
- */
-static void vioHandleOpenEvent(struct HvLpEvent *event)
-{
-        unsigned long flags;
-        struct viocharlpevent *cevent = (struct viocharlpevent *)event;
-        u8 port = cevent->virtual_device;
-        struct port_info *pi;
-        int reject = 0;
-
-        if (hvlpevent_is_ack(event)) {
-                if (port >= VTTY_PORTS)
-                        return;
-
-                spin_lock_irqsave(&consolelock, flags);
-                /* Got the lock, don't cause console output */
-
-                pi = &port_info[port];
-                if (event->xRc == HvLpEvent_Rc_Good) {
-                        pi->seq = pi->ack = 0;
-                        /*
-                         * This line allows connections from the primary
-                         * partition but once one is connected from the
-                         * primary partition nothing short of a reboot
-                         * of linux will allow access from the hosting
-                         * partition again without a required iSeries fix.
-                         */
-                        pi->lp = event->xTargetLp;
-                }
-
-                spin_unlock_irqrestore(&consolelock, flags);
-                if (event->xRc != HvLpEvent_Rc_Good)
-                        printk(VIOCONS_KERN_WARN
-                               "handle_open_event: event->xRc == (%d).\n",
-                               event->xRc);
-
-                if (event->xCorrelationToken != 0) {
-                        atomic_t *aptr= (atomic_t *)event->xCorrelationToken;
-                        atomic_set(aptr, 1);
-                } else
-                        printk(VIOCONS_KERN_WARN
-                               "weird...got open ack without atomic\n");
-                return;
-        }
-
-        /* This had better require an ack, otherwise complain */
-        if (!hvlpevent_need_ack(event)) {
-                printk(VIOCONS_KERN_WARN "viocharopen without ack bit!\n");
-                return;
-        }
-
-        spin_lock_irqsave(&consolelock, flags);
-        /* Got the lock, don't cause console output */
-
-        /* Make sure this is a good virtual tty */
-        if (port >= VTTY_PORTS) {
-                event->xRc = HvLpEvent_Rc_SubtypeError;
-                cevent->subtype_result_code = viorc_openRejected;
-                /*
-                 * Flag state here since we can't printk while holding
-                 * a spinlock.
-                 */
-                reject = 1;
-        } else {
-                pi = &port_info[port];
-                if ((pi->lp != HvLpIndexInvalid) &&
-                                (pi->lp != event->xSourceLp)) {
-                        /*
-                         * If this is tty is already connected to a different
-                         * partition, fail.
-                         */
-                        event->xRc = HvLpEvent_Rc_SubtypeError;
-                        cevent->subtype_result_code = viorc_openRejected;
-                        reject = 2;
-                } else {
-                        pi->lp = event->xSourceLp;
-                        event->xRc = HvLpEvent_Rc_Good;
-                        cevent->subtype_result_code = viorc_good;
-                        pi->seq = pi->ack = 0;
-                        reject = 0;
-                }
-        }
-
-        spin_unlock_irqrestore(&consolelock, flags);
-
-        if (reject == 1)
-                printk(VIOCONS_KERN_WARN "open rejected: bad virtual tty.\n");
-        else if (reject == 2)
-                printk(VIOCONS_KERN_WARN
-                        "open rejected: console in exclusive use by another partition.\n");
-
-        /* Return the acknowledgement */
-        HvCallEvent_ackLpEvent(event);
-}
-
-/*
- * Handle a close charLpEvent.  This should ONLY be an Interrupt because the
- * virtual console should never actually issue a close event to the hypervisor
- * because the virtual console never goes away.  A close event coming from the
- * hypervisor simply means that there are no client consoles connected to the
- * virtual console.
- *
- * Regardless of the number of connections masqueraded on the other side of
- * the hypervisor ONLY ONE close event should be called to accompany the ONE
- * open event that is called.  The close event should ONLY be called when NO
- * MORE connections (masqueraded or not) exist on the other side of the
- * hypervisor.
- */
-static void vioHandleCloseEvent(struct HvLpEvent *event)
-{
-        unsigned long flags;
-        struct viocharlpevent *cevent = (struct viocharlpevent *)event;
-        u8 port = cevent->virtual_device;
-
-        if (hvlpevent_is_int(event)) {
-                if (port >= VTTY_PORTS) {
-                        printk(VIOCONS_KERN_WARN
-                                        "close message from invalid virtual device.\n");
-                        return;
-                }
-
-                /* For closes, just mark the console partition invalid */
-                spin_lock_irqsave(&consolelock, flags);
-                /* Got the lock, don't cause console output */
-
-                if (port_info[port].lp == event->xSourceLp)
-                        port_info[port].lp = HvLpIndexInvalid;
-
-                spin_unlock_irqrestore(&consolelock, flags);
-                printk(VIOCONS_KERN_INFO "close from %d\n", event->xSourceLp);
-        } else
-                printk(VIOCONS_KERN_WARN
-                                "got unexpected close acknowlegement\n");
-}
-
-/*
- * Handle a config charLpEvent.  Could be either interrupt or ack
- */
-static void vioHandleConfig(struct HvLpEvent *event)
-{
-        struct viocharlpevent *cevent = (struct viocharlpevent *)event;
-
-        HvCall_writeLogBuffer(cevent->data, cevent->len);
-
-        if (cevent->data[0] == 0x01)
-                printk(VIOCONS_KERN_INFO "window resized to %d: %d: %d: %d\n",
-                       cevent->data[1], cevent->data[2],
-                       cevent->data[3], cevent->data[4]);
-        else
-                printk(VIOCONS_KERN_WARN "unknown config event\n");
-}
-
-/*
- * Handle a data charLpEvent. 
- */
-static void vioHandleData(struct HvLpEvent *event)
-{
-        struct tty_struct *tty;
-        unsigned long flags;
-        struct viocharlpevent *cevent = (struct viocharlpevent *)event;
-        struct port_info *pi;
-        int index;
-        int num_pushed;
-        u8 port = cevent->virtual_device;
-
-        if (port >= VTTY_PORTS) {
-                printk(VIOCONS_KERN_WARN "data on invalid virtual device %d\n",
-                                port);
-                return;
-        }
-
-        /*
-         * Hold the spinlock so that we don't take an interrupt that
-         * changes tty between the time we fetch the port_info
-         * pointer and the time we paranoia check.
-         */
-        spin_lock_irqsave(&consolelock, flags);
-        pi = &port_info[port];
-
-        /*
-         * Change 05/01/2003 - Ryan Arnold: If a partition other than
-         * the current exclusive partition tries to send us data
-         * events then just drop them on the floor because we don't
-         * want his stinking data.  He isn't authorized to receive
-         * data because he wasn't the first one to get the console,
-         * therefore he shouldn't be allowed to send data either.
-         * This will work without an iSeries fix.
-         */
-        if (pi->lp != event->xSourceLp) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                return;
-        }
-
-        tty = pi->tty;
-        if (tty == NULL) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                printk(VIOCONS_KERN_WARN "no tty for virtual device %d\n",
-                                port);
-                return;
-        }
-
-        if (tty->magic != TTY_MAGIC) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                printk(VIOCONS_KERN_WARN "tty bad magic\n");
-                return;
-        }
-
-        /*
-         * Just to be paranoid, make sure the tty points back to this port
-         */
-        pi = (struct port_info *)tty->driver_data;
-        if (!pi || viotty_paranoia_check(pi, tty->name, "vioHandleData")) {
-                spin_unlock_irqrestore(&consolelock, flags);
-                return;
-        }
-        spin_unlock_irqrestore(&consolelock, flags);
-
-        /*
-         * Change 07/21/2003 - Ryan Arnold: functionality added to
-         * support sysrq utilizing ^O as the sysrq key.  The sysrq
-         * functionality will only work if built into the kernel and
-         * then only if sysrq is enabled through the proc filesystem.
-         */
-        num_pushed = 0;
-        for (index = 0; index < cevent->len; index++) {
-                /*
-                 * Will be optimized away if !CONFIG_MAGIC_SYSRQ:
-                 */
-                if (sysrq_on()) {
-                        /* 0x0f is the ascii character for ^O */
-                        if (cevent->data[index] == '\x0f') {
-                                vio_sysrq_pressed = 1;
-                                /*
-                                 * continue because we don't want to add
-                                 * the sysrq key into the data string.
-                                 */
-                                continue;
-                        } else if (vio_sysrq_pressed) {
-                                handle_sysrq(cevent->data[index], tty);
-                                vio_sysrq_pressed = 0;
-                                /*
-                                 * continue because we don't want to add
-                                 * the sysrq sequence into the data string.
-                                 */
-                                continue;
-                        }
-                }
-                /*
-                 * The sysrq sequence isn't included in this check if
-                 * sysrq is enabled and compiled into the kernel because
-                 * the sequence will never get inserted into the buffer.
-                 * Don't attempt to copy more data into the buffer than we
-                 * have room for because it would fail without indication.
-                 */
-                if(tty_insert_flip_char(tty, cevent->data[index], TTY_NORMAL) == 0) {
-                        printk(VIOCONS_KERN_WARN "input buffer overflow!\n");
-                        break;
-                }
-                num_pushed++;
-        }
-
-        if (num_pushed)
-                tty_flip_buffer_push(tty);
-}
-
-/*
- * Handle an ack charLpEvent. 
- */
-static void vioHandleAck(struct HvLpEvent *event)
-{
-        struct viocharlpevent *cevent = (struct viocharlpevent *)event;
-        unsigned long flags;
-        u8 port = cevent->virtual_device;
-
-        if (port >= VTTY_PORTS) {
-                printk(VIOCONS_KERN_WARN "data on invalid virtual device\n");
-                return;
-        }
-
-        spin_lock_irqsave(&consolelock, flags);
-        port_info[port].ack = event->xCorrelationToken;
-        spin_unlock_irqrestore(&consolelock, flags);
-
-        if (port_info[port].used)
-                send_buffers(&port_info[port]);
-}
-
-/*
- * Handle charLpEvents and route to the appropriate routine
- */
-static void vioHandleCharEvent(struct HvLpEvent *event)
-{
-        int charminor;
-
-        if (event == NULL)
-                return;
-
-        charminor = event->xSubtype & VIOMINOR_SUBTYPE_MASK;
-        switch (charminor) {
-        case viocharopen:
-                vioHandleOpenEvent(event);
-                break;
-        case viocharclose:
-                vioHandleCloseEvent(event);
-                break;
-        case viochardata:
-                vioHandleData(event);
-                break;
-        case viocharack:
-                vioHandleAck(event);
-                break;
-        case viocharconfig:
-                vioHandleConfig(event);
-                break;
-        default:
-                if (hvlpevent_is_int(event) && hvlpevent_need_ack(event)) {
-                        event->xRc = HvLpEvent_Rc_InvalidSubtype;
-                        HvCallEvent_ackLpEvent(event);
-                }
-        }
-}
-
-/*
- * Send an open event
- */
-static int send_open(HvLpIndex remoteLp, void *sem)
-{
-        return HvCallEvent_signalLpEventFast(remoteLp,
-                        HvLpEvent_Type_VirtualIo,
-                        viomajorsubtype_chario | viocharopen,
-                        HvLpEvent_AckInd_DoAck, HvLpEvent_AckType_ImmediateAck,
-                        viopath_sourceinst(remoteLp),
-                        viopath_targetinst(remoteLp),
-                        (u64)(unsigned long)sem, VIOVERSION << 16,
-                        0, 0, 0, 0);
-}
-
-static const struct tty_operations serial_ops = {
-        .open = viotty_open,
-        .close = viotty_close,
-        .write = viotty_write,
-        .put_char = viotty_put_char,
-        .write_room = viotty_write_room,
-        .chars_in_buffer = viotty_chars_in_buffer,
-        .ioctl = viotty_ioctl,
-};
-
-static int __init viocons_init2(void)
-{
-        atomic_t wait_flag;
-        int rc;
-
-        if (!firmware_has_feature(FW_FEATURE_ISERIES))
-                return -ENODEV;
-
-        /* +2 for fudge */
-        rc = viopath_open(HvLpConfig_getPrimaryLpIndex(),
-                        viomajorsubtype_chario, VIOCHAR_WINDOW + 2);
-        if (rc)
-                printk(VIOCONS_KERN_WARN "error opening to primary %d\n", rc);
-
-        if (viopath_hostLp == HvLpIndexInvalid)
-                vio_set_hostlp();
-
-        /*
-         * And if the primary is not the same as the hosting LP, open to the 
-         * hosting lp
-         */
-        if ((viopath_hostLp != HvLpIndexInvalid) &&
-            (viopath_hostLp != HvLpConfig_getPrimaryLpIndex())) {
-                printk(VIOCONS_KERN_INFO "open path to hosting (%d)\n",
-                                viopath_hostLp);
-                rc = viopath_open(viopath_hostLp, viomajorsubtype_chario,
-                                VIOCHAR_WINDOW + 2);    /* +2 for fudge */
-                if (rc)
-                        printk(VIOCONS_KERN_WARN
-                                "error opening to partition %d: %d\n",
-                                viopath_hostLp, rc);
-        }
-
-        if (vio_setHandler(viomajorsubtype_chario, vioHandleCharEvent) < 0)
-                printk(VIOCONS_KERN_WARN
-                                "error seting handler for console events!\n");
-
-        /*
-         * First, try to open the console to the hosting lp.
-         * Wait on a semaphore for the response.
-         */
-        atomic_set(&wait_flag, 0);
-        if ((viopath_isactive(viopath_hostLp)) &&
-            (send_open(viopath_hostLp, (void *)&wait_flag) == 0)) {
-                printk(VIOCONS_KERN_INFO "hosting partition %d\n",
-                        viopath_hostLp);
-                while (atomic_read(&wait_flag) == 0)
-                        mb();
-                atomic_set(&wait_flag, 0);
-        }
-
-        /*
-         * If we don't have an active console, try the primary
-         */
-        if ((!viopath_isactive(port_info[0].lp)) &&
-            (viopath_isactive(HvLpConfig_getPrimaryLpIndex())) &&
-            (send_open(HvLpConfig_getPrimaryLpIndex(), (void *)&wait_flag)
-             == 0)) {
-                printk(VIOCONS_KERN_INFO "opening console to primary partition\n");
-                while (atomic_read(&wait_flag) == 0)
-                        mb();
-        }
-
-        /* Initialize the tty_driver structure */
-        viotty_driver = alloc_tty_driver(VTTY_PORTS);
-        viotty_driver->owner = THIS_MODULE;
-        viotty_driver->driver_name = "vioconsole";
-        viotty_driver->name = "tty";
-        viotty_driver->name_base = 1;
-        viotty_driver->major = TTY_MAJOR;
-        viotty_driver->minor_start = 1;
-        viotty_driver->type = TTY_DRIVER_TYPE_CONSOLE;
-        viotty_driver->subtype = 1;
-        viotty_driver->init_termios = tty_std_termios;
-        viotty_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_RESET_TERMIOS;
-        tty_set_operations(viotty_driver, &serial_ops);
-
-        if (tty_register_driver(viotty_driver)) {
-                printk(VIOCONS_KERN_WARN "couldn't register console driver\n");
-                put_tty_driver(viotty_driver);
-                viotty_driver = NULL;
-        }
-
-        unregister_console(&viocons_early);
-        register_console(&viocons);
-
-        return 0;
-}
-
-static int __init viocons_init(void)
-{
-        int i;
-
-        if (!firmware_has_feature(FW_FEATURE_ISERIES))
-                return -ENODEV;
-
-        printk(VIOCONS_KERN_INFO "registering console\n");
-        for (i = 0; i < VTTY_PORTS; i++) {
-                port_info[i].lp = HvLpIndexInvalid;
-                port_info[i].magic = VIOTTY_MAGIC;
-        }
-        HvCall_setLogBufferFormatAndCodepage(HvCall_LogBuffer_ASCII, 437);
-        add_preferred_console("viocons", 0, NULL);
-        register_console(&viocons_early);
-        return 0;
-}
-
-console_initcall(viocons_init);
-module_init(viocons_init2);
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index 1bc00c9d860d..60359c360912 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -803,7 +803,25 @@ static inline int resize_screen(struct vc_data *vc, int width, int height,
  */
 #define VC_RESIZE_MAXCOL (32767)
 #define VC_RESIZE_MAXROW (32767)
-int vc_resize(struct vc_data *vc, unsigned int cols, unsigned int lines)
+
+/**
+ *      vc_do_resize    -       resizing method for the tty
+ *      @tty: tty being resized
+ *      @real_tty: real tty (different to tty if a pty/tty pair)
+ *      @vc: virtual console private data
+ *      @cols: columns
+ *      @lines: lines
+ *
+ *      Resize a virtual console, clipping according to the actual constraints.
+ *      If the caller passes a tty structure then update the termios winsize
+ *      information and perform any neccessary signal handling.
+ *
+ *      Caller must hold the console semaphore. Takes the termios mutex and
+ *      ctrl_lock of the tty IFF a tty is passed.
+ */
+
+static int vc_do_resize(struct tty_struct *tty, struct tty_struct *real_tty,
+                struct vc_data *vc, unsigned int cols, unsigned int lines)
 {
         unsigned long old_origin, new_origin, new_scr_end, rlth, rrem, err = 0;
         unsigned int old_cols, old_rows, old_row_size, old_screen_size;
@@ -907,24 +925,15 @@ int vc_resize(struct vc_data *vc, unsigned int cols, unsigned int lines)
         gotoxy(vc, vc->vc_x, vc->vc_y);
         save_cur(vc);
 
-        if (vc->vc_tty) {
-                struct winsize ws, *cws = &vc->vc_tty->winsize;
-                struct pid *pgrp = NULL;
-
+        if (tty) {
+                /* Rewrite the requested winsize data with the actual
+                   resulting sizes */
+                struct winsize ws;
                 memset(&ws, 0, sizeof(ws));
                 ws.ws_row = vc->vc_rows;
                 ws.ws_col = vc->vc_cols;
                 ws.ws_ypixel = vc->vc_scan_lines;
-
-                spin_lock_irq(&vc->vc_tty->ctrl_lock);
-                if ((ws.ws_row != cws->ws_row || ws.ws_col != cws->ws_col))
-                        pgrp = get_pid(vc->vc_tty->pgrp);
-                spin_unlock_irq(&vc->vc_tty->ctrl_lock);
-                if (pgrp) {
-                        kill_pgrp(vc->vc_tty->pgrp, SIGWINCH, 1);
-                        put_pid(pgrp);
-                }
-                *cws = ws;
+                tty_do_resize(tty, real_tty, &ws);
         }
 
         if (CON_IS_VISIBLE(vc))
@@ -932,14 +941,47 @@ int vc_resize(struct vc_data *vc, unsigned int cols, unsigned int lines)
         return err;
 }
 
-int vc_lock_resize(struct vc_data *vc, unsigned int cols, unsigned int lines)
+/**
+ *      vc_resize               -       resize a VT
+ *      @vc: virtual console
+ *      @cols: columns
+ *      @rows: rows
+ *
+ *      Resize a virtual console as seen from the console end of things. We
+ *      use the common vc_do_resize methods to update the structures. The
+ *      caller must hold the console sem to protect console internals and
+ *      vc->vc_tty
+ */
+
+int vc_resize(struct vc_data *vc, unsigned int cols, unsigned int rows)
+{
+        return vc_do_resize(vc->vc_tty, vc->vc_tty, vc, cols, rows);
+}
+
+/**
+ *      vt_resize               -       resize a VT
+ *      @tty: tty to resize
+ *      @real_tty: tty if a pty/tty pair
+ *      @ws: winsize attributes
+ *
+ *      Resize a virtual terminal. This is called by the tty layer as we
+ *      register our own handler for resizing. The mutual helper does all
+ *      the actual work.
+ *
+ *      Takes the console sem and the called methods then take the tty
+ *      termios_mutex and the tty ctrl_lock in that order.
+ */
+
+int vt_resize(struct tty_struct *tty, struct tty_struct *real_tty,
+        struct winsize *ws)
 {
-        int rc;
+        struct vc_data *vc = tty->driver_data;
+        int ret;
 
         acquire_console_sem();
-        rc = vc_resize(vc, cols, lines);
+        ret = vc_do_resize(tty, real_tty, vc, ws->ws_col, ws->ws_row);
         release_console_sem();
-        return rc;
+        return ret;
 }
 
 void vc_deallocate(unsigned int currcons)
@@ -2907,6 +2949,7 @@ static const struct tty_operations con_ops = {
         .start = con_start,
         .throttle = con_throttle,
         .unthrottle = con_unthrottle,
+        .resize = vt_resize,
 };
 
 int __init vty_init(void)
@@ -4061,7 +4104,6 @@ EXPORT_SYMBOL(default_blu);
 EXPORT_SYMBOL(update_region);
 EXPORT_SYMBOL(redraw_screen);
 EXPORT_SYMBOL(vc_resize);
-EXPORT_SYMBOL(vc_lock_resize);
 EXPORT_SYMBOL(fg_console);
 EXPORT_SYMBOL(console_blank_hook);
 EXPORT_SYMBOL(console_blanked);
diff --git a/drivers/char/vt_ioctl.c b/drivers/char/vt_ioctl.c
index 3211afd9d57e..c904e9ad4a71 100644
--- a/drivers/char/vt_ioctl.c
+++ b/drivers/char/vt_ioctl.c
@@ -947,14 +947,16 @@ int vt_ioctl(struct tty_struct *tty, struct file * file,
                     get_user(cc, &vtsizes->v_cols))
                         ret = -EFAULT;
                 else {
+                        acquire_console_sem();
                         for (i = 0; i < MAX_NR_CONSOLES; i++) {
                                 vc = vc_cons[i].d;
 
                                 if (vc) {
                                         vc->vc_resize_user = 1;
-                                        vc_lock_resize(vc_cons[i].d, cc, ll);
+                                        vc_resize(vc_cons[i].d, cc, ll);
                                 }
                         }
+                        release_console_sem();
                 }
                 break;
         }
diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.c b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
index 8bfee5fb7223..278c9857bcf5 100644
--- a/drivers/char/xilinx_hwicap/xilinx_hwicap.c
+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
@@ -74,7 +74,6 @@
  * currently programmed in the FPGA.
  */
 
-#include <linux/version.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c
index fe565ee43757..ac0bbf2d234f 100644
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -333,7 +333,7 @@ static void dbs_check_cpu(int cpu)
 {
         unsigned int idle_ticks, up_idle_ticks, down_idle_ticks;
         unsigned int tmp_idle_ticks, total_idle_ticks;
-        unsigned int freq_step;
+        unsigned int freq_target;
         unsigned int freq_down_sampling_rate;
         struct cpu_dbs_info_s *this_dbs_info = &per_cpu(cpu_dbs_info, cpu);
         struct cpufreq_policy *policy;
@@ -383,13 +383,13 @@ static void dbs_check_cpu(int cpu)
                 if (this_dbs_info->requested_freq == policy->max)
                         return;
 
-                freq_step = (dbs_tuners_ins.freq_step * policy->max) / 100;
+                freq_target = (dbs_tuners_ins.freq_step * policy->max) / 100;
 
                 /* max freq cannot be less than 100. But who knows.... */
-                if (unlikely(freq_step == 0))
-                        freq_step = 5;
+                if (unlikely(freq_target == 0))
+                        freq_target = 5;
 
-                this_dbs_info->requested_freq += freq_step;
+                this_dbs_info->requested_freq += freq_target;
                 if (this_dbs_info->requested_freq > policy->max)
                         this_dbs_info->requested_freq = policy->max;
 
@@ -425,19 +425,19 @@ static void dbs_check_cpu(int cpu)
                 /*
                  * if we are already at the lowest speed then break out early
                  * or if we 'cannot' reduce the speed as the user might want
-                 * freq_step to be zero
+                 * freq_target to be zero
                  */
                 if (this_dbs_info->requested_freq == policy->min
                                 || dbs_tuners_ins.freq_step == 0)
                         return;
 
-                freq_step = (dbs_tuners_ins.freq_step * policy->max) / 100;
+                freq_target = (dbs_tuners_ins.freq_step * policy->max) / 100;
 
                 /* max freq cannot be less than 100. But who knows.... */
-                if (unlikely(freq_step == 0))
-                        freq_step = 5;
+                if (unlikely(freq_target == 0))
+                        freq_target = 5;
 
-                this_dbs_info->requested_freq -= freq_step;
+                this_dbs_info->requested_freq -= freq_target;
                 if (this_dbs_info->requested_freq < policy->min)
                         this_dbs_info->requested_freq = policy->min;
 
diff --git a/drivers/cpuidle/governors/ladder.c b/drivers/cpuidle/governors/ladder.c
index ba7b9a6b17a1..a4bec3f919aa 100644
--- a/drivers/cpuidle/governors/ladder.c
+++ b/drivers/cpuidle/governors/ladder.c
@@ -67,10 +67,17 @@ static int ladder_select_state(struct cpuidle_device *dev)
         struct ladder_device *ldev = &__get_cpu_var(ladder_devices);
         struct ladder_device_state *last_state;
         int last_residency, last_idx = ldev->last_state_idx;
+        int latency_req = pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY);
 
         if (unlikely(!ldev))
                 return 0;
 
+        /* Special case when user has set very strict latency requirement */
+        if (unlikely(latency_req == 0)) {
+                ladder_do_selection(ldev, last_idx, 0);
+                return 0;
+        }
+
         last_state = &ldev->states[last_idx];
 
         if (dev->states[last_idx].flags & CPUIDLE_FLAG_TIME_VALID)
@@ -81,8 +88,7 @@ static int ladder_select_state(struct cpuidle_device *dev)
         /* consider promotion */
         if (last_idx < dev->state_count - 1 &&
             last_residency > last_state->threshold.promotion_time &&
-            dev->states[last_idx + 1].exit_latency <=
-                        pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
+            dev->states[last_idx + 1].exit_latency <= latency_req) {
                 last_state->stats.promotion_count++;
                 last_state->stats.demotion_count = 0;
                 if (last_state->stats.promotion_count >= last_state->threshold.promotion_count) {
@@ -92,7 +98,19 @@ static int ladder_select_state(struct cpuidle_device *dev)
         }
 
         /* consider demotion */
-        if (last_idx > 0 &&
+        if (last_idx > CPUIDLE_DRIVER_STATE_START &&
+            dev->states[last_idx].exit_latency > latency_req) {
+                int i;
+
+                for (i = last_idx - 1; i > CPUIDLE_DRIVER_STATE_START; i--) {
+                        if (dev->states[i].exit_latency <= latency_req)
+                                break;
+                }
+                ladder_do_selection(ldev, last_idx, i);
+                return i;
+        }
+
+        if (last_idx > CPUIDLE_DRIVER_STATE_START &&
             last_residency < last_state->threshold.demotion_time) {
                 last_state->stats.demotion_count++;
                 last_state->stats.promotion_count = 0;
@@ -117,7 +135,7 @@ static int ladder_enable_device(struct cpuidle_device *dev)
         struct ladder_device_state *lstate;
         struct cpuidle_state *state;
 
-        ldev->last_state_idx = 0;
+        ldev->last_state_idx = CPUIDLE_DRIVER_STATE_START;
 
         for (i = 0; i < dev->state_count; i++) {
                 state = &dev->states[i];
diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index 78d77c5dc35c..8d7cf3f31450 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c
@@ -34,21 +34,28 @@ static DEFINE_PER_CPU(struct menu_device, menu_devices);
 static int menu_select(struct cpuidle_device *dev)
 {
         struct menu_device *data = &__get_cpu_var(menu_devices);
+        int latency_req = pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY);
         int i;
 
+        /* Special case when user has set very strict latency requirement */
+        if (unlikely(latency_req == 0)) {
+                data->last_state_idx = 0;
+                return 0;
+        }
+
         /* determine the expected residency time */
         data->expected_us =
                 (u32) ktime_to_ns(tick_nohz_get_sleep_length()) / 1000;
 
         /* find the deepest idle state that satisfies our constraints */
-        for (i = 1; i < dev->state_count; i++) {
+        for (i = CPUIDLE_DRIVER_STATE_START + 1; i < dev->state_count; i++) {
                 struct cpuidle_state *s = &dev->states[i];
 
                 if (s->target_residency > data->expected_us)
                         break;
                 if (s->target_residency > data->predicted_us)
                         break;
-                if (s->exit_latency > pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY))
+                if (s->exit_latency > latency_req)
                         break;
         }
 
@@ -67,9 +74,9 @@ static void menu_reflect(struct cpuidle_device *dev)
 {
         struct menu_device *data = &__get_cpu_var(menu_devices);
         int last_idx = data->last_state_idx;
-        unsigned int measured_us =
-                cpuidle_get_last_residency(dev) + data->elapsed_us;
+        unsigned int last_idle_us = cpuidle_get_last_residency(dev);
         struct cpuidle_state *target = &dev->states[last_idx];
+        unsigned int measured_us;
 
         /*
          * Ugh, this idle state doesn't support residency measurements, so we
@@ -77,20 +84,27 @@ static void menu_reflect(struct cpuidle_device *dev)
          * for one full standard timer tick.  However, be aware that this
          * could potentially result in a suboptimal state transition.
          */
-        if (!(target->flags & CPUIDLE_FLAG_TIME_VALID))
-                measured_us = USEC_PER_SEC / HZ;
+        if (unlikely(!(target->flags & CPUIDLE_FLAG_TIME_VALID)))
+                last_idle_us = USEC_PER_SEC / HZ;
+
+        /*
+         * measured_us and elapsed_us are the cumulative idle time, since the
+         * last time we were woken out of idle by an interrupt.
+         */
+        if (data->elapsed_us <= data->elapsed_us + last_idle_us)
+                measured_us = data->elapsed_us + last_idle_us;
+        else
+                measured_us = -1;
+
+        /* Predict time until next break event */
+        data->predicted_us = max(measured_us, data->last_measured_us);
 
-        /* Predict time remaining until next break event */
-        if (measured_us + BREAK_FUZZ < data->expected_us - target->exit_latency) {
-                data->predicted_us = max(measured_us, data->last_measured_us);
+        if (last_idle_us + BREAK_FUZZ <
+            data->expected_us - target->exit_latency) {
                 data->last_measured_us = measured_us;
                 data->elapsed_us = 0;
         } else {
-                if (data->elapsed_us < data->elapsed_us + measured_us)
-                        data->elapsed_us = measured_us;
-                else
-                        data->elapsed_us = -1;
-                data->predicted_us = max(measured_us, data->last_measured_us);
+                data->elapsed_us = measured_us;
         }
 }
 
diff --git a/drivers/cpuidle/sysfs.c b/drivers/cpuidle/sysfs.c
index 31a0e0b455b6..97b003839fb6 100644
--- a/drivers/cpuidle/sysfs.c
+++ b/drivers/cpuidle/sysfs.c
@@ -21,8 +21,8 @@ static int __init cpuidle_sysfs_setup(char *unused)
 }
 __setup("cpuidle_sysfs_switch", cpuidle_sysfs_setup);
 
-static ssize_t show_available_governors(struct sys_device *dev,
-                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_available_governors(struct sysdev_class *class,
+                                        char *buf)
 {
         ssize_t i = 0;
         struct cpuidle_governor *tmp;
@@ -40,8 +40,8 @@ out:
         return i;
 }
 
-static ssize_t show_current_driver(struct sys_device *dev,
-                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_current_driver(struct sysdev_class *class,
+                                   char *buf)
 {
         ssize_t ret;
 
@@ -55,8 +55,8 @@ static ssize_t show_current_driver(struct sys_device *dev,
         return ret;
 }
 
-static ssize_t show_current_governor(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t show_current_governor(struct sysdev_class *class,
+                                     char *buf)
 {
         ssize_t ret;
 
@@ -70,9 +70,8 @@ static ssize_t show_current_governor(struct sys_device *dev,
         return ret;
 }
 
-static ssize_t store_current_governor(struct sys_device *dev,
-        struct sysdev_attribute *attr,
-        const char *buf, size_t count)
+static ssize_t store_current_governor(struct sysdev_class *class,
+                                      const char *buf, size_t count)
 {
         char gov_name[CPUIDLE_NAME_LEN];
         int ret = -EINVAL;
@@ -104,8 +103,9 @@ static ssize_t store_current_governor(struct sys_device *dev,
                 return count;
 }
 
-static SYSDEV_ATTR(current_driver, 0444, show_current_driver, NULL);
-static SYSDEV_ATTR(current_governor_ro, 0444, show_current_governor, NULL);
+static SYSDEV_CLASS_ATTR(current_driver, 0444, show_current_driver, NULL);
+static SYSDEV_CLASS_ATTR(current_governor_ro, 0444, show_current_governor,
+                         NULL);
 
 static struct attribute *cpuclass_default_attrs[] = {
         &attr_current_driver.attr,
@@ -113,9 +113,10 @@ static struct attribute *cpuclass_default_attrs[] = {
         NULL
 };
 
-static SYSDEV_ATTR(available_governors, 0444, show_available_governors, NULL);
-static SYSDEV_ATTR(current_governor, 0644, show_current_governor,
-        store_current_governor);
+static SYSDEV_CLASS_ATTR(available_governors, 0444, show_available_governors,
+                         NULL);
+static SYSDEV_CLASS_ATTR(current_governor, 0644, show_current_governor,
+                         store_current_governor);
 
 static struct attribute *cpuclass_switch_attrs[] = {
         &attr_available_governors.attr,
diff --git a/drivers/crypto/ixp4xx_crypto.c b/drivers/crypto/ixp4xx_crypto.c
index 42a107fe9233..2d637e0fbc03 100644
--- a/drivers/crypto/ixp4xx_crypto.c
+++ b/drivers/crypto/ixp4xx_crypto.c
@@ -27,8 +27,8 @@
 #include <crypto/authenc.h>
 #include <crypto/scatterwalk.h>
 
-#include <asm/arch/npe.h>
-#include <asm/arch/qmgr.h>
+#include <mach/npe.h>
+#include <mach/qmgr.h>
 
 #define MAX_KEYLEN 32
 
diff --git a/drivers/crypto/padlock-aes.c b/drivers/crypto/padlock-aes.c
index 54a2a166e566..bf2917d197a0 100644
--- a/drivers/crypto/padlock-aes.c
+++ b/drivers/crypto/padlock-aes.c
@@ -16,6 +16,7 @@
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <asm/byteorder.h>
+#include <asm/i387.h>
 #include "padlock.h"
 
 /* Control word. */
@@ -141,6 +142,12 @@ static inline void padlock_reset_key(void)
         asm volatile ("pushfl; popfl");
 }
 
+/*
+ * While the padlock instructions don't use FP/SSE registers, they
+ * generate a spurious DNA fault when cr0.ts is '1'. These instructions
+ * should be used only inside the irq_ts_save/restore() context
+ */
+
 static inline void padlock_xcrypt(const u8 *input, u8 *output, void *key,
                                   void *control_word)
 {
@@ -205,15 +212,23 @@ static inline u8 *padlock_xcrypt_cbc(const u8 *input, u8 *output, void *key,
 static void aes_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
 {
         struct aes_ctx *ctx = aes_ctx(tfm);
+        int ts_state;
         padlock_reset_key();
+
+        ts_state = irq_ts_save();
         aes_crypt(in, out, ctx->E, &ctx->cword.encrypt);
+        irq_ts_restore(ts_state);
 }
 
 static void aes_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
 {
         struct aes_ctx *ctx = aes_ctx(tfm);
+        int ts_state;
         padlock_reset_key();
+
+        ts_state = irq_ts_save();
         aes_crypt(in, out, ctx->D, &ctx->cword.decrypt);
+        irq_ts_restore(ts_state);
 }
 
 static struct crypto_alg aes_alg = {
@@ -244,12 +259,14 @@ static int ecb_aes_encrypt(struct blkcipher_desc *desc,
         struct aes_ctx *ctx = blk_aes_ctx(desc->tfm);
         struct blkcipher_walk walk;
         int err;
+        int ts_state;
 
         padlock_reset_key();
 
         blkcipher_walk_init(&walk, dst, src, nbytes);
         err = blkcipher_walk_virt(desc, &walk);
 
+        ts_state = irq_ts_save();
         while ((nbytes = walk.nbytes)) {
                 padlock_xcrypt_ecb(walk.src.virt.addr, walk.dst.virt.addr,
                                    ctx->E, &ctx->cword.encrypt,
@@ -257,6 +274,7 @@ static int ecb_aes_encrypt(struct blkcipher_desc *desc,
                 nbytes &= AES_BLOCK_SIZE - 1;
                 err = blkcipher_walk_done(desc, &walk, nbytes);
         }
+        irq_ts_restore(ts_state);
 
         return err;
 }
@@ -268,12 +286,14 @@ static int ecb_aes_decrypt(struct blkcipher_desc *desc,
         struct aes_ctx *ctx = blk_aes_ctx(desc->tfm);
         struct blkcipher_walk walk;
         int err;
+        int ts_state;
 
         padlock_reset_key();
 
         blkcipher_walk_init(&walk, dst, src, nbytes);
         err = blkcipher_walk_virt(desc, &walk);
 
+        ts_state = irq_ts_save();
         while ((nbytes = walk.nbytes)) {
                 padlock_xcrypt_ecb(walk.src.virt.addr, walk.dst.virt.addr,
                                    ctx->D, &ctx->cword.decrypt,
@@ -281,7 +301,7 @@ static int ecb_aes_decrypt(struct blkcipher_desc *desc,
                 nbytes &= AES_BLOCK_SIZE - 1;
                 err = blkcipher_walk_done(desc, &walk, nbytes);
         }
-
+        irq_ts_restore(ts_state);
         return err;
 }
 
@@ -314,12 +334,14 @@ static int cbc_aes_encrypt(struct blkcipher_desc *desc,
         struct aes_ctx *ctx = blk_aes_ctx(desc->tfm);
         struct blkcipher_walk walk;
         int err;
+        int ts_state;
 
         padlock_reset_key();
 
         blkcipher_walk_init(&walk, dst, src, nbytes);
         err = blkcipher_walk_virt(desc, &walk);
 
+        ts_state = irq_ts_save();
         while ((nbytes = walk.nbytes)) {
                 u8 *iv = padlock_xcrypt_cbc(walk.src.virt.addr,
                                             walk.dst.virt.addr, ctx->E,
@@ -329,6 +351,7 @@ static int cbc_aes_encrypt(struct blkcipher_desc *desc,
                 nbytes &= AES_BLOCK_SIZE - 1;
                 err = blkcipher_walk_done(desc, &walk, nbytes);
         }
+        irq_ts_restore(ts_state);
 
         return err;
 }
@@ -340,12 +363,14 @@ static int cbc_aes_decrypt(struct blkcipher_desc *desc,
         struct aes_ctx *ctx = blk_aes_ctx(desc->tfm);
         struct blkcipher_walk walk;
         int err;
+        int ts_state;
 
         padlock_reset_key();
 
         blkcipher_walk_init(&walk, dst, src, nbytes);
         err = blkcipher_walk_virt(desc, &walk);
 
+        ts_state = irq_ts_save();
         while ((nbytes = walk.nbytes)) {
                 padlock_xcrypt_cbc(walk.src.virt.addr, walk.dst.virt.addr,
                                    ctx->D, walk.iv, &ctx->cword.decrypt,
@@ -354,6 +379,7 @@ static int cbc_aes_decrypt(struct blkcipher_desc *desc,
                 err = blkcipher_walk_done(desc, &walk, nbytes);
         }
 
+        irq_ts_restore(ts_state);
         return err;
 }
 
diff --git a/drivers/crypto/padlock-sha.c b/drivers/crypto/padlock-sha.c
index 40d5680fa013..a7fbadebf623 100644
--- a/drivers/crypto/padlock-sha.c
+++ b/drivers/crypto/padlock-sha.c
@@ -22,6 +22,7 @@
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/scatterlist.h>
+#include <asm/i387.h>
 #include "padlock.h"
 
 #define SHA1_DEFAULT_FALLBACK   "sha1-generic"
@@ -102,6 +103,7 @@ static void padlock_do_sha1(const char *in, char *out, int count)
          *     PadLock microcode needs it that big. */
         char buf[128+16];
         char *result = NEAREST_ALIGNED(buf);
+        int ts_state;
 
         ((uint32_t *)result)[0] = SHA1_H0;
         ((uint32_t *)result)[1] = SHA1_H1;
@@ -109,9 +111,12 @@ static void padlock_do_sha1(const char *in, char *out, int count)
         ((uint32_t *)result)[3] = SHA1_H3;
         ((uint32_t *)result)[4] = SHA1_H4;
  
+        /* prevent taking the spurious DNA fault with padlock. */
+        ts_state = irq_ts_save();
         asm volatile (".byte 0xf3,0x0f,0xa6,0xc8" /* rep xsha1 */
                       : "+S"(in), "+D"(result)
                       : "c"(count), "a"(0));
+        irq_ts_restore(ts_state);
 
         padlock_output_block((uint32_t *)result, (uint32_t *)out, 5);
 }
@@ -123,6 +128,7 @@ static void padlock_do_sha256(const char *in, char *out, int count)
          *     PadLock microcode needs it that big. */
         char buf[128+16];
         char *result = NEAREST_ALIGNED(buf);
+        int ts_state;
 
         ((uint32_t *)result)[0] = SHA256_H0;
         ((uint32_t *)result)[1] = SHA256_H1;
@@ -133,9 +139,12 @@ static void padlock_do_sha256(const char *in, char *out, int count)
         ((uint32_t *)result)[6] = SHA256_H6;
         ((uint32_t *)result)[7] = SHA256_H7;
 
+        /* prevent taking the spurious DNA fault with padlock. */
+        ts_state = irq_ts_save();
         asm volatile (".byte 0xf3,0x0f,0xa6,0xd0" /* rep xsha256 */
                       : "+S"(in), "+D"(result)
                       : "c"(count), "a"(0));
+        irq_ts_restore(ts_state);
 
         padlock_output_block((uint32_t *)result, (uint32_t *)out, 8);
 }
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index 681c15f42083..ee827a7f7c6a 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -96,6 +96,9 @@ struct talitos_private {
         unsigned int exec_units;
         unsigned int desc_types;
 
+        /* SEC Compatibility info */
+        unsigned long features;
+
         /* next channel to be assigned next incoming descriptor */
         atomic_t last_chan;
 
@@ -133,6 +136,9 @@ struct talitos_private {
         struct hwrng rng;
 };
 
+/* .features flag */
+#define TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT 0x00000001
+
 /*
  * map virtual single (contiguous) pointer to h/w descriptor pointer
  */
@@ -785,7 +791,7 @@ static void ipsec_esp_encrypt_done(struct device *dev,
         /* copy the generated ICV to dst */
         if (edesc->dma_len) {
                 icvdata = &edesc->link_tbl[edesc->src_nents +
-                                           edesc->dst_nents + 1];
+                                           edesc->dst_nents + 2];
                 sg = sg_last(areq->dst, edesc->dst_nents);
                 memcpy((char *)sg_virt(sg) + sg->length - ctx->authsize,
                        icvdata, ctx->authsize);
@@ -814,7 +820,7 @@ static void ipsec_esp_decrypt_done(struct device *dev,
                 /* auth check */
                 if (edesc->dma_len)
                         icvdata = &edesc->link_tbl[edesc->src_nents +
-                                                   edesc->dst_nents + 1];
+                                                   edesc->dst_nents + 2];
                 else
                         icvdata = &edesc->link_tbl[0];
 
@@ -921,10 +927,30 @@ static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
                 sg_count = sg_to_link_tbl(areq->src, sg_count, cryptlen,
                                           &edesc->link_tbl[0]);
                 if (sg_count > 1) {
+                        struct talitos_ptr *link_tbl_ptr =
+                                &edesc->link_tbl[sg_count-1];
+                        struct scatterlist *sg;
+                        struct talitos_private *priv = dev_get_drvdata(dev);
+
                         desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
                         desc->ptr[4].ptr = cpu_to_be32(edesc->dma_link_tbl);
                         dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
                                                    edesc->dma_len, DMA_BIDIRECTIONAL);
+                        /* If necessary for this SEC revision,
+                         * add a link table entry for ICV.
+                         */
+                        if ((priv->features &
+                             TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT) &&
+                            (edesc->desc.hdr & DESC_HDR_MODE0_ENCRYPT) == 0) {
+                                link_tbl_ptr->j_extent = 0;
+                                link_tbl_ptr++;
+                                link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
+                                link_tbl_ptr->len = cpu_to_be16(authsize);
+                                sg = sg_last(areq->src, edesc->src_nents ? : 1);
+                                link_tbl_ptr->ptr = cpu_to_be32(
+                                                (char *)sg_dma_address(sg)
+                                                + sg->length - authsize);
+                        }
                 } else {
                         /* Only one segment now, so no link tbl needed */
                         desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
@@ -944,12 +970,11 @@ static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
                 desc->ptr[5].ptr = cpu_to_be32(sg_dma_address(areq->dst));
         } else {
                 struct talitos_ptr *link_tbl_ptr =
-                        &edesc->link_tbl[edesc->src_nents];
-                struct scatterlist *sg;
+                        &edesc->link_tbl[edesc->src_nents + 1];
 
                 desc->ptr[5].ptr = cpu_to_be32((struct talitos_ptr *)
                                                edesc->dma_link_tbl +
-                                               edesc->src_nents);
+                                               edesc->src_nents + 1);
                 if (areq->src == areq->dst) {
                         memcpy(link_tbl_ptr, &edesc->link_tbl[0],
                                edesc->src_nents * sizeof(struct talitos_ptr));
@@ -957,14 +982,10 @@ static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
                         sg_count = sg_to_link_tbl(areq->dst, sg_count, cryptlen,
                                                   link_tbl_ptr);
                 }
+                /* Add an entry to the link table for ICV data */
                 link_tbl_ptr += sg_count - 1;
-
-                /* handle case where sg_last contains the ICV exclusively */
-                sg = sg_last(areq->dst, edesc->dst_nents);
-                if (sg->length == ctx->authsize)
-                        link_tbl_ptr--;
-
                 link_tbl_ptr->j_extent = 0;
+                sg_count++;
                 link_tbl_ptr++;
                 link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
                 link_tbl_ptr->len = cpu_to_be16(authsize);
@@ -973,7 +994,7 @@ static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
                 link_tbl_ptr->ptr = cpu_to_be32((struct talitos_ptr *)
                                                 edesc->dma_link_tbl +
                                                 edesc->src_nents +
-                                                edesc->dst_nents + 1);
+                                                edesc->dst_nents + 2);
 
                 desc->ptr[5].j_extent |= DESC_PTR_LNKTBL_JUMP;
                 dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
@@ -1040,12 +1061,12 @@ static struct ipsec_esp_edesc *ipsec_esp_edesc_alloc(struct aead_request *areq,
 
         /*
          * allocate space for base edesc plus the link tables,
-         * allowing for a separate entry for the generated ICV (+ 1),
+         * allowing for two separate entries for ICV and generated ICV (+ 2),
          * and the ICV data itself
          */
         alloc_len = sizeof(struct ipsec_esp_edesc);
         if (src_nents || dst_nents) {
-                dma_len = (src_nents + dst_nents + 1) *
+                dma_len = (src_nents + dst_nents + 2) *
                                  sizeof(struct talitos_ptr) + ctx->authsize;
                 alloc_len += dma_len;
         } else {
@@ -1104,7 +1125,7 @@ static int aead_authenc_decrypt(struct aead_request *req)
         /* stash incoming ICV for later cmp with ICV generated by the h/w */
         if (edesc->dma_len)
                 icvdata = &edesc->link_tbl[edesc->src_nents +
-                                           edesc->dst_nents + 1];
+                                           edesc->dst_nents + 2];
         else
                 icvdata = &edesc->link_tbl[0];
 
@@ -1480,6 +1501,9 @@ static int talitos_probe(struct of_device *ofdev,
                 goto err_out;
         }
 
+        if (of_device_is_compatible(np, "fsl,sec3.0"))
+                priv->features |= TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT;
+
         priv->head_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
                                   GFP_KERNEL);
         priv->tail_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
diff --git a/drivers/dma/ioat_dma.c b/drivers/dma/ioat_dma.c
index a52156e56886..bc8c6e3470ca 100644
--- a/drivers/dma/ioat_dma.c
+++ b/drivers/dma/ioat_dma.c
@@ -551,7 +551,7 @@ static dma_cookie_t ioat1_tx_submit(struct dma_async_tx_descriptor *tx)
         /* write address into NextDescriptor field of last desc in chain */
         to_ioat_desc(ioat_chan->used_desc.prev)->hw->next =
                                                         first->async_tx.phys;
-        __list_splice(&new_chain, ioat_chan->used_desc.prev);
+        list_splice_tail(&new_chain, &ioat_chan->used_desc);
 
         ioat_chan->dmacount += desc_count;
         ioat_chan->pending += desc_count;
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 85bfeba4d85e..71fba82462cb 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -33,7 +33,7 @@
 #include <linux/memory.h>
 #include <linux/ioport.h>
 
-#include <asm/arch/adma.h>
+#include <mach/adma.h>
 
 #define to_iop_adma_chan(chan) container_of(chan, struct iop_adma_chan, common)
 #define to_iop_adma_device(dev) \
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index a4e4494663bf..0328da020a10 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -25,7 +25,7 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/memory.h>
-#include <asm/plat-orion/mv_xor.h>
+#include <plat/mv_xor.h>
 #include "mv_xor.h"
 
 static void mv_xor_issue_pending(struct dma_chan *chan);
diff --git a/drivers/firewire/Kconfig b/drivers/firewire/Kconfig
index fa6d6abefd4d..450902438208 100644
--- a/drivers/firewire/Kconfig
+++ b/drivers/firewire/Kconfig
@@ -12,8 +12,8 @@ config FIREWIRE
           This is the "Juju" FireWire stack, a new alternative implementation
           designed for robustness and simplicity.  You can build either this
           stack, or the old stack (the ieee1394 driver, ohci1394 etc.) or both.
-          Please read http://wiki.linux1394.org/JujuMigration before you
-          enable the new stack.
+          Please read http://ieee1394.wiki.kernel.org/index.php/Juju_Migration
+          before you enable the new stack.
 
           To compile this driver as a module, say M here: the module will be
           called firewire-core.
diff --git a/drivers/firewire/fw-cdev.c b/drivers/firewire/fw-cdev.c
index bc81d6fcd2fd..2e6d5848d217 100644
--- a/drivers/firewire/fw-cdev.c
+++ b/drivers/firewire/fw-cdev.c
@@ -369,22 +369,33 @@ complete_transaction(struct fw_card *card, int rcode,
         struct response *response = data;
         struct client *client = response->client;
         unsigned long flags;
+        struct fw_cdev_event_response *r = &response->response;
 
-        if (length < response->response.length)
-                response->response.length = length;
+        if (length < r->length)
+                r->length = length;
         if (rcode == RCODE_COMPLETE)
-                memcpy(response->response.data, payload,
-                       response->response.length);
+                memcpy(r->data, payload, r->length);
 
         spin_lock_irqsave(&client->lock, flags);
         list_del(&response->resource.link);
         spin_unlock_irqrestore(&client->lock, flags);
 
-        response->response.type   = FW_CDEV_EVENT_RESPONSE;
-        response->response.rcode  = rcode;
-        queue_event(client, &response->event, &response->response,
-                    sizeof(response->response) + response->response.length,
-                    NULL, 0);
+        r->type   = FW_CDEV_EVENT_RESPONSE;
+        r->rcode  = rcode;
+
+        /*
+         * In the case that sizeof(*r) doesn't align with the position of the
+         * data, and the read is short, preserve an extra copy of the data
+         * to stay compatible with a pre-2.6.27 bug.  Since the bug is harmless
+         * for short reads and some apps depended on it, this is both safe
+         * and prudent for compatibility.
+         */
+        if (r->length <= sizeof(*r) - offsetof(typeof(*r), data))
+                queue_event(client, &response->event, r, sizeof(*r),
+                            r->data, r->length);
+        else
+                queue_event(client, &response->event, r, sizeof(*r) + r->length,
+                            NULL, 0);
 }
 
 static int ioctl_send_request(struct client *client, void *buffer)
diff --git a/drivers/firmware/memmap.c b/drivers/firmware/memmap.c
index 001622eb86f9..3bf8ee120d42 100644
--- a/drivers/firmware/memmap.c
+++ b/drivers/firmware/memmap.c
@@ -84,20 +84,23 @@ static struct kobj_type memmap_ktype = {
  */
 
 /*
- * Firmware memory map entries
+ * Firmware memory map entries. No locking is needed because the
+ * firmware_map_add() and firmware_map_add_early() functions are called
+ * in firmware initialisation code in one single thread of execution.
  */
 static LIST_HEAD(map_entries);
 
 /**
- * Common implementation of firmware_map_add() and firmware_map_add_early()
- * which expects a pre-allocated struct firmware_map_entry.
- *
+ * firmware_map_add_entry() - Does the real work to add a firmware memmap entry.
  * @start: Start of the memory range.
  * @end:   End of the memory range (inclusive).
  * @type:  Type of the memory range.
  * @entry: Pre-allocated (either kmalloc() or bootmem allocator), uninitialised
  *         entry.
- */
+ *
+ * Common implementation of firmware_map_add() and firmware_map_add_early()
+ * which expects a pre-allocated struct firmware_map_entry.
+ **/
 static int firmware_map_add_entry(resource_size_t start, resource_size_t end,
                                   const char *type,
                                   struct firmware_map_entry *entry)
@@ -115,33 +118,52 @@ static int firmware_map_add_entry(resource_size_t start, resource_size_t end,
         return 0;
 }
 
-/*
- * See <linux/firmware-map.h> for documentation.
- */
+/**
+ * firmware_map_add() - Adds a firmware mapping entry.
+ * @start: Start of the memory range.
+ * @end:   End of the memory range (inclusive).
+ * @type:  Type of the memory range.
+ *
+ * This function uses kmalloc() for memory
+ * allocation. Use firmware_map_add_early() if you want to use the bootmem
+ * allocator.
+ *
+ * That function must be called before late_initcall.
+ *
+ * Returns 0 on success, or -ENOMEM if no memory could be allocated.
+ **/
 int firmware_map_add(resource_size_t start, resource_size_t end,
                      const char *type)
 {
         struct firmware_map_entry *entry;
 
         entry = kmalloc(sizeof(struct firmware_map_entry), GFP_ATOMIC);
-        WARN_ON(!entry);
         if (!entry)
                 return -ENOMEM;
 
         return firmware_map_add_entry(start, end, type, entry);
 }
 
-/*
- * See <linux/firmware-map.h> for documentation.
- */
+/**
+ * firmware_map_add_early() - Adds a firmware mapping entry.
+ * @start: Start of the memory range.
+ * @end:   End of the memory range (inclusive).
+ * @type:  Type of the memory range.
+ *
+ * Adds a firmware mapping entry. This function uses the bootmem allocator
+ * for memory allocation. Use firmware_map_add() if you want to use kmalloc().
+ *
+ * That function must be called before late_initcall.
+ *
+ * Returns 0 on success, or -ENOMEM if no memory could be allocated.
+ **/
 int __init firmware_map_add_early(resource_size_t start, resource_size_t end,
                                   const char *type)
 {
         struct firmware_map_entry *entry;
 
         entry = alloc_bootmem_low(sizeof(struct firmware_map_entry));
-        WARN_ON(!entry);
-        if (!entry)
+        if (WARN_ON(!entry))
                 return -ENOMEM;
 
         return firmware_map_add_entry(start, end, type, entry);
@@ -183,7 +205,10 @@ static ssize_t memmap_attr_show(struct kobject *kobj,
 /*
  * Initialises stuff and adds the entries in the map_entries list to
  * sysfs. Important is that firmware_map_add() and firmware_map_add_early()
- * must be called before late_initcall.
+ * must be called before late_initcall. That's just because that function
+ * is called as late_initcall() function, which means that if you call
+ * firmware_map_add() or firmware_map_add_early() afterwards, the entries
+ * are not added to sysfs.
  */
 static int __init memmap_init(void)
 {
@@ -192,13 +217,13 @@ static int __init memmap_init(void)
         struct kset *memmap_kset;
 
         memmap_kset = kset_create_and_add("memmap", NULL, firmware_kobj);
-        WARN_ON(!memmap_kset);
-        if (!memmap_kset)
+        if (WARN_ON(!memmap_kset))
                 return -ENOMEM;
 
         list_for_each_entry(entry, &map_entries, list) {
                 entry->kobj.kset = memmap_kset;
-                kobject_add(&entry->kobj, NULL, "%d", i++);
+                if (kobject_add(&entry->kobj, NULL, "%d", i++))
+                        kobject_put(&entry->kobj);
         }
 
         return 0;
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
index 61e78a4369b9..b15f88249639 100644
--- a/drivers/hid/usbhid/hid-quirks.c
+++ b/drivers/hid/usbhid/hid-quirks.c
@@ -654,12 +654,12 @@ static const struct hid_blacklist {
         { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_ANSI, HID_QUIRK_APPLE_NUMLOCK_EMULATION | HID_QUIRK_APPLE_HAS_FN },
         { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_ISO, HID_QUIRK_APPLE_NUMLOCK_EMULATION | HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_APPLE_ISO_KEYBOARD },
         { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_JIS, HID_QUIRK_APPLE_NUMLOCK_EMULATION | HID_QUIRK_APPLE_HAS_FN },
-        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_ANSI, HID_QUIRK_APPLE_HAS_FN },
-        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_ISO, HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_APPLE_ISO_KEYBOARD },
-        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_JIS, HID_QUIRK_APPLE_HAS_FN },
-        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING2_ANSI, HID_QUIRK_APPLE_HAS_FN },
-        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING2_ISO, HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_APPLE_ISO_KEYBOARD },
-        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING2_JIS, HID_QUIRK_APPLE_HAS_FN },
+        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_ANSI, HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_IGNORE_MOUSE },
+        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_ISO, HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_APPLE_ISO_KEYBOARD | HID_QUIRK_IGNORE_MOUSE},
+        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_JIS, HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_IGNORE_MOUSE},
+        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING2_ANSI, HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_IGNORE_MOUSE},
+        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING2_ISO, HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_APPLE_ISO_KEYBOARD | HID_QUIRK_IGNORE_MOUSE },
+        { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING2_JIS, HID_QUIRK_APPLE_HAS_FN  | HID_QUIRK_IGNORE_MOUSE },
         { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY, HID_QUIRK_APPLE_NUMLOCK_EMULATION | HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_IGNORE_MOUSE },
         { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY, HID_QUIRK_APPLE_NUMLOCK_EMULATION | HID_QUIRK_APPLE_HAS_FN | HID_QUIRK_IGNORE_MOUSE },
 
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index c882fd05cf29..d402e8d813ce 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -57,6 +57,16 @@ config SENSORS_ABITUGURU3
           This driver can also be built as a module.  If so, the module
           will be called abituguru3.
 
+config SENSORS_AD7414
+        tristate "Analog Devices AD7414"
+        depends on I2C && EXPERIMENTAL
+        help
+          If you say yes here you get support for the Analog Devices
+          AD7414 temperature monitoring chip.
+
+          This driver can also be built as a module. If so, the module
+          will be called ad7414.
+
 config SENSORS_AD7418
         tristate "Analog Devices AD7416, AD7417 and AD7418"
         depends on I2C && EXPERIMENTAL
@@ -67,6 +77,22 @@ config SENSORS_AD7418
           This driver can also be built as a module. If so, the module
           will be called ad7418.
 
+config SENSORS_ADCXX
+        tristate "National Semiconductor ADCxxxSxxx"
+        depends on SPI_MASTER && EXPERIMENTAL
+        help
+          If you say yes here you get support for the National Semiconductor
+          ADC<bb><c>S<sss> chip family, where
+          * bb  is the resolution in number of bits (8, 10, 12)
+          * c   is the number of channels (1, 2, 4, 8)
+          * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500
+            kSPS and 101 for 1 MSPS)
+
+          Examples : ADC081S101, ADC124S501, ...
+
+          This driver can also be built as a module.  If so, the module
+          will be called adcxx.
+
 config SENSORS_ADM1021
         tristate "Analog Devices ADM1021 and compatibles"
         depends on I2C
@@ -124,7 +150,7 @@ config SENSORS_ADM1031
 
 config SENSORS_ADM9240
         tristate "Analog Devices ADM9240 and compatibles"
-        depends on I2C && EXPERIMENTAL
+        depends on I2C
         select HWMON_VID
         help
           If you say yes here you get support for Analog Devices ADM9240,
@@ -575,8 +601,8 @@ config SENSORS_DME1737
         select HWMON_VID
         help
           If you say yes here you get support for the hardware monitoring
-          and fan control features of the SMSC DME1737 (and compatibles
-          like the Asus A8000) and SCH311x Super-I/O chips.
+          and fan control features of the SMSC DME1737, SCH311x, SCH5027, and
+          Asus A8000 Super-I/O chips.
 
           This driver can also be built as a module.  If so, the module
           will be called dme1737.
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index d098677e08de..950134ab8426 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -15,7 +15,9 @@ obj-$(CONFIG_SENSORS_W83791D)	+= w83791d.o
 
 obj-$(CONFIG_SENSORS_ABITUGURU) += abituguru.o
 obj-$(CONFIG_SENSORS_ABITUGURU3)+= abituguru3.o
+obj-$(CONFIG_SENSORS_AD7414)    += ad7414.o
 obj-$(CONFIG_SENSORS_AD7418)    += ad7418.o
+obj-$(CONFIG_SENSORS_ADCXX)     += adcxx.o
 obj-$(CONFIG_SENSORS_ADM1021)   += adm1021.o
 obj-$(CONFIG_SENSORS_ADM1025)   += adm1025.o
 obj-$(CONFIG_SENSORS_ADM1026)   += adm1026.o
diff --git a/drivers/hwmon/abituguru3.c b/drivers/hwmon/abituguru3.c
index f00f497b9ca9..d568c65c1370 100644
--- a/drivers/hwmon/abituguru3.c
+++ b/drivers/hwmon/abituguru3.c
@@ -1,5 +1,8 @@
 /*
-    abituguru3.c Copyright (c) 2006 Hans de Goede <j.w.r.degoede@hhs.nl>
+    abituguru3.c
+
+    Copyright (c) 2006-2008 Hans de Goede <j.w.r.degoede@hhs.nl>
+    Copyright (c) 2008 Alistair John Strachan <alistair@devzero.co.uk>
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -116,7 +119,7 @@ struct abituguru3_sensor_info {
 
 struct abituguru3_motherboard_info {
         u16 id;
-        const char *name;
+        const char *dmi_name;
         /* + 1 -> end of sensors indicated by a sensor with name == NULL */
         struct abituguru3_sensor_info sensors[ABIT_UGURU3_MAX_NO_SENSORS + 1];
 };
@@ -161,7 +164,7 @@ struct abituguru3_data {
 
 /* Constants */
 static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
-        { 0x000C, "unknown", {
+        { 0x000C, NULL /* Unknown, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 10, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -183,7 +186,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX1 Fan",           35, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x000D, "Abit AW8", {
+        { 0x000D, NULL /* Abit AW8, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 10, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -212,7 +215,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX5 Fan",           39, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x000E, "AL-8", {
+        { 0x000E, NULL /* AL-8, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 10, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -233,7 +236,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "SYS Fan",            34, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x000F, "unknown", {
+        { 0x000F, NULL /* Unknown, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 10, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -254,7 +257,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "SYS Fan",            34, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0010, "Abit NI8 SLI GR", {
+        { 0x0010, NULL /* Abit NI8 SLI GR, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 10, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -276,7 +279,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "OTES1 Fan",          36, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0011, "Abit AT8 32X", {
+        { 0x0011, NULL /* Abit AT8 32X, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 20, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -302,7 +305,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX2 Fan",           36, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0012, "Abit AN8 32X", {
+        { 0x0012, NULL /* Abit AN8 32X, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 20, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -324,7 +327,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX1 Fan",           36, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0013, "Abit AW8D", {
+        { 0x0013, NULL /* Abit AW8D, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 10, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -353,7 +356,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX5 Fan",           39, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0014, "Abit AB9 Pro", {
+        { 0x0014, NULL /* Abit AB9 Pro, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 10, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -374,7 +377,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "SYS Fan",            34, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0015, "unknown", {
+        { 0x0015, NULL /* Unknown, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 20, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -398,7 +401,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX3 Fan",           36, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0016, "AW9D-MAX", {
+        { 0x0016, NULL /* AW9D-MAX, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR2",                1, 0, 20, 1, 0 },
                 { "DDR2 VTT",            2, 0, 10, 1, 0 },
@@ -426,7 +429,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "OTES1 Fan",          38, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0017, "unknown", {
+        { 0x0017, NULL /* Unknown, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR2",                1, 0, 20, 1, 0 },
                 { "DDR2 VTT",            2, 0, 10, 1, 0 },
@@ -451,7 +454,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX3 FAN",           37, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0018, "unknown", {
+        { 0x0018, NULL /* Unknown, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR2",                1, 0, 20, 1, 0 },
                 { "DDR2 VTT",            2, 0, 10, 1, 0 },
@@ -478,7 +481,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX3 Fan",           36, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0019, "unknown", {
+        { 0x0019, NULL /* Unknown, need DMI string */, {
                 { "CPU Core",            7, 0, 10, 1, 0 },
                 { "DDR2",               13, 0, 20, 1, 0 },
                 { "DDR2 VTT",           14, 0, 10, 1, 0 },
@@ -505,7 +508,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX3 FAN",           36, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x001A, "Abit IP35 Pro", {
+        { 0x001A, "IP35 Pro(Intel P35-ICH9R)", {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR2",                1, 0, 20, 1, 0 },
                 { "DDR2 VTT",            2, 0, 10, 1, 0 },
@@ -533,7 +536,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX4 Fan",           37, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x001B, "unknown", {
+        { 0x001B, NULL /* Unknown, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR3",                1, 0, 20, 1, 0 },
                 { "DDR3 VTT",            2, 0, 10, 1, 0 },
@@ -560,7 +563,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX3 Fan",           36, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x001C, "unknown", {
+        { 0x001C, NULL /* Unknown, need DMI string */, {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR2",                1, 0, 20, 1, 0 },
                 { "DDR2 VTT",            2, 0, 10, 1, 0 },
@@ -935,9 +938,18 @@ static int __devinit abituguru3_probe(struct platform_device *pdev)
                 goto abituguru3_probe_error;
         }
         data->sensors = abituguru3_motherboards[i].sensors;
+
         printk(KERN_INFO ABIT_UGURU3_NAME ": found Abit uGuru3, motherboard "
-                "ID: %04X (%s)\n", (unsigned int)id,
-                abituguru3_motherboards[i].name);
+                "ID: %04X\n", (unsigned int)id);
+
+#ifdef CONFIG_DMI
+        if (!abituguru3_motherboards[i].dmi_name) {
+                printk(KERN_WARNING ABIT_UGURU3_NAME ": this motherboard was "
+                        "not detected using DMI. Please send the output of "
+                        "\"dmidecode\" to the abituguru3 maintainer"
+                        "(see MAINTAINERS)\n");
+        }
+#endif
 
         /* Fill the sysfs attr array */
         sysfs_attr_i = 0;
@@ -1109,6 +1121,46 @@ static struct platform_driver abituguru3_driver = {
         .resume = abituguru3_resume
 };
 
+#ifdef CONFIG_DMI
+
+static int __init abituguru3_dmi_detect(void)
+{
+        const char *board_vendor, *board_name;
+        int i, err = (force) ? 1 : -ENODEV;
+
+        board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
+        if (!board_vendor || strcmp(board_vendor, "http://www.abit.com.tw/"))
+                return err;
+
+        board_name = dmi_get_system_info(DMI_BOARD_NAME);
+        if (!board_name)
+                return err;
+
+        for (i = 0; abituguru3_motherboards[i].id; i++) {
+                const char *dmi_name = abituguru3_motherboards[i].dmi_name;
+                if (dmi_name && !strcmp(dmi_name, board_name))
+                        break;
+        }
+
+        if (!abituguru3_motherboards[i].id)
+                return 1;
+
+        return 0;
+}
+
+#else /* !CONFIG_DMI */
+
+static inline int abituguru3_dmi_detect(void)
+{
+        return -ENODEV;
+}
+
+#endif /* CONFIG_DMI */
+
+/* FIXME: Manual detection should die eventually; we need to collect stable
+ *        DMI model names first before we can rely entirely on CONFIG_DMI.
+ */
+
 static int __init abituguru3_detect(void)
 {
         /* See if there is an uguru3 there. An idle uGuru3 will hold 0x00 or
@@ -1119,7 +1171,7 @@ static int __init abituguru3_detect(void)
         if (((data_val == 0x00) || (data_val == 0x08)) &&
                         ((cmd_val == 0xAC) || (cmd_val == 0x05) ||
                          (cmd_val == 0x55)))
-                return ABIT_UGURU3_BASE;
+                return 0;
 
         ABIT_UGURU3_DEBUG("no Abit uGuru3 found, data = 0x%02X, cmd = "
                 "0x%02X\n", (unsigned int)data_val, (unsigned int)cmd_val);
@@ -1127,7 +1179,7 @@ static int __init abituguru3_detect(void)
         if (force) {
                 printk(KERN_INFO ABIT_UGURU3_NAME ": Assuming Abit uGuru3 is "
                                 "present because of \"force\" parameter\n");
-                return ABIT_UGURU3_BASE;
+                return 0;
         }
 
         /* No uGuru3 found */
@@ -1138,27 +1190,29 @@ static struct platform_device *abituguru3_pdev;
 
 static int __init abituguru3_init(void)
 {
-        int address, err;
         struct resource res = { .flags = IORESOURCE_IO };
-
-#ifdef CONFIG_DMI
-        const char *board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
-
-        /* safety check, refuse to load on non Abit motherboards */
-        if (!force && (!board_vendor ||
-                        strcmp(board_vendor, "http://www.abit.com.tw/")))
-                return -ENODEV;
-#endif
-
-        address = abituguru3_detect();
-        if (address < 0)
-                return address;
+        int err;
+
+        /* Attempt DMI detection first */
+        err = abituguru3_dmi_detect();
+        if (err < 0)
+                return err;
+
+        /* Fall back to manual detection if there was no exact
+         * board name match, or force was specified.
+         */
+        if (err > 0) {
+                err = abituguru3_detect();
+                if (err)
+                        return err;
+        }
 
         err = platform_driver_register(&abituguru3_driver);
         if (err)
                 goto exit;
 
-        abituguru3_pdev = platform_device_alloc(ABIT_UGURU3_NAME, address);
+        abituguru3_pdev = platform_device_alloc(ABIT_UGURU3_NAME,
+                                                ABIT_UGURU3_BASE);
         if (!abituguru3_pdev) {
                 printk(KERN_ERR ABIT_UGURU3_NAME
                         ": Device allocation failed\n");
@@ -1166,8 +1220,8 @@ static int __init abituguru3_init(void)
                 goto exit_driver_unregister;
         }
 
-        res.start = address;
-        res.end = address + ABIT_UGURU3_REGION_LENGTH - 1;
+        res.start = ABIT_UGURU3_BASE;
+        res.end = ABIT_UGURU3_BASE + ABIT_UGURU3_REGION_LENGTH - 1;
         res.name = ABIT_UGURU3_NAME;
 
         err = platform_device_add_resources(abituguru3_pdev, &res, 1);
diff --git a/drivers/hwmon/ad7414.c b/drivers/hwmon/ad7414.c
new file mode 100644
index 000000000000..ce8d94fbfd7e
--- /dev/null
+++ b/drivers/hwmon/ad7414.c
@@ -0,0 +1,268 @@
+/*
+ * An hwmon driver for the Analog Devices AD7414
+ *
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * Copyright (c) 2008 PIKA Technologies
+ *   Sean MacLennan <smaclennan@pikatech.com>
+ *
+ * Copyright (c) 2008 Spansion Inc.
+ *   Frank Edelhaeuser <frank.edelhaeuser at spansion.com>
+ *   (converted to "new style" I2C driver model, removed checkpatch.pl warnings)
+ *
+ * Based on ad7418.c
+ * Copyright 2006 Tower Technologies, Alessandro Zummo <a.zummo at towertech.it>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+
+
+/* AD7414 registers */
+#define AD7414_REG_TEMP         0x00
+#define AD7414_REG_CONF         0x01
+#define AD7414_REG_T_HIGH       0x02
+#define AD7414_REG_T_LOW        0x03
+
+static u8 AD7414_REG_LIMIT[] = { AD7414_REG_T_HIGH, AD7414_REG_T_LOW };
+
+struct ad7414_data {
+        struct device           *hwmon_dev;
+        struct mutex            lock;   /* atomic read data updates */
+        char                    valid;  /* !=0 if following fields are valid */
+        unsigned long           next_update;    /* In jiffies */
+        s16                     temp_input;     /* Register values */
+        s8                      temps[ARRAY_SIZE(AD7414_REG_LIMIT)];
+};
+
+/* REG: (0.25C/bit, two's complement) << 6 */
+static inline int ad7414_temp_from_reg(s16 reg)
+{
+        /* use integer division instead of equivalent right shift to
+         * guarantee arithmetic shift and preserve the sign
+         */
+        return ((int)reg / 64) * 250;
+}
+
+static inline int ad7414_read(struct i2c_client *client, u8 reg)
+{
+        if (reg == AD7414_REG_TEMP) {
+                int value = i2c_smbus_read_word_data(client, reg);
+                return (value < 0) ? value : swab16(value);
+        } else
+                return i2c_smbus_read_byte_data(client, reg);
+}
+
+static inline int ad7414_write(struct i2c_client *client, u8 reg, u8 value)
+{
+        return i2c_smbus_write_byte_data(client, reg, value);
+}
+
+struct ad7414_data *ad7414_update_device(struct device *dev)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct ad7414_data *data = i2c_get_clientdata(client);
+
+        mutex_lock(&data->lock);
+
+        if (time_after(jiffies, data->next_update) || !data->valid) {
+                int value, i;
+
+                dev_dbg(&client->dev, "starting ad7414 update\n");
+
+                value = ad7414_read(client, AD7414_REG_TEMP);
+                if (value < 0)
+                        dev_dbg(&client->dev, "AD7414_REG_TEMP err %d\n",
+                                value);
+                else
+                        data->temp_input = value;
+
+                for (i = 0; i < ARRAY_SIZE(AD7414_REG_LIMIT); ++i) {
+                        value = ad7414_read(client, AD7414_REG_LIMIT[i]);
+                        if (value < 0)
+                                dev_dbg(&client->dev, "AD7414 reg %d err %d\n",
+                                        AD7414_REG_LIMIT[i], value);
+                        else
+                                data->temps[i] = value;
+                }
+
+                data->next_update = jiffies + HZ + HZ / 2;
+                data->valid = 1;
+        }
+
+        mutex_unlock(&data->lock);
+
+        return data;
+}
+
+static ssize_t show_temp_input(struct device *dev,
+                               struct device_attribute *attr, char *buf)
+{
+        struct ad7414_data *data = ad7414_update_device(dev);
+        return sprintf(buf, "%d\n", ad7414_temp_from_reg(data->temp_input));
+}
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp_input, NULL, 0);
+
+static ssize_t show_max_min(struct device *dev, struct device_attribute *attr,
+                          char *buf)
+{
+        int index = to_sensor_dev_attr(attr)->index;
+        struct ad7414_data *data = ad7414_update_device(dev);
+        return sprintf(buf, "%d\n", data->temps[index] * 1000);
+}
+
+static ssize_t set_max_min(struct device *dev,
+                           struct device_attribute *attr,
+                           const char *buf, size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct ad7414_data *data = i2c_get_clientdata(client);
+        int index = to_sensor_dev_attr(attr)->index;
+        u8 reg = AD7414_REG_LIMIT[index];
+        long temp = simple_strtol(buf, NULL, 10);
+
+        temp = SENSORS_LIMIT(temp, -40000, 85000);
+        temp = (temp + (temp < 0 ? -500 : 500)) / 1000;
+
+        mutex_lock(&data->lock);
+        data->temps[index] = temp;
+        ad7414_write(client, reg, temp);
+        mutex_unlock(&data->lock);
+        return count;
+}
+
+static SENSOR_DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO,
+                          show_max_min, set_max_min, 0);
+static SENSOR_DEVICE_ATTR(temp1_min, S_IWUSR | S_IRUGO,
+                          show_max_min, set_max_min, 1);
+
+static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
+                          char *buf)
+{
+        int bitnr = to_sensor_dev_attr(attr)->index;
+        struct ad7414_data *data = ad7414_update_device(dev);
+        int value = (data->temp_input >> bitnr) & 1;
+        return sprintf(buf, "%d\n", value);
+}
+
+static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL, 3);
+static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, 4);
+
+static struct attribute *ad7414_attributes[] = {
+        &sensor_dev_attr_temp1_input.dev_attr.attr,
+        &sensor_dev_attr_temp1_max.dev_attr.attr,
+        &sensor_dev_attr_temp1_min.dev_attr.attr,
+        &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
+        NULL
+};
+
+static const struct attribute_group ad7414_group = {
+        .attrs = ad7414_attributes,
+};
+
+static int ad7414_probe(struct i2c_client *client,
+                        const struct i2c_device_id *dev_id)
+{
+        struct ad7414_data *data;
+        int conf;
+        int err = 0;
+
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA |
+                                     I2C_FUNC_SMBUS_READ_WORD_DATA))
+                goto exit;
+
+        data = kzalloc(sizeof(struct ad7414_data), GFP_KERNEL);
+        if (!data) {
+                err = -ENOMEM;
+                goto exit;
+        }
+
+        i2c_set_clientdata(client, data);
+        mutex_init(&data->lock);
+
+        dev_info(&client->dev, "chip found\n");
+
+        /* Make sure the chip is powered up. */
+        conf = i2c_smbus_read_byte_data(client, AD7414_REG_CONF);
+        if (conf < 0)
+                dev_warn(&client->dev,
+                         "ad7414_probe unable to read config register.\n");
+        else {
+                conf &= ~(1 << 7);
+                i2c_smbus_write_byte_data(client, AD7414_REG_CONF, conf);
+        }
+
+        /* Register sysfs hooks */
+        err = sysfs_create_group(&client->dev.kobj, &ad7414_group);
+        if (err)
+                goto exit_free;
+
+        data->hwmon_dev = hwmon_device_register(&client->dev);
+        if (IS_ERR(data->hwmon_dev)) {
+                err = PTR_ERR(data->hwmon_dev);
+                goto exit_remove;
+        }
+
+        return 0;
+
+exit_remove:
+        sysfs_remove_group(&client->dev.kobj, &ad7414_group);
+exit_free:
+        kfree(data);
+exit:
+        return err;
+}
+
+static int __devexit ad7414_remove(struct i2c_client *client)
+{
+        struct ad7414_data *data = i2c_get_clientdata(client);
+
+        hwmon_device_unregister(data->hwmon_dev);
+        sysfs_remove_group(&client->dev.kobj, &ad7414_group);
+        kfree(data);
+        return 0;
+}
+
+static const struct i2c_device_id ad7414_id[] = {
+        { "ad7414", 0 },
+        {}
+};
+
+static struct i2c_driver ad7414_driver = {
+        .driver = {
+                .name   = "ad7414",
+        },
+        .probe  = ad7414_probe,
+        .remove = __devexit_p(ad7414_remove),
+        .id_table = ad7414_id,
+};
+
+static int __init ad7414_init(void)
+{
+        return i2c_add_driver(&ad7414_driver);
+}
+module_init(ad7414_init);
+
+static void __exit ad7414_exit(void)
+{
+        i2c_del_driver(&ad7414_driver);
+}
+module_exit(ad7414_exit);
+
+MODULE_AUTHOR("Stefan Roese <sr at denx.de>, "
+              "Frank Edelhaeuser <frank.edelhaeuser at spansion.com>");
+
+MODULE_DESCRIPTION("AD7414 driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/hwmon/adcxx.c b/drivers/hwmon/adcxx.c
new file mode 100644
index 000000000000..242294db3db6
--- /dev/null
+++ b/drivers/hwmon/adcxx.c
@@ -0,0 +1,329 @@
+/*
+ * adcxx.c
+ *
+ * The adcxx4s is an AD converter family from National Semiconductor (NS).
+ *
+ * Copyright (c) 2008 Marc Pignat <marc.pignat@hevs.ch>
+ *
+ * The adcxx4s communicates with a host processor via an SPI/Microwire Bus
+ * interface. This driver supports the whole family of devices with name
+ * ADC<bb><c>S<sss>, where
+ * * bb is the resolution in number of bits (8, 10, 12)
+ * * c is the number of channels (1, 2, 4, 8)
+ * * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS
+ *   and 101 for 1 MSPS)
+ *
+ * Complete datasheets are available at National's website here:
+ * http://www.national.com/ds/DC/ADC<bb><c>S<sss>.pdf
+ *
+ * Handling of 8, 10 and 12 bits converters are the same, the
+ * unavailable bits are 0 :)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/sysfs.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/mutex.h>
+#include <linux/spi/spi.h>
+
+#define DRVNAME         "adcxx"
+
+struct adcxx {
+        struct device *hwmon_dev;
+        struct mutex lock;
+        u32 channels;
+        u32 reference; /* in millivolts */
+};
+
+/* sysfs hook function */
+static ssize_t adcxx_read(struct device *dev,
+                struct device_attribute *devattr, char *buf)
+{
+        struct spi_device *spi = to_spi_device(dev);
+        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+        struct adcxx *adc = dev_get_drvdata(&spi->dev);
+        u8 tx_buf[2] = { attr->index << 3 }; /* other bits are don't care */
+        u8 rx_buf[2];
+        int status;
+        int value;
+
+        if (mutex_lock_interruptible(&adc->lock))
+                return -ERESTARTSYS;
+
+        status = spi_write_then_read(spi, tx_buf, sizeof(tx_buf),
+                                        rx_buf, sizeof(rx_buf));
+        if (status < 0) {
+                dev_warn(dev, "spi_write_then_read failed with status %d\n",
+                                status);
+                goto out;
+        }
+
+        value = (rx_buf[0] << 8) + rx_buf[1];
+        dev_dbg(dev, "raw value = 0x%x\n", value);
+
+        value = value * adc->reference >> 12;
+        status = sprintf(buf, "%d\n", value);
+out:
+        mutex_unlock(&adc->lock);
+        return status;
+}
+
+static ssize_t adcxx_show_min(struct device *dev,
+                struct device_attribute *devattr, char *buf)
+{
+        /* The minimum reference is 0 for this chip family */
+        return sprintf(buf, "0\n");
+}
+
+static ssize_t adcxx_show_max(struct device *dev,
+                struct device_attribute *devattr, char *buf)
+{
+        struct spi_device *spi = to_spi_device(dev);
+        struct adcxx *adc = dev_get_drvdata(&spi->dev);
+        u32 reference;
+
+        if (mutex_lock_interruptible(&adc->lock))
+                return -ERESTARTSYS;
+
+        reference = adc->reference;
+
+        mutex_unlock(&adc->lock);
+
+        return sprintf(buf, "%d\n", reference);
+}
+
+static ssize_t adcxx_set_max(struct device *dev,
+        struct device_attribute *devattr, const char *buf, size_t count)
+{
+        struct spi_device *spi = to_spi_device(dev);
+        struct adcxx *adc = dev_get_drvdata(&spi->dev);
+        unsigned long value;
+
+        if (strict_strtoul(buf, 10, &value))
+                return -EINVAL;
+
+        if (mutex_lock_interruptible(&adc->lock))
+                return -ERESTARTSYS;
+
+        adc->reference = value;
+
+        mutex_unlock(&adc->lock);
+
+        return count;
+}
+
+static ssize_t adcxx_show_name(struct device *dev, struct device_attribute
+                              *devattr, char *buf)
+{
+        struct spi_device *spi = to_spi_device(dev);
+        struct adcxx *adc = dev_get_drvdata(&spi->dev);
+
+        return sprintf(buf, "adcxx%ds\n", adc->channels);
+}
+
+static struct sensor_device_attribute ad_input[] = {
+        SENSOR_ATTR(name, S_IRUGO, adcxx_show_name, NULL, 0),
+        SENSOR_ATTR(in_min, S_IRUGO, adcxx_show_min, NULL, 0),
+        SENSOR_ATTR(in_max, S_IWUSR | S_IRUGO, adcxx_show_max,
+                                        adcxx_set_max, 0),
+        SENSOR_ATTR(in0_input, S_IRUGO, adcxx_read, NULL, 0),
+        SENSOR_ATTR(in1_input, S_IRUGO, adcxx_read, NULL, 1),
+        SENSOR_ATTR(in2_input, S_IRUGO, adcxx_read, NULL, 2),
+        SENSOR_ATTR(in3_input, S_IRUGO, adcxx_read, NULL, 3),
+        SENSOR_ATTR(in4_input, S_IRUGO, adcxx_read, NULL, 4),
+        SENSOR_ATTR(in5_input, S_IRUGO, adcxx_read, NULL, 5),
+        SENSOR_ATTR(in6_input, S_IRUGO, adcxx_read, NULL, 6),
+        SENSOR_ATTR(in7_input, S_IRUGO, adcxx_read, NULL, 7),
+};
+
+/*----------------------------------------------------------------------*/
+
+static int __devinit adcxx_probe(struct spi_device *spi, int channels)
+{
+        struct adcxx *adc;
+        int status;
+        int i;
+
+        adc = kzalloc(sizeof *adc, GFP_KERNEL);
+        if (!adc)
+                return -ENOMEM;
+
+        /* set a default value for the reference */
+        adc->reference = 3300;
+        adc->channels = channels;
+        mutex_init(&adc->lock);
+
+        mutex_lock(&adc->lock);
+
+        dev_set_drvdata(&spi->dev, adc);
+
+        for (i = 0; i < 3 + adc->channels; i++) {
+                status = device_create_file(&spi->dev, &ad_input[i].dev_attr);
+                if (status) {
+                        dev_err(&spi->dev, "device_create_file failed.\n");
+                        goto out_err;
+                }
+        }
+
+        adc->hwmon_dev = hwmon_device_register(&spi->dev);
+        if (IS_ERR(adc->hwmon_dev)) {
+                dev_err(&spi->dev, "hwmon_device_register failed.\n");
+                status = PTR_ERR(adc->hwmon_dev);
+                goto out_err;
+        }
+
+        mutex_unlock(&adc->lock);
+        return 0;
+
+out_err:
+        for (i--; i >= 0; i--)
+                device_remove_file(&spi->dev, &ad_input[i].dev_attr);
+
+        dev_set_drvdata(&spi->dev, NULL);
+        mutex_unlock(&adc->lock);
+        kfree(adc);
+        return status;
+}
+
+static int __devinit adcxx1s_probe(struct spi_device *spi)
+{
+        return adcxx_probe(spi, 1);
+}
+
+static int __devinit adcxx2s_probe(struct spi_device *spi)
+{
+        return adcxx_probe(spi, 2);
+}
+
+static int __devinit adcxx4s_probe(struct spi_device *spi)
+{
+        return adcxx_probe(spi, 4);
+}
+
+static int __devinit adcxx8s_probe(struct spi_device *spi)
+{
+        return adcxx_probe(spi, 8);
+}
+
+static int __devexit adcxx_remove(struct spi_device *spi)
+{
+        struct adcxx *adc = dev_get_drvdata(&spi->dev);
+        int i;
+
+        mutex_lock(&adc->lock);
+        hwmon_device_unregister(adc->hwmon_dev);
+        for (i = 0; i < 3 + adc->channels; i++)
+                device_remove_file(&spi->dev, &ad_input[i].dev_attr);
+
+        dev_set_drvdata(&spi->dev, NULL);
+        mutex_unlock(&adc->lock);
+        kfree(adc);
+
+        return 0;
+}
+
+static struct spi_driver adcxx1s_driver = {
+        .driver = {
+                .name   = "adcxx1s",
+                .owner  = THIS_MODULE,
+        },
+        .probe  = adcxx1s_probe,
+        .remove = __devexit_p(adcxx_remove),
+};
+
+static struct spi_driver adcxx2s_driver = {
+        .driver = {
+                .name   = "adcxx2s",
+                .owner  = THIS_MODULE,
+        },
+        .probe  = adcxx2s_probe,
+        .remove = __devexit_p(adcxx_remove),
+};
+
+static struct spi_driver adcxx4s_driver = {
+        .driver = {
+                .name   = "adcxx4s",
+                .owner  = THIS_MODULE,
+        },
+        .probe  = adcxx4s_probe,
+        .remove = __devexit_p(adcxx_remove),
+};
+
+static struct spi_driver adcxx8s_driver = {
+        .driver = {
+                .name   = "adcxx8s",
+                .owner  = THIS_MODULE,
+        },
+        .probe  = adcxx8s_probe,
+        .remove = __devexit_p(adcxx_remove),
+};
+
+static int __init init_adcxx(void)
+{
+        int status;
+        status = spi_register_driver(&adcxx1s_driver);
+        if (status)
+                goto reg_1_failed;
+
+        status = spi_register_driver(&adcxx2s_driver);
+        if (status)
+                goto reg_2_failed;
+
+        status = spi_register_driver(&adcxx4s_driver);
+        if (status)
+                goto reg_4_failed;
+
+        status = spi_register_driver(&adcxx8s_driver);
+        if (status)
+                goto reg_8_failed;
+
+        return status;
+
+reg_8_failed:
+        spi_unregister_driver(&adcxx4s_driver);
+reg_4_failed:
+        spi_unregister_driver(&adcxx2s_driver);
+reg_2_failed:
+        spi_unregister_driver(&adcxx1s_driver);
+reg_1_failed:
+        return status;
+}
+
+static void __exit exit_adcxx(void)
+{
+        spi_unregister_driver(&adcxx1s_driver);
+        spi_unregister_driver(&adcxx2s_driver);
+        spi_unregister_driver(&adcxx4s_driver);
+        spi_unregister_driver(&adcxx8s_driver);
+}
+
+module_init(init_adcxx);
+module_exit(exit_adcxx);
+
+MODULE_AUTHOR("Marc Pignat");
+MODULE_DESCRIPTION("National Semiconductor adcxx8sxxx Linux driver");
+MODULE_LICENSE("GPL");
+
+MODULE_ALIAS("adcxx1s");
+MODULE_ALIAS("adcxx2s");
+MODULE_ALIAS("adcxx4s");
+MODULE_ALIAS("adcxx8s");
diff --git a/drivers/hwmon/applesmc.c b/drivers/hwmon/applesmc.c
index aacc0c4b809c..b06b8e090a27 100644
--- a/drivers/hwmon/applesmc.c
+++ b/drivers/hwmon/applesmc.c
@@ -98,6 +98,12 @@ static const char* temperature_sensors_sets[][36] = {
           "TH1P", "TH2P", "TH3P", "TMAP", "TMAS", "TMBS", "TM0P", "TM0S",
           "TM1P", "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", "TM8S", "TM9P",
           "TM9S", "TN0H", "TS0C", NULL },
+/* Set 5: iMac */
+        { "TC0D", "TA0P", "TG0P", "TG0D", "TG0H", "TH0P", "Tm0P", "TO0P",
+          "Tp0C", NULL },
+/* Set 6: Macbook3 set */
+        { "TB0T", "TC0D", "TC0P", "TM0P", "TN0P", "TTF0", "TW0P", "Th0H",
+          "Th0S", "Th1H", NULL },
 };
 
 /* List of keys used to read/write fan speeds */
@@ -1223,6 +1229,10 @@ static __initdata struct dmi_match_data applesmc_dmi_data[] = {
         { .accelerometer = 0, .light = 0, .temperature_set = 3 },
 /* MacPro: temperature set 4 */
         { .accelerometer = 0, .light = 0, .temperature_set = 4 },
+/* iMac: temperature set 5 */
+        { .accelerometer = 0, .light = 0, .temperature_set = 5 },
+/* MacBook3: accelerometer and temperature set 6 */
+        { .accelerometer = 1, .light = 0, .temperature_set = 6 },
 };
 
 /* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1".
@@ -1232,10 +1242,14 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = {
           DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
           DMI_MATCH(DMI_PRODUCT_NAME,"MacBookPro") },
                 (void*)&applesmc_dmi_data[0]},
-        { applesmc_dmi_match, "Apple MacBook", {
+        { applesmc_dmi_match, "Apple MacBook (v2)", {
           DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
           DMI_MATCH(DMI_PRODUCT_NAME,"MacBook2") },
                 (void*)&applesmc_dmi_data[1]},
+        { applesmc_dmi_match, "Apple MacBook (v3)", {
+          DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
+          DMI_MATCH(DMI_PRODUCT_NAME,"MacBook3") },
+                (void*)&applesmc_dmi_data[6]},
         { applesmc_dmi_match, "Apple MacBook", {
           DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
           DMI_MATCH(DMI_PRODUCT_NAME,"MacBook") },
@@ -1248,6 +1262,10 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = {
           DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
           DMI_MATCH(DMI_PRODUCT_NAME,"MacPro2") },
                 (void*)&applesmc_dmi_data[4]},
+        { applesmc_dmi_match, "Apple iMac", {
+          DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
+          DMI_MATCH(DMI_PRODUCT_NAME,"iMac") },
+                (void*)&applesmc_dmi_data[5]},
         { .ident = NULL }
 };
 
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 70239acecc8e..93c17223b527 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -413,10 +413,11 @@ static int __init coretemp_init(void)
         for_each_online_cpu(i) {
                 struct cpuinfo_x86 *c = &cpu_data(i);
 
-                /* check if family 6, models 0xe, 0xf, 0x16, 0x17 */
+                /* check if family 6, models 0xe, 0xf, 0x16, 0x17, 0x1A */
                 if ((c->cpuid_level < 0) || (c->x86 != 0x6) ||
                     !((c->x86_model == 0xe) || (c->x86_model == 0xf) ||
-                        (c->x86_model == 0x16) || (c->x86_model == 0x17))) {
+                        (c->x86_model == 0x16) || (c->x86_model == 0x17) ||
+                        (c->x86_model == 0x1A))) {
 
                         /* supported CPU not found, but report the unknown
                            family 6 CPU */
diff --git a/drivers/hwmon/dme1737.c b/drivers/hwmon/dme1737.c
index 5e2cf0aef480..cdb8311e4ef7 100644
--- a/drivers/hwmon/dme1737.c
+++ b/drivers/hwmon/dme1737.c
@@ -1,11 +1,11 @@
 /*
- * dme1737.c - Driver for the SMSC DME1737, Asus A8000, and SMSC SCH311x
- *             Super-I/O chips integrated hardware monitoring features.
- * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com>
+ * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x and
+ *             SCH5027 Super-I/O chips integrated hardware monitoring features.
+ * Copyright (c) 2007, 2008 Juerg Haefliger <juergh@gmail.com>
  *
  * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
- * the chip registers if a DME1737 (or A8000) is found and the ISA bus if a
- * SCH311x chip is found. Both types of chips have very similar hardware
+ * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus
+ * if a SCH311x chip is found. Both types of chips have very similar hardware
  * monitoring capabilities but differ in the way they can be accessed.
  *
  * This program is free software; you can redistribute it and/or modify
@@ -57,7 +57,10 @@ MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC "
 static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
 
 /* Insmod parameters */
-I2C_CLIENT_INSMOD_1(dme1737);
+I2C_CLIENT_INSMOD_2(dme1737, sch5027);
+
+/* ISA chip types */
+enum isa_chips { sch311x = sch5027 + 1 };
 
 /* ---------------------------------------------------------------------
  * Registers
@@ -163,6 +166,7 @@ static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
 #define DME1737_VERSTEP         0x88
 #define DME1737_VERSTEP_MASK    0xf8
 #define SCH311X_DEVICE          0x8c
+#define SCH5027_VERSTEP         0x69
 
 /* Length of ISA address segment */
 #define DME1737_EXTENT  2
@@ -182,6 +186,7 @@ struct dme1737_data {
         unsigned long last_update;      /* in jiffies */
         unsigned long last_vbat;        /* in jiffies */
         enum chips type;
+        const int *in_nominal;          /* pointer to IN_NOMINAL array */
 
         u8 vid;
         u8 pwm_rr_en;
@@ -220,23 +225,23 @@ static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300,
                                          3300};
 static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300,
                                          3300};
-#define IN_NOMINAL(ix, type)    (((type) == dme1737) ? \
-                                IN_NOMINAL_DME1737[(ix)] : \
-                                IN_NOMINAL_SCH311x[(ix)])
+static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300,
+                                         3300};
+#define IN_NOMINAL(type)        ((type) == sch311x ? IN_NOMINAL_SCH311x : \
+                                 (type) == sch5027 ? IN_NOMINAL_SCH5027 : \
+                                 IN_NOMINAL_DME1737)
 
 /* Voltage input
  * Voltage inputs have 16 bits resolution, limit values have 8 bits
  * resolution. */
-static inline int IN_FROM_REG(int reg, int ix, int res, int type)
+static inline int IN_FROM_REG(int reg, int nominal, int res)
 {
-        return (reg * IN_NOMINAL(ix, type) + (3 << (res - 3))) /
-                (3 << (res - 2));
+        return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2));
 }
 
-static inline int IN_TO_REG(int val, int ix, int type)
+static inline int IN_TO_REG(int val, int nominal)
 {
-        return SENSORS_LIMIT((val * 192 + IN_NOMINAL(ix, type) / 2) /
-                             IN_NOMINAL(ix, type), 0, 255);
+        return SENSORS_LIMIT((val * 192 + nominal / 2) / nominal, 0, 255);
 }
 
 /* Temperature input
@@ -565,7 +570,10 @@ static struct dme1737_data *dme1737_update_device(struct device *dev)
 
         /* Sample register contents every 1 sec */
         if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
-                data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f;
+                if (data->type != sch5027) {
+                        data->vid = dme1737_read(client, DME1737_REG_VID) &
+                                0x3f;
+                }
 
                 /* In (voltage) registers */
                 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
@@ -593,8 +601,10 @@ static struct dme1737_data *dme1737_update_device(struct device *dev)
                                         DME1737_REG_TEMP_MIN(ix));
                         data->temp_max[ix] = dme1737_read(client,
                                         DME1737_REG_TEMP_MAX(ix));
-                        data->temp_offset[ix] = dme1737_read(client,
-                                        DME1737_REG_TEMP_OFFSET(ix));
+                        if (data->type != sch5027) {
+                                data->temp_offset[ix] = dme1737_read(client,
+                                                DME1737_REG_TEMP_OFFSET(ix));
+                        }
                 }
 
                 /* In and temp LSB registers
@@ -669,9 +679,11 @@ static struct dme1737_data *dme1737_update_device(struct device *dev)
                         data->zone_abs[ix] = dme1737_read(client,
                                         DME1737_REG_ZONE_ABS(ix));
                 }
-                for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
-                        data->zone_hyst[ix] = dme1737_read(client,
+                if (data->type != sch5027) {
+                        for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
+                                data->zone_hyst[ix] = dme1737_read(client,
                                                 DME1737_REG_ZONE_HYST(ix));
+                        }
                 }
 
                 /* Alarm registers */
@@ -735,13 +747,13 @@ static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 
         switch (fn) {
         case SYS_IN_INPUT:
-                res = IN_FROM_REG(data->in[ix], ix, 16, data->type);
+                res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16);
                 break;
         case SYS_IN_MIN:
-                res = IN_FROM_REG(data->in_min[ix], ix, 8, data->type);
+                res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8);
                 break;
         case SYS_IN_MAX:
-                res = IN_FROM_REG(data->in_max[ix], ix, 8, data->type);
+                res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8);
                 break;
         case SYS_IN_ALARM:
                 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
@@ -768,12 +780,12 @@ static ssize_t set_in(struct device *dev, struct device_attribute *attr,
         mutex_lock(&data->update_lock);
         switch (fn) {
         case SYS_IN_MIN:
-                data->in_min[ix] = IN_TO_REG(val, ix, data->type);
+                data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]);
                 dme1737_write(client, DME1737_REG_IN_MIN(ix),
                               data->in_min[ix]);
                 break;
         case SYS_IN_MAX:
-                data->in_max[ix] = IN_TO_REG(val, ix, data->type);
+                data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]);
                 dme1737_write(client, DME1737_REG_IN_MAX(ix),
                               data->in_max[ix]);
                 break;
@@ -1166,7 +1178,7 @@ static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
         return sprintf(buf, "%d\n", res);
 }
 
-static struct attribute *dme1737_attr_pwm[];
+static struct attribute *dme1737_pwm_chmod_attr[];
 static void dme1737_chmod_file(struct device*, struct attribute*, mode_t);
 
 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
@@ -1230,7 +1242,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
                 switch (val) {
                 case 0:
                         /* Change permissions of pwm[ix] to read-only */
-                        dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
+                        dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
                                            S_IRUGO);
                         /* Turn fan fully on */
                         data->pwm_config[ix] = PWM_EN_TO_REG(0,
@@ -1245,12 +1257,12 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
                         dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
                                       data->pwm_config[ix]);
                         /* Change permissions of pwm[ix] to read-writeable */
-                        dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
+                        dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
                                            S_IRUGO | S_IWUSR);
                         break;
                 case 2:
                         /* Change permissions of pwm[ix] to read-only */
-                        dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
+                        dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
                                            S_IRUGO);
                         /* Turn on auto mode using the saved zone channel
                          * assignment */
@@ -1570,88 +1582,98 @@ static struct attribute *dme1737_attr[] ={
         &sensor_dev_attr_temp1_max.dev_attr.attr,
         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
         &sensor_dev_attr_temp1_fault.dev_attr.attr,
-        &sensor_dev_attr_temp1_offset.dev_attr.attr,
         &sensor_dev_attr_temp2_input.dev_attr.attr,
         &sensor_dev_attr_temp2_min.dev_attr.attr,
         &sensor_dev_attr_temp2_max.dev_attr.attr,
         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
         &sensor_dev_attr_temp2_fault.dev_attr.attr,
-        &sensor_dev_attr_temp2_offset.dev_attr.attr,
         &sensor_dev_attr_temp3_input.dev_attr.attr,
         &sensor_dev_attr_temp3_min.dev_attr.attr,
         &sensor_dev_attr_temp3_max.dev_attr.attr,
         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
         &sensor_dev_attr_temp3_fault.dev_attr.attr,
-        &sensor_dev_attr_temp3_offset.dev_attr.attr,
         /* Zones */
-        &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
         &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
         &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
         &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
         &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr,
-        &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
         &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
         &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
         &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
         &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr,
-        &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
         &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
         &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
         &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
         &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr,
+        NULL
+};
+
+static const struct attribute_group dme1737_group = {
+        .attrs = dme1737_attr,
+};
+
+/* The following struct holds misc attributes, which are not available in all
+ * chips. Their creation depends on the chip type which is determined during
+ * module load. */
+static struct attribute *dme1737_misc_attr[] = {
+        /* Temperatures */
+        &sensor_dev_attr_temp1_offset.dev_attr.attr,
+        &sensor_dev_attr_temp2_offset.dev_attr.attr,
+        &sensor_dev_attr_temp3_offset.dev_attr.attr,
+        /* Zones */
+        &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
+        &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
+        &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
         /* Misc */
         &dev_attr_vrm.attr,
         &dev_attr_cpu0_vid.attr,
         NULL
 };
 
-static const struct attribute_group dme1737_group = {
-        .attrs = dme1737_attr,
+static const struct attribute_group dme1737_misc_group = {
+        .attrs = dme1737_misc_attr,
 };
 
 /* The following structs hold the PWM attributes, some of which are optional.
  * Their creation depends on the chip configuration which is determined during
  * module load. */
-static struct attribute *dme1737_attr_pwm1[] = {
+static struct attribute *dme1737_pwm1_attr[] = {
         &sensor_dev_attr_pwm1.dev_attr.attr,
         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
         &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
         &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
-        &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_pwm2[] = {
+static struct attribute *dme1737_pwm2_attr[] = {
         &sensor_dev_attr_pwm2.dev_attr.attr,
         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
         &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
         &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
-        &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_pwm3[] = {
+static struct attribute *dme1737_pwm3_attr[] = {
         &sensor_dev_attr_pwm3.dev_attr.attr,
         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
         &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
         &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
-        &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_pwm5[] = {
+static struct attribute *dme1737_pwm5_attr[] = {
         &sensor_dev_attr_pwm5.dev_attr.attr,
         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_pwm6[] = {
+static struct attribute *dme1737_pwm6_attr[] = {
         &sensor_dev_attr_pwm6.dev_attr.attr,
         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
@@ -1659,53 +1681,62 @@ static struct attribute *dme1737_attr_pwm6[] = {
 };
 
 static const struct attribute_group dme1737_pwm_group[] = {
-        { .attrs = dme1737_attr_pwm1 },
-        { .attrs = dme1737_attr_pwm2 },
-        { .attrs = dme1737_attr_pwm3 },
+        { .attrs = dme1737_pwm1_attr },
+        { .attrs = dme1737_pwm2_attr },
+        { .attrs = dme1737_pwm3_attr },
         { .attrs = NULL },
-        { .attrs = dme1737_attr_pwm5 },
-        { .attrs = dme1737_attr_pwm6 },
+        { .attrs = dme1737_pwm5_attr },
+        { .attrs = dme1737_pwm6_attr },
+};
+
+/* The following struct holds misc PWM attributes, which are not available in
+ * all chips. Their creation depends on the chip type which is determined
+ * during module load. */
+static struct attribute *dme1737_pwm_misc_attr[] = {
+        &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
+        &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
+        &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
 };
 
 /* The following structs hold the fan attributes, some of which are optional.
  * Their creation depends on the chip configuration which is determined during
  * module load. */
-static struct attribute *dme1737_attr_fan1[] = {
+static struct attribute *dme1737_fan1_attr[] = {
         &sensor_dev_attr_fan1_input.dev_attr.attr,
         &sensor_dev_attr_fan1_min.dev_attr.attr,
         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
         &sensor_dev_attr_fan1_type.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_fan2[] = {
+static struct attribute *dme1737_fan2_attr[] = {
         &sensor_dev_attr_fan2_input.dev_attr.attr,
         &sensor_dev_attr_fan2_min.dev_attr.attr,
         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
         &sensor_dev_attr_fan2_type.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_fan3[] = {
+static struct attribute *dme1737_fan3_attr[] = {
         &sensor_dev_attr_fan3_input.dev_attr.attr,
         &sensor_dev_attr_fan3_min.dev_attr.attr,
         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
         &sensor_dev_attr_fan3_type.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_fan4[] = {
+static struct attribute *dme1737_fan4_attr[] = {
         &sensor_dev_attr_fan4_input.dev_attr.attr,
         &sensor_dev_attr_fan4_min.dev_attr.attr,
         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
         &sensor_dev_attr_fan4_type.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_fan5[] = {
+static struct attribute *dme1737_fan5_attr[] = {
         &sensor_dev_attr_fan5_input.dev_attr.attr,
         &sensor_dev_attr_fan5_min.dev_attr.attr,
         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
         &sensor_dev_attr_fan5_max.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_fan6[] = {
+static struct attribute *dme1737_fan6_attr[] = {
         &sensor_dev_attr_fan6_input.dev_attr.attr,
         &sensor_dev_attr_fan6_min.dev_attr.attr,
         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
@@ -1714,94 +1745,83 @@ static struct attribute *dme1737_attr_fan6[] = {
 };
 
 static const struct attribute_group dme1737_fan_group[] = {
-        { .attrs = dme1737_attr_fan1 },
-        { .attrs = dme1737_attr_fan2 },
-        { .attrs = dme1737_attr_fan3 },
-        { .attrs = dme1737_attr_fan4 },
-        { .attrs = dme1737_attr_fan5 },
-        { .attrs = dme1737_attr_fan6 },
+        { .attrs = dme1737_fan1_attr },
+        { .attrs = dme1737_fan2_attr },
+        { .attrs = dme1737_fan3_attr },
+        { .attrs = dme1737_fan4_attr },
+        { .attrs = dme1737_fan5_attr },
+        { .attrs = dme1737_fan6_attr },
 };
 
-/* The permissions of all of the following attributes are changed to read-
+/* The permissions of the following zone attributes are changed to read-
  * writeable if the chip is *not* locked. Otherwise they stay read-only. */
-static struct attribute *dme1737_attr_lock[] = {
-        /* Temperatures */
-        &sensor_dev_attr_temp1_offset.dev_attr.attr,
-        &sensor_dev_attr_temp2_offset.dev_attr.attr,
-        &sensor_dev_attr_temp3_offset.dev_attr.attr,
-        /* Zones */
-        &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
+static struct attribute *dme1737_zone_chmod_attr[] = {
         &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
         &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
         &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
-        &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
         &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
         &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
         &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
-        &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
         &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
         &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
         &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
         NULL
 };
 
-static const struct attribute_group dme1737_lock_group = {
-        .attrs = dme1737_attr_lock,
+static const struct attribute_group dme1737_zone_chmod_group = {
+        .attrs = dme1737_zone_chmod_attr,
 };
 
 /* The permissions of the following PWM attributes are changed to read-
  * writeable if the chip is *not* locked and the respective PWM is available.
  * Otherwise they stay read-only. */
-static struct attribute *dme1737_attr_pwm1_lock[] = {
+static struct attribute *dme1737_pwm1_chmod_attr[] = {
         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
         &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
         &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
-        &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_pwm2_lock[] = {
+static struct attribute *dme1737_pwm2_chmod_attr[] = {
         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
         &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
         &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
-        &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_pwm3_lock[] = {
+static struct attribute *dme1737_pwm3_chmod_attr[] = {
         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
         &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
         &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
-        &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_pwm5_lock[] = {
+static struct attribute *dme1737_pwm5_chmod_attr[] = {
         &sensor_dev_attr_pwm5.dev_attr.attr,
         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
         NULL
 };
-static struct attribute *dme1737_attr_pwm6_lock[] = {
+static struct attribute *dme1737_pwm6_chmod_attr[] = {
         &sensor_dev_attr_pwm6.dev_attr.attr,
         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
         NULL
 };
 
-static const struct attribute_group dme1737_pwm_lock_group[] = {
-        { .attrs = dme1737_attr_pwm1_lock },
-        { .attrs = dme1737_attr_pwm2_lock },
-        { .attrs = dme1737_attr_pwm3_lock },
+static const struct attribute_group dme1737_pwm_chmod_group[] = {
+        { .attrs = dme1737_pwm1_chmod_attr },
+        { .attrs = dme1737_pwm2_chmod_attr },
+        { .attrs = dme1737_pwm3_chmod_attr },
         { .attrs = NULL },
-        { .attrs = dme1737_attr_pwm5_lock },
-        { .attrs = dme1737_attr_pwm6_lock },
+        { .attrs = dme1737_pwm5_chmod_attr },
+        { .attrs = dme1737_pwm6_chmod_attr },
 };
 
 /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
  * chip is not locked. Otherwise they are read-only. */
-static struct attribute *dme1737_attr_pwm[] = {
+static struct attribute *dme1737_pwm_chmod_attr[] = {
         &sensor_dev_attr_pwm1.dev_attr.attr,
         &sensor_dev_attr_pwm2.dev_attr.attr,
         &sensor_dev_attr_pwm3.dev_attr.attr,
@@ -1875,9 +1895,17 @@ static void dme1737_remove_files(struct device *dev)
                 if (data->has_pwm & (1 << ix)) {
                         sysfs_remove_group(&dev->kobj,
                                            &dme1737_pwm_group[ix]);
+                        if (data->type != sch5027 && ix < 3) {
+                                sysfs_remove_file(&dev->kobj,
+                                                  dme1737_pwm_misc_attr[ix]);
+                        }
                 }
         }
 
+        if (data->type != sch5027) {
+                sysfs_remove_group(&dev->kobj, &dme1737_misc_group);
+        }
+
         sysfs_remove_group(&dev->kobj, &dme1737_group);
 
         if (!data->client.driver) {
@@ -1901,6 +1929,13 @@ static int dme1737_create_files(struct device *dev)
                 goto exit_remove;
         }
 
+        /* Create misc sysfs attributes */
+        if ((data->type != sch5027) &&
+            (err = sysfs_create_group(&dev->kobj,
+                                      &dme1737_misc_group))) {
+                goto exit_remove;
+        }
+
         /* Create fan sysfs attributes */
         for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
                 if (data->has_fan & (1 << ix)) {
@@ -1918,6 +1953,11 @@ static int dme1737_create_files(struct device *dev)
                                                 &dme1737_pwm_group[ix]))) {
                                 goto exit_remove;
                         }
+                        if (data->type != sch5027 && ix < 3 &&
+                            (err = sysfs_create_file(&dev->kobj,
+                                                dme1737_pwm_misc_attr[ix]))) {
+                                goto exit_remove;
+                        }
                 }
         }
 
@@ -1927,16 +1967,27 @@ static int dme1737_create_files(struct device *dev)
                 dev_info(dev, "Device is locked. Some attributes "
                          "will be read-only.\n");
         } else {
-                /* Change permissions of standard attributes */
-                dme1737_chmod_group(dev, &dme1737_lock_group,
+                /* Change permissions of zone sysfs attributes */
+                dme1737_chmod_group(dev, &dme1737_zone_chmod_group,
                                     S_IRUGO | S_IWUSR);
 
-                /* Change permissions of PWM attributes */
-                for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) {
+                /* Change permissions of misc sysfs attributes */
+                if (data->type != sch5027) {
+                        dme1737_chmod_group(dev, &dme1737_misc_group,
+                                            S_IRUGO | S_IWUSR);
+                }
+
+                /* Change permissions of PWM sysfs attributes */
+                for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) {
                         if (data->has_pwm & (1 << ix)) {
                                 dme1737_chmod_group(dev,
-                                                &dme1737_pwm_lock_group[ix],
+                                                &dme1737_pwm_chmod_group[ix],
+                                                S_IRUGO | S_IWUSR);
+                                if (data->type != sch5027 && ix < 3) {
+                                        dme1737_chmod_file(dev,
+                                                dme1737_pwm_misc_attr[ix],
                                                 S_IRUGO | S_IWUSR);
+                                }
                         }
                 }
 
@@ -1945,7 +1996,7 @@ static int dme1737_create_files(struct device *dev)
                         if ((data->has_pwm & (1 << ix)) &&
                             (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
                                 dme1737_chmod_file(dev,
-                                                dme1737_attr_pwm[ix],
+                                                dme1737_pwm_chmod_attr[ix],
                                                 S_IRUGO | S_IWUSR);
                         }
                 }
@@ -1966,6 +2017,9 @@ static int dme1737_init_device(struct device *dev)
         int ix;
         u8 reg;
 
+        /* Point to the right nominal voltages array */
+        data->in_nominal = IN_NOMINAL(data->type);
+
         data->config = dme1737_read(client, DME1737_REG_CONFIG);
         /* Inform if part is not monitoring/started */
         if (!(data->config & 0x01)) {
@@ -2076,7 +2130,9 @@ static int dme1737_init_device(struct device *dev)
         data->pwm_acz[2] = 4;   /* pwm3 -> zone3 */
 
         /* Set VRM */
-        data->vrm = vid_which_vrm();
+        if (data->type != sch5027) {
+                data->vrm = vid_which_vrm();
+        }
 
         return 0;
 }
@@ -2095,9 +2151,10 @@ static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
         dme1737_sio_enter(sio_cip);
 
         /* Check device ID
-         * The DME1737 can return either 0x78 or 0x77 as its device ID. */
+         * The DME1737 can return either 0x78 or 0x77 as its device ID.
+         * The SCH5027 returns 0x89 as its device ID. */
         reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
-        if (!(reg == 0x77 || reg == 0x78)) {
+        if (!(reg == 0x77 || reg == 0x78 || reg == 0x89)) {
                 err = -ENODEV;
                 goto exit;
         }
@@ -2166,15 +2223,24 @@ static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
                 company = dme1737_read(client, DME1737_REG_COMPANY);
                 verstep = dme1737_read(client, DME1737_REG_VERSTEP);
 
-                if (!((company == DME1737_COMPANY_SMSC) &&
-                      ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) {
+                if (company == DME1737_COMPANY_SMSC &&
+                    (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) {
+                        kind = dme1737;
+                } else if (company == DME1737_COMPANY_SMSC &&
+                           verstep == SCH5027_VERSTEP) {
+                        kind = sch5027;
+                } else {
                         err = -ENODEV;
                         goto exit_kfree;
                 }
         }
 
-        kind = dme1737;
-        name = "dme1737";
+        if (kind == sch5027) {
+                name = "sch5027";
+        } else {
+                kind = dme1737;
+                name = "dme1737";
+        }
         data->type = kind;
 
         /* Fill in the remaining client fields and put it into the global
@@ -2187,8 +2253,9 @@ static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
                 goto exit_kfree;
         }
 
-        dev_info(dev, "Found a DME1737 chip at 0x%02x (rev 0x%02x).\n",
-                 client->addr, verstep);
+        dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x).\n",
+                 kind == sch5027 ? "SCH5027" : "DME1737", client->addr,
+                 verstep);
 
         /* Initialize the DME1737 chip */
         if ((err = dme1737_init_device(dev))) {
@@ -2360,15 +2427,18 @@ static int __devinit dme1737_isa_probe(struct platform_device *pdev)
         client->addr = res->start;
         platform_set_drvdata(pdev, data);
 
-        company = dme1737_read(client, DME1737_REG_COMPANY);
-        device = dme1737_read(client, DME1737_REG_DEVICE);
+        /* Skip chip detection if module is loaded with force_id parameter */
+        if (!force_id) {
+                company = dme1737_read(client, DME1737_REG_COMPANY);
+                device = dme1737_read(client, DME1737_REG_DEVICE);
 
-        if (!((company == DME1737_COMPANY_SMSC) &&
-              (device == SCH311X_DEVICE))) {
-                err = -ENODEV;
-                goto exit_kfree;
+                if (!((company == DME1737_COMPANY_SMSC) &&
+                      (device == SCH311X_DEVICE))) {
+                        err = -ENODEV;
+                        goto exit_kfree;
+                }
         }
-        data->type = -1;
+        data->type = sch311x;
 
         /* Fill in the remaining client fields and initialize the mutex */
         strlcpy(client->name, "sch311x", I2C_NAME_SIZE);
diff --git a/drivers/hwmon/f71882fg.c b/drivers/hwmon/f71882fg.c
index cbeb4984b5c7..67067e9a323e 100644
--- a/drivers/hwmon/f71882fg.c
+++ b/drivers/hwmon/f71882fg.c
@@ -87,8 +87,6 @@ static inline void superio_enter(int base);
 static inline void superio_select(int base, int ld);
 static inline void superio_exit(int base);
 
-static inline u16 fan_from_reg ( u16 reg );
-
 struct f71882fg_data {
         unsigned short addr;
         struct device *hwmon_dev;
@@ -116,10 +114,6 @@ struct f71882fg_data {
         u8      temp_diode_open;
 };
 
-static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg);
-static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg);
-static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val);
-
 /* Sysfs in*/
 static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
         char *buf);
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c
index 3330667280b9..c54eff92be4a 100644
--- a/drivers/hwmon/hwmon-vid.c
+++ b/drivers/hwmon/hwmon-vid.c
@@ -1,76 +1,82 @@
 /*
-    hwmon-vid.c - VID/VRM/VRD voltage conversions
-
-    Copyright (c) 2004 Rudolf Marek <r.marek@assembler.cz>
-
-    Partly imported from i2c-vid.h of the lm_sensors project
-    Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
-    With assistance from Trent Piepho <xyzzy@speakeasy.org>
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
+ * hwmon-vid.c - VID/VRM/VRD voltage conversions
+ *
+ * Copyright (c) 2004 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * Partly imported from i2c-vid.h of the lm_sensors project
+ * Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
+ * With assistance from Trent Piepho <xyzzy@speakeasy.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
 
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/hwmon-vid.h>
 
 /*
-    Common code for decoding VID pins.
-
-    References:
-
-    For VRM 8.4 to 9.1, "VRM x.y DC-DC Converter Design Guidelines",
-    available at http://developer.intel.com/.
-
-    For VRD 10.0 and up, "VRD x.y Design Guide",
-    available at http://developer.intel.com/.
-
-    AMD Opteron processors don't follow the Intel specifications.
-    I'm going to "make up" 2.4 as the spec number for the Opterons.
-    No good reason just a mnemonic for the 24x Opteron processor
-    series.
-
-    Opteron VID encoding is:
-       00000  =  1.550 V
-       00001  =  1.525 V
-        . . . .
-       11110  =  0.800 V
-       11111  =  0.000 V (off)
-
-    The 17 specification is in fact Intel Mobile Voltage Positioning -
-    (IMVP-II). You can find more information in the datasheet of Max1718
-    http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452
-
-    The 13 specification corresponds to the Intel Pentium M series. There
-    doesn't seem to be any named specification for these. The conversion
-    tables are detailed directly in the various Pentium M datasheets:
-    http://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm
-
-    The 14 specification corresponds to Intel Core series. There
-    doesn't seem to be any named specification for these. The conversion
-    tables are detailed directly in the various Pentium Core datasheets:
-    http://www.intel.com/design/mobile/datashts/309221.htm
-
-    The 110 (VRM 11) specification corresponds to Intel Conroe based series.
-    http://www.intel.com/design/processor/applnots/313214.htm
-*/
-
-/* vrm is the VRM/VRD document version multiplied by 10.
-   val is the 4-bit or more VID code.
-   Returned value is in mV to avoid floating point in the kernel.
-   Some VID have some bits in uV scale, this is rounded to mV */
+ * Common code for decoding VID pins.
+ *
+ * References:
+ *
+ * For VRM 8.4 to 9.1, "VRM x.y DC-DC Converter Design Guidelines",
+ * available at http://developer.intel.com/.
+ *
+ * For VRD 10.0 and up, "VRD x.y Design Guide",
+ * available at http://developer.intel.com/.
+ *
+ * AMD Athlon 64 and AMD Opteron Processors, AMD Publication 26094,
+ * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/26094.PDF
+ * Table 74. VID Code Voltages
+ * This corresponds to an arbitrary VRM code of 24 in the functions below.
+ * These CPU models (K8 revision <= E) have 5 VID pins. See also:
+ * Revision Guide for AMD Athlon 64 and AMD Opteron Processors, AMD Publication 25759,
+ * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25759.pdf
+ *
+ * AMD NPT Family 0Fh Processors, AMD Publication 32559,
+ * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf
+ * Table 71. VID Code Voltages
+ * This corresponds to an arbitrary VRM code of 25 in the functions below.
+ * These CPU models (K8 revision >= F) have 6 VID pins. See also:
+ * Revision Guide for AMD NPT Family 0Fh Processors, AMD Publication 33610,
+ * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
+ *
+ * The 17 specification is in fact Intel Mobile Voltage Positioning -
+ * (IMVP-II). You can find more information in the datasheet of Max1718
+ * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452
+ *
+ * The 13 specification corresponds to the Intel Pentium M series. There
+ * doesn't seem to be any named specification for these. The conversion
+ * tables are detailed directly in the various Pentium M datasheets:
+ * http://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm
+ *
+ * The 14 specification corresponds to Intel Core series. There
+ * doesn't seem to be any named specification for these. The conversion
+ * tables are detailed directly in the various Pentium Core datasheets:
+ * http://www.intel.com/design/mobile/datashts/309221.htm
+ *
+ * The 110 (VRM 11) specification corresponds to Intel Conroe based series.
+ * http://www.intel.com/design/processor/applnots/313214.htm
+ */
+
+/*
+ * vrm is the VRM/VRD document version multiplied by 10.
+ * val is the 4-bit or more VID code.
+ * Returned value is in mV to avoid floating point in the kernel.
+ * Some VID have some bits in uV scale, this is rounded to mV.
+ */
 int vid_from_reg(int val, u8 vrm)
 {
         int vid;
@@ -96,9 +102,16 @@ int vid_from_reg(int val, u8 vrm)
                 if (val < 0x02 || val > 0xb2)
                         return 0;
                 return((1600000 - (val - 2) * 6250 + 500) / 1000);
-        case 24:                /* Opteron processor */
+
+        case 24:                /* Athlon64 & Opteron */
                 val &= 0x1f;
-                return(val == 0x1f ? 0 : 1550 - val * 25);
+                if (val == 0x1f)
+                        return 0;
+                                /* fall through */
+        case 25:                /* AMD NPT 0Fh */
+                val &= 0x3f;
+                return (val < 32) ? 1550 - 25 * val
+                        : 775 - (25 * (val - 31)) / 2;
 
         case 91:                /* VRM 9.1 */
         case 90:                /* VRM 9.0 */
@@ -141,9 +154,9 @@ int vid_from_reg(int val, u8 vrm)
 
 
 /*
-    After this point is the code to automatically determine which
-    VRM/VRD specification should be used depending on the CPU.
-*/
+ * After this point is the code to automatically determine which
+ * VRM/VRD specification should be used depending on the CPU.
+ */
 
 struct vrm_model {
         u8 vendor;
@@ -157,11 +170,16 @@ struct vrm_model {
 
 #ifdef CONFIG_X86
 
-/* the stepping parameter is highest acceptable stepping for current line */
+/*
+ * The stepping parameter is highest acceptable stepping for current line.
+ * The model match must be exact for 4-bit values. For model values 0x10
+ * and above (extended model), all models below the parameter will match.
+ */
 
 static struct vrm_model vrm_models[] = {
         {X86_VENDOR_AMD, 0x6, ANY, ANY, 90},            /* Athlon Duron etc */
-        {X86_VENDOR_AMD, 0xF, ANY, ANY, 24},            /* Athlon 64, Opteron and above VRM 24 */
+        {X86_VENDOR_AMD, 0xF, 0x3F, ANY, 24},           /* Athlon 64, Opteron */
+        {X86_VENDOR_AMD, 0xF, ANY, ANY, 25},            /* NPT family 0Fh */
         {X86_VENDOR_INTEL, 0x6, 0x9, ANY, 13},          /* Pentium M (130 nm) */
         {X86_VENDOR_INTEL, 0x6, 0xB, ANY, 85},          /* Tualatin */
         {X86_VENDOR_INTEL, 0x6, 0xD, ANY, 13},          /* Pentium M (90 nm) */
@@ -189,6 +207,8 @@ static u8 find_vrm(u8 eff_family, u8 eff_model, u8 eff_stepping, u8 vendor)
                 if (vrm_models[i].vendor==vendor)
                         if ((vrm_models[i].eff_family==eff_family)
                          && ((vrm_models[i].eff_model==eff_model) ||
+                             (vrm_models[i].eff_model >= 0x10 &&
+                              eff_model <= vrm_models[i].eff_model) ||
                              (vrm_models[i].eff_model==ANY)) &&
                              (eff_stepping <= vrm_models[i].eff_stepping))
                                 return vrm_models[i].vrm_type;
diff --git a/drivers/hwmon/i5k_amb.c b/drivers/hwmon/i5k_amb.c
index f9e2ed621f7b..2ede9388096b 100644
--- a/drivers/hwmon/i5k_amb.c
+++ b/drivers/hwmon/i5k_amb.c
@@ -81,6 +81,8 @@ static unsigned long amb_reg_temp(unsigned int amb)
 #define MAX_AMBS_PER_CHANNEL            16
 #define MAX_AMBS                        (MAX_MEM_CHANNELS * \
                                          MAX_AMBS_PER_CHANNEL)
+#define CHANNEL_SHIFT                   4
+#define DIMM_MASK                       0xF
 /*
  * Ugly hack: For some reason the highest bit is set if there
  * are _any_ DIMMs in the channel.  Attempting to read from
@@ -89,7 +91,7 @@ static unsigned long amb_reg_temp(unsigned int amb)
  * might prevent us from seeing the 16th DIMM in the channel.
  */
 #define REAL_MAX_AMBS_PER_CHANNEL       15
-#define KNOBS_PER_AMB                   5
+#define KNOBS_PER_AMB                   6
 
 static unsigned long amb_num_from_reg(unsigned int byte_num, unsigned int bit)
 {
@@ -238,6 +240,16 @@ static ssize_t show_amb_temp(struct device *dev,
                 500 * amb_read_byte(data, amb_reg_temp(attr->index)));
 }
 
+static ssize_t show_label(struct device *dev,
+                          struct device_attribute *devattr,
+                          char *buf)
+{
+        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+
+        return sprintf(buf, "Ch. %d DIMM %d\n", attr->index >> CHANNEL_SHIFT,
+                       attr->index & DIMM_MASK);
+}
+
 static int __devinit i5k_amb_hwmon_init(struct platform_device *pdev)
 {
         int i, j, k, d = 0;
@@ -268,6 +280,20 @@ static int __devinit i5k_amb_hwmon_init(struct platform_device *pdev)
                                 continue;
                         d++;
 
+                        /* sysfs label */
+                        iattr = data->attrs + data->num_attrs;
+                        snprintf(iattr->name, AMB_SYSFS_NAME_LEN,
+                                 "temp%d_label", d);
+                        iattr->s_attr.dev_attr.attr.name = iattr->name;
+                        iattr->s_attr.dev_attr.attr.mode = S_IRUGO;
+                        iattr->s_attr.dev_attr.show = show_label;
+                        iattr->s_attr.index = k;
+                        res = device_create_file(&pdev->dev,
+                                                 &iattr->s_attr.dev_attr);
+                        if (res)
+                                goto exit_remove;
+                        data->num_attrs++;
+
                         /* Temperature sysfs knob */
                         iattr = data->attrs + data->num_attrs;
                         snprintf(iattr->name, AMB_SYSFS_NAME_LEN,
diff --git a/drivers/hwmon/ibmaem.c b/drivers/hwmon/ibmaem.c
index c9416e657487..0f70dc204105 100644
--- a/drivers/hwmon/ibmaem.c
+++ b/drivers/hwmon/ibmaem.c
@@ -1,6 +1,6 @@
 /*
- * A hwmon driver for the IBM Active Energy Manager temperature/power sensors
- * and capping functionality.
+ * A hwmon driver for the IBM System Director Active Energy Manager (AEM)
+ * temperature/power/energy sensors and capping functionality.
  * Copyright (C) 2008 IBM
  *
  * Author: Darrick J. Wong <djwong@us.ibm.com>
@@ -463,12 +463,18 @@ static int aem_read_sensor(struct aem_data *data, u8 elt, u8 reg,
 }
 
 /* Update AEM energy registers */
+static void update_aem_energy_one(struct aem_data *data, int which)
+{
+        aem_read_sensor(data, AEM_ENERGY_ELEMENT, which,
+                        &data->energy[which], 8);
+}
+
 static void update_aem_energy(struct aem_data *data)
 {
-        aem_read_sensor(data, AEM_ENERGY_ELEMENT, 0, &data->energy[0], 8);
+        update_aem_energy_one(data, 0);
         if (data->ver_major < 2)
                 return;
-        aem_read_sensor(data, AEM_ENERGY_ELEMENT, 1, &data->energy[1], 8);
+        update_aem_energy_one(data, 1);
 }
 
 /* Update all AEM1 sensors */
@@ -676,7 +682,8 @@ static int aem_find_aem2(struct aem_ipmi_data *data,
                 return -ETIMEDOUT;
 
         if (data->rx_result || data->rx_msg_len != sizeof(*fi_resp) ||
-            memcmp(&fi_resp->id, &system_x_id, sizeof(system_x_id)))
+            memcmp(&fi_resp->id, &system_x_id, sizeof(system_x_id)) ||
+            fi_resp->num_instances <= instance_num)
                 return -ENOENT;
 
         return 0;
@@ -849,7 +856,7 @@ static ssize_t aem_show_power(struct device *dev,
         struct timespec b, a;
 
         mutex_lock(&data->lock);
-        update_aem_energy(data);
+        update_aem_energy_one(data, attr->index);
         getnstimeofday(&b);
         before = data->energy[attr->index];
 
@@ -861,7 +868,7 @@ static ssize_t aem_show_power(struct device *dev,
                 return 0;
         }
 
-        update_aem_energy(data);
+        update_aem_energy_one(data, attr->index);
         getnstimeofday(&a);
         after = data->energy[attr->index];
         mutex_unlock(&data->lock);
@@ -880,7 +887,9 @@ static ssize_t aem_show_energy(struct device *dev,
 {
         struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
         struct aem_data *a = dev_get_drvdata(dev);
-        a->update(a);
+        mutex_lock(&a->lock);
+        update_aem_energy_one(a, attr->index);
+        mutex_unlock(&a->lock);
 
         return sprintf(buf, "%llu\n",
                         (unsigned long long)a->energy[attr->index] * 1000);
@@ -1104,7 +1113,7 @@ static void __exit aem_exit(void)
 }
 
 MODULE_AUTHOR("Darrick J. Wong <djwong@us.ibm.com>");
-MODULE_DESCRIPTION("IBM Active Energy Manager power/temp sensor driver");
+MODULE_DESCRIPTION("IBM AEM power/temp/energy sensor driver");
 MODULE_LICENSE("GPL");
 
 module_init(aem_init);
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
index e12c132ff83a..30cdb0956779 100644
--- a/drivers/hwmon/it87.c
+++ b/drivers/hwmon/it87.c
@@ -151,9 +151,9 @@ static int fix_pwm_polarity;
 /* The IT8718F has the VID value in a different register, in Super-I/O
    configuration space. */
 #define IT87_REG_VID           0x0a
-/* Warning: register 0x0b is used for something completely different in
-   new chips/revisions. I suspect only 16-bit tachometer mode will work
-   for these. */
+/* The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
+   for fan divisors. Later IT8712F revisions must use 16-bit tachometer
+   mode. */
 #define IT87_REG_FAN_DIV       0x0b
 #define IT87_REG_FAN_16BIT     0x0c
 
@@ -234,6 +234,7 @@ static const unsigned int pwm_freq[8] = {
 struct it87_sio_data {
         enum chips type;
         /* Values read from Super-I/O config space */
+        u8 revision;
         u8 vid_value;
 };
 
@@ -242,6 +243,7 @@ struct it87_sio_data {
 struct it87_data {
         struct device *hwmon_dev;
         enum chips type;
+        u8 revision;
 
         unsigned short addr;
         const char *name;
@@ -268,6 +270,16 @@ struct it87_data {
         u8 manual_pwm_ctl[3];   /* manual PWM value set by user */
 };
 
+static inline int has_16bit_fans(const struct it87_data *data)
+{
+        /* IT8705F Datasheet 0.4.1, 3h == Version G.
+           IT8712F Datasheet 0.9.1, section 8.3.5 indicates 7h == Version I.
+           These are the first revisions with 16bit tachometer support. */
+        return (data->type == it87 && data->revision >= 0x03)
+            || (data->type == it8712 && data->revision >= 0x07)
+            || data->type == it8716
+            || data->type == it8718;
+}
 
 static int it87_probe(struct platform_device *pdev);
 static int __devexit it87_remove(struct platform_device *pdev);
@@ -991,8 +1003,9 @@ static int __init it87_find(unsigned short *address,
         }
 
         err = 0;
+        sio_data->revision = superio_inb(DEVREV) & 0x0f;
         pr_info("it87: Found IT%04xF chip at 0x%x, revision %d\n",
-                chip_type, *address, superio_inb(DEVREV) & 0x0f);
+                chip_type, *address, sio_data->revision);
 
         /* Read GPIO config and VID value from LDN 7 (GPIO) */
         if (chip_type != IT8705F_DEVID) {
@@ -1045,6 +1058,7 @@ static int __devinit it87_probe(struct platform_device *pdev)
 
         data->addr = res->start;
         data->type = sio_data->type;
+        data->revision = sio_data->revision;
         data->name = names[sio_data->type];
 
         /* Now, we do the remaining detection. */
@@ -1069,7 +1083,7 @@ static int __devinit it87_probe(struct platform_device *pdev)
                 goto ERROR2;
 
         /* Do not create fan files for disabled fans */
-        if (data->type == it8716 || data->type == it8718) {
+        if (has_16bit_fans(data)) {
                 /* 16-bit tachometers */
                 if (data->has_fan & (1 << 0)) {
                         if ((err = device_create_file(dev,
@@ -1350,7 +1364,7 @@ static void __devinit it87_init_device(struct platform_device *pdev)
         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
 
         /* Set tachometers to 16-bit mode if needed */
-        if (data->type == it8716 || data->type == it8718) {
+        if (has_16bit_fans(data)) {
                 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
                 if (~tmp & 0x07 & data->has_fan) {
                         dev_dbg(&pdev->dev,
@@ -1358,10 +1372,13 @@ static void __devinit it87_init_device(struct platform_device *pdev)
                         it87_write_value(data, IT87_REG_FAN_16BIT,
                                          tmp | 0x07);
                 }
-                if (tmp & (1 << 4))
-                        data->has_fan |= (1 << 3);      /* fan4 enabled */
-                if (tmp & (1 << 5))
-                        data->has_fan |= (1 << 4);      /* fan5 enabled */
+                /* IT8705F only supports three fans. */
+                if (data->type != it87) {
+                        if (tmp & (1 << 4))
+                                data->has_fan |= (1 << 3); /* fan4 enabled */
+                        if (tmp & (1 << 5))
+                                data->has_fan |= (1 << 4); /* fan5 enabled */
+                }
         }
 
         /* Set current fan mode registers and the default settings for the
@@ -1426,7 +1443,7 @@ static struct it87_data *it87_update_device(struct device *dev)
                         data->fan[i] = it87_read_value(data,
                                        IT87_REG_FAN[i]);
                         /* Add high byte if in 16-bit mode */
-                        if (data->type == it8716 || data->type == it8718) {
+                        if (has_16bit_fans(data)) {
                                 data->fan[i] |= it87_read_value(data,
                                                 IT87_REG_FANX[i]) << 8;
                                 data->fan_min[i] |= it87_read_value(data,
@@ -1443,8 +1460,7 @@ static struct it87_data *it87_update_device(struct device *dev)
                 }
 
                 /* Newer chips don't have clock dividers */
-                if ((data->has_fan & 0x07) && data->type != it8716
-                 && data->type != it8718) {
+                if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
                         i = it87_read_value(data, IT87_REG_FAN_DIV);
                         data->fan_div[0] = i & 0x07;
                         data->fan_div[1] = (i >> 3) & 0x07;
@@ -1460,7 +1476,8 @@ static struct it87_data *it87_update_device(struct device *dev)
                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 
                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
-                /* The 8705 does not have VID capability */
+                /* The 8705 does not have VID capability.
+                   The 8718 does not use IT87_REG_VID for the same purpose. */
                 if (data->type == it8712 || data->type == it8716) {
                         data->vid = it87_read_value(data, IT87_REG_VID);
                         /* The older IT8712F revisions had only 5 VID pins,
diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c
index 7880c273c2c5..8f9595f2fb53 100644
--- a/drivers/hwmon/lm75.c
+++ b/drivers/hwmon/lm75.c
@@ -54,11 +54,11 @@ enum lm75_type {		/* keep sorted in alphabetical order */
         tmp75,
 };
 
-/* Addresses scanned by legacy style driver binding */
+/* Addresses scanned */
 static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c,
                                         0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
 
-/* Insmod parameters (only for legacy style driver binding) */
+/* Insmod parameters */
 I2C_CLIENT_INSMOD_1(lm75);
 
 
@@ -72,7 +72,6 @@ static const u8 LM75_REG_TEMP[3] = {
 
 /* Each client has this additional data */
 struct lm75_data {
-        struct i2c_client       *client;
         struct device           *hwmon_dev;
         struct mutex            update_lock;
         u8                      orig_conf;
@@ -138,7 +137,7 @@ static const struct attribute_group lm75_group = {
 
 /*-----------------------------------------------------------------------*/
 
-/* "New style" I2C driver binding -- following the driver model */
+/* device probe and removal */
 
 static int
 lm75_probe(struct i2c_client *client, const struct i2c_device_id *id)
@@ -157,8 +156,6 @@ lm75_probe(struct i2c_client *client, const struct i2c_device_id *id)
                 return -ENOMEM;
 
         i2c_set_clientdata(client, data);
-
-        data->client = client;
         mutex_init(&data->update_lock);
 
         /* Set to LM75 resolution (9 bits, 1/2 degree C) and range.
@@ -236,45 +233,16 @@ static const struct i2c_device_id lm75_ids[] = {
 };
 MODULE_DEVICE_TABLE(i2c, lm75_ids);
 
-static struct i2c_driver lm75_driver = {
-        .driver = {
-                .name   = "lm75",
-        },
-        .probe          = lm75_probe,
-        .remove         = lm75_remove,
-        .id_table       = lm75_ids,
-};
-
-/*-----------------------------------------------------------------------*/
-
-/* "Legacy" I2C driver binding */
-
-static struct i2c_driver lm75_legacy_driver;
-
-/* This function is called by i2c_probe */
-static int lm75_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm75_detect(struct i2c_client *new_client, int kind,
+                       struct i2c_board_info *info)
 {
+        struct i2c_adapter *adapter = new_client->adapter;
         int i;
-        struct i2c_client *new_client;
-        int err = 0;
 
         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
                                      I2C_FUNC_SMBUS_WORD_DATA))
-                goto exit;
-
-        /* OK. For now, we presume we have a valid address. We create the
-           client structure, even though there may be no sensor present.
-           But it allows us to use i2c_smbus_read_*_data() calls. */
-        new_client = kzalloc(sizeof *new_client, GFP_KERNEL);
-        if (!new_client) {
-                err = -ENOMEM;
-                goto exit;
-        }
-
-        new_client->addr = address;
-        new_client->adapter = adapter;
-        new_client->driver = &lm75_legacy_driver;
-        new_client->flags = 0;
+                return -ENODEV;
 
         /* Now, we do the remaining detection. There is no identification-
            dedicated register so we have to rely on several tricks:
@@ -294,71 +262,44 @@ static int lm75_detect(struct i2c_adapter *adapter, int address, int kind)
                  || i2c_smbus_read_word_data(new_client, 5) != hyst
                  || i2c_smbus_read_word_data(new_client, 6) != hyst
                  || i2c_smbus_read_word_data(new_client, 7) != hyst)
-                        goto exit_free;
+                        return -ENODEV;
                 os = i2c_smbus_read_word_data(new_client, 3);
                 if (i2c_smbus_read_word_data(new_client, 4) != os
                  || i2c_smbus_read_word_data(new_client, 5) != os
                  || i2c_smbus_read_word_data(new_client, 6) != os
                  || i2c_smbus_read_word_data(new_client, 7) != os)
-                        goto exit_free;
+                        return -ENODEV;
 
                 /* Unused bits */
                 if (conf & 0xe0)
-                        goto exit_free;
+                        return -ENODEV;
 
                 /* Addresses cycling */
                 for (i = 8; i < 0xff; i += 8)
                         if (i2c_smbus_read_byte_data(new_client, i + 1) != conf
                          || i2c_smbus_read_word_data(new_client, i + 2) != hyst
                          || i2c_smbus_read_word_data(new_client, i + 3) != os)
-                                goto exit_free;
+                                return -ENODEV;
         }
 
         /* NOTE: we treat "force=..." and "force_lm75=..." the same.
          * Only new-style driver binding distinguishes chip types.
          */
-        strlcpy(new_client->name, "lm75", I2C_NAME_SIZE);
-
-        /* Tell the I2C layer a new client has arrived */
-        err = i2c_attach_client(new_client);
-        if (err)
-                goto exit_free;
-
-        err = lm75_probe(new_client, NULL);
-        if (err < 0)
-                goto exit_detach;
+        strlcpy(info->type, "lm75", I2C_NAME_SIZE);
 
         return 0;
-
-exit_detach:
-        i2c_detach_client(new_client);
-exit_free:
-        kfree(new_client);
-exit:
-        return err;
-}
-
-static int lm75_attach_adapter(struct i2c_adapter *adapter)
-{
-        if (!(adapter->class & I2C_CLASS_HWMON))
-                return 0;
-        return i2c_probe(adapter, &addr_data, lm75_detect);
 }
 
-static int lm75_detach_client(struct i2c_client *client)
-{
-        lm75_remove(client);
-        i2c_detach_client(client);
-        kfree(client);
-        return 0;
-}
-
-static struct i2c_driver lm75_legacy_driver = {
+static struct i2c_driver lm75_driver = {
+        .class          = I2C_CLASS_HWMON,
         .driver = {
-                .name   = "lm75_legacy",
+                .name   = "lm75",
         },
-        .attach_adapter = lm75_attach_adapter,
-        .detach_client  = lm75_detach_client,
+        .probe          = lm75_probe,
+        .remove         = lm75_remove,
+        .id_table       = lm75_ids,
+        .detect         = lm75_detect,
+        .address_data   = &addr_data,
 };
 
 /*-----------------------------------------------------------------------*/
@@ -424,22 +365,11 @@ static struct lm75_data *lm75_update_device(struct device *dev)
 
 static int __init sensors_lm75_init(void)
 {
-        int status;
-
-        status = i2c_add_driver(&lm75_driver);
-        if (status < 0)
-                return status;
-
-        status = i2c_add_driver(&lm75_legacy_driver);
-        if (status < 0)
-                i2c_del_driver(&lm75_driver);
-
-        return status;
+        return i2c_add_driver(&lm75_driver);
 }
 
 static void __exit sensors_lm75_exit(void)
 {
-        i2c_del_driver(&lm75_legacy_driver);
         i2c_del_driver(&lm75_driver);
 }
 
diff --git a/drivers/hwmon/thmc50.c b/drivers/hwmon/thmc50.c
index 3b01001108c1..7d97431e132f 100644
--- a/drivers/hwmon/thmc50.c
+++ b/drivers/hwmon/thmc50.c
@@ -55,8 +55,11 @@ I2C_CLIENT_MODULE_PARM(adm1022_temp3, "List of adapter,address pairs "
 static const u8 THMC50_REG_TEMP[] = { 0x27, 0x26, 0x20 };
 static const u8 THMC50_REG_TEMP_MIN[] = { 0x3A, 0x38, 0x2C };
 static const u8 THMC50_REG_TEMP_MAX[] = { 0x39, 0x37, 0x2B };
+static const u8 THMC50_REG_TEMP_CRITICAL[] = { 0x13, 0x14, 0x14 };
+static const u8 THMC50_REG_TEMP_DEFAULT[] = { 0x17, 0x18, 0x18 };
 
 #define THMC50_REG_CONF_nFANOFF                 0x20
+#define THMC50_REG_CONF_PROGRAMMED              0x08
 
 /* Each client has this additional data */
 struct thmc50_data {
@@ -72,6 +75,7 @@ struct thmc50_data {
         s8 temp_input[3];
         s8 temp_max[3];
         s8 temp_min[3];
+        s8 temp_critical[3];
         u8 analog_out;
         u8 alarms;
 };
@@ -199,6 +203,15 @@ static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
         return count;
 }
 
+static ssize_t show_temp_critical(struct device *dev,
+                                  struct device_attribute *attr,
+                                  char *buf)
+{
+        int nr = to_sensor_dev_attr(attr)->index;
+        struct thmc50_data *data = thmc50_update_device(dev);
+        return sprintf(buf, "%d\n", data->temp_critical[nr] * 1000);
+}
+
 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
                           char *buf)
 {
@@ -214,7 +227,9 @@ static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_temp,	\
 static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR,        \
                         show_temp_min, set_temp_min, offset - 1);       \
 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR,        \
-                        show_temp_max, set_temp_max, offset - 1);
+                        show_temp_max, set_temp_max, offset - 1);       \
+static SENSOR_DEVICE_ATTR(temp##offset##_crit, S_IRUGO,                 \
+                        show_temp_critical, NULL, offset - 1);
 
 temp_reg(1);
 temp_reg(2);
@@ -234,10 +249,12 @@ static struct attribute *thmc50_attributes[] = {
         &sensor_dev_attr_temp1_max.dev_attr.attr,
         &sensor_dev_attr_temp1_min.dev_attr.attr,
         &sensor_dev_attr_temp1_input.dev_attr.attr,
+        &sensor_dev_attr_temp1_crit.dev_attr.attr,
         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
         &sensor_dev_attr_temp2_max.dev_attr.attr,
         &sensor_dev_attr_temp2_min.dev_attr.attr,
         &sensor_dev_attr_temp2_input.dev_attr.attr,
+        &sensor_dev_attr_temp2_crit.dev_attr.attr,
         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
         &sensor_dev_attr_temp2_fault.dev_attr.attr,
         &sensor_dev_attr_pwm1.dev_attr.attr,
@@ -254,6 +271,7 @@ static struct attribute *temp3_attributes[] = {
         &sensor_dev_attr_temp3_max.dev_attr.attr,
         &sensor_dev_attr_temp3_min.dev_attr.attr,
         &sensor_dev_attr_temp3_input.dev_attr.attr,
+        &sensor_dev_attr_temp3_crit.dev_attr.attr,
         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
         &sensor_dev_attr_temp3_fault.dev_attr.attr,
         NULL
@@ -429,6 +447,10 @@ static struct thmc50_data *thmc50_update_device(struct device *dev)
 
                 int temps = data->has_temp3 ? 3 : 2;
                 int i;
+                int prog = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
+
+                prog &= THMC50_REG_CONF_PROGRAMMED;
+
                 for (i = 0; i < temps; i++) {
                         data->temp_input[i] = i2c_smbus_read_byte_data(client,
                                                 THMC50_REG_TEMP[i]);
@@ -436,6 +458,10 @@ static struct thmc50_data *thmc50_update_device(struct device *dev)
                                                 THMC50_REG_TEMP_MAX[i]);
                         data->temp_min[i] = i2c_smbus_read_byte_data(client,
                                                 THMC50_REG_TEMP_MIN[i]);
+                        data->temp_critical[i] =
+                                i2c_smbus_read_byte_data(client,
+                                        prog ? THMC50_REG_TEMP_CRITICAL[i]
+                                             : THMC50_REG_TEMP_DEFAULT[i]);
                 }
                 data->analog_out =
                     i2c_smbus_read_byte_data(client, THMC50_REG_ANALOG_OUT);
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c
index 9564fb069957..b30e5796cb26 100644
--- a/drivers/hwmon/w83627hf.c
+++ b/drivers/hwmon/w83627hf.c
@@ -67,10 +67,6 @@ module_param(force_i2c, byte, 0);
 MODULE_PARM_DESC(force_i2c,
                  "Initialize the i2c address of the sensors");
 
-static int reset;
-module_param(reset, bool, 0);
-MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
-
 static int init = 1;
 module_param(init, bool, 0);
 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
@@ -209,6 +205,13 @@ static const u16 w83627hf_reg_temp_over[]	= { 0x39, 0x155, 0x255 };
 #define W83627HF_REG_PWM1 0x5A
 #define W83627HF_REG_PWM2 0x5B
 
+static const u8 W83627THF_REG_PWM_ENABLE[] = {
+        0x04,           /* FAN 1 mode */
+        0x04,           /* FAN 2 mode */
+        0x12,           /* FAN AUX mode */
+};
+static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
+
 #define W83627THF_REG_PWM1              0x01    /* 697HF/637HF/687THF too */
 #define W83627THF_REG_PWM2              0x03    /* 697HF/637HF/687THF too */
 #define W83627THF_REG_PWM3              0x11    /* 637HF/687THF too */
@@ -366,6 +369,9 @@ struct w83627hf_data {
         u32 alarms;             /* Register encoding, combined */
         u32 beep_mask;          /* Register encoding, combined */
         u8 pwm[3];              /* Register value */
+        u8 pwm_enable[3];       /* 1 = manual
+                                   2 = thermal cruise (also called SmartFan I)
+                                   3 = fan speed cruise */
         u8 pwm_freq[3];         /* Register value */
         u16 sens[3];            /* 1 = pentium diode; 2 = 3904 diode;
                                    4 = thermistor */
@@ -957,6 +963,42 @@ static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
 
 static ssize_t
+show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
+{
+        int nr = to_sensor_dev_attr(devattr)->index;
+        struct w83627hf_data *data = w83627hf_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm_enable[nr]);
+}
+
+static ssize_t
+store_pwm_enable(struct device *dev, struct device_attribute *devattr,
+          const char *buf, size_t count)
+{
+        int nr = to_sensor_dev_attr(devattr)->index;
+        struct w83627hf_data *data = dev_get_drvdata(dev);
+        unsigned long val = simple_strtoul(buf, NULL, 10);
+        u8 reg;
+
+        if (!val || (val > 3))  /* modes 1, 2 and 3 are supported */
+                return -EINVAL;
+        mutex_lock(&data->update_lock);
+        data->pwm_enable[nr] = val;
+        reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
+        reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
+        reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
+        w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+
+static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
+                                                  store_pwm_enable, 0);
+static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
+                                                  store_pwm_enable, 1);
+static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
+                                                  store_pwm_enable, 2);
+
+static ssize_t
 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
 {
         int nr = to_sensor_dev_attr(devattr)->index;
@@ -1223,6 +1265,11 @@ static struct attribute *w83627hf_attributes_opt[] = {
         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
+
+        &sensor_dev_attr_pwm1_enable.dev_attr.attr,
+        &sensor_dev_attr_pwm2_enable.dev_attr.attr,
+        &sensor_dev_attr_pwm3_enable.dev_attr.attr,
+
         NULL
 };
 
@@ -1366,6 +1413,19 @@ static int __devinit w83627hf_probe(struct platform_device *pdev)
                                 &sensor_dev_attr_pwm3_freq.dev_attr)))
                         goto ERROR4;
 
+        if (data->type != w83627hf)
+                if ((err = device_create_file(dev,
+                                &sensor_dev_attr_pwm1_enable.dev_attr))
+                 || (err = device_create_file(dev,
+                                &sensor_dev_attr_pwm2_enable.dev_attr)))
+                        goto ERROR4;
+
+        if (data->type == w83627thf || data->type == w83637hf
+         || data->type == w83687thf)
+                if ((err = device_create_file(dev,
+                                &sensor_dev_attr_pwm3_enable.dev_attr)))
+                        goto ERROR4;
+
         data->hwmon_dev = hwmon_device_register(dev);
         if (IS_ERR(data->hwmon_dev)) {
                 err = PTR_ERR(data->hwmon_dev);
@@ -1536,29 +1596,6 @@ static void __devinit w83627hf_init_device(struct platform_device *pdev)
         enum chips type = data->type;
         u8 tmp;
 
-        if (reset) {
-                /* Resetting the chip has been the default for a long time,
-                   but repeatedly caused problems (fans going to full
-                   speed...) so it is now optional. It might even go away if
-                   nobody reports it as being useful, as I see very little
-                   reason why this would be needed at all. */
-                dev_info(&pdev->dev, "If reset=1 solved a problem you were "
-                         "having, please report!\n");
-
-                /* save this register */
-                i = w83627hf_read_value(data, W83781D_REG_BEEP_CONFIG);
-                /* Reset all except Watchdog values and last conversion values
-                   This sets fan-divs to 2, among others */
-                w83627hf_write_value(data, W83781D_REG_CONFIG, 0x80);
-                /* Restore the register and disable power-on abnormal beep.
-                   This saves FAN 1/2/3 input/output values set by BIOS. */
-                w83627hf_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
-                /* Disable master beep-enable (reset turns it on).
-                   Individual beeps should be reset to off but for some reason
-                   disabling this bit helps some people not get beeped */
-                w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 0);
-        }
-
         /* Minimize conflicts with other winbond i2c-only clients...  */
         /* disable i2c subclients... how to disable main i2c client?? */
         /* force i2c address to relatively uncommon address */
@@ -1655,6 +1692,7 @@ static struct w83627hf_data *w83627hf_update_device(struct device *dev)
 {
         struct w83627hf_data *data = dev_get_drvdata(dev);
         int i, num_temps = (data->type == w83697hf) ? 2 : 3;
+        int num_pwms = (data->type == w83697hf) ? 2 : 3;
 
         mutex_lock(&data->update_lock);
 
@@ -1707,6 +1745,15 @@ static struct w83627hf_data *w83627hf_update_device(struct device *dev)
                                         break;
                         }
                 }
+                if (data->type != w83627hf) {
+                        for (i = 0; i < num_pwms; i++) {
+                                u8 tmp = w83627hf_read_value(data,
+                                        W83627THF_REG_PWM_ENABLE[i]);
+                                data->pwm_enable[i] =
+                                        ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
+                                        & 0x03) + 1;
+                        }
+                }
                 for (i = 0; i < num_temps; i++) {
                         data->temp[i] = w83627hf_read_value(
                                                 data, w83627hf_reg_temp[i]);
diff --git a/drivers/hwmon/w83791d.c b/drivers/hwmon/w83791d.c
index e4e91c9d480a..de21142d106c 100644
--- a/drivers/hwmon/w83791d.c
+++ b/drivers/hwmon/w83791d.c
@@ -233,11 +233,9 @@ static u8 fan_to_reg(long rpm, int div)
 static u8 div_to_reg(int nr, long val)
 {
         int i;
-        int max;
 
-        /* first three fan's divisor max out at 8, rest max out at 128 */
-        max = (nr < 3) ? 8 : 128;
-        val = SENSORS_LIMIT(val, 1, max) >> 1;
+        /* fan divisors max out at 128 */
+        val = SENSORS_LIMIT(val, 1, 128) >> 1;
         for (i = 0; i < 7; i++) {
                 if (val == 0)
                         break;
@@ -530,6 +528,7 @@ static ssize_t store_fan_div(struct device *dev, struct device_attribute *attr,
         unsigned long min;
         u8 tmp_fan_div;
         u8 fan_div_reg;
+        u8 vbat_reg;
         int indx = 0;
         u8 keep_mask = 0;
         u8 new_shift = 0;
@@ -581,6 +580,16 @@ static ssize_t store_fan_div(struct device *dev, struct device_attribute *attr,
         w83791d_write(client, W83791D_REG_FAN_DIV[indx],
                                 fan_div_reg | tmp_fan_div);
 
+        /* Bit 2 of fans 0-2 is stored in the vbat register (bits 5-7) */
+        if (nr < 3) {
+                keep_mask = ~(1 << (nr + 5));
+                vbat_reg = w83791d_read(client, W83791D_REG_VBAT)
+                                & keep_mask;
+                tmp_fan_div = (data->fan_div[nr] << (3 + nr)) & ~keep_mask;
+                w83791d_write(client, W83791D_REG_VBAT,
+                                vbat_reg | tmp_fan_div);
+        }
+
         /* Restore fan_min */
         data->fan_min[nr] = fan_to_reg(min, DIV_FROM_REG(data->fan_div[nr]));
         w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
@@ -1046,9 +1055,10 @@ static int w83791d_probe(struct i2c_client *client,
 {
         struct w83791d_data *data;
         struct device *dev = &client->dev;
-        int i, val1, err;
+        int i, err;
 
 #ifdef DEBUG
+        int val1;
         val1 = w83791d_read(client, W83791D_REG_DID_VID4);
         dev_dbg(dev, "Device ID version: %d.%d (0x%02x)\n",
                         (val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1);
@@ -1182,6 +1192,7 @@ static struct w83791d_data *w83791d_update_device(struct device *dev)
         struct w83791d_data *data = i2c_get_clientdata(client);
         int i, j;
         u8 reg_array_tmp[3];
+        u8 vbat_reg;
 
         mutex_lock(&data->update_lock);
 
@@ -1219,6 +1230,12 @@ static struct w83791d_data *w83791d_update_device(struct device *dev)
                 data->fan_div[3] = reg_array_tmp[2] & 0x07;
                 data->fan_div[4] = (reg_array_tmp[2] >> 4) & 0x07;
 
+                /* The fan divisor for fans 0-2 get bit 2 from
+                   bits 5-7 respectively of vbat register */
+                vbat_reg = w83791d_read(client, W83791D_REG_VBAT);
+                for (i = 0; i < 3; i++)
+                        data->fan_div[i] |= (vbat_reg >> (3 + i)) & 0x04;
+
                 /* Update the first temperature sensor */
                 for (i = 0; i < 3; i++) {
                         data->temp1[i] = w83791d_read(client,
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 96867347bcbf..711ca08ab776 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -38,6 +38,20 @@ config I2C_CHARDEV
           This support is also available as a module.  If so, the module 
           will be called i2c-dev.
 
+config I2C_HELPER_AUTO
+        bool "Autoselect pertinent helper modules"
+        default y
+        help
+          Some I2C bus drivers require so-called "I2C algorithm" modules
+          to work. These are basically software-only abstractions of generic
+          I2C interfaces. This option will autoselect them so that you don't
+          have to care.
+
+          Unselect this only if you need to enable additional helper
+          modules, for example for use with external I2C bus drivers.
+
+          In doubt, say Y.
+
 source drivers/i2c/algos/Kconfig
 source drivers/i2c/busses/Kconfig
 source drivers/i2c/chips/Kconfig
diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig
index 7137a17402fe..b788579b8227 100644
--- a/drivers/i2c/algos/Kconfig
+++ b/drivers/i2c/algos/Kconfig
@@ -2,15 +2,20 @@
 # I2C algorithm drivers configuration
 #
 
+menu "I2C Algorithms"
+        depends on !I2C_HELPER_AUTO
+
 config I2C_ALGOBIT
-        tristate
+        tristate "I2C bit-banging interfaces"
 
 config I2C_ALGOPCF
-        tristate
+        tristate "I2C PCF 8584 interfaces"
 
 config I2C_ALGOPCA
-        tristate
+        tristate "I2C PCA 9564 interfaces"
 
 config I2C_ALGO_SGI
         tristate
         depends on SGI_IP22 || SGI_IP32 || X86_VISWS
+
+endmenu
diff --git a/drivers/i2c/busses/i2c-acorn.c b/drivers/i2c/busses/i2c-acorn.c
index 7c2be3558a24..75089febbc13 100644
--- a/drivers/i2c/busses/i2c-acorn.c
+++ b/drivers/i2c/busses/i2c-acorn.c
@@ -16,7 +16,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/hardware/ioc.h>
 #include <asm/system.h>
diff --git a/drivers/i2c/busses/i2c-amd756-s4882.c b/drivers/i2c/busses/i2c-amd756-s4882.c
index 72872d1e63ef..8ba2bcf727d3 100644
--- a/drivers/i2c/busses/i2c-amd756-s4882.c
+++ b/drivers/i2c/busses/i2c-amd756-s4882.c
@@ -155,6 +155,9 @@ static int __init amd756_s4882_init(void)
         int i, error;
         union i2c_smbus_data ioconfig;
 
+        if (!amd756_smbus.dev.parent)
+                return -ENODEV;
+
         /* Configure the PCA9556 multiplexer */
         ioconfig.byte = 0x00; /* All I/O to output mode */
         error = i2c_smbus_xfer(&amd756_smbus, 0x18, 0, I2C_SMBUS_WRITE, 0x03,
@@ -168,11 +171,7 @@ static int __init amd756_s4882_init(void)
         /* Unregister physical bus */
         error = i2c_del_adapter(&amd756_smbus);
         if (error) {
-                if (error == -EINVAL)
-                        error = -ENODEV;
-                else
-                        dev_err(&amd756_smbus.dev, "Physical bus removal "
-                                "failed\n");
+                dev_err(&amd756_smbus.dev, "Physical bus removal failed\n");
                 goto ERROR0;
         }
 
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 73d61946a534..c1adcdbf7979 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -27,9 +27,9 @@
 
 #include <asm/io.h>
 
-#include <asm/arch/at91_twi.h>
-#include <asm/arch/board.h>
-#include <asm/arch/cpu.h>
+#include <mach/at91_twi.h>
+#include <mach/board.h>
+#include <mach/cpu.h>
 
 #define TWI_CLOCK               100000          /* Hz. max 400 Kbits/sec */
 
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index af3846eda985..5d7789834b95 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -36,10 +36,9 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 
-#include <asm/hardware.h>
-#include <asm/mach-types.h>
+#include <mach/hardware.h>
 
-#include <asm/arch/i2c.h>
+#include <mach/i2c.h>
 
 /* ----- global defines ----------------------------------------------- */
 
diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c
index 5af9e6521e6c..05d72e981353 100644
--- a/drivers/i2c/busses/i2c-ixp2000.c
+++ b/drivers/i2c/busses/i2c-ixp2000.c
@@ -33,8 +33,8 @@
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
 
-#include <asm/hardware.h>       /* Pick up IXP2000-specific bits */
-#include <asm/arch/gpio.h>
+#include <mach/hardware.h>      /* Pick up IXP2000-specific bits */
+#include <mach/gpio.h>
 
 static inline int ixp2000_scl_pin(void *data)
 {
diff --git a/drivers/i2c/busses/i2c-nforce2-s4985.c b/drivers/i2c/busses/i2c-nforce2-s4985.c
index d1a4cbcf2aa4..29015eb9ca46 100644
--- a/drivers/i2c/busses/i2c-nforce2-s4985.c
+++ b/drivers/i2c/busses/i2c-nforce2-s4985.c
@@ -150,6 +150,9 @@ static int __init nforce2_s4985_init(void)
         int i, error;
         union i2c_smbus_data ioconfig;
 
+        if (!nforce2_smbus)
+                return -ENODEV;
+
         /* Configure the PCA9556 multiplexer */
         ioconfig.byte = 0x00; /* All I/O to output mode */
         error = i2c_smbus_xfer(nforce2_smbus, 0x18, 0, I2C_SMBUS_WRITE, 0x03,
@@ -161,8 +164,6 @@ static int __init nforce2_s4985_init(void)
         }
 
         /* Unregister physical bus */
-        if (!nforce2_smbus)
-                return -ENODEV;
         error = i2c_del_adapter(nforce2_smbus);
         if (error) {
                 dev_err(&nforce2_smbus->dev, "Physical bus removal failed\n");
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
index 1ca21084ffcf..ec15cff556b9 100644
--- a/drivers/i2c/busses/i2c-pnx.c
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -19,7 +19,7 @@
 #include <linux/completion.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-pnx.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/uaccess.h>
 
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index af9e6034d7fb..44d838410f15 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -34,11 +34,11 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/io.h>
-#include <asm/arch/i2c.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/i2c.h>
+#include <mach/pxa-regs.h>
 
 struct pxa_i2c {
         spinlock_t              lock;
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 4864723c7425..c772e02c2803 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -35,11 +35,11 @@
 #include <linux/clk.h>
 #include <linux/cpufreq.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/io.h>
 
-#include <asm/arch/regs-gpio.h>
+#include <mach/regs-gpio.h>
 #include <asm/plat-s3c/regs-iic.h>
 #include <asm/plat-s3c/iic.h>
 
diff --git a/drivers/i2c/chips/at24.c b/drivers/i2c/chips/at24.c
index e764c94f3e3d..2a4acb269569 100644
--- a/drivers/i2c/chips/at24.c
+++ b/drivers/i2c/chips/at24.c
@@ -188,7 +188,7 @@ static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
                         count = I2C_SMBUS_BLOCK_MAX;
                 status = i2c_smbus_read_i2c_block_data(client, offset,
                                 count, buf);
-                dev_dbg(&client->dev, "smbus read %zd@%d --> %d\n",
+                dev_dbg(&client->dev, "smbus read %zu@%d --> %d\n",
                                 count, offset, status);
                 return (status < 0) ? -EIO : status;
         }
@@ -214,7 +214,7 @@ static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
         msg[1].len = count;
 
         status = i2c_transfer(client->adapter, msg, 2);
-        dev_dbg(&client->dev, "i2c read %zd@%d --> %d\n",
+        dev_dbg(&client->dev, "i2c read %zu@%d --> %d\n",
                         count, offset, status);
 
         if (status == 2)
@@ -334,7 +334,7 @@ static ssize_t at24_eeprom_write(struct at24_data *at24, char *buf,
                         if (status == 1)
                                 status = count;
                 }
-                dev_dbg(&client->dev, "write %zd@%d --> %zd (%ld)\n",
+                dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
                                 count, offset, status, jiffies);
 
                 if (status == count)
@@ -512,7 +512,7 @@ static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
 
         i2c_set_clientdata(client, at24);
 
-        dev_info(&client->dev, "%Zd byte %s EEPROM %s\n",
+        dev_info(&client->dev, "%zu byte %s EEPROM %s\n",
                 at24->bin.size, client->name,
                 writable ? "(writable)" : "(read-only)");
         dev_dbg(&client->dev,
diff --git a/drivers/i2c/chips/isp1301_omap.c b/drivers/i2c/chips/isp1301_omap.c
index 03a33f1b9cd3..4655b794ebe3 100644
--- a/drivers/i2c/chips/isp1301_omap.c
+++ b/drivers/i2c/chips/isp1301_omap.c
@@ -33,7 +33,7 @@
 #include <linux/workqueue.h>
 
 #include <asm/irq.h>
-#include <asm/arch/usb.h>
+#include <mach/usb.h>
 
 
 #ifndef DEBUG
@@ -94,7 +94,7 @@ struct isp1301 {
 /* board-specific PM hooks */
 
 #include <asm/gpio.h>
-#include <asm/arch/mux.h>
+#include <mach/mux.h>
 #include <asm/mach-types.h>
 
 
@@ -1593,7 +1593,7 @@ fail1:
         if (machine_is_omap_h2()) {
                 /* full speed signaling by default */
                 isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1,
-                        MC1_SPEED_REG);
+                        MC1_SPEED);
                 isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2,
                         MC2_SPD_SUSP_CTRL);
 
diff --git a/drivers/i2c/chips/menelaus.c b/drivers/i2c/chips/menelaus.c
index b36db1797c11..176126d3a01d 100644
--- a/drivers/i2c/chips/menelaus.c
+++ b/drivers/i2c/chips/menelaus.c
@@ -41,11 +41,10 @@
 #include <linux/rtc.h>
 #include <linux/bcd.h>
 
-#include <asm/mach-types.h>
 #include <asm/mach/irq.h>
 
-#include <asm/arch/gpio.h>
-#include <asm/arch/menelaus.h>
+#include <mach/gpio.h>
+#include <mach/menelaus.h>
 
 #define DRIVER_NAME                     "menelaus"
 
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 7bf38c418086..550853f79ae8 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -813,7 +813,12 @@ static int i2c_check_addr(struct i2c_adapter *adapter, int addr)
 int i2c_attach_client(struct i2c_client *client)
 {
         struct i2c_adapter *adapter = client->adapter;
-        int res = 0;
+        int res;
+
+        /* Check for address business */
+        res = i2c_check_addr(adapter, client->addr);
+        if (res)
+                return res;
 
         client->dev.parent = &client->adapter->dev;
         client->dev.bus = &i2c_bus_type;
@@ -1451,9 +1456,11 @@ i2c_new_probed_device(struct i2c_adapter *adap,
                 if ((addr_list[i] & ~0x07) == 0x30
                  || (addr_list[i] & ~0x0f) == 0x50
                  || !i2c_check_functionality(adap, I2C_FUNC_SMBUS_QUICK)) {
+                        union i2c_smbus_data data;
+
                         if (i2c_smbus_xfer(adap, addr_list[i], 0,
                                            I2C_SMBUS_READ, 0,
-                                           I2C_SMBUS_BYTE, NULL) >= 0)
+                                           I2C_SMBUS_BYTE, &data) >= 0)
                                 break;
                 } else {
                         if (i2c_smbus_xfer(adap, addr_list[i], 0,
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index 9d55c6383b23..af4491fa7e34 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -147,7 +147,7 @@ static ssize_t i2cdev_read (struct file *file, char __user *buf, size_t count,
         if (tmp==NULL)
                 return -ENOMEM;
 
-        pr_debug("i2c-dev: i2c-%d reading %zd bytes.\n",
+        pr_debug("i2c-dev: i2c-%d reading %zu bytes.\n",
                 iminor(file->f_path.dentry->d_inode), count);
 
         ret = i2c_master_recv(client,tmp,count);
@@ -175,7 +175,7 @@ static ssize_t i2cdev_write (struct file *file, const char __user *buf, size_t c
                 return -EFAULT;
         }
 
-        pr_debug("i2c-dev: i2c-%d writing %zd bytes.\n",
+        pr_debug("i2c-dev: i2c-%d writing %zu bytes.\n",
                 iminor(file->f_path.dentry->d_inode), count);
 
         ret = i2c_master_send(client,tmp,count);
diff --git a/drivers/ide/arm/ide_arm.c b/drivers/ide/arm/ide_arm.c
index 176532ffae0e..f728f2927b5a 100644
--- a/drivers/ide/arm/ide_arm.c
+++ b/drivers/ide/arm/ide_arm.c
@@ -11,13 +11,12 @@
 #include <linux/init.h>
 #include <linux/ide.h>
 
-#include <asm/mach-types.h>
 #include <asm/irq.h>
 
 #define DRV_NAME "ide_arm"
 
 #ifdef CONFIG_ARCH_CLPS7500
-# include <asm/arch/hardware.h>
+# include <mach/hardware.h>
 #
 # define IDE_ARM_IO     (ISASLOT_IO + 0x1f0)
 # define IDE_ARM_IRQ    IRQ_ISA_14
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c
index 89a112d513ad..49a8c589e346 100644
--- a/drivers/ide/ide-cd.c
+++ b/drivers/ide/ide-cd.c
@@ -1272,9 +1272,9 @@ static ide_startstop_t ide_cd_do_request(ide_drive_t *drive, struct request *rq,
  */
 static void msf_from_bcd(struct atapi_msf *msf)
 {
-        msf->minute = BCD2BIN(msf->minute);
-        msf->second = BCD2BIN(msf->second);
-        msf->frame  = BCD2BIN(msf->frame);
+        msf->minute = bcd2bin(msf->minute);
+        msf->second = bcd2bin(msf->second);
+        msf->frame  = bcd2bin(msf->frame);
 }
 
 int cdrom_check_status(ide_drive_t *drive, struct request_sense *sense)
@@ -1415,8 +1415,8 @@ int ide_cd_read_toc(ide_drive_t *drive, struct request_sense *sense)
                 return stat;
 
         if (drive->atapi_flags & IDE_AFLAG_TOCTRACKS_AS_BCD) {
-                toc->hdr.first_track = BCD2BIN(toc->hdr.first_track);
-                toc->hdr.last_track  = BCD2BIN(toc->hdr.last_track);
+                toc->hdr.first_track = bcd2bin(toc->hdr.first_track);
+                toc->hdr.last_track  = bcd2bin(toc->hdr.last_track);
         }
 
         ntracks = toc->hdr.last_track - toc->hdr.first_track + 1;
@@ -1456,8 +1456,8 @@ int ide_cd_read_toc(ide_drive_t *drive, struct request_sense *sense)
                         return stat;
 
                 if (drive->atapi_flags & IDE_AFLAG_TOCTRACKS_AS_BCD) {
-                        toc->hdr.first_track = (u8)BIN2BCD(CDROM_LEADOUT);
-                        toc->hdr.last_track = (u8)BIN2BCD(CDROM_LEADOUT);
+                        toc->hdr.first_track = (u8)bin2bcd(CDROM_LEADOUT);
+                        toc->hdr.last_track = (u8)bin2bcd(CDROM_LEADOUT);
                 } else {
                         toc->hdr.first_track = CDROM_LEADOUT;
                         toc->hdr.last_track = CDROM_LEADOUT;
@@ -1470,14 +1470,14 @@ int ide_cd_read_toc(ide_drive_t *drive, struct request_sense *sense)
         toc->hdr.toc_length = be16_to_cpu(toc->hdr.toc_length);
 
         if (drive->atapi_flags & IDE_AFLAG_TOCTRACKS_AS_BCD) {
-                toc->hdr.first_track = BCD2BIN(toc->hdr.first_track);
-                toc->hdr.last_track  = BCD2BIN(toc->hdr.last_track);
+                toc->hdr.first_track = bcd2bin(toc->hdr.first_track);
+                toc->hdr.last_track  = bcd2bin(toc->hdr.last_track);
         }
 
         for (i = 0; i <= ntracks; i++) {
                 if (drive->atapi_flags & IDE_AFLAG_TOCADDR_AS_BCD) {
                         if (drive->atapi_flags & IDE_AFLAG_TOCTRACKS_AS_BCD)
-                                toc->ent[i].track = BCD2BIN(toc->ent[i].track);
+                                toc->ent[i].track = bcd2bin(toc->ent[i].track);
                         msf_from_bcd(&toc->ent[i].addr.msf);
                 }
                 toc->ent[i].addr.lba = msf_to_lba(toc->ent[i].addr.msf.minute,
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index 40644b6f1c00..3187215e8f89 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -307,7 +307,7 @@ static struct pci_driver driver = {
         .name           = "AEC62xx_IDE",
         .id_table       = aec62xx_pci_tbl,
         .probe          = aec62xx_init_one,
-        .remove         = aec62xx_remove,
+        .remove         = __devexit_p(aec62xx_remove),
 };
 
 static int __init aec62xx_ide_init(void)
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index bfae2f882f48..e6d8ee88d56d 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -447,7 +447,7 @@ static struct pci_driver driver = {
         .name           = "Cypress_IDE",
         .id_table       = cy82c693_pci_tbl,
         .probe          = cy82c693_init_one,
-        .remove         = cy82c693_remove,
+        .remove         = __devexit_p(cy82c693_remove),
 };
 
 static int __init cy82c693_ide_init(void)
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 748793a413ab..eb107eef0dbc 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1620,7 +1620,7 @@ static struct pci_driver driver = {
         .name           = "HPT366_IDE",
         .id_table       = hpt366_pci_tbl,
         .probe          = hpt366_init_one,
-        .remove         = hpt366_remove,
+        .remove         = __devexit_p(hpt366_remove),
 };
 
 static int __init hpt366_ide_init(void)
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index b6dc723de702..4a1508a707cc 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -686,7 +686,7 @@ static struct pci_driver driver = {
         .name           = "ITE821x IDE",
         .id_table       = it821x_pci_tbl,
         .probe          = it821x_init_one,
-        .remove         = it821x_remove,
+        .remove         = __devexit_p(it821x_remove),
 };
 
 static int __init it821x_ide_init(void)
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 0f609b72f470..d477da6b5858 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -566,7 +566,7 @@ static struct pci_driver driver = {
         .name           = "Promise_IDE",
         .id_table       = pdc202new_pci_tbl,
         .probe          = pdc202new_init_one,
-        .remove         = pdc202new_remove,
+        .remove         = __devexit_p(pdc202new_remove),
 };
 
 static int __init pdc202new_ide_init(void)
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index 6cde48bba6f8..44cccd1e086a 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -954,7 +954,7 @@ static struct pci_driver driver = {
         .name = "SCC IDE",
         .id_table = scc_pci_tbl,
         .probe = scc_init_one,
-        .remove = scc_remove,
+        .remove = __devexit_p(scc_remove),
 };
 
 static int scc_ide_init(void)
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 42eef19a18f1..681306c9d79b 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -621,9 +621,9 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
         if (!request_mem_region(cmd_phys_base, IOC4_CMD_CTL_BLK_SIZE,
             DRV_NAME)) {
                 printk(KERN_ERR
-                        "%s : %s -- ERROR, Addresses "
+                        "%s %s: -- ERROR, Addresses "
                         "0x%p to 0x%p ALREADY in use\n",
-                       __func__, DRV_NAME, (void *) cmd_phys_base,
+                       DRV_NAME, pci_name(dev), (void *)cmd_phys_base,
                        (void *) cmd_phys_base + IOC4_CMD_CTL_BLK_SIZE);
                 return -ENOMEM;
         }
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 445ce6fbea33..db2b88a369ab 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -832,7 +832,7 @@ static struct pci_driver driver = {
         .name           = "SiI_IDE",
         .id_table       = siimage_pci_tbl,
         .probe          = siimage_init_one,
-        .remove         = siimage_remove,
+        .remove         = __devexit_p(siimage_remove),
 };
 
 static int __init siimage_ide_init(void)
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index e5a4b42b4e33..5efe21d6ef97 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -610,7 +610,7 @@ static struct pci_driver driver = {
         .name           = "SIS_IDE",
         .id_table       = sis5513_pci_tbl,
         .probe          = sis5513_init_one,
-        .remove         = sis5513_remove,
+        .remove         = __devexit_p(sis5513_remove),
 };
 
 static int __init sis5513_ide_init(void)
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index 7fc88c375e5d..927277c54ec9 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -249,7 +249,7 @@ static struct pci_driver driver = {
         .name           = "TC86C001",
         .id_table       = tc86c001_pci_tbl,
         .probe          = tc86c001_init_one,
-        .remove         = tc86c001_remove,
+        .remove         = __devexit_p(tc86c001_remove),
 };
 
 static int __init tc86c001_ide_init(void)
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index a6b2cc83f293..94fb9ab3223f 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -491,7 +491,7 @@ static struct pci_driver driver = {
         .name           = "VIA_IDE",
         .id_table       = via_pci_tbl,
         .probe          = via_init_one,
-        .remove         = via_remove,
+        .remove         = __devexit_p(via_remove),
 };
 
 static int __init via_ide_init(void)
diff --git a/drivers/ieee1394/nodemgr.c b/drivers/ieee1394/nodemgr.c
index 994a21e5a0aa..16240a789650 100644
--- a/drivers/ieee1394/nodemgr.c
+++ b/drivers/ieee1394/nodemgr.c
@@ -844,7 +844,7 @@ static struct node_entry *nodemgr_create_node(octlet_t guid, struct csr1212_csr
         ne->host = host;
         ne->nodeid = nodeid;
         ne->generation = generation;
-        ne->needs_probe = 1;
+        ne->needs_probe = true;
 
         ne->guid = guid;
         ne->guid_vendor_id = (guid >> 40) & 0xffffff;
@@ -1144,7 +1144,7 @@ static void nodemgr_process_root_directory(struct host_info *hi, struct node_ent
         struct csr1212_keyval *kv, *vendor_name_kv = NULL;
         u8 last_key_id = 0;
 
-        ne->needs_probe = 0;
+        ne->needs_probe = false;
 
         csr1212_for_each_dir_entry(ne->csr, kv, ne->csr->root_kv, dentry) {
                 switch (kv->key.id) {
@@ -1295,7 +1295,7 @@ static void nodemgr_update_node(struct node_entry *ne, struct csr1212_csr *csr,
                 nodemgr_update_bus_options(ne);
 
                 /* Mark the node as new, so it gets re-probed */
-                ne->needs_probe = 1;
+                ne->needs_probe = true;
         } else {
                 /* old cache is valid, so update its generation */
                 struct nodemgr_csr_info *ci = ne->csr->private;
@@ -1566,57 +1566,60 @@ static void nodemgr_probe_ne(struct host_info *hi, struct node_entry *ne, int ge
 struct probe_param {
         struct host_info *hi;
         int generation;
+        bool probe_now;
 };
 
-static int __nodemgr_node_probe(struct device *dev, void *data)
+static int node_probe(struct device *dev, void *data)
 {
-        struct probe_param *param = (struct probe_param *)data;
+        struct probe_param *p = data;
         struct node_entry *ne;
 
+        if (p->generation != get_hpsb_generation(p->hi->host))
+                return -EAGAIN;
+
         ne = container_of(dev, struct node_entry, node_dev);
-        if (!ne->needs_probe)
-                nodemgr_probe_ne(param->hi, ne, param->generation);
-        if (ne->needs_probe)
-                nodemgr_probe_ne(param->hi, ne, param->generation);
+        if (ne->needs_probe == p->probe_now)
+                nodemgr_probe_ne(p->hi, ne, p->generation);
         return 0;
 }
 
 static void nodemgr_node_probe(struct host_info *hi, int generation)
 {
-        struct hpsb_host *host = hi->host;
-        struct probe_param param;
+        struct probe_param p;
 
-        param.hi = hi;
-        param.generation = generation;
-        /* Do some processing of the nodes we've probed. This pulls them
+        p.hi = hi;
+        p.generation = generation;
+        /*
+         * Do some processing of the nodes we've probed. This pulls them
          * into the sysfs layer if needed, and can result in processing of
          * unit-directories, or just updating the node and it's
          * unit-directories.
          *
          * Run updates before probes. Usually, updates are time-critical
-         * while probes are time-consuming. (Well, those probes need some
-         * improvement...) */
-
-        class_for_each_device(&nodemgr_ne_class, NULL, &param,
-                              __nodemgr_node_probe);
-
-        /* If we had a bus reset while we were scanning the bus, it is
-         * possible that we did not probe all nodes.  In that case, we
-         * skip the clean up for now, since we could remove nodes that
-         * were still on the bus.  Another bus scan is pending which will
-         * do the clean up eventually.
+         * while probes are time-consuming.
          *
+         * Meanwhile, another bus reset may have happened. In this case we
+         * skip everything here and let the next bus scan handle it.
+         * Otherwise we may prematurely remove nodes which are still there.
+         */
+        p.probe_now = false;
+        if (class_for_each_device(&nodemgr_ne_class, NULL, &p, node_probe) != 0)
+                return;
+
+        p.probe_now = true;
+        if (class_for_each_device(&nodemgr_ne_class, NULL, &p, node_probe) != 0)
+                return;
+        /*
          * Now let's tell the bus to rescan our devices. This may seem
          * like overhead, but the driver-model core will only scan a
          * device for a driver when either the device is added, or when a
          * new driver is added. A bus reset is a good reason to rescan
          * devices that were there before.  For example, an sbp2 device
          * may become available for login, if the host that held it was
-         * just removed.  */
-
-        if (generation == get_hpsb_generation(host))
-                if (bus_rescan_devices(&ieee1394_bus_type))
-                        HPSB_DEBUG("bus_rescan_devices had an error");
+         * just removed.
+         */
+        if (bus_rescan_devices(&ieee1394_bus_type) != 0)
+                HPSB_DEBUG("bus_rescan_devices had an error");
 }
 
 static int nodemgr_send_resume_packet(struct hpsb_host *host)
diff --git a/drivers/ieee1394/nodemgr.h b/drivers/ieee1394/nodemgr.h
index 919e92e2a955..6eb26465a84c 100644
--- a/drivers/ieee1394/nodemgr.h
+++ b/drivers/ieee1394/nodemgr.h
@@ -97,7 +97,7 @@ struct node_entry {
         struct hpsb_host *host;         /* Host this node is attached to */
         nodeid_t nodeid;                /* NodeID */
         struct bus_options busopt;      /* Bus Options */
-        int needs_probe;
+        bool needs_probe;
         unsigned int generation;        /* Synced with hpsb generation */
 
         /* The following is read from the config rom */
diff --git a/drivers/ieee1394/sbp2.c b/drivers/ieee1394/sbp2.c
index 9cbf3154d243..1d6ad3435537 100644
--- a/drivers/ieee1394/sbp2.c
+++ b/drivers/ieee1394/sbp2.c
@@ -731,15 +731,26 @@ static int sbp2_update(struct unit_directory *ud)
 {
         struct sbp2_lu *lu = ud->device.driver_data;
 
-        if (sbp2_reconnect_device(lu)) {
-                /* Reconnect has failed. Perhaps we didn't reconnect fast
-                 * enough. Try a regular login, but first log out just in
-                 * case of any weirdness. */
+        if (sbp2_reconnect_device(lu) != 0) {
+                /*
+                 * Reconnect failed.  If another bus reset happened,
+                 * let nodemgr proceed and call sbp2_update again later
+                 * (or sbp2_remove if this node went away).
+                 */
+                if (!hpsb_node_entry_valid(lu->ne))
+                        return 0;
+                /*
+                 * Or the target rejected the reconnect because we weren't
+                 * fast enough.  Try a regular login, but first log out
+                 * just in case of any weirdness.
+                 */
                 sbp2_logout_device(lu);
 
-                if (sbp2_login_device(lu)) {
-                        /* Login failed too, just fail, and the backend
-                         * will call our sbp2_remove for us */
+                if (sbp2_login_device(lu) != 0) {
+                        if (!hpsb_node_entry_valid(lu->ne))
+                                return 0;
+
+                        /* Maybe another initiator won the login. */
                         SBP2_ERR("Failed to reconnect to sbp2 device!");
                         return -EBUSY;
                 }
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c
index e980ff3335db..d951896ff7fc 100644
--- a/drivers/infiniband/core/cma.c
+++ b/drivers/infiniband/core/cma.c
@@ -155,9 +155,7 @@ struct cma_multicast {
         } multicast;
         struct list_head        list;
         void                    *context;
-        struct sockaddr         addr;
-        u8                      pad[sizeof(struct sockaddr_in6) -
-                                    sizeof(struct sockaddr)];
+        struct sockaddr_storage addr;
 };
 
 struct cma_work {
@@ -786,8 +784,8 @@ static void cma_cancel_operation(struct rdma_id_private *id_priv,
                 cma_cancel_route(id_priv);
                 break;
         case CMA_LISTEN:
-                if (cma_any_addr(&id_priv->id.route.addr.src_addr) &&
-                    !id_priv->cma_dev)
+                if (cma_any_addr((struct sockaddr *) &id_priv->id.route.addr.src_addr)
+                                && !id_priv->cma_dev)
                         cma_cancel_listens(id_priv);
                 break;
         default:
@@ -1026,7 +1024,7 @@ static struct rdma_id_private *cma_new_conn_id(struct rdma_cm_id *listen_id,
                 rt->path_rec[1] = *ib_event->param.req_rcvd.alternate_path;
 
         ib_addr_set_dgid(&rt->addr.dev_addr, &rt->path_rec[0].dgid);
-        ret = rdma_translate_ip(&id->route.addr.src_addr,
+        ret = rdma_translate_ip((struct sockaddr *) &id->route.addr.src_addr,
                                 &id->route.addr.dev_addr);
         if (ret)
                 goto destroy_id;
@@ -1064,7 +1062,7 @@ static struct rdma_id_private *cma_new_udp_id(struct rdma_cm_id *listen_id,
         cma_save_net_info(&id->route.addr, &listen_id->route.addr,
                           ip_ver, port, src, dst);
 
-        ret = rdma_translate_ip(&id->route.addr.src_addr,
+        ret = rdma_translate_ip((struct sockaddr *) &id->route.addr.src_addr,
                                 &id->route.addr.dev_addr);
         if (ret)
                 goto err;
@@ -1377,7 +1375,7 @@ static int cma_ib_listen(struct rdma_id_private *id_priv)
         if (IS_ERR(id_priv->cm_id.ib))
                 return PTR_ERR(id_priv->cm_id.ib);
 
-        addr = &id_priv->id.route.addr.src_addr;
+        addr = (struct sockaddr *) &id_priv->id.route.addr.src_addr;
         svc_id = cma_get_service_id(id_priv->id.ps, addr);
         if (cma_any_addr(addr))
                 ret = ib_cm_listen(id_priv->cm_id.ib, svc_id, 0, NULL);
@@ -1443,7 +1441,7 @@ static void cma_listen_on_dev(struct rdma_id_private *id_priv,
 
         dev_id_priv->state = CMA_ADDR_BOUND;
         memcpy(&id->route.addr.src_addr, &id_priv->id.route.addr.src_addr,
-               ip_addr_size(&id_priv->id.route.addr.src_addr));
+               ip_addr_size((struct sockaddr *) &id_priv->id.route.addr.src_addr));
 
         cma_attach_to_dev(dev_id_priv, cma_dev);
         list_add_tail(&dev_id_priv->listen_list, &id_priv->listen_list);
@@ -1563,13 +1561,14 @@ static int cma_query_ib_route(struct rdma_id_private *id_priv, int timeout_ms,
         path_rec.pkey = cpu_to_be16(ib_addr_get_pkey(&addr->dev_addr));
         path_rec.numb_path = 1;
         path_rec.reversible = 1;
-        path_rec.service_id = cma_get_service_id(id_priv->id.ps, &addr->dst_addr);
+        path_rec.service_id = cma_get_service_id(id_priv->id.ps,
+                                                        (struct sockaddr *) &addr->dst_addr);
 
         comp_mask = IB_SA_PATH_REC_DGID | IB_SA_PATH_REC_SGID |
                     IB_SA_PATH_REC_PKEY | IB_SA_PATH_REC_NUMB_PATH |
                     IB_SA_PATH_REC_REVERSIBLE | IB_SA_PATH_REC_SERVICE_ID;
 
-        if (addr->src_addr.sa_family == AF_INET) {
+        if (addr->src_addr.ss_family == AF_INET) {
                 path_rec.qos_class = cpu_to_be16((u16) id_priv->tos);
                 comp_mask |= IB_SA_PATH_REC_QOS_CLASS;
         } else {
@@ -1848,7 +1847,7 @@ static int cma_resolve_loopback(struct rdma_id_private *id_priv)
         ib_addr_get_sgid(&id_priv->id.route.addr.dev_addr, &gid);
         ib_addr_set_dgid(&id_priv->id.route.addr.dev_addr, &gid);
 
-        if (cma_zero_addr(&id_priv->id.route.addr.src_addr)) {
+        if (cma_zero_addr((struct sockaddr *) &id_priv->id.route.addr.src_addr)) {
                 src_in = (struct sockaddr_in *)&id_priv->id.route.addr.src_addr;
                 dst_in = (struct sockaddr_in *)&id_priv->id.route.addr.dst_addr;
                 src_in->sin_family = dst_in->sin_family;
@@ -1897,7 +1896,7 @@ int rdma_resolve_addr(struct rdma_cm_id *id, struct sockaddr *src_addr,
         if (cma_any_addr(dst_addr))
                 ret = cma_resolve_loopback(id_priv);
         else
-                ret = rdma_resolve_ip(&addr_client, &id->route.addr.src_addr,
+                ret = rdma_resolve_ip(&addr_client, (struct sockaddr *) &id->route.addr.src_addr,
                                       dst_addr, &id->route.addr.dev_addr,
                                       timeout_ms, addr_handler, id_priv);
         if (ret)
@@ -2021,11 +2020,11 @@ static int cma_use_port(struct idr *ps, struct rdma_id_private *id_priv)
          * We don't support binding to any address if anyone is bound to
          * a specific address on the same port.
          */
-        if (cma_any_addr(&id_priv->id.route.addr.src_addr))
+        if (cma_any_addr((struct sockaddr *) &id_priv->id.route.addr.src_addr))
                 return -EADDRNOTAVAIL;
 
         hlist_for_each_entry(cur_id, node, &bind_list->owners, node) {
-                if (cma_any_addr(&cur_id->id.route.addr.src_addr))
+                if (cma_any_addr((struct sockaddr *) &cur_id->id.route.addr.src_addr))
                         return -EADDRNOTAVAIL;
 
                 cur_sin = (struct sockaddr_in *) &cur_id->id.route.addr.src_addr;
@@ -2060,7 +2059,7 @@ static int cma_get_port(struct rdma_id_private *id_priv)
         }
 
         mutex_lock(&lock);
-        if (cma_any_port(&id_priv->id.route.addr.src_addr))
+        if (cma_any_port((struct sockaddr *) &id_priv->id.route.addr.src_addr))
                 ret = cma_alloc_any_port(ps, id_priv);
         else
                 ret = cma_use_port(ps, id_priv);
@@ -2232,7 +2231,7 @@ static int cma_resolve_ib_udp(struct rdma_id_private *id_priv,
 
         req.path = route->path_rec;
         req.service_id = cma_get_service_id(id_priv->id.ps,
-                                            &route->addr.dst_addr);
+                                            (struct sockaddr *) &route->addr.dst_addr);
         req.timeout_ms = 1 << (CMA_CM_RESPONSE_TIMEOUT - 8);
         req.max_cm_retries = CMA_MAX_CM_RETRIES;
 
@@ -2283,7 +2282,7 @@ static int cma_connect_ib(struct rdma_id_private *id_priv,
                 req.alternate_path = &route->path_rec[1];
 
         req.service_id = cma_get_service_id(id_priv->id.ps,
-                                            &route->addr.dst_addr);
+                                            (struct sockaddr *) &route->addr.dst_addr);
         req.qp_num = id_priv->qp_num;
         req.qp_type = IB_QPT_RC;
         req.starting_psn = id_priv->seq_num;
@@ -2667,7 +2666,7 @@ static int cma_join_ib_multicast(struct rdma_id_private *id_priv,
         if (ret)
                 return ret;
 
-        cma_set_mgid(id_priv, &mc->addr, &rec.mgid);
+        cma_set_mgid(id_priv, (struct sockaddr *) &mc->addr, &rec.mgid);
         if (id_priv->id.ps == RDMA_PS_UDP)
                 rec.qkey = cpu_to_be32(RDMA_UDP_QKEY);
         ib_addr_get_sgid(dev_addr, &rec.port_gid);
diff --git a/drivers/infiniband/core/mad_rmpp.c b/drivers/infiniband/core/mad_rmpp.c
index d0ef7d61c037..3af2b84cd838 100644
--- a/drivers/infiniband/core/mad_rmpp.c
+++ b/drivers/infiniband/core/mad_rmpp.c
@@ -133,7 +133,7 @@ static void ack_recv(struct mad_rmpp_recv *rmpp_recv,
         msg = ib_create_send_mad(&rmpp_recv->agent->agent, recv_wc->wc->src_qp,
                                  recv_wc->wc->pkey_index, 1, hdr_len,
                                  0, GFP_KERNEL);
-        if (!msg)
+        if (IS_ERR(msg))
                 return;
 
         format_ack(msg, (struct ib_rmpp_mad *) recv_wc->recv_buf.mad, rmpp_recv);
diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c
index b41dd26bbfa1..3ddacf39b7ba 100644
--- a/drivers/infiniband/core/ucma.c
+++ b/drivers/infiniband/core/ucma.c
@@ -81,9 +81,7 @@ struct ucma_multicast {
 
         u64                     uid;
         struct list_head        list;
-        struct sockaddr         addr;
-        u8                      pad[sizeof(struct sockaddr_in6) -
-                                    sizeof(struct sockaddr)];
+        struct sockaddr_storage addr;
 };
 
 struct ucma_event {
@@ -603,11 +601,11 @@ static ssize_t ucma_query_route(struct ucma_file *file,
                 return PTR_ERR(ctx);
 
         memset(&resp, 0, sizeof resp);
-        addr = &ctx->cm_id->route.addr.src_addr;
+        addr = (struct sockaddr *) &ctx->cm_id->route.addr.src_addr;
         memcpy(&resp.src_addr, addr, addr->sa_family == AF_INET ?
                                      sizeof(struct sockaddr_in) :
                                      sizeof(struct sockaddr_in6));
-        addr = &ctx->cm_id->route.addr.dst_addr;
+        addr = (struct sockaddr *) &ctx->cm_id->route.addr.dst_addr;
         memcpy(&resp.dst_addr, addr, addr->sa_family == AF_INET ?
                                      sizeof(struct sockaddr_in) :
                                      sizeof(struct sockaddr_in6));
@@ -913,7 +911,7 @@ static ssize_t ucma_join_multicast(struct ucma_file *file,
 
         mc->uid = cmd.uid;
         memcpy(&mc->addr, &cmd.addr, sizeof cmd.addr);
-        ret = rdma_join_multicast(ctx->cm_id, &mc->addr, mc);
+        ret = rdma_join_multicast(ctx->cm_id, (struct sockaddr *) &mc->addr, mc);
         if (ret)
                 goto err2;
 
@@ -929,7 +927,7 @@ static ssize_t ucma_join_multicast(struct ucma_file *file,
         return 0;
 
 err3:
-        rdma_leave_multicast(ctx->cm_id, &mc->addr);
+        rdma_leave_multicast(ctx->cm_id, (struct sockaddr *) &mc->addr);
         ucma_cleanup_mc_events(mc);
 err2:
         mutex_lock(&mut);
@@ -975,7 +973,7 @@ static ssize_t ucma_leave_multicast(struct ucma_file *file,
                 goto out;
         }
 
-        rdma_leave_multicast(mc->ctx->cm_id, &mc->addr);
+        rdma_leave_multicast(mc->ctx->cm_id, (struct sockaddr *) &mc->addr);
         mutex_lock(&mc->ctx->file->mut);
         ucma_cleanup_mc_events(mc);
         list_del(&mc->list);
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.c b/drivers/infiniband/hw/cxgb3/cxio_hal.c
index f6d5747153a5..4dcf08b3fd83 100644
--- a/drivers/infiniband/hw/cxgb3/cxio_hal.c
+++ b/drivers/infiniband/hw/cxgb3/cxio_hal.c
@@ -725,9 +725,9 @@ static int __cxio_tpt_op(struct cxio_rdev *rdev_p, u32 reset_tpt_entry,
                                 V_TPT_STAG_TYPE(type) | V_TPT_PDID(pdid));
                 BUG_ON(page_size >= 28);
                 tpt.flags_pagesize_qpid = cpu_to_be32(V_TPT_PERM(perm) |
-                                F_TPT_MW_BIND_ENABLE |
-                                V_TPT_ADDR_TYPE((zbva ? TPT_ZBTO : TPT_VATO)) |
-                                V_TPT_PAGE_SIZE(page_size));
+                        ((perm & TPT_MW_BIND) ? F_TPT_MW_BIND_ENABLE : 0) |
+                        V_TPT_ADDR_TYPE((zbva ? TPT_ZBTO : TPT_VATO)) |
+                        V_TPT_PAGE_SIZE(page_size));
                 tpt.rsvd_pbl_addr = reset_tpt_entry ? 0 :
                                     cpu_to_be32(V_TPT_PBL_ADDR(PBL_OFF(rdev_p, pbl_addr)>>3));
                 tpt.len = cpu_to_be32(len);
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.c b/drivers/infiniband/hw/cxgb3/iwch_provider.c
index b89640aa6e10..eb778bfd6f66 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_provider.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_provider.c
@@ -1187,28 +1187,6 @@ static ssize_t show_rev(struct device *dev, struct device_attribute *attr,
         return sprintf(buf, "%d\n", iwch_dev->rdev.t3cdev_p->type);
 }
 
-static int fw_supports_fastreg(struct iwch_dev *iwch_dev)
-{
-        struct ethtool_drvinfo info;
-        struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev;
-        char *cp, *next;
-        unsigned fw_maj, fw_min;
-
-        rtnl_lock();
-        lldev->ethtool_ops->get_drvinfo(lldev, &info);
-        rtnl_unlock();
-
-        next = info.fw_version+1;
-        cp = strsep(&next, ".");
-        sscanf(cp, "%i", &fw_maj);
-        cp = strsep(&next, ".");
-        sscanf(cp, "%i", &fw_min);
-
-        PDBG("%s maj %u min %u\n", __func__, fw_maj, fw_min);
-
-        return fw_maj > 6 || (fw_maj == 6 && fw_min > 0);
-}
-
 static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr, char *buf)
 {
         struct iwch_dev *iwch_dev = container_of(dev, struct iwch_dev,
@@ -1325,12 +1303,12 @@ int iwch_register_device(struct iwch_dev *dev)
         memset(&dev->ibdev.node_guid, 0, sizeof(dev->ibdev.node_guid));
         memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6);
         dev->ibdev.owner = THIS_MODULE;
-        dev->device_cap_flags = IB_DEVICE_LOCAL_DMA_LKEY | IB_DEVICE_MEM_WINDOW;
+        dev->device_cap_flags = IB_DEVICE_LOCAL_DMA_LKEY |
+                                IB_DEVICE_MEM_WINDOW |
+                                IB_DEVICE_MEM_MGT_EXTENSIONS;
 
         /* cxgb3 supports STag 0. */
         dev->ibdev.local_dma_lkey = 0;
-        if (fw_supports_fastreg(dev))
-                dev->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
 
         dev->ibdev.uverbs_cmd_mask =
             (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.h b/drivers/infiniband/hw/cxgb3/iwch_provider.h
index f5ceca05c435..a237d49bdcc9 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_provider.h
+++ b/drivers/infiniband/hw/cxgb3/iwch_provider.h
@@ -293,9 +293,16 @@ static inline u32 iwch_ib_to_tpt_access(int acc)
         return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |
                (acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0) |
                (acc & IB_ACCESS_LOCAL_WRITE ? TPT_LOCAL_WRITE : 0) |
+               (acc & IB_ACCESS_MW_BIND ? TPT_MW_BIND : 0) |
                TPT_LOCAL_READ;
 }
 
+static inline u32 iwch_ib_to_tpt_bind_access(int acc)
+{
+        return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |
+               (acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0);
+}
+
 enum iwch_mmid_state {
         IWCH_STAG_STATE_VALID,
         IWCH_STAG_STATE_INVALID
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c
index 9a3be3a9d5dc..3e4585c2318a 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_qp.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c
@@ -565,7 +565,7 @@ int iwch_bind_mw(struct ib_qp *qp,
         wqe->bind.type = TPT_VATO;
 
         /* TBD: check perms */
-        wqe->bind.perms = iwch_ib_to_tpt_access(mw_bind->mw_access_flags);
+        wqe->bind.perms = iwch_ib_to_tpt_bind_access(mw_bind->mw_access_flags);
         wqe->bind.mr_stag = cpu_to_be32(mw_bind->mr->lkey);
         wqe->bind.mw_stag = cpu_to_be32(mw->rkey);
         wqe->bind.mw_len = cpu_to_be32(mw_bind->length);
@@ -879,20 +879,13 @@ static int rdma_init(struct iwch_dev *rhp, struct iwch_qp *qhp,
                 (qhp->attr.mpa_attr.xmit_marker_enabled << 1) |
                 (qhp->attr.mpa_attr.crc_enabled << 2);
 
-        /*
-         * XXX - The IWCM doesn't quite handle getting these
-         * attrs set before going into RTS.  For now, just turn
-         * them on always...
-         */
-#if 0
-        init_attr.qpcaps = qhp->attr.enableRdmaRead |
-                (qhp->attr.enableRdmaWrite << 1) |
-                (qhp->attr.enableBind << 2) |
-                (qhp->attr.enable_stag0_fastreg << 3) |
-                (qhp->attr.enable_stag0_fastreg << 4);
-#else
-        init_attr.qpcaps = 0x1f;
-#endif
+        init_attr.qpcaps = uP_RI_QP_RDMA_READ_ENABLE |
+                           uP_RI_QP_RDMA_WRITE_ENABLE |
+                           uP_RI_QP_BIND_ENABLE;
+        if (!qhp->ibqp.uobject)
+                init_attr.qpcaps |= uP_RI_QP_STAG0_ENABLE |
+                                    uP_RI_QP_FAST_REGISTER_ENABLE;
+
         init_attr.tcp_emss = qhp->ep->emss;
         init_attr.ord = qhp->attr.max_ord;
         init_attr.ird = qhp->attr.max_ird;
@@ -900,8 +893,6 @@ static int rdma_init(struct iwch_dev *rhp, struct iwch_qp *qhp,
         init_attr.qp_dma_size = (1UL << qhp->wq.size_log2);
         init_attr.rqe_count = iwch_rqes_posted(qhp);
         init_attr.flags = qhp->attr.mpa_attr.initiator ? MPA_INITIATOR : 0;
-        if (!qhp->ibqp.uobject)
-                init_attr.flags |= PRIV_QP;
         if (peer2peer) {
                 init_attr.rtr_type = RTR_READ;
                 if (init_attr.ord == 0 && qhp->attr.mpa_attr.initiator)
diff --git a/drivers/infiniband/hw/ehca/ehca_classes.h b/drivers/infiniband/hw/ehca/ehca_classes.h
index 0b0618edd645..1ab919f836a8 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes.h
+++ b/drivers/infiniband/hw/ehca/ehca_classes.h
@@ -156,6 +156,14 @@ struct ehca_mod_qp_parm {
 
 #define EHCA_MOD_QP_PARM_MAX 4
 
+#define QMAP_IDX_MASK 0xFFFFULL
+
+/* struct for tracking if cqes have been reported to the application */
+struct ehca_qmap_entry {
+        u16 app_wr_id;
+        u16 reported;
+};
+
 struct ehca_qp {
         union {
                 struct ib_qp ib_qp;
@@ -165,6 +173,7 @@ struct ehca_qp {
         enum ehca_ext_qp_type ext_type;
         enum ib_qp_state state;
         struct ipz_queue ipz_squeue;
+        struct ehca_qmap_entry *sq_map;
         struct ipz_queue ipz_rqueue;
         struct h_galpas galpas;
         u32 qkey;
diff --git a/drivers/infiniband/hw/ehca/ehca_qes.h b/drivers/infiniband/hw/ehca/ehca_qes.h
index 818803057ebf..5d28e3e98a20 100644
--- a/drivers/infiniband/hw/ehca/ehca_qes.h
+++ b/drivers/infiniband/hw/ehca/ehca_qes.h
@@ -213,6 +213,7 @@ struct ehca_wqe {
 #define WC_STATUS_ERROR_BIT 0x80000000
 #define WC_STATUS_REMOTE_ERROR_FLAGS 0x0000F800
 #define WC_STATUS_PURGE_BIT 0x10
+#define WC_SEND_RECEIVE_BIT 0x80
 
 struct ehca_cqe {
         u64 work_request_id;
diff --git a/drivers/infiniband/hw/ehca/ehca_qp.c b/drivers/infiniband/hw/ehca/ehca_qp.c
index ea13efddf175..b6bcee036734 100644
--- a/drivers/infiniband/hw/ehca/ehca_qp.c
+++ b/drivers/infiniband/hw/ehca/ehca_qp.c
@@ -412,6 +412,7 @@ static struct ehca_qp *internal_create_qp(
         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
                                               ib_device);
         struct ib_ucontext *context = NULL;
+        u32 nr_qes;
         u64 h_ret;
         int is_llqp = 0, has_srq = 0;
         int qp_type, max_send_sge, max_recv_sge, ret;
@@ -715,6 +716,15 @@ static struct ehca_qp *internal_create_qp(
                                  "and pages ret=%i", ret);
                         goto create_qp_exit2;
                 }
+                nr_qes = my_qp->ipz_squeue.queue_length /
+                         my_qp->ipz_squeue.qe_size;
+                my_qp->sq_map = vmalloc(nr_qes *
+                                        sizeof(struct ehca_qmap_entry));
+                if (!my_qp->sq_map) {
+                        ehca_err(pd->device, "Couldn't allocate squeue "
+                                 "map ret=%i", ret);
+                        goto create_qp_exit3;
+                }
         }
 
         if (HAS_RQ(my_qp)) {
@@ -724,7 +734,7 @@ static struct ehca_qp *internal_create_qp(
                 if (ret) {
                         ehca_err(pd->device, "Couldn't initialize rqueue "
                                  "and pages ret=%i", ret);
-                        goto create_qp_exit3;
+                        goto create_qp_exit4;
                 }
         }
 
@@ -770,7 +780,7 @@ static struct ehca_qp *internal_create_qp(
                         if (!my_qp->mod_qp_parm) {
                                 ehca_err(pd->device,
                                          "Could not alloc mod_qp_parm");
-                                goto create_qp_exit4;
+                                goto create_qp_exit5;
                         }
                 }
         }
@@ -780,7 +790,7 @@ static struct ehca_qp *internal_create_qp(
                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
                 if (h_ret != H_SUCCESS) {
                         ret = ehca2ib_return_code(h_ret);
-                        goto create_qp_exit5;
+                        goto create_qp_exit6;
                 }
         }
 
@@ -789,7 +799,7 @@ static struct ehca_qp *internal_create_qp(
                 if (ret) {
                         ehca_err(pd->device,
                                  "Couldn't assign qp to send_cq ret=%i", ret);
-                        goto create_qp_exit5;
+                        goto create_qp_exit6;
                 }
         }
 
@@ -815,22 +825,26 @@ static struct ehca_qp *internal_create_qp(
                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
                         ehca_err(pd->device, "Copy to udata failed");
                         ret = -EINVAL;
-                        goto create_qp_exit6;
+                        goto create_qp_exit7;
                 }
         }
 
         return my_qp;
 
-create_qp_exit6:
+create_qp_exit7:
         ehca_cq_unassign_qp(my_qp->send_cq, my_qp->real_qp_num);
 
-create_qp_exit5:
+create_qp_exit6:
         kfree(my_qp->mod_qp_parm);
 
-create_qp_exit4:
+create_qp_exit5:
         if (HAS_RQ(my_qp))
                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
 
+create_qp_exit4:
+        if (HAS_SQ(my_qp))
+                vfree(my_qp->sq_map);
+
 create_qp_exit3:
         if (HAS_SQ(my_qp))
                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
@@ -1534,8 +1548,6 @@ static int internal_modify_qp(struct ib_qp *ibqp,
         if (attr_mask & IB_QP_QKEY)
                 my_qp->qkey = attr->qkey;
 
-        my_qp->state = qp_new_state;
-
 modify_qp_exit2:
         if (squeue_locked) { /* this means: sqe -> rts */
                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
@@ -1551,6 +1563,8 @@ modify_qp_exit1:
 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
                    struct ib_udata *udata)
 {
+        int ret = 0;
+
         struct ehca_shca *shca = container_of(ibqp->device, struct ehca_shca,
                                               ib_device);
         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
@@ -1597,12 +1611,18 @@ int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
                                  attr->qp_state, my_qp->init_attr.port_num,
                                  ibqp->qp_type);
                         spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
-                        return 0;
+                        goto out;
                 }
                 spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
         }
 
-        return internal_modify_qp(ibqp, attr, attr_mask, 0);
+        ret = internal_modify_qp(ibqp, attr, attr_mask, 0);
+
+out:
+        if ((ret == 0) && (attr_mask & IB_QP_STATE))
+                my_qp->state = attr->qp_state;
+
+        return ret;
 }
 
 void ehca_recover_sqp(struct ib_qp *sqp)
@@ -1973,8 +1993,10 @@ static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 
         if (HAS_RQ(my_qp))
                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
-        if (HAS_SQ(my_qp))
+        if (HAS_SQ(my_qp)) {
                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
+                vfree(my_qp->sq_map);
+        }
         kmem_cache_free(qp_cache, my_qp);
         atomic_dec(&shca->num_qps);
         return 0;
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/infiniband/hw/ehca/ehca_reqs.c
index 898c8b5c38dd..4426d82fe798 100644
--- a/drivers/infiniband/hw/ehca/ehca_reqs.c
+++ b/drivers/infiniband/hw/ehca/ehca_reqs.c
@@ -139,6 +139,7 @@ static void trace_send_wr_ud(const struct ib_send_wr *send_wr)
 static inline int ehca_write_swqe(struct ehca_qp *qp,
                                   struct ehca_wqe *wqe_p,
                                   const struct ib_send_wr *send_wr,
+                                  u32 sq_map_idx,
                                   int hidden)
 {
         u32 idx;
@@ -157,7 +158,11 @@ static inline int ehca_write_swqe(struct ehca_qp *qp,
         /* clear wqe header until sglist */
         memset(wqe_p, 0, offsetof(struct ehca_wqe, u.ud_av.sg_list));
 
-        wqe_p->work_request_id = send_wr->wr_id;
+        wqe_p->work_request_id = send_wr->wr_id & ~QMAP_IDX_MASK;
+        wqe_p->work_request_id |= sq_map_idx & QMAP_IDX_MASK;
+
+        qp->sq_map[sq_map_idx].app_wr_id = send_wr->wr_id & QMAP_IDX_MASK;
+        qp->sq_map[sq_map_idx].reported = 0;
 
         switch (send_wr->opcode) {
         case IB_WR_SEND:
@@ -381,6 +386,7 @@ static inline int post_one_send(struct ehca_qp *my_qp,
 {
         struct ehca_wqe *wqe_p;
         int ret;
+        u32 sq_map_idx;
         u64 start_offset = my_qp->ipz_squeue.current_q_offset;
 
         /* get pointer next to free WQE */
@@ -393,8 +399,15 @@ static inline int post_one_send(struct ehca_qp *my_qp,
                          "qp_num=%x", my_qp->ib_qp.qp_num);
                 return -ENOMEM;
         }
+
+        /*
+         * Get the index of the WQE in the send queue. The same index is used
+         * for writing into the sq_map.
+         */
+        sq_map_idx = start_offset / my_qp->ipz_squeue.qe_size;
+
         /* write a SEND WQE into the QUEUE */
-        ret = ehca_write_swqe(my_qp, wqe_p, cur_send_wr, hidden);
+        ret = ehca_write_swqe(my_qp, wqe_p, cur_send_wr, sq_map_idx, hidden);
         /*
          * if something failed,
          * reset the free entry pointer to the start value
@@ -589,7 +602,7 @@ static inline int ehca_poll_cq_one(struct ib_cq *cq, struct ib_wc *wc)
         struct ehca_qp *my_qp;
         int cqe_count = 0, is_error;
 
-poll_cq_one_read_cqe:
+repoll:
         cqe = (struct ehca_cqe *)
                 ipz_qeit_get_inc_valid(&my_cq->ipz_queue);
         if (!cqe) {
@@ -617,7 +630,7 @@ poll_cq_one_read_cqe:
                         ehca_dmp(cqe, 64, "cq_num=%x qp_num=%x",
                                  my_cq->cq_number, cqe->local_qp_number);
                         /* ignore this purged cqe */
-                        goto poll_cq_one_read_cqe;
+                        goto repoll;
                 }
                 spin_lock_irqsave(&qp->spinlock_s, flags);
                 purgeflag = qp->sqerr_purgeflag;
@@ -636,7 +649,7 @@ poll_cq_one_read_cqe:
                          * that caused sqe and turn off purge flag
                          */
                         qp->sqerr_purgeflag = 0;
-                        goto poll_cq_one_read_cqe;
+                        goto repoll;
                 }
         }
 
@@ -654,8 +667,34 @@ poll_cq_one_read_cqe:
                          my_cq, my_cq->cq_number);
         }
 
-        /* we got a completion! */
-        wc->wr_id = cqe->work_request_id;
+        read_lock(&ehca_qp_idr_lock);
+        my_qp = idr_find(&ehca_qp_idr, cqe->qp_token);
+        read_unlock(&ehca_qp_idr_lock);
+        if (!my_qp)
+                goto repoll;
+        wc->qp = &my_qp->ib_qp;
+
+        if (!(cqe->w_completion_flags & WC_SEND_RECEIVE_BIT)) {
+                struct ehca_qmap_entry *qmap_entry;
+                /*
+                 * We got a send completion and need to restore the original
+                 * wr_id.
+                 */
+                qmap_entry = &my_qp->sq_map[cqe->work_request_id &
+                                            QMAP_IDX_MASK];
+
+                if (qmap_entry->reported) {
+                        ehca_warn(cq->device, "Double cqe on qp_num=%#x",
+                                  my_qp->real_qp_num);
+                        /* found a double cqe, discard it and read next one */
+                        goto repoll;
+                }
+                wc->wr_id = cqe->work_request_id & ~QMAP_IDX_MASK;
+                wc->wr_id |= qmap_entry->app_wr_id;
+                qmap_entry->reported = 1;
+        } else
+                /* We got a receive completion. */
+                wc->wr_id = cqe->work_request_id;
 
         /* eval ib_wc_opcode */
         wc->opcode = ib_wc_opcode[cqe->optype]-1;
@@ -667,7 +706,7 @@ poll_cq_one_read_cqe:
                 ehca_dmp(cqe, 64, "ehca_cq=%p cq_num=%x",
                          my_cq, my_cq->cq_number);
                 /* update also queue adder to throw away this entry!!! */
-                goto poll_cq_one_exit0;
+                goto repoll;
         }
 
         /* eval ib_wc_status */
@@ -678,11 +717,6 @@ poll_cq_one_read_cqe:
         } else
                 wc->status = IB_WC_SUCCESS;
 
-        read_lock(&ehca_qp_idr_lock);
-        my_qp = idr_find(&ehca_qp_idr, cqe->qp_token);
-        wc->qp = &my_qp->ib_qp;
-        read_unlock(&ehca_qp_idr_lock);
-
         wc->byte_len = cqe->nr_bytes_transferred;
         wc->pkey_index = cqe->pkey_index;
         wc->slid = cqe->rlid;
diff --git a/drivers/infiniband/hw/ipath/ipath_driver.c b/drivers/infiniband/hw/ipath/ipath_driver.c
index daad09a45910..ad0aab60b051 100644
--- a/drivers/infiniband/hw/ipath/ipath_driver.c
+++ b/drivers/infiniband/hw/ipath/ipath_driver.c
@@ -1259,7 +1259,7 @@ reloop:
                          */
                         ipath_cdbg(ERRPKT, "Error Pkt, but no eflags! egrbuf"
                                   " %x, len %x hdrq+%x rhf: %Lx\n",
-                                  etail, tlen, l,
+                                  etail, tlen, l, (unsigned long long)
                                   le64_to_cpu(*(__le64 *) rhf_addr));
                         if (ipath_debug & __IPATH_ERRPKTDBG) {
                                 u32 j, *d, dw = rsize-2;
@@ -1457,7 +1457,8 @@ static void ipath_reset_availshadow(struct ipath_devdata *dd)
                         0xaaaaaaaaaaaaaaaaULL); /* All BUSY bits in qword */
                 if (oldval != dd->ipath_pioavailshadow[i])
                         ipath_dbg("shadow[%d] was %Lx, now %lx\n",
-                                i, oldval, dd->ipath_pioavailshadow[i]);
+                                i, (unsigned long long) oldval,
+                                dd->ipath_pioavailshadow[i]);
         }
         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
 }
diff --git a/drivers/infiniband/hw/ipath/ipath_iba7220.c b/drivers/infiniband/hw/ipath/ipath_iba7220.c
index fadbfbf55a6a..d90f5e9a54fa 100644
--- a/drivers/infiniband/hw/ipath/ipath_iba7220.c
+++ b/drivers/infiniband/hw/ipath/ipath_iba7220.c
@@ -1032,7 +1032,7 @@ static int ipath_7220_bringup_serdes(struct ipath_devdata *dd)
         ipath_cdbg(VERBOSE, "done: xgxs=%llx from %llx\n",
                    (unsigned long long)
                    ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig),
-                   prev_val);
+                   (unsigned long long) prev_val);
 
         guid = be64_to_cpu(dd->ipath_guid);
 
@@ -1042,7 +1042,8 @@ static int ipath_7220_bringup_serdes(struct ipath_devdata *dd)
                 ipath_dbg("No GUID for heartbeat, faking %llx\n",
                         (unsigned long long)guid);
         } else
-                ipath_cdbg(VERBOSE, "Wrote %llX to HRTBT_GUID\n", guid);
+                ipath_cdbg(VERBOSE, "Wrote %llX to HRTBT_GUID\n",
+                        (unsigned long long) guid);
         ipath_write_kreg(dd, dd->ipath_kregs->kr_hrtbt_guid, guid);
         return ret;
 }
@@ -2505,7 +2506,7 @@ done:
         if (dd->ipath_flags & IPATH_IB_AUTONEG_INPROG) {
                 ipath_dbg("Did not get to DDR INIT (%x) after %Lu msecs\n",
                         ipath_ib_state(dd, dd->ipath_lastibcstat),
-                        jiffies_to_msecs(jiffies)-startms);
+                        (unsigned long long) jiffies_to_msecs(jiffies)-startms);
                 dd->ipath_flags &= ~IPATH_IB_AUTONEG_INPROG;
                 if (dd->ipath_autoneg_tries == IPATH_AUTONEG_TRIES) {
                         dd->ipath_flags |= IPATH_IB_AUTONEG_FAILED;
diff --git a/drivers/infiniband/hw/ipath/ipath_intr.c b/drivers/infiniband/hw/ipath/ipath_intr.c
index 26900b3b7a4e..6c21b4b5ec71 100644
--- a/drivers/infiniband/hw/ipath/ipath_intr.c
+++ b/drivers/infiniband/hw/ipath/ipath_intr.c
@@ -356,9 +356,10 @@ static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
                         dd->ipath_cregs->cr_iblinkerrrecovcnt);
                 if (linkrecov != dd->ipath_lastlinkrecov) {
                         ipath_dbg("IB linkrecov up %Lx (%s %s) recov %Lu\n",
-                                ibcs, ib_linkstate(dd, ibcs),
+                                (unsigned long long) ibcs,
+                                ib_linkstate(dd, ibcs),
                                 ipath_ibcstatus_str[ltstate],
-                                linkrecov);
+                                (unsigned long long) linkrecov);
                         /* and no more until active again */
                         dd->ipath_lastlinkrecov = 0;
                         ipath_set_linkstate(dd, IPATH_IB_LINKDOWN);
@@ -1118,9 +1119,11 @@ irqreturn_t ipath_intr(int irq, void *data)
         if (unlikely(istat & ~dd->ipath_i_bitsextant))
                 ipath_dev_err(dd,
                               "interrupt with unknown interrupts %Lx set\n",
+                              (unsigned long long)
                               istat & ~dd->ipath_i_bitsextant);
         else if (istat & ~INFINIPATH_I_ERROR) /* errors do own printing */
-                ipath_cdbg(VERBOSE, "intr stat=0x%Lx\n", istat);
+                ipath_cdbg(VERBOSE, "intr stat=0x%Lx\n",
+                        (unsigned long long) istat);
 
         if (istat & INFINIPATH_I_ERROR) {
                 ipath_stats.sps_errints++;
@@ -1128,7 +1131,8 @@ irqreturn_t ipath_intr(int irq, void *data)
                                           dd->ipath_kregs->kr_errorstatus);
                 if (!estat)
                         dev_info(&dd->pcidev->dev, "error interrupt (%Lx), "
-                                 "but no error bits set!\n", istat);
+                                 "but no error bits set!\n",
+                                 (unsigned long long) istat);
                 else if (estat == -1LL)
                         /*
                          * should we try clearing all, or hope next read
diff --git a/drivers/infiniband/hw/ipath/ipath_verbs.c b/drivers/infiniband/hw/ipath/ipath_verbs.c
index 55c718828826..b766e40e9ebf 100644
--- a/drivers/infiniband/hw/ipath/ipath_verbs.c
+++ b/drivers/infiniband/hw/ipath/ipath_verbs.c
@@ -1021,7 +1021,7 @@ static void sdma_complete(void *cookie, int status)
         struct ipath_verbs_txreq *tx = cookie;
         struct ipath_qp *qp = tx->qp;
         struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
-        unsigned int flags;
+        unsigned long flags;
         enum ib_wc_status ibs = status == IPATH_SDMA_TXREQ_S_OK ?
                 IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR;
 
@@ -1051,7 +1051,7 @@ static void sdma_complete(void *cookie, int status)
 
 static void decrement_dma_busy(struct ipath_qp *qp)
 {
-        unsigned int flags;
+        unsigned long flags;
 
         if (atomic_dec_and_test(&qp->s_dma_busy)) {
                 spin_lock_irqsave(&qp->s_lock, flags);
@@ -1221,7 +1221,7 @@ static int ipath_verbs_send_pio(struct ipath_qp *qp,
         unsigned flush_wc;
         u32 control;
         int ret;
-        unsigned int flags;
+        unsigned long flags;
 
         piobuf = ipath_getpiobuf(dd, plen, NULL);
         if (unlikely(piobuf == NULL)) {
diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c
index a1464574bfdd..d0866a3636e2 100644
--- a/drivers/infiniband/hw/mlx4/cq.c
+++ b/drivers/infiniband/hw/mlx4/cq.c
@@ -515,17 +515,17 @@ static void mlx4_ib_handle_error_cqe(struct mlx4_err_cqe *cqe,
         wc->vendor_err = cqe->vendor_err_syndrome;
 }
 
-static int mlx4_ib_ipoib_csum_ok(__be32 status, __be16 checksum)
+static int mlx4_ib_ipoib_csum_ok(__be16 status, __be16 checksum)
 {
-        return ((status & cpu_to_be32(MLX4_CQE_IPOIB_STATUS_IPV4        |
-                                      MLX4_CQE_IPOIB_STATUS_IPV4F       |
-                                      MLX4_CQE_IPOIB_STATUS_IPV4OPT     |
-                                      MLX4_CQE_IPOIB_STATUS_IPV6        |
-                                      MLX4_CQE_IPOIB_STATUS_IPOK)) ==
-                cpu_to_be32(MLX4_CQE_IPOIB_STATUS_IPV4  |
-                            MLX4_CQE_IPOIB_STATUS_IPOK))                &&
-                (status & cpu_to_be32(MLX4_CQE_IPOIB_STATUS_UDP |
-                                      MLX4_CQE_IPOIB_STATUS_TCP))       &&
+        return ((status & cpu_to_be16(MLX4_CQE_STATUS_IPV4      |
+                                      MLX4_CQE_STATUS_IPV4F     |
+                                      MLX4_CQE_STATUS_IPV4OPT   |
+                                      MLX4_CQE_STATUS_IPV6      |
+                                      MLX4_CQE_STATUS_IPOK)) ==
+                cpu_to_be16(MLX4_CQE_STATUS_IPV4        |
+                            MLX4_CQE_STATUS_IPOK))              &&
+                (status & cpu_to_be16(MLX4_CQE_STATUS_UDP       |
+                                      MLX4_CQE_STATUS_TCP))     &&
                 checksum == cpu_to_be16(0xffff);
 }
 
@@ -582,17 +582,17 @@ repoll:
         }
 
         if (!*cur_qp ||
-            (be32_to_cpu(cqe->my_qpn) & 0xffffff) != (*cur_qp)->mqp.qpn) {
+            (be32_to_cpu(cqe->vlan_my_qpn) & MLX4_CQE_QPN_MASK) != (*cur_qp)->mqp.qpn) {
                 /*
                  * We do not have to take the QP table lock here,
                  * because CQs will be locked while QPs are removed
                  * from the table.
                  */
                 mqp = __mlx4_qp_lookup(to_mdev(cq->ibcq.device)->dev,
-                                       be32_to_cpu(cqe->my_qpn));
+                                       be32_to_cpu(cqe->vlan_my_qpn));
                 if (unlikely(!mqp)) {
                         printk(KERN_WARNING "CQ %06x with entry for unknown QPN %06x\n",
-                               cq->mcq.cqn, be32_to_cpu(cqe->my_qpn) & 0xffffff);
+                               cq->mcq.cqn, be32_to_cpu(cqe->vlan_my_qpn) & MLX4_CQE_QPN_MASK);
                         return -EINVAL;
                 }
 
@@ -692,14 +692,13 @@ repoll:
                 }
 
                 wc->slid           = be16_to_cpu(cqe->rlid);
-                wc->sl             = cqe->sl >> 4;
+                wc->sl             = be16_to_cpu(cqe->sl_vid >> 12);
                 g_mlpath_rqpn      = be32_to_cpu(cqe->g_mlpath_rqpn);
                 wc->src_qp         = g_mlpath_rqpn & 0xffffff;
                 wc->dlid_path_bits = (g_mlpath_rqpn >> 24) & 0x7f;
                 wc->wc_flags      |= g_mlpath_rqpn & 0x80000000 ? IB_WC_GRH : 0;
                 wc->pkey_index     = be32_to_cpu(cqe->immed_rss_invalid) & 0x7f;
-                wc->csum_ok        = mlx4_ib_ipoib_csum_ok(cqe->ipoib_status,
-                                                           cqe->checksum);
+                wc->csum_ok        = mlx4_ib_ipoib_csum_ok(cqe->status, cqe->checksum);
         }
 
         return 0;
@@ -767,7 +766,7 @@ void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq)
          */
         while ((int) --prod_index - (int) cq->mcq.cons_index >= 0) {
                 cqe = get_cqe(cq, prod_index & cq->ibcq.cqe);
-                if ((be32_to_cpu(cqe->my_qpn) & 0xffffff) == qpn) {
+                if ((be32_to_cpu(cqe->vlan_my_qpn) & MLX4_CQE_QPN_MASK) == qpn) {
                         if (srq && !(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK))
                                 mlx4_ib_free_srq_wqe(srq, be16_to_cpu(cqe->wqe_index));
                         ++nfreed;
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c
index f7bc7dd8578a..f29dbb767e87 100644
--- a/drivers/infiniband/hw/mlx4/qp.c
+++ b/drivers/infiniband/hw/mlx4/qp.c
@@ -902,7 +902,7 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,
                         context->mtu_msgmax = (IB_MTU_4096 << 5) |
                                               ilog2(dev->dev->caps.max_gso_sz);
                 else
-                        context->mtu_msgmax = (IB_MTU_4096 << 5) | 11;
+                        context->mtu_msgmax = (IB_MTU_4096 << 5) | 12;
         } else if (attr_mask & IB_QP_PATH_MTU) {
                 if (attr->path_mtu < IB_MTU_256 || attr->path_mtu > IB_MTU_4096) {
                         printk(KERN_ERR "path MTU (%u) is invalid\n",
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_cm.c b/drivers/infiniband/ulp/ipoib/ipoib_cm.c
index 0f2d3045061a..341ffedafed6 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_cm.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_cm.c
@@ -202,7 +202,7 @@ static void ipoib_cm_free_rx_ring(struct net_device *dev,
                         dev_kfree_skb_any(rx_ring[i].skb);
                 }
 
-        kfree(rx_ring);
+        vfree(rx_ring);
 }
 
 static void ipoib_cm_start_rx_drain(struct ipoib_dev_priv *priv)
@@ -337,7 +337,7 @@ static void ipoib_cm_init_rx_wr(struct net_device *dev,
                 sge[i].length = PAGE_SIZE;
 
         wr->next    = NULL;
-        wr->sg_list = priv->cm.rx_sge;
+        wr->sg_list = sge;
         wr->num_sge = priv->cm.num_frags;
 }
 
@@ -352,9 +352,14 @@ static int ipoib_cm_nonsrq_init_rx(struct net_device *dev, struct ib_cm_id *cm_i
         int ret;
         int i;
 
-        rx->rx_ring = kcalloc(ipoib_recvq_size, sizeof *rx->rx_ring, GFP_KERNEL);
-        if (!rx->rx_ring)
+        rx->rx_ring = vmalloc(ipoib_recvq_size * sizeof *rx->rx_ring);
+        if (!rx->rx_ring) {
+                printk(KERN_WARNING "%s: failed to allocate CM non-SRQ ring (%d entries)\n",
+                       priv->ca->name, ipoib_recvq_size);
                 return -ENOMEM;
+        }
+
+        memset(rx->rx_ring, 0, ipoib_recvq_size * sizeof *rx->rx_ring);
 
         t = kmalloc(sizeof *t, GFP_KERNEL);
         if (!t) {
@@ -1494,14 +1499,16 @@ static void ipoib_cm_create_srq(struct net_device *dev, int max_sge)
                 return;
         }
 
-        priv->cm.srq_ring = kzalloc(ipoib_recvq_size * sizeof *priv->cm.srq_ring,
-                                    GFP_KERNEL);
+        priv->cm.srq_ring = vmalloc(ipoib_recvq_size * sizeof *priv->cm.srq_ring);
         if (!priv->cm.srq_ring) {
                 printk(KERN_WARNING "%s: failed to allocate CM SRQ ring (%d entries)\n",
                        priv->ca->name, ipoib_recvq_size);
                 ib_destroy_srq(priv->cm.srq);
                 priv->cm.srq = NULL;
+                return;
         }
+
+        memset(priv->cm.srq_ring, 0, ipoib_recvq_size * sizeof *priv->cm.srq_ring);
 }
 
 int ipoib_cm_dev_init(struct net_device *dev)
diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c
index 2d65411f6763..3524bef62be6 100644
--- a/drivers/input/evdev.c
+++ b/drivers/input/evdev.c
@@ -647,6 +647,47 @@ static int str_to_user(const char *str, unsigned int maxlen, void __user *p)
         return copy_to_user(p, str, len) ? -EFAULT : len;
 }
 
+#define OLD_KEY_MAX     0x1ff
+static int handle_eviocgbit(struct input_dev *dev, unsigned int cmd, void __user *p, int compat_mode)
+{
+        static unsigned long keymax_warn_time;
+        unsigned long *bits;
+        int len;
+
+        switch (_IOC_NR(cmd) & EV_MAX) {
+
+        case      0: bits = dev->evbit;  len = EV_MAX;  break;
+        case EV_KEY: bits = dev->keybit; len = KEY_MAX; break;
+        case EV_REL: bits = dev->relbit; len = REL_MAX; break;
+        case EV_ABS: bits = dev->absbit; len = ABS_MAX; break;
+        case EV_MSC: bits = dev->mscbit; len = MSC_MAX; break;
+        case EV_LED: bits = dev->ledbit; len = LED_MAX; break;
+        case EV_SND: bits = dev->sndbit; len = SND_MAX; break;
+        case EV_FF:  bits = dev->ffbit;  len = FF_MAX;  break;
+        case EV_SW:  bits = dev->swbit;  len = SW_MAX;  break;
+        default: return -EINVAL;
+        }
+
+        /*
+         * Work around bugs in userspace programs that like to do
+         * EVIOCGBIT(EV_KEY, KEY_MAX) and not realize that 'len'
+         * should be in bytes, not in bits.
+         */
+        if ((_IOC_NR(cmd) & EV_MAX) == EV_KEY && _IOC_SIZE(cmd) == OLD_KEY_MAX) {
+                len = OLD_KEY_MAX;
+                if (printk_timed_ratelimit(&keymax_warn_time, 10 * 1000))
+                        printk(KERN_WARNING
+                                "evdev.c(EVIOCGBIT): Suspicious buffer size %u, "
+                                "limiting output to %zu bytes. See "
+                                "http://userweb.kernel.org/~dtor/eviocgbit-bug.html\n",
+                                OLD_KEY_MAX,
+                                BITS_TO_LONGS(OLD_KEY_MAX) * sizeof(long));
+        }
+
+        return bits_to_user(bits, len, _IOC_SIZE(cmd), p, compat_mode);
+}
+#undef OLD_KEY_MAX
+
 static long evdev_do_ioctl(struct file *file, unsigned int cmd,
                            void __user *p, int compat_mode)
 {
@@ -733,26 +774,8 @@ static long evdev_do_ioctl(struct file *file, unsigned int cmd,
 
                 if (_IOC_DIR(cmd) == _IOC_READ) {
 
-                        if ((_IOC_NR(cmd) & ~EV_MAX) == _IOC_NR(EVIOCGBIT(0, 0))) {
-
-                                unsigned long *bits;
-                                int len;
-
-                                switch (_IOC_NR(cmd) & EV_MAX) {
-
-                                case      0: bits = dev->evbit;  len = EV_MAX;  break;
-                                case EV_KEY: bits = dev->keybit; len = KEY_MAX; break;
-                                case EV_REL: bits = dev->relbit; len = REL_MAX; break;
-                                case EV_ABS: bits = dev->absbit; len = ABS_MAX; break;
-                                case EV_MSC: bits = dev->mscbit; len = MSC_MAX; break;
-                                case EV_LED: bits = dev->ledbit; len = LED_MAX; break;
-                                case EV_SND: bits = dev->sndbit; len = SND_MAX; break;
-                                case EV_FF:  bits = dev->ffbit;  len = FF_MAX;  break;
-                                case EV_SW:  bits = dev->swbit;  len = SW_MAX;  break;
-                                default: return -EINVAL;
-                                }
-                                return bits_to_user(bits, len, _IOC_SIZE(cmd), p, compat_mode);
-                        }
+                        if ((_IOC_NR(cmd) & ~EV_MAX) == _IOC_NR(EVIOCGBIT(0, 0)))
+                                return handle_eviocgbit(dev, cmd, p, compat_mode);
 
                         if (_IOC_NR(cmd) == _IOC_NR(EVIOCGKEY(0)))
                                 return bits_to_user(dev->key, KEY_MAX, _IOC_SIZE(cmd),
diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c
index 87d3e7eabffd..6791be81eb29 100644
--- a/drivers/input/joystick/xpad.c
+++ b/drivers/input/joystick/xpad.c
@@ -127,6 +127,7 @@ static const struct xpad_device {
         { 0x0738, 0x4716, "Mad Catz Wired Xbox 360 Controller", MAP_DPAD_TO_AXES, XTYPE_XBOX360 },
         { 0x0738, 0x6040, "Mad Catz Beat Pad Pro", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX },
         { 0x0c12, 0x8802, "Zeroplus Xbox Controller", MAP_DPAD_TO_AXES, XTYPE_XBOX },
+        { 0x0c12, 0x880a, "Pelican Eclipse PL-2023", MAP_DPAD_TO_AXES, XTYPE_XBOX },
         { 0x0c12, 0x8810, "Zeroplus Xbox Controller", MAP_DPAD_TO_AXES, XTYPE_XBOX },
         { 0x0c12, 0x9902, "HAMA VibraX - *FAULTY HARDWARE*", MAP_DPAD_TO_AXES, XTYPE_XBOX },
         { 0x0e4c, 0x1097, "Radica Gamester Controller", MAP_DPAD_TO_AXES, XTYPE_XBOX },
diff --git a/drivers/input/keyboard/aaed2000_kbd.c b/drivers/input/keyboard/aaed2000_kbd.c
index 8a77bfcd05bc..18222a689a03 100644
--- a/drivers/input/keyboard/aaed2000_kbd.c
+++ b/drivers/input/keyboard/aaed2000_kbd.c
@@ -20,8 +20,8 @@
 #include <linux/module.h>
 #include <linux/slab.h>
 
-#include <asm/arch/hardware.h>
-#include <asm/arch/aaed2000.h>
+#include <mach/hardware.h>
+#include <mach/aaed2000.h>
 
 #define KB_ROWS                 12
 #define KB_COLS                 8
diff --git a/drivers/input/keyboard/corgikbd.c b/drivers/input/keyboard/corgikbd.c
index 1aa46ae12630..134e67bf6a90 100644
--- a/drivers/input/keyboard/corgikbd.c
+++ b/drivers/input/keyboard/corgikbd.c
@@ -20,10 +20,10 @@
 #include <linux/module.h>
 #include <linux/slab.h>
 
-#include <asm/arch/corgi.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
+#include <mach/corgi.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-gpio.h>
 #include <asm/hardware/scoop.h>
 
 #define KB_ROWS                         8
diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
index be58730e636a..ec96b369dd7a 100644
--- a/drivers/input/keyboard/gpio_keys.c
+++ b/drivers/input/keyboard/gpio_keys.c
@@ -9,7 +9,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/version.h>
 
 #include <linux/init.h>
 #include <linux/fs.h>
@@ -118,6 +117,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev)
                 unsigned int type = button->type ?: EV_KEY;
 
                 bdata->input = input;
+                bdata->button = button;
                 setup_timer(&bdata->timer,
                             gpio_check_button, (unsigned long)bdata);
 
@@ -256,7 +256,7 @@ static int gpio_keys_resume(struct platform_device *pdev)
 #define gpio_keys_resume        NULL
 #endif
 
-struct platform_driver gpio_keys_device_driver = {
+static struct platform_driver gpio_keys_device_driver = {
         .probe          = gpio_keys_probe,
         .remove         = __devexit_p(gpio_keys_remove),
         .suspend        = gpio_keys_suspend,
diff --git a/drivers/input/keyboard/jornada720_kbd.c b/drivers/input/keyboard/jornada720_kbd.c
index ce650af6d649..4e016d823069 100644
--- a/drivers/input/keyboard/jornada720_kbd.c
+++ b/drivers/input/keyboard/jornada720_kbd.c
@@ -24,8 +24,8 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 
-#include <asm/arch/jornada720.h>
-#include <asm/hardware.h>
+#include <mach/jornada720.h>
+#include <mach/hardware.h>
 
 MODULE_AUTHOR("Kristoffer Ericson <Kristoffer.Ericson@gmail.com>");
 MODULE_DESCRIPTION("HP Jornada 710/720/728 keyboard driver");
diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c
index 10afd2068068..dcea87a0bc56 100644
--- a/drivers/input/keyboard/omap-keypad.c
+++ b/drivers/input/keyboard/omap-keypad.c
@@ -34,14 +34,13 @@
 #include <linux/platform_device.h>
 #include <linux/mutex.h>
 #include <linux/errno.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/keypad.h>
-#include <asm/arch/menelaus.h>
+#include <mach/gpio.h>
+#include <mach/keypad.h>
+#include <mach/menelaus.h>
 #include <asm/irq.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
-#include <asm/mach-types.h>
-#include <asm/arch/mux.h>
+#include <mach/mux.h>
 
 #undef NEW_BOARD_LEARNING_MODE
 
diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c
index 6f1516f50750..6d30c6d334c3 100644
--- a/drivers/input/keyboard/pxa27x_keypad.c
+++ b/drivers/input/keyboard/pxa27x_keypad.c
@@ -26,12 +26,11 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 
-#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa27x_keypad.h>
+#include <mach/hardware.h>
+#include <mach/pxa27x_keypad.h>
 
 /*
  * Keypad Controller registers
diff --git a/drivers/input/keyboard/spitzkbd.c b/drivers/input/keyboard/spitzkbd.c
index 1aa37181c40f..de67b8e0a799 100644
--- a/drivers/input/keyboard/spitzkbd.c
+++ b/drivers/input/keyboard/spitzkbd.c
@@ -20,10 +20,10 @@
 #include <linux/module.h>
 #include <linux/slab.h>
 
-#include <asm/arch/spitz.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
+#include <mach/spitz.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-gpio.h>
 
 #define KB_ROWS                 7
 #define KB_COLS                 11
diff --git a/drivers/input/keyboard/tosakbd.c b/drivers/input/keyboard/tosakbd.c
index b12b7ee4b6aa..44cb50af3ce9 100644
--- a/drivers/input/keyboard/tosakbd.c
+++ b/drivers/input/keyboard/tosakbd.c
@@ -19,8 +19,8 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 
-#include <asm/arch/gpio.h>
-#include <asm/arch/tosa.h>
+#include <mach/gpio.h>
+#include <mach/tosa.h>
 
 #define KB_ROWMASK(r)           (1 << (r))
 #define SCANCODE(r, c)          (((r)<<4) + (c) + 1)
diff --git a/drivers/input/misc/cobalt_btns.c b/drivers/input/misc/cobalt_btns.c
index 6a1f48b76e32..2adf9cb265da 100644
--- a/drivers/input/misc/cobalt_btns.c
+++ b/drivers/input/misc/cobalt_btns.c
@@ -148,6 +148,9 @@ static int __devexit cobalt_buttons_remove(struct platform_device *pdev)
         return 0;
 }
 
+MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
+MODULE_DESCRIPTION("Cobalt button interface driver");
+MODULE_LICENSE("GPL");
 /* work with hotplug and coldplug */
 MODULE_ALIAS("platform:Cobalt buttons");
 
diff --git a/drivers/input/misc/ixp4xx-beeper.c b/drivers/input/misc/ixp4xx-beeper.c
index 798d84c44d03..9946d73624b9 100644
--- a/drivers/input/misc/ixp4xx-beeper.c
+++ b/drivers/input/misc/ixp4xx-beeper.c
@@ -20,7 +20,7 @@
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
 MODULE_DESCRIPTION("ixp4xx beeper driver");
diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig
index 7bbea097cda2..f996546fc443 100644
--- a/drivers/input/mouse/Kconfig
+++ b/drivers/input/mouse/Kconfig
@@ -130,6 +130,29 @@ config MOUSE_APPLETOUCH
           To compile this driver as a module, choose M here: the
           module will be called appletouch.
 
+config MOUSE_BCM5974
+        tristate "Apple USB BCM5974 Multitouch trackpad support"
+        depends on USB_ARCH_HAS_HCD
+        select USB
+        help
+          Say Y here if you have an Apple USB BCM5974 Multitouch
+          trackpad.
+
+          The BCM5974 is the multitouch trackpad found in the Macbook
+          Air (JAN2008) and Macbook Pro Penryn (FEB2008) laptops.
+
+          It is also found in the IPhone (2007) and Ipod Touch (2008).
+
+          This driver provides multitouch functionality together with
+          the synaptics X11 driver.
+
+          The interface is currently identical to the appletouch interface,
+          for further information, see
+          <file:Documentation/input/appletouch.txt>.
+
+          To compile this driver as a module, choose M here: the
+          module will be called bcm5974.
+
 config MOUSE_INPORT
         tristate "InPort/MS/ATIXL busmouse"
         depends on ISA
diff --git a/drivers/input/mouse/Makefile b/drivers/input/mouse/Makefile
index 9e6e36330820..d4d202516090 100644
--- a/drivers/input/mouse/Makefile
+++ b/drivers/input/mouse/Makefile
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_MOUSE_AMIGA)       += amimouse.o
 obj-$(CONFIG_MOUSE_APPLETOUCH)  += appletouch.o
+obj-$(CONFIG_MOUSE_BCM5974)     += bcm5974.o
 obj-$(CONFIG_MOUSE_ATARI)       += atarimouse.o
 obj-$(CONFIG_MOUSE_RISCPC)      += rpcmouse.o
 obj-$(CONFIG_MOUSE_INPORT)      += inport.o
diff --git a/drivers/input/mouse/bcm5974.c b/drivers/input/mouse/bcm5974.c
new file mode 100644
index 000000000000..2ec921bf3c60
--- /dev/null
+++ b/drivers/input/mouse/bcm5974.c
@@ -0,0 +1,681 @@
+/*
+ * Apple USB BCM5974 (Macbook Air and Penryn Macbook Pro) multitouch driver
+ *
+ * Copyright (C) 2008      Henrik Rydberg (rydberg@euromail.se)
+ *
+ * The USB initialization and package decoding was made by
+ * Scott Shawcroft as part of the touchd user-space driver project:
+ * Copyright (C) 2008      Scott Shawcroft (scott.shawcroft@gmail.com)
+ *
+ * The BCM5974 driver is based on the appletouch driver:
+ * Copyright (C) 2001-2004 Greg Kroah-Hartman (greg@kroah.com)
+ * Copyright (C) 2005      Johannes Berg (johannes@sipsolutions.net)
+ * Copyright (C) 2005      Stelian Pop (stelian@popies.net)
+ * Copyright (C) 2005      Frank Arnold (frank@scirocco-5v-turbo.de)
+ * Copyright (C) 2005      Peter Osterlund (petero2@telia.com)
+ * Copyright (C) 2005      Michael Hanselmann (linux-kernel@hansmi.ch)
+ * Copyright (C) 2006      Nicolas Boichat (nicolas@boichat.ch)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/usb/input.h>
+#include <linux/hid.h>
+#include <linux/mutex.h>
+
+#define USB_VENDOR_ID_APPLE             0x05ac
+
+/* MacbookAir, aka wellspring */
+#define USB_DEVICE_ID_APPLE_WELLSPRING_ANSI     0x0223
+#define USB_DEVICE_ID_APPLE_WELLSPRING_ISO      0x0224
+#define USB_DEVICE_ID_APPLE_WELLSPRING_JIS      0x0225
+/* MacbookProPenryn, aka wellspring2 */
+#define USB_DEVICE_ID_APPLE_WELLSPRING2_ANSI    0x0230
+#define USB_DEVICE_ID_APPLE_WELLSPRING2_ISO     0x0231
+#define USB_DEVICE_ID_APPLE_WELLSPRING2_JIS     0x0232
+
+#define BCM5974_DEVICE(prod) {                                  \
+        .match_flags = (USB_DEVICE_ID_MATCH_DEVICE |            \
+                        USB_DEVICE_ID_MATCH_INT_CLASS |         \
+                        USB_DEVICE_ID_MATCH_INT_PROTOCOL),      \
+        .idVendor = USB_VENDOR_ID_APPLE,                        \
+        .idProduct = (prod),                                    \
+        .bInterfaceClass = USB_INTERFACE_CLASS_HID,             \
+        .bInterfaceProtocol = USB_INTERFACE_PROTOCOL_MOUSE      \
+}
+
+/* table of devices that work with this driver */
+static const struct usb_device_id bcm5974_table [] = {
+        /* MacbookAir1.1 */
+        BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING_ANSI),
+        BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING_ISO),
+        BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING_JIS),
+        /* MacbookProPenryn */
+        BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING2_ANSI),
+        BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING2_ISO),
+        BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING2_JIS),
+        /* Terminating entry */
+        {}
+};
+MODULE_DEVICE_TABLE(usb, bcm5974_table);
+
+MODULE_AUTHOR("Henrik Rydberg");
+MODULE_DESCRIPTION("Apple USB BCM5974 multitouch driver");
+MODULE_LICENSE("GPL");
+
+#define dprintk(level, format, a...)\
+        { if (debug >= level) printk(KERN_DEBUG format, ##a); }
+
+static int debug = 1;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "Activate debugging output");
+
+/* button data structure */
+struct bt_data {
+        u8 unknown1;            /* constant */
+        u8 button;              /* left button */
+        u8 rel_x;               /* relative x coordinate */
+        u8 rel_y;               /* relative y coordinate */
+};
+
+/* trackpad header structure */
+struct tp_header {
+        u8 unknown1[16];        /* constants, timers, etc */
+        u8 fingers;             /* number of fingers on trackpad */
+        u8 unknown2[9];         /* constants, timers, etc */
+};
+
+/* trackpad finger structure */
+struct tp_finger {
+        __le16 origin;          /* left/right origin? */
+        __le16 abs_x;           /* absolute x coodinate */
+        __le16 abs_y;           /* absolute y coodinate */
+        __le16 rel_x;           /* relative x coodinate */
+        __le16 rel_y;           /* relative y coodinate */
+        __le16 size_major;      /* finger size, major axis? */
+        __le16 size_minor;      /* finger size, minor axis? */
+        __le16 orientation;     /* 16384 when point, else 15 bit angle */
+        __le16 force_major;     /* trackpad force, major axis? */
+        __le16 force_minor;     /* trackpad force, minor axis? */
+        __le16 unused[3];       /* zeros */
+        __le16 multi;           /* one finger: varies, more fingers: constant */
+};
+
+/* trackpad data structure, empirically at least ten fingers */
+struct tp_data {
+        struct tp_header header;
+        struct tp_finger finger[16];
+};
+
+/* device-specific parameters */
+struct bcm5974_param {
+        int dim;                /* logical dimension */
+        int fuzz;               /* logical noise value */
+        int devmin;             /* device minimum reading */
+        int devmax;             /* device maximum reading */
+};
+
+/* device-specific configuration */
+struct bcm5974_config {
+        int ansi, iso, jis;     /* the product id of this device */
+        int bt_ep;              /* the endpoint of the button interface */
+        int bt_datalen;         /* data length of the button interface */
+        int tp_ep;              /* the endpoint of the trackpad interface */
+        int tp_datalen;         /* data length of the trackpad interface */
+        struct bcm5974_param p; /* finger pressure limits */
+        struct bcm5974_param w; /* finger width limits */
+        struct bcm5974_param x; /* horizontal limits */
+        struct bcm5974_param y; /* vertical limits */
+};
+
+/* logical device structure */
+struct bcm5974 {
+        char phys[64];
+        struct usb_device *udev;        /* usb device */
+        struct usb_interface *intf;     /* our interface */
+        struct input_dev *input;        /* input dev */
+        struct bcm5974_config cfg;      /* device configuration */
+        struct mutex pm_mutex;          /* serialize access to open/suspend */
+        int opened;                     /* 1: opened, 0: closed */
+        struct urb *bt_urb;             /* button usb request block */
+        struct bt_data *bt_data;        /* button transferred data */
+        struct urb *tp_urb;             /* trackpad usb request block */
+        struct tp_data *tp_data;        /* trackpad transferred data */
+};
+
+/* logical dimensions */
+#define DIM_PRESSURE    256             /* maximum finger pressure */
+#define DIM_WIDTH       16              /* maximum finger width */
+#define DIM_X           1280            /* maximum trackpad x value */
+#define DIM_Y           800             /* maximum trackpad y value */
+
+/* logical signal quality */
+#define SN_PRESSURE     45              /* pressure signal-to-noise ratio */
+#define SN_WIDTH        100             /* width signal-to-noise ratio */
+#define SN_COORD        250             /* coordinate signal-to-noise ratio */
+
+/* device constants */
+static const struct bcm5974_config bcm5974_config_table[] = {
+        {
+                USB_DEVICE_ID_APPLE_WELLSPRING_ANSI,
+                USB_DEVICE_ID_APPLE_WELLSPRING_ISO,
+                USB_DEVICE_ID_APPLE_WELLSPRING_JIS,
+                0x84, sizeof(struct bt_data),
+                0x81, sizeof(struct tp_data),
+                { DIM_PRESSURE, DIM_PRESSURE / SN_PRESSURE, 0, 256 },
+                { DIM_WIDTH, DIM_WIDTH / SN_WIDTH, 0, 2048 },
+                { DIM_X, DIM_X / SN_COORD, -4824, 5342 },
+                { DIM_Y, DIM_Y / SN_COORD, -172, 5820 }
+        },
+        {
+                USB_DEVICE_ID_APPLE_WELLSPRING2_ANSI,
+                USB_DEVICE_ID_APPLE_WELLSPRING2_ISO,
+                USB_DEVICE_ID_APPLE_WELLSPRING2_JIS,
+                0x84, sizeof(struct bt_data),
+                0x81, sizeof(struct tp_data),
+                { DIM_PRESSURE, DIM_PRESSURE / SN_PRESSURE, 0, 256 },
+                { DIM_WIDTH, DIM_WIDTH / SN_WIDTH, 0, 2048 },
+                { DIM_X, DIM_X / SN_COORD, -4824, 4824 },
+                { DIM_Y, DIM_Y / SN_COORD, -172, 4290 }
+        },
+        {}
+};
+
+/* return the device-specific configuration by device */
+static const struct bcm5974_config *bcm5974_get_config(struct usb_device *udev)
+{
+        u16 id = le16_to_cpu(udev->descriptor.idProduct);
+        const struct bcm5974_config *cfg;
+
+        for (cfg = bcm5974_config_table; cfg->ansi; ++cfg)
+                if (cfg->ansi == id || cfg->iso == id || cfg->jis == id)
+                        return cfg;
+
+        return bcm5974_config_table;
+}
+
+/* convert 16-bit little endian to signed integer */
+static inline int raw2int(__le16 x)
+{
+        return (signed short)le16_to_cpu(x);
+}
+
+/* scale device data to logical dimensions (asserts devmin < devmax) */
+static inline int int2scale(const struct bcm5974_param *p, int x)
+{
+        return x * p->dim / (p->devmax - p->devmin);
+}
+
+/* all logical value ranges are [0,dim). */
+static inline int int2bound(const struct bcm5974_param *p, int x)
+{
+        int s = int2scale(p, x);
+
+        return clamp_val(s, 0, p->dim - 1);
+}
+
+/* setup which logical events to report */
+static void setup_events_to_report(struct input_dev *input_dev,
+                                   const struct bcm5974_config *cfg)
+{
+        __set_bit(EV_ABS, input_dev->evbit);
+
+        input_set_abs_params(input_dev, ABS_PRESSURE,
+                                0, cfg->p.dim, cfg->p.fuzz, 0);
+        input_set_abs_params(input_dev, ABS_TOOL_WIDTH,
+                                0, cfg->w.dim, cfg->w.fuzz, 0);
+        input_set_abs_params(input_dev, ABS_X,
+                                0, cfg->x.dim, cfg->x.fuzz, 0);
+        input_set_abs_params(input_dev, ABS_Y,
+                                0, cfg->y.dim, cfg->y.fuzz, 0);
+
+        __set_bit(EV_KEY, input_dev->evbit);
+        __set_bit(BTN_TOOL_FINGER, input_dev->keybit);
+        __set_bit(BTN_TOOL_DOUBLETAP, input_dev->keybit);
+        __set_bit(BTN_TOOL_TRIPLETAP, input_dev->keybit);
+        __set_bit(BTN_LEFT, input_dev->keybit);
+}
+
+/* report button data as logical button state */
+static int report_bt_state(struct bcm5974 *dev, int size)
+{
+        if (size != sizeof(struct bt_data))
+                return -EIO;
+
+        input_report_key(dev->input, BTN_LEFT, dev->bt_data->button);
+        input_sync(dev->input);
+
+        return 0;
+}
+
+/* report trackpad data as logical trackpad state */
+static int report_tp_state(struct bcm5974 *dev, int size)
+{
+        const struct bcm5974_config *c = &dev->cfg;
+        const struct tp_finger *f = dev->tp_data->finger;
+        struct input_dev *input = dev->input;
+        const int fingers = (size - 26) / 28;
+        int p = 0, w, x, y, n = 0;
+
+        if (size < 26 || (size - 26) % 28 != 0)
+                return -EIO;
+
+        if (fingers) {
+                p = raw2int(f->force_major);
+                w = raw2int(f->size_major);
+                x = raw2int(f->abs_x);
+                y = raw2int(f->abs_y);
+                n = p > 0 ? fingers : 0;
+
+                dprintk(9,
+                        "bcm5974: p: %+05d w: %+05d x: %+05d y: %+05d n: %d\n",
+                        p, w, x, y, n);
+
+                input_report_abs(input, ABS_TOOL_WIDTH, int2bound(&c->w, w));
+                input_report_abs(input, ABS_X, int2bound(&c->x, x - c->x.devmin));
+                input_report_abs(input, ABS_Y, int2bound(&c->y, c->y.devmax - y));
+        }
+
+        input_report_abs(input, ABS_PRESSURE, int2bound(&c->p, p));
+
+        input_report_key(input, BTN_TOOL_FINGER, n == 1);
+        input_report_key(input, BTN_TOOL_DOUBLETAP, n == 2);
+        input_report_key(input, BTN_TOOL_TRIPLETAP, n > 2);
+
+        input_sync(input);
+
+        return 0;
+}
+
+/* Wellspring initialization constants */
+#define BCM5974_WELLSPRING_MODE_READ_REQUEST_ID         1
+#define BCM5974_WELLSPRING_MODE_WRITE_REQUEST_ID        9
+#define BCM5974_WELLSPRING_MODE_REQUEST_VALUE           0x300
+#define BCM5974_WELLSPRING_MODE_REQUEST_INDEX           0
+#define BCM5974_WELLSPRING_MODE_VENDOR_VALUE            0x01
+
+static int bcm5974_wellspring_mode(struct bcm5974 *dev)
+{
+        char *data = kmalloc(8, GFP_KERNEL);
+        int retval = 0, size;
+
+        if (!data) {
+                err("bcm5974: out of memory");
+                retval = -ENOMEM;
+                goto out;
+        }
+
+        /* read configuration */
+        size = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
+                        BCM5974_WELLSPRING_MODE_READ_REQUEST_ID,
+                        USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
+                        BCM5974_WELLSPRING_MODE_REQUEST_VALUE,
+                        BCM5974_WELLSPRING_MODE_REQUEST_INDEX, data, 8, 5000);
+
+        if (size != 8) {
+                err("bcm5974: could not read from device");
+                retval = -EIO;
+                goto out;
+        }
+
+        /* apply the mode switch */
+        data[0] = BCM5974_WELLSPRING_MODE_VENDOR_VALUE;
+
+        /* write configuration */
+        size = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
+                        BCM5974_WELLSPRING_MODE_WRITE_REQUEST_ID,
+                        USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
+                        BCM5974_WELLSPRING_MODE_REQUEST_VALUE,
+                        BCM5974_WELLSPRING_MODE_REQUEST_INDEX, data, 8, 5000);
+
+        if (size != 8) {
+                err("bcm5974: could not write to device");
+                retval = -EIO;
+                goto out;
+        }
+
+        dprintk(2, "bcm5974: switched to wellspring mode.\n");
+
+ out:
+        kfree(data);
+        return retval;
+}
+
+static void bcm5974_irq_button(struct urb *urb)
+{
+        struct bcm5974 *dev = urb->context;
+        int error;
+
+        switch (urb->status) {
+        case 0:
+                break;
+        case -EOVERFLOW:
+        case -ECONNRESET:
+        case -ENOENT:
+        case -ESHUTDOWN:
+                dbg("bcm5974: button urb shutting down: %d", urb->status);
+                return;
+        default:
+                dbg("bcm5974: button urb status: %d", urb->status);
+                goto exit;
+        }
+
+        if (report_bt_state(dev, dev->bt_urb->actual_length))
+                dprintk(1, "bcm5974: bad button package, length: %d\n",
+                        dev->bt_urb->actual_length);
+
+exit:
+        error = usb_submit_urb(dev->bt_urb, GFP_ATOMIC);
+        if (error)
+                err("bcm5974: button urb failed: %d", error);
+}
+
+static void bcm5974_irq_trackpad(struct urb *urb)
+{
+        struct bcm5974 *dev = urb->context;
+        int error;
+
+        switch (urb->status) {
+        case 0:
+                break;
+        case -EOVERFLOW:
+        case -ECONNRESET:
+        case -ENOENT:
+        case -ESHUTDOWN:
+                dbg("bcm5974: trackpad urb shutting down: %d", urb->status);
+                return;
+        default:
+                dbg("bcm5974: trackpad urb status: %d", urb->status);
+                goto exit;
+        }
+
+        /* control response ignored */
+        if (dev->tp_urb->actual_length == 2)
+                goto exit;
+
+        if (report_tp_state(dev, dev->tp_urb->actual_length))
+                dprintk(1, "bcm5974: bad trackpad package, length: %d\n",
+                        dev->tp_urb->actual_length);
+
+exit:
+        error = usb_submit_urb(dev->tp_urb, GFP_ATOMIC);
+        if (error)
+                err("bcm5974: trackpad urb failed: %d", error);
+}
+
+/*
+ * The Wellspring trackpad, like many recent Apple trackpads, share
+ * the usb device with the keyboard. Since keyboards are usually
+ * handled by the HID system, the device ends up being handled by two
+ * modules. Setting up the device therefore becomes slightly
+ * complicated. To enable multitouch features, a mode switch is
+ * required, which is usually applied via the control interface of the
+ * device.  It can be argued where this switch should take place. In
+ * some drivers, like appletouch, the switch is made during
+ * probe. However, the hid module may also alter the state of the
+ * device, resulting in trackpad malfunction under certain
+ * circumstances. To get around this problem, there is at least one
+ * example that utilizes the USB_QUIRK_RESET_RESUME quirk in order to
+ * recieve a reset_resume request rather than the normal resume.
+ * Since the implementation of reset_resume is equal to mode switch
+ * plus start_traffic, it seems easier to always do the switch when
+ * starting traffic on the device.
+ */
+static int bcm5974_start_traffic(struct bcm5974 *dev)
+{
+        if (bcm5974_wellspring_mode(dev)) {
+                dprintk(1, "bcm5974: mode switch failed\n");
+                goto error;
+        }
+
+        if (usb_submit_urb(dev->bt_urb, GFP_KERNEL))
+                goto error;
+
+        if (usb_submit_urb(dev->tp_urb, GFP_KERNEL))
+                goto err_kill_bt;
+
+        return 0;
+
+err_kill_bt:
+        usb_kill_urb(dev->bt_urb);
+error:
+        return -EIO;
+}
+
+static void bcm5974_pause_traffic(struct bcm5974 *dev)
+{
+        usb_kill_urb(dev->tp_urb);
+        usb_kill_urb(dev->bt_urb);
+}
+
+/*
+ * The code below implements open/close and manual suspend/resume.
+ * All functions may be called in random order.
+ *
+ * Opening a suspended device fails with EACCES - permission denied.
+ *
+ * Failing a resume leaves the device resumed but closed.
+ */
+static int bcm5974_open(struct input_dev *input)
+{
+        struct bcm5974 *dev = input_get_drvdata(input);
+        int error;
+
+        error = usb_autopm_get_interface(dev->intf);
+        if (error)
+                return error;
+
+        mutex_lock(&dev->pm_mutex);
+
+        error = bcm5974_start_traffic(dev);
+        if (!error)
+                dev->opened = 1;
+
+        mutex_unlock(&dev->pm_mutex);
+
+        if (error)
+                usb_autopm_put_interface(dev->intf);
+
+        return error;
+}
+
+static void bcm5974_close(struct input_dev *input)
+{
+        struct bcm5974 *dev = input_get_drvdata(input);
+
+        mutex_lock(&dev->pm_mutex);
+
+        bcm5974_pause_traffic(dev);
+        dev->opened = 0;
+
+        mutex_unlock(&dev->pm_mutex);
+
+        usb_autopm_put_interface(dev->intf);
+}
+
+static int bcm5974_suspend(struct usb_interface *iface, pm_message_t message)
+{
+        struct bcm5974 *dev = usb_get_intfdata(iface);
+
+        mutex_lock(&dev->pm_mutex);
+
+        if (dev->opened)
+                bcm5974_pause_traffic(dev);
+
+        mutex_unlock(&dev->pm_mutex);
+
+        return 0;
+}
+
+static int bcm5974_resume(struct usb_interface *iface)
+{
+        struct bcm5974 *dev = usb_get_intfdata(iface);
+        int error = 0;
+
+        mutex_lock(&dev->pm_mutex);
+
+        if (dev->opened)
+                error = bcm5974_start_traffic(dev);
+
+        mutex_unlock(&dev->pm_mutex);
+
+        return error;
+}
+
+static int bcm5974_probe(struct usb_interface *iface,
+                         const struct usb_device_id *id)
+{
+        struct usb_device *udev = interface_to_usbdev(iface);
+        const struct bcm5974_config *cfg;
+        struct bcm5974 *dev;
+        struct input_dev *input_dev;
+        int error = -ENOMEM;
+
+        /* find the product index */
+        cfg = bcm5974_get_config(udev);
+
+        /* allocate memory for our device state and initialize it */
+        dev = kzalloc(sizeof(struct bcm5974), GFP_KERNEL);
+        input_dev = input_allocate_device();
+        if (!dev || !input_dev) {
+                err("bcm5974: out of memory");
+                goto err_free_devs;
+        }
+
+        dev->udev = udev;
+        dev->intf = iface;
+        dev->input = input_dev;
+        dev->cfg = *cfg;
+        mutex_init(&dev->pm_mutex);
+
+        /* setup urbs */
+        dev->bt_urb = usb_alloc_urb(0, GFP_KERNEL);
+        if (!dev->bt_urb)
+                goto err_free_devs;
+
+        dev->tp_urb = usb_alloc_urb(0, GFP_KERNEL);
+        if (!dev->tp_urb)
+                goto err_free_bt_urb;
+
+        dev->bt_data = usb_buffer_alloc(dev->udev,
+                                        dev->cfg.bt_datalen, GFP_KERNEL,
+                                        &dev->bt_urb->transfer_dma);
+        if (!dev->bt_data)
+                goto err_free_urb;
+
+        dev->tp_data = usb_buffer_alloc(dev->udev,
+                                        dev->cfg.tp_datalen, GFP_KERNEL,
+                                        &dev->tp_urb->transfer_dma);
+        if (!dev->tp_data)
+                goto err_free_bt_buffer;
+
+        usb_fill_int_urb(dev->bt_urb, udev,
+                         usb_rcvintpipe(udev, cfg->bt_ep),
+                         dev->bt_data, dev->cfg.bt_datalen,
+                         bcm5974_irq_button, dev, 1);
+
+        usb_fill_int_urb(dev->tp_urb, udev,
+                         usb_rcvintpipe(udev, cfg->tp_ep),
+                         dev->tp_data, dev->cfg.tp_datalen,
+                         bcm5974_irq_trackpad, dev, 1);
+
+        /* create bcm5974 device */
+        usb_make_path(udev, dev->phys, sizeof(dev->phys));
+        strlcat(dev->phys, "/input0", sizeof(dev->phys));
+
+        input_dev->name = "bcm5974";
+        input_dev->phys = dev->phys;
+        usb_to_input_id(dev->udev, &input_dev->id);
+        input_dev->dev.parent = &iface->dev;
+
+        input_set_drvdata(input_dev, dev);
+
+        input_dev->open = bcm5974_open;
+        input_dev->close = bcm5974_close;
+
+        setup_events_to_report(input_dev, cfg);
+
+        error = input_register_device(dev->input);
+        if (error)
+                goto err_free_buffer;
+
+        /* save our data pointer in this interface device */
+        usb_set_intfdata(iface, dev);
+
+        return 0;
+
+err_free_buffer:
+        usb_buffer_free(dev->udev, dev->cfg.tp_datalen,
+                dev->tp_data, dev->tp_urb->transfer_dma);
+err_free_bt_buffer:
+        usb_buffer_free(dev->udev, dev->cfg.bt_datalen,
+                dev->bt_data, dev->bt_urb->transfer_dma);
+err_free_urb:
+        usb_free_urb(dev->tp_urb);
+err_free_bt_urb:
+        usb_free_urb(dev->bt_urb);
+err_free_devs:
+        usb_set_intfdata(iface, NULL);
+        input_free_device(input_dev);
+        kfree(dev);
+        return error;
+}
+
+static void bcm5974_disconnect(struct usb_interface *iface)
+{
+        struct bcm5974 *dev = usb_get_intfdata(iface);
+
+        usb_set_intfdata(iface, NULL);
+
+        input_unregister_device(dev->input);
+        usb_buffer_free(dev->udev, dev->cfg.tp_datalen,
+                        dev->tp_data, dev->tp_urb->transfer_dma);
+        usb_buffer_free(dev->udev, dev->cfg.bt_datalen,
+                        dev->bt_data, dev->bt_urb->transfer_dma);
+        usb_free_urb(dev->tp_urb);
+        usb_free_urb(dev->bt_urb);
+        kfree(dev);
+}
+
+static struct usb_driver bcm5974_driver = {
+        .name                   = "bcm5974",
+        .probe                  = bcm5974_probe,
+        .disconnect             = bcm5974_disconnect,
+        .suspend                = bcm5974_suspend,
+        .resume                 = bcm5974_resume,
+        .reset_resume           = bcm5974_resume,
+        .id_table               = bcm5974_table,
+        .supports_autosuspend   = 1,
+};
+
+static int __init bcm5974_init(void)
+{
+        return usb_register(&bcm5974_driver);
+}
+
+static void __exit bcm5974_exit(void)
+{
+        usb_deregister(&bcm5974_driver);
+}
+
+module_init(bcm5974_init);
+module_exit(bcm5974_exit);
+
diff --git a/drivers/input/mouse/gpio_mouse.c b/drivers/input/mouse/gpio_mouse.c
index 339290184871..72cf5e33790e 100644
--- a/drivers/input/mouse/gpio_mouse.c
+++ b/drivers/input/mouse/gpio_mouse.c
@@ -9,7 +9,6 @@
  */
 
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/input-polldev.h>
diff --git a/drivers/input/mouse/rpcmouse.c b/drivers/input/mouse/rpcmouse.c
index 18a48636ba4a..56c079ef5018 100644
--- a/drivers/input/mouse/rpcmouse.c
+++ b/drivers/input/mouse/rpcmouse.c
@@ -23,7 +23,7 @@
 #include <linux/init.h>
 #include <linux/input.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/io.h>
 #include <asm/hardware/iomd.h>
diff --git a/drivers/input/serio/i8042-sparcio.h b/drivers/input/serio/i8042-sparcio.h
index d9ca55891cd7..692a79ec2a22 100644
--- a/drivers/input/serio/i8042-sparcio.h
+++ b/drivers/input/serio/i8042-sparcio.h
@@ -1,10 +1,11 @@
 #ifndef _I8042_SPARCIO_H
 #define _I8042_SPARCIO_H
 
+#include <linux/of_device.h>
+
 #include <asm/io.h>
 #include <asm/oplib.h>
 #include <asm/prom.h>
-#include <asm/of_device.h>
 
 static int i8042_kbd_irq = -1;
 static int i8042_aux_irq = -1;
@@ -41,6 +42,8 @@ static inline void i8042_write_command(int val)
         writeb(val, kbd_iobase + 0x64UL);
 }
 
+#ifdef CONFIG_PCI
+
 #define OBP_PS2KBD_NAME1        "kb_ps2"
 #define OBP_PS2KBD_NAME2        "keyboard"
 #define OBP_PS2MS_NAME1         "kdmouse"
@@ -101,9 +104,6 @@ static struct of_platform_driver sparc_i8042_driver = {
 
 static int __init i8042_platform_init(void)
 {
-#ifndef CONFIG_PCI
-        return -ENODEV;
-#else
         struct device_node *root = of_find_node_by_path("/");
 
         if (!strcmp(root->name, "SUNW,JavaStation-1")) {
@@ -131,17 +131,25 @@ static int __init i8042_platform_init(void)
         i8042_reset = 1;
 
         return 0;
-#endif /* CONFIG_PCI */
 }
 
 static inline void i8042_platform_exit(void)
 {
-#ifdef CONFIG_PCI
         struct device_node *root = of_find_node_by_path("/");
 
         if (strcmp(root->name, "SUNW,JavaStation-1"))
                 of_unregister_driver(&sparc_i8042_driver);
-#endif
 }
 
+#else /* !CONFIG_PCI */
+static int __init i8042_platform_init(void)
+{
+        return -ENODEV;
+}
+
+static inline void i8042_platform_exit(void)
+{
+}
+#endif /* !CONFIG_PCI */
+
 #endif /* _I8042_SPARCIO_H */
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index fe732a574ec2..3282b741e246 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -394,6 +394,13 @@ static struct dmi_system_id __initdata i8042_dmi_dritek_table[] = {
                         DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 2490"),
                 },
         },
+        {
+                .ident = "Acer TravelMate 4280",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 4280"),
+                },
+        },
         { }
 };
 
diff --git a/drivers/input/serio/rpckbd.c b/drivers/input/serio/rpckbd.c
index 1567b7782478..7f36edd34f8b 100644
--- a/drivers/input/serio/rpckbd.c
+++ b/drivers/input/serio/rpckbd.c
@@ -35,7 +35,7 @@
 #include <linux/platform_device.h>
 
 #include <asm/irq.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/hardware/iomd.h>
 #include <asm/system.h>
diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c
index 0ed044d5e685..765007899d9a 100644
--- a/drivers/input/serio/xilinx_ps2.c
+++ b/drivers/input/serio/xilinx_ps2.c
@@ -269,8 +269,8 @@ static int xps2_setup(struct device *dev, struct resource *regs_res,
          * we have the PS2 in a good state */
         out_be32(drvdata->base_address + XPS2_SRST_OFFSET, XPS2_SRST_RESET);
 
-        dev_info(dev, "Xilinx PS2 at 0x%08X mapped to 0x%08X, irq=%d\n",
-                drvdata->phys_addr, (u32)drvdata->base_address, drvdata->irq);
+        dev_info(dev, "Xilinx PS2 at 0x%08X mapped to 0x%p, irq=%d\n",
+                drvdata->phys_addr, drvdata->base_address, drvdata->irq);
 
         serio = &drvdata->serio;
         serio->id.type = SERIO_8042;
diff --git a/drivers/input/tablet/gtco.c b/drivers/input/tablet/gtco.c
index b9b7a98bc5a5..7df0228e836e 100644
--- a/drivers/input/tablet/gtco.c
+++ b/drivers/input/tablet/gtco.c
@@ -64,7 +64,6 @@ Scott Hill shill@gtcocalcomp.com
 #include <asm/byteorder.h>
 
 
-#include <linux/version.h>
 #include <linux/usb/input.h>
 
 /* Version with a Major number of 2 is for kernel inclusion only. */
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 6e60a97a234c..25287e80e236 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -249,29 +249,26 @@ config TOUCHSCREEN_WM97XX
 config TOUCHSCREEN_WM9705
         bool "WM9705 Touchscreen interface support"
         depends on TOUCHSCREEN_WM97XX
+        default y
         help
-          Say Y here if you have a Wolfson Microelectronics WM9705
-          touchscreen controller connected to your system.
-
-          If unsure, say N.
+          Say Y here to enable support for the Wolfson Microelectronics
+          WM9705 touchscreen controller.
 
 config TOUCHSCREEN_WM9712
         bool "WM9712 Touchscreen interface support"
         depends on TOUCHSCREEN_WM97XX
+        default y
         help
-          Say Y here if you have a Wolfson Microelectronics WM9712
-          touchscreen controller connected to your system.
-
-          If unsure, say N.
+          Say Y here to enable support for the Wolfson Microelectronics
+          WM9712 touchscreen controller.
 
 config TOUCHSCREEN_WM9713
         bool "WM9713 Touchscreen interface support"
         depends on TOUCHSCREEN_WM97XX
+        default y
         help
-          Say Y here if you have a Wolfson Microelectronics WM9713 touchscreen
-          controller connected to your system.
-
-          If unsure, say N.
+          Say Y here to enable support for the Wolfson Microelectronics
+          WM9713 touchscreen controller.
 
 config TOUCHSCREEN_WM97XX_MAINSTONE
         tristate "WM97xx Mainstone accelerated touch"
diff --git a/drivers/input/touchscreen/corgi_ts.c b/drivers/input/touchscreen/corgi_ts.c
index d0e13fc4a88c..65202c9f63ff 100644
--- a/drivers/input/touchscreen/corgi_ts.c
+++ b/drivers/input/touchscreen/corgi_ts.c
@@ -19,10 +19,10 @@
 #include <linux/slab.h>
 #include <linux/irq.h>
 
-#include <asm/arch/sharpsl.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
+#include <mach/sharpsl.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-gpio.h>
 
 
 #define PWR_MODE_ACTIVE         0
diff --git a/drivers/input/touchscreen/h3600_ts_input.c b/drivers/input/touchscreen/h3600_ts_input.c
index 4f86081dc7fc..4d3139e2099d 100644
--- a/drivers/input/touchscreen/h3600_ts_input.c
+++ b/drivers/input/touchscreen/h3600_ts_input.c
@@ -39,8 +39,8 @@
 #include <linux/delay.h>
 
 /* SA1100 serial defines */
-#include <asm/arch/hardware.h>
-#include <asm/arch/irqs.h>
+#include <mach/hardware.h>
+#include <mach/irqs.h>
 
 #define DRIVER_DESC     "H3600 touchscreen driver"
 
diff --git a/drivers/input/touchscreen/jornada720_ts.c b/drivers/input/touchscreen/jornada720_ts.c
index 1aca108b1031..bf44f9d68342 100644
--- a/drivers/input/touchscreen/jornada720_ts.c
+++ b/drivers/input/touchscreen/jornada720_ts.c
@@ -19,8 +19,8 @@
 #include <linux/interrupt.h>
 #include <linux/module.h>
 
-#include <asm/hardware.h>
-#include <asm/arch/jornada720.h>
+#include <mach/hardware.h>
+#include <mach/jornada720.h>
 
 MODULE_AUTHOR("Kristoffer Ericson <kristoffer.ericson@gmail.com>");
 MODULE_DESCRIPTION("HP Jornada 710/720/728 touchscreen driver");
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c b/drivers/input/touchscreen/mainstone-wm97xx.c
index 590a1379aa32..283f93a0cee2 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -33,7 +33,7 @@
 #include <linux/interrupt.h>
 #include <linux/wm97xx.h>
 #include <linux/io.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 
 #define VERSION         "0.13"
 
diff --git a/drivers/input/touchscreen/wm9705.c b/drivers/input/touchscreen/wm9705.c
index 978e1a13ffc7..372efbc694ff 100644
--- a/drivers/input/touchscreen/wm9705.c
+++ b/drivers/input/touchscreen/wm9705.c
@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/moduleparam.h>
-#include <linux/version.h>
 #include <linux/kernel.h>
 #include <linux/input.h>
 #include <linux/delay.h>
diff --git a/drivers/input/touchscreen/wm9712.c b/drivers/input/touchscreen/wm9712.c
index 4c5d85a249ae..c8bb1e7335fc 100644
--- a/drivers/input/touchscreen/wm9712.c
+++ b/drivers/input/touchscreen/wm9712.c
@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/moduleparam.h>
-#include <linux/version.h>
 #include <linux/kernel.h>
 #include <linux/input.h>
 #include <linux/delay.h>
diff --git a/drivers/input/touchscreen/wm9713.c b/drivers/input/touchscreen/wm9713.c
index 838458792ea0..781ee83547e6 100644
--- a/drivers/input/touchscreen/wm9713.c
+++ b/drivers/input/touchscreen/wm9713.c
@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/moduleparam.h>
-#include <linux/version.h>
 #include <linux/kernel.h>
 #include <linux/input.h>
 #include <linux/delay.h>
diff --git a/drivers/input/touchscreen/wm97xx-core.c b/drivers/input/touchscreen/wm97xx-core.c
index cdc24ad314e0..d589ab0e3adc 100644
--- a/drivers/input/touchscreen/wm97xx-core.c
+++ b/drivers/input/touchscreen/wm97xx-core.c
@@ -37,7 +37,6 @@
 
 #include <linux/module.h>
 #include <linux/moduleparam.h>
-#include <linux/version.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/delay.h>
diff --git a/drivers/leds/leds-ams-delta.c b/drivers/leds/leds-ams-delta.c
index c37bb0d5a0c5..32c98b2efa3f 100644
--- a/drivers/leds/leds-ams-delta.c
+++ b/drivers/leds/leds-ams-delta.c
@@ -12,7 +12,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/leds.h>
-#include <asm/arch/board-ams-delta.h>
+#include <mach/board-ams-delta.h>
 
 /*
  * Our context
diff --git a/drivers/leds/leds-cm-x270.c b/drivers/leds/leds-cm-x270.c
index accc7eddb788..836a43d776e6 100644
--- a/drivers/leds/leds-cm-x270.c
+++ b/drivers/leds/leds-cm-x270.c
@@ -18,8 +18,8 @@
 #include <linux/platform_device.h>
 #include <linux/leds.h>
 
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
 
 #define GPIO_RED_LED                    (93)
 #define GPIO_GREEN_LED                  (94)
diff --git a/drivers/leds/leds-corgi.c b/drivers/leds/leds-corgi.c
index a709704b9f93..bc2dcd89f635 100644
--- a/drivers/leds/leds-corgi.c
+++ b/drivers/leds/leds-corgi.c
@@ -15,10 +15,9 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/leds.h>
-#include <asm/mach-types.h>
-#include <asm/arch/corgi.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/corgi.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
 #include <asm/hardware/scoop.h>
 
 static void corgiled_amber_set(struct led_classdev *led_cdev,
diff --git a/drivers/leds/leds-fsg.c b/drivers/leds/leds-fsg.c
index a7421b8c47d8..be0e12144b8b 100644
--- a/drivers/leds/leds-fsg.c
+++ b/drivers/leds/leds-fsg.c
@@ -19,7 +19,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/leds.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 
 static short __iomem *latch_address;
diff --git a/drivers/leds/leds-h1940.c b/drivers/leds/leds-h1940.c
index 73c705021686..11b77a70bbcb 100644
--- a/drivers/leds/leds-h1940.c
+++ b/drivers/leds/leds-h1940.c
@@ -16,9 +16,9 @@
 #include <linux/string.h>
 #include <linux/ctype.h>
 #include <linux/leds.h>
-#include <asm/arch/regs-gpio.h>
-#include <asm/hardware.h>
-#include <asm/arch/h1940-latch.h>
+#include <mach/regs-gpio.h>
+#include <mach/hardware.h>
+#include <mach/h1940-latch.h>
 
 /*
  * Green led.
diff --git a/drivers/leds/leds-locomo.c b/drivers/leds/leds-locomo.c
index 7295f7f52185..5d91362e3066 100644
--- a/drivers/leds/leds-locomo.c
+++ b/drivers/leds/leds-locomo.c
@@ -13,7 +13,7 @@
 #include <linux/device.h>
 #include <linux/leds.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/hardware/locomo.h>
 
 static void locomoled_brightness_set(struct led_classdev *led_cdev,
diff --git a/drivers/leds/leds-s3c24xx.c b/drivers/leds/leds-s3c24xx.c
index d4f5021dccbf..25a07f2643ad 100644
--- a/drivers/leds/leds-s3c24xx.c
+++ b/drivers/leds/leds-s3c24xx.c
@@ -16,9 +16,9 @@
 #include <linux/platform_device.h>
 #include <linux/leds.h>
 
-#include <asm/hardware.h>
-#include <asm/arch/regs-gpio.h>
-#include <asm/arch/leds-gpio.h>
+#include <mach/hardware.h>
+#include <mach/regs-gpio.h>
+#include <mach/leds-gpio.h>
 
 /* our context */
 
diff --git a/drivers/leds/leds-spitz.c b/drivers/leds/leds-spitz.c
index e75e8543bc5a..178831c64bfb 100644
--- a/drivers/leds/leds-spitz.c
+++ b/drivers/leds/leds-spitz.c
@@ -17,9 +17,9 @@
 #include <linux/leds.h>
 #include <asm/hardware/scoop.h>
 #include <asm/mach-types.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/spitz.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/spitz.h>
 
 static void spitzled_amber_set(struct led_classdev *led_cdev,
                                enum led_brightness value)
diff --git a/drivers/lguest/page_tables.c b/drivers/lguest/page_tables.c
index d93500f24fbb..81d0c6053447 100644
--- a/drivers/lguest/page_tables.c
+++ b/drivers/lguest/page_tables.c
@@ -108,9 +108,8 @@ static unsigned long gpte_addr(pgd_t gpgd, unsigned long vaddr)
 }
 /*:*/
 
-/*M:014 get_pfn is slow; it takes the mmap sem and calls get_user_pages.  We
- * could probably try to grab batches of pages here as an optimization
- * (ie. pre-faulting). :*/
+/*M:014 get_pfn is slow: we could probably try to grab batches of pages here as
+ * an optimization (ie. pre-faulting). :*/
 
 /*H:350 This routine takes a page number given by the Guest and converts it to
  * an actual, physical page number.  It can fail for several reasons: the
@@ -123,19 +122,13 @@ static unsigned long gpte_addr(pgd_t gpgd, unsigned long vaddr)
 static unsigned long get_pfn(unsigned long virtpfn, int write)
 {
         struct page *page;
-        /* This value indicates failure. */
-        unsigned long ret = -1UL;
 
-        /* get_user_pages() is a complex interface: it gets the "struct
-         * vm_area_struct" and "struct page" assocated with a range of pages.
-         * It also needs the task's mmap_sem held, and is not very quick.
-         * It returns the number of pages it got. */
-        down_read(&current->mm->mmap_sem);
-        if (get_user_pages(current, current->mm, virtpfn << PAGE_SHIFT,
-                           1, write, 1, &page, NULL) == 1)
-                ret = page_to_pfn(page);
-        up_read(&current->mm->mmap_sem);
-        return ret;
+        /* gup me one page at this address please! */
+        if (get_user_pages_fast(virtpfn << PAGE_SHIFT, 1, write, &page) == 1)
+                return page_to_pfn(page);
+
+        /* This value indicates failure. */
+        return -1UL;
 }
 
 /*H:340 Converting a Guest page table entry to a shadow (ie. real) page table
@@ -174,7 +167,7 @@ static pte_t gpte_to_spte(struct lg_cpu *cpu, pte_t gpte, int write)
 /*H:460 And to complete the chain, release_pte() looks like this: */
 static void release_pte(pte_t pte)
 {
-        /* Remember that get_user_pages() took a reference to the page, in
+        /* Remember that get_user_pages_fast() took a reference to the page, in
          * get_pfn()?  We have to put it back now. */
         if (pte_flags(pte) & _PAGE_PRESENT)
                 put_page(pfn_to_page(pte_pfn(pte)));
diff --git a/drivers/md/md.c b/drivers/md/md.c
index c7aae66c6f9b..8cfadc5bd2ba 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -2393,6 +2393,8 @@ static void analyze_sbs(mddev_t * mddev)
 
 }
 
+static void md_safemode_timeout(unsigned long data);
+
 static ssize_t
 safe_delay_show(mddev_t *mddev, char *page)
 {
@@ -2432,9 +2434,12 @@ safe_delay_store(mddev_t *mddev, const char *cbuf, size_t len)
         if (msec == 0)
                 mddev->safemode_delay = 0;
         else {
+                unsigned long old_delay = mddev->safemode_delay;
                 mddev->safemode_delay = (msec*HZ)/1000;
                 if (mddev->safemode_delay == 0)
                         mddev->safemode_delay = 1;
+                if (mddev->safemode_delay < old_delay)
+                        md_safemode_timeout((unsigned long)mddev);
         }
         return len;
 }
@@ -4634,6 +4639,11 @@ static int update_size(mddev_t *mddev, sector_t num_sectors)
          */
         if (mddev->sync_thread)
                 return -EBUSY;
+        if (mddev->bitmap)
+                /* Sorry, cannot grow a bitmap yet, just remove it,
+                 * grow, and re-add.
+                 */
+                return -EBUSY;
         rdev_for_each(rdev, tmp, mddev) {
                 sector_t avail;
                 avail = rdev->size * 2;
@@ -5993,7 +6003,7 @@ static int remove_and_add_spares(mddev_t *mddev)
                         }
                 }
 
-        if (mddev->degraded) {
+        if (mddev->degraded && ! mddev->ro) {
                 rdev_for_each(rdev, rtmp, mddev) {
                         if (rdev->raid_disk >= 0 &&
                             !test_bit(In_sync, &rdev->flags) &&
@@ -6067,6 +6077,8 @@ void md_check_recovery(mddev_t *mddev)
                 flush_signals(current);
         }
 
+        if (mddev->ro && !test_bit(MD_RECOVERY_NEEDED, &mddev->recovery))
+                return;
         if ( ! (
                 (mddev->flags && !mddev->external) ||
                 test_bit(MD_RECOVERY_NEEDED, &mddev->recovery) ||
@@ -6080,6 +6092,15 @@ void md_check_recovery(mddev_t *mddev)
         if (mddev_trylock(mddev)) {
                 int spares = 0;
 
+                if (mddev->ro) {
+                        /* Only thing we do on a ro array is remove
+                         * failed devices.
+                         */
+                        remove_and_add_spares(mddev);
+                        clear_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
+                        goto unlock;
+                }
+
                 if (!mddev->external) {
                         int did_change = 0;
                         spin_lock_irq(&mddev->write_lock);
@@ -6117,7 +6138,8 @@ void md_check_recovery(mddev_t *mddev)
                         /* resync has finished, collect result */
                         md_unregister_thread(mddev->sync_thread);
                         mddev->sync_thread = NULL;
-                        if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery)) {
+                        if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery) &&
+                            !test_bit(MD_RECOVERY_REQUESTED, &mddev->recovery)) {
                                 /* success...*/
                                 /* activate any spares */
                                 if (mddev->pers->spare_active(mddev))
@@ -6169,6 +6191,7 @@ void md_check_recovery(mddev_t *mddev)
                 } else if ((spares = remove_and_add_spares(mddev))) {
                         clear_bit(MD_RECOVERY_SYNC, &mddev->recovery);
                         clear_bit(MD_RECOVERY_CHECK, &mddev->recovery);
+                        clear_bit(MD_RECOVERY_REQUESTED, &mddev->recovery);
                         set_bit(MD_RECOVERY_RECOVER, &mddev->recovery);
                 } else if (mddev->recovery_cp < MaxSector) {
                         set_bit(MD_RECOVERY_SYNC, &mddev->recovery);
@@ -6232,7 +6255,11 @@ static int md_notify_reboot(struct notifier_block *this,
 
                 for_each_mddev(mddev, tmp)
                         if (mddev_trylock(mddev)) {
-                                do_md_stop (mddev, 1, 0);
+                                /* Force a switch to readonly even array
+                                 * appears to still be in use.  Hence
+                                 * the '100'.
+                                 */
+                                do_md_stop (mddev, 1, 100);
                                 mddev_unlock(mddev);
                         }
                 /*
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index d41bebb6da0f..e34cd0e62473 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -76,11 +76,13 @@ static void r10bio_pool_free(void *r10_bio, void *data)
         kfree(r10_bio);
 }
 
+/* Maximum size of each resync request */
 #define RESYNC_BLOCK_SIZE (64*1024)
-//#define RESYNC_BLOCK_SIZE PAGE_SIZE
-#define RESYNC_SECTORS (RESYNC_BLOCK_SIZE >> 9)
 #define RESYNC_PAGES ((RESYNC_BLOCK_SIZE + PAGE_SIZE-1) / PAGE_SIZE)
-#define RESYNC_WINDOW (2048*1024)
+/* amount of memory to reserve for resync requests */
+#define RESYNC_WINDOW (1024*1024)
+/* maximum number of concurrent requests, memory permitting */
+#define RESYNC_DEPTH (32*1024*1024/RESYNC_BLOCK_SIZE)
 
 /*
  * When performing a resync, we need to read and compare, so
@@ -690,7 +692,6 @@ static int flush_pending_writes(conf_t *conf)
  *    there is no normal IO happeing.  It must arrange to call
  *    lower_barrier when the particular background IO completes.
  */
-#define RESYNC_DEPTH 32
 
 static void raise_barrier(conf_t *conf, int force)
 {
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 40e939675657..224de022e7c5 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -2568,10 +2568,10 @@ static bool handle_stripe5(struct stripe_head *sh)
                 if (dev->written)
                         s.written++;
                 rdev = rcu_dereference(conf->disks[i].rdev);
-                if (rdev && unlikely(test_bit(Blocked, &rdev->flags))) {
+                if (blocked_rdev == NULL &&
+                    rdev && unlikely(test_bit(Blocked, &rdev->flags))) {
                         blocked_rdev = rdev;
                         atomic_inc(&rdev->nr_pending);
-                        break;
                 }
                 if (!rdev || !test_bit(In_sync, &rdev->flags)) {
                         /* The ReadError flag will just be confusing now */
@@ -2588,8 +2588,14 @@ static bool handle_stripe5(struct stripe_head *sh)
         rcu_read_unlock();
 
         if (unlikely(blocked_rdev)) {
-                set_bit(STRIPE_HANDLE, &sh->state);
-                goto unlock;
+                if (s.syncing || s.expanding || s.expanded ||
+                    s.to_write || s.written) {
+                        set_bit(STRIPE_HANDLE, &sh->state);
+                        goto unlock;
+                }
+                /* There is nothing for the blocked_rdev to block */
+                rdev_dec_pending(blocked_rdev, conf->mddev);
+                blocked_rdev = NULL;
         }
 
         if (s.to_fill && !test_bit(STRIPE_BIOFILL_RUN, &sh->state)) {
@@ -2832,10 +2838,10 @@ static bool handle_stripe6(struct stripe_head *sh, struct page *tmp_page)
                 if (dev->written)
                         s.written++;
                 rdev = rcu_dereference(conf->disks[i].rdev);
-                if (rdev && unlikely(test_bit(Blocked, &rdev->flags))) {
+                if (blocked_rdev == NULL &&
+                    rdev && unlikely(test_bit(Blocked, &rdev->flags))) {
                         blocked_rdev = rdev;
                         atomic_inc(&rdev->nr_pending);
-                        break;
                 }
                 if (!rdev || !test_bit(In_sync, &rdev->flags)) {
                         /* The ReadError flag will just be confusing now */
@@ -2853,9 +2859,16 @@ static bool handle_stripe6(struct stripe_head *sh, struct page *tmp_page)
         rcu_read_unlock();
 
         if (unlikely(blocked_rdev)) {
-                set_bit(STRIPE_HANDLE, &sh->state);
-                goto unlock;
+                if (s.syncing || s.expanding || s.expanded ||
+                    s.to_write || s.written) {
+                        set_bit(STRIPE_HANDLE, &sh->state);
+                        goto unlock;
+                }
+                /* There is nothing for the blocked_rdev to block */
+                rdev_dec_pending(blocked_rdev, conf->mddev);
+                blocked_rdev = NULL;
         }
+
         pr_debug("locked=%d uptodate=%d to_read=%d"
                " to_write=%d failed=%d failed_num=%d,%d\n",
                s.locked, s.uptodate, s.to_read, s.to_write, s.failed,
@@ -4446,6 +4459,9 @@ static int raid5_check_reshape(mddev_t *mddev)
                 return -EINVAL; /* Cannot shrink array or change level yet */
         if (mddev->delta_disks == 0)
                 return 0; /* nothing to do */
+        if (mddev->bitmap)
+                /* Cannot grow a bitmap yet */
+                return -EBUSY;
 
         /* Can only proceed if there are plenty of stripe_heads.
          * We need a minimum of one full stripe,, and for sensible progress
diff --git a/drivers/media/dvb/dvb-usb/cxusb.c b/drivers/media/dvb/dvb-usb/cxusb.c
index 578afce6884c..aaa0b6f0b521 100644
--- a/drivers/media/dvb/dvb-usb/cxusb.c
+++ b/drivers/media/dvb/dvb-usb/cxusb.c
@@ -565,7 +565,8 @@ static int cxusb_lgh064f_tuner_attach(struct dvb_usb_adapter *adap)
 
 static int dvico_bluebird_xc2028_callback(void *ptr, int command, int arg)
 {
-        struct dvb_usb_device *d = ptr;
+        struct dvb_usb_adapter *adap = ptr;
+        struct dvb_usb_device *d = adap->dev;
 
         switch (command) {
         case XC2028_TUNER_RESET:
@@ -593,9 +594,9 @@ static int cxusb_dvico_xc3028_tuner_attach(struct dvb_usb_adapter *adap)
                 .callback  = dvico_bluebird_xc2028_callback,
         };
         static struct xc2028_ctrl ctl = {
-                .fname       = "xc3028-dvico-au-01.fw",
+                .fname       = "xc3028-v27.fw",
                 .max_len     = 64,
-                .scode_table = XC3028_FE_ZARLINK456,
+                .demod       = XC3028_FE_ZARLINK456,
         };
 
         fe = dvb_attach(xc2028_attach, adap->fe, &cfg);
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index 574dffe91b68..7dbb4a223c99 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -135,9 +135,8 @@ config DVB_CX22702
 
 config DVB_DRX397XD
         tristate "Micronas DRX3975D/DRX3977D based"
-        depends on DVB_CORE && I2C && HOTPLUG
+        depends on DVB_CORE && I2C
         default m if DVB_FE_CUSTOMISE
-        select FW_LOADER
         help
           A DVB-T tuner module. Say Y when you want to support this frontend.
 
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index d4a6e56a7135..ecbfa1b39b70 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -630,7 +630,7 @@ config VIDEO_ZORAN_ZR36060
         depends on VIDEO_ZORAN
         help
           Say Y to support Zoran boards based on 36060 chips.
-          This includes Iomega Bus, Pinnacle DC10, Linux media Labs 33
+          This includes Iomega Buz, Pinnacle DC10, Linux media Labs 33
           and 33 R10 and AverMedia 6 boards.
 
 config VIDEO_ZORAN_BUZ
diff --git a/drivers/media/video/arv.c b/drivers/media/video/arv.c
index 56ebfd5ef6fa..9e436ad3d34b 100644
--- a/drivers/media/video/arv.c
+++ b/drivers/media/video/arv.c
@@ -29,6 +29,7 @@
 #include <linux/sched.h>
 #include <linux/videodev.h>
 #include <media/v4l2-common.h>
+#include <media/v4l2-ioctl.h>
 #include <linux/mutex.h>
 
 #include <asm/uaccess.h>
@@ -755,7 +756,6 @@ static const struct file_operations ar_fops = {
 
 static struct video_device ar_template = {
         .name           = "Colour AR VGA",
-        .type           = VID_TYPE_CAPTURE,
         .fops           = &ar_fops,
         .release        = ar_release,
         .minor          = -1,
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index 476ae44a62d2..452da70e719f 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -1015,6 +1015,7 @@ struct em28xx_board em28xx_boards[] = {
                 .valid        = EM28XX_BOARD_NOT_VALIDATED,
                 .vchannels    = 3,
                 .tuner_type   = TUNER_XC2028,
+                .mts_firmware = 1,
                 .decoder      = EM28XX_TVP5150,
                 .input          = { {
                         .type     = EM28XX_VMUX_TELEVISION,
diff --git a/drivers/media/video/gspca/conex.c b/drivers/media/video/gspca/conex.c
index 44b0bffeb20e..cd3a3f5829b2 100644
--- a/drivers/media/video/gspca/conex.c
+++ b/drivers/media/video/gspca/conex.c
@@ -123,7 +123,7 @@ static void reg_r(struct gspca_dev *gspca_dev,
 {
         struct usb_device *dev = gspca_dev->dev;
 
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         if (len > sizeof gspca_dev->usb_buf) {
                 err("reg_r: buffer overflow");
                 return;
@@ -163,7 +163,7 @@ static void reg_w(struct gspca_dev *gspca_dev,
 {
         struct usb_device *dev = gspca_dev->dev;
 
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         if (len > sizeof gspca_dev->usb_buf) {
                 err("reg_w: buffer overflow");
                 return;
diff --git a/drivers/media/video/gspca/etoms.c b/drivers/media/video/gspca/etoms.c
index c8c2f02fcf00..1dbe92d01e6a 100644
--- a/drivers/media/video/gspca/etoms.c
+++ b/drivers/media/video/gspca/etoms.c
@@ -233,7 +233,7 @@ static void reg_r(struct gspca_dev *gspca_dev,
 {
         struct usb_device *dev = gspca_dev->dev;
 
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         if (len > sizeof gspca_dev->usb_buf) {
                 err("reg_r: buffer overflow");
                 return;
@@ -271,7 +271,7 @@ static void reg_w(struct gspca_dev *gspca_dev,
 {
         struct usb_device *dev = gspca_dev->dev;
 
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         if (len > sizeof gspca_dev->usb_buf) {
                 err("reg_w: buffer overflow");
                 return;
@@ -461,6 +461,52 @@ static void Et_init2(struct gspca_dev *gspca_dev)
         reg_w_val(gspca_dev, 0x80, 0x20);       /* 0x20; */
 }
 
+static void setbrightness(struct gspca_dev *gspca_dev)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+        int i;
+        __u8 brightness = sd->brightness;
+
+        for (i = 0; i < 4; i++)
+                reg_w_val(gspca_dev, ET_O_RED + i, brightness);
+}
+
+static void getbrightness(struct gspca_dev *gspca_dev)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+        int i;
+        int brightness = 0;
+
+        for (i = 0; i < 4; i++) {
+                reg_r(gspca_dev, ET_O_RED + i, 1);
+                brightness += gspca_dev->usb_buf[0];
+        }
+        sd->brightness = brightness >> 3;
+}
+
+static void setcontrast(struct gspca_dev *gspca_dev)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+        __u8 RGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 };
+        __u8 contrast = sd->contrast;
+
+        memset(RGBG, contrast, sizeof(RGBG) - 2);
+        reg_w(gspca_dev, ET_G_RED, RGBG, 6);
+}
+
+static void getcontrast(struct gspca_dev *gspca_dev)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+        int i;
+        int contrast = 0;
+
+        for (i = 0; i < 4; i++) {
+                reg_r(gspca_dev, ET_G_RED + i, 1);
+                contrast += gspca_dev->usb_buf[0];
+        }
+        sd->contrast = contrast >> 2;
+}
+
 static void setcolors(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
@@ -492,6 +538,16 @@ static void getcolors(struct gspca_dev *gspca_dev)
         }
 }
 
+static void setautogain(struct gspca_dev *gspca_dev)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+
+        if (sd->autogain)
+                sd->ag_cnt = AG_CNT_START;
+        else
+                sd->ag_cnt = -1;
+}
+
 static void Et_init1(struct gspca_dev *gspca_dev)
 {
         __u8 value;
@@ -614,6 +670,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
         sd->contrast = CONTRAST_DEF;
         sd->colors = COLOR_DEF;
         sd->autogain = AUTOGAIN_DEF;
+        sd->ag_cnt = -1;
         return 0;
 }
 
@@ -641,6 +698,8 @@ static void sd_start(struct gspca_dev *gspca_dev)
         else
                 Et_init2(gspca_dev);
 
+        setautogain(gspca_dev);
+
         reg_w_val(gspca_dev, ET_RESET_ALL, 0x08);
         et_video(gspca_dev, 1);         /* video on */
 }
@@ -658,52 +717,6 @@ static void sd_close(struct gspca_dev *gspca_dev)
 {
 }
 
-static void setbrightness(struct gspca_dev *gspca_dev)
-{
-        struct sd *sd = (struct sd *) gspca_dev;
-        int i;
-        __u8 brightness = sd->brightness;
-
-        for (i = 0; i < 4; i++)
-                reg_w_val(gspca_dev, ET_O_RED + i, brightness);
-}
-
-static void getbrightness(struct gspca_dev *gspca_dev)
-{
-        struct sd *sd = (struct sd *) gspca_dev;
-        int i;
-        int brightness = 0;
-
-        for (i = 0; i < 4; i++) {
-                reg_r(gspca_dev, ET_O_RED + i, 1);
-                brightness += gspca_dev->usb_buf[0];
-        }
-        sd->brightness = brightness >> 3;
-}
-
-static void setcontrast(struct gspca_dev *gspca_dev)
-{
-        struct sd *sd = (struct sd *) gspca_dev;
-        __u8 RGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 };
-        __u8 contrast = sd->contrast;
-
-        memset(RGBG, contrast, sizeof(RGBG) - 2);
-        reg_w(gspca_dev, ET_G_RED, RGBG, 6);
-}
-
-static void getcontrast(struct gspca_dev *gspca_dev)
-{
-        struct sd *sd = (struct sd *) gspca_dev;
-        int i;
-        int contrast = 0;
-
-        for (i = 0; i < 4; i++) {
-                reg_r(gspca_dev, ET_G_RED + i, 1);
-                contrast += gspca_dev->usb_buf[0];
-        }
-        sd->contrast = contrast >> 2;
-}
-
 static __u8 Et_getgainG(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
@@ -733,15 +746,22 @@ static void Et_setgainG(struct gspca_dev *gspca_dev, __u8 gain)
 #define LIMIT(color) \
         (unsigned char)((color > 0xff)?0xff:((color < 0)?0:color))
 
-static void setautogain(struct gspca_dev *gspca_dev)
+static void do_autogain(struct gspca_dev *gspca_dev)
 {
-        __u8 luma = 0;
+        struct sd *sd = (struct sd *) gspca_dev;
+        __u8 luma;
         __u8 luma_mean = 128;
         __u8 luma_delta = 20;
         __u8 spring = 4;
-        int Gbright = 0;
+        int Gbright;
         __u8 r, g, b;
 
+        if (sd->ag_cnt < 0)
+                return;
+        if (--sd->ag_cnt >= 0)
+                return;
+        sd->ag_cnt = AG_CNT_START;
+
         Gbright = Et_getgainG(gspca_dev);
         reg_r(gspca_dev, ET_LUMA_CENTER, 4);
         g = (gspca_dev->usb_buf[0] + gspca_dev->usb_buf[3]) >> 1;
@@ -768,7 +788,6 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
                         __u8 *data,                     /* isoc packet */
                         int len)                        /* iso packet length */
 {
-        struct sd *sd;
         int seqframe;
 
         seqframe = data[0] & 0x3f;
@@ -783,13 +802,6 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
                 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame,
                                         data, 0);
                 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, len);
-                sd = (struct sd *) gspca_dev;
-                if (sd->ag_cnt >= 0) {
-                        if (--sd->ag_cnt < 0) {
-                                sd->ag_cnt = AG_CNT_START;
-                                setautogain(gspca_dev);
-                        }
-                }
                 return;
         }
         if (len) {
@@ -862,10 +874,8 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
         struct sd *sd = (struct sd *) gspca_dev;
 
         sd->autogain = val;
-        if (val)
-                sd->ag_cnt = AG_CNT_START;
-        else
-                sd->ag_cnt = -1;
+        if (gspca_dev->streaming)
+                setautogain(gspca_dev);
         return 0;
 }
 
@@ -889,6 +899,7 @@ static struct sd_desc sd_desc = {
         .stop0 = sd_stop0,
         .close = sd_close,
         .pkt_scan = sd_pkt_scan,
+        .dq_callback = do_autogain,
 };
 
 /* -- module initialisation -- */
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index 3a051c925ff6..15d302b28b79 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -47,7 +47,7 @@ MODULE_LICENSE("GPL");
 
 static int video_nr = -1;
 
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
 int gspca_debug = D_ERR | D_PROBE;
 EXPORT_SYMBOL(gspca_debug);
 
@@ -677,7 +677,7 @@ static int try_fmt_vid_cap(struct gspca_dev *gspca_dev,
         w = fmt->fmt.pix.width;
         h = fmt->fmt.pix.height;
 
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         if (gspca_debug & D_CONF)
                 PDEBUG_MODE("try fmt cap", fmt->fmt.pix.pixelformat, w, h);
 #endif
@@ -785,7 +785,7 @@ static int dev_open(struct inode *inode, struct file *file)
         }
         gspca_dev->users++;
         file->private_data = gspca_dev;
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         /* activate the v4l2 debug */
         if (gspca_debug & D_V4L2)
                 gspca_dev->vdev.debug |= 3;
@@ -904,7 +904,7 @@ static int vidioc_s_ctrl(struct file *file, void *priv,
                 if (ctrl->id != ctrls->qctrl.id)
                         continue;
                 if (ctrl->value < ctrls->qctrl.minimum
-                    && ctrl->value > ctrls->qctrl.maximum)
+                    || ctrl->value > ctrls->qctrl.maximum)
                         return -ERANGE;
                 PDEBUG(D_CONF, "set ctrl [%08x] = %d", ctrl->id, ctrl->value);
                 if (mutex_lock_interruptible(&gspca_dev->usb_lock))
@@ -1080,7 +1080,7 @@ static int vidioc_streamon(struct file *file, void *priv,
                 if (ret < 0)
                         goto out;
         }
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         if (gspca_debug & D_STREAM) {
                 PDEBUG_MODE("stream on OK",
                         gspca_dev->pixfmt,
@@ -1913,7 +1913,7 @@ static void __exit gspca_exit(void)
 module_init(gspca_init);
 module_exit(gspca_exit);
 
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
 module_param_named(debug, gspca_debug, int, 0644);
 MODULE_PARM_DESC(debug,
                 "Debug (bit) 0x01:error 0x02:probe 0x04:config"
diff --git a/drivers/media/video/gspca/gspca.h b/drivers/media/video/gspca/gspca.h
index 3fd2c4eee204..67e448940eaa 100644
--- a/drivers/media/video/gspca/gspca.h
+++ b/drivers/media/video/gspca/gspca.h
@@ -9,7 +9,10 @@
 #include <media/v4l2-common.h>
 #include <linux/mutex.h>
 
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+/* compilation option */
+#define GSPCA_DEBUG 1
+
+#ifdef GSPCA_DEBUG
 /* GSPCA our debug messages */
 extern int gspca_debug;
 #define PDEBUG(level, fmt, args...) \
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index 83139efc4629..b4f00ec0885c 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -40,14 +40,15 @@ struct sd {
         struct gspca_dev gspca_dev;             /* !! must be the first item */
 
         /* Determined by sensor type */
-        short maxwidth;
-        short maxheight;
+        char sif;
 
         unsigned char primary_i2c_slave;        /* I2C write id of sensor */
 
         unsigned char brightness;
         unsigned char contrast;
         unsigned char colors;
+        __u8 hflip;
+        __u8 vflip;
 
         char compress;          /* Should the next frame be compressed? */
         char compress_inited;   /* Are compression params uploaded? */
@@ -77,9 +78,12 @@ static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
+static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
+static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
+static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
+static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
 
 static struct ctrl sd_ctrls[] = {
-#define SD_BRIGHTNESS 0
         {
             {
                 .id      = V4L2_CID_BRIGHTNESS,
@@ -88,12 +92,12 @@ static struct ctrl sd_ctrls[] = {
                 .minimum = 0,
                 .maximum = 255,
                 .step    = 1,
-                .default_value = 127,
+#define BRIGHTNESS_DEF 127
+                .default_value = BRIGHTNESS_DEF,
             },
             .set = sd_setbrightness,
             .get = sd_getbrightness,
         },
-#define SD_CONTRAST 1
         {
             {
                 .id      = V4L2_CID_CONTRAST,
@@ -102,31 +106,61 @@ static struct ctrl sd_ctrls[] = {
                 .minimum = 0,
                 .maximum = 255,
                 .step    = 1,
-                .default_value = 127,
+#define CONTRAST_DEF 127
+                .default_value = CONTRAST_DEF,
             },
             .set = sd_setcontrast,
             .get = sd_getcontrast,
         },
-#define SD_COLOR 2
         {
             {
                 .id      = V4L2_CID_SATURATION,
                 .type    = V4L2_CTRL_TYPE_INTEGER,
-                .name    = "Saturation",
+                .name    = "Color",
                 .minimum = 0,
                 .maximum = 255,
                 .step    = 1,
-                .default_value = 127,
+#define COLOR_DEF 127
+                .default_value = COLOR_DEF,
             },
             .set = sd_setcolors,
             .get = sd_getcolors,
         },
+/* next controls work with ov7670 only */
+        {
+            {
+                .id      = V4L2_CID_HFLIP,
+                .type    = V4L2_CTRL_TYPE_BOOLEAN,
+                .name    = "Mirror",
+                .minimum = 0,
+                .maximum = 1,
+                .step    = 1,
+#define HFLIP_DEF 0
+                .default_value = HFLIP_DEF,
+            },
+            .set = sd_sethflip,
+            .get = sd_gethflip,
+        },
+        {
+            {
+                .id      = V4L2_CID_VFLIP,
+                .type    = V4L2_CTRL_TYPE_BOOLEAN,
+                .name    = "Vflip",
+                .minimum = 0,
+                .maximum = 1,
+                .step    = 1,
+#define VFLIP_DEF 0
+                .default_value = VFLIP_DEF,
+            },
+            .set = sd_setvflip,
+            .get = sd_getvflip,
+        },
 };
 
 static struct v4l2_pix_format vga_mode[] = {
         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
                 .bytesperline = 320,
-                .sizeimage = 320 * 240 * 3 / 8 + 589,
+                .sizeimage = 320 * 240 * 3 / 8 + 590,
                 .colorspace = V4L2_COLORSPACE_JPEG,
                 .priv = 1},
         {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
@@ -138,12 +172,12 @@ static struct v4l2_pix_format vga_mode[] = {
 static struct v4l2_pix_format sif_mode[] = {
         {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
                 .bytesperline = 176,
-                .sizeimage = 176 * 144 * 3 / 8 + 589,
+                .sizeimage = 176 * 144 * 3 / 8 + 590,
                 .colorspace = V4L2_COLORSPACE_JPEG,
                 .priv = 1},
         {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
                 .bytesperline = 352,
-                .sizeimage = 352 * 288 * 3 / 8 + 589,
+                .sizeimage = 352 * 288 * 3 / 8 + 590,
                 .colorspace = V4L2_COLORSPACE_JPEG,
                 .priv = 0},
 };
@@ -225,6 +259,7 @@ static struct v4l2_pix_format sif_mode[] = {
 #define OV7670_REG_VSTART      0x19    /* Vert start high bits */
 #define OV7670_REG_VSTOP       0x1a    /* Vert stop high bits */
 #define OV7670_REG_MVFP        0x1e    /* Mirror / vflip */
+#define   OV7670_MVFP_VFLIP      0x10    /* vertical flip */
 #define   OV7670_MVFP_MIRROR     0x20    /* Mirror image */
 #define OV7670_REG_AEW         0x24    /* AGC upper limit */
 #define OV7670_REG_AEB         0x25    /* AGC lower limit */
@@ -258,16 +293,6 @@ static struct v4l2_pix_format sif_mode[] = {
 #define OV7670_REG_HAECC7      0xaa    /* Hist AEC/AGC control 7 */
 #define OV7670_REG_BD60MAX     0xab    /* 60hz banding step limit */
 
-struct ovsensor_window {
-        short x;
-        short y;
-        short width;
-        short height;
-/*      int format; */
-        short quarter;          /* Scale width and height down 2x */
-        short clockdiv;         /* Clock divisor setting */
-};
-
 static unsigned char ov7670_abs_to_sm(unsigned char v)
 {
         if (v > 127)
@@ -499,19 +524,6 @@ static int init_ov_sensor(struct sd *sd)
         return 0;
 }
 
-/* Switch on standard JPEG compression. Returns 0 for success. */
-static int ov519_init_compression(struct sd *sd)
-{
-        if (!sd->compress_inited) {
-                if (reg_w_mask(sd, OV519_SYS_EN_CLK1, 1 << 2, 1 << 2) < 0) {
-                        PDEBUG(D_ERR, "Error switching to compressed mode");
-                        return -EIO;
-                }
-                sd->compress_inited = 1;
-        }
-        return 0;
-}
-
 /* Set the read and write slave IDs. The "slave" argument is the write slave,
  * and the read slave will be set to (slave + 1).
  * This should not be called from outside the i2c I/O functions.
@@ -681,21 +693,17 @@ static int ov8xx0_configure(struct sd *sd)
                 return -1;
         }
         if ((rc & 3) == 1) {
-                PDEBUG(D_PROBE, "Sensor is an OV8610");
                 sd->sensor = SEN_OV8610;
         } else {
                 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
                 return -1;
         }
         PDEBUG(D_PROBE, "Writing 8610 registers");
-        if (write_i2c_regvals(sd,
-                        norm_8610,
-                        sizeof norm_8610 / sizeof norm_8610[0]))
+        if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
                 return -1;
 
         /* Set sensor-specific vars */
-        sd->maxwidth = 640;
-        sd->maxheight = 480;
+/*      sd->sif = 0;            already done */
         return 0;
 }
 
@@ -825,7 +833,7 @@ static int ov7xx0_configure(struct sd *sd)
                 { OV7670_REG_COM7, OV7670_COM7_RESET },
                 { OV7670_REG_TSLB, 0x04 },              /* OV */
                 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
-                { OV7670_REG_CLKRC, 0x1 },
+                { OV7670_REG_CLKRC, 0x01 },
         /*
          * Set the hardware window.  These values from OV don't entirely
          * make sense - hstop is less than hstart.  But they work...
@@ -839,16 +847,12 @@ static int ov7xx0_configure(struct sd *sd)
                 { 0x70, 0x3a },         { 0x71, 0x35 },
                 { 0x72, 0x11 },         { 0x73, 0xf0 },
                 { 0xa2, 0x02 },
-/* jfm */
-/* { OV7670_REG_COM10, 0x0 }, */
+/*              { OV7670_REG_COM10, 0x0 }, */
 
         /* Gamma curve values */
                 { 0x7a, 0x20 },
-/* jfm:win 7b=1c */
                 { 0x7b, 0x10 },
-/* jfm:win 7c=28 */
                 { 0x7c, 0x1e },
-/* jfm:win 7d=3c */
                 { 0x7d, 0x35 },
                 { 0x7e, 0x5a },         { 0x7f, 0x69 },
                 { 0x80, 0x76 },         { 0x81, 0x80 },
@@ -864,13 +868,11 @@ static int ov7xx0_configure(struct sd *sd)
                                  | OV7670_COM8_BFILT },
                 { OV7670_REG_GAIN, 0 }, { OV7670_REG_AECH, 0 },
                 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
-/* jfm:win 14=38 */
                 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
                 { OV7670_REG_BD50MAX, 0x05 },   { OV7670_REG_BD60MAX, 0x07 },
                 { OV7670_REG_AEW, 0x95 },       { OV7670_REG_AEB, 0x33 },
                 { OV7670_REG_VPT, 0xe3 },       { OV7670_REG_HAECC1, 0x78 },
                 { OV7670_REG_HAECC2, 0x68 },
-/* jfm:win a1=0b */
                 { 0xa1, 0x03 }, /* magic */
                 { OV7670_REG_HAECC3, 0xd8 },    { OV7670_REG_HAECC4, 0xd8 },
                 { OV7670_REG_HAECC5, 0xf0 },    { OV7670_REG_HAECC6, 0x90 },
@@ -884,8 +886,6 @@ static int ov7xx0_configure(struct sd *sd)
         /* Almost all of these are magic "reserved" values.  */
                 { OV7670_REG_COM5, 0x61 },      { OV7670_REG_COM6, 0x4b },
                 { 0x16, 0x02 },
-/* jfm */
-/*              { OV7670_REG_MVFP, 0x07|OV7670_MVFP_MIRROR }, */
                 { OV7670_REG_MVFP, 0x07 },
                 { 0x21, 0x02 },         { 0x22, 0x91 },
                 { 0x29, 0x07 },         { 0x33, 0x0b },
@@ -930,7 +930,10 @@ static int ov7xx0_configure(struct sd *sd)
                 { OV7670_REG_EDGE, 0 },
                 { 0x75, 0x05 },         { 0x76, 0xe1 },
                 { 0x4c, 0 },            { 0x77, 0x01 },
-                { OV7670_REG_COM13, 0xc3 },     { 0x4b, 0x09 },
+                { OV7670_REG_COM13, OV7670_COM13_GAMMA
+                                  | OV7670_COM13_UVSAT
+                                  | 2},         /* was 3 */
+                { 0x4b, 0x09 },
                 { 0xc9, 0x60 },         { OV7670_REG_COM16, 0x38 },
                 { 0x56, 0x40 },
 
@@ -956,30 +959,10 @@ static int ov7xx0_configure(struct sd *sd)
                 { 0x79, 0x03 },         { 0xc8, 0x40 },
                 { 0x79, 0x05 },         { 0xc8, 0x30 },
                 { 0x79, 0x26 },
-
-        /* Format YUV422 */
-                { OV7670_REG_COM7, OV7670_COM7_YUV },  /* Selects YUV mode */
-                { OV7670_REG_RGB444, 0 },       /* No RGB444 please */
-                { OV7670_REG_COM1, 0 },
-                { OV7670_REG_COM15, OV7670_COM15_R00FF },
-                { OV7670_REG_COM9, 0x18 },
-                                /* 4x gain ceiling; 0x8 is reserved bit */
-                { 0x4f, 0x80 },         /* "matrix coefficient 1" */
-                { 0x50, 0x80 },         /* "matrix coefficient 2" */
-                { 0x52, 0x22 },         /* "matrix coefficient 4" */
-                { 0x53, 0x5e },         /* "matrix coefficient 5" */
-                { 0x54, 0x80 },         /* "matrix coefficient 6" */
-                { OV7670_REG_COM13, OV7670_COM13_GAMMA|OV7670_COM13_UVSAT },
-};
+        };
 
         PDEBUG(D_PROBE, "starting OV7xx0 configuration");
 
-/* jfm:already done? */
-        if (init_ov_sensor(sd) < 0)
-                PDEBUG(D_ERR, "Failed to read sensor ID");
-        else
-                PDEBUG(D_PROBE, "OV7xx0 initialized");
-
         /* Detect sensor (sub)type */
         rc = i2c_r(sd, OV7610_REG_COM_I);
 
@@ -1025,20 +1008,25 @@ static int ov7xx0_configure(struct sd *sd)
                         return low;
                 }
                 if (high == 0x76) {
-                        if (low == 0x30) {
+                        switch (low) {
+                        case 0x30:
                                 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
                                 sd->sensor = SEN_OV7630;
-                        } else if (low == 0x40) {
+                                break;
+                        case 0x40:
                                 PDEBUG(D_PROBE, "Sensor is an OV7645");
                                 sd->sensor = SEN_OV7640; /* FIXME */
-                        } else if (low == 0x45) {
+                                break;
+                        case 0x45:
                                 PDEBUG(D_PROBE, "Sensor is an OV7645B");
                                 sd->sensor = SEN_OV7640; /* FIXME */
-                        } else if (low == 0x48) {
+                                break;
+                        case 0x48:
                                 PDEBUG(D_PROBE, "Sensor is an OV7648");
                                 sd->sensor = SEN_OV7640; /* FIXME */
-                        } else {
-                                PDEBUG(D_PROBE, "Unknown sensor: 0x76%X", low);
+                                break;
+                        default:
+                                PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
                                 return -1;
                         }
                 } else {
@@ -1050,34 +1038,34 @@ static int ov7xx0_configure(struct sd *sd)
                 return -1;
         }
 
-        if (sd->sensor == SEN_OV7620) {
+        switch (sd->sensor) {
+        case SEN_OV7620:
                 PDEBUG(D_PROBE, "Writing 7620 registers");
-                if (write_i2c_regvals(sd, norm_7620,
-                                sizeof norm_7620 / sizeof norm_7620[0]))
+                if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
                         return -1;
-        } else if (sd->sensor == SEN_OV7630) {
+                break;
+        case SEN_OV7630:
                 PDEBUG(D_ERR, "7630 is not supported by this driver version");
                 return -1;
-        } else if (sd->sensor == SEN_OV7640) {
+        case SEN_OV7640:
                 PDEBUG(D_PROBE, "Writing 7640 registers");
-                if (write_i2c_regvals(sd, norm_7640,
-                                sizeof norm_7640 / sizeof norm_7640[0]))
+                if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
                         return -1;
-        } else if (sd->sensor == SEN_OV7670) {
+                break;
+        case SEN_OV7670:
                 PDEBUG(D_PROBE, "Writing 7670 registers");
-                if (write_i2c_regvals(sd, norm_7670,
-                                sizeof norm_7670 / sizeof norm_7670[0]))
+                if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
                         return -1;
-        } else {
+                break;
+        default:
                 PDEBUG(D_PROBE, "Writing 7610 registers");
-                if (write_i2c_regvals(sd, norm_7610,
-                                sizeof norm_7610 / sizeof norm_7610[0]))
+                if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
                         return -1;
+                break;
         }
 
         /* Set sensor-specific vars */
-        sd->maxwidth = 640;
-        sd->maxheight = 480;
+/*      sd->sif = 0;            already done */
         return 0;
 }
 
@@ -1231,43 +1219,45 @@ static int ov6xx0_configure(struct sd *sd)
         /* Ugh. The first two bits are the version bits, but
          * the entire register value must be used. I guess OVT
          * underestimated how many variants they would make. */
-        if (rc == 0x00) {
+        switch (rc) {
+        case 0x00:
                 sd->sensor = SEN_OV6630;
                 PDEBUG(D_ERR,
                         "WARNING: Sensor is an OV66308. Your camera may have");
                 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
-        } else if (rc == 0x01) {
+                break;
+        case 0x01:
                 sd->sensor = SEN_OV6620;
-                PDEBUG(D_PROBE, "Sensor is an OV6620");
-        } else if (rc == 0x02) {
+                break;
+        case 0x02:
                 sd->sensor = SEN_OV6630;
                 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
-        } else if (rc == 0x03) {
+                break;
+        case 0x03:
                 sd->sensor = SEN_OV6630;
                 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
-        } else if (rc == 0x90) {
+                break;
+        case 0x90:
                 sd->sensor = SEN_OV6630;
                 PDEBUG(D_ERR,
                         "WARNING: Sensor is an OV66307. Your camera may have");
                 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
-        } else {
+                break;
+        default:
                 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
                 return -1;
         }
 
         /* Set sensor-specific vars */
-        sd->maxwidth = 352;
-        sd->maxheight = 288;
+        sd->sif = 1;
 
         if (sd->sensor == SEN_OV6620) {
                 PDEBUG(D_PROBE, "Writing 6x20 registers");
-                if (write_i2c_regvals(sd, norm_6x20,
-                                sizeof norm_6x20 / sizeof norm_6x20[0]))
+                if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
                         return -1;
         } else {
                 PDEBUG(D_PROBE, "Writing 6x30 registers");
-                if (write_i2c_regvals(sd, norm_6x30,
-                                sizeof norm_6x30 / sizeof norm_6x30[0]))
+                if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
                         return -1;
         }
         return 0;
@@ -1276,14 +1266,8 @@ static int ov6xx0_configure(struct sd *sd)
 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
 static void ov51x_led_control(struct sd *sd, int on)
 {
-        PDEBUG(D_STREAM, "LED (%s)", on ? "on" : "off");
-
-/*      if (sd->bridge == BRG_OV511PLUS) */
-/*              reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0); */
-/*      else if (sd->bridge == BRG_OV519) */
-                reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1);   /* 0 / 1 */
-/*      else if (sd->bclass == BCL_OV518) */
-/*              reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02); */
+/*      PDEBUG(D_STREAM, "LED (%s)", on ? "on" : "off"); */
+        reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1);   /* 0 / 1 */
 }
 
 /* this function is called at probe time */
@@ -1293,11 +1277,8 @@ static int sd_config(struct gspca_dev *gspca_dev,
         struct sd *sd = (struct sd *) gspca_dev;
         struct cam *cam;
 
-/* (from ov519_configure) */
         static const struct ov_regvals init_519[] = {
                 { 0x5a,  0x6d }, /* EnableSystem */
-/* jfm trace usbsnoop3-1.txt */
-/* jfm 53 = fb */
                 { 0x53,  0x9b },
                 { 0x54,  0xff }, /* set bit2 to enable jpeg */
                 { 0x5d,  0x03 },
@@ -1314,9 +1295,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
 
         if (write_regvals(sd, init_519, ARRAY_SIZE(init_519)))
                 goto error;
-/* jfm: not seen in windows trace */
-        if (ov519_init_compression(sd))
-                goto error;
         ov51x_led_control(sd, 0);       /* turn LED off */
 
         /* Test for 76xx */
@@ -1365,16 +1343,18 @@ static int sd_config(struct gspca_dev *gspca_dev,
 
         cam = &gspca_dev->cam;
         cam->epaddr = OV511_ENDPOINT_ADDRESS;
-        if (sd->maxwidth == 640) {
+        if (!sd->sif) {
                 cam->cam_mode = vga_mode;
-                cam->nmodes = sizeof vga_mode / sizeof vga_mode[0];
+                cam->nmodes = ARRAY_SIZE(vga_mode);
         } else {
                 cam->cam_mode = sif_mode;
-                cam->nmodes = sizeof sif_mode / sizeof sif_mode[0];
+                cam->nmodes = ARRAY_SIZE(sif_mode);
         }
-        sd->brightness = sd_ctrls[SD_BRIGHTNESS].qctrl.default_value;
-        sd->contrast = sd_ctrls[SD_CONTRAST].qctrl.default_value;
-        sd->colors = sd_ctrls[SD_COLOR].qctrl.default_value;
+        sd->brightness = BRIGHTNESS_DEF;
+        sd->contrast = CONTRAST_DEF;
+        sd->colors = COLOR_DEF;
+        sd->hflip = HFLIP_DEF;
+        sd->vflip = VFLIP_DEF;
         return 0;
 error:
         PDEBUG(D_ERR, "OV519 Config failed");
@@ -1394,8 +1374,7 @@ static int sd_open(struct gspca_dev *gspca_dev)
  *
  * Do not put any sensor-specific code in here (including I2C I/O functions)
  */
-static int ov519_mode_init_regs(struct sd *sd,
-                                int width, int height)
+static int ov519_mode_init_regs(struct sd *sd)
 {
         static const struct ov_regvals mode_init_519_ov7670[] = {
                 { 0x5d, 0x03 }, /* Turn off suspend mode */
@@ -1441,36 +1420,23 @@ static int ov519_mode_init_regs(struct sd *sd,
                 /* windows reads 0x55 at this point, why? */
         };
 
-/* int hi_res; */
-
-        PDEBUG(D_CONF, "mode init %dx%d", width, height);
-
-/*      if (width >= 800 && height >= 600)
-                hi_res = 1;
-        else
-                hi_res = 0; */
-
-/*      if (ov51x_stop(sd) < 0)
-                return -EIO; */
-
         /******** Set the mode ********/
         if (sd->sensor != SEN_OV7670) {
                 if (write_regvals(sd, mode_init_519,
                                   ARRAY_SIZE(mode_init_519)))
                         return -EIO;
+                if (sd->sensor == SEN_OV7640) {
+                        /* Select 8-bit input mode */
+                        reg_w_mask(sd, OV519_CAM_DFR, 0x10, 0x10);
+                }
         } else {
                 if (write_regvals(sd, mode_init_519_ov7670,
                                   ARRAY_SIZE(mode_init_519_ov7670)))
                         return -EIO;
         }
 
-        if (sd->sensor == SEN_OV7640) {
-                /* Select 8-bit input mode */
-                reg_w_mask(sd, OV519_CAM_DFR, 0x10, 0x10);
-        }
-
-        reg_w(sd, OV519_CAM_H_SIZE,     width >> 4);
-        reg_w(sd, OV519_CAM_V_SIZE,     height >> 3);
+        reg_w(sd, OV519_CAM_H_SIZE,     sd->gspca_dev.width >> 4);
+        reg_w(sd, OV519_CAM_V_SIZE,     sd->gspca_dev.height >> 3);
         reg_w(sd, OV519_CAM_X_OFFSETL,  0x00);
         reg_w(sd, OV519_CAM_X_OFFSETH,  0x00);
         reg_w(sd, OV519_CAM_Y_OFFSETL,  0x00);
@@ -1485,9 +1451,10 @@ static int ov519_mode_init_regs(struct sd *sd,
 
 /* FIXME: These are only valid at the max resolution. */
         sd->clockdiv = 0;
-        if (sd->sensor == SEN_OV7640) {
+        switch (sd->sensor) {
+        case SEN_OV7640:
                 switch (sd->frame_rate) {
-/*jfm: default was 30 fps */
+/*fixme: default was 30 fps */
                 case 30:
                         reg_w(sd, 0xa4, 0x0c);
                         reg_w(sd, 0x23, 0xff);
@@ -1517,7 +1484,8 @@ static int ov519_mode_init_regs(struct sd *sd,
                         sd->clockdiv = 1;
                         break;
                 }
-        } else if (sd->sensor == SEN_OV8610) {
+                break;
+        case SEN_OV8610:
                 switch (sd->frame_rate) {
                 default:        /* 15 fps */
 /*              case 15: */
@@ -1533,41 +1501,37 @@ static int ov519_mode_init_regs(struct sd *sd,
                         reg_w(sd, 0x23, 0x1b);
                         break;
                 }
-                sd->clockdiv = 0;
-        } else if (sd->sensor == SEN_OV7670) { /* guesses, based on 7640 */
+                break;
+        case SEN_OV7670:                /* guesses, based on 7640 */
                 PDEBUG(D_STREAM, "Setting framerate to %d fps",
                                  (sd->frame_rate == 0) ? 15 : sd->frame_rate);
+                reg_w(sd, 0xa4, 0x10);
                 switch (sd->frame_rate) {
                 case 30:
-                        reg_w(sd, 0xa4, 0x10);
                         reg_w(sd, 0x23, 0xff);
                         break;
                 case 20:
-                        reg_w(sd, 0xa4, 0x10);
                         reg_w(sd, 0x23, 0x1b);
                         break;
-                default: /* 15 fps */
-/*                      case 15: */
-                        reg_w(sd, 0xa4, 0x10);
+                default:
+/*              case 15: */
                         reg_w(sd, 0x23, 0xff);
                         sd->clockdiv = 1;
                         break;
                 }
+                break;
         }
 
-/*      if (ov51x_restart(sd) < 0)
-                return -EIO; */
-
-        /* Reset it just for good measure */
-/*      if (ov51x_reset(sd, OV511_RESET_NOREGS) < 0)
-                return -EIO; */
         return 0;
 }
 
-static int mode_init_ov_sensor_regs(struct sd *sd,
-                                struct ovsensor_window *win)
+static int mode_init_ov_sensor_regs(struct sd *sd)
 {
-        int qvga = win->quarter;
+        struct gspca_dev *gspca_dev;
+        int qvga;
+
+        gspca_dev = &sd->gspca_dev;
+        qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
 
         /******** Mode (VGA/QVGA) and sensor specific regs ********/
         switch (sd->sensor) {
@@ -1611,8 +1575,6 @@ static int mode_init_ov_sensor_regs(struct sd *sd,
                          OV7670_COM7_FMT_MASK);
                 break;
         case SEN_OV6620:
-                i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
-                break;
         case SEN_OV6630:
                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
                 break;
@@ -1621,24 +1583,21 @@ static int mode_init_ov_sensor_regs(struct sd *sd,
         }
 
         /******** Palette-specific regs ********/
-/* Need to do work here for the OV7670 */
-
-                if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
-                        /* not valid on the OV6620/OV7620/6630? */
-                        i2c_w_mask(sd, 0x0e, 0x00, 0x40);
-                }
+        if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
+                /* not valid on the OV6620/OV7620/6630? */
+                i2c_w_mask(sd, 0x0e, 0x00, 0x40);
+        }
 
-                /* The OV518 needs special treatment. Although both the OV518
-                 * and the OV6630 support a 16-bit video bus, only the 8 bit Y
-                 * bus is actually used. The UV bus is tied to ground.
-                 * Therefore, the OV6630 needs to be in 8-bit multiplexed
-                 * output mode */
+        /* The OV518 needs special treatment. Although both the OV518
+         * and the OV6630 support a 16-bit video bus, only the 8 bit Y
+         * bus is actually used. The UV bus is tied to ground.
+         * Therefore, the OV6630 needs to be in 8-bit multiplexed
+         * output mode */
 
-                /* OV7640 is 8-bit only */
+        /* OV7640 is 8-bit only */
 
-                if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV7640)
-                        i2c_w_mask(sd, 0x13, 0x00, 0x20);
-/*      } */
+        if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV7640)
+                i2c_w_mask(sd, 0x13, 0x00, 0x20);
 
         /******** Clock programming ********/
         /* The OV6620 needs special handling. This prevents the
@@ -1647,14 +1606,14 @@ static int mode_init_ov_sensor_regs(struct sd *sd,
 
                 /* Clock down */
                 i2c_w(sd, 0x2a, 0x04);
-                i2c_w(sd, 0x11, win->clockdiv);
+                i2c_w(sd, 0x11, sd->clockdiv);
                 i2c_w(sd, 0x2a, 0x84);
                 /* This next setting is critical. It seems to improve
                  * the gain or the contrast. The "reserved" bits seem
                  * to have some effect in this case. */
                 i2c_w(sd, 0x2d, 0x85);
-        } else if (win->clockdiv >= 0) {
-                i2c_w(sd, 0x11, win->clockdiv);
+        } else if (sd->clockdiv >= 0) {
+                i2c_w(sd, 0x11, sd->clockdiv);
         }
 
         /******** Special Features ********/
@@ -1674,7 +1633,7 @@ static int mode_init_ov_sensor_regs(struct sd *sd,
         /* is fully tested. */
         /* 7620/6620/6630? don't have register 0x35, so play it safe */
         if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
-                if (win->width == 640 /*&& win->height == 480*/)
+                if (!qvga)
                         i2c_w(sd, 0x35, 0x9e);
                 else
                         i2c_w(sd, 0x35, 0x1e);
@@ -1682,13 +1641,31 @@ static int mode_init_ov_sensor_regs(struct sd *sd,
         return 0;
 }
 
-static int set_ov_sensor_window(struct sd *sd,
-                                struct ovsensor_window *win)
+static void sethvflip(struct sd *sd)
 {
+        if (sd->sensor != SEN_OV7670)
+                return;
+        if (sd->gspca_dev.streaming)
+                ov51x_stop(sd);
+        i2c_w_mask(sd, OV7670_REG_MVFP,
+                OV7670_MVFP_MIRROR * sd->hflip
+                        | OV7670_MVFP_VFLIP * sd->vflip,
+                OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
+        if (sd->gspca_dev.streaming)
+                ov51x_restart(sd);
+}
+
+static int set_ov_sensor_window(struct sd *sd)
+{
+        struct gspca_dev *gspca_dev;
+        int qvga;
         int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
         int ret, hstart, hstop, vstop, vstart;
         __u8 v;
 
+        gspca_dev = &sd->gspca_dev;
+        qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
+
         /* The different sensor ICs handle setting up of window differently.
          * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
         switch (sd->sensor) {
@@ -1733,7 +1710,7 @@ static int set_ov_sensor_window(struct sd *sd,
         switch (sd->sensor) {
         case SEN_OV6620:
         case SEN_OV6630:
-                if (win->quarter) {     /* QCIF */
+                if (qvga) {             /* QCIF */
                         hwscale = 0;
                         vwscale = 0;
                 } else {                /* CIF */
@@ -1743,7 +1720,7 @@ static int set_ov_sensor_window(struct sd *sd,
                 }
                 break;
         case SEN_OV8610:
-                if (win->quarter) {     /* QSVGA */
+                if (qvga) {             /* QSVGA */
                         hwscale = 1;
                         vwscale = 1;
                 } else {                /* SVGA */
@@ -1752,7 +1729,7 @@ static int set_ov_sensor_window(struct sd *sd,
                 }
                 break;
         default:                        /* SEN_OV7xx0 */
-                if (win->quarter) {     /* QVGA */
+                if (qvga) {             /* QVGA */
                         hwscale = 1;
                         vwscale = 0;
                 } else {                /* VGA */
@@ -1761,7 +1738,7 @@ static int set_ov_sensor_window(struct sd *sd,
                 }
         }
 
-        ret = mode_init_ov_sensor_regs(sd, win);
+        ret = mode_init_ov_sensor_regs(sd);
         if (ret < 0)
                 return ret;
 
@@ -1782,7 +1759,7 @@ static int set_ov_sensor_window(struct sd *sd,
         /* I can hard code this for OV7670s */
         /* Yes, these numbers do look odd, but they're tested and work! */
         if (sd->sensor == SEN_OV7670) {
-                if (win->quarter) {     /* QVGA from ov7670.c by
+                if (qvga) {             /* QVGA from ov7670.c by
                                          * Jonathan Corbet */
                         hstart = 164;
                         hstop = 20;
@@ -1796,75 +1773,45 @@ static int set_ov_sensor_window(struct sd *sd,
                 }
                 /* OV7670 hardware window registers are split across
                  * multiple locations */
-                i2c_w(sd, OV7670_REG_HSTART, (hstart >> 3) & 0xff);
-                i2c_w(sd, OV7670_REG_HSTOP, (hstop >> 3) & 0xff);
+                i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
+                i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
                 v = i2c_r(sd, OV7670_REG_HREF);
                 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
                 msleep(10);     /* need to sleep between read and write to
                                  * same reg! */
                 i2c_w(sd, OV7670_REG_HREF, v);
 
-                i2c_w(sd, OV7670_REG_VSTART, (vstart >> 2) & 0xff);
-                i2c_w(sd, OV7670_REG_VSTOP, (vstop >> 2) & 0xff);
+                i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
+                i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
                 v = i2c_r(sd, OV7670_REG_VREF);
                 v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
                 msleep(10);     /* need to sleep between read and write to
                                  * same reg! */
                 i2c_w(sd, OV7670_REG_VREF, v);
-
+                sethvflip(sd);
         } else {
-                i2c_w(sd, 0x17, hwsbase + (win->x >> hwscale));
-                i2c_w(sd, 0x18, hwebase + ((win->x + win->width) >> hwscale));
-                i2c_w(sd, 0x19, vwsbase + (win->y >> vwscale));
-                i2c_w(sd, 0x1a, vwebase + ((win->y + win->height) >> vwscale));
+                i2c_w(sd, 0x17, hwsbase);
+                i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
+                i2c_w(sd, 0x19, vwsbase);
+                i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
         }
         return 0;
 }
 
-static int ov_sensor_mode_setup(struct sd *sd,
-                                int width, int height)
-{
-        struct ovsensor_window win;
-
-/*      win.format = mode; */
-
-        /* Unless subcapture is enabled,
-         * center the image window and downsample
-         * if possible to increase the field of view */
-        /* NOTE: OV518(+) and OV519 does downsampling on its own */
-        win.width = width;
-        win.height = height;
-        if (width == sd->maxwidth)
-                win.quarter = 0;
-        else
-                win.quarter = 1;
-
-        /* Center it */
-        win.x = (win.width - width) / 2;
-        win.y = (win.height - height) / 2;
-
-        /* Clock is determined by OV519 frame rate code */
-        win.clockdiv = sd->clockdiv;
-
-        PDEBUG(D_CONF, "Setting clock divider to %d", win.clockdiv);
-        return set_ov_sensor_window(sd, &win);
-}
-
 /* -- start the camera -- */
 static void sd_start(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
         int ret;
 
-
-        ret = ov519_mode_init_regs(sd, gspca_dev->width, gspca_dev->height);
+        ret = ov519_mode_init_regs(sd);
         if (ret < 0)
                 goto out;
-        ret = ov_sensor_mode_setup(sd, gspca_dev->width, gspca_dev->height);
+        ret = set_ov_sensor_window(sd);
         if (ret < 0)
                 goto out;
 
-        ret = ov51x_restart((struct sd *) gspca_dev);
+        ret = ov51x_restart(sd);
         if (ret < 0)
                 goto out;
         PDEBUG(D_STREAM, "camera started alt: 0x%02x", gspca_dev->alt);
@@ -1938,12 +1885,10 @@ static void setbrightness(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
         int val;
-/*      int was_streaming; */
 
         val = sd->brightness;
         PDEBUG(D_CONF, "brightness:%d", val);
-/*      was_streaming = gspca_dev->streaming;
- *      if (was_streaming)
+/*      if (gspca_dev->streaming)
  *              ov51x_stop(sd); */
         switch (sd->sensor) {
         case SEN_OV8610:
@@ -1961,12 +1906,12 @@ static void setbrightness(struct gspca_dev *gspca_dev)
                         i2c_w(sd, OV7610_REG_BRT, val);
                 break;
         case SEN_OV7670:
-/*jfm - from windblows
+/*win trace
  *              i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
                 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
                 break;
         }
-/*      if (was_streaming)
+/*      if (gspca_dev->streaming)
  *              ov51x_restart(sd); */
 }
 
@@ -1974,12 +1919,10 @@ static void setcontrast(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
         int val;
-/*      int was_streaming; */
 
         val = sd->contrast;
         PDEBUG(D_CONF, "contrast:%d", val);
-/*      was_streaming = gspca_dev->streaming;
-        if (was_streaming)
+/*      if (gspca_dev->streaming)
                 ov51x_stop(sd); */
         switch (sd->sensor) {
         case SEN_OV7610:
@@ -2016,7 +1959,7 @@ static void setcontrast(struct gspca_dev *gspca_dev)
                 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
                 break;
         }
-/*      if (was_streaming)
+/*      if (gspca_dev->streaming)
                 ov51x_restart(sd); */
 }
 
@@ -2024,12 +1967,10 @@ static void setcolors(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
         int val;
-/*      int was_streaming; */
 
         val = sd->colors;
         PDEBUG(D_CONF, "saturation:%d", val);
-/*      was_streaming = gspca_dev->streaming;
-        if (was_streaming)
+/*      if (gspca_dev->streaming)
                 ov51x_stop(sd); */
         switch (sd->sensor) {
         case SEN_OV8610:
@@ -2055,7 +1996,7 @@ static void setcolors(struct gspca_dev *gspca_dev)
                 /* set REG_COM13 values for UV sat auto mode */
                 break;
         }
-/*      if (was_streaming)
+/*      if (gspca_dev->streaming)
                 ov51x_restart(sd); */
 }
 
@@ -2110,6 +2051,40 @@ static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
         return 0;
 }
 
+static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+
+        sd->hflip = val;
+        sethvflip(sd);
+        return 0;
+}
+
+static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+
+        *val = sd->hflip;
+        return 0;
+}
+
+static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+
+        sd->vflip = val;
+        sethvflip(sd);
+        return 0;
+}
+
+static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+
+        *val = sd->vflip;
+        return 0;
+}
+
 /* sub-driver description */
 static const struct sd_desc sd_desc = {
         .name = MODULE_NAME,
@@ -2178,4 +2153,3 @@ module_exit(sd_mod_exit);
 
 module_param(frame_rate, int, 0644);
 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
-
diff --git a/drivers/media/video/gspca/pac7311.c b/drivers/media/video/gspca/pac7311.c
index ea3d7021f401..815bea6edc44 100644
--- a/drivers/media/video/gspca/pac7311.c
+++ b/drivers/media/video/gspca/pac7311.c
@@ -31,7 +31,9 @@ MODULE_LICENSE("GPL");
 struct sd {
         struct gspca_dev gspca_dev;             /* !! must be the first item */
 
-        int avg_lum;
+        int lum_sum;
+        atomic_t avg_lum;
+        atomic_t do_gain;
 
         unsigned char brightness;
         unsigned char contrast;
@@ -271,6 +273,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
         sd->contrast = CONTRAST_DEF;
         sd->colors = COLOR_DEF;
         sd->autogain = AUTOGAIN_DEF;
+        sd->ag_cnt = -1;
         return 0;
 }
 
@@ -311,6 +314,18 @@ static void setcolors(struct gspca_dev *gspca_dev)
         PDEBUG(D_CONF|D_STREAM, "color: %i", sd->colors);
 }
 
+static void setautogain(struct gspca_dev *gspca_dev)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+
+        if (sd->autogain) {
+                sd->lum_sum = 0;
+                sd->ag_cnt = AG_CNT_START;
+        } else {
+                sd->ag_cnt = -1;
+        }
+}
+
 /* this function is called at open time */
 static int sd_open(struct gspca_dev *gspca_dev)
 {
@@ -320,8 +335,6 @@ static int sd_open(struct gspca_dev *gspca_dev)
 
 static void sd_start(struct gspca_dev *gspca_dev)
 {
-        struct sd *sd = (struct sd *) gspca_dev;
-
         reg_w(gspca_dev, 0xff, 0x01);
         reg_w_buf(gspca_dev, 0x0002, "\x48\x0a\x40\x08\x00\x00\x08\x00", 8);
         reg_w_buf(gspca_dev, 0x000a, "\x06\xff\x11\xff\x5a\x30\x90\x4c", 8);
@@ -394,6 +407,7 @@ static void sd_start(struct gspca_dev *gspca_dev)
         setcontrast(gspca_dev);
         setbrightness(gspca_dev);
         setcolors(gspca_dev);
+        setautogain(gspca_dev);
 
         /* set correct resolution */
         switch (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
@@ -431,13 +445,6 @@ static void sd_start(struct gspca_dev *gspca_dev)
         reg_w(gspca_dev, 0xff, 0x01);
         reg_w(gspca_dev, 0x78, 0x04);
         reg_w(gspca_dev, 0x78, 0x05);
-
-        if (sd->autogain) {
-                sd->ag_cnt = AG_CNT_START;
-                sd->avg_lum = 0;
-        } else {
-                sd->ag_cnt = -1;
-        }
 }
 
 static void sd_stopN(struct gspca_dev *gspca_dev)
@@ -473,13 +480,20 @@ static void sd_close(struct gspca_dev *gspca_dev)
         reg_w(gspca_dev, 0x78, 0x44); /* Bit_0=start stream, Bit_7=LED */
 }
 
-static void setautogain(struct gspca_dev *gspca_dev, int luma)
+static void do_autogain(struct gspca_dev *gspca_dev)
 {
+        struct sd *sd = (struct sd *) gspca_dev;
+        int luma;
         int luma_mean = 128;
         int luma_delta = 20;
         __u8 spring = 5;
         int Gbright;
 
+        if (!atomic_read(&sd->do_gain))
+                return;
+        atomic_set(&sd->do_gain, 0);
+
+        luma = atomic_read(&sd->avg_lum);
         Gbright = reg_r(gspca_dev, 0x02);
         PDEBUG(D_FRAM, "luma mean %d", luma);
         if (luma < luma_mean - luma_delta ||
@@ -523,12 +537,13 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
 
                         /* start of frame */
                         if (sd->ag_cnt >= 0 && p > 28) {
-                                sd->avg_lum += data[p - 23];
+                                sd->lum_sum += data[p - 23];
                                 if (--sd->ag_cnt < 0) {
                                         sd->ag_cnt = AG_CNT_START;
-                                        setautogain(gspca_dev,
-                                                sd->avg_lum / AG_CNT_START);
-                                        sd->avg_lum = 0;
+                                        atomic_set(&sd->avg_lum,
+                                                sd->lum_sum / AG_CNT_START);
+                                        sd->lum_sum = 0;
+                                        atomic_set(&sd->do_gain, 1);
                                 }
                         }
 
@@ -677,12 +692,8 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
         struct sd *sd = (struct sd *) gspca_dev;
 
         sd->autogain = val;
-        if (val) {
-                sd->ag_cnt = AG_CNT_START;
-                sd->avg_lum = 0;
-        } else {
-                sd->ag_cnt = -1;
-        }
+        if (gspca_dev->streaming)
+                setautogain(gspca_dev);
         return 0;
 }
 
@@ -706,6 +717,7 @@ static struct sd_desc sd_desc = {
         .stop0 = sd_stop0,
         .close = sd_close,
         .pkt_scan = sd_pkt_scan,
+        .dq_callback = do_autogain,
 };
 
 /* -- module initialisation -- */
diff --git a/drivers/media/video/gspca/sonixb.c b/drivers/media/video/gspca/sonixb.c
index e18748c5a14d..11210c71f66c 100644
--- a/drivers/media/video/gspca/sonixb.c
+++ b/drivers/media/video/gspca/sonixb.c
@@ -408,7 +408,7 @@ static void reg_w(struct gspca_dev *gspca_dev,
                   const __u8 *buffer,
                   int len)
 {
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         if (len > sizeof gspca_dev->usb_buf) {
                 PDEBUG(D_ERR|D_PACK, "reg_w: buffer overflow");
                 return;
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c
index 33a3df1f6915..245a30ec5fb1 100644
--- a/drivers/media/video/gspca/sonixj.c
+++ b/drivers/media/video/gspca/sonixj.c
@@ -32,7 +32,7 @@ MODULE_LICENSE("GPL");
 struct sd {
         struct gspca_dev gspca_dev;     /* !! must be the first item */
 
-        int avg_lum;
+        atomic_t avg_lum;
         unsigned int exposure;
 
         unsigned short brightness;
@@ -148,55 +148,58 @@ static struct v4l2_pix_format vga_mode[] = {
 
 /*Data from sn9c102p+hv71331r */
 static const __u8 sn_hv7131[] = {
-/*      reg0  reg1  reg2  reg3  reg4  reg5  reg6  reg7  reg8  reg9 */
-        0x00, 0x03, 0x64, 0x00, 0x1A, 0x20, 0x20, 0x20, 0xA1, 0x11,
-/*      rega  regb  regc  regd  rege  regf  reg10 reg11 */
-        0x02, 0x09, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00,         /* 00 */
-/*      reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a reg1b */
-        0x00, 0x01, 0x03, 0x28, 0x1e, 0x41, 0x0a, 0x00, 0x00, 0x00,
-/*      reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23 */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+/*      reg0    reg1    reg2    reg3    reg4    reg5    reg6    reg7 */
+        0x00,   0x03,   0x64,   0x00,   0x1a,   0x20,   0x20,   0x20,
+/*      reg8    reg9    rega    regb    regc    regd    rege    regf */
+        0xa1,   0x11,   0x02,   0x09,   0x00,   0x00,   0x00,   0x10,
+/*      reg10   reg11   reg12   reg13   reg14   reg15   reg16   reg17 */
+        0x03,   0x00,   0x00,   0x01,   0x03,   0x28,   0x1e,   0x41,
+/*      reg18   reg19   reg1a   reg1b   reg1c   reg1d   reg1e   reg1f */
+        0x0a,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00
 };
 
 static const __u8 sn_mi0360[] = {
-/*      reg0  reg1  reg2  reg3  reg4  reg5  reg6  reg7  reg8  reg9 */
-        0x00, 0x61, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, 0xb1, 0x5d,
-/*      rega  regb  regc  regd  rege  regf  reg10 reg11 */
-        0x07, 0x00, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00,
-/*      reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a reg1b */
-        0x00, 0x02, 0x0a, 0x28, 0x1e, 0x61, 0x06, 0x00, 0x00, 0x00,
-/*      reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23 */
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+/*      reg0    reg1    reg2    reg3    reg4    reg5    reg6    reg7 */
+        0x00,   0x61,   0x44,   0x00,   0x1a,   0x20,   0x20,   0x20,
+/*      reg8    reg9    rega    regb    regc    regd    rege    regf */
+        0xb1,   0x5d,   0x07,   0x00,   0x00,   0x00,   0x00,   0x10,
+/*      reg10   reg11   reg12   reg13   reg14   reg15   reg16   reg17 */
+        0x03,   0x00,   0x00,   0x02,   0x0a,   0x28,   0x1e,   0x61,
+/*      reg18   reg19   reg1a   reg1b   reg1c   reg1d   reg1e   reg1f */
+        0x06,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00
 };
 
 static const __u8 sn_mo4000[] = {
-/*      reg0    reg1    reg2    reg3    reg4    reg5    reg6    reg7    reg8 */
-        0x12,   0x23,   0x60,   0x00,   0x1A,   0x00,   0x20,   0x18,   0x81,
-/*      reg9    rega    regb    regc    regd    rege    regf    reg10   reg11*/
-        0x21,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x03,   0x00,
-/*      reg12   reg13   reg14   reg15   reg16   reg17   reg18   reg19   reg1a*/
-        0x0b,   0x0f,   0x14,   0x28,   0x1e,   0x40,   0x08,   0x00,   0x00,
-/*      reg1b   reg1c   reg1d   reg1e   reg1f   reg20   reg21   reg22   reg23*/
-        0x00,   0x00,   0x00,   0x00,   0x00,   0x08,   0x25,   0x39,   0x4b,
-        0x5c,   0x6b,   0x79,   0x87,   0x95,   0xa2,   0xaf,   0xbb,   0xc7,
-        0xd3,   0xdf,   0xea,   0xf5
+/*      reg0    reg1    reg2    reg3    reg4    reg5    reg6    reg7 */
+        0x12,   0x23,   0x60,   0x00,   0x1a,   0x00,   0x20,   0x18,
+/*      reg8    reg9    rega    regb    regc    regd    rege    regf */
+        0x81,   0x21,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,
+/*      reg10   reg11   reg12   reg13   reg14   reg15   reg16   reg17 */
+        0x03,    0x00,  0x0b,   0x0f,   0x14,   0x28,   0x1e,   0x40,
+/*      reg18   reg19   reg1a   reg1b   reg1c   reg1d   reg1e   reg1f */
+        0x08,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00
 };
 
 static const __u8 sn_ov7648[] = {
-        0x00, 0x21, 0x62, 0x00, 0x1a, 0x20, 0x20, 0x20, 0xA1, 0x6E, 0x18, 0x65,
-        0x00, 0x00, 0x00, 0x10, 0x03, 0x00, 0x00, 0x06, 0x06, 0x28, 0x1E, 0x82,
-        0x07, 0x00, 0x00, 0x00, 0x00, 0x00
+/*      reg0    reg1    reg2    reg3    reg4    reg5    reg6    reg7 */
+        0x00,   0x21,   0x62,   0x00,   0x1a,   0x20,   0x20,   0x20,
+/*      reg8    reg9    rega    regb    regc    regd    rege    regf */
+        0xa1,   0x6e,   0x18,   0x65,   0x00,   0x00,   0x00,   0x10,
+/*      reg10   reg11   reg12   reg13   reg14   reg15   reg16   reg17 */
+        0x03,   0x00,   0x00,   0x06,   0x06,   0x28,   0x1e,   0x82,
+/*      reg18   reg19   reg1a   reg1b   reg1c   reg1d   reg1e   reg1f */
+        0x07,   0x00,   0x00,   0x00,   0x00,   0x00
 };
 
 static const __u8 sn_ov7660[]   = {
-/*      reg0    reg1    reg2    reg3    reg4    reg5    reg6    reg7    reg8 */
-        0x00,   0x61,   0x40,   0x00,   0x1a,   0x00,   0x00,   0x00,   0x81,
-/*      reg9    rega    regb    regc    regd    rege    regf    reg10   reg11*/
-        0x21,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x03,   0x00,
-/*      reg12   reg13   reg14   reg15   reg16   reg17   reg18   reg19   reg1a*/
-        0x01,   0x01,   0x14,   0x28,   0x1e,   0x00,   0x07,   0x00,   0x00,
-/*      reg1b   reg1c   reg1d   reg1e   reg1f   reg20   reg21   reg22   reg23*/
-        0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00
+/*      reg0    reg1    reg2    reg3    reg4    reg5    reg6    reg7 */
+        0x00,   0x61,   0x40,   0x00,   0x1a,   0x20,   0x20,   0x20,
+/*      reg8    reg9    rega    regb    regc    regd    rege    regf */
+        0x81,   0x21,   0x07,   0x00,   0x00,   0x00,   0x00,   0x10,
+/*      reg10   reg11   reg12   reg13   reg14   reg15   reg16   reg17 */
+        0x03,   0x00,   0x01,   0x01,   0x08,   0x28,   0x1e,   0x20,
+/*      reg18   reg19   reg1a   reg1b   reg1c   reg1d   reg1e   reg1f */
+        0x07,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,   0x00,
 };
 
 /* sequence specific to the sensors - !! index = SENSOR_xxx */
@@ -212,10 +215,6 @@ static const __u8 regsn20[] = {
         0x00, 0x2d, 0x46, 0x5a, 0x6c, 0x7c, 0x8b, 0x99,
         0xa6, 0xb2, 0xbf, 0xca, 0xd5, 0xe0, 0xeb, 0xf5, 0xff
 };
-static const __u8 regsn20_sn9c120[] = {
-        0x00, 0x25, 0x3c, 0x50, 0x62, 0x72, 0x81, 0x90,
-        0x9e, 0xab, 0xb8, 0xc5, 0xd1, 0xdd, 0xe9, 0xf4, 0xff
-};
 static const __u8 regsn20_sn9c325[] = {
         0x0a, 0x3a, 0x56, 0x6c, 0x7e, 0x8d, 0x9a, 0xa4,
         0xaf, 0xbb, 0xc5, 0xcd, 0xd5, 0xde, 0xe8, 0xed, 0xf5
@@ -227,21 +226,6 @@ static const __u8 reg84[] = {
 /*      0x00, 0x00, 0x00, 0x00, 0x00 */
         0xf7, 0x0f, 0x0a, 0x00, 0x00
 };
-static const __u8 reg84_sn9c120_1[] = {
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x0c, 0x00, 0x00
-};
-static const __u8 reg84_sn9c120_2[] = {
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x0c, 0x02, 0x3b
-};
-static const __u8 reg84_sn9c120_3[] = {
-        0x14, 0x00, 0x27, 0x00, 0x08, 0x00, 0xeb, 0x0f,
-        0xd5, 0x0f, 0x42, 0x00, 0x41, 0x00, 0xca, 0x0f,
-        0xf5, 0x0f, 0x0c, 0x02, 0x3b
-};
 static const __u8 reg84_sn9c325[] = {
         0x14, 0x00, 0x27, 0x00, 0x07, 0x00, 0xe4, 0x0f,
         0xd3, 0x0f, 0x4b, 0x00, 0x48, 0x00, 0xc0, 0x0f,
@@ -360,17 +344,15 @@ static const __u8 ov7660_sensor_init[][8] = {
         {0xa1, 0x21, 0x12, 0x80, 0x00, 0x00, 0x00, 0x10}, /* reset SCCB */
 /*              (delay 20ms) */
         {0xa1, 0x21, 0x12, 0x05, 0x00, 0x00, 0x00, 0x10},
-                                                /* Outformat ?? rawRGB */
+                                                /* Outformat = rawRGB */
         {0xa1, 0x21, 0x13, 0xb8, 0x00, 0x00, 0x00, 0x10}, /* init COM8 */
-        {0xd1, 0x21, 0x00, 0x01, 0x74, 0x92, 0x00, 0x10},
-/*      {0xd1, 0x21, 0x00, 0x01, 0x74, 0x74, 0x00, 0x10}, */
+        {0xd1, 0x21, 0x00, 0x01, 0x74, 0x74, 0x00, 0x10},
                                                 /* GAIN BLUE RED VREF */
         {0xd1, 0x21, 0x04, 0x00, 0x7d, 0x62, 0x00, 0x10},
                                                 /* COM 1 BAVE GEAVE AECHH */
         {0xb1, 0x21, 0x08, 0x83, 0x01, 0x00, 0x00, 0x10}, /* RAVE COM2 */
         {0xd1, 0x21, 0x0c, 0x00, 0x08, 0x04, 0x4f, 0x10}, /* COM 3 4 5 6 */
-        {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xf8, 0x10},
-/*      {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xff, 0x10}, */
+        {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xff, 0x10},
                                                 /* AECH CLKRC COM7 COM8 */
         {0xc1, 0x21, 0x14, 0x2c, 0x00, 0x02, 0x00, 0x10}, /* COM9 COM10 */
         {0xd1, 0x21, 0x17, 0x10, 0x60, 0x02, 0x7b, 0x10},
@@ -379,8 +361,8 @@ static const __u8 ov7660_sensor_init[][8] = {
         {0xb1, 0x21, 0x1e, 0x01, 0x0e, 0x00, 0x00, 0x10}, /* MVFP LAEC */
         {0xd1, 0x21, 0x20, 0x07, 0x07, 0x07, 0x07, 0x10},
                                         /* BOS GBOS GROS ROS (BGGR offset) */
-        {0xd1, 0x21, 0x24, 0x68, 0x58, 0xd4, 0x80, 0x10},
-/*      {0xd1, 0x21, 0x24, 0x78, 0x68, 0xd4, 0x80, 0x10}, */
+/*      {0xd1, 0x21, 0x24, 0x68, 0x58, 0xd4, 0x80, 0x10}, */
+        {0xd1, 0x21, 0x24, 0x78, 0x68, 0xd4, 0x80, 0x10},
                                                 /* AEW AEB VPT BBIAS */
         {0xd1, 0x21, 0x28, 0x80, 0x30, 0x00, 0x00, 0x10},
                                                 /* GbBIAS RSVD EXHCH EXHCL */
@@ -407,9 +389,9 @@ static const __u8 ov7660_sensor_init[][8] = {
         {0xd1, 0x21, 0x62, 0x00, 0x00, 0x50, 0x30, 0x10},
                                                 /* LCC1 LCC2 LCC3 LCC4 */
         {0xa1, 0x21, 0x66, 0x00, 0x00, 0x00, 0x00, 0x10}, /* LCC5 */
-        {0xd1, 0x21, 0x67, 0x80, 0x7a, 0x90, 0x80, 0x10},
+        {0xd1, 0x21, 0x67, 0x80, 0x7a, 0x90, 0x80, 0x10}, /* MANU */
         {0xa1, 0x21, 0x6b, 0x0a, 0x00, 0x00, 0x00, 0x10},
-                                        /* band gap reference [0..3] DBLV */
+                                        /* band gap reference [0:3] DBLV */
         {0xd1, 0x21, 0x6c, 0x30, 0x48, 0x80, 0x74, 0x10}, /* gamma curve */
         {0xd1, 0x21, 0x70, 0x64, 0x60, 0x5c, 0x58, 0x10}, /* gamma curve */
         {0xd1, 0x21, 0x74, 0x54, 0x4c, 0x40, 0x38, 0x10}, /* gamma curve */
@@ -419,37 +401,35 @@ static const __u8 ov7660_sensor_init[][8] = {
         {0xd1, 0x21, 0x84, 0x6e, 0x77, 0x87, 0x95, 0x10}, /* gamma curve */
         {0xc1, 0x21, 0x88, 0xaf, 0xc7, 0xdf, 0x00, 0x10}, /* gamma curve */
         {0xc1, 0x21, 0x8b, 0x99, 0x99, 0xcf, 0x00, 0x10}, /* reserved */
-        {0xb1, 0x21, 0x92, 0x00, 0x00, 0x00, 0x00, 0x10},
+        {0xb1, 0x21, 0x92, 0x00, 0x00, 0x00, 0x00, 0x10}, /* DM_LNL/H */
 /****** (some exchanges in the win trace) ******/
-        {0xa1, 0x21, 0x1e, 0x01, 0x00, 0x00, 0x00, 0x10},
+        {0xa1, 0x21, 0x1e, 0x01, 0x00, 0x00, 0x00, 0x10}, /* MVFP */
                                                 /* bits[3..0]reserved */
         {0xa1, 0x21, 0x1e, 0x01, 0x00, 0x00, 0x00, 0x10},
         {0xa1, 0x21, 0x03, 0x00, 0x00, 0x00, 0x00, 0x10},
                                                 /* VREF vertical frame ctrl */
         {0xa1, 0x21, 0x03, 0x00, 0x00, 0x00, 0x00, 0x10},
-        {0xa1, 0x21, 0x10, 0x20, 0x00, 0x00, 0x00, 0x10}, /* 0x20 */
-        {0xa1, 0x21, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x10},
-        {0xa1, 0x21, 0x2e, 0x00, 0x00, 0x00, 0x00, 0x10},
-/*      {0xa1, 0x21, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x10}, */
-        {0xa1, 0x21, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x10},
-        {0xb1, 0x21, 0x01, 0x78, 0x78, 0x00, 0x00, 0x10},
+        {0xa1, 0x21, 0x10, 0x20, 0x00, 0x00, 0x00, 0x10}, /* AECH 0x20 */
+        {0xa1, 0x21, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x10}, /* ADVFL */
+        {0xa1, 0x21, 0x2e, 0x00, 0x00, 0x00, 0x00, 0x10}, /* ADVFH */
+        {0xa1, 0x21, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x10}, /* GAIN */
+/*      {0xb1, 0x21, 0x01, 0x78, 0x78, 0x00, 0x00, 0x10}, * BLUE */
 /****** (some exchanges in the win trace) ******/
         {0xa1, 0x21, 0x93, 0x00, 0x00, 0x00, 0x00, 0x10},/* dummy line hight */
-        {0xa1, 0x21, 0x92, 0x25, 0x00, 0x00, 0x00, 0x10},/* dummy line low */
-        {0xa1, 0x21, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x10},
-        {0xa1, 0x21, 0x2b, 0x00, 0x00, 0x00, 0x00, 0x10},
-        {0xa1, 0x21, 0x02, 0x90, 0x00, 0x00, 0x00, 0x10},
+        {0xa1, 0x21, 0x92, 0x25, 0x00, 0x00, 0x00, 0x10}, /* dummy line low */
+        {0xa1, 0x21, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x10}, /* EXHCH */
+        {0xa1, 0x21, 0x2b, 0x00, 0x00, 0x00, 0x00, 0x10}, /* EXHCL */
+/*      {0xa1, 0x21, 0x02, 0x90, 0x00, 0x00, 0x00, 0x10},  * RED */
 /****** (some exchanges in the win trace) ******/
-/**********startsensor KO if changed !!****/
+/******!! startsensor KO if changed !!****/
         {0xa1, 0x21, 0x93, 0x01, 0x00, 0x00, 0x00, 0x10},
         {0xa1, 0x21, 0x92, 0xff, 0x00, 0x00, 0x00, 0x10},
         {0xa1, 0x21, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x10},
         {0xa1, 0x21, 0x2b, 0xc3, 0x00, 0x00, 0x00, 0x10},
-/* here may start the isoc exchanges */
         {}
 };
-/* reg0x04              reg0x07         reg 0x10 */
-/* expo  = (COM1 & 0x02) | (AECHH & 0x2f <<10) [ (AECh << 2) */
+/*        reg 0x04        reg 0x07                 reg 0x10 */
+/* expo = (COM1 & 0x02) | ((AECHH & 0x2f) << 10) | (AECh << 2) */
 
 static const __u8 ov7648_sensor_init[][8] = {
         {0xC1, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00},
@@ -680,13 +660,12 @@ static int configure_gpio(struct gspca_dev *gspca_dev,
         const __u8 *reg9a;
         static const __u8 reg9a_def[] =
                 {0x08, 0x40, 0x20, 0x10, 0x00, 0x04};
-        static const __u8 reg9a_sn9c120[] =             /* from win trace */
-                {0x00, 0x40, 0x38, 0x30, 0x00, 0x20};
         static const __u8 reg9a_sn9c325[] =
                 {0x0a, 0x40, 0x38, 0x30, 0x00, 0x20};
+        static const __u8 regd4[] = {0x60, 0x00, 0x00};
 
         reg_w1(gspca_dev, 0xf1, 0x00);
-        reg_w1(gspca_dev, 0x01, sn9c1xx[0]);    /*fixme:jfm was [1] en v1*/
+        reg_w1(gspca_dev, 0x01, 0x00);          /*jfm was sn9c1xx[1] in v1*/
 
         /* configure gpio */
         reg_w(gspca_dev, 0x01, &sn9c1xx[1], 2);
@@ -696,25 +675,17 @@ static int configure_gpio(struct gspca_dev *gspca_dev,
         case BRIDGE_SN9C325:
                 reg9a = reg9a_sn9c325;
                 break;
-        case BRIDGE_SN9C120:
-                reg9a = reg9a_sn9c120;
-                break;
         default:
                 reg9a = reg9a_def;
                 break;
         }
         reg_w(gspca_dev, 0x9a, reg9a, 6);
 
-        reg_w1(gspca_dev, 0xd4, 0x60);  /*fixme:jfm 60 00 00 (3) ? */
+        reg_w(gspca_dev, 0xd4, regd4, sizeof regd4); /*fixme:jfm was 60 only*/
 
         reg_w(gspca_dev, 0x03, &sn9c1xx[3], 0x0f);
 
         switch (sd->bridge) {
-        case BRIDGE_SN9C120:                    /* from win trace */
-                reg_w1(gspca_dev, 0x01, 0x61);
-                reg_w1(gspca_dev, 0x17, 0x20);
-                reg_w1(gspca_dev, 0x01, 0x60);
-                break;
         case BRIDGE_SN9C325:
                 reg_w1(gspca_dev, 0x01, 0x43);
                 reg_w1(gspca_dev, 0x17, 0xae);
@@ -810,6 +781,8 @@ static int sd_config(struct gspca_dev *gspca_dev,
         sd->contrast = CONTRAST_DEF;
         sd->colors = COLOR_DEF;
         sd->autogain = AUTOGAIN_DEF;
+        sd->ag_cnt = -1;
+
         return 0;
 }
 
@@ -823,10 +796,11 @@ static int sd_open(struct gspca_dev *gspca_dev)
 
         /* setup a selector by bridge */
         reg_w1(gspca_dev, 0xf1, 0x01);
-        reg_r(gspca_dev, 0x00, 1);              /* -> regF1 = 0x00 */
-        reg_w1(gspca_dev, 0xf1, gspca_dev->usb_buf[0]);
         reg_r(gspca_dev, 0x00, 1);
+        reg_w1(gspca_dev, 0xf1, gspca_dev->usb_buf[0]);
+        reg_r(gspca_dev, 0x00, 1);              /* get sonix chip id */
         regF1 = gspca_dev->usb_buf[0];
+        PDEBUG(D_PROBE, "Sonix chip id: %02x", regF1);
         switch (sd->bridge) {
         case BRIDGE_SN9C102P:
                 if (regF1 != 0x11)
@@ -937,15 +911,10 @@ static void setbrightness(struct gspca_dev *gspca_dev)
                 sd->exposure = setexposure(gspca_dev, expo);
                 break;
         case SENSOR_MI0360:
-                expo = sd->brightness >> 4;
-                sd->exposure = setexposure(gspca_dev, expo);
-                break;
         case SENSOR_MO4000:
                 expo = sd->brightness >> 4;
                 sd->exposure = setexposure(gspca_dev, expo);
                 break;
-        case SENSOR_OV7660:
-                return;                         /*jfm??*/
         }
 
         k2 = sd->brightness >> 10;
@@ -958,8 +927,6 @@ static void setcontrast(struct gspca_dev *gspca_dev)
         __u8 k2;
         __u8 contrast[] = { 0x00, 0x00, 0x28, 0x00, 0x07, 0x00 };
 
-        if (sd->sensor == SENSOR_OV7660)
-                return;                         /*jfm??*/
         k2 = sd->contrast;
         contrast[2] = k2;
         contrast[0] = (k2 + 1) >> 1;
@@ -981,20 +948,32 @@ static void setcolors(struct gspca_dev *gspca_dev)
         reg_w1(gspca_dev, 0x05, data);
 }
 
+static void setautogain(struct gspca_dev *gspca_dev)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+
+        switch (sd->sensor) {
+        case SENSOR_HV7131R:
+        case SENSOR_MO4000:
+        case SENSOR_MI0360:
+                if (sd->autogain)
+                        sd->ag_cnt = AG_CNT_START;
+                else
+                        sd->ag_cnt = -1;
+                break;
+        }
+}
+
 /* -- start the camera -- */
 static void sd_start(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
         int i;
-        __u8 data;
-        __u8 reg1;
-        __u8 reg17;
+        __u8 reg1, reg17, reg18;
         const __u8 *sn9c1xx;
         int mode;
         static const __u8 C0[] = { 0x2d, 0x2d, 0x3a, 0x05, 0x04, 0x3f };
         static const __u8 CA[] = { 0x28, 0xd8, 0x14, 0xec };
-        static const __u8 CA_sn9c120[] =
-                                 { 0x14, 0xec, 0x0a, 0xf6 };    /* SN9C120 */
         static const __u8 CE[] = { 0x32, 0xdd, 0x2d, 0xdd };    /* MI0360 */
         static const __u8 CE_sn9c325[] =
                         { 0x32, 0xdd, 0x32, 0xdd };     /* OV7648 - SN9C325 */
@@ -1002,9 +981,7 @@ static void sd_start(struct gspca_dev *gspca_dev)
         sn9c1xx = sn_tb[(int) sd->sensor];
         configure_gpio(gspca_dev, sn9c1xx);
 
-/*fixme:jfm this sequence should appear at end of sd_start */
-/* with
-        reg_w1(gspca_dev, 0x01, 0x44); */
+/*      reg_w1(gspca_dev, 0x01, 0x44);          jfm from win trace*/
         reg_w1(gspca_dev, 0x15, sn9c1xx[0x15]);
         reg_w1(gspca_dev, 0x16, sn9c1xx[0x16]);
         reg_w1(gspca_dev, 0x12, sn9c1xx[0x12]);
@@ -1016,20 +993,16 @@ static void sd_start(struct gspca_dev *gspca_dev)
         reg_w1(gspca_dev, 0xc7, 0x00);
         reg_w1(gspca_dev, 0xc8, 0x50);
         reg_w1(gspca_dev, 0xc9, 0x3c);
-/*fixme:jfm end of ending sequence */
         reg_w1(gspca_dev, 0x18, sn9c1xx[0x18]);
         switch (sd->bridge) {
         case BRIDGE_SN9C325:
-                data = 0xae;
-                break;
-        case BRIDGE_SN9C120:
-                data = 0xa0;
+                reg17 = 0xae;
                 break;
         default:
-                data = 0x60;
+                reg17 = 0x60;
                 break;
         }
-        reg_w1(gspca_dev, 0x17, data);
+        reg_w1(gspca_dev, 0x17, reg17);
         reg_w1(gspca_dev, 0x05, sn9c1xx[5]);
         reg_w1(gspca_dev, 0x07, sn9c1xx[7]);
         reg_w1(gspca_dev, 0x06, sn9c1xx[6]);
@@ -1044,20 +1017,6 @@ static void sd_start(struct gspca_dev *gspca_dev)
                 reg_w1(gspca_dev, 0x9a, 0x0a);
                 reg_w1(gspca_dev, 0x99, 0x60);
                 break;
-        case BRIDGE_SN9C120:
-                reg_w(gspca_dev, 0x20, regsn20_sn9c120,
-                                sizeof regsn20_sn9c120);
-                for (i = 0; i < 2; i++)
-                        reg_w(gspca_dev, 0x84, reg84_sn9c120_1,
-                                        sizeof reg84_sn9c120_1);
-                for (i = 0; i < 6; i++)
-                        reg_w(gspca_dev, 0x84, reg84_sn9c120_2,
-                                        sizeof reg84_sn9c120_2);
-                reg_w(gspca_dev, 0x84, reg84_sn9c120_3,
-                                sizeof reg84_sn9c120_3);
-                reg_w1(gspca_dev, 0x9a, 0x05);
-                reg_w1(gspca_dev, 0x99, 0x5b);
-                break;
         default:
                 reg_w(gspca_dev, 0x20, regsn20, sizeof regsn20);
                 for (i = 0; i < 8; i++)
@@ -1107,22 +1066,14 @@ static void sd_start(struct gspca_dev *gspca_dev)
 /*                      reg1 = 0x44; */
 /*                      reg1 = 0x46;    (done) */
                 } else {
-                        reg17 = 0xa2;   /* 640 */
-                        reg1 = 0x40;
+                        reg17 = 0x22;   /* 640 MCKSIZE */
+                        reg1 = 0x06;
                 }
                 break;
         }
         reg_w(gspca_dev, 0xc0, C0, 6);
+        reg_w(gspca_dev, 0xca, CA, 4);
         switch (sd->bridge) {
-        case BRIDGE_SN9C120:                    /*jfm ?? */
-                reg_w(gspca_dev, 0xca, CA_sn9c120, 4);
-                break;
-        default:
-                reg_w(gspca_dev, 0xca, CA, 4);
-                break;
-        }
-        switch (sd->bridge) {
-        case BRIDGE_SN9C120:                    /*jfm ?? */
         case BRIDGE_SN9C325:
                 reg_w(gspca_dev, 0xce, CE_sn9c325, 4);
                 break;
@@ -1133,19 +1084,19 @@ static void sd_start(struct gspca_dev *gspca_dev)
         }
 
         /* here change size mode 0 -> VGA; 1 -> CIF */
-        data = 0x40 | sn9c1xx[0x18] | (mode << 4);
-        reg_w1(gspca_dev, 0x18, data);
+        reg18 = sn9c1xx[0x18] | (mode << 4);
+        reg_w1(gspca_dev, 0x18, reg18 | 0x40);
 
         reg_w(gspca_dev, 0x100, qtable4, 0x40);
         reg_w(gspca_dev, 0x140, qtable4 + 0x40, 0x40);
 
-        data = sn9c1xx[0x18] | (mode << 4);
-        reg_w1(gspca_dev, 0x18, data);
+        reg_w1(gspca_dev, 0x18, reg18);
 
         reg_w1(gspca_dev, 0x17, reg17);
         reg_w1(gspca_dev, 0x01, reg1);
         setbrightness(gspca_dev);
         setcontrast(gspca_dev);
+        setautogain(gspca_dev);
 }
 
 static void sd_stopN(struct gspca_dev *gspca_dev)
@@ -1168,12 +1119,11 @@ static void sd_stopN(struct gspca_dev *gspca_dev)
                 i2c_w8(gspca_dev, stopmi0360);
                 data = 0x29;
                 break;
-        case SENSOR_MO4000:
-                break;
         case SENSOR_OV7648:
                 data = 0x29;
                 break;
         default:
+/*      case SENSOR_MO4000: */
 /*      case SENSOR_OV7660: */
                 break;
         }
@@ -1193,16 +1143,23 @@ static void sd_close(struct gspca_dev *gspca_dev)
 {
 }
 
-static void setautogain(struct gspca_dev *gspca_dev)
+static void do_autogain(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
-        /* Thanks S., without your advice, autobright should not work :) */
         int delta;
-        int expotimes = 0;
+        int expotimes;
         __u8 luma_mean = 130;
         __u8 luma_delta = 20;
 
-        delta = sd->avg_lum;
+        /* Thanks S., without your advice, autobright should not work :) */
+        if (sd->ag_cnt < 0)
+                return;
+        if (--sd->ag_cnt >= 0)
+                return;
+        sd->ag_cnt = AG_CNT_START;
+
+        delta = atomic_read(&sd->avg_lum);
+        PDEBUG(D_FRAM, "mean lum %d", delta);
         if (delta < luma_mean - luma_delta ||
             delta > luma_mean + luma_delta) {
                 switch (sd->sensor) {
@@ -1214,8 +1171,9 @@ static void setautogain(struct gspca_dev *gspca_dev)
                         sd->exposure = setexposure(gspca_dev,
                                         (unsigned int) (expotimes << 8));
                         break;
-                case SENSOR_MO4000:
-                case SENSOR_MI0360:
+                default:
+/*              case SENSOR_MO4000: */
+/*              case SENSOR_MI0360: */
                         expotimes = sd->exposure;
                         expotimes += (luma_mean - delta) >> 6;
                         if (expotimes < 0)
@@ -1228,6 +1186,8 @@ static void setautogain(struct gspca_dev *gspca_dev)
         }
 }
 
+/* scan the URB packets */
+/* This function is run at interrupt level. */
 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
                         struct gspca_frame *frame,      /* target */
                         __u8 *data,                     /* isoc packet */
@@ -1244,9 +1204,6 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
                                 frame, data, sof + 2);
                 if (sd->ag_cnt < 0)
                         return;
-                if (--sd->ag_cnt >= 0)
-                        return;
-                sd->ag_cnt = AG_CNT_START;
 /* w1 w2 w3 */
 /* w4 w5 w6 */
 /* w7 w8 */
@@ -1261,9 +1218,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
 /* w5 */
                 avg_lum += ((data[sof + 31] << 8) | data[sof + 32]) >> 4;
                 avg_lum >>= 4;
-                sd->avg_lum = avg_lum;
-                PDEBUG(D_PACK, "mean lum %d", avg_lum);
-                setautogain(gspca_dev);
+                atomic_set(&sd->avg_lum, avg_lum);
                 return;
         }
         if (gspca_dev->last_packet_type == LAST_PACKET) {
@@ -1300,6 +1255,7 @@ static unsigned int getexposure(struct gspca_dev *gspca_dev)
                         (hexpo << 10) | (mexpo << 2) | lexpo);
                 return (hexpo << 10) | (mexpo << 2) | lexpo;
         default:
+/*      case SENSOR_OV7648:             * jfm: is it ok for 7648? */
 /*      case SENSOR_OV7660: */
                 /* read sensor exposure */
                 i2c_r5(gspca_dev, 0x04);
@@ -1318,14 +1274,12 @@ static void getbrightness(struct gspca_dev *gspca_dev)
         /* hardcoded registers seem not readable */
         switch (sd->sensor) {
         case SENSOR_HV7131R:
-/*              sd->brightness = 0x7fff; */
                 sd->brightness = getexposure(gspca_dev) >> 4;
                 break;
         case SENSOR_MI0360:
                 sd->brightness = getexposure(gspca_dev) << 4;
                 break;
         case SENSOR_MO4000:
-/*              sd->brightness = 0x1fff; */
                 sd->brightness = getexposure(gspca_dev) << 4;
                 break;
         }
@@ -1391,10 +1345,8 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
         struct sd *sd = (struct sd *) gspca_dev;
 
         sd->autogain = val;
-        if (val)
-                sd->ag_cnt = AG_CNT_START;
-        else
-                sd->ag_cnt = -1;
+        if (gspca_dev->streaming)
+                setautogain(gspca_dev);
         return 0;
 }
 
@@ -1418,6 +1370,7 @@ static const struct sd_desc sd_desc = {
         .stop0 = sd_stop0,
         .close = sd_close,
         .pkt_scan = sd_pkt_scan,
+        .dq_callback = do_autogain,
 };
 
 /* -- module initialisation -- */
diff --git a/drivers/media/video/gspca/spca505.c b/drivers/media/video/gspca/spca505.c
index 3c2be80cbd65..eda29d609359 100644
--- a/drivers/media/video/gspca/spca505.c
+++ b/drivers/media/video/gspca/spca505.c
@@ -61,27 +61,27 @@ static struct ctrl sd_ctrls[] = {
 
 static struct v4l2_pix_format vga_mode[] = {
         {160, 120, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 160 * 3,
+                .bytesperline = 160,
                 .sizeimage = 160 * 120 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 5},
         {176, 144, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 176 * 3,
+                .bytesperline = 176,
                 .sizeimage = 176 * 144 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 4},
         {320, 240, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 320 * 3,
+                .bytesperline = 320,
                 .sizeimage = 320 * 240 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 2},
         {352, 288, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 352 * 3,
+                .bytesperline = 352,
                 .sizeimage = 352 * 288 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 1},
         {640, 480, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 640 * 3,
+                .bytesperline = 640,
                 .sizeimage = 640 * 480 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 0},
@@ -776,7 +776,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
         default:
                 data += 1;
                 len -= 1;
-                gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
+                gspca_frame_add(gspca_dev, INTER_PACKET, frame,
                                 data, len);
                 break;
         }
diff --git a/drivers/media/video/gspca/spca506.c b/drivers/media/video/gspca/spca506.c
index 6fe715c80ad2..f622fa75766d 100644
--- a/drivers/media/video/gspca/spca506.c
+++ b/drivers/media/video/gspca/spca506.c
@@ -112,27 +112,27 @@ static struct ctrl sd_ctrls[] = {
 
 static struct v4l2_pix_format vga_mode[] = {
         {160, 120, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 160 * 3,
+                .bytesperline = 160,
                 .sizeimage = 160 * 120 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 5},
         {176, 144, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 176 * 3,
+                .bytesperline = 176,
                 .sizeimage = 176 * 144 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 4},
         {320, 240, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 320 * 3,
+                .bytesperline = 320,
                 .sizeimage = 320 * 240 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 2},
         {352, 288, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 352 * 3,
+                .bytesperline = 352,
                 .sizeimage = 352 * 288 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 1},
         {640, 480, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
-                .bytesperline = 640 * 3,
+                .bytesperline = 640,
                 .sizeimage = 640 * 480 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 0},
@@ -588,7 +588,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
         default:
                 data += 1;
                 len -= 1;
-                gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
+                gspca_frame_add(gspca_dev, INTER_PACKET, frame,
                                 data, len);
                 break;
         }
diff --git a/drivers/media/video/gspca/spca508.c b/drivers/media/video/gspca/spca508.c
index b608a27ad115..699340c17dea 100644
--- a/drivers/media/video/gspca/spca508.c
+++ b/drivers/media/video/gspca/spca508.c
@@ -63,23 +63,23 @@ static struct ctrl sd_ctrls[] = {
 };
 
 static struct v4l2_pix_format sif_mode[] = {
-        {160, 120, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
-                .bytesperline = 160 * 3,
+        {160, 120, V4L2_PIX_FMT_SPCA508, V4L2_FIELD_NONE,
+                .bytesperline = 160,
                 .sizeimage = 160 * 120 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 3},
-        {176, 144, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
-                .bytesperline = 176 * 3,
+        {176, 144, V4L2_PIX_FMT_SPCA508, V4L2_FIELD_NONE,
+                .bytesperline = 176,
                 .sizeimage = 176 * 144 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 2},
-        {320, 240, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
-                .bytesperline = 320 * 3,
+        {320, 240, V4L2_PIX_FMT_SPCA508, V4L2_FIELD_NONE,
+                .bytesperline = 320,
                 .sizeimage = 320 * 240 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 1},
-        {352, 288, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
-                .bytesperline = 352 * 3,
+        {352, 288, V4L2_PIX_FMT_SPCA508, V4L2_FIELD_NONE,
+                .bytesperline = 352,
                 .sizeimage = 352 * 288 * 3 / 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 0},
@@ -1583,7 +1583,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
         default:
                 data += 1;
                 len -= 1;
-                gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
+                gspca_frame_add(gspca_dev, INTER_PACKET, frame,
                                 data, len);
                 break;
         }
diff --git a/drivers/media/video/gspca/spca561.c b/drivers/media/video/gspca/spca561.c
index a26174508cb9..1073ac3d2ec6 100644
--- a/drivers/media/video/gspca/spca561.c
+++ b/drivers/media/video/gspca/spca561.c
@@ -644,6 +644,18 @@ static void setcontrast(struct gspca_dev *gspca_dev)
         }
 }
 
+static void setautogain(struct gspca_dev *gspca_dev)
+{
+        struct sd *sd = (struct sd *) gspca_dev;
+
+        if (sd->chip_revision == Rev072A) {
+                if (sd->autogain)
+                        sd->ag_cnt = AG_CNT_START;
+                else
+                        sd->ag_cnt = -1;
+        }
+}
+
 static void sd_start(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
@@ -671,6 +683,7 @@ static void sd_start(struct gspca_dev *gspca_dev)
                 reg_w_val(dev, 0x8500, mode);   /* mode */
                 reg_w_val(dev, 0x8700, Clck);   /* 0x27 clock */
                 reg_w_val(dev, 0x8112, 0x10 | 0x20);
+                setautogain(gspca_dev);
                 break;
         default:
 /*      case Rev012A: */
@@ -720,18 +733,24 @@ static void sd_close(struct gspca_dev *gspca_dev)
         reg_w_val(gspca_dev->dev, 0x8114, 0);
 }
 
-static void setautogain(struct gspca_dev *gspca_dev)
+static void do_autogain(struct gspca_dev *gspca_dev)
 {
         struct sd *sd = (struct sd *) gspca_dev;
-        int expotimes = 0;
-        int pixelclk = 0;
-        int gainG = 0;
+        int expotimes;
+        int pixelclk;
+        int gainG;
         __u8 R, Gr, Gb, B;
         int y;
         __u8 luma_mean = 110;
         __u8 luma_delta = 20;
         __u8 spring = 4;
 
+        if (sd->ag_cnt < 0)
+                return;
+        if (--sd->ag_cnt >= 0)
+                return;
+        sd->ag_cnt = AG_CNT_START;
+
         switch (sd->chip_revision) {
         case Rev072A:
                 reg_r(gspca_dev, 0x8621, 1);
@@ -795,18 +814,10 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
                         __u8 *data,             /* isoc packet */
                         int len)                /* iso packet length */
 {
-        struct sd *sd = (struct sd *) gspca_dev;
-
         switch (data[0]) {
         case 0:         /* start of frame */
                 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame,
                                         data, 0);
-                if (sd->ag_cnt >= 0) {
-                        if (--sd->ag_cnt < 0) {
-                                sd->ag_cnt = AG_CNT_START;
-                                setautogain(gspca_dev);
-                        }
-                }
                 data += SPCA561_OFFSET_DATA;
                 len -= SPCA561_OFFSET_DATA;
                 if (data[1] & 0x10) {
@@ -944,10 +955,8 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
         struct sd *sd = (struct sd *) gspca_dev;
 
         sd->autogain = val;
-        if (val)
-                sd->ag_cnt = AG_CNT_START;
-        else
-                sd->ag_cnt = -1;
+        if (gspca_dev->streaming)
+                setautogain(gspca_dev);
         return 0;
 }
 
@@ -971,6 +980,7 @@ static const struct sd_desc sd_desc = {
         .stop0 = sd_stop0,
         .close = sd_close,
         .pkt_scan = sd_pkt_scan,
+        .dq_callback = do_autogain,
 };
 
 /* -- module initialisation -- */
diff --git a/drivers/media/video/gspca/vc032x.c b/drivers/media/video/gspca/vc032x.c
index a4221753e1bf..f4a52956e0d9 100644
--- a/drivers/media/video/gspca/vc032x.c
+++ b/drivers/media/video/gspca/vc032x.c
@@ -88,12 +88,12 @@ static struct ctrl sd_ctrls[] = {
 
 static struct v4l2_pix_format vc0321_mode[] = {
         {320, 240, V4L2_PIX_FMT_YUV420, V4L2_FIELD_NONE,
-                .bytesperline = 320 * 2,
+                .bytesperline = 320,
                 .sizeimage = 320 * 240 * 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 1},
         {640, 480, V4L2_PIX_FMT_YUV420, V4L2_FIELD_NONE,
-                .bytesperline = 640 * 2,
+                .bytesperline = 640,
                 .sizeimage = 640 * 480 * 2,
                 .colorspace = V4L2_COLORSPACE_SRGB,
                 .priv = 0},
diff --git a/drivers/media/video/gspca/zc3xx.c b/drivers/media/video/gspca/zc3xx.c
index 22a994ccb1d5..bc7d0eedcd81 100644
--- a/drivers/media/video/gspca/zc3xx.c
+++ b/drivers/media/video/gspca/zc3xx.c
@@ -6469,7 +6469,7 @@ static void setcontrast(struct gspca_dev *gspca_dev)
                 NULL, Tgradient_1, Tgradient_2,
                 Tgradient_3, Tgradient_4, Tgradient_5, Tgradient_6
         };
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
         __u8 v[16];
 #endif
 
@@ -6487,7 +6487,7 @@ static void setcontrast(struct gspca_dev *gspca_dev)
                 else if (g <= 0)
                         g = 1;
                 reg_w(dev, g, 0x0120 + i);      /* gamma */
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
                 if (gspca_debug & D_CONF)
                         v[i] = g;
 #endif
@@ -6507,7 +6507,7 @@ static void setcontrast(struct gspca_dev *gspca_dev)
                                 g = 1;
                 }
                 reg_w(dev, g, 0x0130 + i);      /* gradient */
-#ifdef CONFIG_VIDEO_ADV_DEBUG
+#ifdef GSPCA_DEBUG
                 if (gspca_debug & D_CONF)
                         v[i] = g;
 #endif
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c
index b15f82c49766..388cf94055d3 100644
--- a/drivers/media/video/pxa_camera.c
+++ b/drivers/media/video/pxa_camera.c
@@ -36,8 +36,8 @@
 #include <linux/videodev2.h>
 
 #include <asm/dma.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/camera.h>
+#include <mach/pxa-regs.h>
+#include <mach/camera.h>
 
 #define PXA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5)
 #define PXA_CAM_DRV_NAME "pxa27x-camera"
@@ -128,6 +128,8 @@ struct pxa_camera_dev {
 
         struct pxa_buffer       *active;
         struct pxa_dma_desc     *sg_tail[3];
+
+        u32                     save_cicr[5];
 };
 
 static const char *pxa_cam_driver_description = "PXA_Camera";
@@ -997,10 +999,64 @@ static int pxa_camera_querycap(struct soc_camera_host *ici,
         return 0;
 }
 
+static int pxa_camera_suspend(struct soc_camera_device *icd, pm_message_t state)
+{
+        struct soc_camera_host *ici =
+                to_soc_camera_host(icd->dev.parent);
+        struct pxa_camera_dev *pcdev = ici->priv;
+        int i = 0, ret = 0;
+
+        pcdev->save_cicr[i++] = CICR0;
+        pcdev->save_cicr[i++] = CICR1;
+        pcdev->save_cicr[i++] = CICR2;
+        pcdev->save_cicr[i++] = CICR3;
+        pcdev->save_cicr[i++] = CICR4;
+
+        if ((pcdev->icd) && (pcdev->icd->ops->suspend))
+                ret = pcdev->icd->ops->suspend(pcdev->icd, state);
+
+        return ret;
+}
+
+static int pxa_camera_resume(struct soc_camera_device *icd)
+{
+        struct soc_camera_host *ici =
+                to_soc_camera_host(icd->dev.parent);
+        struct pxa_camera_dev *pcdev = ici->priv;
+        int i = 0, ret = 0;
+
+        DRCMR68 = pcdev->dma_chans[0] | DRCMR_MAPVLD;
+        DRCMR69 = pcdev->dma_chans[1] | DRCMR_MAPVLD;
+        DRCMR70 = pcdev->dma_chans[2] | DRCMR_MAPVLD;
+
+        CICR0 = pcdev->save_cicr[i++] & ~CICR0_ENB;
+        CICR1 = pcdev->save_cicr[i++];
+        CICR2 = pcdev->save_cicr[i++];
+        CICR3 = pcdev->save_cicr[i++];
+        CICR4 = pcdev->save_cicr[i++];
+
+        if ((pcdev->icd) && (pcdev->icd->ops->resume))
+                ret = pcdev->icd->ops->resume(pcdev->icd);
+
+        /* Restart frame capture if active buffer exists */
+        if (!ret && pcdev->active) {
+                /* Reset the FIFOs */
+                CIFR |= CIFR_RESET_F;
+                /* Enable End-Of-Frame Interrupt */
+                CICR0 &= ~CICR0_EOFM;
+                /* Restart the Capture Interface */
+                CICR0 |= CICR0_ENB;
+        }
+
+        return ret;
+}
+
 static struct soc_camera_host_ops pxa_soc_camera_host_ops = {
         .owner          = THIS_MODULE,
         .add            = pxa_camera_add_device,
         .remove         = pxa_camera_remove_device,
+        .suspend        = pxa_camera_suspend,
+        .resume         = pxa_camera_resume,
         .set_fmt_cap    = pxa_camera_set_fmt_cap,
         .try_fmt_cap    = pxa_camera_try_fmt_cap,
         .init_videobuf  = pxa_camera_init_videobuf,
@@ -1198,7 +1254,7 @@ static int __devinit pxa_camera_init(void)
 
 static void __exit pxa_camera_exit(void)
 {
-        return platform_driver_unregister(&pxa_camera_driver);
+        platform_driver_unregister(&pxa_camera_driver);
 }
 
 module_init(pxa_camera_init);
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index f7ca3cb9340a..318754e73132 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -647,7 +647,7 @@ static int __init sh_mobile_ceu_init(void)
 
 static void __exit sh_mobile_ceu_exit(void)
 {
-        return platform_driver_unregister(&sh_mobile_ceu_driver);
+        platform_driver_unregister(&sh_mobile_ceu_driver);
 }
 
 module_init(sh_mobile_ceu_init);
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
index b6be5ee678b6..66ebe5956a87 100644
--- a/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@ -732,10 +732,36 @@ static int soc_camera_remove(struct device *dev)
         return 0;
 }
 
+static int soc_camera_suspend(struct device *dev, pm_message_t state)
+{
+        struct soc_camera_device *icd = to_soc_camera_dev(dev);
+        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+        int ret = 0;
+
+        if (ici->ops->suspend)
+                ret = ici->ops->suspend(icd, state);
+
+        return ret;
+}
+
+static int soc_camera_resume(struct device *dev)
+{
+        struct soc_camera_device *icd = to_soc_camera_dev(dev);
+        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+        int ret = 0;
+
+        if (ici->ops->resume)
+                ret = ici->ops->resume(icd);
+
+        return ret;
+}
+
 static struct bus_type soc_camera_bus_type = {
         .name           = "soc-camera",
         .probe          = soc_camera_probe,
         .remove         = soc_camera_remove,
+        .suspend        = soc_camera_suspend,
+        .resume         = soc_camera_resume,
 };
 
 static struct device_driver ic_drv = {
diff --git a/drivers/media/video/soc_camera_platform.c b/drivers/media/video/soc_camera_platform.c
index eefb0327ebb6..1adc257ebdb9 100644
--- a/drivers/media/video/soc_camera_platform.c
+++ b/drivers/media/video/soc_camera_platform.c
@@ -187,7 +187,7 @@ static int __init soc_camera_platform_module_init(void)
 
 static void __exit soc_camera_platform_module_exit(void)
 {
-        return platform_driver_unregister(&soc_camera_platform_driver);
+        platform_driver_unregister(&soc_camera_platform_driver);
 }
 
 module_init(soc_camera_platform_module_init);
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c
index 626f4ad7e876..6ef3e5297de8 100644
--- a/drivers/media/video/uvc/uvc_ctrl.c
+++ b/drivers/media/video/uvc/uvc_ctrl.c
@@ -585,13 +585,17 @@ int uvc_query_v4l2_ctrl(struct uvc_video_device *video,
         struct uvc_control_mapping *mapping;
         struct uvc_menu_info *menu;
         unsigned int i;
-        __u8 data[8];
+        __u8 *data;
         int ret;
 
         ctrl = uvc_find_control(video, v4l2_ctrl->id, &mapping);
         if (ctrl == NULL)
                 return -EINVAL;
 
+        data = kmalloc(8, GFP_KERNEL);
+        if (data == NULL)
+                return -ENOMEM;
+
         memset(v4l2_ctrl, 0, sizeof *v4l2_ctrl);
         v4l2_ctrl->id = mapping->id;
         v4l2_ctrl->type = mapping->v4l2_type;
@@ -604,8 +608,8 @@ int uvc_query_v4l2_ctrl(struct uvc_video_device *video,
         if (ctrl->info->flags & UVC_CONTROL_GET_DEF) {
                 if ((ret = uvc_query_ctrl(video->dev, GET_DEF, ctrl->entity->id,
                                 video->dev->intfnum, ctrl->info->selector,
-                                &data, ctrl->info->size)) < 0)
-                        return ret;
+                                data, ctrl->info->size)) < 0)
+                        goto out;
                 v4l2_ctrl->default_value = uvc_get_le_value(data, mapping);
         }
 
@@ -623,13 +627,15 @@ int uvc_query_v4l2_ctrl(struct uvc_video_device *video,
                         }
                 }
 
-                return 0;
+                ret = 0;
+                goto out;
 
         case V4L2_CTRL_TYPE_BOOLEAN:
                 v4l2_ctrl->minimum = 0;
                 v4l2_ctrl->maximum = 1;
                 v4l2_ctrl->step = 1;
-                return 0;
+                ret = 0;
+                goto out;
 
         default:
                 break;
@@ -638,26 +644,29 @@ int uvc_query_v4l2_ctrl(struct uvc_video_device *video,
         if (ctrl->info->flags & UVC_CONTROL_GET_MIN) {
                 if ((ret = uvc_query_ctrl(video->dev, GET_MIN, ctrl->entity->id,
                                 video->dev->intfnum, ctrl->info->selector,
-                                &data, ctrl->info->size)) < 0)
-                        return ret;
+                                data, ctrl->info->size)) < 0)
+                        goto out;
                 v4l2_ctrl->minimum = uvc_get_le_value(data, mapping);
         }
         if (ctrl->info->flags & UVC_CONTROL_GET_MAX) {
                 if ((ret = uvc_query_ctrl(video->dev, GET_MAX, ctrl->entity->id,
                                 video->dev->intfnum, ctrl->info->selector,
-                                &data, ctrl->info->size)) < 0)
-                        return ret;
+                                data, ctrl->info->size)) < 0)
+                        goto out;
                 v4l2_ctrl->maximum = uvc_get_le_value(data, mapping);
         }
         if (ctrl->info->flags & UVC_CONTROL_GET_RES) {
                 if ((ret = uvc_query_ctrl(video->dev, GET_RES, ctrl->entity->id,
                                 video->dev->intfnum, ctrl->info->selector,
-                                &data, ctrl->info->size)) < 0)
-                        return ret;
+                                data, ctrl->info->size)) < 0)
+                        goto out;
                 v4l2_ctrl->step = uvc_get_le_value(data, mapping);
         }
 
-        return 0;
+        ret = 0;
+out:
+        kfree(data);
+        return ret;
 }
 
 
diff --git a/drivers/media/video/uvc/uvc_driver.c b/drivers/media/video/uvc/uvc_driver.c
index b3c4d75e8490..7e102034d38d 100644
--- a/drivers/media/video/uvc/uvc_driver.c
+++ b/drivers/media/video/uvc/uvc_driver.c
@@ -1884,7 +1884,7 @@ static struct usb_device_id uvc_ids[] = {
           .bInterfaceSubClass   = 1,
           .bInterfaceProtocol   = 0,
           .driver_info          = UVC_QUIRK_PROBE_MINMAX },
-        /* Packard Bell OEM Webcam */
+        /* Packard Bell OEM Webcam - Bison Electronics */
         { .match_flags          = USB_DEVICE_ID_MATCH_DEVICE
                                 | USB_DEVICE_ID_MATCH_INT_INFO,
           .idVendor             = 0x5986,
@@ -1893,7 +1893,7 @@ static struct usb_device_id uvc_ids[] = {
           .bInterfaceSubClass   = 1,
           .bInterfaceProtocol   = 0,
           .driver_info          = UVC_QUIRK_PROBE_MINMAX },
-        /* Acer Crystal Eye webcam */
+        /* Acer Crystal Eye webcam - Bison Electronics */
         { .match_flags          = USB_DEVICE_ID_MATCH_DEVICE
                                 | USB_DEVICE_ID_MATCH_INT_INFO,
           .idVendor             = 0x5986,
@@ -1902,7 +1902,7 @@ static struct usb_device_id uvc_ids[] = {
           .bInterfaceSubClass   = 1,
           .bInterfaceProtocol   = 0,
           .driver_info          = UVC_QUIRK_PROBE_MINMAX },
-        /* Medion Akoya Mini E1210 */
+        /* Medion Akoya Mini E1210 - Bison Electronics */
         { .match_flags          = USB_DEVICE_ID_MATCH_DEVICE
                                 | USB_DEVICE_ID_MATCH_INT_INFO,
           .idVendor             = 0x5986,
@@ -1911,7 +1911,7 @@ static struct usb_device_id uvc_ids[] = {
           .bInterfaceSubClass   = 1,
           .bInterfaceProtocol   = 0,
           .driver_info          = UVC_QUIRK_PROBE_MINMAX },
-        /* Acer OrbiCam - Unknown vendor */
+        /* Acer OrbiCam - Bison Electronics */
         { .match_flags          = USB_DEVICE_ID_MATCH_DEVICE
                                 | USB_DEVICE_ID_MATCH_INT_INFO,
           .idVendor             = 0x5986,
@@ -1920,6 +1920,24 @@ static struct usb_device_id uvc_ids[] = {
           .bInterfaceSubClass   = 1,
           .bInterfaceProtocol   = 0,
           .driver_info          = UVC_QUIRK_PROBE_MINMAX },
+        /* Bison Electronics */
+        { .match_flags          = USB_DEVICE_ID_MATCH_DEVICE
+                                | USB_DEVICE_ID_MATCH_INT_INFO,
+          .idVendor             = 0x5986,
+          .idProduct            = 0x0300,
+          .bInterfaceClass      = USB_CLASS_VIDEO,
+          .bInterfaceSubClass   = 1,
+          .bInterfaceProtocol   = 0,
+          .driver_info          = UVC_QUIRK_PROBE_MINMAX },
+        /* Clevo M570TU - Bison Electronics */
+        { .match_flags          = USB_DEVICE_ID_MATCH_DEVICE
+                                | USB_DEVICE_ID_MATCH_INT_INFO,
+          .idVendor             = 0x5986,
+          .idProduct            = 0x0303,
+          .bInterfaceClass      = USB_CLASS_VIDEO,
+          .bInterfaceSubClass   = 1,
+          .bInterfaceProtocol   = 0,
+          .driver_info          = UVC_QUIRK_PROBE_MINMAX },
         /* Generic USB Video Class */
         { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, 0) },
         {}
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index ad63794fda77..6854ac78a161 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -90,17 +90,20 @@ static void uvc_fixup_buffer_size(struct uvc_video_device *video,
 static int uvc_get_video_ctrl(struct uvc_video_device *video,
         struct uvc_streaming_control *ctrl, int probe, __u8 query)
 {
-        __u8 data[34];
-        __u8 size;
+        __u8 *data;
+        __u16 size;
         int ret;
 
         size = video->dev->uvc_version >= 0x0110 ? 34 : 26;
+        data = kmalloc(size, GFP_KERNEL);
+        if (data == NULL)
+                return -ENOMEM;
+
         ret = __uvc_query_ctrl(video->dev, query, 0, video->streaming->intfnum,
-                probe ? VS_PROBE_CONTROL : VS_COMMIT_CONTROL, &data, size,
+                probe ? VS_PROBE_CONTROL : VS_COMMIT_CONTROL, data, size,
                 UVC_CTRL_STREAMING_TIMEOUT);
-
         if (ret < 0)
-                return ret;
+                goto out;
 
         ctrl->bmHint = le16_to_cpup((__le16 *)&data[0]);
         ctrl->bFormatIndex = data[2];
@@ -136,17 +139,22 @@ static int uvc_get_video_ctrl(struct uvc_video_device *video,
          */
         uvc_fixup_buffer_size(video, ctrl);
 
-        return 0;
+out:
+        kfree(data);
+        return ret;
 }
 
 int uvc_set_video_ctrl(struct uvc_video_device *video,
         struct uvc_streaming_control *ctrl, int probe)
 {
-        __u8 data[34];
-        __u8 size;
+        __u8 *data;
+        __u16 size;
+        int ret;
 
         size = video->dev->uvc_version >= 0x0110 ? 34 : 26;
-        memset(data, 0, sizeof data);
+        data = kzalloc(size, GFP_KERNEL);
+        if (data == NULL)
+                return -ENOMEM;
 
         *(__le16 *)&data[0] = cpu_to_le16(ctrl->bmHint);
         data[2] = ctrl->bFormatIndex;
@@ -174,10 +182,13 @@ int uvc_set_video_ctrl(struct uvc_video_device *video,
                 data[33] = ctrl->bMaxVersion;
         }
 
-        return __uvc_query_ctrl(video->dev, SET_CUR, 0,
+        ret = __uvc_query_ctrl(video->dev, SET_CUR, 0,
                 video->streaming->intfnum,
-                probe ? VS_PROBE_CONTROL : VS_COMMIT_CONTROL, &data, size,
+                probe ? VS_PROBE_CONTROL : VS_COMMIT_CONTROL, data, size,
                 UVC_CTRL_STREAMING_TIMEOUT);
+
+        kfree(data);
+        return ret;
 }
 
 int uvc_probe_video(struct uvc_video_device *video,
diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c
index 556615fe93de..6f36006aecda 100644
--- a/drivers/media/video/v4l2-dev.c
+++ b/drivers/media/video/v4l2-dev.c
@@ -222,11 +222,13 @@ int video_register_device(struct video_device *vfd, int type, int nr)
 EXPORT_SYMBOL(video_register_device);
 
 /**
- *      video_register_device - register video4linux devices
+ *      video_register_device_index - register video4linux devices
  *      @vfd:  video device structure we want to register
  *      @type: type of device to register
  *      @nr:   which device number (0 == /dev/video0, 1 == /dev/video1, ...
  *             -1 == first free)
+ *      @index: stream number based on parent device;
+ *              -1 if auto assign, requested number otherwise
  *
  *      The registration code assigns minor numbers based on the type
  *      requested. -ENFILE is returned in all the device slots for this
diff --git a/drivers/media/video/vino.c b/drivers/media/video/vino.c
index ef7572cbc4ab..1edda456fc64 100644
--- a/drivers/media/video/vino.c
+++ b/drivers/media/video/vino.c
@@ -41,6 +41,7 @@
 #include <linux/videodev2.h>
 #include <media/v4l2-ioctl.h>
 #include <media/v4l2-common.h>
+#include <media/v4l2-ioctl.h>
 #include <linux/video_decoder.h>
 #include <linux/mutex.h>
 
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 883e7ea31de2..10c44d3fe01a 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -50,10 +50,31 @@ config HTC_PASIC3
           HTC Magician devices, respectively. Actual functionality is
           handled by the leds-pasic3 and ds1wm drivers.
 
+config MFD_TMIO
+        bool
+        default n
+
+config MFD_T7L66XB
+        bool "Support Toshiba T7L66XB"
+        depends on ARM
+        select MFD_CORE
+        select MFD_TMIO
+        help
+          Support for Toshiba Mobile IO Controller T7L66XB
+
+config MFD_TC6387XB
+        bool "Support Toshiba TC6387XB"
+        depends on ARM
+        select MFD_CORE
+        select MFD_TMIO
+        help
+          Support for Toshiba Mobile IO Controller TC6387XB
+
 config MFD_TC6393XB
         bool "Support Toshiba TC6393XB"
         depends on GPIOLIB && ARM
         select MFD_CORE
+        select MFD_TMIO
         help
           Support for Toshiba Mobile IO Controller TC6393XB
 
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 33daa2f45dd8..03ad239ecef0 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -8,6 +8,8 @@ obj-$(CONFIG_MFD_ASIC3)		+= asic3.o
 obj-$(CONFIG_HTC_EGPIO)         += htc-egpio.o
 obj-$(CONFIG_HTC_PASIC3)        += htc-pasic3.o
 
+obj-$(CONFIG_MFD_T7L66XB)       += t7l66xb.o
+obj-$(CONFIG_MFD_TC6387XB)      += tc6387xb.o
 obj-$(CONFIG_MFD_TC6393XB)      += tc6393xb.o
 
 obj-$(CONFIG_MFD_CORE)          += mfd-core.o
diff --git a/drivers/mfd/mcp-sa11x0.c b/drivers/mfd/mcp-sa11x0.c
index b5272b5ce3fa..28380b20bc70 100644
--- a/drivers/mfd/mcp-sa11x0.c
+++ b/drivers/mfd/mcp-sa11x0.c
@@ -21,12 +21,12 @@
 #include <linux/platform_device.h>
 
 #include <asm/dma.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/system.h>
-#include <asm/arch/mcp.h>
+#include <mach/mcp.h>
 
-#include <asm/arch/assabet.h>
+#include <mach/assabet.h>
 
 #include "mcp.h"
 
diff --git a/drivers/mfd/t7l66xb.c b/drivers/mfd/t7l66xb.c
new file mode 100644
index 000000000000..49a0fffc02af
--- /dev/null
+++ b/drivers/mfd/t7l66xb.c
@@ -0,0 +1,419 @@
+/*
+ *
+ * Toshiba T7L66XB core mfd support
+ *
+ * Copyright (c) 2005, 2007, 2008 Ian Molton
+ * Copyright (c) 2008 Dmitry Baryshkov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * T7L66 features:
+ *
+ * Supported in this driver:
+ * SD/MMC
+ * SM/NAND flash controller
+ *
+ * As yet not supported
+ * GPIO interface (on NAND pins)
+ * Serial interface
+ * TFT 'interface converter'
+ * PCMCIA interface logic
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/tmio.h>
+#include <linux/mfd/t7l66xb.h>
+
+enum {
+        T7L66XB_CELL_NAND,
+        T7L66XB_CELL_MMC,
+};
+
+#define SCR_REVID       0x08            /* b Revision ID        */
+#define SCR_IMR         0x42            /* b Interrupt Mask     */
+#define SCR_DEV_CTL     0xe0            /* b Device control     */
+#define SCR_ISR         0xe1            /* b Interrupt Status   */
+#define SCR_GPO_OC      0xf0            /* b GPO output control */
+#define SCR_GPO_OS      0xf1            /* b GPO output enable  */
+#define SCR_GPI_S       0xf2            /* w GPI status         */
+#define SCR_APDC        0xf8            /* b Active pullup down ctrl */
+
+#define SCR_DEV_CTL_USB         BIT(0)  /* USB enable           */
+#define SCR_DEV_CTL_MMC         BIT(1)  /* MMC enable           */
+
+/*--------------------------------------------------------------------------*/
+
+struct t7l66xb {
+        void __iomem            *scr;
+        /* Lock to protect registers requiring read/modify/write ops. */
+        spinlock_t              lock;
+
+        struct resource         rscr;
+        int                     irq;
+        int                     irq_base;
+};
+
+/*--------------------------------------------------------------------------*/
+
+static int t7l66xb_mmc_enable(struct platform_device *mmc)
+{
+        struct platform_device *dev = to_platform_device(mmc->dev.parent);
+        struct t7l66xb_platform_data   *pdata = dev->dev.platform_data;
+        struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
+        unsigned long flags;
+        u8 dev_ctl;
+
+        if (pdata->enable_clk32k)
+                pdata->enable_clk32k(dev);
+
+        spin_lock_irqsave(&t7l66xb->lock, flags);
+
+        dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
+        dev_ctl |= SCR_DEV_CTL_MMC;
+        tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
+
+        spin_unlock_irqrestore(&t7l66xb->lock, flags);
+
+        return 0;
+}
+
+static int t7l66xb_mmc_disable(struct platform_device *mmc)
+{
+        struct platform_device *dev = to_platform_device(mmc->dev.parent);
+        struct t7l66xb_platform_data   *pdata = dev->dev.platform_data;
+        struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
+        unsigned long flags;
+        u8 dev_ctl;
+
+        spin_lock_irqsave(&t7l66xb->lock, flags);
+
+        dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
+        dev_ctl &= ~SCR_DEV_CTL_MMC;
+        tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
+
+        spin_unlock_irqrestore(&t7l66xb->lock, flags);
+
+        if (pdata->disable_clk32k)
+                pdata->disable_clk32k(dev);
+
+        return 0;
+}
+
+/*--------------------------------------------------------------------------*/
+
+const static struct resource t7l66xb_mmc_resources[] = {
+        {
+                .start = 0x800,
+                .end    = 0x9ff,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = 0x200,
+                .end    = 0x2ff,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_T7L66XB_MMC,
+                .end    = IRQ_T7L66XB_MMC,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+const static struct resource t7l66xb_nand_resources[] = {
+        {
+                .start  = 0xc00,
+                .end    = 0xc07,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = 0x0100,
+                .end    = 0x01ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = IRQ_T7L66XB_NAND,
+                .end    = IRQ_T7L66XB_NAND,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct mfd_cell t7l66xb_cells[] = {
+        [T7L66XB_CELL_MMC] = {
+                .name = "tmio-mmc",
+                .enable = t7l66xb_mmc_enable,
+                .disable = t7l66xb_mmc_disable,
+                .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources),
+                .resources = t7l66xb_mmc_resources,
+        },
+        [T7L66XB_CELL_NAND] = {
+                .name = "tmio-nand",
+                .num_resources = ARRAY_SIZE(t7l66xb_nand_resources),
+                .resources = t7l66xb_nand_resources,
+        },
+};
+
+/*--------------------------------------------------------------------------*/
+
+/* Handle the T7L66XB interrupt mux */
+static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc)
+{
+        struct t7l66xb *t7l66xb = get_irq_data(irq);
+        unsigned int isr;
+        unsigned int i, irq_base;
+
+        irq_base = t7l66xb->irq_base;
+
+        while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) &
+                                ~tmio_ioread8(t7l66xb->scr + SCR_IMR)))
+                for (i = 0; i < T7L66XB_NR_IRQS; i++)
+                        if (isr & (1 << i))
+                                generic_handle_irq(irq_base + i);
+}
+
+static void t7l66xb_irq_mask(unsigned int irq)
+{
+        struct t7l66xb *t7l66xb = get_irq_chip_data(irq);
+        unsigned long                   flags;
+        u8 imr;
+
+        spin_lock_irqsave(&t7l66xb->lock, flags);
+        imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
+        imr |= 1 << (irq - t7l66xb->irq_base);
+        tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
+        spin_unlock_irqrestore(&t7l66xb->lock, flags);
+}
+
+static void t7l66xb_irq_unmask(unsigned int irq)
+{
+        struct t7l66xb *t7l66xb = get_irq_chip_data(irq);
+        unsigned long flags;
+        u8 imr;
+
+        spin_lock_irqsave(&t7l66xb->lock, flags);
+        imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
+        imr &= ~(1 << (irq - t7l66xb->irq_base));
+        tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
+        spin_unlock_irqrestore(&t7l66xb->lock, flags);
+}
+
+static struct irq_chip t7l66xb_chip = {
+        .name   = "t7l66xb",
+        .ack    = t7l66xb_irq_mask,
+        .mask   = t7l66xb_irq_mask,
+        .unmask = t7l66xb_irq_unmask,
+};
+
+/*--------------------------------------------------------------------------*/
+
+/* Install the IRQ handler */
+static void t7l66xb_attach_irq(struct platform_device *dev)
+{
+        struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
+        unsigned int irq, irq_base;
+
+        irq_base = t7l66xb->irq_base;
+
+        for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
+                set_irq_chip(irq, &t7l66xb_chip);
+                set_irq_chip_data(irq, t7l66xb);
+                set_irq_handler(irq, handle_level_irq);
+#ifdef CONFIG_ARM
+                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+#endif
+        }
+
+        set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
+        set_irq_data(t7l66xb->irq, t7l66xb);
+        set_irq_chained_handler(t7l66xb->irq, t7l66xb_irq);
+}
+
+static void t7l66xb_detach_irq(struct platform_device *dev)
+{
+        struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
+        unsigned int irq, irq_base;
+
+        irq_base = t7l66xb->irq_base;
+
+        set_irq_chained_handler(t7l66xb->irq, NULL);
+        set_irq_data(t7l66xb->irq, NULL);
+
+        for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
+#ifdef CONFIG_ARM
+                set_irq_flags(irq, 0);
+#endif
+                set_irq_chip(irq, NULL);
+                set_irq_chip_data(irq, NULL);
+        }
+}
+
+/*--------------------------------------------------------------------------*/
+
+#ifdef CONFIG_PM
+static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state)
+{
+        struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
+
+        if (pdata && pdata->suspend)
+                pdata->suspend(dev);
+
+        return 0;
+}
+
+static int t7l66xb_resume(struct platform_device *dev)
+{
+        struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
+
+        if (pdata && pdata->resume)
+                pdata->resume(dev);
+
+        return 0;
+}
+#else
+#define t7l66xb_suspend NULL
+#define t7l66xb_resume  NULL
+#endif
+
+/*--------------------------------------------------------------------------*/
+
+static int t7l66xb_probe(struct platform_device *dev)
+{
+        struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
+        struct t7l66xb *t7l66xb;
+        struct resource *iomem, *rscr;
+        int ret;
+
+        iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
+        if (!iomem)
+                return -EINVAL;
+
+        t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL);
+        if (!t7l66xb)
+                return -ENOMEM;
+
+        spin_lock_init(&t7l66xb->lock);
+
+        platform_set_drvdata(dev, t7l66xb);
+
+        ret = platform_get_irq(dev, 0);
+        if (ret >= 0)
+                t7l66xb->irq = ret;
+        else
+                goto err_noirq;
+
+        t7l66xb->irq_base = pdata->irq_base;
+
+        rscr = &t7l66xb->rscr;
+        rscr->name = "t7l66xb-core";
+        rscr->start = iomem->start;
+        rscr->end = iomem->start + 0xff;
+        rscr->flags = IORESOURCE_MEM;
+
+        ret = request_resource(iomem, rscr);
+        if (ret)
+                goto err_request_scr;
+
+        t7l66xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1);
+        if (!t7l66xb->scr) {
+                ret = -ENOMEM;
+                goto err_ioremap;
+        }
+
+        if (pdata && pdata->enable)
+                pdata->enable(dev);
+
+        /* Mask all interrupts */
+        tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR);
+
+        printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n",
+                dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID),
+                (unsigned long)iomem->start, t7l66xb->irq);
+
+        t7l66xb_attach_irq(dev);
+
+        t7l66xb_cells[T7L66XB_CELL_NAND].driver_data = pdata->nand_data;
+        t7l66xb_cells[T7L66XB_CELL_NAND].platform_data =
+                &t7l66xb_cells[T7L66XB_CELL_NAND];
+        t7l66xb_cells[T7L66XB_CELL_NAND].data_size =
+                sizeof(t7l66xb_cells[T7L66XB_CELL_NAND]);
+
+        t7l66xb_cells[T7L66XB_CELL_MMC].platform_data =
+                &t7l66xb_cells[T7L66XB_CELL_MMC];
+        t7l66xb_cells[T7L66XB_CELL_MMC].data_size =
+                sizeof(t7l66xb_cells[T7L66XB_CELL_MMC]);
+
+        ret = mfd_add_devices(&dev->dev, dev->id,
+                              t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells),
+                              iomem, t7l66xb->irq_base);
+
+        if (!ret)
+                return 0;
+
+        t7l66xb_detach_irq(dev);
+        iounmap(t7l66xb->scr);
+err_ioremap:
+        release_resource(&t7l66xb->rscr);
+err_noirq:
+err_request_scr:
+        kfree(t7l66xb);
+        return ret;
+}
+
+static int t7l66xb_remove(struct platform_device *dev)
+{
+        struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
+        struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
+        int ret;
+
+        ret = pdata->disable(dev);
+
+        t7l66xb_detach_irq(dev);
+        iounmap(t7l66xb->scr);
+        release_resource(&t7l66xb->rscr);
+        mfd_remove_devices(&dev->dev);
+        platform_set_drvdata(dev, NULL);
+        kfree(t7l66xb);
+
+        return ret;
+
+}
+
+static struct platform_driver t7l66xb_platform_driver = {
+        .driver = {
+                .name   = "t7l66xb",
+                .owner  = THIS_MODULE,
+        },
+        .suspend        = t7l66xb_suspend,
+        .resume         = t7l66xb_resume,
+        .probe          = t7l66xb_probe,
+        .remove         = t7l66xb_remove,
+};
+
+/*--------------------------------------------------------------------------*/
+
+static int __init t7l66xb_init(void)
+{
+        int retval = 0;
+
+        retval = platform_driver_register(&t7l66xb_platform_driver);
+        return retval;
+}
+
+static void __exit t7l66xb_exit(void)
+{
+        platform_driver_unregister(&t7l66xb_platform_driver);
+}
+
+module_init(t7l66xb_init);
+module_exit(t7l66xb_exit);
+
+MODULE_DESCRIPTION("Toshiba T7L66XB core driver");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Ian Molton");
+MODULE_ALIAS("platform:t7l66xb");
diff --git a/drivers/mfd/tc6387xb.c b/drivers/mfd/tc6387xb.c
new file mode 100644
index 000000000000..a22b21ac6cf8
--- /dev/null
+++ b/drivers/mfd/tc6387xb.c
@@ -0,0 +1,181 @@
+/*
+ * Toshiba TC6387XB support
+ * Copyright (c) 2005 Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file contains TC6387XB base support.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/tmio.h>
+#include <linux/mfd/tc6387xb.h>
+
+enum {
+        TC6387XB_CELL_MMC,
+};
+
+#ifdef CONFIG_PM
+static int tc6387xb_suspend(struct platform_device *dev, pm_message_t state)
+{
+        struct tc6387xb_platform_data *pdata = platform_get_drvdata(dev);
+
+        if (pdata && pdata->suspend)
+                pdata->suspend(dev);
+
+        return 0;
+}
+
+static int tc6387xb_resume(struct platform_device *dev)
+{
+        struct tc6387xb_platform_data *pdata = platform_get_drvdata(dev);
+
+        if (pdata && pdata->resume)
+                pdata->resume(dev);
+
+        return 0;
+}
+#else
+#define tc6387xb_suspend  NULL
+#define tc6387xb_resume   NULL
+#endif
+
+/*--------------------------------------------------------------------------*/
+
+static int tc6387xb_mmc_enable(struct platform_device *mmc)
+{
+        struct platform_device *dev      = to_platform_device(mmc->dev.parent);
+        struct tc6387xb_platform_data *tc6387xb = dev->dev.platform_data;
+
+        if (tc6387xb->enable_clk32k)
+                tc6387xb->enable_clk32k(dev);
+
+        return 0;
+}
+
+static int tc6387xb_mmc_disable(struct platform_device *mmc)
+{
+        struct platform_device *dev      = to_platform_device(mmc->dev.parent);
+        struct tc6387xb_platform_data *tc6387xb = dev->dev.platform_data;
+
+        if (tc6387xb->disable_clk32k)
+                tc6387xb->disable_clk32k(dev);
+
+        return 0;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static struct resource tc6387xb_mmc_resources[] = {
+        {
+                .start = 0x800,
+                .end   = 0x9ff,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = 0x200,
+                .end   = 0x2ff,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = 0,
+                .end   = 0,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct mfd_cell tc6387xb_cells[] = {
+        [TC6387XB_CELL_MMC] = {
+                .name = "tmio-mmc",
+                .enable = tc6387xb_mmc_enable,
+                .disable = tc6387xb_mmc_disable,
+                .num_resources = ARRAY_SIZE(tc6387xb_mmc_resources),
+                .resources = tc6387xb_mmc_resources,
+        },
+};
+
+static int tc6387xb_probe(struct platform_device *dev)
+{
+        struct tc6387xb_platform_data *data = platform_get_drvdata(dev);
+        struct resource *iomem;
+        int irq, ret;
+
+        iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
+        if (!iomem) {
+                ret = -EINVAL;
+                goto err_resource;
+        }
+
+        ret  = platform_get_irq(dev, 0);
+        if (ret >= 0)
+                irq = ret;
+        else
+                goto err_resource;
+
+        if (data && data->enable)
+                data->enable(dev);
+
+        printk(KERN_INFO "Toshiba tc6387xb initialised\n");
+
+        tc6387xb_cells[TC6387XB_CELL_MMC].platform_data =
+                &tc6387xb_cells[TC6387XB_CELL_MMC];
+        tc6387xb_cells[TC6387XB_CELL_MMC].data_size =
+                sizeof(tc6387xb_cells[TC6387XB_CELL_MMC]);
+
+        ret = mfd_add_devices(&dev->dev, dev->id, tc6387xb_cells,
+                              ARRAY_SIZE(tc6387xb_cells), iomem, irq);
+
+        if (!ret)
+                return 0;
+
+err_resource:
+        return ret;
+}
+
+static int tc6387xb_remove(struct platform_device *dev)
+{
+        struct tc6387xb_platform_data *data = platform_get_drvdata(dev);
+
+        if (data && data->disable)
+                data->disable(dev);
+
+        /* FIXME - free the resources! */
+
+        return 0;
+}
+
+
+static struct platform_driver tc6387xb_platform_driver = {
+        .driver = {
+                .name           = "tc6387xb",
+        },
+        .probe          = tc6387xb_probe,
+        .remove         = tc6387xb_remove,
+        .suspend        = tc6387xb_suspend,
+        .resume         = tc6387xb_resume,
+};
+
+
+static int __init tc6387xb_init(void)
+{
+        return platform_driver_register(&tc6387xb_platform_driver);
+}
+
+static void __exit tc6387xb_exit(void)
+{
+        platform_driver_unregister(&tc6387xb_platform_driver);
+}
+
+module_init(tc6387xb_init);
+module_exit(tc6387xb_exit);
+
+MODULE_DESCRIPTION("Toshiba TC6387XB core driver");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Ian Molton");
+MODULE_ALIAS("platform:tc6387xb");
diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
index f4fd797c1590..e4c1c788b5f8 100644
--- a/drivers/mfd/tc6393xb.c
+++ b/drivers/mfd/tc6393xb.c
@@ -19,8 +19,8 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/platform_device.h>
-#include <linux/fb.h>
 #include <linux/clk.h>
+#include <linux/err.h>
 #include <linux/mfd/core.h>
 #include <linux/mfd/tmio.h>
 #include <linux/mfd/tc6393xb.h>
@@ -112,6 +112,7 @@ struct tc6393xb {
 
 enum {
         TC6393XB_CELL_NAND,
+        TC6393XB_CELL_MMC,
 };
 
 /*--------------------------------------------------------------------------*/
@@ -126,7 +127,7 @@ static int tc6393xb_nand_enable(struct platform_device *nand)
 
         /* SMD buffer on */
         dev_dbg(&dev->dev, "SMD buffer on\n");
-        iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
+        tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
 
         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 
@@ -135,25 +136,40 @@ static int tc6393xb_nand_enable(struct platform_device *nand)
 
 static struct resource __devinitdata tc6393xb_nand_resources[] = {
         {
-                .name   = TMIO_NAND_CONFIG,
-                .start  = 0x0100,
-                .end    = 0x01ff,
+                .start  = 0x1000,
+                .end    = 0x1007,
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = TMIO_NAND_CONTROL,
-                .start  = 0x1000,
-                .end    = 0x1007,
+                .start  = 0x0100,
+                .end    = 0x01ff,
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = TMIO_NAND_IRQ,
                 .start  = IRQ_TC6393_NAND,
                 .end    = IRQ_TC6393_NAND,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
+static struct resource __devinitdata tc6393xb_mmc_resources[] = {
+        {
+                .start  = 0x800,
+                .end    = 0x9ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = 0x200,
+                .end    = 0x2ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = IRQ_TC6393_MMC,
+                .end    = IRQ_TC6393_MMC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
 static struct mfd_cell __devinitdata tc6393xb_cells[] = {
         [TC6393XB_CELL_NAND] = {
                 .name = "tmio-nand",
@@ -161,6 +177,11 @@ static struct mfd_cell __devinitdata tc6393xb_cells[] = {
                 .num_resources = ARRAY_SIZE(tc6393xb_nand_resources),
                 .resources = tc6393xb_nand_resources,
         },
+        [TC6393XB_CELL_MMC] = {
+                .name = "tmio-mmc",
+                .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources),
+                .resources = tc6393xb_mmc_resources,
+        },
 };
 
 /*--------------------------------------------------------------------------*/
@@ -171,7 +192,7 @@ static int tc6393xb_gpio_get(struct gpio_chip *chip,
         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
 
         /* XXX: does dsr also represent inputs? */
-        return ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
+        return tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
                 & TC_GPIO_BIT(offset);
 }
 
@@ -181,13 +202,13 @@ static void __tc6393xb_gpio_set(struct gpio_chip *chip,
         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
         u8  dsr;
 
-        dsr = ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
+        dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
         if (value)
                 dsr |= TC_GPIO_BIT(offset);
         else
                 dsr &= ~TC_GPIO_BIT(offset);
 
-        iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
+        tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
 }
 
 static void tc6393xb_gpio_set(struct gpio_chip *chip,
@@ -212,9 +233,9 @@ static int tc6393xb_gpio_direction_input(struct gpio_chip *chip,
 
         spin_lock_irqsave(&tc6393xb->lock, flags);
 
-        doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
+        doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
         doecr &= ~TC_GPIO_BIT(offset);
-        iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
+        tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
 
         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 
@@ -232,9 +253,9 @@ static int tc6393xb_gpio_direction_output(struct gpio_chip *chip,
 
         __tc6393xb_gpio_set(chip, offset, value);
 
-        doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
+        doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
         doecr |= TC_GPIO_BIT(offset);
-        iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
+        tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
 
         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 
@@ -265,8 +286,8 @@ tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
 
         irq_base = tc6393xb->irq_base;
 
-        while ((isr = ioread8(tc6393xb->scr + SCR_ISR) &
-                                ~ioread8(tc6393xb->scr + SCR_IMR)))
+        while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) &
+                                ~tmio_ioread8(tc6393xb->scr + SCR_IMR)))
                 for (i = 0; i < TC6393XB_NR_IRQS; i++) {
                         if (isr & (1 << i))
                                 generic_handle_irq(irq_base + i);
@@ -284,9 +305,9 @@ static void tc6393xb_irq_mask(unsigned int irq)
         u8 imr;
 
         spin_lock_irqsave(&tc6393xb->lock, flags);
-        imr = ioread8(tc6393xb->scr + SCR_IMR);
+        imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
         imr |= 1 << (irq - tc6393xb->irq_base);
-        iowrite8(imr, tc6393xb->scr + SCR_IMR);
+        tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 }
 
@@ -297,9 +318,9 @@ static void tc6393xb_irq_unmask(unsigned int irq)
         u8 imr;
 
         spin_lock_irqsave(&tc6393xb->lock, flags);
-        imr = ioread8(tc6393xb->scr + SCR_IMR);
+        imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
         imr &= ~(1 << (irq - tc6393xb->irq_base));
-        iowrite8(imr, tc6393xb->scr + SCR_IMR);
+        tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 }
 
@@ -380,9 +401,8 @@ static int __devinit tc6393xb_probe(struct platform_device *dev)
 {
         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
         struct tc6393xb *tc6393xb;
-        struct resource *iomem;
-        struct resource *rscr;
-        int retval, temp;
+        struct resource *iomem, *rscr;
+        int ret, temp;
         int i;
 
         iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
@@ -391,20 +411,26 @@ static int __devinit tc6393xb_probe(struct platform_device *dev)
 
         tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL);
         if (!tc6393xb) {
-                retval = -ENOMEM;
+                ret = -ENOMEM;
                 goto err_kzalloc;
         }
 
         spin_lock_init(&tc6393xb->lock);
 
         platform_set_drvdata(dev, tc6393xb);
+
+        ret = platform_get_irq(dev, 0);
+        if (ret >= 0)
+                tc6393xb->irq = ret;
+        else
+                goto err_noirq;
+
         tc6393xb->iomem = iomem;
-        tc6393xb->irq = platform_get_irq(dev, 0);
         tc6393xb->irq_base = tcpd->irq_base;
 
-        tc6393xb->clk = clk_get(&dev->dev, "GPIO27_CLK" /* "CK3P6MI" */);
+        tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI");
         if (IS_ERR(tc6393xb->clk)) {
-                retval = PTR_ERR(tc6393xb->clk);
+                ret = PTR_ERR(tc6393xb->clk);
                 goto err_clk_get;
         }
 
@@ -414,71 +440,73 @@ static int __devinit tc6393xb_probe(struct platform_device *dev)
         rscr->end = iomem->start + 0xff;
         rscr->flags = IORESOURCE_MEM;
 
-        retval = request_resource(iomem, rscr);
-        if (retval)
+        ret = request_resource(iomem, rscr);
+        if (ret)
                 goto err_request_scr;
 
         tc6393xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1);
         if (!tc6393xb->scr) {
-                retval = -ENOMEM;
+                ret = -ENOMEM;
                 goto err_ioremap;
         }
 
-        retval = clk_enable(tc6393xb->clk);
-        if (retval)
+        ret = clk_enable(tc6393xb->clk);
+        if (ret)
                 goto err_clk_enable;
 
-        retval = tcpd->enable(dev);
-        if (retval)
+        ret = tcpd->enable(dev);
+        if (ret)
                 goto err_enable;
 
         tc6393xb->suspend_state.fer = 0;
+
         for (i = 0; i < 3; i++) {
                 tc6393xb->suspend_state.gpo_dsr[i] =
                         (tcpd->scr_gpo_dsr >> (8 * i)) & 0xff;
                 tc6393xb->suspend_state.gpo_doecr[i] =
                         (tcpd->scr_gpo_doecr >> (8 * i)) & 0xff;
         }
-        /*
-         * It may be necessary to change this back to
-         * platform-dependant code
-         */
+
         tc6393xb->suspend_state.ccr = SCR_CCR_UNK1 |
                                         SCR_CCR_HCLK_48;
 
-        retval = tc6393xb_hw_init(dev);
-        if (retval)
+        ret = tc6393xb_hw_init(dev);
+        if (ret)
                 goto err_hw_init;
 
         printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n",
-                        ioread8(tc6393xb->scr + SCR_REVID),
+                        tmio_ioread8(tc6393xb->scr + SCR_REVID),
                         (unsigned long) iomem->start, tc6393xb->irq);
 
         tc6393xb->gpio.base = -1;
 
         if (tcpd->gpio_base >= 0) {
-                retval = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base);
-                if (retval)
+                ret = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base);
+                if (ret)
                         goto err_gpio_add;
         }
 
-        if (tc6393xb->irq)
-                tc6393xb_attach_irq(dev);
+        tc6393xb_attach_irq(dev);
 
         tc6393xb_cells[TC6393XB_CELL_NAND].driver_data = tcpd->nand_data;
         tc6393xb_cells[TC6393XB_CELL_NAND].platform_data =
                 &tc6393xb_cells[TC6393XB_CELL_NAND];
         tc6393xb_cells[TC6393XB_CELL_NAND].data_size =
                 sizeof(tc6393xb_cells[TC6393XB_CELL_NAND]);
+        tc6393xb_cells[TC6393XB_CELL_MMC].platform_data =
+                &tc6393xb_cells[TC6393XB_CELL_MMC];
+        tc6393xb_cells[TC6393XB_CELL_MMC].data_size =
+                sizeof(tc6393xb_cells[TC6393XB_CELL_MMC]);
+
 
-        retval = mfd_add_devices(&dev->dev, dev->id,
+        ret = mfd_add_devices(&dev->dev, dev->id,
                         tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells),
                         iomem, tcpd->irq_base);
 
-        return 0;
+        if (!ret)
+                return 0;
 
-        if (tc6393xb->irq)
-                tc6393xb_detach_irq(dev);
+        tc6393xb_detach_irq(dev);
 
 err_gpio_add:
         if (tc6393xb->gpio.base != -1)
@@ -493,10 +521,11 @@ err_ioremap:
         release_resource(&tc6393xb->rscr);
 err_request_scr:
         clk_put(tc6393xb->clk);
+err_noirq:
 err_clk_get:
         kfree(tc6393xb);
 err_kzalloc:
-        return retval;
+        return ret;
 }
 
 static int __devexit tc6393xb_remove(struct platform_device *dev)
@@ -506,9 +535,7 @@ static int __devexit tc6393xb_remove(struct platform_device *dev)
         int ret;
 
         mfd_remove_devices(&dev->dev);
-
-        if (tc6393xb->irq)
-                tc6393xb_detach_irq(dev);
+        tc6393xb_detach_irq(dev);
 
         if (tc6393xb->gpio.base != -1) {
                 ret = gpiochip_remove(&tc6393xb->gpio);
@@ -519,17 +546,11 @@ static int __devexit tc6393xb_remove(struct platform_device *dev)
         }
 
         ret = tcpd->disable(dev);
-
         clk_disable(tc6393xb->clk);
-
         iounmap(tc6393xb->scr);
-
         release_resource(&tc6393xb->rscr);
-
         platform_set_drvdata(dev, NULL);
-
         clk_put(tc6393xb->clk);
-
         kfree(tc6393xb);
 
         return ret;
@@ -540,8 +561,7 @@ static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
 {
         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
-        int i;
-
+        int i, ret;
 
         tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
         tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER);
@@ -554,14 +574,21 @@ static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
                 tc6393xb->suspend_state.gpi_bcr[i] =
                         ioread8(tc6393xb->scr + SCR_GPI_BCR(i));
         }
+        ret = tcpd->suspend(dev);
+        clk_disable(tc6393xb->clk);
 
-        return tcpd->suspend(dev);
+        return ret;
 }
 
 static int tc6393xb_resume(struct platform_device *dev)
 {
         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
-        int ret = tcpd->resume(dev);
+        struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
+        int ret;
+
+        clk_enable(tc6393xb->clk);
+
+        ret = tcpd->resume(dev);
 
         if (ret)
                 return ret;
@@ -598,7 +625,7 @@ static void __exit tc6393xb_exit(void)
 subsys_initcall(tc6393xb_init);
 module_exit(tc6393xb_exit);
 
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
 MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
 MODULE_ALIAS("platform:tc6393xb");
diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c
index f6b10dda31fd..a316f1b75933 100644
--- a/drivers/mfd/ucb1x00-core.c
+++ b/drivers/mfd/ucb1x00-core.c
@@ -26,7 +26,7 @@
 #include <linux/mutex.h>
 
 #include <asm/dma.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include "ucb1x00.h"
 
diff --git a/drivers/mfd/ucb1x00-ts.c b/drivers/mfd/ucb1x00-ts.c
index ad34e2d22524..44762ca86a8d 100644
--- a/drivers/mfd/ucb1x00-ts.c
+++ b/drivers/mfd/ucb1x00-ts.c
@@ -32,7 +32,7 @@
 #include <linux/kthread.h>
 
 #include <asm/dma.h>
-#include <asm/arch/collie.h>
+#include <mach/collie.h>
 #include <asm/mach-types.h>
 
 #include "ucb1x00.h"
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 82af385460e4..a726f3b01a6b 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -427,10 +427,10 @@ config ENCLOSURE_SERVICES
 config SGI_XP
         tristate "Support communication between SGI SSIs"
         depends on NET
-        depends on IA64_GENERIC || IA64_SGI_SN2 || IA64_SGI_UV || (X86_64 && SMP)
+        depends on (IA64_GENERIC || IA64_SGI_SN2 || IA64_SGI_UV || X86_64) && SMP
         select IA64_UNCACHED_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2
         select GENERIC_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2
-        select SGI_GRU if IA64_GENERIC || IA64_SGI_UV || (X86_64 && SMP)
+        select SGI_GRU if (IA64_GENERIC || IA64_SGI_UV || X86_64) && SMP
         ---help---
           An SGI machine can be divided into multiple Single System
           Images which act independently of each other and have
diff --git a/drivers/misc/acer-wmi.c b/drivers/misc/acer-wmi.c
index e7a3fe508dff..b2d9878dc3f0 100644
--- a/drivers/misc/acer-wmi.c
+++ b/drivers/misc/acer-wmi.c
@@ -803,11 +803,30 @@ static acpi_status get_u32(u32 *value, u32 cap)
 
 static acpi_status set_u32(u32 value, u32 cap)
 {
+        acpi_status status;
+
         if (interface->capability & cap) {
                 switch (interface->type) {
                 case ACER_AMW0:
                         return AMW0_set_u32(value, cap, interface);
                 case ACER_AMW0_V2:
+                        if (cap == ACER_CAP_MAILLED)
+                                return AMW0_set_u32(value, cap, interface);
+
+                        /*
+                         * On some models, some WMID methods don't toggle
+                         * properly. For those cases, we want to run the AMW0
+                         * method afterwards to be certain we've really toggled
+                         * the device state.
+                         */
+                        if (cap == ACER_CAP_WIRELESS ||
+                                cap == ACER_CAP_BLUETOOTH) {
+                                status = WMID_set_u32(value, cap, interface);
+                                if (ACPI_FAILURE(status))
+                                        return status;
+
+                                return AMW0_set_u32(value, cap, interface);
+                        }
                 case ACER_WMID:
                         return WMID_set_u32(value, cap, interface);
                 default:
diff --git a/drivers/misc/sgi-gru/grutables.h b/drivers/misc/sgi-gru/grutables.h
index 4251018f70ff..a78f70deeb59 100644
--- a/drivers/misc/sgi-gru/grutables.h
+++ b/drivers/misc/sgi-gru/grutables.h
@@ -279,7 +279,7 @@ struct gru_stats_s {
 #if defined CONFIG_IA64
 #define VADDR_HI_BIT            64
 #define GRUREGION(addr)         ((addr) >> (VADDR_HI_BIT - 3) & 3)
-#elif defined __x86_64
+#elif defined CONFIG_X86_64
 #define VADDR_HI_BIT            48
 #define GRUREGION(addr)         (0)             /* ZZZ could do better */
 #else
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index dc6f2579f85c..ea8d7a3490d9 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -174,3 +174,9 @@ config MMC_SDRICOH_CS
           To compile this driver as a module, choose M here: the
           module will be called sdricoh_cs.
 
+config MMC_TMIO
+        tristate "Toshiba Mobile IO Controller (TMIO) MMC/SD function support"
+        depends on MFD_TMIO
+        help
+          This provides support for the SD/MMC cell found in TC6393XB,
+          T7L66XB and also ipaq ASIC3
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index db52eebfb50e..c794cc5ce442 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -21,4 +21,5 @@ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
 obj-$(CONFIG_MMC_SPI)           += mmc_spi.o
 obj-$(CONFIG_MMC_S3C)           += s3cmci.o
 obj-$(CONFIG_MMC_SDRICOH_CS)    += sdricoh_cs.o
+obj-$(CONFIG_MMC_TMIO)          += tmio_mmc.o
 
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index f15e2064305c..6915f40ac8ab 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -73,9 +73,9 @@
 #include <asm/gpio.h>
 
 #include <asm/mach/mmc.h>
-#include <asm/arch/board.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/at91_mci.h>
+#include <mach/board.h>
+#include <mach/cpu.h>
+#include <mach/at91_mci.h>
 
 #define DRIVER_NAME "at91_mci"
 
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index 992b4beb757c..0bd06f5bd62f 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -28,7 +28,7 @@
 #include <asm/io.h>
 #include <asm/unaligned.h>
 
-#include <asm/arch/board.h>
+#include <mach/board.h>
 
 #include "atmel-mci-regs.h"
 
diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c
index f61406da65d2..2f0fcdb869b7 100644
--- a/drivers/mmc/host/imxmmc.c
+++ b/drivers/mmc/host/imxmmc.c
@@ -42,8 +42,8 @@
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/sizes.h>
-#include <asm/arch/mmc.h>
-#include <asm/arch/imx-dma.h>
+#include <mach/mmc.h>
+#include <mach/imx-dma.h>
 
 #include "imxmmc.h"
 
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index dbc26eb6a89e..c16028872bbb 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -29,14 +29,13 @@
 
 #include <asm/io.h>
 #include <asm/irq.h>
-#include <asm/mach-types.h>
-
-#include <asm/arch/board.h>
-#include <asm/arch/mmc.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/dma.h>
-#include <asm/arch/mux.h>
-#include <asm/arch/fpga.h>
+
+#include <mach/board.h>
+#include <mach/mmc.h>
+#include <mach/gpio.h>
+#include <mach/dma.h>
+#include <mach/mux.h>
+#include <mach/fpga.h>
 
 #define OMAP_MMC_REG_CMD        0x00
 #define OMAP_MMC_REG_ARGL       0x04
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index a8e18fe53077..55093ad132ca 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -31,8 +31,8 @@
 #include <asm/io.h>
 #include <asm/sizes.h>
 
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/mmc.h>
+#include <mach/pxa-regs.h>
+#include <mach/mmc.h>
 
 #include "pxamci.h"
 
diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
index be550c26da68..ae16d845d746 100644
--- a/drivers/mmc/host/s3cmci.c
+++ b/drivers/mmc/host/s3cmci.c
@@ -18,8 +18,8 @@
 
 #include <asm/dma.h>
 
-#include <asm/arch/regs-sdi.h>
-#include <asm/arch/regs-gpio.h>
+#include <mach/regs-sdi.h>
+#include <mach/regs-gpio.h>
 
 #include <asm/plat-s3c24xx/mci.h>
 
@@ -595,8 +595,9 @@ static irqreturn_t s3cmci_irq_cd(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-void s3cmci_dma_done_callback(struct s3c2410_dma_chan *dma_ch, void *buf_id,
-                              int size, enum s3c2410_dma_buffresult result)
+static void s3cmci_dma_done_callback(struct s3c2410_dma_chan *dma_ch,
+                                     void *buf_id, int size,
+                                     enum s3c2410_dma_buffresult result)
 {
         struct s3cmci_host *host = buf_id;
         unsigned long iflags;
@@ -740,8 +741,8 @@ request_done:
         mmc_request_done(host->mmc, mrq);
 }
 
-
-void s3cmci_dma_setup(struct s3cmci_host *host, enum s3c2410_dmasrc source)
+static void s3cmci_dma_setup(struct s3cmci_host *host,
+                             enum s3c2410_dmasrc source)
 {
         static enum s3c2410_dmasrc last_source = -1;
         static int setup_ok;
@@ -1003,8 +1004,9 @@ static void s3cmci_send_request(struct mmc_host *mmc)
         enable_irq(host->irq);
 }
 
-static int s3cmci_card_present(struct s3cmci_host *host)
+static int s3cmci_card_present(struct mmc_host *mmc)
 {
+        struct s3cmci_host *host = mmc_priv(mmc);
         struct s3c24xx_mci_pdata *pdata = host->pdata;
         int ret;
 
@@ -1023,7 +1025,7 @@ static void s3cmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
         host->cmd_is_stop = 0;
         host->mrq = mrq;
 
-        if (s3cmci_card_present(host) == 0) {
+        if (s3cmci_card_present(mmc) == 0) {
                 dbg(host, dbg_err, "%s: no medium present\n", __func__);
                 host->mrq->cmd->error = -ENOMEDIUM;
                 mmc_request_done(mmc, mrq);
@@ -1138,6 +1140,7 @@ static struct mmc_host_ops s3cmci_ops = {
         .request        = s3cmci_request,
         .set_ios        = s3cmci_set_ios,
         .get_ro         = s3cmci_get_ro,
+        .get_cd         = s3cmci_card_present,
 };
 
 static struct s3c24xx_mci_pdata s3cmci_def_pdata = {
@@ -1206,7 +1209,7 @@ static int __devinit s3cmci_probe(struct platform_device *pdev, int is2440)
         }
 
         host->base = ioremap(host->mem->start, RESSIZE(host->mem));
-        if (host->base == 0) {
+        if (!host->base) {
                 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
                 ret = -EINVAL;
                 goto probe_free_mem_region;
diff --git a/drivers/mmc/host/sdricoh_cs.c b/drivers/mmc/host/sdricoh_cs.c
index f99e9f721629..1df44d966bdb 100644
--- a/drivers/mmc/host/sdricoh_cs.c
+++ b/drivers/mmc/host/sdricoh_cs.c
@@ -29,7 +29,6 @@
 #include <linux/pci.h>
 #include <linux/ioport.h>
 #include <linux/scatterlist.h>
-#include <linux/version.h>
 
 #include <pcmcia/cs_types.h>
 #include <pcmcia/cs.h>
diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
new file mode 100644
index 000000000000..95430b81ec11
--- /dev/null
+++ b/drivers/mmc/host/tmio_mmc.c
@@ -0,0 +1,691 @@
+/*
+ *  linux/drivers/mmc/tmio_mmc.c
+ *
+ *  Copyright (C) 2004 Ian Molton
+ *  Copyright (C) 2007 Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Driver for the MMC / SD / SDIO cell found in:
+ *
+ * TC6393XB TC6391XB TC6387XB T7L66XB
+ *
+ * This driver draws mainly on scattered spec sheets, Reverse engineering
+ * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
+ * support). (Further 4 bit support from a later datasheet).
+ *
+ * TODO:
+ *   Investigate using a workqueue for PIO transfers
+ *   Eliminate FIXMEs
+ *   SDIO support
+ *   Better Power management
+ *   Handle MMC errors better
+ *   double buffer support
+ *
+ */
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/mmc/host.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/tmio.h>
+
+#include "tmio_mmc.h"
+
+/*
+ * Fixme - documentation conflicts on what the clock values are for the
+ * various dividers.
+ * One document I have says that its a divisor of a 24MHz clock, another 33.
+ * This probably depends on HCLK for a given platform, so we may need to
+ * require HCLK be passed to us from the MFD core.
+ *
+ */
+
+static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
+{
+        void __iomem *cnf = host->cnf;
+        void __iomem *ctl = host->ctl;
+        u32 clk = 0, clock;
+
+        if (new_clock) {
+                for (clock = 46875, clk = 0x100; new_clock >= (clock<<1); ) {
+                        clock <<= 1;
+                        clk >>= 1;
+                }
+                if (clk & 0x1)
+                        clk = 0x20000;
+
+                clk >>= 2;
+                tmio_iowrite8((clk & 0x8000) ? 0 : 1, cnf + CNF_SD_CLK_MODE);
+                clk |= 0x100;
+        }
+
+        tmio_iowrite16(clk, ctl + CTL_SD_CARD_CLK_CTL);
+}
+
+static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
+{
+        void __iomem *ctl = host->ctl;
+
+        tmio_iowrite16(0x0000, ctl + CTL_CLK_AND_WAIT_CTL);
+        msleep(10);
+        tmio_iowrite16(tmio_ioread16(ctl + CTL_SD_CARD_CLK_CTL) & ~0x0100,
+               ctl + CTL_SD_CARD_CLK_CTL);
+        msleep(10);
+}
+
+static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
+{
+        void __iomem *ctl = host->ctl;
+
+        tmio_iowrite16(tmio_ioread16(ctl + CTL_SD_CARD_CLK_CTL) | 0x0100,
+               ctl + CTL_SD_CARD_CLK_CTL);
+        msleep(10);
+        tmio_iowrite16(0x0100, ctl + CTL_CLK_AND_WAIT_CTL);
+        msleep(10);
+}
+
+static void reset(struct tmio_mmc_host *host)
+{
+        void __iomem *ctl = host->ctl;
+
+        /* FIXME - should we set stop clock reg here */
+        tmio_iowrite16(0x0000, ctl + CTL_RESET_SD);
+        tmio_iowrite16(0x0000, ctl + CTL_RESET_SDIO);
+        msleep(10);
+        tmio_iowrite16(0x0001, ctl + CTL_RESET_SD);
+        tmio_iowrite16(0x0001, ctl + CTL_RESET_SDIO);
+        msleep(10);
+}
+
+static void
+tmio_mmc_finish_request(struct tmio_mmc_host *host)
+{
+        struct mmc_request *mrq = host->mrq;
+
+        host->mrq = NULL;
+        host->cmd = NULL;
+        host->data = NULL;
+
+        mmc_request_done(host->mmc, mrq);
+}
+
+/* These are the bitmasks the tmio chip requires to implement the MMC response
+ * types. Note that R1 and R6 are the same in this scheme. */
+#define APP_CMD        0x0040
+#define RESP_NONE      0x0300
+#define RESP_R1        0x0400
+#define RESP_R1B       0x0500
+#define RESP_R2        0x0600
+#define RESP_R3        0x0700
+#define DATA_PRESENT   0x0800
+#define TRANSFER_READ  0x1000
+#define TRANSFER_MULTI 0x2000
+#define SECURITY_CMD   0x4000
+
+static int
+tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
+{
+        void __iomem *ctl = host->ctl;
+        struct mmc_data *data = host->data;
+        int c = cmd->opcode;
+
+        /* Command 12 is handled by hardware */
+        if (cmd->opcode == 12 && !cmd->arg) {
+                tmio_iowrite16(0x001, ctl + CTL_STOP_INTERNAL_ACTION);
+                return 0;
+        }
+
+        switch (mmc_resp_type(cmd)) {
+        case MMC_RSP_NONE: c |= RESP_NONE; break;
+        case MMC_RSP_R1:   c |= RESP_R1;   break;
+        case MMC_RSP_R1B:  c |= RESP_R1B;  break;
+        case MMC_RSP_R2:   c |= RESP_R2;   break;
+        case MMC_RSP_R3:   c |= RESP_R3;   break;
+        default:
+                pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
+                return -EINVAL;
+        }
+
+        host->cmd = cmd;
+
+/* FIXME - this seems to be ok comented out but the spec suggest this bit should
+ *         be set when issuing app commands.
+ *      if(cmd->flags & MMC_FLAG_ACMD)
+ *              c |= APP_CMD;
+ */
+        if (data) {
+                c |= DATA_PRESENT;
+                if (data->blocks > 1) {
+                        tmio_iowrite16(0x100, ctl + CTL_STOP_INTERNAL_ACTION);
+                        c |= TRANSFER_MULTI;
+                }
+                if (data->flags & MMC_DATA_READ)
+                        c |= TRANSFER_READ;
+        }
+
+        enable_mmc_irqs(ctl, TMIO_MASK_CMD);
+
+        /* Fire off the command */
+        tmio_iowrite32(cmd->arg, ctl + CTL_ARG_REG);
+        tmio_iowrite16(c, ctl + CTL_SD_CMD);
+
+        return 0;
+}
+
+/* This chip always returns (at least?) as much data as you ask for.
+ * I'm unsure what happens if you ask for less than a block. This should be
+ * looked into to ensure that a funny length read doesnt hose the controller.
+ *
+ */
+static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
+{
+        void __iomem *ctl = host->ctl;
+        struct mmc_data *data = host->data;
+        unsigned short *buf;
+        unsigned int count;
+        unsigned long flags;
+
+        if (!data) {
+                pr_debug("Spurious PIO IRQ\n");
+                return;
+        }
+
+        buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
+              host->sg_off);
+
+        count = host->sg_ptr->length - host->sg_off;
+        if (count > data->blksz)
+                count = data->blksz;
+
+        pr_debug("count: %08x offset: %08x flags %08x\n",
+            count, host->sg_off, data->flags);
+
+        /* Transfer the data */
+        if (data->flags & MMC_DATA_READ)
+                tmio_ioread16_rep(ctl + CTL_SD_DATA_PORT, buf, count >> 1);
+        else
+                tmio_iowrite16_rep(ctl + CTL_SD_DATA_PORT, buf, count >> 1);
+
+        host->sg_off += count;
+
+        tmio_mmc_kunmap_atomic(host, &flags);
+
+        if (host->sg_off == host->sg_ptr->length)
+                tmio_mmc_next_sg(host);
+
+        return;
+}
+
+static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
+{
+        void __iomem *ctl = host->ctl;
+        struct mmc_data *data = host->data;
+        struct mmc_command *stop = data->stop;
+
+        host->data = NULL;
+
+        if (!data) {
+                pr_debug("Spurious data end IRQ\n");
+                return;
+        }
+
+        /* FIXME - return correct transfer count on errors */
+        if (!data->error)
+                data->bytes_xfered = data->blocks * data->blksz;
+        else
+                data->bytes_xfered = 0;
+
+        pr_debug("Completed data request\n");
+
+        /*FIXME - other drivers allow an optional stop command of any given type
+         *        which we dont do, as the chip can auto generate them.
+         *        Perhaps we can be smarter about when to use auto CMD12 and
+         *        only issue the auto request when we know this is the desired
+         *        stop command, allowing fallback to the stop command the
+         *        upper layers expect. For now, we do what works.
+         */
+
+        if (data->flags & MMC_DATA_READ)
+                disable_mmc_irqs(ctl, TMIO_MASK_READOP);
+        else
+                disable_mmc_irqs(ctl, TMIO_MASK_WRITEOP);
+
+        if (stop) {
+                if (stop->opcode == 12 && !stop->arg)
+                        tmio_iowrite16(0x000, ctl + CTL_STOP_INTERNAL_ACTION);
+                else
+                        BUG();
+        }
+
+        tmio_mmc_finish_request(host);
+}
+
+static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
+        unsigned int stat)
+{
+        void __iomem *ctl = host->ctl, *addr;
+        struct mmc_command *cmd = host->cmd;
+        int i;
+
+        if (!host->cmd) {
+                pr_debug("Spurious CMD irq\n");
+                return;
+        }
+
+        host->cmd = NULL;
+
+        /* This controller is sicker than the PXA one. Not only do we need to
+         * drop the top 8 bits of the first response word, we also need to
+         * modify the order of the response for short response command types.
+         */
+
+        for (i = 3, addr = ctl + CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
+                cmd->resp[i] = tmio_ioread32(addr);
+
+        if (cmd->flags &  MMC_RSP_136) {
+                cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
+                cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
+                cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
+                cmd->resp[3] <<= 8;
+        } else if (cmd->flags & MMC_RSP_R3) {
+                cmd->resp[0] = cmd->resp[3];
+        }
+
+        if (stat & TMIO_STAT_CMDTIMEOUT)
+                cmd->error = -ETIMEDOUT;
+        else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
+                cmd->error = -EILSEQ;
+
+        /* If there is data to handle we enable data IRQs here, and
+         * we will ultimatley finish the request in the data_end handler.
+         * If theres no data or we encountered an error, finish now.
+         */
+        if (host->data && !cmd->error) {
+                if (host->data->flags & MMC_DATA_READ)
+                        enable_mmc_irqs(ctl, TMIO_MASK_READOP);
+                else
+                        enable_mmc_irqs(ctl, TMIO_MASK_WRITEOP);
+        } else {
+                tmio_mmc_finish_request(host);
+        }
+
+        return;
+}
+
+
+static irqreturn_t tmio_mmc_irq(int irq, void *devid)
+{
+        struct tmio_mmc_host *host = devid;
+        void __iomem *ctl = host->ctl;
+        unsigned int ireg, irq_mask, status;
+
+        pr_debug("MMC IRQ begin\n");
+
+        status = tmio_ioread32(ctl + CTL_STATUS);
+        irq_mask = tmio_ioread32(ctl + CTL_IRQ_MASK);
+        ireg = status & TMIO_MASK_IRQ & ~irq_mask;
+
+        pr_debug_status(status);
+        pr_debug_status(ireg);
+
+        if (!ireg) {
+                disable_mmc_irqs(ctl, status & ~irq_mask);
+
+                pr_debug("tmio_mmc: Spurious irq, disabling! "
+                        "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
+                pr_debug_status(status);
+
+                goto out;
+        }
+
+        while (ireg) {
+                /* Card insert / remove attempts */
+                if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
+                        ack_mmc_irqs(ctl, TMIO_STAT_CARD_INSERT |
+                                TMIO_STAT_CARD_REMOVE);
+                        mmc_detect_change(host->mmc, 0);
+                }
+
+                /* CRC and other errors */
+/*              if (ireg & TMIO_STAT_ERR_IRQ)
+ *                      handled |= tmio_error_irq(host, irq, stat);
+ */
+
+                /* Command completion */
+                if (ireg & TMIO_MASK_CMD) {
+                        ack_mmc_irqs(ctl, TMIO_MASK_CMD);
+                        tmio_mmc_cmd_irq(host, status);
+                }
+
+                /* Data transfer */
+                if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
+                        ack_mmc_irqs(ctl, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
+                        tmio_mmc_pio_irq(host);
+                }
+
+                /* Data transfer completion */
+                if (ireg & TMIO_STAT_DATAEND) {
+                        ack_mmc_irqs(ctl, TMIO_STAT_DATAEND);
+                        tmio_mmc_data_irq(host);
+                }
+
+                /* Check status - keep going until we've handled it all */
+                status = tmio_ioread32(ctl + CTL_STATUS);
+                irq_mask = tmio_ioread32(ctl + CTL_IRQ_MASK);
+                ireg = status & TMIO_MASK_IRQ & ~irq_mask;
+
+                pr_debug("Status at end of loop: %08x\n", status);
+                pr_debug_status(status);
+        }
+        pr_debug("MMC IRQ end\n");
+
+out:
+        return IRQ_HANDLED;
+}
+
+static int tmio_mmc_start_data(struct tmio_mmc_host *host,
+        struct mmc_data *data)
+{
+        void __iomem *ctl = host->ctl;
+
+        pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
+            data->blksz, data->blocks);
+
+        /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
+        if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
+                printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
+                        mmc_hostname(host->mmc), data->blksz);
+                return -EINVAL;
+        }
+
+        tmio_mmc_init_sg(host, data);
+        host->data = data;
+
+        /* Set transfer length / blocksize */
+        tmio_iowrite16(data->blksz,  ctl + CTL_SD_XFER_LEN);
+        tmio_iowrite16(data->blocks, ctl + CTL_XFER_BLK_COUNT);
+
+        return 0;
+}
+
+/* Process requests from the MMC layer */
+static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
+{
+        struct tmio_mmc_host *host = mmc_priv(mmc);
+        int ret;
+
+        if (host->mrq)
+                pr_debug("request not null\n");
+
+        host->mrq = mrq;
+
+        if (mrq->data) {
+                ret = tmio_mmc_start_data(host, mrq->data);
+                if (ret)
+                        goto fail;
+        }
+
+        ret = tmio_mmc_start_command(host, mrq->cmd);
+
+        if (!ret)
+                return;
+
+fail:
+        mrq->cmd->error = ret;
+        mmc_request_done(mmc, mrq);
+}
+
+/* Set MMC clock / power.
+ * Note: This controller uses a simple divider scheme therefore it cannot
+ * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
+ * MMC wont run that fast, it has to be clocked at 12MHz which is the next
+ * slowest setting.
+ */
+static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+        struct tmio_mmc_host *host = mmc_priv(mmc);
+        void __iomem *cnf = host->cnf;
+        void __iomem *ctl = host->ctl;
+
+        if (ios->clock)
+                tmio_mmc_set_clock(host, ios->clock);
+
+        /* Power sequence - OFF -> ON -> UP */
+        switch (ios->power_mode) {
+        case MMC_POWER_OFF: /* power down SD bus */
+                tmio_iowrite8(0x00, cnf + CNF_PWR_CTL_2);
+                tmio_mmc_clk_stop(host);
+                break;
+        case MMC_POWER_ON: /* power up SD bus */
+
+                tmio_iowrite8(0x02, cnf + CNF_PWR_CTL_2);
+                break;
+        case MMC_POWER_UP: /* start bus clock */
+                tmio_mmc_clk_start(host);
+                break;
+        }
+
+        switch (ios->bus_width) {
+        case MMC_BUS_WIDTH_1:
+                tmio_iowrite16(0x80e0, ctl + CTL_SD_MEM_CARD_OPT);
+        break;
+        case MMC_BUS_WIDTH_4:
+                tmio_iowrite16(0x00e0, ctl + CTL_SD_MEM_CARD_OPT);
+        break;
+        }
+
+        /* Let things settle. delay taken from winCE driver */
+        udelay(140);
+}
+
+static int tmio_mmc_get_ro(struct mmc_host *mmc)
+{
+        struct tmio_mmc_host *host = mmc_priv(mmc);
+        void __iomem *ctl = host->ctl;
+
+        return (tmio_ioread16(ctl + CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
+}
+
+static struct mmc_host_ops tmio_mmc_ops = {
+        .request        = tmio_mmc_request,
+        .set_ios        = tmio_mmc_set_ios,
+        .get_ro         = tmio_mmc_get_ro,
+};
+
+#ifdef CONFIG_PM
+static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
+{
+        struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
+        struct mmc_host *mmc = platform_get_drvdata(dev);
+        int ret;
+
+        ret = mmc_suspend_host(mmc, state);
+
+        /* Tell MFD core it can disable us now.*/
+        if (!ret && cell->disable)
+                cell->disable(dev);
+
+        return ret;
+}
+
+static int tmio_mmc_resume(struct platform_device *dev)
+{
+        struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
+        struct mmc_host *mmc = platform_get_drvdata(dev);
+        struct tmio_mmc_host *host = mmc_priv(mmc);
+        void __iomem *cnf = host->cnf;
+        int ret = 0;
+
+        /* Enable the MMC/SD Control registers */
+        tmio_iowrite16(SDCREN, cnf + CNF_CMD);
+        tmio_iowrite32(dev->resource[0].start & 0xfffe, cnf + CNF_CTL_BASE);
+
+        /* Tell the MFD core we are ready to be enabled */
+        if (cell->enable) {
+                ret = cell->enable(dev);
+                if (ret)
+                        goto out;
+        }
+
+        mmc_resume_host(mmc);
+
+out:
+        return ret;
+}
+#else
+#define tmio_mmc_suspend NULL
+#define tmio_mmc_resume NULL
+#endif
+
+static int __devinit tmio_mmc_probe(struct platform_device *dev)
+{
+        struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
+        struct resource *res_ctl, *res_cnf;
+        struct tmio_mmc_host *host;
+        struct mmc_host *mmc;
+        int ret = -ENOMEM;
+
+        if (dev->num_resources != 3)
+                goto out;
+
+        res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
+        res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1);
+        if (!res_ctl || !res_cnf) {
+                ret = -EINVAL;
+                goto out;
+        }
+
+        mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
+        if (!mmc)
+                goto out;
+
+        host = mmc_priv(mmc);
+        host->mmc = mmc;
+        platform_set_drvdata(dev, mmc);
+
+        host->ctl = ioremap(res_ctl->start, res_ctl->end - res_ctl->start);
+        if (!host->ctl)
+                goto host_free;
+
+        host->cnf = ioremap(res_cnf->start, res_cnf->end - res_cnf->start);
+        if (!host->cnf)
+                goto unmap_ctl;
+
+        mmc->ops = &tmio_mmc_ops;
+        mmc->caps = MMC_CAP_4_BIT_DATA;
+        mmc->f_min = 46875; /* 24000000 / 512 */
+        mmc->f_max = 24000000;
+        mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
+
+        /* Enable the MMC/SD Control registers */
+        tmio_iowrite16(SDCREN, host->cnf + CNF_CMD);
+        tmio_iowrite32(dev->resource[0].start & 0xfffe,
+                host->cnf + CNF_CTL_BASE);
+
+        /* Tell the MFD core we are ready to be enabled */
+        if (cell->enable) {
+                ret = cell->enable(dev);
+                if (ret)
+                        goto unmap_cnf;
+        }
+
+        /* Disable SD power during suspend */
+        tmio_iowrite8(0x01, host->cnf + CNF_PWR_CTL_3);
+
+        /* The below is required but why? FIXME */
+        tmio_iowrite8(0x1f, host->cnf + CNF_STOP_CLK_CTL);
+
+        /* Power down SD bus*/
+        tmio_iowrite8(0x0,  host->cnf + CNF_PWR_CTL_2);
+
+        tmio_mmc_clk_stop(host);
+        reset(host);
+
+        ret = platform_get_irq(dev, 0);
+        if (ret >= 0)
+                host->irq = ret;
+        else
+                goto unmap_cnf;
+
+        disable_mmc_irqs(host->ctl, TMIO_MASK_ALL);
+
+        ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED, "tmio-mmc",
+                host);
+        if (ret)
+                goto unmap_cnf;
+
+        set_irq_type(host->irq, IRQ_TYPE_EDGE_FALLING);
+
+        mmc_add_host(mmc);
+
+        printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
+               (unsigned long)host->ctl, host->irq);
+
+        /* Unmask the IRQs we want to know about */
+        enable_mmc_irqs(host->ctl,  TMIO_MASK_IRQ);
+
+        return 0;
+
+unmap_cnf:
+        iounmap(host->cnf);
+unmap_ctl:
+        iounmap(host->ctl);
+host_free:
+        mmc_free_host(mmc);
+out:
+        return ret;
+}
+
+static int __devexit tmio_mmc_remove(struct platform_device *dev)
+{
+        struct mmc_host *mmc = platform_get_drvdata(dev);
+
+        platform_set_drvdata(dev, NULL);
+
+        if (mmc) {
+                struct tmio_mmc_host *host = mmc_priv(mmc);
+                mmc_remove_host(mmc);
+                mmc_free_host(mmc);
+                free_irq(host->irq, host);
+                iounmap(host->ctl);
+                iounmap(host->cnf);
+        }
+
+        return 0;
+}
+
+/* ------------------- device registration ----------------------- */
+
+static struct platform_driver tmio_mmc_driver = {
+        .driver = {
+                .name = "tmio-mmc",
+                .owner = THIS_MODULE,
+        },
+        .probe = tmio_mmc_probe,
+        .remove = __devexit_p(tmio_mmc_remove),
+        .suspend = tmio_mmc_suspend,
+        .resume = tmio_mmc_resume,
+};
+
+
+static int __init tmio_mmc_init(void)
+{
+        return platform_driver_register(&tmio_mmc_driver);
+}
+
+static void __exit tmio_mmc_exit(void)
+{
+        platform_driver_unregister(&tmio_mmc_driver);
+}
+
+module_init(tmio_mmc_init);
+module_exit(tmio_mmc_exit);
+
+MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:tmio-mmc");
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
new file mode 100644
index 000000000000..9e647a06054f
--- /dev/null
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -0,0 +1,194 @@
+/* Definitons for use with the tmio_mmc.c
+ *
+ * (c) 2004 Ian Molton <spyro@f2s.com>
+ * (c) 2007 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#define CNF_CMD     0x04
+#define CNF_CTL_BASE   0x10
+#define CNF_INT_PIN  0x3d
+#define CNF_STOP_CLK_CTL 0x40
+#define CNF_GCLK_CTL 0x41
+#define CNF_SD_CLK_MODE 0x42
+#define CNF_PIN_STATUS 0x44
+#define CNF_PWR_CTL_1 0x48
+#define CNF_PWR_CTL_2 0x49
+#define CNF_PWR_CTL_3 0x4a
+#define CNF_CARD_DETECT_MODE 0x4c
+#define CNF_SD_SLOT 0x50
+#define CNF_EXT_GCLK_CTL_1 0xf0
+#define CNF_EXT_GCLK_CTL_2 0xf1
+#define CNF_EXT_GCLK_CTL_3 0xf9
+#define CNF_SD_LED_EN_1 0xfa
+#define CNF_SD_LED_EN_2 0xfe
+
+#define   SDCREN 0x2   /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
+
+#define CTL_SD_CMD 0x00
+#define CTL_ARG_REG 0x04
+#define CTL_STOP_INTERNAL_ACTION 0x08
+#define CTL_XFER_BLK_COUNT 0xa
+#define CTL_RESPONSE 0x0c
+#define CTL_STATUS 0x1c
+#define CTL_IRQ_MASK 0x20
+#define CTL_SD_CARD_CLK_CTL 0x24
+#define CTL_SD_XFER_LEN 0x26
+#define CTL_SD_MEM_CARD_OPT 0x28
+#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
+#define CTL_SD_DATA_PORT 0x30
+#define CTL_TRANSACTION_CTL 0x34
+#define CTL_RESET_SD 0xe0
+#define CTL_SDIO_REGS 0x100
+#define CTL_CLK_AND_WAIT_CTL 0x138
+#define CTL_RESET_SDIO 0x1e0
+
+/* Definitions for values the CTRL_STATUS register can take. */
+#define TMIO_STAT_CMDRESPEND    0x00000001
+#define TMIO_STAT_DATAEND       0x00000004
+#define TMIO_STAT_CARD_REMOVE   0x00000008
+#define TMIO_STAT_CARD_INSERT   0x00000010
+#define TMIO_STAT_SIGSTATE      0x00000020
+#define TMIO_STAT_WRPROTECT     0x00000080
+#define TMIO_STAT_CARD_REMOVE_A 0x00000100
+#define TMIO_STAT_CARD_INSERT_A 0x00000200
+#define TMIO_STAT_SIGSTATE_A    0x00000400
+#define TMIO_STAT_CMD_IDX_ERR   0x00010000
+#define TMIO_STAT_CRCFAIL       0x00020000
+#define TMIO_STAT_STOPBIT_ERR   0x00040000
+#define TMIO_STAT_DATATIMEOUT   0x00080000
+#define TMIO_STAT_RXOVERFLOW    0x00100000
+#define TMIO_STAT_TXUNDERRUN    0x00200000
+#define TMIO_STAT_CMDTIMEOUT    0x00400000
+#define TMIO_STAT_RXRDY         0x01000000
+#define TMIO_STAT_TXRQ          0x02000000
+#define TMIO_STAT_ILL_FUNC      0x20000000
+#define TMIO_STAT_CMD_BUSY      0x40000000
+#define TMIO_STAT_ILL_ACCESS    0x80000000
+
+/* Define some IRQ masks */
+/* This is the mask used at reset by the chip */
+#define TMIO_MASK_ALL           0x837f031d
+#define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND | \
+                TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
+#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND | \
+                TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
+#define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
+                TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
+#define TMIO_MASK_IRQ     (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
+
+#define enable_mmc_irqs(ctl, i) \
+        do { \
+                u32 mask;\
+                mask  = tmio_ioread32((ctl) + CTL_IRQ_MASK); \
+                mask &= ~((i) & TMIO_MASK_IRQ); \
+                tmio_iowrite32(mask, (ctl) + CTL_IRQ_MASK); \
+        } while (0)
+
+#define disable_mmc_irqs(ctl, i) \
+        do { \
+                u32 mask;\
+                mask  = tmio_ioread32((ctl) + CTL_IRQ_MASK); \
+                mask |= ((i) & TMIO_MASK_IRQ); \
+                tmio_iowrite32(mask, (ctl) + CTL_IRQ_MASK); \
+        } while (0)
+
+#define ack_mmc_irqs(ctl, i) \
+        do { \
+                u32 mask;\
+                mask  = tmio_ioread32((ctl) + CTL_STATUS); \
+                mask &= ~((i) & TMIO_MASK_IRQ); \
+                tmio_iowrite32(mask, (ctl) + CTL_STATUS); \
+        } while (0)
+
+
+struct tmio_mmc_host {
+        void __iomem *cnf;
+        void __iomem *ctl;
+        struct mmc_command      *cmd;
+        struct mmc_request      *mrq;
+        struct mmc_data         *data;
+        struct mmc_host         *mmc;
+        int                     irq;
+
+        /* pio related stuff */
+        struct scatterlist      *sg_ptr;
+        unsigned int            sg_len;
+        unsigned int            sg_off;
+};
+
+#include <linux/scatterlist.h>
+#include <linux/blkdev.h>
+
+static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
+        struct mmc_data *data)
+{
+        host->sg_len = data->sg_len;
+        host->sg_ptr = data->sg;
+        host->sg_off = 0;
+}
+
+static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host)
+{
+        host->sg_ptr = sg_next(host->sg_ptr);
+        host->sg_off = 0;
+        return --host->sg_len;
+}
+
+static inline char *tmio_mmc_kmap_atomic(struct tmio_mmc_host *host,
+        unsigned long *flags)
+{
+        struct scatterlist *sg = host->sg_ptr;
+
+        local_irq_save(*flags);
+        return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
+}
+
+static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host,
+        unsigned long *flags)
+{
+        kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ);
+        local_irq_restore(*flags);
+}
+
+#ifdef CONFIG_MMC_DEBUG
+
+#define STATUS_TO_TEXT(a) \
+        do { \
+                if (status & TMIO_STAT_##a) \
+                        printf(#a); \
+        } while (0)
+
+void debug_status(u32 status)
+{
+        printk(KERN_DEBUG "status: %08x = ", status);
+        STATUS_TO_TEXT(CARD_REMOVE);
+        STATUS_TO_TEXT(CARD_INSERT);
+        STATUS_TO_TEXT(SIGSTATE);
+        STATUS_TO_TEXT(WRPROTECT);
+        STATUS_TO_TEXT(CARD_REMOVE_A);
+        STATUS_TO_TEXT(CARD_INSERT_A);
+        STATUS_TO_TEXT(SIGSTATE_A);
+        STATUS_TO_TEXT(CMD_IDX_ERR);
+        STATUS_TO_TEXT(STOPBIT_ERR);
+        STATUS_TO_TEXT(ILL_FUNC);
+        STATUS_TO_TEXT(CMD_BUSY);
+        STATUS_TO_TEXT(CMDRESPEND);
+        STATUS_TO_TEXT(DATAEND);
+        STATUS_TO_TEXT(CRCFAIL);
+        STATUS_TO_TEXT(DATATIMEOUT);
+        STATUS_TO_TEXT(CMDTIMEOUT);
+        STATUS_TO_TEXT(RXOVERFLOW);
+        STATUS_TO_TEXT(TXUNDERRUN);
+        STATUS_TO_TEXT(RXRDY);
+        STATUS_TO_TEXT(TXRQ);
+        STATUS_TO_TEXT(ILL_ACCESS);
+        printk("\n");
+}
+
+#else
+#define pr_debug_status(s)  do { } while (0)
+#endif
diff --git a/drivers/mtd/maps/autcpu12-nvram.c b/drivers/mtd/maps/autcpu12-nvram.c
index cf32267263df..53664188fc47 100644
--- a/drivers/mtd/maps/autcpu12-nvram.c
+++ b/drivers/mtd/maps/autcpu12-nvram.c
@@ -25,8 +25,8 @@
 #include <linux/init.h>
 #include <asm/io.h>
 #include <asm/sizes.h>
-#include <asm/hardware.h>
-#include <asm/arch/autcpu12.h>
+#include <mach/hardware.h>
+#include <mach/autcpu12.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
 #include <linux/mtd/partitions.h>
diff --git a/drivers/mtd/maps/cdb89712.c b/drivers/mtd/maps/cdb89712.c
index cb507da0a87d..e5059aa3c724 100644
--- a/drivers/mtd/maps/cdb89712.c
+++ b/drivers/mtd/maps/cdb89712.c
@@ -9,7 +9,7 @@
 #include <linux/ioport.h>
 #include <linux/init.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
 #include <linux/mtd/partitions.h>
diff --git a/drivers/mtd/maps/ceiva.c b/drivers/mtd/maps/ceiva.c
index 6464d487eb1a..60e68bde0fea 100644
--- a/drivers/mtd/maps/ceiva.c
+++ b/drivers/mtd/maps/ceiva.c
@@ -25,7 +25,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/concat.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
 #include <asm/sizes.h>
diff --git a/drivers/mtd/maps/h720x-flash.c b/drivers/mtd/maps/h720x-flash.c
index ef8915474462..35fef655ccc4 100644
--- a/drivers/mtd/maps/h720x-flash.c
+++ b/drivers/mtd/maps/h720x-flash.c
@@ -16,7 +16,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
 #include <linux/mtd/partitions.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 
 static struct mtd_info *mymtd;
diff --git a/drivers/mtd/maps/integrator-flash.c b/drivers/mtd/maps/integrator-flash.c
index ee361aaadb1e..7100ee3c7b01 100644
--- a/drivers/mtd/maps/integrator-flash.c
+++ b/drivers/mtd/maps/integrator-flash.c
@@ -37,7 +37,7 @@
 #include <linux/mtd/partitions.h>
 
 #include <asm/mach/flash.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/system.h>
 
diff --git a/drivers/mtd/maps/ipaq-flash.c b/drivers/mtd/maps/ipaq-flash.c
index 113b1062020d..ed58f6a77bd9 100644
--- a/drivers/mtd/maps/ipaq-flash.c
+++ b/drivers/mtd/maps/ipaq-flash.c
@@ -24,8 +24,8 @@
 #include <linux/mtd/concat.h>
 #endif
 
-#include <asm/hardware.h>
-#include <asm/arch/h3600.h>
+#include <mach/hardware.h>
+#include <mach/h3600.h>
 #include <asm/io.h>
 
 
diff --git a/drivers/mtd/maps/ixp2000.c b/drivers/mtd/maps/ixp2000.c
index c2264792a20b..dcdb1f17577d 100644
--- a/drivers/mtd/maps/ixp2000.c
+++ b/drivers/mtd/maps/ixp2000.c
@@ -30,7 +30,7 @@
 #include <linux/mtd/partitions.h>
 
 #include <asm/io.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach/flash.h>
 
 #include <linux/reboot.h>
diff --git a/drivers/mtd/maps/omap_nor.c b/drivers/mtd/maps/omap_nor.c
index 68eec6c6c517..05f276af15da 100644
--- a/drivers/mtd/maps/omap_nor.c
+++ b/drivers/mtd/maps/omap_nor.c
@@ -43,9 +43,9 @@
 #include <linux/mtd/partitions.h>
 
 #include <asm/io.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach/flash.h>
-#include <asm/arch/tc.h>
+#include <mach/tc.h>
 
 #ifdef CONFIG_MTD_PARTITIONS
 static const char *part_probes[] = { /* "RedBoot", */ "cmdlinepart", NULL };
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c
index 82113295c266..771139c5bf87 100644
--- a/drivers/mtd/maps/pxa2xx-flash.c
+++ b/drivers/mtd/maps/pxa2xx-flash.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/partitions.h>
 
 #include <asm/io.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/cacheflush.h>
 
 #include <asm/mach/flash.h>
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c
index e177a43dfff0..7df6bbf0e4d9 100644
--- a/drivers/mtd/maps/sa1100-flash.c
+++ b/drivers/mtd/maps/sa1100-flash.c
@@ -18,7 +18,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/concat.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/sizes.h>
 #include <asm/mach/flash.h>
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 02f9cc30d77b..41f361c49b32 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -351,6 +351,13 @@ config MTD_NAND_PASEMI
           Enables support for NAND Flash interface on PA Semi PWRficient
           based boards
 
+config MTD_NAND_TMIO
+        tristate "NAND Flash device on Toshiba Mobile IO Controller"
+        depends on MTD_NAND && MFD_TMIO
+        help
+          Support for NAND flash connected to a Toshiba Mobile IO
+          Controller in some PDAs, including the Sharp SL6000x.
+
 config MTD_NAND_NANDSIM
         tristate "Support for NAND Flash Simulator"
         depends on MTD_PARTITIONS
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index d772581de573..b786c5da82da 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_MTD_NAND_ATMEL)		+= atmel_nand.o
 obj-$(CONFIG_MTD_NAND_CM_X270)          += cmx270_nand.o
 obj-$(CONFIG_MTD_NAND_BASLER_EXCITE)    += excite_nandflash.o
 obj-$(CONFIG_MTD_NAND_PXA3xx)           += pxa3xx_nand.o
+obj-$(CONFIG_MTD_NAND_TMIO)             += tmio_nand.o
 obj-$(CONFIG_MTD_NAND_PLATFORM)         += plat_nand.o
 obj-$(CONFIG_MTD_ALAUDA)                += alauda.o
 obj-$(CONFIG_MTD_NAND_PASEMI)           += pasemi_nand.o
diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c
index a0ba07c36ee9..26d42987971f 100644
--- a/drivers/mtd/nand/ams-delta.c
+++ b/drivers/mtd/nand/ams-delta.c
@@ -22,10 +22,10 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/sizes.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/board-ams-delta.h>
+#include <mach/gpio.h>
+#include <mach/board-ams-delta.h>
 
 /*
  * MTD structure for E3 (Delta)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 99aec46e2145..3387e0d5076b 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -32,8 +32,8 @@
 #include <linux/gpio.h>
 #include <linux/io.h>
 
-#include <asm/arch/board.h>
-#include <asm/arch/cpu.h>
+#include <mach/board.h>
+#include <mach/cpu.h>
 
 #ifdef CONFIG_MTD_NAND_ATMEL_ECC_HW
 #define hard_ecc        1
diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c
index 553dd7e9b41c..7c95da1f612c 100644
--- a/drivers/mtd/nand/autcpu12.c
+++ b/drivers/mtd/nand/autcpu12.c
@@ -32,9 +32,9 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/sizes.h>
-#include <asm/arch/autcpu12.h>
+#include <mach/autcpu12.h>
 
 /*
  * MTD structure for AUTCPU12 board
diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c
index fc8529bedfdf..9eba3f04783a 100644
--- a/drivers/mtd/nand/cmx270_nand.c
+++ b/drivers/mtd/nand/cmx270_nand.c
@@ -26,8 +26,8 @@
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
 
 #define GPIO_NAND_CS    (11)
 #define GPIO_NAND_RB    (89)
diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c
index 387e4352903e..86366bfba9f8 100644
--- a/drivers/mtd/nand/edb7312.c
+++ b/drivers/mtd/nand/edb7312.c
@@ -23,7 +23,7 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>  /* for CLPS7111_VIRT_BASE */
+#include <mach/hardware.h>      /* for CLPS7111_VIRT_BASE */
 #include <asm/sizes.h>
 #include <asm/hardware/clps7111.h>
 
diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c
index 9e59de501c2e..f8ce79b446ed 100644
--- a/drivers/mtd/nand/h1910.c
+++ b/drivers/mtd/nand/h1910.c
@@ -24,10 +24,10 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>  /* for CLPS7111_VIRT_BASE */
+#include <mach/hardware.h>      /* for CLPS7111_VIRT_BASE */
 #include <asm/sizes.h>
-#include <asm/arch/h1900-gpio.h>
-#include <asm/arch/ipaq.h>
+#include <mach/h1900-gpio.h>
+#include <mach/ipaq.h>
 
 /*
  * MTD structure for EDB7312 board
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c
index ee2ac3948cd8..917cf8d3ae95 100644
--- a/drivers/mtd/nand/orion_nand.c
+++ b/drivers/mtd/nand/orion_nand.c
@@ -18,8 +18,8 @@
 #include <linux/mtd/partitions.h>
 #include <asm/io.h>
 #include <asm/sizes.h>
-#include <asm/arch/hardware.h>
-#include <asm/plat-orion/orion_nand.h>
+#include <mach/hardware.h>
+#include <plat/orion_nand.h>
 
 #ifdef CONFIG_MTD_CMDLINE_PARTS
 static const char *part_probes[] = { "cmdlinepart", NULL };
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index fe2bc7e42119..a64ad15b8fdd 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -22,8 +22,8 @@
 #include <linux/irq.h>
 #include <asm/dma.h>
 
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa3xx_nand.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa3xx_nand.h>
 
 #define CHIP_DELAY_TIMEOUT      (2 * HZ/10)
 
diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c
index 6dba2fb66ae5..30a518e211bd 100644
--- a/drivers/mtd/nand/sharpsl.c
+++ b/drivers/mtd/nand/sharpsl.c
@@ -21,7 +21,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/interrupt.h>
 #include <asm/io.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 
 static void __iomem *sharpsl_io_base;
diff --git a/drivers/mtd/nand/tmio_nand.c b/drivers/mtd/nand/tmio_nand.c
new file mode 100644
index 000000000000..cbab654b03c8
--- /dev/null
+++ b/drivers/mtd/nand/tmio_nand.c
@@ -0,0 +1,556 @@
+/*
+ * Toshiba TMIO NAND flash controller driver
+ *
+ * Slightly murky pre-git history of the driver:
+ *
+ * Copyright (c) Ian Molton 2004, 2005, 2008
+ *    Original work, independant of sharps code. Included hardware ECC support.
+ *    Hard ECC did not work for writes in the early revisions.
+ * Copyright (c) Dirk Opfer 2005.
+ *    Modifications developed from sharps code but
+ *    NOT containing any, ported onto Ians base.
+ * Copyright (c) Chris Humbert 2005
+ * Copyright (c) Dmitry Baryshkov 2008
+ *    Minor fixes
+ *
+ * Parts copyright Sebastian Carlier
+ *
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ */
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/tmio.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+
+/*--------------------------------------------------------------------------*/
+
+/*
+ * NAND Flash Host Controller Configuration Register
+ */
+#define CCR_COMMAND     0x04    /* w Command                            */
+#define CCR_BASE        0x10    /* l NAND Flash Control Reg Base Addr   */
+#define CCR_INTP        0x3d    /* b Interrupt Pin                      */
+#define CCR_INTE        0x48    /* b Interrupt Enable                   */
+#define CCR_EC          0x4a    /* b Event Control                      */
+#define CCR_ICC         0x4c    /* b Internal Clock Control             */
+#define CCR_ECCC        0x5b    /* b ECC Control                        */
+#define CCR_NFTC        0x60    /* b NAND Flash Transaction Control     */
+#define CCR_NFM         0x61    /* b NAND Flash Monitor                 */
+#define CCR_NFPSC       0x62    /* b NAND Flash Power Supply Control    */
+#define CCR_NFDC        0x63    /* b NAND Flash Detect Control          */
+
+/*
+ * NAND Flash Control Register
+ */
+#define FCR_DATA        0x00    /* bwl Data Register                    */
+#define FCR_MODE        0x04    /* b Mode Register                      */
+#define FCR_STATUS      0x05    /* b Status Register                    */
+#define FCR_ISR         0x06    /* b Interrupt Status Register          */
+#define FCR_IMR         0x07    /* b Interrupt Mask Register            */
+
+/* FCR_MODE Register Command List */
+#define FCR_MODE_DATA   0x94    /* Data Data_Mode */
+#define FCR_MODE_COMMAND 0x95   /* Data Command_Mode */
+#define FCR_MODE_ADDRESS 0x96   /* Data Address_Mode */
+
+#define FCR_MODE_HWECC_CALC     0xB4    /* HW-ECC Data */
+#define FCR_MODE_HWECC_RESULT   0xD4    /* HW-ECC Calc result Read_Mode */
+#define FCR_MODE_HWECC_RESET    0xF4    /* HW-ECC Reset */
+
+#define FCR_MODE_POWER_ON       0x0C    /* Power Supply ON  to SSFDC card */
+#define FCR_MODE_POWER_OFF      0x08    /* Power Supply OFF to SSFDC card */
+
+#define FCR_MODE_LED_OFF        0x00    /* LED OFF */
+#define FCR_MODE_LED_ON         0x04    /* LED ON */
+
+#define FCR_MODE_EJECT_ON       0x68    /* Ejection events active  */
+#define FCR_MODE_EJECT_OFF      0x08    /* Ejection events ignored */
+
+#define FCR_MODE_LOCK           0x6C    /* Lock_Mode. Eject Switch Invalid */
+#define FCR_MODE_UNLOCK         0x0C    /* UnLock_Mode. Eject Switch is valid */
+
+#define FCR_MODE_CONTROLLER_ID  0x40    /* Controller ID Read */
+#define FCR_MODE_STANDBY        0x00    /* SSFDC card Changes Standby State */
+
+#define FCR_MODE_WE             0x80
+#define FCR_MODE_ECC1           0x40
+#define FCR_MODE_ECC0           0x20
+#define FCR_MODE_CE             0x10
+#define FCR_MODE_PCNT1          0x08
+#define FCR_MODE_PCNT0          0x04
+#define FCR_MODE_ALE            0x02
+#define FCR_MODE_CLE            0x01
+
+#define FCR_STATUS_BUSY         0x80
+
+/*--------------------------------------------------------------------------*/
+
+struct tmio_nand {
+        struct mtd_info mtd;
+        struct nand_chip chip;
+
+        struct platform_device *dev;
+
+        void __iomem *ccr;
+        void __iomem *fcr;
+        unsigned long fcr_phys;
+
+        unsigned int irq;
+
+        /* for tmio_nand_read_byte */
+        u8                      read;
+        unsigned read_good:1;
+};
+
+#define mtd_to_tmio(m)                  container_of(m, struct tmio_nand, mtd)
+
+#ifdef CONFIG_MTD_CMDLINE_PARTS
+static const char *part_probes[] = { "cmdlinepart", NULL };
+#endif
+
+/*--------------------------------------------------------------------------*/
+
+static void tmio_nand_hwcontrol(struct mtd_info *mtd, int cmd,
+                                   unsigned int ctrl)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+        struct nand_chip *chip = mtd->priv;
+
+        if (ctrl & NAND_CTRL_CHANGE) {
+                u8 mode;
+
+                if (ctrl & NAND_NCE) {
+                        mode = FCR_MODE_DATA;
+
+                        if (ctrl & NAND_CLE)
+                                mode |=  FCR_MODE_CLE;
+                        else
+                                mode &= ~FCR_MODE_CLE;
+
+                        if (ctrl & NAND_ALE)
+                                mode |=  FCR_MODE_ALE;
+                        else
+                                mode &= ~FCR_MODE_ALE;
+                } else {
+                        mode = FCR_MODE_STANDBY;
+                }
+
+                tmio_iowrite8(mode, tmio->fcr + FCR_MODE);
+                tmio->read_good = 0;
+        }
+
+        if (cmd != NAND_CMD_NONE)
+                tmio_iowrite8(cmd, chip->IO_ADDR_W);
+}
+
+static int tmio_nand_dev_ready(struct mtd_info *mtd)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+
+        return !(tmio_ioread8(tmio->fcr + FCR_STATUS) & FCR_STATUS_BUSY);
+}
+
+static irqreturn_t tmio_irq(int irq, void *__tmio)
+{
+        struct tmio_nand *tmio = __tmio;
+        struct nand_chip *nand_chip = &tmio->chip;
+
+        /* disable RDYREQ interrupt */
+        tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
+
+        if (unlikely(!waitqueue_active(&nand_chip->controller->wq)))
+                dev_warn(&tmio->dev->dev, "spurious interrupt\n");
+
+        wake_up(&nand_chip->controller->wq);
+        return IRQ_HANDLED;
+}
+
+/*
+  *The TMIO core has a RDYREQ interrupt on the posedge of #SMRB.
+  *This interrupt is normally disabled, but for long operations like
+  *erase and write, we enable it to wake us up.  The irq handler
+  *disables the interrupt.
+ */
+static int
+tmio_nand_wait(struct mtd_info *mtd, struct nand_chip *nand_chip)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+        long timeout;
+
+        /* enable RDYREQ interrupt */
+        tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR);
+        tmio_iowrite8(0x81, tmio->fcr + FCR_IMR);
+
+        timeout = wait_event_timeout(nand_chip->controller->wq,
+                tmio_nand_dev_ready(mtd),
+                msecs_to_jiffies(nand_chip->state == FL_ERASING ? 400 : 20));
+
+        if (unlikely(!tmio_nand_dev_ready(mtd))) {
+                tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
+                dev_warn(&tmio->dev->dev, "still busy with %s after %d ms\n",
+                        nand_chip->state == FL_ERASING ? "erase" : "program",
+                        nand_chip->state == FL_ERASING ? 400 : 20);
+
+        } else if (unlikely(!timeout)) {
+                tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
+                dev_warn(&tmio->dev->dev, "timeout waiting for interrupt\n");
+        }
+
+        nand_chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
+        return nand_chip->read_byte(mtd);
+}
+
+/*
+  *The TMIO controller combines two 8-bit data bytes into one 16-bit
+  *word. This function separates them so nand_base.c works as expected,
+  *especially its NAND_CMD_READID routines.
+ *
+  *To prevent stale data from being read, tmio_nand_hwcontrol() clears
+  *tmio->read_good.
+ */
+static u_char tmio_nand_read_byte(struct mtd_info *mtd)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+        unsigned int data;
+
+        if (tmio->read_good--)
+                return tmio->read;
+
+        data = tmio_ioread16(tmio->fcr + FCR_DATA);
+        tmio->read = data >> 8;
+        return data;
+}
+
+/*
+  *The TMIO controller converts an 8-bit NAND interface to a 16-bit
+  *bus interface, so all data reads and writes must be 16-bit wide.
+  *Thus, we implement 16-bit versions of the read, write, and verify
+  *buffer functions.
+ */
+static void
+tmio_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+
+        tmio_iowrite16_rep(tmio->fcr + FCR_DATA, buf, len >> 1);
+}
+
+static void tmio_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+
+        tmio_ioread16_rep(tmio->fcr + FCR_DATA, buf, len >> 1);
+}
+
+static int
+tmio_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+        u16                             *p = (u16 *) buf;
+
+        for (len >>= 1; len; len--)
+                if (*(p++) != tmio_ioread16(tmio->fcr + FCR_DATA))
+                        return -EFAULT;
+        return 0;
+}
+
+static void tmio_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+
+        tmio_iowrite8(FCR_MODE_HWECC_RESET, tmio->fcr + FCR_MODE);
+        tmio_ioread8(tmio->fcr + FCR_DATA);     /* dummy read */
+        tmio_iowrite8(FCR_MODE_HWECC_CALC, tmio->fcr + FCR_MODE);
+}
+
+static int tmio_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+                                                        u_char *ecc_code)
+{
+        struct tmio_nand *tmio = mtd_to_tmio(mtd);
+        unsigned int ecc;
+
+        tmio_iowrite8(FCR_MODE_HWECC_RESULT, tmio->fcr + FCR_MODE);
+
+        ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
+        ecc_code[1] = ecc;      /* 000-255 LP7-0 */
+        ecc_code[0] = ecc >> 8; /* 000-255 LP15-8 */
+        ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
+        ecc_code[2] = ecc;      /* 000-255 CP5-0,11b */
+        ecc_code[4] = ecc >> 8; /* 256-511 LP7-0 */
+        ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
+        ecc_code[3] = ecc;      /* 256-511 LP15-8 */
+        ecc_code[5] = ecc >> 8; /* 256-511 CP5-0,11b */
+
+        tmio_iowrite8(FCR_MODE_DATA, tmio->fcr + FCR_MODE);
+        return 0;
+}
+
+static int tmio_hw_init(struct platform_device *dev, struct tmio_nand *tmio)
+{
+        struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
+        int ret;
+
+        if (cell->enable) {
+                ret = cell->enable(dev);
+                if (ret)
+                        return ret;
+        }
+
+        /* (4Ch) CLKRUN Enable    1st spcrunc */
+        tmio_iowrite8(0x81, tmio->ccr + CCR_ICC);
+
+        /* (10h)BaseAddress    0x1000 spba.spba2 */
+        tmio_iowrite16(tmio->fcr_phys, tmio->ccr + CCR_BASE);
+        tmio_iowrite16(tmio->fcr_phys >> 16, tmio->ccr + CCR_BASE + 16);
+
+        /* (04h)Command Register I/O spcmd */
+        tmio_iowrite8(0x02, tmio->ccr + CCR_COMMAND);
+
+        /* (62h) Power Supply Control ssmpwc */
+        /* HardPowerOFF - SuspendOFF - PowerSupplyWait_4MS */
+        tmio_iowrite8(0x02, tmio->ccr + CCR_NFPSC);
+
+        /* (63h) Detect Control ssmdtc */
+        tmio_iowrite8(0x02, tmio->ccr + CCR_NFDC);
+
+        /* Interrupt status register clear sintst */
+        tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR);
+
+        /* After power supply, Media are reset smode */
+        tmio_iowrite8(FCR_MODE_POWER_ON, tmio->fcr + FCR_MODE);
+        tmio_iowrite8(FCR_MODE_COMMAND, tmio->fcr + FCR_MODE);
+        tmio_iowrite8(NAND_CMD_RESET, tmio->fcr + FCR_DATA);
+
+        /* Standby Mode smode */
+        tmio_iowrite8(FCR_MODE_STANDBY, tmio->fcr + FCR_MODE);
+
+        mdelay(5);
+
+        return 0;
+}
+
+static void tmio_hw_stop(struct platform_device *dev, struct tmio_nand *tmio)
+{
+        struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
+
+        tmio_iowrite8(FCR_MODE_POWER_OFF, tmio->fcr + FCR_MODE);
+        if (cell->disable)
+                cell->disable(dev);
+}
+
+static int tmio_probe(struct platform_device *dev)
+{
+        struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
+        struct tmio_nand_data *data = cell->driver_data;
+        struct resource *fcr = platform_get_resource(dev,
+                        IORESOURCE_MEM, 0);
+        struct resource *ccr = platform_get_resource(dev,
+                        IORESOURCE_MEM, 1);
+        int irq = platform_get_irq(dev, 0);
+        struct tmio_nand *tmio;
+        struct mtd_info *mtd;
+        struct nand_chip *nand_chip;
+#ifdef CONFIG_MTD_PARTITIONS
+        struct mtd_partition *parts;
+        int nbparts = 0;
+#endif
+        int retval;
+
+        if (data == NULL)
+                dev_warn(&dev->dev, "NULL platform data!\n");
+
+        tmio = kzalloc(sizeof *tmio, GFP_KERNEL);
+        if (!tmio) {
+                retval = -ENOMEM;
+                goto err_kzalloc;
+        }
+
+        tmio->dev = dev;
+
+        platform_set_drvdata(dev, tmio);
+        mtd = &tmio->mtd;
+        nand_chip = &tmio->chip;
+        mtd->priv = nand_chip;
+        mtd->name = "tmio-nand";
+
+        tmio->ccr = ioremap(ccr->start, ccr->end - ccr->start + 1);
+        if (!tmio->ccr) {
+                retval = -EIO;
+                goto err_iomap_ccr;
+        }
+
+        tmio->fcr_phys = (unsigned long)fcr->start;
+        tmio->fcr = ioremap(fcr->start, fcr->end - fcr->start + 1);
+        if (!tmio->fcr) {
+                retval = -EIO;
+                goto err_iomap_fcr;
+        }
+
+        retval = tmio_hw_init(dev, tmio);
+        if (retval)
+                goto err_hwinit;
+
+        /* Set address of NAND IO lines */
+        nand_chip->IO_ADDR_R = tmio->fcr;
+        nand_chip->IO_ADDR_W = tmio->fcr;
+
+        /* Set address of hardware control function */
+        nand_chip->cmd_ctrl = tmio_nand_hwcontrol;
+        nand_chip->dev_ready = tmio_nand_dev_ready;
+        nand_chip->read_byte = tmio_nand_read_byte;
+        nand_chip->write_buf = tmio_nand_write_buf;
+        nand_chip->read_buf = tmio_nand_read_buf;
+        nand_chip->verify_buf = tmio_nand_verify_buf;
+
+        /* set eccmode using hardware ECC */
+        nand_chip->ecc.mode = NAND_ECC_HW;
+        nand_chip->ecc.size = 512;
+        nand_chip->ecc.bytes = 6;
+        nand_chip->ecc.hwctl = tmio_nand_enable_hwecc;
+        nand_chip->ecc.calculate = tmio_nand_calculate_ecc;
+        nand_chip->ecc.correct = nand_correct_data;
+
+        if (data)
+                nand_chip->badblock_pattern = data->badblock_pattern;
+
+        /* 15 us command delay time */
+        nand_chip->chip_delay = 15;
+
+        retval = request_irq(irq, &tmio_irq,
+                                IRQF_DISABLED, dev->dev.bus_id, tmio);
+        if (retval) {
+                dev_err(&dev->dev, "request_irq error %d\n", retval);
+                goto err_irq;
+        }
+
+        tmio->irq = irq;
+        nand_chip->waitfunc = tmio_nand_wait;
+
+        /* Scan to find existence of the device */
+        if (nand_scan(mtd, 1)) {
+                retval = -ENODEV;
+                goto err_scan;
+        }
+        /* Register the partitions */
+#ifdef CONFIG_MTD_PARTITIONS
+#ifdef CONFIG_MTD_CMDLINE_PARTS
+        nbparts = parse_mtd_partitions(mtd, part_probes, &parts, 0);
+#endif
+        if (nbparts <= 0 && data) {
+                parts = data->partition;
+                nbparts = data->num_partitions;
+        }
+
+        if (nbparts)
+                retval = add_mtd_partitions(mtd, parts, nbparts);
+        else
+#endif
+        retval = add_mtd_device(mtd);
+
+        if (!retval)
+                return retval;
+
+        nand_release(mtd);
+
+err_scan:
+        if (tmio->irq)
+                free_irq(tmio->irq, tmio);
+err_irq:
+        tmio_hw_stop(dev, tmio);
+err_hwinit:
+        iounmap(tmio->fcr);
+err_iomap_fcr:
+        iounmap(tmio->ccr);
+err_iomap_ccr:
+        kfree(tmio);
+err_kzalloc:
+        return retval;
+}
+
+static int tmio_remove(struct platform_device *dev)
+{
+        struct tmio_nand *tmio = platform_get_drvdata(dev);
+
+        nand_release(&tmio->mtd);
+        if (tmio->irq)
+                free_irq(tmio->irq, tmio);
+        tmio_hw_stop(dev, tmio);
+        iounmap(tmio->fcr);
+        iounmap(tmio->ccr);
+        kfree(tmio);
+        return 0;
+}
+
+#ifdef CONFIG_PM
+static int tmio_suspend(struct platform_device *dev, pm_message_t state)
+{
+        struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
+
+        if (cell->suspend)
+                cell->suspend(dev);
+
+        tmio_hw_stop(dev, platform_get_drvdata(dev));
+        return 0;
+}
+
+static int tmio_resume(struct platform_device *dev)
+{
+        struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
+
+        /* FIXME - is this required or merely another attack of the broken
+         * SHARP platform? Looks suspicious.
+         */
+        tmio_hw_init(dev, platform_get_drvdata(dev));
+
+        if (cell->resume)
+                cell->resume(dev);
+
+        return 0;
+}
+#else
+#define tmio_suspend NULL
+#define tmio_resume NULL
+#endif
+
+static struct platform_driver tmio_driver = {
+        .driver.name    = "tmio-nand",
+        .driver.owner   = THIS_MODULE,
+        .probe          = tmio_probe,
+        .remove         = tmio_remove,
+        .suspend        = tmio_suspend,
+        .resume         = tmio_resume,
+};
+
+static int __init tmio_init(void)
+{
+        return platform_driver_register(&tmio_driver);
+}
+
+static void __exit tmio_exit(void)
+{
+        platform_driver_unregister(&tmio_driver);
+}
+
+module_init(tmio_init);
+module_exit(tmio_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Ian Molton, Dirk Opfer, Chris Humbert, Dmitry Baryshkov");
+MODULE_DESCRIPTION("NAND flash driver on Toshiba Mobile IO controller");
+MODULE_ALIAS("platform:tmio-nand");
diff --git a/drivers/mtd/nand/ts7250.c b/drivers/mtd/nand/ts7250.c
index 807a72752eeb..2c410a011317 100644
--- a/drivers/mtd/nand/ts7250.c
+++ b/drivers/mtd/nand/ts7250.c
@@ -25,7 +25,7 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/sizes.h>
 #include <asm/mach-types.h>
 
diff --git a/drivers/net/3c523.c b/drivers/net/3c523.c
index dc6e474229b1..e2ce41d3828e 100644
--- a/drivers/net/3c523.c
+++ b/drivers/net/3c523.c
@@ -640,10 +640,8 @@ static int init586(struct net_device *dev)
         cfg_cmd->time_low = 0x00;
         cfg_cmd->time_high = 0xf2;
         cfg_cmd->promisc = 0;
-        if (dev->flags & (IFF_ALLMULTI | IFF_PROMISC)) {
+        if (dev->flags & (IFF_ALLMULTI | IFF_PROMISC))
                 cfg_cmd->promisc = 1;
-                dev->flags |= IFF_PROMISC;
-        }
         cfg_cmd->carr_coll = 0x00;
 
         p->scb->cbl_offset = make16(cfg_cmd);
diff --git a/drivers/net/3c527.c b/drivers/net/3c527.c
index 6aca0c640f13..abc84f765973 100644
--- a/drivers/net/3c527.c
+++ b/drivers/net/3c527.c
@@ -1521,14 +1521,11 @@ static void do_mc32_set_multicast_list(struct net_device *dev, int retry)
         struct mc32_local *lp = netdev_priv(dev);
         u16 filt = (1<<2); /* Save Bad Packets, for stats purposes */
 
-        if (dev->flags&IFF_PROMISC)
+        if ((dev->flags&IFF_PROMISC) ||
+            (dev->flags&IFF_ALLMULTI) ||
+            dev->mc_count > 10)
                 /* Enable promiscuous mode */
                 filt |= 1;
-        else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > 10)
-        {
-                dev->flags|=IFF_PROMISC;
-                filt |= 1;
-        }
         else if(dev->mc_count)
         {
                 unsigned char block[62];
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c
index 8db4e6b89482..491ee16da5c1 100644
--- a/drivers/net/3c59x.c
+++ b/drivers/net/3c59x.c
@@ -1692,12 +1692,14 @@ vortex_open(struct net_device *dev)
                         vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
                         vp->rx_ring[i].status = 0;      /* Clear complete bit. */
                         vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
-                        skb = dev_alloc_skb(PKT_BUF_SZ);
+
+                        skb = __netdev_alloc_skb(dev, PKT_BUF_SZ + NET_IP_ALIGN,
+                                                 GFP_KERNEL);
                         vp->rx_skbuff[i] = skb;
                         if (skb == NULL)
                                 break;                  /* Bad news!  */
-                        skb->dev = dev;                 /* Mark as being used by this device. */
-                        skb_reserve(skb, 2);    /* Align IP on 16 byte boundaries */
+
+                        skb_reserve(skb, NET_IP_ALIGN); /* Align IP on 16 byte boundaries */
                         vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
                 }
                 if (i != RX_RING_SIZE) {
@@ -2538,7 +2540,7 @@ boomerang_rx(struct net_device *dev)
                 struct sk_buff *skb;
                 entry = vp->dirty_rx % RX_RING_SIZE;
                 if (vp->rx_skbuff[entry] == NULL) {
-                        skb = dev_alloc_skb(PKT_BUF_SZ);
+                        skb = netdev_alloc_skb(dev, PKT_BUF_SZ + NET_IP_ALIGN);
                         if (skb == NULL) {
                                 static unsigned long last_jif;
                                 if (time_after(jiffies, last_jif + 10 * HZ)) {
@@ -2549,8 +2551,8 @@ boomerang_rx(struct net_device *dev)
                                         mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
                                 break;                  /* Bad news!  */
                         }
-                        skb->dev = dev;                 /* Mark as being used by this device. */
-                        skb_reserve(skb, 2);    /* Align IP on 16 byte boundaries */
+
+                        skb_reserve(skb, NET_IP_ALIGN);
                         vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
                         vp->rx_skbuff[entry] = skb;
                 }
diff --git a/drivers/net/8390.c b/drivers/net/8390.c
index dc5d2584bd0c..f72a2e87d569 100644
--- a/drivers/net/8390.c
+++ b/drivers/net/8390.c
@@ -9,42 +9,39 @@ int ei_open(struct net_device *dev)
 {
         return __ei_open(dev);
 }
+EXPORT_SYMBOL(ei_open);
 
 int ei_close(struct net_device *dev)
 {
         return __ei_close(dev);
 }
+EXPORT_SYMBOL(ei_close);
 
 irqreturn_t ei_interrupt(int irq, void *dev_id)
 {
         return __ei_interrupt(irq, dev_id);
 }
+EXPORT_SYMBOL(ei_interrupt);
 
 #ifdef CONFIG_NET_POLL_CONTROLLER
 void ei_poll(struct net_device *dev)
 {
         __ei_poll(dev);
 }
+EXPORT_SYMBOL(ei_poll);
 #endif
 
 struct net_device *__alloc_ei_netdev(int size)
 {
         return ____alloc_ei_netdev(size);
 }
+EXPORT_SYMBOL(__alloc_ei_netdev);
 
 void NS8390_init(struct net_device *dev, int startp)
 {
         __NS8390_init(dev, startp);
 }
-
-EXPORT_SYMBOL(ei_open);
-EXPORT_SYMBOL(ei_close);
-EXPORT_SYMBOL(ei_interrupt);
-#ifdef CONFIG_NET_POLL_CONTROLLER
-EXPORT_SYMBOL(ei_poll);
-#endif
 EXPORT_SYMBOL(NS8390_init);
-EXPORT_SYMBOL(__alloc_ei_netdev);
 
 #if defined(MODULE)
 
diff --git a/drivers/net/8390p.c b/drivers/net/8390p.c
index 71f19884c4b1..4c6eea4611a2 100644
--- a/drivers/net/8390p.c
+++ b/drivers/net/8390p.c
@@ -4,9 +4,9 @@ static const char version[] =
     "8390p.c:v1.10cvs 9/23/94 Donald Becker (becker@cesdis.gsfc.nasa.gov)\n";
 
 #define ei_inb(_p)      inb(_p)
-#define ei_outb(_v,_p)  outb(_v,_p)
+#define ei_outb(_v, _p) outb(_v, _p)
 #define ei_inb_p(_p)    inb_p(_p)
-#define ei_outb_p(_v,_p) outb_p(_v,_p)
+#define ei_outb_p(_v, _p) outb_p(_v, _p)
 
 #include "lib8390.c"
 
@@ -14,42 +14,39 @@ int eip_open(struct net_device *dev)
 {
         return __ei_open(dev);
 }
+EXPORT_SYMBOL(eip_open);
 
 int eip_close(struct net_device *dev)
 {
         return __ei_close(dev);
 }
+EXPORT_SYMBOL(eip_close);
 
 irqreturn_t eip_interrupt(int irq, void *dev_id)
 {
         return __ei_interrupt(irq, dev_id);
 }
+EXPORT_SYMBOL(eip_interrupt);
 
 #ifdef CONFIG_NET_POLL_CONTROLLER
 void eip_poll(struct net_device *dev)
 {
         __ei_poll(dev);
 }
+EXPORT_SYMBOL(eip_poll);
 #endif
 
 struct net_device *__alloc_eip_netdev(int size)
 {
         return ____alloc_ei_netdev(size);
 }
+EXPORT_SYMBOL(__alloc_eip_netdev);
 
 void NS8390p_init(struct net_device *dev, int startp)
 {
-        return __NS8390_init(dev, startp);
+        __NS8390_init(dev, startp);
 }
-
-EXPORT_SYMBOL(eip_open);
-EXPORT_SYMBOL(eip_close);
-EXPORT_SYMBOL(eip_interrupt);
-#ifdef CONFIG_NET_POLL_CONTROLLER
-EXPORT_SYMBOL(eip_poll);
-#endif
 EXPORT_SYMBOL(NS8390p_init);
-EXPORT_SYMBOL(__alloc_eip_netdev);
 
 #if defined(MODULE)
 
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 8a03875ec877..a5c141cecd4e 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -510,14 +510,15 @@ config STNIC
 config SH_ETH
         tristate "Renesas SuperH Ethernet support"
         depends on SUPERH && \
-                (CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7763)
+                (CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7763 || \
+                 CPU_SUBTYPE_SH7619)
         select CRC32
         select MII
         select MDIO_BITBANG
         select PHYLIB
         help
           Renesas SuperH Ethernet device driver.
-          This driver support SH7710, SH7712 and SH7763.
+          This driver support SH7710, SH7712, SH7763 and SH7619.
 
 config SUNLANCE
         tristate "Sun LANCE support"
@@ -1171,7 +1172,7 @@ config ETH16I
 
 config NE2000
         tristate "NE2000/NE1000 support"
-        depends on NET_ISA || (Q40 && m) || M32R || TOSHIBA_RBTX4927 || TOSHIBA_RBTX4938
+        depends on NET_ISA || (Q40 && m) || M32R || MACH_TX49XX
         select CRC32
         ---help---
           If you have a network (Ethernet) card of this type, say Y and read
diff --git a/drivers/net/acenic.c b/drivers/net/acenic.c
index e4483de84e7f..66de80b64b92 100644
--- a/drivers/net/acenic.c
+++ b/drivers/net/acenic.c
@@ -52,7 +52,6 @@
 
 #include <linux/module.h>
 #include <linux/moduleparam.h>
-#include <linux/version.h>
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/ioport.h>
diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c
index a637910b02dd..aa4a5246be53 100644
--- a/drivers/net/arm/am79c961a.c
+++ b/drivers/net/arm/am79c961a.c
@@ -28,7 +28,7 @@
 #include <linux/bitops.h>
 #include <linux/platform_device.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/system.h>
 
diff --git a/drivers/net/arm/at91_ether.c b/drivers/net/arm/at91_ether.c
index ffae266e2d7f..0fa53464efb2 100644
--- a/drivers/net/arm/at91_ether.c
+++ b/drivers/net/arm/at91_ether.c
@@ -32,9 +32,9 @@
 #include <asm/uaccess.h>
 #include <asm/mach-types.h>
 
-#include <asm/arch/at91rm9200_emac.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/board.h>
+#include <mach/at91rm9200_emac.h>
+#include <mach/gpio.h>
+#include <mach/board.h>
 
 #include "at91_ether.h"
 
diff --git a/drivers/net/arm/ep93xx_eth.c b/drivers/net/arm/ep93xx_eth.c
index 18d3eeb7eab2..1267444d79da 100644
--- a/drivers/net/arm/ep93xx_eth.c
+++ b/drivers/net/arm/ep93xx_eth.c
@@ -20,8 +20,8 @@
 #include <linux/moduleparam.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
-#include <asm/arch/ep93xx-regs.h>
-#include <asm/arch/platform.h>
+#include <mach/ep93xx-regs.h>
+#include <mach/platform.h>
 #include <asm/io.h>
 
 #define DRV_MODULE_NAME         "ep93xx-eth"
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 9b777d9433cd..e2d702b8b2e4 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -32,8 +32,8 @@
 #include <linux/kernel.h>
 #include <linux/mii.h>
 #include <linux/platform_device.h>
-#include <asm/arch/npe.h>
-#include <asm/arch/qmgr.h>
+#include <mach/npe.h>
+#include <mach/qmgr.h>
 
 #define DEBUG_QUEUES            0
 #define DEBUG_DESC              0
@@ -551,7 +551,7 @@ static int eth_poll(struct napi_struct *napi, int budget)
                 if ((skb = netdev_alloc_skb(dev, RX_BUFF_SIZE))) {
                         phys = dma_map_single(&dev->dev, skb->data,
                                               RX_BUFF_SIZE, DMA_FROM_DEVICE);
-                        if (dma_mapping_error(phys)) {
+                        if (dma_mapping_error(&dev->dev, phys)) {
                                 dev_kfree_skb(skb);
                                 skb = NULL;
                         }
@@ -698,7 +698,7 @@ static int eth_xmit(struct sk_buff *skb, struct net_device *dev)
 #endif
 
         phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE);
-        if (dma_mapping_error(phys)) {
+        if (dma_mapping_error(&dev->dev, phys)) {
 #ifdef __ARMEB__
                 dev_kfree_skb(skb);
 #else
@@ -883,7 +883,7 @@ static int init_queues(struct port *port)
                 desc->buf_len = MAX_MRU;
                 desc->data = dma_map_single(&port->netdev->dev, data,
                                             RX_BUFF_SIZE, DMA_FROM_DEVICE);
-                if (dma_mapping_error(desc->data)) {
+                if (dma_mapping_error(&port->netdev->dev, desc->data)) {
                         free_buffer(buff);
                         return -EIO;
                 }
diff --git a/drivers/net/atl1e/atl1e_ethtool.c b/drivers/net/atl1e/atl1e_ethtool.c
index cdc3b85b10b9..619c6583e1aa 100644
--- a/drivers/net/atl1e/atl1e_ethtool.c
+++ b/drivers/net/atl1e/atl1e_ethtool.c
@@ -355,7 +355,7 @@ static int atl1e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
         struct atl1e_adapter *adapter = netdev_priv(netdev);
 
         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE |
-                            WAKE_MCAST | WAKE_BCAST | WAKE_MCAST))
+                            WAKE_UCAST | WAKE_MCAST | WAKE_BCAST))
                 return -EOPNOTSUPP;
         /* these settings will always override what we currently have */
         adapter->wol = 0;
diff --git a/drivers/net/atl1e/atl1e_main.c b/drivers/net/atl1e/atl1e_main.c
index 35264c244cfd..82d7be1655d3 100644
--- a/drivers/net/atl1e/atl1e_main.c
+++ b/drivers/net/atl1e/atl1e_main.c
@@ -47,7 +47,7 @@ MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(DRV_VERSION);
 
-static inline void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
+static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
 
 static const u16
 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
@@ -1037,7 +1037,7 @@ static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
         return;
 }
 
-static inline void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
+static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
 {
         u32 value;
         struct atl1e_hw *hw = &adapter->hw;
diff --git a/drivers/net/atlx/atl1.c b/drivers/net/atlx/atl1.c
index f12e3d12474b..e6a7bb79d4df 100644
--- a/drivers/net/atlx/atl1.c
+++ b/drivers/net/atlx/atl1.c
@@ -1790,6 +1790,17 @@ static void atl1_rx_checksum(struct atl1_adapter *adapter,
 {
         struct pci_dev *pdev = adapter->pdev;
 
+        /*
+         * The L1 hardware contains a bug that erroneously sets the
+         * PACKET_FLAG_ERR and ERR_FLAG_L4_CHKSUM bits whenever a
+         * fragmented IP packet is received, even though the packet
+         * is perfectly valid and its checksum is correct. There's
+         * no way to distinguish between one of these good packets
+         * and a packet that actually contains a TCP/UDP checksum
+         * error, so all we can do is allow it to be handed up to
+         * the higher layers and let it be sorted out there.
+         */
+
         skb->ip_summed = CHECKSUM_NONE;
 
         if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
@@ -1816,14 +1827,6 @@ static void atl1_rx_checksum(struct atl1_adapter *adapter,
                 return;
         }
 
-        /* IPv4, but hardware thinks its checksum is wrong */
-        if (netif_msg_rx_err(adapter))
-                dev_printk(KERN_DEBUG, &pdev->dev,
-                        "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
-                        rrd->pkt_flg, rrd->err_flg);
-        skb->ip_summed = CHECKSUM_COMPLETE;
-        skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
-        adapter->hw_csum_err++;
         return;
 }
 
diff --git a/drivers/net/atp.c b/drivers/net/atp.c
index 3d4433358a36..c10cd8058e23 100644
--- a/drivers/net/atp.c
+++ b/drivers/net/atp.c
@@ -854,14 +854,9 @@ static void set_rx_mode_8002(struct net_device *dev)
         struct net_local *lp = netdev_priv(dev);
         long ioaddr = dev->base_addr;
 
-        if ( dev->mc_count > 0 || (dev->flags & (IFF_ALLMULTI|IFF_PROMISC))) {
-                /* We must make the kernel realise we had to move
-                 *      into promisc mode or we start all out war on
-                 *      the cable. - AC
-                 */
-                dev->flags|=IFF_PROMISC;
+        if (dev->mc_count > 0 || (dev->flags & (IFF_ALLMULTI|IFF_PROMISC)))
                 lp->addr_mode = CMR2h_PROMISC;
-        } else
+        else
                 lp->addr_mode = CMR2h_Normal;
         write_reg_high(ioaddr, CMR2, lp->addr_mode);
 }
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c
index cb8be490e5ae..5ee1b0557a02 100644
--- a/drivers/net/au1000_eth.c
+++ b/drivers/net/au1000_eth.c
@@ -807,7 +807,7 @@ err_out:
 static int au1000_init(struct net_device *dev)
 {
         struct au1000_private *aup = (struct au1000_private *) dev->priv;
-        u32 flags;
+        unsigned long flags;
         int i;
         u32 control;
 
diff --git a/drivers/net/ax88796.c b/drivers/net/ax88796.c
index 0b4adf4a0f7d..a886a4b9f7e5 100644
--- a/drivers/net/ax88796.c
+++ b/drivers/net/ax88796.c
@@ -554,7 +554,7 @@ static int ax_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 
         spin_lock_irqsave(&ax->mii_lock, flags);
         mii_ethtool_gset(&ax->mii, cmd);
-        spin_lock_irqsave(&ax->mii_lock, flags);
+        spin_unlock_irqrestore(&ax->mii_lock, flags);
 
         return 0;
 }
@@ -567,7 +567,7 @@ static int ax_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 
         spin_lock_irqsave(&ax->mii_lock, flags);
         rc = mii_ethtool_sset(&ax->mii, cmd);
-        spin_lock_irqsave(&ax->mii_lock, flags);
+        spin_unlock_irqrestore(&ax->mii_lock, flags);
 
         return rc;
 }
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 5ebde67d4297..2486a656f12d 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -35,8 +35,8 @@
 #include <linux/time.h>
 #include <linux/ethtool.h>
 #include <linux/mii.h>
-#ifdef NETIF_F_HW_VLAN_TX
 #include <linux/if_vlan.h>
+#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
 #define BCM_VLAN 1
 #endif
 #include <net/ip.h>
@@ -57,8 +57,8 @@
 
 #define DRV_MODULE_NAME         "bnx2"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "1.7.9"
-#define DRV_MODULE_RELDATE      "July 18, 2008"
+#define DRV_MODULE_VERSION      "1.8.0"
+#define DRV_MODULE_RELDATE      "Aug 14, 2008"
 
 #define RUN_AT(x) (jiffies + (x))
 
@@ -2876,6 +2876,8 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
                 struct sw_bd *rx_buf;
                 struct sk_buff *skb;
                 dma_addr_t dma_addr;
+                u16 vtag = 0;
+                int hw_vlan __maybe_unused = 0;
 
                 sw_ring_cons = RX_RING_IDX(sw_cons);
                 sw_ring_prod = RX_RING_IDX(sw_prod);
@@ -2919,7 +2921,7 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
                 if (len <= bp->rx_copy_thresh) {
                         struct sk_buff *new_skb;
 
-                        new_skb = netdev_alloc_skb(bp->dev, len + 2);
+                        new_skb = netdev_alloc_skb(bp->dev, len + 6);
                         if (new_skb == NULL) {
                                 bnx2_reuse_rx_skb(bp, rxr, skb, sw_ring_cons,
                                                   sw_ring_prod);
@@ -2928,9 +2930,9 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
 
                         /* aligned copy */
                         skb_copy_from_linear_data_offset(skb,
-                                                         BNX2_RX_OFFSET - 2,
-                                      new_skb->data, len + 2);
-                        skb_reserve(new_skb, 2);
+                                                         BNX2_RX_OFFSET - 6,
+                                      new_skb->data, len + 6);
+                        skb_reserve(new_skb, 6);
                         skb_put(new_skb, len);
 
                         bnx2_reuse_rx_skb(bp, rxr, skb,
@@ -2941,6 +2943,25 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
                            dma_addr, (sw_ring_cons << 16) | sw_ring_prod)))
                         goto next_rx;
 
+                if ((status & L2_FHDR_STATUS_L2_VLAN_TAG) &&
+                    !(bp->rx_mode & BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG)) {
+                        vtag = rx_hdr->l2_fhdr_vlan_tag;
+#ifdef BCM_VLAN
+                        if (bp->vlgrp)
+                                hw_vlan = 1;
+                        else
+#endif
+                        {
+                                struct vlan_ethhdr *ve = (struct vlan_ethhdr *)
+                                        __skb_push(skb, 4);
+
+                                memmove(ve, skb->data + 4, ETH_ALEN * 2);
+                                ve->h_vlan_proto = htons(ETH_P_8021Q);
+                                ve->h_vlan_TCI = htons(vtag);
+                                len += 4;
+                        }
+                }
+
                 skb->protocol = eth_type_trans(skb, bp->dev);
 
                 if ((len > (bp->dev->mtu + ETH_HLEN)) &&
@@ -2962,10 +2983,8 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
                 }
 
 #ifdef BCM_VLAN
-                if ((status & L2_FHDR_STATUS_L2_VLAN_TAG) && bp->vlgrp) {
-                        vlan_hwaccel_receive_skb(skb, bp->vlgrp,
-                                rx_hdr->l2_fhdr_vlan_tag);
-                }
+                if (hw_vlan)
+                        vlan_hwaccel_receive_skb(skb, bp->vlgrp, vtag);
                 else
 #endif
                         netif_receive_skb(skb);
@@ -3237,10 +3256,10 @@ bnx2_set_rx_mode(struct net_device *dev)
                                   BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG);
         sort_mode = 1 | BNX2_RPM_SORT_USER0_BC_EN;
 #ifdef BCM_VLAN
-        if (!bp->vlgrp && !(bp->flags & BNX2_FLAG_ASF_ENABLE))
+        if (!bp->vlgrp && (bp->flags & BNX2_FLAG_CAN_KEEP_VLAN))
                 rx_mode |= BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG;
 #else
-        if (!(bp->flags & BNX2_FLAG_ASF_ENABLE))
+        if (bp->flags & BNX2_FLAG_CAN_KEEP_VLAN)
                 rx_mode |= BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG;
 #endif
         if (dev->flags & IFF_PROMISC) {
@@ -5963,10 +5982,12 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
                 vlan_tag_flags |= TX_BD_FLAGS_TCP_UDP_CKSUM;
         }
 
+#ifdef BCM_VLAN
         if (bp->vlgrp && vlan_tx_tag_present(skb)) {
                 vlan_tag_flags |=
                         (TX_BD_FLAGS_VLAN_TAG | (vlan_tx_tag_get(skb) << 16));
         }
+#endif
         if ((mss = skb_shinfo(skb)->gso_size)) {
                 u32 tcp_opt_len, ip_tcp_len;
                 struct iphdr *iph;
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index 4bf4f7b205f2..b468f904c7f8 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -40,20 +40,20 @@
 #define DP(__mask, __fmt, __args...) do { \
         if (bp->msglevel & (__mask)) \
                 printk(DP_LEVEL "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
-                        bp->dev?(bp->dev->name):"?", ##__args); \
+                        bp->dev ? (bp->dev->name) : "?", ##__args); \
         } while (0)
 
 /* errors debug print */
 #define BNX2X_DBG_ERR(__fmt, __args...) do { \
         if (bp->msglevel & NETIF_MSG_PROBE) \
                 printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
-                        bp->dev?(bp->dev->name):"?", ##__args); \
+                        bp->dev ? (bp->dev->name) : "?", ##__args); \
         } while (0)
 
 /* for errors (never masked) */
 #define BNX2X_ERR(__fmt, __args...) do { \
         printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
-                bp->dev?(bp->dev->name):"?", ##__args); \
+                bp->dev ? (bp->dev->name) : "?", ##__args); \
         } while (0)
 
 /* before we have a dev->name use dev_info() */
@@ -120,16 +120,8 @@
 #define SHMEM_RD(bp, field)             REG_RD(bp, SHMEM_ADDR(bp, field))
 #define SHMEM_WR(bp, field, val)        REG_WR(bp, SHMEM_ADDR(bp, field), val)
 
-#define NIG_WR(reg, val)        REG_WR(bp, reg, val)
-#define EMAC_WR(reg, val)       REG_WR(bp, emac_base + reg, val)
-#define BMAC_WR(reg, val)       REG_WR(bp, GRCBASE_NIG + bmac_addr + reg, val)
-
-
-#define for_each_queue(bp, var) for (var = 0; var < bp->num_queues; var++)
-
-#define for_each_nondefault_queue(bp, var) \
-                                for (var = 1; var < bp->num_queues; var++)
-#define is_multi(bp)            (bp->num_queues > 1)
+#define EMAC_RD(bp, reg)                REG_RD(bp, emac_base + reg)
+#define EMAC_WR(bp, reg, val)           REG_WR(bp, emac_base + reg, val)
 
 
 /* fast path */
@@ -163,7 +155,7 @@ struct sw_rx_page {
 #define NUM_RX_SGE_PAGES                2
 #define RX_SGE_CNT              (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge))
 #define MAX_RX_SGE_CNT                  (RX_SGE_CNT - 2)
-/* RX_SGE_CNT is promissed to be a power of 2 */
+/* RX_SGE_CNT is promised to be a power of 2 */
 #define RX_SGE_MASK                     (RX_SGE_CNT - 1)
 #define NUM_RX_SGE                      (RX_SGE_CNT * NUM_RX_SGE_PAGES)
 #define MAX_RX_SGE                      (NUM_RX_SGE - 1)
@@ -258,8 +250,7 @@ struct bnx2x_fastpath {
 
         unsigned long           tx_pkt,
                                 rx_pkt,
-                                rx_calls,
-                                rx_alloc_failed;
+                                rx_calls;
         /* TPA related */
         struct sw_rx_bd         tpa_pool[ETH_MAX_AGGREGATION_QUEUES_E1H];
         u8                      tpa_state[ETH_MAX_AGGREGATION_QUEUES_E1H];
@@ -275,6 +266,15 @@ struct bnx2x_fastpath {
 
 #define bnx2x_fp(bp, nr, var)           (bp->fp[nr].var)
 
+#define BNX2X_HAS_TX_WORK(fp) \
+                        ((fp->tx_pkt_prod != le16_to_cpu(*fp->tx_cons_sb)) || \
+                         (fp->tx_pkt_prod != fp->tx_pkt_cons))
+
+#define BNX2X_HAS_RX_WORK(fp) \
+                        (fp->rx_comp_cons != le16_to_cpu(*fp->rx_cons_sb))
+
+#define BNX2X_HAS_WORK(fp)      (BNX2X_HAS_RX_WORK(fp) || BNX2X_HAS_TX_WORK(fp))
+
 
 /* MC hsi */
 #define MAX_FETCH_BD                    13      /* HW max BDs per packet */
@@ -317,7 +317,7 @@ struct bnx2x_fastpath {
 #define RCQ_BD(x)                       ((x) & MAX_RCQ_BD)
 
 
-/* This is needed for determening of last_max */
+/* This is needed for determining of last_max */
 #define SUB_S16(a, b)                   (s16)((s16)(a) - (s16)(b))
 
 #define __SGE_MASK_SET_BIT(el, bit) \
@@ -386,20 +386,28 @@ struct bnx2x_fastpath {
 #define TPA_TYPE(cqe_fp_flags)          ((cqe_fp_flags) & \
                                          (TPA_TYPE_START | TPA_TYPE_END))
 
-#define BNX2X_RX_SUM_OK(cqe) \
-                        (!(cqe->fast_path_cqe.status_flags & \
-                         (ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG | \
-                          ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG)))
+#define ETH_RX_ERROR_FALGS              ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG
+
+#define BNX2X_IP_CSUM_ERR(cqe) \
+                        (!((cqe)->fast_path_cqe.status_flags & \
+                           ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG) && \
+                         ((cqe)->fast_path_cqe.type_error_flags & \
+                          ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG))
+
+#define BNX2X_L4_CSUM_ERR(cqe) \
+                        (!((cqe)->fast_path_cqe.status_flags & \
+                           ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG) && \
+                         ((cqe)->fast_path_cqe.type_error_flags & \
+                          ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG))
+
+#define BNX2X_RX_CSUM_OK(cqe) \
+                        (!(BNX2X_L4_CSUM_ERR(cqe) || BNX2X_IP_CSUM_ERR(cqe)))
 
 #define BNX2X_RX_SUM_FIX(cqe) \
                         ((le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) & \
                           PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) == \
                          (1 << PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT))
 
-#define ETH_RX_ERROR_FALGS      (ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG | \
-                                 ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG | \
-                                 ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG)
-
 
 #define FP_USB_FUNC_OFF                 (2 + 2*HC_USTORM_SB_NUM_INDICES)
 #define FP_CSB_FUNC_OFF                 (2 + 2*HC_CSTORM_SB_NUM_INDICES)
@@ -647,6 +655,8 @@ struct bnx2x_eth_stats {
 
         u32 brb_drop_hi;
         u32 brb_drop_lo;
+        u32 brb_truncate_hi;
+        u32 brb_truncate_lo;
 
         u32 jabber_packets_received;
 
@@ -663,6 +673,9 @@ struct bnx2x_eth_stats {
         u32 mac_discard;
 
         u32 driver_xoff;
+        u32 rx_err_discard_pkt;
+        u32 rx_skb_alloc_failed;
+        u32 hw_csum_err;
 };
 
 #define STATS_OFFSET32(stat_name) \
@@ -753,7 +766,6 @@ struct bnx2x {
         u16                     def_att_idx;
         u32                     attn_state;
         struct attn_route       attn_group[MAX_DYNAMIC_ATTN_GRPS];
-        u32                     aeu_mask;
         u32                     nig_mask;
 
         /* slow path ring */
@@ -772,7 +784,7 @@ struct bnx2x {
         u8                      stats_pending;
         u8                      set_mac_pending;
 
-        /* End of fileds used in the performance code paths */
+        /* End of fields used in the performance code paths */
 
         int                     panic;
         int                     msglevel;
@@ -794,9 +806,6 @@ struct bnx2x {
 #define BP_FUNC(bp)                     (bp->func)
 #define BP_E1HVN(bp)                    (bp->func >> 1)
 #define BP_L_ID(bp)                     (BP_E1HVN(bp) << 2)
-/* assorted E1HVN */
-#define IS_E1HMF(bp)                    (bp->e1hmf != 0)
-#define BP_MAX_QUEUES(bp)               (IS_E1HMF(bp) ? 4 : 16)
 
         int                     pm_cap;
         int                     pcie_cap;
@@ -821,6 +830,7 @@ struct bnx2x {
         u32                     mf_config;
         u16                     e1hov;
         u8                      e1hmf;
+#define IS_E1HMF(bp)                    (bp->e1hmf != 0)
 
         u8                      wol;
 
@@ -836,7 +846,6 @@ struct bnx2x {
         u16                     rx_ticks_int;
         u16                     rx_ticks;
 
-        u32                     stats_ticks;
         u32                     lin_cnt;
 
         int                     state;
@@ -852,6 +861,7 @@ struct bnx2x {
 #define BNX2X_STATE_ERROR               0xf000
 
         int                     num_queues;
+#define BP_MAX_QUEUES(bp)               (IS_E1HMF(bp) ? 4 : 16)
 
         u32                     rx_mode;
 #define BNX2X_RX_MODE_NONE              0
@@ -902,10 +912,17 @@ struct bnx2x {
 };
 
 
+#define for_each_queue(bp, var) for (var = 0; var < bp->num_queues; var++)
+
+#define for_each_nondefault_queue(bp, var) \
+                                for (var = 1; var < bp->num_queues; var++)
+#define is_multi(bp)            (bp->num_queues > 1)
+
+
 void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32);
 void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
                       u32 len32);
-int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode);
+int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
 
 static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
                            int wait)
@@ -976,7 +993,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
 #define PCICFG_LINK_SPEED_SHIFT         16
 
 
-#define BNX2X_NUM_STATS                 39
+#define BNX2X_NUM_STATS                 42
 #define BNX2X_NUM_TESTS                 8
 
 #define BNX2X_MAC_LOOPBACK              0
@@ -1007,10 +1024,10 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
 /* resolution of the rate shaping timer - 100 usec */
 #define RS_PERIODIC_TIMEOUT_USEC        100
 /* resolution of fairness algorithm in usecs -
-   coefficient for clauclating the actuall t fair */
+   coefficient for calculating the actual t fair */
 #define T_FAIR_COEF                     10000000
 /* number of bytes in single QM arbitration cycle -
-   coeffiecnt for calculating the fairness timer */
+   coefficient for calculating the fairness timer */
 #define QM_ARB_BYTES                    40000
 #define FAIR_MEM                        2
 
diff --git a/drivers/net/bnx2x_fw_defs.h b/drivers/net/bnx2x_fw_defs.h
index e3da7f69d27b..192fa981b930 100644
--- a/drivers/net/bnx2x_fw_defs.h
+++ b/drivers/net/bnx2x_fw_defs.h
@@ -9,165 +9,171 @@
 
 
 #define CSTORM_ASSERT_LIST_INDEX_OFFSET \
-        (IS_E1H_OFFSET? 0x7000 : 0x1000)
+        (IS_E1H_OFFSET ? 0x7000 : 0x1000)
 #define CSTORM_ASSERT_LIST_OFFSET(idx) \
-        (IS_E1H_OFFSET? (0x7020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
+        (IS_E1H_OFFSET ? (0x7020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
 #define CSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
-        (IS_E1H_OFFSET? (0x8522 + ((function>>1) * 0x40) + ((function&1) \
-        * 0x100) + (index * 0x4)) : (0x1922 + (function * 0x40) + (index \
-        * 0x4)))
+        (IS_E1H_OFFSET ? (0x8522 + ((function>>1) * 0x40) + \
+        ((function&1) * 0x100) + (index * 0x4)) : (0x1922 + (function * \
+        0x40) + (index * 0x4)))
 #define CSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x8500 + ((function>>1) * 0x40) + ((function&1) \
-        * 0x100)) : (0x1900 + (function * 0x40)))
+        (IS_E1H_OFFSET ? (0x8500 + ((function>>1) * 0x40) + \
+        ((function&1) * 0x100)) : (0x1900 + (function * 0x40)))
 #define CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x8508 + ((function>>1) * 0x40) + ((function&1) \
-        * 0x100)) : (0x1908 + (function * 0x40)))
+        (IS_E1H_OFFSET ? (0x8508 + ((function>>1) * 0x40) + \
+        ((function&1) * 0x100)) : (0x1908 + (function * 0x40)))
 #define CSTORM_FUNCTION_MODE_OFFSET \
-        (IS_E1H_OFFSET? 0x11e8 : 0xffffffff)
+        (IS_E1H_OFFSET ? 0x11e8 : 0xffffffff)
 #define CSTORM_HC_BTR_OFFSET(port) \
-        (IS_E1H_OFFSET? (0x8704 + (port * 0xf0)) : (0x1984 + (port * 0xc0)))
+        (IS_E1H_OFFSET ? (0x8704 + (port * 0xf0)) : (0x1984 + (port * 0xc0)))
 #define CSTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index) \
-        (IS_E1H_OFFSET? (0x801a + (port * 0x280) + (cpu_id * 0x28) + \
+        (IS_E1H_OFFSET ? (0x801a + (port * 0x280) + (cpu_id * 0x28) + \
         (index * 0x4)) : (0x141a + (port * 0x280) + (cpu_id * 0x28) + \
         (index * 0x4)))
 #define CSTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index) \
-        (IS_E1H_OFFSET? (0x8018 + (port * 0x280) + (cpu_id * 0x28) + \
+        (IS_E1H_OFFSET ? (0x8018 + (port * 0x280) + (cpu_id * 0x28) + \
         (index * 0x4)) : (0x1418 + (port * 0x280) + (cpu_id * 0x28) + \
         (index * 0x4)))
 #define CSTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id) \
-        (IS_E1H_OFFSET? (0x8000 + (port * 0x280) + (cpu_id * 0x28)) : \
+        (IS_E1H_OFFSET ? (0x8000 + (port * 0x280) + (cpu_id * 0x28)) : \
         (0x1400 + (port * 0x280) + (cpu_id * 0x28)))
 #define CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, cpu_id) \
-        (IS_E1H_OFFSET? (0x8008 + (port * 0x280) + (cpu_id * 0x28)) : \
+        (IS_E1H_OFFSET ? (0x8008 + (port * 0x280) + (cpu_id * 0x28)) : \
         (0x1408 + (port * 0x280) + (cpu_id * 0x28)))
 #define CSTORM_STATS_FLAGS_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x1108 + (function * 0x8)) : (0x5108 + \
+        (IS_E1H_OFFSET ? (0x1108 + (function * 0x8)) : (0x5108 + \
         (function * 0x8)))
 #define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x31c0 + (function * 0x20)) : 0xffffffff)
+        (IS_E1H_OFFSET ? (0x31c0 + (function * 0x20)) : 0xffffffff)
 #define TSTORM_ASSERT_LIST_INDEX_OFFSET \
-        (IS_E1H_OFFSET? 0xa000 : 0x1000)
+        (IS_E1H_OFFSET ? 0xa000 : 0x1000)
 #define TSTORM_ASSERT_LIST_OFFSET(idx) \
-        (IS_E1H_OFFSET? (0xa020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
+        (IS_E1H_OFFSET ? (0xa020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
 #define TSTORM_CLIENT_CONFIG_OFFSET(port, client_id) \
-        (IS_E1H_OFFSET? (0x3358 + (port * 0x3e8) + (client_id * 0x28)) : \
-        (0x9c8 + (port * 0x2f8) + (client_id * 0x28)))
+        (IS_E1H_OFFSET ? (0x3358 + (port * 0x3e8) + (client_id * 0x28)) \
+        : (0x9c8 + (port * 0x2f8) + (client_id * 0x28)))
 #define TSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
-        (IS_E1H_OFFSET? (0xb01a + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0) + (index * 0x4)) : (0x141a + (function * 0x28) + (index * \
-        0x4)))
+        (IS_E1H_OFFSET ? (0xb01a + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0) + (index * 0x4)) : (0x141a + (function * \
+        0x28) + (index * 0x4)))
 #define TSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
-        (IS_E1H_OFFSET? (0xb000 + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0)) : (0x1400 + (function * 0x28)))
+        (IS_E1H_OFFSET ? (0xb000 + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0)) : (0x1400 + (function * 0x28)))
 #define TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
-        (IS_E1H_OFFSET? (0xb008 + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0)) : (0x1408 + (function * 0x28)))
+        (IS_E1H_OFFSET ? (0xb008 + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0)) : (0x1408 + (function * 0x28)))
 #define TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2b80 + (function * 0x8)) : (0x4b68 + \
+        (IS_E1H_OFFSET ? (0x2b80 + (function * 0x8)) : (0x4b68 + \
         (function * 0x8)))
 #define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x3000 + (function * 0x38)) : (0x1500 + \
+        (IS_E1H_OFFSET ? (0x3000 + (function * 0x38)) : (0x1500 + \
         (function * 0x38)))
 #define TSTORM_FUNCTION_MODE_OFFSET \
-        (IS_E1H_OFFSET? 0x1ad0 : 0xffffffff)
+        (IS_E1H_OFFSET ? 0x1ad0 : 0xffffffff)
 #define TSTORM_HC_BTR_OFFSET(port) \
-        (IS_E1H_OFFSET? (0xb144 + (port * 0x30)) : (0x1454 + (port * 0x18)))
+        (IS_E1H_OFFSET ? (0xb144 + (port * 0x30)) : (0x1454 + (port * 0x18)))
 #define TSTORM_INDIRECTION_TABLE_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x12c8 + (function * 0x80)) : (0x22c8 + \
+        (IS_E1H_OFFSET ? (0x12c8 + (function * 0x80)) : (0x22c8 + \
         (function * 0x80)))
 #define TSTORM_INDIRECTION_TABLE_SIZE 0x80
 #define TSTORM_MAC_FILTER_CONFIG_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x3008 + (function * 0x38)) : (0x1508 + \
+        (IS_E1H_OFFSET ? (0x3008 + (function * 0x38)) : (0x1508 + \
         (function * 0x38)))
+#define TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, stats_counter_id) \
+        (IS_E1H_OFFSET ? (0x2010 + (port * 0x5b0) + (stats_counter_id * \
+        0x50)) : (0x4000 + (port * 0x3f0) + (stats_counter_id * 0x38)))
 #define TSTORM_RX_PRODS_OFFSET(port, client_id) \
-        (IS_E1H_OFFSET? (0x3350 + (port * 0x3e8) + (client_id * 0x28)) : \
-        (0x9c0 + (port * 0x2f8) + (client_id * 0x28)))
+        (IS_E1H_OFFSET ? (0x3350 + (port * 0x3e8) + (client_id * 0x28)) \
+        : (0x9c0 + (port * 0x2f8) + (client_id * 0x28)))
 #define TSTORM_STATS_FLAGS_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2c00 + (function * 0x8)) : (0x4b88 + \
+        (IS_E1H_OFFSET ? (0x2c00 + (function * 0x8)) : (0x4b88 + \
         (function * 0x8)))
-#define TSTORM_TPA_EXIST_OFFSET (IS_E1H_OFFSET? 0x3b30 : 0x1c20)
-#define USTORM_AGG_DATA_OFFSET (IS_E1H_OFFSET? 0xa040 : 0x2c10)
-#define USTORM_AGG_DATA_SIZE (IS_E1H_OFFSET? 0x2440 : 0x1200)
+#define TSTORM_TPA_EXIST_OFFSET (IS_E1H_OFFSET ? 0x3b30 : 0x1c20)
+#define USTORM_AGG_DATA_OFFSET (IS_E1H_OFFSET ? 0xa040 : 0x2c10)
+#define USTORM_AGG_DATA_SIZE (IS_E1H_OFFSET ? 0x2440 : 0x1200)
 #define USTORM_ASSERT_LIST_INDEX_OFFSET \
-        (IS_E1H_OFFSET? 0x8000 : 0x1000)
+        (IS_E1H_OFFSET ? 0x8000 : 0x1000)
 #define USTORM_ASSERT_LIST_OFFSET(idx) \
-        (IS_E1H_OFFSET? (0x8020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
+        (IS_E1H_OFFSET ? (0x8020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
 #define USTORM_CQE_PAGE_BASE_OFFSET(port, clientId) \
-        (IS_E1H_OFFSET? (0x3298 + (port * 0x258) + (clientId * 0x18)) : \
+        (IS_E1H_OFFSET ? (0x3298 + (port * 0x258) + (clientId * 0x18)) : \
         (0x5450 + (port * 0x1c8) + (clientId * 0x18)))
 #define USTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
-        (IS_E1H_OFFSET? (0x951a + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0) + (index * 0x4)) : (0x191a + (function * 0x28) + (index * \
-        0x4)))
+        (IS_E1H_OFFSET ? (0x951a + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0) + (index * 0x4)) : (0x191a + (function * \
+        0x28) + (index * 0x4)))
 #define USTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x9500 + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0)) : (0x1900 + (function * 0x28)))
+        (IS_E1H_OFFSET ? (0x9500 + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0)) : (0x1900 + (function * 0x28)))
 #define USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x9508 + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0)) : (0x1908 + (function * 0x28)))
+        (IS_E1H_OFFSET ? (0x9508 + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0)) : (0x1908 + (function * 0x28)))
 #define USTORM_FUNCTION_MODE_OFFSET \
-        (IS_E1H_OFFSET? 0x2448 : 0xffffffff)
+        (IS_E1H_OFFSET ? 0x2448 : 0xffffffff)
 #define USTORM_HC_BTR_OFFSET(port) \
-        (IS_E1H_OFFSET? (0x9644 + (port * 0xd0)) : (0x1954 + (port * 0xb8)))
+        (IS_E1H_OFFSET ? (0x9644 + (port * 0xd0)) : (0x1954 + (port * 0xb8)))
 #define USTORM_MAX_AGG_SIZE_OFFSET(port, clientId) \
-        (IS_E1H_OFFSET? (0x3290 + (port * 0x258) + (clientId * 0x18)) : \
+        (IS_E1H_OFFSET ? (0x3290 + (port * 0x258) + (clientId * 0x18)) : \
         (0x5448 + (port * 0x1c8) + (clientId * 0x18)))
 #define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2408 + (function * 0x8)) : (0x5408 + \
+        (IS_E1H_OFFSET ? (0x2408 + (function * 0x8)) : (0x5408 + \
         (function * 0x8)))
 #define USTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index) \
-        (IS_E1H_OFFSET? (0x901a + (port * 0x280) + (cpu_id * 0x28) + \
+        (IS_E1H_OFFSET ? (0x901a + (port * 0x280) + (cpu_id * 0x28) + \
         (index * 0x4)) : (0x141a + (port * 0x280) + (cpu_id * 0x28) + \
         (index * 0x4)))
 #define USTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index) \
-        (IS_E1H_OFFSET? (0x9018 + (port * 0x280) + (cpu_id * 0x28) + \
+        (IS_E1H_OFFSET ? (0x9018 + (port * 0x280) + (cpu_id * 0x28) + \
         (index * 0x4)) : (0x1418 + (port * 0x280) + (cpu_id * 0x28) + \
         (index * 0x4)))
 #define USTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id) \
-        (IS_E1H_OFFSET? (0x9000 + (port * 0x280) + (cpu_id * 0x28)) : \
+        (IS_E1H_OFFSET ? (0x9000 + (port * 0x280) + (cpu_id * 0x28)) : \
         (0x1400 + (port * 0x280) + (cpu_id * 0x28)))
 #define USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, cpu_id) \
-        (IS_E1H_OFFSET? (0x9008 + (port * 0x280) + (cpu_id * 0x28)) : \
+        (IS_E1H_OFFSET ? (0x9008 + (port * 0x280) + (cpu_id * 0x28)) : \
         (0x1408 + (port * 0x280) + (cpu_id * 0x28)))
 #define XSTORM_ASSERT_LIST_INDEX_OFFSET \
-        (IS_E1H_OFFSET? 0x9000 : 0x1000)
+        (IS_E1H_OFFSET ? 0x9000 : 0x1000)
 #define XSTORM_ASSERT_LIST_OFFSET(idx) \
-        (IS_E1H_OFFSET? (0x9020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
+        (IS_E1H_OFFSET ? (0x9020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
 #define XSTORM_CMNG_PER_PORT_VARS_OFFSET(port) \
-        (IS_E1H_OFFSET? (0x24a8 + (port * 0x40)) : (0x3ba0 + (port * 0x40)))
+        (IS_E1H_OFFSET ? (0x24a8 + (port * 0x40)) : (0x3ba0 + (port * 0x40)))
 #define XSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
-        (IS_E1H_OFFSET? (0xa01a + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0) + (index * 0x4)) : (0x141a + (function * 0x28) + (index * \
-        0x4)))
+        (IS_E1H_OFFSET ? (0xa01a + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0) + (index * 0x4)) : (0x141a + (function * \
+        0x28) + (index * 0x4)))
 #define XSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
-        (IS_E1H_OFFSET? (0xa000 + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0)) : (0x1400 + (function * 0x28)))
+        (IS_E1H_OFFSET ? (0xa000 + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0)) : (0x1400 + (function * 0x28)))
 #define XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
-        (IS_E1H_OFFSET? (0xa008 + ((function>>1) * 0x28) + ((function&1) \
-        * 0xa0)) : (0x1408 + (function * 0x28)))
+        (IS_E1H_OFFSET ? (0xa008 + ((function>>1) * 0x28) + \
+        ((function&1) * 0xa0)) : (0x1408 + (function * 0x28)))
 #define XSTORM_E1HOV_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2ab8 + (function * 0x2)) : 0xffffffff)
+        (IS_E1H_OFFSET ? (0x2ab8 + (function * 0x2)) : 0xffffffff)
 #define XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2418 + (function * 0x8)) : (0x3b70 + \
+        (IS_E1H_OFFSET ? (0x2418 + (function * 0x8)) : (0x3b70 + \
         (function * 0x8)))
 #define XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2568 + (function * 0x70)) : (0x3c60 + \
+        (IS_E1H_OFFSET ? (0x2568 + (function * 0x70)) : (0x3c60 + \
         (function * 0x70)))
 #define XSTORM_FUNCTION_MODE_OFFSET \
-        (IS_E1H_OFFSET? 0x2ac8 : 0xffffffff)
+        (IS_E1H_OFFSET ? 0x2ac8 : 0xffffffff)
 #define XSTORM_HC_BTR_OFFSET(port) \
-        (IS_E1H_OFFSET? (0xa144 + (port * 0x30)) : (0x1454 + (port * 0x18)))
+        (IS_E1H_OFFSET ? (0xa144 + (port * 0x30)) : (0x1454 + (port * 0x18)))
+#define XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, stats_counter_id) \
+        (IS_E1H_OFFSET ? (0xc000 + (port * 0x3f0) + (stats_counter_id * \
+        0x38)) : (0x3378 + (port * 0x3f0) + (stats_counter_id * 0x38)))
 #define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2528 + (function * 0x70)) : (0x3c20 + \
+        (IS_E1H_OFFSET ? (0x2528 + (function * 0x70)) : (0x3c20 + \
         (function * 0x70)))
 #define XSTORM_SPQ_PAGE_BASE_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2000 + (function * 0x10)) : (0x3328 + \
+        (IS_E1H_OFFSET ? (0x2000 + (function * 0x10)) : (0x3328 + \
         (function * 0x10)))
 #define XSTORM_SPQ_PROD_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x2008 + (function * 0x10)) : (0x3330 + \
+        (IS_E1H_OFFSET ? (0x2008 + (function * 0x10)) : (0x3330 + \
         (function * 0x10)))
 #define XSTORM_STATS_FLAGS_OFFSET(function) \
-        (IS_E1H_OFFSET? (0x23d8 + (function * 0x8)) : (0x3b60 + \
+        (IS_E1H_OFFSET ? (0x23d8 + (function * 0x8)) : (0x3b60 + \
         (function * 0x8)))
 #define COMMON_ASM_INVALID_ASSERT_OPCODE 0x0
 
diff --git a/drivers/net/bnx2x_hsi.h b/drivers/net/bnx2x_hsi.h
index d3e8198d7dba..efd764427fa1 100644
--- a/drivers/net/bnx2x_hsi.h
+++ b/drivers/net/bnx2x_hsi.h
@@ -1268,7 +1268,7 @@ struct doorbell {
 
 
 /*
- * IGU driver acknowlegement register
+ * IGU driver acknowledgement register
  */
 struct igu_ack_register {
 #if defined(__BIG_ENDIAN)
@@ -1882,7 +1882,7 @@ struct timers_block_context {
 };
 
 /*
- * structure for easy accessability to assembler
+ * structure for easy accessibility to assembler
  */
 struct eth_tx_bd_flags {
         u8 as_bitfield;
@@ -2044,7 +2044,7 @@ struct eth_context {
 
 
 /*
- * ethernet doorbell
+ * Ethernet doorbell
  */
 struct eth_tx_doorbell {
 #if defined(__BIG_ENDIAN)
@@ -2256,7 +2256,7 @@ struct ramrod_data {
 };
 
 /*
- * union for ramrod data for ethernet protocol (CQE) (force size of 16 bits)
+ * union for ramrod data for Ethernet protocol (CQE) (force size of 16 bits)
  */
 union eth_ramrod_data {
         struct ramrod_data general;
@@ -2330,7 +2330,7 @@ struct spe_hdr {
 };
 
 /*
- * ethernet slow path element
+ * Ethernet slow path element
  */
 union eth_specific_data {
         u8 protocol_data[8];
@@ -2343,7 +2343,7 @@ union eth_specific_data {
 };
 
 /*
- * ethernet slow path element
+ * Ethernet slow path element
  */
 struct eth_spe {
         struct spe_hdr hdr;
@@ -2615,7 +2615,7 @@ struct tstorm_eth_rx_producers {
 
 
 /*
- * common flag to indicate existance of TPA.
+ * common flag to indicate existence of TPA.
  */
 struct tstorm_eth_tpa_exist {
 #if defined(__BIG_ENDIAN)
@@ -2765,7 +2765,7 @@ struct tstorm_common_stats {
 };
 
 /*
- * Eth statistics query sturcture for the eth_stats_quesry ramrod
+ * Eth statistics query structure for the eth_stats_query ramrod
  */
 struct eth_stats_query {
         struct xstorm_common_stats xstorm_common;
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h
index 4c7750789b62..130927cfc75b 100644
--- a/drivers/net/bnx2x_init.h
+++ b/drivers/net/bnx2x_init.h
@@ -72,26 +72,26 @@
 
 
 struct raw_op {
-        u32 op          :8;
-        u32 offset      :24;
+        u32 op:8;
+        u32 offset:24;
         u32 raw_data;
 };
 
 struct op_read {
-        u32 op          :8;
-        u32 offset      :24;
+        u32 op:8;
+        u32 offset:24;
         u32 pad;
 };
 
 struct op_write {
-        u32 op          :8;
-        u32 offset      :24;
+        u32 op:8;
+        u32 offset:24;
         u32 val;
 };
 
 struct op_string_write {
-        u32 op          :8;
-        u32 offset      :24;
+        u32 op:8;
+        u32 offset:24;
 #ifdef __LITTLE_ENDIAN
         u16 data_off;
         u16 data_len;
@@ -102,8 +102,8 @@ struct op_string_write {
 };
 
 struct op_zero {
-        u32 op          :8;
-        u32 offset      :24;
+        u32 op:8;
+        u32 offset:24;
         u32 len;
 };
 
@@ -208,7 +208,7 @@ static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data,
 /*********************************************************
    There are different blobs for each PRAM section.
    In addition, each blob write operation is divided into a few operations
-   in order to decrease the amount of phys. contigious buffer needed.
+   in order to decrease the amount of phys. contiguous buffer needed.
    Thus, when we select a blob the address may be with some offset
    from the beginning of PRAM section.
    The same holds for the INT_TABLE sections.
@@ -336,7 +336,7 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
                 len = op->str_wr.data_len;
                 data = data_base + op->str_wr.data_off;
 
-                /* carefull! it must be in order */
+                /* careful! it must be in order */
                 if (unlikely(op_type > OP_WB)) {
 
                         /* If E1 only */
@@ -740,7 +740,7 @@ static u8 calc_crc8(u32 data, u8 crc)
         return crc_res;
 }
 
-/* regiesers addresses are not in order
+/* registers addresses are not in order
    so these arrays help simplify the code */
 static const int cm_start[E1H_FUNC_MAX][9] = {
         {MISC_FUNC0_START, TCM_FUNC0_START, UCM_FUNC0_START, CCM_FUNC0_START,
diff --git a/drivers/net/bnx2x_init_values.h b/drivers/net/bnx2x_init_values.h
index 63019055e4bb..9755bf6b08dd 100644
--- a/drivers/net/bnx2x_init_values.h
+++ b/drivers/net/bnx2x_init_values.h
@@ -901,31 +901,28 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3760, 0x4},
         {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1e20, 0x42},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3738, 0x9},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3000, 0x400},
+        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4b68, 0x2},
         {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x3738 + 0x24, 0x10293},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x2c00, 0x2},
+        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x4b68 + 0x8, 0x20278},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3180, 0x42},
-        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x2c00 + 0x8, 0x20278},
+        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4b10, 0x2},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5000, 0x400},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4b68, 0x2},
+        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x2830, 0x2027a},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4000, 0x2},
-        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x4b68 + 0x8, 0x2027a},
         {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x4000 + 0x8, 0x20294},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4b10, 0x2},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6b68, 0x2},
-        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x2830, 0x2027c},
         {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x6b68 + 0x8, 0x20296},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6b10, 0x2},
         {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x74c0, 0x20298},
         {OP_WR, USEM_REG_FAST_MEMORY + 0x10800, 0x1000000},
-        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x10c00, 0x10027e},
+        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x10c00, 0x10027c},
         {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x10c00, 0x10029a},
         {OP_WR, USEM_REG_FAST_MEMORY + 0x10800, 0x0},
-        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x10c40, 0x10028e},
+        {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x10c40, 0x10028c},
         {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x10c40, 0x1002aa},
         {OP_ZP_E1, USEM_REG_INT_TABLE, 0xc20000},
         {OP_ZP_E1H, USEM_REG_INT_TABLE, 0xc40000},
-        {OP_WR_64_E1, USEM_REG_INT_TABLE + 0x368, 0x13029e},
+        {OP_WR_64_E1, USEM_REG_INT_TABLE + 0x368, 0x13029c},
         {OP_WR_64_E1H, USEM_REG_INT_TABLE + 0x368, 0x1302ba},
         {OP_ZP_E1, USEM_REG_PRAM, 0x311c0000},
         {OP_ZP_E1H, USEM_REG_PRAM, 0x31070000},
@@ -933,11 +930,11 @@ static const struct raw_op init_ops[] = {
         {OP_ZP_E1H, USEM_REG_PRAM + 0x8000, 0x330e0c42},
         {OP_ZP_E1, USEM_REG_PRAM + 0x10000, 0x38561919},
         {OP_ZP_E1H, USEM_REG_PRAM + 0x10000, 0x389b1906},
-        {OP_WR_64_E1, USEM_REG_PRAM + 0x17fe0, 0x500402a0},
+        {OP_WR_64_E1, USEM_REG_PRAM + 0x17fe0, 0x5004029e},
         {OP_ZP_E1H, USEM_REG_PRAM + 0x18000, 0x132272d},
         {OP_WR_64_E1H, USEM_REG_PRAM + 0x18250, 0x4fb602bc},
-#define USEM_COMMON_END         790
-#define USEM_PORT0_START        790
+#define USEM_COMMON_END         787
+#define USEM_PORT0_START        787
         {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1400, 0xa0},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x9000, 0xa0},
         {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1900, 0xa},
@@ -950,44 +947,27 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3288, 0x96},
         {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x5440, 0x72},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5000, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3000, 0x20},
+        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4b78, 0x52},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5100, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3100, 0x20},
+        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4e08, 0xc},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5200, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3200, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5300, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3300, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5400, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3400, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5500, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3500, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5600, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3600, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5700, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3700, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5800, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3800, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5900, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3900, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5a00, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3a00, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5b00, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3b00, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5c00, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3c00, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5d00, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3d00, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5e00, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3e00, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5f00, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3f00, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6b78, 0x52},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x2c10, 0x2},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6e08, 0xc},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4b78, 0x52},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4e08, 0xc},
-#define USEM_PORT0_END          838
-#define USEM_PORT1_START        838
+#define USEM_PORT0_END          818
+#define USEM_PORT1_START        818
         {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1680, 0xa0},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x9280, 0xa0},
         {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1928, 0xa},
@@ -1000,76 +980,59 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x34e0, 0x96},
         {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x5608, 0x72},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5080, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3080, 0x20},
+        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4cc0, 0x52},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5180, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3180, 0x20},
+        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4e38, 0xc},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5280, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3280, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5380, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3380, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5480, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3480, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5580, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3580, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5680, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3680, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5780, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3780, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5880, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3880, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5980, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3980, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5a80, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3a80, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5b80, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3b80, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5c80, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3c80, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5d80, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3d80, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5e80, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3e80, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5f80, 0x20},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x3f80, 0x20},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6cc0, 0x52},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x2c20, 0x2},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6e38, 0xc},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4cc0, 0x52},
-        {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4e38, 0xc},
-#define USEM_PORT1_END          886
-#define USEM_FUNC0_START        886
+#define USEM_PORT1_END          849
+#define USEM_FUNC0_START        849
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3000, 0x4},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4010, 0x2},
-#define USEM_FUNC0_END          888
-#define USEM_FUNC1_START        888
+#define USEM_FUNC0_END          851
+#define USEM_FUNC1_START        851
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3010, 0x4},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4020, 0x2},
-#define USEM_FUNC1_END          890
-#define USEM_FUNC2_START        890
+#define USEM_FUNC1_END          853
+#define USEM_FUNC2_START        853
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3020, 0x4},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4030, 0x2},
-#define USEM_FUNC2_END          892
-#define USEM_FUNC3_START        892
+#define USEM_FUNC2_END          855
+#define USEM_FUNC3_START        855
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3030, 0x4},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4040, 0x2},
-#define USEM_FUNC3_END          894
-#define USEM_FUNC4_START        894
+#define USEM_FUNC3_END          857
+#define USEM_FUNC4_START        857
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3040, 0x4},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4050, 0x2},
-#define USEM_FUNC4_END          896
-#define USEM_FUNC5_START        896
+#define USEM_FUNC4_END          859
+#define USEM_FUNC5_START        859
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3050, 0x4},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4060, 0x2},
-#define USEM_FUNC5_END          898
-#define USEM_FUNC6_START        898
+#define USEM_FUNC5_END          861
+#define USEM_FUNC6_START        861
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3060, 0x4},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4070, 0x2},
-#define USEM_FUNC6_END          900
-#define USEM_FUNC7_START        900
+#define USEM_FUNC6_END          863
+#define USEM_FUNC7_START        863
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3070, 0x4},
         {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4080, 0x2},
-#define USEM_FUNC7_END          902
-#define CSEM_COMMON_START       902
+#define USEM_FUNC7_END          865
+#define CSEM_COMMON_START       865
         {OP_RD, CSEM_REG_MSG_NUM_FIC0, 0x0},
         {OP_RD, CSEM_REG_MSG_NUM_FIC1, 0x0},
         {OP_RD, CSEM_REG_MSG_NUM_FOC0, 0x0},
@@ -1128,29 +1091,29 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x11e8, 0x0},
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x25c0, 0x240},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3000, 0xc0},
-        {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x2ec8, 0x802a2},
+        {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x2ec8, 0x802a0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x4070, 0x80},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x5280, 0x4},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6280, 0x240},
         {OP_SW_E1H, CSEM_REG_FAST_MEMORY + 0x6b88, 0x2002be},
         {OP_WR, CSEM_REG_FAST_MEMORY + 0x10800, 0x13fffff},
-        {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x10c00, 0x1002aa},
+        {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x10c00, 0x1002a8},
         {OP_SW_E1H, CSEM_REG_FAST_MEMORY + 0x10c00, 0x1002de},
         {OP_WR, CSEM_REG_FAST_MEMORY + 0x10800, 0x0},
-        {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x10c40, 0x1002ba},
+        {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x10c40, 0x1002b8},
         {OP_SW_E1H, CSEM_REG_FAST_MEMORY + 0x10c40, 0x1002ee},
         {OP_ZP_E1, CSEM_REG_INT_TABLE, 0x6e0000},
         {OP_ZP_E1H, CSEM_REG_INT_TABLE, 0x6f0000},
-        {OP_WR_64_E1, CSEM_REG_INT_TABLE + 0x380, 0x1002ca},
+        {OP_WR_64_E1, CSEM_REG_INT_TABLE + 0x380, 0x1002c8},
         {OP_WR_64_E1H, CSEM_REG_INT_TABLE + 0x380, 0x1002fe},
         {OP_ZP_E1, CSEM_REG_PRAM, 0x32580000},
         {OP_ZP_E1H, CSEM_REG_PRAM, 0x31fa0000},
         {OP_ZP_E1, CSEM_REG_PRAM + 0x8000, 0x18270c96},
         {OP_ZP_E1H, CSEM_REG_PRAM + 0x8000, 0x19040c7f},
-        {OP_WR_64_E1, CSEM_REG_PRAM + 0xb210, 0x682402cc},
+        {OP_WR_64_E1, CSEM_REG_PRAM + 0xb210, 0x682402ca},
         {OP_WR_64_E1H, CSEM_REG_PRAM + 0xb430, 0x67e00300},
-#define CSEM_COMMON_END         981
-#define CSEM_PORT0_START        981
+#define CSEM_COMMON_END         944
+#define CSEM_PORT0_START        944
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1400, 0xa0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x8000, 0xa0},
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1900, 0x10},
@@ -1163,8 +1126,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6040, 0x30},
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x3040, 0x6},
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x2410, 0x30},
-#define CSEM_PORT0_END          993
-#define CSEM_PORT1_START        993
+#define CSEM_PORT0_END          956
+#define CSEM_PORT1_START        956
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1680, 0xa0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x8280, 0xa0},
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1940, 0x10},
@@ -1177,43 +1140,43 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6100, 0x30},
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x3058, 0x6},
         {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x24d0, 0x30},
-#define CSEM_PORT1_END          1005
-#define CSEM_FUNC0_START        1005
+#define CSEM_PORT1_END          968
+#define CSEM_FUNC0_START        968
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1148, 0x0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3300, 0x2},
-#define CSEM_FUNC0_END          1007
-#define CSEM_FUNC1_START        1007
+#define CSEM_FUNC0_END          970
+#define CSEM_FUNC1_START        970
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x114c, 0x0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3308, 0x2},
-#define CSEM_FUNC1_END          1009
-#define CSEM_FUNC2_START        1009
+#define CSEM_FUNC1_END          972
+#define CSEM_FUNC2_START        972
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1150, 0x0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3310, 0x2},
-#define CSEM_FUNC2_END          1011
-#define CSEM_FUNC3_START        1011
+#define CSEM_FUNC2_END          974
+#define CSEM_FUNC3_START        974
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1154, 0x0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3318, 0x2},
-#define CSEM_FUNC3_END          1013
-#define CSEM_FUNC4_START        1013
+#define CSEM_FUNC3_END          976
+#define CSEM_FUNC4_START        976
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1158, 0x0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3320, 0x2},
-#define CSEM_FUNC4_END          1015
-#define CSEM_FUNC5_START        1015
+#define CSEM_FUNC4_END          978
+#define CSEM_FUNC5_START        978
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x115c, 0x0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3328, 0x2},
-#define CSEM_FUNC5_END          1017
-#define CSEM_FUNC6_START        1017
+#define CSEM_FUNC5_END          980
+#define CSEM_FUNC6_START        980
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1160, 0x0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3330, 0x2},
-#define CSEM_FUNC6_END          1019
-#define CSEM_FUNC7_START        1019
+#define CSEM_FUNC6_END          982
+#define CSEM_FUNC7_START        982
         {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1164, 0x0},
         {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3338, 0x2},
-#define CSEM_FUNC7_END          1021
-#define XPB_COMMON_START        1021
+#define CSEM_FUNC7_END          984
+#define XPB_COMMON_START        984
         {OP_WR, GRCBASE_XPB + PB_REG_CONTROL, 0x20},
-#define XPB_COMMON_END          1022
-#define DQ_COMMON_START         1022
+#define XPB_COMMON_END          985
+#define DQ_COMMON_START         985
         {OP_WR, DORQ_REG_MODE_ACT, 0x2},
         {OP_WR, DORQ_REG_NORM_CID_OFST, 0x3},
         {OP_WR, DORQ_REG_OUTST_REQ, 0x4},
@@ -1232,8 +1195,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR, DORQ_REG_DQ_FIFO_AFULL_TH, 0x76c},
         {OP_WR, DORQ_REG_REGN, 0x7c1004},
         {OP_WR, DORQ_REG_IF_EN, 0xf},
-#define DQ_COMMON_END           1040
-#define TIMERS_COMMON_START     1040
+#define DQ_COMMON_END           1003
+#define TIMERS_COMMON_START     1003
         {OP_ZR, TM_REG_CLIN_PRIOR0_CLIENT, 0x2},
         {OP_WR, TM_REG_LIN_SETCLR_FIFO_ALFULL_THR, 0x1c},
         {OP_WR, TM_REG_CFC_AC_CRDCNT_VAL, 0x1},
@@ -1256,14 +1219,14 @@ static const struct raw_op init_ops[] = {
         {OP_WR, TM_REG_EN_CL0_INPUT, 0x1},
         {OP_WR, TM_REG_EN_CL1_INPUT, 0x1},
         {OP_WR, TM_REG_EN_CL2_INPUT, 0x1},
-#define TIMERS_COMMON_END       1062
-#define TIMERS_PORT0_START      1062
+#define TIMERS_COMMON_END       1025
+#define TIMERS_PORT0_START      1025
         {OP_ZR, TM_REG_LIN0_PHY_ADDR, 0x2},
-#define TIMERS_PORT0_END        1063
-#define TIMERS_PORT1_START      1063
+#define TIMERS_PORT0_END        1026
+#define TIMERS_PORT1_START      1026
         {OP_ZR, TM_REG_LIN1_PHY_ADDR, 0x2},
-#define TIMERS_PORT1_END        1064
-#define XSDM_COMMON_START       1064
+#define TIMERS_PORT1_END        1027
+#define XSDM_COMMON_START       1027
         {OP_WR_E1, XSDM_REG_CFC_RSP_START_ADDR, 0x614},
         {OP_WR_E1H, XSDM_REG_CFC_RSP_START_ADDR, 0x424},
         {OP_WR_E1, XSDM_REG_CMP_COUNTER_START_ADDR, 0x600},
@@ -1311,8 +1274,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_ASIC, XSDM_REG_TIMER_TICK, 0x3e8},
         {OP_WR_EMUL, XSDM_REG_TIMER_TICK, 0x1},
         {OP_WR_FPGA, XSDM_REG_TIMER_TICK, 0xa},
-#define XSDM_COMMON_END         1111
-#define QM_COMMON_START         1111
+#define XSDM_COMMON_END         1074
+#define QM_COMMON_START         1074
         {OP_WR, QM_REG_ACTCTRINITVAL_0, 0x6},
         {OP_WR, QM_REG_ACTCTRINITVAL_1, 0x5},
         {OP_WR, QM_REG_ACTCTRINITVAL_2, 0xa},
@@ -1613,8 +1576,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, QM_REG_PQ2PCIFUNC_6, 0x5},
         {OP_WR_E1H, QM_REG_PQ2PCIFUNC_7, 0x7},
         {OP_WR, QM_REG_CMINTEN, 0xff},
-#define QM_COMMON_END           1411
-#define PBF_COMMON_START        1411
+#define QM_COMMON_END           1374
+#define PBF_COMMON_START        1374
         {OP_WR, PBF_REG_INIT, 0x1},
         {OP_WR, PBF_REG_INIT_P4, 0x1},
         {OP_WR, PBF_REG_MAC_LB_ENABLE, 0x1},
@@ -1622,20 +1585,20 @@ static const struct raw_op init_ops[] = {
         {OP_WR, PBF_REG_INIT_P4, 0x0},
         {OP_WR, PBF_REG_INIT, 0x0},
         {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P4, 0x0},
-#define PBF_COMMON_END          1418
-#define PBF_PORT0_START         1418
+#define PBF_COMMON_END          1381
+#define PBF_PORT0_START         1381
         {OP_WR, PBF_REG_INIT_P0, 0x1},
         {OP_WR, PBF_REG_MAC_IF0_ENABLE, 0x1},
         {OP_WR, PBF_REG_INIT_P0, 0x0},
         {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P0, 0x0},
-#define PBF_PORT0_END           1422
-#define PBF_PORT1_START         1422
+#define PBF_PORT0_END           1385
+#define PBF_PORT1_START         1385
         {OP_WR, PBF_REG_INIT_P1, 0x1},
         {OP_WR, PBF_REG_MAC_IF1_ENABLE, 0x1},
         {OP_WR, PBF_REG_INIT_P1, 0x0},
         {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P1, 0x0},
-#define PBF_PORT1_END           1426
-#define XCM_COMMON_START        1426
+#define PBF_PORT1_END           1389
+#define XCM_COMMON_START        1389
         {OP_WR, XCM_REG_XX_OVFL_EVNT_ID, 0x32},
         {OP_WR, XCM_REG_XQM_XCM_HDR_P, 0x3150020},
         {OP_WR, XCM_REG_XQM_XCM_HDR_S, 0x3150020},
@@ -1670,7 +1633,7 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1, XCM_REG_XX_MSG_NUM, 0x1f},
         {OP_WR_E1H, XCM_REG_XX_MSG_NUM, 0x20},
         {OP_ZR, XCM_REG_XX_TABLE, 0x12},
-        {OP_SW_E1, XCM_REG_XX_DESCR_TABLE, 0x1f02ce},
+        {OP_SW_E1, XCM_REG_XX_DESCR_TABLE, 0x1f02cc},
         {OP_SW_E1H, XCM_REG_XX_DESCR_TABLE, 0x1f0302},
         {OP_WR, XCM_REG_N_SM_CTX_LD_0, 0xf},
         {OP_WR, XCM_REG_N_SM_CTX_LD_1, 0x7},
@@ -1700,8 +1663,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR, XCM_REG_CDU_SM_WR_IFEN, 0x1},
         {OP_WR, XCM_REG_CDU_SM_RD_IFEN, 0x1},
         {OP_WR, XCM_REG_XCM_CFC_IFEN, 0x1},
-#define XCM_COMMON_END          1490
-#define XCM_PORT0_START         1490
+#define XCM_COMMON_END          1453
+#define XCM_PORT0_START         1453
         {OP_WR_E1, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
         {OP_WR_E1, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
         {OP_WR_E1, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
@@ -1710,8 +1673,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1, XCM_REG_WU_DA_CNT_CMD10, 0x2},
         {OP_WR_E1, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
         {OP_WR_E1, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
-#define XCM_PORT0_END           1498
-#define XCM_PORT1_START         1498
+#define XCM_PORT0_END           1461
+#define XCM_PORT1_START         1461
         {OP_WR_E1, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
         {OP_WR_E1, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
         {OP_WR_E1, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
@@ -1720,8 +1683,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1, XCM_REG_WU_DA_CNT_CMD11, 0x2},
         {OP_WR_E1, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
         {OP_WR_E1, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
-#define XCM_PORT1_END           1506
-#define XCM_FUNC0_START         1506
+#define XCM_PORT1_END           1469
+#define XCM_FUNC0_START         1469
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
         {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
@@ -1731,8 +1694,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
         {OP_WR_E1H, XCM_REG_PHYS_QNUM3_0, 0x0},
-#define XCM_FUNC0_END           1515
-#define XCM_FUNC1_START         1515
+#define XCM_FUNC0_END           1478
+#define XCM_FUNC1_START         1478
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
         {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
@@ -1742,8 +1705,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
         {OP_WR_E1H, XCM_REG_PHYS_QNUM3_1, 0x0},
-#define XCM_FUNC1_END           1524
-#define XCM_FUNC2_START         1524
+#define XCM_FUNC1_END           1487
+#define XCM_FUNC2_START         1487
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
         {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
@@ -1753,8 +1716,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
         {OP_WR_E1H, XCM_REG_PHYS_QNUM3_0, 0x0},
-#define XCM_FUNC2_END           1533
-#define XCM_FUNC3_START         1533
+#define XCM_FUNC2_END           1496
+#define XCM_FUNC3_START         1496
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
         {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
@@ -1764,8 +1727,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
         {OP_WR_E1H, XCM_REG_PHYS_QNUM3_1, 0x0},
-#define XCM_FUNC3_END           1542
-#define XCM_FUNC4_START         1542
+#define XCM_FUNC3_END           1505
+#define XCM_FUNC4_START         1505
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
         {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
@@ -1775,8 +1738,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
         {OP_WR_E1H, XCM_REG_PHYS_QNUM3_0, 0x0},
-#define XCM_FUNC4_END           1551
-#define XCM_FUNC5_START         1551
+#define XCM_FUNC4_END           1514
+#define XCM_FUNC5_START         1514
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
         {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
@@ -1786,8 +1749,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
         {OP_WR_E1H, XCM_REG_PHYS_QNUM3_1, 0x0},
-#define XCM_FUNC5_END           1560
-#define XCM_FUNC6_START         1560
+#define XCM_FUNC5_END           1523
+#define XCM_FUNC6_START         1523
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
         {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
@@ -1797,8 +1760,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
         {OP_WR_E1H, XCM_REG_PHYS_QNUM3_0, 0x0},
-#define XCM_FUNC6_END           1569
-#define XCM_FUNC7_START         1569
+#define XCM_FUNC6_END           1532
+#define XCM_FUNC7_START         1532
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
         {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
         {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
@@ -1808,8 +1771,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
         {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
         {OP_WR_E1H, XCM_REG_PHYS_QNUM3_1, 0x0},
-#define XCM_FUNC7_END           1578
-#define XSEM_COMMON_START       1578
+#define XCM_FUNC7_END           1541
+#define XSEM_COMMON_START       1541
         {OP_RD, XSEM_REG_MSG_NUM_FIC0, 0x0},
         {OP_RD, XSEM_REG_MSG_NUM_FIC1, 0x0},
         {OP_RD, XSEM_REG_MSG_NUM_FOC0, 0x0},
@@ -1876,9 +1839,9 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x9000, 0x2},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x3368, 0x0},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x21a8, 0x86},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3370, 0x202ed},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3370, 0x202eb},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2000, 0x20},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3b90, 0x402ef},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3b90, 0x402ed},
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x23c8, 0x0},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1518, 0x1},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x23d0, 0x20321},
@@ -1886,29 +1849,29 @@ static const struct raw_op init_ops[] = {
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2498, 0x40323},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1838, 0x0},
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x2ac8, 0x0},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x1820, 0x202f3},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x1820, 0x202f1},
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x2ab8, 0x0},
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4ac0, 0x2},
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x3010, 0x1},
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4b00, 0x4},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x4040, 0x10},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x1f50, 0x202f5},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x1f50, 0x202f3},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x4000, 0x100327},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6ac0, 0x2},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6b00, 0x4},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x83b0, 0x20337},
         {OP_WR, XSEM_REG_FAST_MEMORY + 0x10800, 0x0},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c00, 0x1002f7},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c00, 0x1002f5},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x10c00, 0x100339},
         {OP_WR, XSEM_REG_FAST_MEMORY + 0x10800, 0x1000000},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c40, 0x80307},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c40, 0x80305},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x10c40, 0x80349},
         {OP_WR, XSEM_REG_FAST_MEMORY + 0x10800, 0x2000000},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c60, 0x8030f},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c60, 0x8030d},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x10c60, 0x80351},
         {OP_ZP_E1, XSEM_REG_INT_TABLE, 0xa90000},
         {OP_ZP_E1H, XSEM_REG_INT_TABLE, 0xac0000},
-        {OP_WR_64_E1, XSEM_REG_INT_TABLE + 0x368, 0x130317},
+        {OP_WR_64_E1, XSEM_REG_INT_TABLE + 0x368, 0x130315},
         {OP_WR_64_E1H, XSEM_REG_INT_TABLE + 0x368, 0x130359},
         {OP_ZP_E1, XSEM_REG_PRAM, 0x344e0000},
         {OP_ZP_E1H, XSEM_REG_PRAM, 0x34620000},
@@ -1918,10 +1881,10 @@ static const struct raw_op init_ops[] = {
         {OP_ZP_E1H, XSEM_REG_PRAM + 0x10000, 0x3e971b22},
         {OP_ZP_E1, XSEM_REG_PRAM + 0x18000, 0x1dd02ad2},
         {OP_ZP_E1H, XSEM_REG_PRAM + 0x18000, 0x21542ac8},
-        {OP_WR_64_E1, XSEM_REG_PRAM + 0x1c0d0, 0x47e60319},
+        {OP_WR_64_E1, XSEM_REG_PRAM + 0x1c0d0, 0x47e60317},
         {OP_WR_64_E1H, XSEM_REG_PRAM + 0x1c8d0, 0x46e6035b},
-#define XSEM_COMMON_END         1688
-#define XSEM_PORT0_START        1688
+#define XSEM_COMMON_END         1651
+#define XSEM_PORT0_START        1651
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3ba0, 0x10},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xc000, 0xfc},
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3c20, 0x1c},
@@ -1934,7 +1897,7 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x26e8, 0x1c},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x3b58, 0x0},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x27c8, 0x1c},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3d10, 0x10031b},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3d10, 0x100319},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xa000, 0x28},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1500, 0x0},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xa140, 0xc},
@@ -1950,12 +1913,12 @@ static const struct raw_op init_ops[] = {
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x6ac8, 0x2035d},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x50b8, 0x1},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6b10, 0x42},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x4ac8, 0x2032b},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x4ac8, 0x20329},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6d20, 0x4},
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4b10, 0x42},
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4d20, 0x4},
-#define XSEM_PORT0_END          1720
-#define XSEM_PORT1_START        1720
+#define XSEM_PORT0_END          1683
+#define XSEM_PORT1_START        1683
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3be0, 0x10},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xc3f0, 0xfc},
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3c90, 0x1c},
@@ -1968,7 +1931,7 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2758, 0x1c},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x3b5c, 0x0},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2838, 0x1c},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3d50, 0x10032d},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3d50, 0x10032b},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xa0a0, 0x28},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1504, 0x0},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xa170, 0xc},
@@ -1984,65 +1947,65 @@ static const struct raw_op init_ops[] = {
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x6ad0, 0x2035f},
         {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x50bc, 0x1},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6c18, 0x42},
-        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x4ad0, 0x2033d},
+        {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x4ad0, 0x2033b},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6d30, 0x4},
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4c18, 0x42},
         {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4d30, 0x4},
-#define XSEM_PORT1_END          1752
-#define XSEM_FUNC0_START        1752
+#define XSEM_PORT1_END          1715
+#define XSEM_FUNC0_START        1715
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7e0, 0x0},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x28b8, 0x100361},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5048, 0xe},
-#define XSEM_FUNC0_END          1755
-#define XSEM_FUNC1_START        1755
+#define XSEM_FUNC0_END          1718
+#define XSEM_FUNC1_START        1718
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7e4, 0x0},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x28f8, 0x100371},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5080, 0xe},
-#define XSEM_FUNC1_END          1758
-#define XSEM_FUNC2_START        1758
+#define XSEM_FUNC1_END          1721
+#define XSEM_FUNC2_START        1721
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7e8, 0x0},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2938, 0x100381},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x50b8, 0xe},
-#define XSEM_FUNC2_END          1761
-#define XSEM_FUNC3_START        1761
+#define XSEM_FUNC2_END          1724
+#define XSEM_FUNC3_START        1724
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7ec, 0x0},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2978, 0x100391},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x50f0, 0xe},
-#define XSEM_FUNC3_END          1764
-#define XSEM_FUNC4_START        1764
+#define XSEM_FUNC3_END          1727
+#define XSEM_FUNC4_START        1727
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7f0, 0x0},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x29b8, 0x1003a1},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5128, 0xe},
-#define XSEM_FUNC4_END          1767
-#define XSEM_FUNC5_START        1767
+#define XSEM_FUNC4_END          1730
+#define XSEM_FUNC5_START        1730
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7f4, 0x0},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x29f8, 0x1003b1},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5160, 0xe},
-#define XSEM_FUNC5_END          1770
-#define XSEM_FUNC6_START        1770
+#define XSEM_FUNC5_END          1733
+#define XSEM_FUNC6_START        1733
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7f8, 0x0},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2a38, 0x1003c1},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5198, 0xe},
-#define XSEM_FUNC6_END          1773
-#define XSEM_FUNC7_START        1773
+#define XSEM_FUNC6_END          1736
+#define XSEM_FUNC7_START        1736
         {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7fc, 0x0},
         {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2a78, 0x1003d1},
         {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x51d0, 0xe},
-#define XSEM_FUNC7_END          1776
-#define CDU_COMMON_START        1776
+#define XSEM_FUNC7_END          1739
+#define CDU_COMMON_START        1739
         {OP_WR, CDU_REG_CDU_CONTROL0, 0x1},
         {OP_WR_E1H, CDU_REG_MF_MODE, 0x1},
         {OP_WR, CDU_REG_CDU_CHK_MASK0, 0x3d000},
         {OP_WR, CDU_REG_CDU_CHK_MASK1, 0x3d},
-        {OP_WB_E1, CDU_REG_L1TT, 0x200033f},
+        {OP_WB_E1, CDU_REG_L1TT, 0x200033d},
         {OP_WB_E1H, CDU_REG_L1TT, 0x20003e1},
-        {OP_WB_E1, CDU_REG_MATT, 0x20053f},
+        {OP_WB_E1, CDU_REG_MATT, 0x20053d},
         {OP_WB_E1H, CDU_REG_MATT, 0x2805e1},
         {OP_ZR_E1, CDU_REG_MATT + 0x80, 0x2},
-        {OP_WB_E1, CDU_REG_MATT + 0x88, 0x6055f},
+        {OP_WB_E1, CDU_REG_MATT + 0x88, 0x6055d},
         {OP_ZR, CDU_REG_MATT + 0xa0, 0x18},
-#define CDU_COMMON_END          1787
-#define DMAE_COMMON_START       1787
+#define CDU_COMMON_END          1750
+#define DMAE_COMMON_START       1750
         {OP_ZR, DMAE_REG_CMD_MEM, 0xe0},
         {OP_WR, DMAE_REG_CRC16C_INIT, 0x0},
         {OP_WR, DMAE_REG_CRC16T10_INIT, 0x1},
@@ -2050,24 +2013,24 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, DMAE_REG_PXP_REQ_INIT_CRD, 0x2},
         {OP_WR, DMAE_REG_PCI_IFEN, 0x1},
         {OP_WR, DMAE_REG_GRC_IFEN, 0x1},
-#define DMAE_COMMON_END         1794
-#define PXP_COMMON_START        1794
-        {OP_WB_E1, PXP_REG_HST_INBOUND_INT + 0x400, 0x50565},
+#define DMAE_COMMON_END         1757
+#define PXP_COMMON_START        1757
+        {OP_WB_E1, PXP_REG_HST_INBOUND_INT + 0x400, 0x50563},
         {OP_WB_E1H, PXP_REG_HST_INBOUND_INT + 0x400, 0x50609},
-        {OP_WB_E1, PXP_REG_HST_INBOUND_INT + 0x420, 0x5056a},
+        {OP_WB_E1, PXP_REG_HST_INBOUND_INT + 0x420, 0x50568},
         {OP_WB_E1H, PXP_REG_HST_INBOUND_INT, 0x5060e},
-        {OP_WB_E1, PXP_REG_HST_INBOUND_INT, 0x5056f},
-#define PXP_COMMON_END          1799
-#define CFC_COMMON_START        1799
+        {OP_WB_E1, PXP_REG_HST_INBOUND_INT, 0x5056d},
+#define PXP_COMMON_END          1762
+#define CFC_COMMON_START        1762
         {OP_ZR_E1H, CFC_REG_LINK_LIST, 0x100},
         {OP_WR, CFC_REG_CONTROL0, 0x10},
         {OP_WR, CFC_REG_DISABLE_ON_ERROR, 0x3fff},
         {OP_WR, CFC_REG_LCREQ_WEIGHTS, 0x84924a},
-#define CFC_COMMON_END          1803
-#define HC_COMMON_START         1803
+#define CFC_COMMON_END          1766
+#define HC_COMMON_START         1766
         {OP_ZR_E1, HC_REG_USTORM_ADDR_FOR_COALESCE, 0x4},
-#define HC_COMMON_END           1804
-#define HC_PORT0_START          1804
+#define HC_COMMON_END           1767
+#define HC_PORT0_START          1767
         {OP_WR_E1, HC_REG_CONFIG_0, 0x1080},
         {OP_ZR_E1, HC_REG_UC_RAM_ADDR_0, 0x2},
         {OP_WR_E1, HC_REG_ATTN_NUM_P0, 0x10},
@@ -2086,8 +2049,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
         {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
         {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
-#define HC_PORT0_END            1822
-#define HC_PORT1_START          1822
+#define HC_PORT0_END            1785
+#define HC_PORT1_START          1785
         {OP_WR_E1, HC_REG_CONFIG_1, 0x1080},
         {OP_ZR_E1, HC_REG_UC_RAM_ADDR_1, 0x2},
         {OP_WR_E1, HC_REG_ATTN_NUM_P1, 0x10},
@@ -2106,8 +2069,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
         {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
         {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
-#define HC_PORT1_END            1840
-#define HC_FUNC0_START          1840
+#define HC_PORT1_END            1803
+#define HC_FUNC0_START          1803
         {OP_WR_E1H, HC_REG_CONFIG_0, 0x1080},
         {OP_WR_E1H, HC_REG_FUNC_NUM_P0, 0x0},
         {OP_WR_E1H, HC_REG_ATTN_NUM_P0, 0x10},
@@ -2123,8 +2086,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
-#define HC_FUNC0_END            1855
-#define HC_FUNC1_START          1855
+#define HC_FUNC0_END            1818
+#define HC_FUNC1_START          1818
         {OP_WR_E1H, HC_REG_CONFIG_1, 0x1080},
         {OP_WR_E1H, HC_REG_FUNC_NUM_P1, 0x1},
         {OP_WR_E1H, HC_REG_ATTN_NUM_P1, 0x10},
@@ -2140,8 +2103,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
-#define HC_FUNC1_END            1870
-#define HC_FUNC2_START          1870
+#define HC_FUNC1_END            1833
+#define HC_FUNC2_START          1833
         {OP_WR_E1H, HC_REG_CONFIG_0, 0x1080},
         {OP_WR_E1H, HC_REG_FUNC_NUM_P0, 0x2},
         {OP_WR_E1H, HC_REG_ATTN_NUM_P0, 0x10},
@@ -2157,8 +2120,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
-#define HC_FUNC2_END            1885
-#define HC_FUNC3_START          1885
+#define HC_FUNC2_END            1848
+#define HC_FUNC3_START          1848
         {OP_WR_E1H, HC_REG_CONFIG_1, 0x1080},
         {OP_WR_E1H, HC_REG_FUNC_NUM_P1, 0x3},
         {OP_WR_E1H, HC_REG_ATTN_NUM_P1, 0x10},
@@ -2174,8 +2137,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
-#define HC_FUNC3_END            1900
-#define HC_FUNC4_START          1900
+#define HC_FUNC3_END            1863
+#define HC_FUNC4_START          1863
         {OP_WR_E1H, HC_REG_CONFIG_0, 0x1080},
         {OP_WR_E1H, HC_REG_FUNC_NUM_P0, 0x4},
         {OP_WR_E1H, HC_REG_ATTN_NUM_P0, 0x10},
@@ -2191,8 +2154,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
-#define HC_FUNC4_END            1915
-#define HC_FUNC5_START          1915
+#define HC_FUNC4_END            1878
+#define HC_FUNC5_START          1878
         {OP_WR_E1H, HC_REG_CONFIG_1, 0x1080},
         {OP_WR_E1H, HC_REG_FUNC_NUM_P1, 0x5},
         {OP_WR_E1H, HC_REG_ATTN_NUM_P1, 0x10},
@@ -2208,8 +2171,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
-#define HC_FUNC5_END            1930
-#define HC_FUNC6_START          1930
+#define HC_FUNC5_END            1893
+#define HC_FUNC6_START          1893
         {OP_WR_E1H, HC_REG_CONFIG_0, 0x1080},
         {OP_WR_E1H, HC_REG_FUNC_NUM_P0, 0x6},
         {OP_WR_E1H, HC_REG_ATTN_NUM_P0, 0x10},
@@ -2225,8 +2188,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
-#define HC_FUNC6_END            1945
-#define HC_FUNC7_START          1945
+#define HC_FUNC6_END            1908
+#define HC_FUNC7_START          1908
         {OP_WR_E1H, HC_REG_CONFIG_1, 0x1080},
         {OP_WR_E1H, HC_REG_FUNC_NUM_P1, 0x7},
         {OP_WR_E1H, HC_REG_ATTN_NUM_P1, 0x10},
@@ -2242,8 +2205,8 @@ static const struct raw_op init_ops[] = {
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
         {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
-#define HC_FUNC7_END            1960
-#define PXP2_COMMON_START       1960
+#define HC_FUNC7_END            1923
+#define PXP2_COMMON_START       1923
         {OP_WR_E1, PXP2_REG_PGL_CONTROL0, 0xe38340},
         {OP_WR_E1H, PXP2_REG_RQ_DRAM_ALIGN, 0x1},
         {OP_WR, PXP2_REG_PGL_CONTROL1, 0x3c10},
@@ -2361,8 +2324,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, PXP2_REG_RQ_ILT_MODE, 0x1},
         {OP_WR, PXP2_REG_RQ_RBC_DONE, 0x1},
         {OP_WR_E1H, PXP2_REG_PGL_CONTROL0, 0xe38340},
-#define PXP2_COMMON_END         2077
-#define MISC_AEU_COMMON_START   2077
+#define PXP2_COMMON_END         2040
+#define MISC_AEU_COMMON_START   2040
         {OP_ZR, MISC_REG_AEU_GENERAL_ATTN_0, 0x16},
         {OP_WR_E1H, MISC_REG_AEU_ENABLE1_NIG_0, 0x55540000},
         {OP_WR_E1H, MISC_REG_AEU_ENABLE2_NIG_0, 0x55555555},
@@ -2382,8 +2345,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1H, MISC_REG_AEU_ENABLE4_PXP_1, 0x0},
         {OP_WR_E1H, MISC_REG_AEU_CLR_LATCH_SIGNAL, 0xc00},
         {OP_WR_E1H, MISC_REG_AEU_GENERAL_MASK, 0x3},
-#define MISC_AEU_COMMON_END     2096
-#define MISC_AEU_PORT0_START    2096
+#define MISC_AEU_COMMON_END     2059
+#define MISC_AEU_PORT0_START    2059
         {OP_WR_E1, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0, 0xbf5c0000},
         {OP_WR_E1H, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0, 0xff5c0000},
         {OP_WR_E1, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0, 0xfff51fef},
@@ -2416,8 +2379,8 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1, MISC_REG_AEU_INVERTER_1_FUNC_0, 0x0},
         {OP_ZR_E1, MISC_REG_AEU_INVERTER_2_FUNC_0, 0x3},
         {OP_WR_E1, MISC_REG_AEU_MASK_ATTN_FUNC_0, 0x7},
-#define MISC_AEU_PORT0_END      2128
-#define MISC_AEU_PORT1_START    2128
+#define MISC_AEU_PORT0_END      2091
+#define MISC_AEU_PORT1_START    2091
         {OP_WR_E1, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0, 0xbf5c0000},
         {OP_WR_E1H, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0, 0xff5c0000},
         {OP_WR_E1, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0, 0xfff51fef},
@@ -2450,7 +2413,7 @@ static const struct raw_op init_ops[] = {
         {OP_WR_E1, MISC_REG_AEU_INVERTER_1_FUNC_1, 0x0},
         {OP_ZR_E1, MISC_REG_AEU_INVERTER_2_FUNC_1, 0x3},
         {OP_WR_E1, MISC_REG_AEU_MASK_ATTN_FUNC_1, 0x7},
-#define MISC_AEU_PORT1_END      2160
+#define MISC_AEU_PORT1_END      2123
 
 };
 
@@ -2560,103 +2523,92 @@ static const u32 init_data_e1[] = {
         0x00049c00, 0x00051f80, 0x0005a300, 0x00062680, 0x0006aa00, 0x00072d80,
         0x0007b100, 0x00083480, 0x0008b800, 0x00093b80, 0x0009bf00, 0x000a4280,
         0x000ac600, 0x000b4980, 0x000bcd00, 0x000c5080, 0x000cd400, 0x000d5780,
-        0x000ddb00, 0x00001900, 0x00000028, 0x00000000, 0x00100000, 0x00000000,
-        0x00000000, 0xffffffff, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
+        0x000ddb00, 0x00001900, 0x00100000, 0x00000000, 0x00000000, 0xffffffff,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
-        0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x00000000, 0x00007ff8,
-        0x00000000, 0x00001500, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
-        0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
+        0x40000000, 0x40000000, 0x00000000, 0x00007ff8, 0x00000000, 0x00001500,
+        0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+        0xffffffff, 0xffffffff, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
-        0x00000000, 0x00007ff8, 0x00000000, 0x00003500, 0x00001000, 0x00002080,
-        0x00003100, 0x00004180, 0x00005200, 0x00006280, 0x00007300, 0x00008380,
-        0x00009400, 0x0000a480, 0x0000b500, 0x0000c580, 0x0000d600, 0x0000e680,
-        0x0000f700, 0x00010780, 0x00011800, 0x00012880, 0x00013900, 0x00014980,
-        0x00015a00, 0x00016a80, 0x00017b00, 0x00018b80, 0x00019c00, 0x0001ac80,
-        0x0001bd00, 0x0001cd80, 0x0001de00, 0x0001ee80, 0x0001ff00, 0x00000000,
-        0x00010001, 0x00000604, 0xccccccc1, 0xffffffff, 0xffffffff, 0xcccc0201,
-        0xcccccccc, 0x00000000, 0xffffffff, 0x40000000, 0x40000000, 0x40000000,
+        0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x00000000, 0x00007ff8,
+        0x00000000, 0x00003500, 0x00001000, 0x00002080, 0x00003100, 0x00004180,
+        0x00005200, 0x00006280, 0x00007300, 0x00008380, 0x00009400, 0x0000a480,
+        0x0000b500, 0x0000c580, 0x0000d600, 0x0000e680, 0x0000f700, 0x00010780,
+        0x00011800, 0x00012880, 0x00013900, 0x00014980, 0x00015a00, 0x00016a80,
+        0x00017b00, 0x00018b80, 0x00019c00, 0x0001ac80, 0x0001bd00, 0x0001cd80,
+        0x0001de00, 0x0001ee80, 0x0001ff00, 0x00000000, 0x00010001, 0x00000604,
+        0xccccccc1, 0xffffffff, 0xffffffff, 0xcccc0201, 0xcccccccc, 0x00000000,
+        0xffffffff, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
         0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
-        0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x00000000,
-        0x00007ff8, 0x00000000, 0x00003500, 0x0000ffff, 0x00000000, 0x0000ffff,
+        0x40000000, 0x40000000, 0x40000000, 0x00000000, 0x00007ff8, 0x00000000,
+        0x00003500, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
         0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
+        0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00100000,
         0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
-        0x00000000, 0x00100000, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
         0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
-        0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
-        0x00000000, 0x00100000, 0x00000000, 0xfffffff3, 0x320fffff, 0x0c30c30c,
-        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1,
-        0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c,
-        0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
-        0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305,
-        0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2,
-        0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c,
-        0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
-        0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7, 0x31efffff, 0x0c30c30c,
-        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5,
-        0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c,
-        0xcdcdcdcd, 0xfffffff3, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
-        0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff, 0x0c30c30c,
+        0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00100000,
+        0x00000000, 0xfffffff3, 0x320fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
+        0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x30efffff, 0x0c30c30c,
         0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6,
         0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c,
         0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014,
         0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c,
         0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa,
         0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c,
-        0xcdcdcdcd, 0xfffffff7, 0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
-        0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x304fffff, 0x0c30c30c,
+        0xcdcdcdcd, 0xfffffff7, 0x31efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
+        0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x302fffff, 0x0c30c30c,
         0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3,
-        0x31efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c,
+        0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c,
         0xcdcdcdcd, 0xfffffff1, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
         0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c,
         0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406,
         0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c,
         0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
         0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c,
-        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97,
-        0x056fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c,
-        0xcdcdcdcd, 0xfffffff5, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
-        0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x320fffff, 0x0c30c30c,
+        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7,
+        0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c,
+        0xcdcdcdcd, 0xfffffff5, 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
+        0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x31efffff, 0x0c30c30c,
         0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1,
         0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c,
         0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
         0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305,
         0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2,
         0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c,
-        0xcdcdcdcd, 0xffffff8a, 0x042fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000,
-        0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97, 0x05cfffff, 0x0c30c30c,
+        0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
+        0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97, 0x056fffff, 0x0c30c30c,
         0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5,
         0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c,
-        0xcdcdcdcd, 0xfffffff3, 0x300fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
-        0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x300fffff, 0x0c30c30c,
+        0xcdcdcdcd, 0xfffffff3, 0x320fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
+        0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff, 0x0c30c30c,
         0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6,
         0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c,
         0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014,
         0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c,
-        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa,
-        0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c,
-        0xcdcdcdcd, 0xffffff97, 0x040fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000,
-        0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x300fffff, 0x0c30c30c,
-        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff,
-        0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c,
-        0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
-        0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
-        0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff,
-        0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c,
-        0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
-        0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
-        0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff,
-        0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c,
-        0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
+        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffff8a,
+        0x042fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0010cf3c,
+        0xcdcdcdcd, 0xffffff97, 0x05cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000,
+        0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x310fffff, 0x0c30c30c,
+        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3,
+        0x300fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c,
+        0xcdcdcdcd, 0xfffffff1, 0x300fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
+        0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c,
+        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406,
+        0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c,
+        0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
+        0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c,
+        0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97,
+        0x040fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c,
+        0xcdcdcdcd, 0xfffffff5, 0x300fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
         0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
         0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xffffffff,
         0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c,
@@ -2678,16 +2630,27 @@ static const u32 init_data_e1[] = {
         0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c,
         0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
         0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
-        0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0x00100000,
-        0x00070100, 0x00028170, 0x000b8198, 0x00020250, 0x00010270, 0x000f0280,
-        0x00010370, 0x00080000, 0x00080080, 0x00028100, 0x000b8128, 0x000201e0,
-        0x00010200, 0x00070210, 0x00020280, 0x000f0000, 0x000800f0, 0x00028170,
-        0x000b8198, 0x00020250, 0x00010270, 0x000b8280, 0x00080338, 0x00100000,
-        0x00080100, 0x00028180, 0x000b81a8, 0x00020260, 0x00018280, 0x000e8298,
-        0x00080380, 0x00028000, 0x000b8028, 0x000200e0, 0x00010100, 0x00008110,
-        0x00000118, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000,
-        0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000, 0xcccccccc,
-        0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000
+        0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff,
+        0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c,
+        0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
+        0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
+        0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff,
+        0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c,
+        0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
+        0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
+        0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff,
+        0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c,
+        0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
+        0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0x00100000, 0x00070100, 0x00028170,
+        0x000b8198, 0x00020250, 0x00010270, 0x000f0280, 0x00010370, 0x00080000,
+        0x00080080, 0x00028100, 0x000b8128, 0x000201e0, 0x00010200, 0x00070210,
+        0x00020280, 0x000f0000, 0x000800f0, 0x00028170, 0x000b8198, 0x00020250,
+        0x00010270, 0x000b8280, 0x00080338, 0x00100000, 0x00080100, 0x00028180,
+        0x000b81a8, 0x00020260, 0x00018280, 0x000e8298, 0x00080380, 0x00028000,
+        0x000b8028, 0x000200e0, 0x00010100, 0x00008110, 0x00000118, 0xcccccccc,
+        0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000, 0xcccccccc, 0xcccccccc,
+        0xcccccccc, 0xcccccccc, 0x00002000, 0xcccccccc, 0xcccccccc, 0xcccccccc,
+        0xcccccccc, 0x00002000
 };
 
 static const u32 init_data_e1h[] = {
diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c
index ff2743db10d9..4ce7fe9c5251 100644
--- a/drivers/net/bnx2x_link.c
+++ b/drivers/net/bnx2x_link.c
@@ -21,7 +21,6 @@
 #include <linux/delay.h>
 #include <linux/ethtool.h>
 #include <linux/mutex.h>
-#include <linux/version.h>
 
 #include "bnx2x_reg.h"
 #include "bnx2x_fw_defs.h"
@@ -31,17 +30,16 @@
 
 /********************************************************/
 #define SUPPORT_CL73 0 /* Currently no */
-#define ETH_HLEN                        14
+#define ETH_HLEN                        14
 #define ETH_OVREHEAD            (ETH_HLEN + 8)/* 8 for CRC + VLAN*/
 #define ETH_MIN_PACKET_SIZE             60
 #define ETH_MAX_PACKET_SIZE             1500
 #define ETH_MAX_JUMBO_PACKET_SIZE       9600
 #define MDIO_ACCESS_TIMEOUT             1000
 #define BMAC_CONTROL_RX_ENABLE  2
-#define MAX_MTU_SIZE            5000
 
 /***********************************************************/
-/*                       Shortcut definitions              */
+/*                      Shortcut definitions               */
 /***********************************************************/
 
 #define NIG_STATUS_XGXS0_LINK10G \
@@ -80,12 +78,12 @@
 
 #define AUTONEG_CL37            SHARED_HW_CFG_AN_ENABLE_CL37
 #define AUTONEG_CL73            SHARED_HW_CFG_AN_ENABLE_CL73
-#define AUTONEG_BAM                     SHARED_HW_CFG_AN_ENABLE_BAM
-#define AUTONEG_PARALLEL                \
+#define AUTONEG_BAM             SHARED_HW_CFG_AN_ENABLE_BAM
+#define AUTONEG_PARALLEL \
                                 SHARED_HW_CFG_AN_ENABLE_PARALLEL_DETECTION
-#define AUTONEG_SGMII_FIBER_AUTODET     \
+#define AUTONEG_SGMII_FIBER_AUTODET \
                                 SHARED_HW_CFG_AN_EN_SGMII_FIBER_AUTO_DETECT
-#define AUTONEG_REMOTE_PHY              SHARED_HW_CFG_AN_ENABLE_REMOTE_PHY
+#define AUTONEG_REMOTE_PHY      SHARED_HW_CFG_AN_ENABLE_REMOTE_PHY
 
 #define GP_STATUS_PAUSE_RSOLUTION_TXSIDE \
                         MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_TXSIDE
@@ -202,11 +200,10 @@ static void bnx2x_emac_init(struct link_params *params,
         /* init emac - use read-modify-write */
         /* self clear reset */
         val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE);
-        EMAC_WR(EMAC_REG_EMAC_MODE, (val | EMAC_MODE_RESET));
+        EMAC_WR(bp, EMAC_REG_EMAC_MODE, (val | EMAC_MODE_RESET));
 
         timeout = 200;
-        do
-        {
+        do {
                 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE);
                 DP(NETIF_MSG_LINK, "EMAC reset reg is %u\n", val);
                 if (!timeout) {
@@ -214,18 +211,18 @@ static void bnx2x_emac_init(struct link_params *params,
                         return;
                 }
                 timeout--;
-        }while (val & EMAC_MODE_RESET);
+        } while (val & EMAC_MODE_RESET);
 
         /* Set mac address */
         val = ((params->mac_addr[0] << 8) |
                 params->mac_addr[1]);
-        EMAC_WR(EMAC_REG_EMAC_MAC_MATCH, val);
+        EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH, val);
 
         val = ((params->mac_addr[2] << 24) |
                (params->mac_addr[3] << 16) |
                (params->mac_addr[4] << 8) |
                 params->mac_addr[5]);
-        EMAC_WR(EMAC_REG_EMAC_MAC_MATCH + 4, val);
+        EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + 4, val);
 }
 
 static u8 bnx2x_emac_enable(struct link_params *params,
@@ -286,7 +283,7 @@ static u8 bnx2x_emac_enable(struct link_params *params,
         if (CHIP_REV_IS_SLOW(bp)) {
                 /* config GMII mode */
                 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE);
-                EMAC_WR(EMAC_REG_EMAC_MODE,
+                EMAC_WR(bp, EMAC_REG_EMAC_MODE,
                             (val | EMAC_MODE_PORT_GMII));
         } else { /* ASIC */
                 /* pause enable/disable */
@@ -298,17 +295,19 @@ static u8 bnx2x_emac_enable(struct link_params *params,
                                     EMAC_RX_MODE_FLOW_EN);
 
                 bnx2x_bits_dis(bp,  emac_base + EMAC_REG_EMAC_TX_MODE,
-                               EMAC_TX_MODE_EXT_PAUSE_EN);
+                             (EMAC_TX_MODE_EXT_PAUSE_EN |
+                              EMAC_TX_MODE_FLOW_EN));
                 if (vars->flow_ctrl & FLOW_CTRL_TX)
                         bnx2x_bits_en(bp, emac_base +
                                     EMAC_REG_EMAC_TX_MODE,
-                                      EMAC_TX_MODE_EXT_PAUSE_EN);
+                                   (EMAC_TX_MODE_EXT_PAUSE_EN |
+                                    EMAC_TX_MODE_FLOW_EN));
         }
 
         /* KEEP_VLAN_TAG, promiscuous */
         val = REG_RD(bp, emac_base + EMAC_REG_EMAC_RX_MODE);
         val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS;
-        EMAC_WR(EMAC_REG_EMAC_RX_MODE, val);
+        EMAC_WR(bp, EMAC_REG_EMAC_RX_MODE, val);
 
         /* Set Loopback */
         val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE);
@@ -316,10 +315,10 @@ static u8 bnx2x_emac_enable(struct link_params *params,
                 val |= 0x810;
         else
                 val &= ~0x810;
-        EMAC_WR(EMAC_REG_EMAC_MODE, val);
+        EMAC_WR(bp, EMAC_REG_EMAC_MODE, val);
 
         /* enable emac for jumbo packets */
-        EMAC_WR(EMAC_REG_EMAC_RX_MTU_SIZE,
+        EMAC_WR(bp, EMAC_REG_EMAC_RX_MTU_SIZE,
                 (EMAC_RX_MTU_SIZE_JUMBO_ENA |
                  (ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD)));
 
@@ -591,9 +590,9 @@ void bnx2x_link_status_update(struct link_params *params,
                         vars->flow_ctrl &= ~FLOW_CTRL_RX;
 
                 if (vars->phy_flags & PHY_XGXS_FLAG) {
-                        if (params->req_line_speed &&
-                            ((params->req_line_speed == SPEED_10) ||
-                             (params->req_line_speed == SPEED_100))) {
+                        if (vars->line_speed &&
+                            ((vars->line_speed == SPEED_10) ||
+                             (vars->line_speed == SPEED_100))) {
                                 vars->phy_flags |= PHY_SGMII_FLAG;
                         } else {
                                 vars->phy_flags &= ~PHY_SGMII_FLAG;
@@ -645,7 +644,7 @@ static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u8 port)
         u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM :
                 NIG_REG_INGRESS_BMAC0_MEM;
         u32 wb_data[2];
-    u32 nig_bmac_enable = REG_RD(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4);
+        u32 nig_bmac_enable = REG_RD(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4);
 
         /* Only if the bmac is out of reset */
         if (REG_RD(bp, MISC_REG_RESET_REG_2) &
@@ -670,7 +669,6 @@ static u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,
         u8 port = params->port;
         u32 init_crd, crd;
         u32 count = 1000;
-        u32 pause = 0;
 
         /* disable port */
         REG_WR(bp, PBF_REG_DISABLE_NEW_TASK_PROC_P0 + port*4, 0x1);
@@ -693,33 +691,25 @@ static u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,
                 return -EINVAL;
         }
 
-        if (flow_ctrl & FLOW_CTRL_RX)
-                pause = 1;
-        REG_WR(bp, PBF_REG_P0_PAUSE_ENABLE + port*4, pause);
-        if (pause) {
+        if (flow_ctrl & FLOW_CTRL_RX ||
+            line_speed == SPEED_10 ||
+            line_speed == SPEED_100 ||
+            line_speed == SPEED_1000 ||
+            line_speed == SPEED_2500) {
+                REG_WR(bp, PBF_REG_P0_PAUSE_ENABLE + port*4, 1);
                 /* update threshold */
                 REG_WR(bp, PBF_REG_P0_ARB_THRSH + port*4, 0);
                 /* update init credit */
-                init_crd = 778;         /* (800-18-4) */
+                init_crd = 778;         /* (800-18-4) */
 
         } else {
                 u32 thresh = (ETH_MAX_JUMBO_PACKET_SIZE +
                               ETH_OVREHEAD)/16;
-
+                REG_WR(bp, PBF_REG_P0_PAUSE_ENABLE + port*4, 0);
                 /* update threshold */
                 REG_WR(bp, PBF_REG_P0_ARB_THRSH + port*4, thresh);
                 /* update init credit */
                 switch (line_speed) {
-                case SPEED_10:
-                case SPEED_100:
-                case SPEED_1000:
-                        init_crd = thresh + 55 - 22;
-                        break;
-
-                case SPEED_2500:
-                        init_crd = thresh + 138 - 22;
-                        break;
-
                 case SPEED_10000:
                         init_crd = thresh + 553 - 22;
                         break;
@@ -764,10 +754,10 @@ static u32 bnx2x_get_emac_base(u32 ext_phy_type, u8 port)
                 emac_base = GRCBASE_EMAC0;
                 break;
         case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
-                emac_base = (port) ? GRCBASE_EMAC0: GRCBASE_EMAC1;
+                emac_base = (port) ? GRCBASE_EMAC0 : GRCBASE_EMAC1;
                 break;
         default:
-                emac_base = (port) ? GRCBASE_EMAC1: GRCBASE_EMAC0;
+                emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
                 break;
         }
         return emac_base;
@@ -1044,7 +1034,7 @@ static void bnx2x_set_swap_lanes(struct link_params *params)
 }
 
 static void bnx2x_set_parallel_detection(struct link_params *params,
-                                       u8                phy_flags)
+                                       u8                phy_flags)
 {
         struct bnx2x *bp = params->bp;
         u16 control2;
@@ -1114,7 +1104,7 @@ static void bnx2x_set_autoneg(struct link_params *params,
                               MDIO_COMBO_IEEE0_MII_CONTROL, &reg_val);
 
         /* CL37 Autoneg Enabled */
-        if (params->req_line_speed == SPEED_AUTO_NEG)
+        if (vars->line_speed == SPEED_AUTO_NEG)
                 reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_AN_EN;
         else /* CL37 Autoneg Disabled */
                 reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN |
@@ -1132,7 +1122,7 @@ static void bnx2x_set_autoneg(struct link_params *params,
                               MDIO_REG_BANK_SERDES_DIGITAL,
                               MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, &reg_val);
         reg_val &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN;
-        if (params->req_line_speed == SPEED_AUTO_NEG)
+        if (vars->line_speed == SPEED_AUTO_NEG)
                 reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET;
         else
                 reg_val &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET;
@@ -1148,7 +1138,7 @@ static void bnx2x_set_autoneg(struct link_params *params,
                               MDIO_REG_BANK_BAM_NEXT_PAGE,
                               MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL,
                           &reg_val);
-        if (params->req_line_speed == SPEED_AUTO_NEG) {
+        if (vars->line_speed == SPEED_AUTO_NEG) {
                 /* Enable BAM aneg Mode and TetonII aneg Mode */
                 reg_val |= (MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE |
                             MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN);
@@ -1164,7 +1154,7 @@ static void bnx2x_set_autoneg(struct link_params *params,
                               reg_val);
 
         /* Enable Clause 73 Aneg */
-        if ((params->req_line_speed == SPEED_AUTO_NEG) &&
+        if ((vars->line_speed == SPEED_AUTO_NEG) &&
             (SUPPORT_CL73)) {
                 /* Enable BAM Station Manager */
 
@@ -1226,7 +1216,8 @@ static void bnx2x_set_autoneg(struct link_params *params,
 }
 
 /* program SerDes, forced speed */
-static void bnx2x_program_serdes(struct link_params *params)
+static void bnx2x_program_serdes(struct link_params *params,
+                               struct link_vars *vars)
 {
         struct bnx2x *bp = params->bp;
         u16 reg_val;
@@ -1248,28 +1239,35 @@ static void bnx2x_program_serdes(struct link_params *params)
 
         /* program speed
            - needed only if the speed is greater than 1G (2.5G or 10G) */
-        if (!((params->req_line_speed == SPEED_1000) ||
-              (params->req_line_speed == SPEED_100) ||
-              (params->req_line_speed == SPEED_10))) {
-                CL45_RD_OVER_CL22(bp, params->port,
+        CL45_RD_OVER_CL22(bp, params->port,
                                       params->phy_addr,
                                       MDIO_REG_BANK_SERDES_DIGITAL,
                                       MDIO_SERDES_DIGITAL_MISC1, &reg_val);
-                /* clearing the speed value before setting the right speed */
-                reg_val &= ~MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK;
+        /* clearing the speed value before setting the right speed */
+        DP(NETIF_MSG_LINK, "MDIO_REG_BANK_SERDES_DIGITAL = 0x%x\n", reg_val);
+
+        reg_val &= ~(MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK |
+                     MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL);
+
+        if (!((vars->line_speed == SPEED_1000) ||
+              (vars->line_speed == SPEED_100) ||
+              (vars->line_speed == SPEED_10))) {
+
                 reg_val |= (MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M |
                             MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL);
-                if (params->req_line_speed == SPEED_10000)
+                if (vars->line_speed == SPEED_10000)
                         reg_val |=
                                 MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4;
-                if (params->req_line_speed == SPEED_13000)
+                if (vars->line_speed == SPEED_13000)
                         reg_val |=
                                 MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_13G;
-                CL45_WR_OVER_CL22(bp, params->port,
+        }
+
+        CL45_WR_OVER_CL22(bp, params->port,
                                       params->phy_addr,
                                       MDIO_REG_BANK_SERDES_DIGITAL,
                                       MDIO_SERDES_DIGITAL_MISC1, reg_val);
-        }
+
 }
 
 static void bnx2x_set_brcm_cl37_advertisment(struct link_params *params)
@@ -1295,48 +1293,49 @@ static void bnx2x_set_brcm_cl37_advertisment(struct link_params *params)
                               MDIO_OVER_1G_UP3, 0);
 }
 
-static void bnx2x_set_ieee_aneg_advertisment(struct link_params *params,
-                                           u32 *ieee_fc)
+static void bnx2x_calc_ieee_aneg_adv(struct link_params *params, u32 *ieee_fc)
 {
-        struct bnx2x *bp = params->bp;
-        /* for AN, we are always publishing full duplex */
-        u16 an_adv = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX;
-
+        *ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX;
         /* resolve pause mode and advertisement
          * Please refer to Table 28B-3 of the 802.3ab-1999 spec */
 
         switch (params->req_flow_ctrl) {
         case FLOW_CTRL_AUTO:
-                if (params->mtu <= MAX_MTU_SIZE) {
-                        an_adv |=
+                if (params->req_fc_auto_adv == FLOW_CTRL_BOTH) {
+                        *ieee_fc |=
                              MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
                 } else {
-                        an_adv |=
+                        *ieee_fc |=
                        MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
                 }
                 break;
         case FLOW_CTRL_TX:
-                an_adv |=
+                *ieee_fc |=
                        MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
                 break;
 
         case FLOW_CTRL_RX:
         case FLOW_CTRL_BOTH:
-                an_adv |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
+                *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
                 break;
 
         case FLOW_CTRL_NONE:
         default:
-                an_adv |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE;
+                *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE;
                 break;
         }
+}
 
-        *ieee_fc = an_adv;
+static void bnx2x_set_ieee_aneg_advertisment(struct link_params *params,
+                                           u32 ieee_fc)
+{
+        struct bnx2x *bp = params->bp;
+        /* for AN, we are always publishing full duplex */
 
         CL45_WR_OVER_CL22(bp, params->port,
                               params->phy_addr,
                               MDIO_REG_BANK_COMBO_IEEE0,
-                              MDIO_COMBO_IEEE0_AUTO_NEG_ADV, an_adv);
+                              MDIO_COMBO_IEEE0_AUTO_NEG_ADV, (u16)ieee_fc);
 }
 
 static void bnx2x_restart_autoneg(struct link_params *params)
@@ -1382,7 +1381,8 @@ static void bnx2x_restart_autoneg(struct link_params *params)
         }
 }
 
-static void bnx2x_initialize_sgmii_process(struct link_params *params)
+static void bnx2x_initialize_sgmii_process(struct link_params *params,
+                                         struct link_vars *vars)
 {
         struct bnx2x *bp = params->bp;
         u16 control1;
@@ -1406,7 +1406,7 @@ static void bnx2x_initialize_sgmii_process(struct link_params *params)
                               control1);
 
         /* if forced speed */
-        if (!(params->req_line_speed == SPEED_AUTO_NEG)) {
+        if (!(vars->line_speed == SPEED_AUTO_NEG)) {
                 /* set speed, disable autoneg */
                 u16 mii_control;
 
@@ -1419,7 +1419,7 @@ static void bnx2x_initialize_sgmii_process(struct link_params *params)
                                  MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK|
                                  MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX);
 
-                switch (params->req_line_speed) {
+                switch (vars->line_speed) {
                 case SPEED_100:
                         mii_control |=
                                 MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_100;
@@ -1433,8 +1433,8 @@ static void bnx2x_initialize_sgmii_process(struct link_params *params)
                         break;
                 default:
                         /* invalid speed for SGMII */
-                        DP(NETIF_MSG_LINK, "Invalid req_line_speed 0x%x\n",
-                                  params->req_line_speed);
+                        DP(NETIF_MSG_LINK, "Invalid line_speed 0x%x\n",
+                                  vars->line_speed);
                         break;
                 }
 
@@ -1460,20 +1460,20 @@ static void bnx2x_initialize_sgmii_process(struct link_params *params)
  */
 
 static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result)
-{
-        switch (pause_result) {                 /* ASYM P ASYM P */
-        case 0xb:                               /*   1  0   1  1 */
+{                                               /*  LD      LP   */
+        switch (pause_result) {                 /* ASYM P ASYM P */
+        case 0xb:                               /*   1  0   1  1 */
                 vars->flow_ctrl = FLOW_CTRL_TX;
                 break;
 
-        case 0xe:                               /*   1  1   1  0 */
+        case 0xe:                               /*   1  1   1  0 */
                 vars->flow_ctrl = FLOW_CTRL_RX;
                 break;
 
-        case 0x5:                               /*   0  1   0  1 */
-        case 0x7:                               /*   0  1   1  1 */
-        case 0xd:                               /*   1  1   0  1 */
-        case 0xf:                               /*   1  1   1  1 */
+        case 0x5:                               /*   0  1   0  1 */
+        case 0x7:                               /*   0  1   1  1 */
+        case 0xd:                               /*   1  1   0  1 */
+        case 0xf:                               /*   1  1   1  1 */
                 vars->flow_ctrl = FLOW_CTRL_BOTH;
                 break;
 
@@ -1531,6 +1531,28 @@ static u8 bnx2x_ext_phy_resove_fc(struct link_params *params,
                 DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x \n",
                    pause_result);
                 bnx2x_pause_resolve(vars, pause_result);
+                if (vars->flow_ctrl == FLOW_CTRL_NONE &&
+                     ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073) {
+                        bnx2x_cl45_read(bp, port,
+                                      ext_phy_type,
+                                      ext_phy_addr,
+                                      MDIO_AN_DEVAD,
+                                      MDIO_AN_REG_CL37_FC_LD, &ld_pause);
+
+                        bnx2x_cl45_read(bp, port,
+                                      ext_phy_type,
+                                      ext_phy_addr,
+                                      MDIO_AN_DEVAD,
+                                      MDIO_AN_REG_CL37_FC_LP, &lp_pause);
+                        pause_result = (ld_pause &
+                                MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) >> 5;
+                        pause_result |= (lp_pause &
+                                MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) >> 7;
+
+                        bnx2x_pause_resolve(vars, pause_result);
+                        DP(NETIF_MSG_LINK, "Ext PHY CL37 pause result 0x%x \n",
+                                 pause_result);
+                }
         }
         return ret;
 }
@@ -1541,8 +1563,8 @@ static void bnx2x_flow_ctrl_resolve(struct link_params *params,
                                   u32 gp_status)
 {
         struct bnx2x *bp = params->bp;
-        u16 ld_pause;   /* local driver */
-        u16 lp_pause;   /* link partner */
+        u16 ld_pause;   /* local driver */
+        u16 lp_pause;   /* link partner */
         u16 pause_result;
 
         vars->flow_ctrl = FLOW_CTRL_NONE;
@@ -1573,13 +1595,10 @@ static void bnx2x_flow_ctrl_resolve(struct link_params *params,
                    (bnx2x_ext_phy_resove_fc(params, vars))) {
                 return;
         } else {
-                vars->flow_ctrl = params->req_flow_ctrl;
-                if (vars->flow_ctrl == FLOW_CTRL_AUTO) {
-                        if (params->mtu <= MAX_MTU_SIZE)
-                                vars->flow_ctrl = FLOW_CTRL_BOTH;
-                        else
-                                vars->flow_ctrl = FLOW_CTRL_TX;
-                }
+                if (params->req_flow_ctrl == FLOW_CTRL_AUTO)
+                        vars->flow_ctrl = params->req_fc_auto_adv;
+                else
+                        vars->flow_ctrl = params->req_flow_ctrl;
         }
         DP(NETIF_MSG_LINK, "flow_ctrl 0x%x\n", vars->flow_ctrl);
 }
@@ -1590,6 +1609,7 @@ static u8 bnx2x_link_settings_status(struct link_params *params,
                                       u32 gp_status)
 {
         struct bnx2x *bp = params->bp;
+
         u8 rc = 0;
         vars->link_status = 0;
 
@@ -1690,7 +1710,11 @@ static u8 bnx2x_link_settings_status(struct link_params *params,
 
                 vars->link_status |= LINK_STATUS_SERDES_LINK;
 
-                if (params->req_line_speed == SPEED_AUTO_NEG) {
+                if ((params->req_line_speed == SPEED_AUTO_NEG) &&
+                    ((XGXS_EXT_PHY_TYPE(params->ext_phy_config) ==
+                     PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) ||
+                    (XGXS_EXT_PHY_TYPE(params->ext_phy_config) ==
+                     PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705))) {
                         vars->autoneg = AUTO_NEG_ENABLED;
 
                         if (gp_status & MDIO_AN_CL73_OR_37_COMPLETE) {
@@ -1705,18 +1729,18 @@ static u8 bnx2x_link_settings_status(struct link_params *params,
 
                 }
                 if (vars->flow_ctrl & FLOW_CTRL_TX)
-                       vars->link_status |=
-                        LINK_STATUS_TX_FLOW_CONTROL_ENABLED;
+                        vars->link_status |=
+                                LINK_STATUS_TX_FLOW_CONTROL_ENABLED;
 
                 if (vars->flow_ctrl & FLOW_CTRL_RX)
-                       vars->link_status |=
-                        LINK_STATUS_RX_FLOW_CONTROL_ENABLED;
+                        vars->link_status |=
+                                LINK_STATUS_RX_FLOW_CONTROL_ENABLED;
 
         } else { /* link_down */
                 DP(NETIF_MSG_LINK, "phy link down\n");
 
                 vars->phy_link_up = 0;
-                vars->line_speed = 0;
+
                 vars->duplex = DUPLEX_FULL;
                 vars->flow_ctrl = FLOW_CTRL_NONE;
                 vars->autoneg = AUTO_NEG_DISABLED;
@@ -1817,15 +1841,15 @@ static u8 bnx2x_emac_program(struct link_params *params,
 }
 
 /*****************************************************************************/
-/*                           External Phy section                            */
+/*                           External Phy section                            */
 /*****************************************************************************/
-static void bnx2x_hw_reset(struct bnx2x *bp)
+static void bnx2x_hw_reset(struct bnx2x *bp, u8 port)
 {
         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                       MISC_REGISTERS_GPIO_OUTPUT_LOW);
+                       MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
         msleep(1);
         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                      MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                      MISC_REGISTERS_GPIO_OUTPUT_HIGH, port);
 }
 
 static void bnx2x_ext_phy_reset(struct link_params *params,
@@ -1854,10 +1878,11 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
 
                         /* Restore normal power mode*/
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                          params->port);
 
                         /* HW reset */
-                        bnx2x_hw_reset(bp);
+                        bnx2x_hw_reset(bp, params->port);
 
                         bnx2x_cl45_write(bp, params->port,
                                        ext_phy_type,
@@ -1869,7 +1894,8 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
                         /* Unset Low Power Mode and SW reset */
                         /* Restore normal power mode*/
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                          params->port);
 
                         DP(NETIF_MSG_LINK, "XGXS 8072\n");
                         bnx2x_cl45_write(bp, params->port,
@@ -1887,19 +1913,14 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
 
                         /* Restore normal power mode*/
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                          params->port);
 
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                          params->port);
 
                         DP(NETIF_MSG_LINK, "XGXS 8073\n");
-                        bnx2x_cl45_write(bp,
-                                       params->port,
-                                       ext_phy_type,
-                                       ext_phy_addr,
-                                       MDIO_PMA_DEVAD,
-                                       MDIO_PMA_REG_CTRL,
-                                       1<<15);
                         }
                         break;
 
@@ -1908,10 +1929,11 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
 
                         /* Restore normal power mode*/
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH);
+                                      MISC_REGISTERS_GPIO_OUTPUT_HIGH,
+                                          params->port);
 
                         /* HW reset */
-                        bnx2x_hw_reset(bp);
+                        bnx2x_hw_reset(bp, params->port);
 
                         break;
 
@@ -1934,7 +1956,7 @@ static void bnx2x_ext_phy_reset(struct link_params *params,
 
                 case PORT_HW_CFG_SERDES_EXT_PHY_TYPE_BCM5482:
                         DP(NETIF_MSG_LINK, "SerDes 5482\n");
-                        bnx2x_hw_reset(bp);
+                        bnx2x_hw_reset(bp, params->port);
                         break;
 
                 default:
@@ -2098,42 +2120,45 @@ static u8 bnx2x_bcm8073_xaui_wa(struct link_params *params)
 
 }
 
-static void bnx2x_bcm8073_external_rom_boot(struct link_params *params)
+static void bnx2x_bcm8073_external_rom_boot(struct bnx2x *bp, u8 port,
+                                          u8 ext_phy_addr)
 {
-        struct bnx2x *bp = params->bp;
-        u8 port = params->port;
-        u8 ext_phy_addr = ((params->ext_phy_config &
-                             PORT_HW_CFG_XGXS_EXT_PHY_ADDR_MASK) >>
-                            PORT_HW_CFG_XGXS_EXT_PHY_ADDR_SHIFT);
-        u32 ext_phy_type = XGXS_EXT_PHY_TYPE(params->ext_phy_config);
-        u16 fw_ver1, fw_ver2, val;
-        /* Need to wait 100ms after reset */
-        msleep(100);
-        /* Boot port from external ROM  */
+        u16 fw_ver1, fw_ver2;
+        /* Boot port from external ROM  */
         /* EDC grst */
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+        bnx2x_cl45_write(bp, port,
+                       PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                       ext_phy_addr,
                        MDIO_PMA_DEVAD,
                        MDIO_PMA_REG_GEN_CTRL,
                        0x0001);
 
         /* ucode reboot and rst */
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+        bnx2x_cl45_write(bp, port,
+                       PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                       ext_phy_addr,
                        MDIO_PMA_DEVAD,
                        MDIO_PMA_REG_GEN_CTRL,
                        0x008c);
 
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+        bnx2x_cl45_write(bp, port,
+                       PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                       ext_phy_addr,
                        MDIO_PMA_DEVAD,
                        MDIO_PMA_REG_MISC_CTRL1, 0x0001);
 
         /* Reset internal microprocessor */
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+        bnx2x_cl45_write(bp, port,
+                       PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                       ext_phy_addr,
                        MDIO_PMA_DEVAD,
                        MDIO_PMA_REG_GEN_CTRL,
                        MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET);
 
         /* Release srst bit */
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+        bnx2x_cl45_write(bp, port,
+                       PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                       ext_phy_addr,
                        MDIO_PMA_DEVAD,
                        MDIO_PMA_REG_GEN_CTRL,
                        MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP);
@@ -2142,35 +2167,52 @@ static void bnx2x_bcm8073_external_rom_boot(struct link_params *params)
         msleep(100);
 
         /* Clear ser_boot_ctl bit */
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+        bnx2x_cl45_write(bp, port,
+                       PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                       ext_phy_addr,
                        MDIO_PMA_DEVAD,
                        MDIO_PMA_REG_MISC_CTRL1, 0x0000);
 
-        bnx2x_cl45_read(bp, port, ext_phy_type, ext_phy_addr,
-                       MDIO_PMA_DEVAD,
-                       MDIO_PMA_REG_ROM_VER1, &fw_ver1);
-        bnx2x_cl45_read(bp, port, ext_phy_type, ext_phy_addr,
-                       MDIO_PMA_DEVAD,
-                       MDIO_PMA_REG_ROM_VER2, &fw_ver2);
+        bnx2x_cl45_read(bp, port, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                      ext_phy_addr,
+                      MDIO_PMA_DEVAD,
+                      MDIO_PMA_REG_ROM_VER1, &fw_ver1);
+        bnx2x_cl45_read(bp, port,
+                      PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                      ext_phy_addr,
+                      MDIO_PMA_DEVAD,
+                      MDIO_PMA_REG_ROM_VER2, &fw_ver2);
         DP(NETIF_MSG_LINK, "8073 FW version 0x%x:0x%x\n", fw_ver1, fw_ver2);
 
-        /* Only set bit 10 = 1 (Tx power down) */
-        bnx2x_cl45_read(bp, port, ext_phy_type, ext_phy_addr,
-                       MDIO_PMA_DEVAD,
-                       MDIO_PMA_REG_TX_POWER_DOWN, &val);
+}
 
+static void bnx2x_bcm807x_force_10G(struct link_params *params)
+{
+        struct bnx2x *bp = params->bp;
+        u8 port = params->port;
+        u8 ext_phy_addr = ((params->ext_phy_config &
+                                PORT_HW_CFG_XGXS_EXT_PHY_ADDR_MASK) >>
+                                PORT_HW_CFG_XGXS_EXT_PHY_ADDR_SHIFT);
+        u32 ext_phy_type = XGXS_EXT_PHY_TYPE(params->ext_phy_config);
+
+        /* Force KR or KX */
         bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
                        MDIO_PMA_DEVAD,
-                       MDIO_PMA_REG_TX_POWER_DOWN, (val | 1<<10));
-
-        msleep(600);
-        /* Release bit 10 (Release Tx power down) */
+                       MDIO_PMA_REG_CTRL,
+                       0x2040);
         bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
                        MDIO_PMA_DEVAD,
-                       MDIO_PMA_REG_TX_POWER_DOWN, (val & (~(1<<10))));
-
+                       MDIO_PMA_REG_10G_CTRL2,
+                       0x000b);
+        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+                       MDIO_PMA_DEVAD,
+                       MDIO_PMA_REG_BCM_CTRL,
+                       0x0000);
+        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+                       MDIO_AN_DEVAD,
+                       MDIO_AN_REG_CTRL,
+                       0x0000);
 }
-
 static void bnx2x_bcm8073_set_xaui_low_power_mode(struct link_params *params)
 {
         struct bnx2x *bp = params->bp;
@@ -2236,32 +2278,51 @@ static void bnx2x_bcm8073_set_xaui_low_power_mode(struct link_params *params)
         bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
                        MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val);
 }
-static void bnx2x_bcm807x_force_10G(struct link_params *params)
+
+static void bnx2x_8073_set_pause_cl37(struct link_params *params,
+                                  struct link_vars *vars)
 {
+
         struct bnx2x *bp = params->bp;
-        u8 port = params->port;
+        u16 cl37_val;
         u8 ext_phy_addr = ((params->ext_phy_config &
                                 PORT_HW_CFG_XGXS_EXT_PHY_ADDR_MASK) >>
                                 PORT_HW_CFG_XGXS_EXT_PHY_ADDR_SHIFT);
         u32 ext_phy_type = XGXS_EXT_PHY_TYPE(params->ext_phy_config);
 
-        /* Force KR or KX */
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
-                       MDIO_PMA_DEVAD,
-                       MDIO_PMA_REG_CTRL,
-                       0x2040);
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
-                       MDIO_PMA_DEVAD,
-                       MDIO_PMA_REG_10G_CTRL2,
-                       0x000b);
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
-                       MDIO_PMA_DEVAD,
-                       MDIO_PMA_REG_BCM_CTRL,
-                       0x0000);
-        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
+        bnx2x_cl45_read(bp, params->port,
+                      ext_phy_type,
+                      ext_phy_addr,
+                      MDIO_AN_DEVAD,
+                      MDIO_AN_REG_CL37_FC_LD, &cl37_val);
+
+        cl37_val &= ~MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
+        /* Please refer to Table 28B-3 of 802.3ab-1999 spec. */
+
+        if ((vars->ieee_fc &
+            MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_SYMMETRIC) ==
+            MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_SYMMETRIC) {
+                cl37_val |=  MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_SYMMETRIC;
+        }
+        if ((vars->ieee_fc &
+            MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) ==
+            MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) {
+                cl37_val |=  MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
+        }
+        if ((vars->ieee_fc &
+            MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) ==
+            MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) {
+                cl37_val |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
+        }
+        DP(NETIF_MSG_LINK,
+                 "Ext phy AN advertize cl37 0x%x\n", cl37_val);
+
+        bnx2x_cl45_write(bp, params->port,
+                       ext_phy_type,
+                       ext_phy_addr,
                        MDIO_AN_DEVAD,
-                       MDIO_AN_REG_CTRL,
-                       0x0000);
+                       MDIO_AN_REG_CL37_FC_LD, cl37_val);
+        msleep(500);
 }
 
 static void bnx2x_ext_phy_set_pause(struct link_params *params,
@@ -2282,13 +2343,16 @@ static void bnx2x_ext_phy_set_pause(struct link_params *params,
                       MDIO_AN_REG_ADV_PAUSE, &val);
 
         val &= ~MDIO_AN_REG_ADV_PAUSE_BOTH;
+
         /* Please refer to Table 28B-3 of 802.3ab-1999 spec. */
 
-        if (vars->ieee_fc &
+        if ((vars->ieee_fc &
+            MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) ==
             MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) {
                 val |=  MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC;
         }
-        if (vars->ieee_fc &
+        if ((vars->ieee_fc &
+            MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) ==
             MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) {
                 val |=
                  MDIO_AN_REG_ADV_PAUSE_PAUSE;
@@ -2302,6 +2366,65 @@ static void bnx2x_ext_phy_set_pause(struct link_params *params,
                        MDIO_AN_REG_ADV_PAUSE, val);
 }
 
+
+static void bnx2x_init_internal_phy(struct link_params *params,
+                                struct link_vars *vars)
+{
+        struct bnx2x *bp = params->bp;
+        u8 port = params->port;
+        if (!(vars->phy_flags & PHY_SGMII_FLAG)) {
+                u16 bank, rx_eq;
+
+                rx_eq = ((params->serdes_config &
+                          PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_MASK) >>
+                         PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_SHIFT);
+
+                DP(NETIF_MSG_LINK, "setting rx eq to 0x%x\n", rx_eq);
+                for (bank = MDIO_REG_BANK_RX0; bank <= MDIO_REG_BANK_RX_ALL;
+                      bank += (MDIO_REG_BANK_RX1-MDIO_REG_BANK_RX0)) {
+                        CL45_WR_OVER_CL22(bp, port,
+                                              params->phy_addr,
+                                              bank ,
+                                              MDIO_RX0_RX_EQ_BOOST,
+                                              ((rx_eq &
+                                MDIO_RX0_RX_EQ_BOOST_EQUALIZER_CTRL_MASK) |
+                                MDIO_RX0_RX_EQ_BOOST_OFFSET_CTRL));
+                }
+
+                /* forced speed requested? */
+                if (vars->line_speed != SPEED_AUTO_NEG) {
+                        DP(NETIF_MSG_LINK, "not SGMII, no AN\n");
+
+                        /* disable autoneg */
+                        bnx2x_set_autoneg(params, vars);
+
+                        /* program speed and duplex */
+                        bnx2x_program_serdes(params, vars);
+
+                } else { /* AN_mode */
+                        DP(NETIF_MSG_LINK, "not SGMII, AN\n");
+
+                        /* AN enabled */
+                        bnx2x_set_brcm_cl37_advertisment(params);
+
+                        /* program duplex & pause advertisement (for aneg) */
+                        bnx2x_set_ieee_aneg_advertisment(params,
+                                                       vars->ieee_fc);
+
+                        /* enable autoneg */
+                        bnx2x_set_autoneg(params, vars);
+
+                        /* enable and restart AN */
+                        bnx2x_restart_autoneg(params);
+                }
+
+        } else { /* SGMII mode */
+                DP(NETIF_MSG_LINK, "SGMII\n");
+
+                bnx2x_initialize_sgmii_process(params, vars);
+        }
+}
+
 static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
 {
         struct bnx2x *bp = params->bp;
@@ -2343,7 +2466,6 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
 
                 switch (ext_phy_type) {
                 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT:
-                        DP(NETIF_MSG_LINK, "XGXS Direct\n");
                         break;
 
                 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705:
@@ -2419,7 +2541,7 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
                                                ext_phy_type,
                                                ext_phy_addr,
                                                MDIO_AN_DEVAD,
-                                               MDIO_AN_REG_CL37_FD,
+                                               MDIO_AN_REG_CL37_FC_LP,
                                                0x0020);
                                 /* Enable CL37 AN */
                                 bnx2x_cl45_write(bp, params->port,
@@ -2458,54 +2580,43 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
                                 rx_alarm_ctrl_val = 0x400;
                                 lasi_ctrl_val = 0x0004;
                         } else {
-                                /* In 8073, port1 is directed through emac0 and
-                                 * port0 is directed through emac1
-                                 */
                                 rx_alarm_ctrl_val = (1<<2);
-                                /*lasi_ctrl_val = 0x0005;*/
                                 lasi_ctrl_val = 0x0004;
                         }
 
-                        /* Wait for soft reset to get cleared upto 1 sec */
-                        for (cnt = 0; cnt < 1000; cnt++) {
-                                bnx2x_cl45_read(bp, params->port,
-                                              ext_phy_type,
-                                              ext_phy_addr,
-                                              MDIO_PMA_DEVAD,
-                                              MDIO_PMA_REG_CTRL,
-                                              &ctrl);
-                                if (!(ctrl & (1<<15)))
-                                        break;
-                                msleep(1);
-                        }
-                        DP(NETIF_MSG_LINK,
-                                "807x control reg 0x%x (after %d ms)\n",
-                                ctrl, cnt);
+                        /* enable LASI */
+                        bnx2x_cl45_write(bp, params->port,
+                                   ext_phy_type,
+                                   ext_phy_addr,
+                                   MDIO_PMA_DEVAD,
+                                   MDIO_PMA_REG_RX_ALARM_CTRL,
+                                   rx_alarm_ctrl_val);
+
+                        bnx2x_cl45_write(bp, params->port,
+                                       ext_phy_type,
+                                       ext_phy_addr,
+                                       MDIO_PMA_DEVAD,
+                                       MDIO_PMA_REG_LASI_CTRL,
+                                       lasi_ctrl_val);
+
+                        bnx2x_8073_set_pause_cl37(params, vars);
 
                         if (ext_phy_type ==
                             PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072){
                                 bnx2x_bcm8072_external_rom_boot(params);
                         } else {
-                                bnx2x_bcm8073_external_rom_boot(params);
+
                                 /* In case of 8073 with long xaui lines,
                                 don't set the 8073 xaui low power*/
                                 bnx2x_bcm8073_set_xaui_low_power_mode(params);
                         }
 
-                        /* enable LASI */
-                        bnx2x_cl45_write(bp, params->port,
-                                       ext_phy_type,
-                                       ext_phy_addr,
-                                       MDIO_PMA_DEVAD,
-                                       MDIO_PMA_REG_RX_ALARM_CTRL,
-                                       rx_alarm_ctrl_val);
-
-                        bnx2x_cl45_write(bp, params->port,
-                                       ext_phy_type,
-                                       ext_phy_addr,
-                                       MDIO_PMA_DEVAD,
-                                       MDIO_PMA_REG_LASI_CTRL,
-                                       lasi_ctrl_val);
+                        bnx2x_cl45_read(bp, params->port,
+                                      ext_phy_type,
+                                      ext_phy_addr,
+                                      MDIO_PMA_DEVAD,
+                                      0xca13,
+                                      &tmp1);
 
                         bnx2x_cl45_read(bp, params->port,
                                       ext_phy_type,
@@ -2519,12 +2630,21 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
                         /* If this is forced speed, set to KR or KX
                          * (all other are not supported)
                          */
-                        if (!(params->req_line_speed == SPEED_AUTO_NEG)) {
-                        if (params->req_line_speed == SPEED_10000) {
-                                        bnx2x_bcm807x_force_10G(params);
-                                        DP(NETIF_MSG_LINK,
-                                           "Forced speed 10G on 807X\n");
-                                        break;
+                        if (params->loopback_mode == LOOPBACK_EXT) {
+                                bnx2x_bcm807x_force_10G(params);
+                                DP(NETIF_MSG_LINK,
+                                        "Forced speed 10G on 807X\n");
+                                break;
+                        } else {
+                                bnx2x_cl45_write(bp, params->port,
+                                               ext_phy_type, ext_phy_addr,
+                                               MDIO_PMA_DEVAD,
+                                               MDIO_PMA_REG_BCM_CTRL,
+                                               0x0002);
+                        }
+                        if (params->req_line_speed != SPEED_AUTO_NEG) {
+                                if (params->req_line_speed == SPEED_10000) {
+                                        val = (1<<7);
                                 } else if (params->req_line_speed ==
                                            SPEED_2500) {
                                         val = (1<<5);
@@ -2539,11 +2659,14 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
                                         PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)
                                         val |= (1<<7);
 
+                                /* Note that 2.5G works only when
+                                used with 1G advertisment */
                                 if (params->speed_cap_mask &
-                                        PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)
+                                        (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G |
+                                         PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G))
                                         val |= (1<<5);
-                                DP(NETIF_MSG_LINK, "807x autoneg val = 0x%x\n", val);
-                                /*val = ((1<<5)|(1<<7));*/
+                                DP(NETIF_MSG_LINK,
+                                         "807x autoneg val = 0x%x\n", val);
                         }
 
                         bnx2x_cl45_write(bp, params->port,
@@ -2554,20 +2677,19 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
 
                         if (ext_phy_type ==
                             PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073) {
-                                /* Disable 2.5Ghz */
+
                                 bnx2x_cl45_read(bp, params->port,
                                               ext_phy_type,
                                               ext_phy_addr,
                                               MDIO_AN_DEVAD,
                                               0x8329, &tmp1);
-/* SUPPORT_SPEED_CAPABILITY
-                                (Due to the nature of the link order, its not
-                                possible to enable 2.5G within the autoneg
-                                capabilities)
-                                if (params->speed_cap_mask &
-                                PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G)
-*/
-                                if (params->req_line_speed == SPEED_2500) {
+
+                                if (((params->speed_cap_mask &
+                                      PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G) &&
+                                     (params->req_line_speed ==
+                                      SPEED_AUTO_NEG)) ||
+                                    (params->req_line_speed ==
+                                     SPEED_2500)) {
                                         u16 phy_ver;
                                         /* Allow 2.5G for A1 and above */
                                         bnx2x_cl45_read(bp, params->port,
@@ -2575,49 +2697,53 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
                                          ext_phy_addr,
                                          MDIO_PMA_DEVAD,
                                          0xc801, &phy_ver);
-
+                                        DP(NETIF_MSG_LINK, "Add 2.5G\n");
                                         if (phy_ver > 0)
                                                 tmp1 |= 1;
                                         else
                                                 tmp1 &= 0xfffe;
-                        }
-                                else
+                                } else {
+                                        DP(NETIF_MSG_LINK, "Disable 2.5G\n");
                                         tmp1 &= 0xfffe;
+                                }
 
-                        bnx2x_cl45_write(bp, params->port,
-                                       ext_phy_type,
-                                       ext_phy_addr,
-                                       MDIO_AN_DEVAD,
+                                bnx2x_cl45_write(bp, params->port,
+                                               ext_phy_type,
+                                               ext_phy_addr,
+                                               MDIO_AN_DEVAD,
                                                0x8329, tmp1);
                         }
-                        /* Add support for CL37 (passive mode) I */
-                        bnx2x_cl45_write(bp, params->port,
+
+                        /* Add support for CL37 (passive mode) II */
+
+                        bnx2x_cl45_read(bp, params->port,
                                        ext_phy_type,
                                        ext_phy_addr,
                                        MDIO_AN_DEVAD,
-                                       MDIO_AN_REG_CL37_CL73, 0x040c);
-                        /* Add support for CL37 (passive mode) II */
+                                       MDIO_AN_REG_CL37_FC_LD,
+                                       &tmp1);
+
                         bnx2x_cl45_write(bp, params->port,
                                        ext_phy_type,
                                        ext_phy_addr,
                                        MDIO_AN_DEVAD,
-                                       MDIO_AN_REG_CL37_FD, 0x20);
+                                       MDIO_AN_REG_CL37_FC_LD, (tmp1 |
+                                       ((params->req_duplex == DUPLEX_FULL) ?
+                                       0x20 : 0x40)));
+
                         /* Add support for CL37 (passive mode) III */
                         bnx2x_cl45_write(bp, params->port,
                                        ext_phy_type,
                                        ext_phy_addr,
                                        MDIO_AN_DEVAD,
                                        MDIO_AN_REG_CL37_AN, 0x1000);
-                        /* Restart autoneg */
-                        msleep(500);
 
                         if (ext_phy_type ==
                             PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073) {
-
-                        /* The SNR will improve about 2db by changing the
+                                /* The SNR will improve about 2db by changing
                                 BW and FEE main tap. Rest commands are executed
                                 after link is up*/
-                        /* Change FFE main cursor to 5 in EDC register */
+                                /*Change FFE main cursor to 5 in EDC register*/
                                 if (bnx2x_8073_is_snr_needed(params))
                                         bnx2x_cl45_write(bp, params->port,
                                                     ext_phy_type,
@@ -2626,25 +2752,28 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
                                                     MDIO_PMA_REG_EDC_FFE_MAIN,
                                                     0xFB0C);
 
-                        /* Enable FEC (Forware Error Correction)
-                           Request in the AN */
-                        bnx2x_cl45_read(bp, params->port,
-                                      ext_phy_type,
-                                      ext_phy_addr,
-                                      MDIO_AN_DEVAD,
-                                      MDIO_AN_REG_ADV2, &tmp1);
+                                /* Enable FEC (Forware Error Correction)
+                                Request in the AN */
+                                bnx2x_cl45_read(bp, params->port,
+                                              ext_phy_type,
+                                              ext_phy_addr,
+                                              MDIO_AN_DEVAD,
+                                              MDIO_AN_REG_ADV2, &tmp1);
 
-                        tmp1 |= (1<<15);
+                                tmp1 |= (1<<15);
+
+                                bnx2x_cl45_write(bp, params->port,
+                                               ext_phy_type,
+                                               ext_phy_addr,
+                                               MDIO_AN_DEVAD,
+                                               MDIO_AN_REG_ADV2, tmp1);
 
-                        bnx2x_cl45_write(bp, params->port,
-                                      ext_phy_type,
-                                      ext_phy_addr,
-                                      MDIO_AN_DEVAD,
-                                      MDIO_AN_REG_ADV2, tmp1);
                         }
 
                         bnx2x_ext_phy_set_pause(params, vars);
 
+                        /* Restart autoneg */
+                        msleep(500);
                         bnx2x_cl45_write(bp, params->port,
                                        ext_phy_type,
                                        ext_phy_addr,
@@ -2701,10 +2830,7 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
                 }
 
         } else { /* SerDes */
-/*              ext_phy_addr = ((bp->ext_phy_config &
-                                 PORT_HW_CFG_SERDES_EXT_PHY_ADDR_MASK) >>
-                                PORT_HW_CFG_SERDES_EXT_PHY_ADDR_SHIFT);
-*/
+
                 ext_phy_type = SERDES_EXT_PHY_TYPE(params->ext_phy_config);
                 switch (ext_phy_type) {
                 case PORT_HW_CFG_SERDES_EXT_PHY_TYPE_DIRECT:
@@ -2726,7 +2852,7 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
 
 
 static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
-                                  struct link_vars *vars)
+                                 struct link_vars *vars)
 {
         struct bnx2x *bp = params->bp;
         u32 ext_phy_type;
@@ -2767,6 +2893,8 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                                       MDIO_PMA_REG_RX_SD, &rx_sd);
                         DP(NETIF_MSG_LINK, "8705 rx_sd 0x%x\n", rx_sd);
                         ext_phy_link_up = (rx_sd & 0x1);
+                        if (ext_phy_link_up)
+                                vars->line_speed = SPEED_10000;
                         break;
 
                 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706:
@@ -2810,6 +2938,13 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                          */
                         ext_phy_link_up = ((rx_sd & pcs_status & 0x1) ||
                                            (val2 & (1<<1)));
+                        if (ext_phy_link_up) {
+                                if (val2 & (1<<1))
+                                        vars->line_speed = SPEED_1000;
+                                else
+                                        vars->line_speed = SPEED_10000;
+                        }
+
                         /* clear LASI indication*/
                         bnx2x_cl45_read(bp, params->port, ext_phy_type,
                                       ext_phy_addr,
@@ -2820,6 +2955,8 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072:
                 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
                 {
+                        u16 link_status = 0;
+                        u16 an1000_status = 0;
                         if (ext_phy_type ==
                              PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072) {
                                 bnx2x_cl45_read(bp, params->port,
@@ -2846,14 +2983,9 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                                               MDIO_PMA_DEVAD,
                                               MDIO_PMA_REG_LASI_STATUS, &val1);
 
-                                bnx2x_cl45_read(bp, params->port,
-                                              ext_phy_type,
-                                              ext_phy_addr,
-                                              MDIO_PMA_DEVAD,
-                                              MDIO_PMA_REG_LASI_STATUS, &val2);
                                 DP(NETIF_MSG_LINK,
-                                         "8703 LASI status 0x%x->0x%x\n",
-                                          val1, val2);
+                                         "8703 LASI status 0x%x\n",
+                                          val1);
                         }
 
                         /* clear the interrupt LASI status register */
@@ -2869,20 +3001,23 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                                       MDIO_PCS_REG_STATUS, &val1);
                         DP(NETIF_MSG_LINK, "807x PCS status 0x%x->0x%x\n",
                            val2, val1);
-                        /* Check the LASI */
+                        /* Clear MSG-OUT */
                         bnx2x_cl45_read(bp, params->port,
                                       ext_phy_type,
                                       ext_phy_addr,
                                       MDIO_PMA_DEVAD,
-                                      MDIO_PMA_REG_RX_ALARM, &val2);
+                                      0xca13,
+                                      &val1);
+
+                        /* Check the LASI */
                         bnx2x_cl45_read(bp, params->port,
                                       ext_phy_type,
                                       ext_phy_addr,
                                       MDIO_PMA_DEVAD,
-                                      MDIO_PMA_REG_RX_ALARM,
-                                      &val1);
-                        DP(NETIF_MSG_LINK, "KR 0x9003 0x%x->0x%x\n",
-                           val2, val1);
+                                      MDIO_PMA_REG_RX_ALARM, &val2);
+
+                        DP(NETIF_MSG_LINK, "KR 0x9003 0x%x\n", val2);
+
                         /* Check the link status */
                         bnx2x_cl45_read(bp, params->port,
                                       ext_phy_type,
@@ -2905,29 +3040,29 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                         DP(NETIF_MSG_LINK, "PMA_REG_STATUS=0x%x\n", val1);
                         if (ext_phy_type ==
                             PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073) {
-                                u16 an1000_status = 0;
+
                                 if (ext_phy_link_up &&
-                                    (
-                                     (params->req_line_speed != SPEED_10000)
-                                     )) {
+                                    ((params->req_line_speed !=
+                                        SPEED_10000))) {
                                         if (bnx2x_bcm8073_xaui_wa(params)
                                              != 0) {
                                                 ext_phy_link_up = 0;
                                                 break;
                                         }
-                                        bnx2x_cl45_read(bp, params->port,
+                                }
+                                bnx2x_cl45_read(bp, params->port,
                                                       ext_phy_type,
                                                       ext_phy_addr,
-                                                      MDIO_XS_DEVAD,
+                                                      MDIO_AN_DEVAD,
                                                       0x8304,
                                                       &an1000_status);
-                                        bnx2x_cl45_read(bp, params->port,
+                                bnx2x_cl45_read(bp, params->port,
                                                       ext_phy_type,
                                                       ext_phy_addr,
-                                                      MDIO_XS_DEVAD,
+                                                      MDIO_AN_DEVAD,
                                                       0x8304,
                                                       &an1000_status);
-                                }
+
                                 /* Check the link status on 1.1.2 */
                                 bnx2x_cl45_read(bp, params->port,
                                               ext_phy_type,
@@ -2943,8 +3078,8 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                                              "an_link_status=0x%x\n",
                                           val2, val1, an1000_status);
 
-                                ext_phy_link_up = (((val1 & 4) == 4) ||
-                                                    (an1000_status & (1<<1)));
+                                        ext_phy_link_up = (((val1 & 4) == 4) ||
+                                                (an1000_status & (1<<1)));
                                 if (ext_phy_link_up &&
                                     bnx2x_8073_is_snr_needed(params)) {
                                         /* The SNR will improve about 2dbby
@@ -2968,8 +3103,74 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                                                     MDIO_PMA_REG_CDR_BANDWIDTH,
                                                     0x0333);
 
+
+                                }
+                                bnx2x_cl45_read(bp, params->port,
+                                                      ext_phy_type,
+                                                      ext_phy_addr,
+                                                      MDIO_PMA_DEVAD,
+                                                      0xc820,
+                                                      &link_status);
+
+                                /* Bits 0..2 --> speed detected,
+                                   bits 13..15--> link is down */
+                                if ((link_status & (1<<2)) &&
+                                    (!(link_status & (1<<15)))) {
+                                        ext_phy_link_up = 1;
+                                        vars->line_speed = SPEED_10000;
+                                        DP(NETIF_MSG_LINK,
+                                                 "port %x: External link"
+                                                 " up in 10G\n", params->port);
+                                } else if ((link_status & (1<<1)) &&
+                                           (!(link_status & (1<<14)))) {
+                                        ext_phy_link_up = 1;
+                                        vars->line_speed = SPEED_2500;
+                                        DP(NETIF_MSG_LINK,
+                                                 "port %x: External link"
+                                                 " up in 2.5G\n", params->port);
+                                } else if ((link_status & (1<<0)) &&
+                                           (!(link_status & (1<<13)))) {
+                                        ext_phy_link_up = 1;
+                                        vars->line_speed = SPEED_1000;
+                                        DP(NETIF_MSG_LINK,
+                                                 "port %x: External link"
+                                                 " up in 1G\n", params->port);
+                                } else {
+                                        ext_phy_link_up = 0;
+                                        DP(NETIF_MSG_LINK,
+                                                 "port %x: External link"
+                                                 " is down\n", params->port);
+                                }
+                        } else {
+                                /* See if 1G link is up for the 8072 */
+                                bnx2x_cl45_read(bp, params->port,
+                                                      ext_phy_type,
+                                                      ext_phy_addr,
+                                                      MDIO_AN_DEVAD,
+                                                      0x8304,
+                                                      &an1000_status);
+                                bnx2x_cl45_read(bp, params->port,
+                                                      ext_phy_type,
+                                                      ext_phy_addr,
+                                                      MDIO_AN_DEVAD,
+                                                      0x8304,
+                                                      &an1000_status);
+                                if (an1000_status & (1<<1)) {
+                                        ext_phy_link_up = 1;
+                                        vars->line_speed = SPEED_1000;
+                                        DP(NETIF_MSG_LINK,
+                                                 "port %x: External link"
+                                                 " up in 1G\n", params->port);
+                                } else if (ext_phy_link_up) {
+                                        ext_phy_link_up = 1;
+                                        vars->line_speed = SPEED_10000;
+                                        DP(NETIF_MSG_LINK,
+                                                 "port %x: External link"
+                                                 " up in 10G\n", params->port);
                                 }
                         }
+
+
                         break;
                 }
                 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
@@ -3006,6 +3207,7 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
                                               MDIO_AN_DEVAD,
                                               MDIO_AN_REG_MASTER_STATUS,
                                               &val2);
+                                vars->line_speed = SPEED_10000;
                                 DP(NETIF_MSG_LINK,
                                          "SFX7101 AN status 0x%x->Master=%x\n",
                                           val2,
@@ -3100,7 +3302,7 @@ static void bnx2x_link_int_enable(struct link_params *params)
  * link management
  */
 static void bnx2x_link_int_ack(struct link_params *params,
-                             struct link_vars *vars, u16 is_10g)
+                             struct link_vars *vars, u8 is_10g)
 {
         struct bnx2x *bp = params->bp;
         u8 port = params->port;
@@ -3181,7 +3383,8 @@ static u8 bnx2x_format_ver(u32 num, u8 *str, u16 len)
 }
 
 
-static void bnx2x_turn_on_sf(struct bnx2x *bp, u8 port, u8 ext_phy_addr)
+static void bnx2x_turn_on_ef(struct bnx2x *bp, u8 port, u8 ext_phy_addr,
+                           u32 ext_phy_type)
 {
         u32 cnt = 0;
         u16 ctrl = 0;
@@ -3192,12 +3395,14 @@ static void bnx2x_turn_on_sf(struct bnx2x *bp, u8 port, u8 ext_phy_addr)
 
         /* take ext phy out of reset */
         bnx2x_set_gpio(bp,
-                        MISC_REGISTERS_GPIO_2,
-                        MISC_REGISTERS_GPIO_HIGH);
+                          MISC_REGISTERS_GPIO_2,
+                          MISC_REGISTERS_GPIO_HIGH,
+                          port);
 
         bnx2x_set_gpio(bp,
-                        MISC_REGISTERS_GPIO_1,
-                        MISC_REGISTERS_GPIO_HIGH);
+                          MISC_REGISTERS_GPIO_1,
+                          MISC_REGISTERS_GPIO_HIGH,
+                          port);
 
         /* wait for 5ms */
         msleep(5);
@@ -3205,7 +3410,7 @@ static void bnx2x_turn_on_sf(struct bnx2x *bp, u8 port, u8 ext_phy_addr)
         for (cnt = 0; cnt < 1000; cnt++) {
                 msleep(1);
                 bnx2x_cl45_read(bp, port,
-                              PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101,
+                              ext_phy_type,
                               ext_phy_addr,
                               MDIO_PMA_DEVAD,
                               MDIO_PMA_REG_CTRL,
@@ -3217,13 +3422,17 @@ static void bnx2x_turn_on_sf(struct bnx2x *bp, u8 port, u8 ext_phy_addr)
         }
 }
 
-static void bnx2x_turn_off_sf(struct bnx2x *bp)
+static void bnx2x_turn_off_sf(struct bnx2x *bp, u8 port)
 {
         /* put sf to reset */
-        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_LOW);
         bnx2x_set_gpio(bp,
-                        MISC_REGISTERS_GPIO_2,
-                        MISC_REGISTERS_GPIO_LOW);
+                          MISC_REGISTERS_GPIO_1,
+                          MISC_REGISTERS_GPIO_LOW,
+                          port);
+        bnx2x_set_gpio(bp,
+                          MISC_REGISTERS_GPIO_2,
+                          MISC_REGISTERS_GPIO_LOW,
+                          port);
 }
 
 u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
@@ -3253,7 +3462,8 @@ u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
 
                 /* Take ext phy out of reset */
                 if (!driver_loaded)
-                        bnx2x_turn_on_sf(bp, params->port, ext_phy_addr);
+                        bnx2x_turn_on_ef(bp, params->port, ext_phy_addr,
+                                       ext_phy_type);
 
                 /*  wait for 1ms */
                 msleep(1);
@@ -3276,11 +3486,16 @@ u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
                 version[4] = '\0';
 
                 if (!driver_loaded)
-                        bnx2x_turn_off_sf(bp);
+                        bnx2x_turn_off_sf(bp, params->port);
                 break;
         case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072:
         case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
         {
+                /* Take ext phy out of reset */
+                if (!driver_loaded)
+                        bnx2x_turn_on_ef(bp, params->port, ext_phy_addr,
+                                       ext_phy_type);
+
                 bnx2x_cl45_read(bp, params->port, ext_phy_type,
                               ext_phy_addr,
                               MDIO_PMA_DEVAD,
@@ -3333,7 +3548,7 @@ static void bnx2x_set_xgxs_loopback(struct link_params *params,
         struct bnx2x *bp = params->bp;
 
         if (is_10g) {
-                 u32 md_devad;
+                u32 md_devad;
 
                 DP(NETIF_MSG_LINK, "XGXS 10G loopback enable\n");
 
@@ -3553,6 +3768,8 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
                u16 hw_led_mode, u32 chip_id)
 {
         u8 rc = 0;
+        u32 tmp;
+        u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
         DP(NETIF_MSG_LINK, "bnx2x_set_led: port %x, mode %d\n", port, mode);
         DP(NETIF_MSG_LINK, "speed 0x%x, hw_led_mode 0x%x\n",
                  speed, hw_led_mode);
@@ -3561,6 +3778,9 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
                 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 0);
                 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4,
                            SHARED_HW_CFG_LED_MAC1);
+
+                tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
+                EMAC_WR(bp, EMAC_REG_EMAC_LED, (tmp | EMAC_LED_OVERRIDE));
                 break;
 
         case LED_MODE_OPER:
@@ -3572,6 +3792,10 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
                            LED_BLINK_RATE_VAL);
                 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 +
                            port*4, 1);
+                tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
+                EMAC_WR(bp, EMAC_REG_EMAC_LED,
+                            (tmp & (~EMAC_LED_OVERRIDE)));
+
                 if (!CHIP_IS_E1H(bp) &&
                     ((speed == SPEED_2500) ||
                      (speed == SPEED_1000) ||
@@ -3622,7 +3846,8 @@ static u8 bnx2x_link_initialize(struct link_params *params,
         struct bnx2x *bp = params->bp;
         u8 port = params->port;
         u8 rc = 0;
-
+        u8 non_ext_phy;
+        u32 ext_phy_type = XGXS_EXT_PHY_TYPE(params->ext_phy_config);
         /* Activate the external PHY */
         bnx2x_ext_phy_reset(params, vars);
 
@@ -3644,10 +3869,6 @@ static u8 bnx2x_link_initialize(struct link_params *params,
                 bnx2x_set_swap_lanes(params);
         }
 
-        /* Set Parallel Detect */
-        if (params->req_line_speed == SPEED_AUTO_NEG)
-                bnx2x_set_parallel_detection(params, vars->phy_flags);
-
         if (vars->phy_flags & PHY_XGXS_FLAG) {
                 if (params->req_line_speed &&
                     ((params->req_line_speed == SPEED_100) ||
@@ -3657,68 +3878,33 @@ static u8 bnx2x_link_initialize(struct link_params *params,
                         vars->phy_flags &= ~PHY_SGMII_FLAG;
                 }
         }
+        /* In case of external phy existance, the line speed would be the
+         line speed linked up by the external phy. In case it is direct only,
+          then the line_speed during initialization will be equal to the
+           req_line_speed*/
+        vars->line_speed = params->req_line_speed;
 
-        if (!(vars->phy_flags & PHY_SGMII_FLAG)) {
-                u16 bank, rx_eq;
-
-                rx_eq = ((params->serdes_config &
-                          PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_MASK) >>
-                         PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_SHIFT);
+        bnx2x_calc_ieee_aneg_adv(params, &vars->ieee_fc);
 
-                DP(NETIF_MSG_LINK, "setting rx eq to 0x%x\n", rx_eq);
-                for (bank = MDIO_REG_BANK_RX0; bank <= MDIO_REG_BANK_RX_ALL;
-                      bank += (MDIO_REG_BANK_RX1-MDIO_REG_BANK_RX0)) {
-                        CL45_WR_OVER_CL22(bp, port,
-                                              params->phy_addr,
-                                              bank ,
-                                              MDIO_RX0_RX_EQ_BOOST,
-                                              ((rx_eq &
-                                MDIO_RX0_RX_EQ_BOOST_EQUALIZER_CTRL_MASK) |
-                                MDIO_RX0_RX_EQ_BOOST_OFFSET_CTRL));
-                }
-
-                /* forced speed requested? */
-                if (params->req_line_speed != SPEED_AUTO_NEG) {
-                        DP(NETIF_MSG_LINK, "not SGMII, no AN\n");
-
-                        /* disable autoneg */
-                        bnx2x_set_autoneg(params, vars);
-
-                        /* program speed and duplex */
-                        bnx2x_program_serdes(params);
-                        vars->ieee_fc =
-                                MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE;
-
-                } else { /* AN_mode */
-                        DP(NETIF_MSG_LINK, "not SGMII, AN\n");
-
-                        /* AN enabled */
-                        bnx2x_set_brcm_cl37_advertisment(params);
-
-                        /* program duplex & pause advertisement (for aneg) */
-                        bnx2x_set_ieee_aneg_advertisment(params,
-                                                       &vars->ieee_fc);
-
-                        /* enable autoneg */
-                        bnx2x_set_autoneg(params, vars);
-
-                        /* enable and restart AN */
-                        bnx2x_restart_autoneg(params);
-                }
-
-        } else { /* SGMII mode */
-                DP(NETIF_MSG_LINK, "SGMII\n");
-
-                bnx2x_initialize_sgmii_process(params);
+        /* init ext phy and enable link state int */
+        non_ext_phy = ((ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) ||
+                       (params->loopback_mode == LOOPBACK_XGXS_10) ||
+                       (params->loopback_mode == LOOPBACK_EXT_PHY));
+
+        if (non_ext_phy ||
+            (ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705)) {
+                if (params->req_line_speed == SPEED_AUTO_NEG)
+                        bnx2x_set_parallel_detection(params, vars->phy_flags);
+                bnx2x_init_internal_phy(params, vars);
         }
 
-        /* init ext phy and enable link state int */
-        rc |= bnx2x_ext_phy_init(params, vars);
+        if (!non_ext_phy)
+                rc |= bnx2x_ext_phy_init(params, vars);
 
         bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4,
-                       (NIG_STATUS_XGXS0_LINK10G |
-                        NIG_STATUS_XGXS0_LINK_STATUS |
-                        NIG_STATUS_SERDES0_LINK_STATUS));
+                     (NIG_STATUS_XGXS0_LINK10G |
+                      NIG_STATUS_XGXS0_LINK_STATUS |
+                      NIG_STATUS_SERDES0_LINK_STATUS));
 
         return rc;
 
@@ -3730,15 +3916,23 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
         struct bnx2x *bp = params->bp;
 
         u32 val;
-        DP(NETIF_MSG_LINK, "Phy Initialization started\n");
+        DP(NETIF_MSG_LINK, "Phy Initialization started \n");
         DP(NETIF_MSG_LINK, "req_speed = %d, req_flowctrl=%d\n",
                   params->req_line_speed, params->req_flow_ctrl);
         vars->link_status = 0;
+        vars->phy_link_up = 0;
+        vars->link_up = 0;
+        vars->line_speed = 0;
+        vars->duplex = DUPLEX_FULL;
+        vars->flow_ctrl = FLOW_CTRL_NONE;
+        vars->mac_type = MAC_TYPE_NONE;
+
         if (params->switch_cfg ==  SWITCH_CFG_1G)
                 vars->phy_flags = PHY_SERDES_FLAG;
         else
                 vars->phy_flags = PHY_XGXS_FLAG;
 
+
         /* disable attentions */
         bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4,
                        (NIG_MASK_XGXS0_LINK_STATUS |
@@ -3894,6 +4088,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
                 }
 
                 bnx2x_link_initialize(params, vars);
+                msleep(30);
                 bnx2x_link_int_enable(params);
         }
         return 0;
@@ -3943,39 +4138,22 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars)
                         /* HW reset */
 
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                                       MISC_REGISTERS_GPIO_OUTPUT_LOW);
+                                          MISC_REGISTERS_GPIO_OUTPUT_LOW,
+                                          port);
 
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                       MISC_REGISTERS_GPIO_OUTPUT_LOW);
+                                          MISC_REGISTERS_GPIO_OUTPUT_LOW,
+                                          port);
 
                         DP(NETIF_MSG_LINK, "reset external PHY\n");
-                } else {
-
-                        u8 ext_phy_addr = ((ext_phy_config &
-                                         PORT_HW_CFG_XGXS_EXT_PHY_ADDR_MASK) >>
-                                         PORT_HW_CFG_XGXS_EXT_PHY_ADDR_SHIFT);
-
-                        /* SW reset */
-                        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
-                                       MDIO_PMA_DEVAD,
-                                       MDIO_PMA_REG_CTRL,
-                                       1<<15);
-
-                        /* Set Low Power Mode */
-                        bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
-                                  MDIO_PMA_DEVAD,
-                                  MDIO_PMA_REG_CTRL,
-                                  1<<11);
-
-
-                        if (ext_phy_type ==
-                            PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073) {
-                                DP(NETIF_MSG_LINK, "Setting 8073 port %d into"
+                } else if (ext_phy_type ==
+                           PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073) {
+                                DP(NETIF_MSG_LINK, "Setting 8073 port %d into "
                                          "low power mode\n",
                                          port);
                                 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                        MISC_REGISTERS_GPIO_OUTPUT_LOW);
-                        }
+                                        MISC_REGISTERS_GPIO_OUTPUT_LOW,
+                                                  port);
                 }
         }
         /* reset the SerDes/XGXS */
@@ -3995,6 +4173,73 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars)
         return 0;
 }
 
+static u8 bnx2x_update_link_down(struct link_params *params,
+                               struct link_vars *vars)
+{
+        struct bnx2x *bp = params->bp;
+        u8 port = params->port;
+        DP(NETIF_MSG_LINK, "Port %x: Link is down\n", port);
+        bnx2x_set_led(bp, port, LED_MODE_OFF,
+                    0, params->hw_led_mode,
+                    params->chip_id);
+
+        /* indicate no mac active */
+        vars->mac_type = MAC_TYPE_NONE;
+
+        /* update shared memory */
+        vars->link_status = 0;
+        vars->line_speed = 0;
+        bnx2x_update_mng(params, vars->link_status);
+
+        /* activate nig drain */
+        REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 1);
+
+        /* reset BigMac */
+        bnx2x_bmac_rx_disable(bp, params->port);
+        REG_WR(bp, GRCBASE_MISC +
+                   MISC_REGISTERS_RESET_REG_2_CLEAR,
+                   (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port));
+        return 0;
+}
+
+static u8 bnx2x_update_link_up(struct link_params *params,
+                             struct link_vars *vars,
+                             u8 link_10g, u32 gp_status)
+{
+        struct bnx2x *bp = params->bp;
+        u8 port = params->port;
+        u8 rc = 0;
+        vars->link_status |= LINK_STATUS_LINK_UP;
+        if (link_10g) {
+                bnx2x_bmac_enable(params, vars, 0);
+                bnx2x_set_led(bp, port, LED_MODE_OPER,
+                            SPEED_10000, params->hw_led_mode,
+                            params->chip_id);
+
+        } else {
+                bnx2x_emac_enable(params, vars, 0);
+                rc = bnx2x_emac_program(params, vars->line_speed,
+                                      vars->duplex);
+
+                /* AN complete? */
+                if (gp_status & MDIO_AN_CL73_OR_37_COMPLETE) {
+                        if (!(vars->phy_flags &
+                              PHY_SGMII_FLAG))
+                                bnx2x_set_sgmii_tx_driver(params);
+                }
+        }
+
+        /* PBF - link up */
+        rc |= bnx2x_pbf_update(params, vars->flow_ctrl,
+                              vars->line_speed);
+
+        /* disable drain */
+        REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 0);
+
+        /* update shared memory */
+        bnx2x_update_mng(params, vars->link_status);
+        return rc;
+}
 /* This function should called upon link interrupt */
 /* In case vars->link_up, driver needs to
         1. Update the pbf
@@ -4012,10 +4257,10 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
 {
         struct bnx2x *bp = params->bp;
         u8 port = params->port;
-        u16 i;
         u16 gp_status;
-        u16 link_10g;
-        u8 rc = 0;
+        u8 link_10g;
+        u8 ext_phy_link_up, rc = 0;
+        u32 ext_phy_type;
 
         DP(NETIF_MSG_LINK, "port %x, XGXS?%x, int_status 0x%x\n",
          port,
@@ -4031,15 +4276,16 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
           REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68),
           REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK_STATUS + port*0x68));
 
+        ext_phy_type = XGXS_EXT_PHY_TYPE(params->ext_phy_config);
 
-        /* avoid fast toggling */
-        for (i = 0; i < 10; i++) {
-                msleep(10);
-                CL45_RD_OVER_CL22(bp, port, params->phy_addr,
-                                      MDIO_REG_BANK_GP_STATUS,
-                                      MDIO_GP_STATUS_TOP_AN_STATUS1,
-                                      &gp_status);
-        }
+        /* Check external link change only for non-direct */
+        ext_phy_link_up = bnx2x_ext_phy_is_link_up(params, vars);
+
+        /* Read gp_status */
+        CL45_RD_OVER_CL22(bp, port, params->phy_addr,
+                              MDIO_REG_BANK_GP_STATUS,
+                              MDIO_GP_STATUS_TOP_AN_STATUS1,
+                              &gp_status);
 
         rc = bnx2x_link_settings_status(params, vars, gp_status);
         if (rc != 0)
@@ -4055,73 +4301,177 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
 
         bnx2x_link_int_ack(params, vars, link_10g);
 
+        /* In case external phy link is up, and internal link is down
+        ( not initialized yet probably after link initialization, it needs
+        to be initialized.
+        Note that after link down-up as result of cable plug,
+        the xgxs link would probably become up again without the need to
+        initialize it*/
+
+        if ((ext_phy_type != PORT_HW_CFG_SERDES_EXT_PHY_TYPE_DIRECT) &&
+            (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705) &&
+            (ext_phy_link_up && !vars->phy_link_up))
+                bnx2x_init_internal_phy(params, vars);
+
         /* link is up only if both local phy and external phy are up */
-        vars->link_up = (vars->phy_link_up &&
-                           bnx2x_ext_phy_is_link_up(params, vars));
+        vars->link_up = (ext_phy_link_up && vars->phy_link_up);
 
-        if (!vars->phy_link_up &&
-            REG_RD(bp, NIG_REG_EMAC0_STATUS_MISC_MI_INT + port*0x18)) {
-                bnx2x_ext_phy_is_link_up(params, vars); /* Clear interrupt */
+        if (vars->link_up)
+                rc = bnx2x_update_link_up(params, vars, link_10g, gp_status);
+        else
+                rc = bnx2x_update_link_down(params, vars);
+
+        return rc;
+}
+
+static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, u32 shmem_base)
+{
+        u8 ext_phy_addr[PORT_MAX];
+        u16 val;
+        s8 port;
+
+        /* PART1 - Reset both phys */
+        for (port = PORT_MAX - 1; port >= PORT_0; port--) {
+                /* Extract the ext phy address for the port */
+                u32 ext_phy_config = REG_RD(bp, shmem_base +
+                                        offsetof(struct shmem_region,
+                   dev_info.port_hw_config[port].external_phy_config));
+
+                /* disable attentions */
+                bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4,
+                             (NIG_MASK_XGXS0_LINK_STATUS |
+                              NIG_MASK_XGXS0_LINK10G |
+                              NIG_MASK_SERDES0_LINK_STATUS |
+                              NIG_MASK_MI_INT));
+
+                ext_phy_addr[port] =
+                        ((ext_phy_config &
+                              PORT_HW_CFG_XGXS_EXT_PHY_ADDR_MASK) >>
+                              PORT_HW_CFG_XGXS_EXT_PHY_ADDR_SHIFT);
+
+                /* Need to take the phy out of low power mode in order
+                        to write to access its registers */
+                bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
+                                  MISC_REGISTERS_GPIO_OUTPUT_HIGH, port);
+
+                /* Reset the phy */
+                bnx2x_cl45_write(bp, port,
+                               PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                               ext_phy_addr[port],
+                               MDIO_PMA_DEVAD,
+                               MDIO_PMA_REG_CTRL,
+                               1<<15);
         }
 
-        if (vars->link_up) {
-                vars->link_status |= LINK_STATUS_LINK_UP;
-                if (link_10g) {
-                        bnx2x_bmac_enable(params, vars, 0);
-                        bnx2x_set_led(bp, port, LED_MODE_OPER,
-                                    SPEED_10000, params->hw_led_mode,
-                                    params->chip_id);
+        /* Add delay of 150ms after reset */
+        msleep(150);
 
-                } else {
-                        bnx2x_emac_enable(params, vars, 0);
-                        rc = bnx2x_emac_program(params, vars->line_speed,
-                                              vars->duplex);
+        /* PART2 - Download firmware to both phys */
+        for (port = PORT_MAX - 1; port >= PORT_0; port--) {
+                u16 fw_ver1;
 
-                        /* AN complete? */
-                        if (gp_status & MDIO_AN_CL73_OR_37_COMPLETE) {
-                                if (!(vars->phy_flags &
-                                      PHY_SGMII_FLAG))
-                                        bnx2x_set_sgmii_tx_driver(params);
-                        }
+                bnx2x_bcm8073_external_rom_boot(bp, port,
+                                                      ext_phy_addr[port]);
+
+                bnx2x_cl45_read(bp, port, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                              ext_phy_addr[port],
+                              MDIO_PMA_DEVAD,
+                              MDIO_PMA_REG_ROM_VER1, &fw_ver1);
+                if (fw_ver1 == 0) {
+                        DP(NETIF_MSG_LINK,
+                                 "bnx2x_8073_common_init_phy port %x "
+                                 "fw Download failed\n", port);
+                        return -EINVAL;
                 }
 
-                /* PBF - link up */
-                rc |= bnx2x_pbf_update(params, vars->flow_ctrl,
-                                      vars->line_speed);
+                /* Only set bit 10 = 1 (Tx power down) */
+                bnx2x_cl45_read(bp, port,
+                              PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                              ext_phy_addr[port],
+                              MDIO_PMA_DEVAD,
+                              MDIO_PMA_REG_TX_POWER_DOWN, &val);
 
-                /* disable drain */
-                REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 0);
+                /* Phase1 of TX_POWER_DOWN reset */
+                bnx2x_cl45_write(bp, port,
+                               PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                               ext_phy_addr[port],
+                               MDIO_PMA_DEVAD,
+                               MDIO_PMA_REG_TX_POWER_DOWN,
+                               (val | 1<<10));
+        }
 
-                /* update shared memory */
-                bnx2x_update_mng(params, vars->link_status);
+        /* Toggle Transmitter: Power down and then up with 600ms
+           delay between */
+        msleep(600);
 
-        } else { /* link down */
-                DP(NETIF_MSG_LINK, "Port %x: Link is down\n", params->port);
-                bnx2x_set_led(bp, port, LED_MODE_OFF,
-                            0, params->hw_led_mode,
-                            params->chip_id);
+        /* PART3 - complete TX_POWER_DOWN process, and set GPIO2 back to low */
+        for (port = PORT_MAX - 1; port >= PORT_0; port--) {
+                /* Phase2 of POWER_DOWN_RESET*/
+                /* Release bit 10 (Release Tx power down) */
+                bnx2x_cl45_read(bp, port,
+                              PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                              ext_phy_addr[port],
+                              MDIO_PMA_DEVAD,
+                              MDIO_PMA_REG_TX_POWER_DOWN, &val);
 
-                /* indicate no mac active */
-                vars->mac_type = MAC_TYPE_NONE;
+                bnx2x_cl45_write(bp, port,
+                               PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                               ext_phy_addr[port],
+                               MDIO_PMA_DEVAD,
+                               MDIO_PMA_REG_TX_POWER_DOWN, (val & (~(1<<10))));
+                msleep(15);
 
-                /* update shared memory */
-                vars->link_status = 0;
-                bnx2x_update_mng(params, vars->link_status);
+                /* Read modify write the SPI-ROM version select register */
+                bnx2x_cl45_read(bp, port,
+                              PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                              ext_phy_addr[port],
+                              MDIO_PMA_DEVAD,
+                              MDIO_PMA_REG_EDC_FFE_MAIN, &val);
+                bnx2x_cl45_write(bp, port,
+                              PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
+                              ext_phy_addr[port],
+                              MDIO_PMA_DEVAD,
+                              MDIO_PMA_REG_EDC_FFE_MAIN, (val | (1<<12)));
 
-                /* activate nig drain */
-                REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 1);
+                /* set GPIO2 back to LOW */
+                bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
+                                  MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
+        }
+        return 0;
 
-                /* reset BigMac */
-                bnx2x_bmac_rx_disable(bp, params->port);
-                REG_WR(bp, GRCBASE_MISC +
-                           MISC_REGISTERS_RESET_REG_2_CLEAR,
-                           (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port));
+}
 
+u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base)
+{
+        u8 rc = 0;
+        u32 ext_phy_type;
+
+        DP(NETIF_MSG_LINK, "bnx2x_common_init_phy\n");
+
+        /* Read the ext_phy_type for arbitrary port(0) */
+        ext_phy_type = XGXS_EXT_PHY_TYPE(
+                        REG_RD(bp, shmem_base +
+                           offsetof(struct shmem_region,
+                             dev_info.port_hw_config[0].external_phy_config)));
+
+        switch (ext_phy_type) {
+        case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
+        {
+                rc = bnx2x_8073_common_init_phy(bp, shmem_base);
+                break;
+        }
+        default:
+                DP(NETIF_MSG_LINK,
+                         "bnx2x_common_init_phy: ext_phy 0x%x not required\n",
+                         ext_phy_type);
+                break;
         }
 
         return rc;
 }
 
+
+
 static void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, u8 port, u8 phy_addr)
 {
         u16 val, cnt;
@@ -4154,7 +4504,7 @@ static void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, u8 port, u8 phy_addr)
 }
 #define RESERVED_SIZE 256
 /* max application is 160K bytes - data at end of RAM */
-#define MAX_APP_SIZE 160*1024 - RESERVED_SIZE
+#define MAX_APP_SIZE (160*1024 - RESERVED_SIZE)
 
 /* Header is 14 bytes */
 #define HEADER_SIZE 14
@@ -4192,12 +4542,12 @@ static u8 bnx2x_sfx7101_flash_download(struct bnx2x *bp, u8 port,
                 size = MAX_APP_SIZE+HEADER_SIZE;
         }
         DP(NETIF_MSG_LINK, "File version is %c%c\n", data[0x14e], data[0x14f]);
-        DP(NETIF_MSG_LINK, "                %c%c\n", data[0x150], data[0x151]);
+        DP(NETIF_MSG_LINK, "          %c%c\n", data[0x150], data[0x151]);
         /* Put the DSP in download mode by setting FLASH_CFG[2] to 1
            and issuing a reset.*/
 
         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0,
-                          MISC_REGISTERS_GPIO_HIGH);
+                          MISC_REGISTERS_GPIO_HIGH, port);
 
         bnx2x_sfx7101_sp_sw_reset(bp, port, ext_phy_addr);
 
@@ -4429,7 +4779,8 @@ static u8 bnx2x_sfx7101_flash_download(struct bnx2x *bp, u8 port,
         }
 
         /* DSP Remove Download Mode */
-        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, MISC_REGISTERS_GPIO_LOW);
+        bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0,
+                          MISC_REGISTERS_GPIO_LOW, port);
 
         bnx2x_sfx7101_sp_sw_reset(bp, port, ext_phy_addr);
 
@@ -4437,7 +4788,7 @@ static u8 bnx2x_sfx7101_flash_download(struct bnx2x *bp, u8 port,
         for (cnt = 0; cnt < 100; cnt++)
                 msleep(5);
 
-        bnx2x_hw_reset(bp);
+        bnx2x_hw_reset(bp, port);
 
         for (cnt = 0; cnt < 100; cnt++)
                 msleep(5);
@@ -4473,7 +4824,7 @@ static u8 bnx2x_sfx7101_flash_download(struct bnx2x *bp, u8 port,
                       MDIO_PMA_REG_7101_VER2,
                       &image_revision2);
 
-        if (data[0x14e] != (image_revision2&0xFF) ||
+        if (data[0x14e] != (image_revision2&0xFF) ||
             data[0x14f] != ((image_revision2&0xFF00)>>8) ||
             data[0x150] != (image_revision1&0xFF) ||
             data[0x151] != ((image_revision1&0xFF00)>>8)) {
@@ -4508,11 +4859,11 @@ u8 bnx2x_flash_download(struct bnx2x *bp, u8 port, u32 ext_phy_config,
         case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
                 /* Take ext phy out of reset */
                 if (!driver_loaded)
-                        bnx2x_turn_on_sf(bp, port, ext_phy_addr);
+                        bnx2x_turn_on_ef(bp, port, ext_phy_addr, ext_phy_type);
                 rc = bnx2x_sfx7101_flash_download(bp, port, ext_phy_addr,
                                                 data, size);
                 if (!driver_loaded)
-                        bnx2x_turn_off_sf(bp);
+                        bnx2x_turn_off_sf(bp, port);
                 break;
         case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT:
         case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE:
diff --git a/drivers/net/bnx2x_link.h b/drivers/net/bnx2x_link.h
index 714d37ac95de..86d54a17b411 100644
--- a/drivers/net/bnx2x_link.h
+++ b/drivers/net/bnx2x_link.h
@@ -55,14 +55,17 @@ struct link_params {
 #define LOOPBACK_BMAC   2
 #define LOOPBACK_XGXS_10        3
 #define LOOPBACK_EXT_PHY        4
+#define LOOPBACK_EXT    5
 
         u16 req_duplex;
         u16 req_flow_ctrl;
+        u16 req_fc_auto_adv; /* Should be set to TX / BOTH when
+        req_flow_ctrl is set to AUTO */
         u16 req_line_speed; /* Also determine AutoNeg */
 
         /* Device parameters */
         u8 mac_addr[6];
-        u16 mtu;
+
 
 
         /* shmem parameters */
@@ -140,7 +143,7 @@ u8 bnx2x_cl45_write(struct bnx2x *bp, u8 port, u32 ext_phy_type,
                   u8 phy_addr, u8 devad, u16 reg, u16 val);
 
 /* Reads the link_status from the shmem,
-   and update the link vars accordinaly */
+   and update the link vars accordingly */
 void bnx2x_link_status_update(struct link_params *input,
                             struct link_vars *output);
 /* returns string representing the fw_version of the external phy */
@@ -149,7 +152,7 @@ u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
 
 /* Set/Unset the led
    Basically, the CLC takes care of the led for the link, but in case one needs
-   to set/unset the led unnatually, set the "mode" to LED_MODE_OPER to
+   to set/unset the led unnaturally, set the "mode" to LED_MODE_OPER to
    blink the led, and LED_MODE_OFF to set the led off.*/
 u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
                u16 hw_led_mode, u32 chip_id);
@@ -164,5 +167,7 @@ u8 bnx2x_flash_download(struct bnx2x *bp, u8 port, u32 ext_phy_config,
         otherwise link is down*/
 u8 bnx2x_test_link(struct link_params *input, struct link_vars *vars);
 
+/* One-time initialization for external phy after power up */
+u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base);
 
 #endif /* BNX2X_LINK_H */
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index af251a5df844..971576b43687 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -44,7 +44,6 @@
 #include <net/ip.h>
 #include <net/tcp.h>
 #include <net/checksum.h>
-#include <linux/version.h>
 #include <net/ip6_checksum.h>
 #include <linux/workqueue.h>
 #include <linux/crc32.h>
@@ -60,8 +59,8 @@
 #include "bnx2x.h"
 #include "bnx2x_init.h"
 
-#define DRV_MODULE_VERSION      "1.45.6"
-#define DRV_MODULE_RELDATE      "2008/06/23"
+#define DRV_MODULE_VERSION      "1.45.17"
+#define DRV_MODULE_RELDATE      "2008/08/13"
 #define BNX2X_BC_VER            0x040200
 
 /* Time in jiffies before concluding the transmitter is hung */
@@ -76,23 +75,21 @@ MODULE_DESCRIPTION("Broadcom NetXtreme II BCM57710 Driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(DRV_MODULE_VERSION);
 
+static int disable_tpa;
 static int use_inta;
 static int poll;
 static int debug;
-static int disable_tpa;
-static int nomcp;
 static int load_count[3]; /* 0-common, 1-port0, 2-port1 */
 static int use_multi;
 
+module_param(disable_tpa, int, 0);
 module_param(use_inta, int, 0);
 module_param(poll, int, 0);
 module_param(debug, int, 0);
-module_param(disable_tpa, int, 0);
-module_param(nomcp, int, 0);
+MODULE_PARM_DESC(disable_tpa, "disable the TPA (LRO) feature");
 MODULE_PARM_DESC(use_inta, "use INT#A instead of MSI-X");
 MODULE_PARM_DESC(poll, "use polling (for debug)");
 MODULE_PARM_DESC(debug, "default debug msglevel");
-MODULE_PARM_DESC(nomcp, "ignore management CPU");
 
 #ifdef BNX2X_MULTI
 module_param(use_multi, int, 0);
@@ -237,17 +234,16 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
         while (*wb_comp != DMAE_COMP_VAL) {
                 DP(BNX2X_MSG_OFF, "wb_comp 0x%08x\n", *wb_comp);
 
-                /* adjust delay for emulation/FPGA */
-                if (CHIP_REV_IS_SLOW(bp))
-                        msleep(100);
-                else
-                        udelay(5);
-
                 if (!cnt) {
                         BNX2X_ERR("dmae timeout!\n");
                         break;
                 }
                 cnt--;
+                /* adjust delay for emulation/FPGA */
+                if (CHIP_REV_IS_SLOW(bp))
+                        msleep(100);
+                else
+                        udelay(5);
         }
 
         mutex_unlock(&bp->dmae_mutex);
@@ -310,17 +306,16 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32)
 
         while (*wb_comp != DMAE_COMP_VAL) {
 
-                /* adjust delay for emulation/FPGA */
-                if (CHIP_REV_IS_SLOW(bp))
-                        msleep(100);
-                else
-                        udelay(5);
-
                 if (!cnt) {
                         BNX2X_ERR("dmae timeout!\n");
                         break;
                 }
                 cnt--;
+                /* adjust delay for emulation/FPGA */
+                if (CHIP_REV_IS_SLOW(bp))
+                        msleep(100);
+                else
+                        udelay(5);
         }
         DP(BNX2X_MSG_OFF, "data [0x%08x 0x%08x 0x%08x 0x%08x]\n",
            bp->slowpath->wb_data[0], bp->slowpath->wb_data[1],
@@ -503,6 +498,9 @@ static void bnx2x_panic_dump(struct bnx2x *bp)
         int i;
         u16 j, start, end;
 
+        bp->stats_state = STATS_STATE_DISABLED;
+        DP(BNX2X_MSG_STATS, "stats_state - DISABLED\n");
+
         BNX2X_ERR("begin crash dump -----------------\n");
 
         for_each_queue(bp, i) {
@@ -513,17 +511,20 @@ static void bnx2x_panic_dump(struct bnx2x *bp)
                           "  tx_bd_prod(%x)  tx_bd_cons(%x)  *tx_cons_sb(%x)\n",
                           i, fp->tx_pkt_prod, fp->tx_pkt_cons, fp->tx_bd_prod,
                           fp->tx_bd_cons, le16_to_cpu(*fp->tx_cons_sb));
-                BNX2X_ERR("          rx_comp_prod(%x)  rx_comp_cons(%x)"
-                          "  *rx_cons_sb(%x)  *rx_bd_cons_sb(%x)"
-                          "  rx_sge_prod(%x)  last_max_sge(%x)\n",
-                          fp->rx_comp_prod, fp->rx_comp_cons,
-                          le16_to_cpu(*fp->rx_cons_sb),
-                          le16_to_cpu(*fp->rx_bd_cons_sb),
-                          fp->rx_sge_prod, fp->last_max_sge);
-                BNX2X_ERR("          fp_c_idx(%x)  fp_u_idx(%x)"
-                          "  bd data(%x,%x)  rx_alloc_failed(%lx)\n",
-                          fp->fp_c_idx, fp->fp_u_idx, hw_prods->packets_prod,
-                          hw_prods->bds_prod, fp->rx_alloc_failed);
+                BNX2X_ERR("          rx_bd_prod(%x)  rx_bd_cons(%x)"
+                          "  *rx_bd_cons_sb(%x)  rx_comp_prod(%x)"
+                          "  rx_comp_cons(%x)  *rx_cons_sb(%x)\n",
+                          fp->rx_bd_prod, fp->rx_bd_cons,
+                          le16_to_cpu(*fp->rx_bd_cons_sb), fp->rx_comp_prod,
+                          fp->rx_comp_cons, le16_to_cpu(*fp->rx_cons_sb));
+                BNX2X_ERR("          rx_sge_prod(%x)  last_max_sge(%x)"
+                          "  fp_c_idx(%x)  *sb_c_idx(%x)  fp_u_idx(%x)"
+                          "  *sb_u_idx(%x)  bd data(%x,%x)\n",
+                          fp->rx_sge_prod, fp->last_max_sge, fp->fp_c_idx,
+                          fp->status_blk->c_status_block.status_block_index,
+                          fp->fp_u_idx,
+                          fp->status_blk->u_status_block.status_block_index,
+                          hw_prods->packets_prod, hw_prods->bds_prod);
 
                 start = TX_BD(le16_to_cpu(*fp->tx_cons_sb) - 10);
                 end = TX_BD(le16_to_cpu(*fp->tx_cons_sb) + 245);
@@ -553,8 +554,8 @@ static void bnx2x_panic_dump(struct bnx2x *bp)
                                   j, rx_bd[1], rx_bd[0], sw_bd->skb);
                 }
 
-                start = 0;
-                end = RX_SGE_CNT*NUM_RX_SGE_PAGES;
+                start = RX_SGE(fp->rx_sge_prod);
+                end = RX_SGE(fp->last_max_sge);
                 for (j = start; j < end; j++) {
                         u32 *rx_sge = (u32 *)&fp->rx_sge_ring[j];
                         struct sw_rx_page *sw_page = &fp->rx_page_ring[j];
@@ -582,9 +583,6 @@ static void bnx2x_panic_dump(struct bnx2x *bp)
         bnx2x_fw_dump(bp);
         bnx2x_mc_assert(bp);
         BNX2X_ERR("end crash dump -----------------\n");
-
-        bp->stats_state = STATS_STATE_DISABLED;
-        DP(BNX2X_MSG_STATS, "stats_state - DISABLED\n");
 }
 
 static void bnx2x_int_enable(struct bnx2x *bp)
@@ -684,7 +682,8 @@ static void bnx2x_int_disable_sync(struct bnx2x *bp)
 static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 sb_id,
                                 u8 storm, u16 index, u8 op, u8 update)
 {
-        u32 igu_addr = (IGU_ADDR_INT_ACK + IGU_FUNC_BASE * BP_FUNC(bp)) * 8;
+        u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 +
+                       COMMAND_REG_INT_ACK);
         struct igu_ack_register igu_ack;
 
         igu_ack.status_block_index = index;
@@ -694,9 +693,9 @@ static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 sb_id,
                          (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
                          (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
 
-        DP(BNX2X_MSG_OFF, "write 0x%08x to IGU addr 0x%x\n",
-           (*(u32 *)&igu_ack), BAR_IGU_INTMEM + igu_addr);
-        REG_WR(bp, BAR_IGU_INTMEM + igu_addr, (*(u32 *)&igu_ack));
+        DP(BNX2X_MSG_OFF, "write 0x%08x to HC addr 0x%x\n",
+           (*(u32 *)&igu_ack), hc_addr);
+        REG_WR(bp, hc_addr, (*(u32 *)&igu_ack));
 }
 
 static inline u16 bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp)
@@ -716,36 +715,15 @@ static inline u16 bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp)
         return rc;
 }
 
-static inline int bnx2x_has_work(struct bnx2x_fastpath *fp)
-{
-        u16 rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb);
-
-        if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
-                rx_cons_sb++;
-
-        if ((fp->rx_comp_cons != rx_cons_sb) ||
-            (fp->tx_pkt_prod != le16_to_cpu(*fp->tx_cons_sb)) ||
-            (fp->tx_pkt_prod != fp->tx_pkt_cons))
-                return 1;
-
-        return 0;
-}
-
 static u16 bnx2x_ack_int(struct bnx2x *bp)
 {
-        u32 igu_addr = (IGU_ADDR_SIMD_MASK + IGU_FUNC_BASE * BP_FUNC(bp)) * 8;
-        u32 result = REG_RD(bp, BAR_IGU_INTMEM + igu_addr);
+        u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 +
+                       COMMAND_REG_SIMD_MASK);
+        u32 result = REG_RD(bp, hc_addr);
 
-        DP(BNX2X_MSG_OFF, "read 0x%08x from IGU addr 0x%x\n",
-           result, BAR_IGU_INTMEM + igu_addr);
+        DP(BNX2X_MSG_OFF, "read 0x%08x from HC addr 0x%x\n",
+           result, hc_addr);
 
-#ifdef IGU_DEBUG
-#warning IGU_DEBUG active
-        if (result == 0) {
-                BNX2X_ERR("read %x from IGU\n", result);
-                REG_WR(bp, TM_REG_TIMER_SOFT_RST, 0);
-        }
-#endif
         return result;
 }
 
@@ -898,6 +876,7 @@ static void bnx2x_tx_int(struct bnx2x_fastpath *fp, int work)
                 netif_tx_lock(bp->dev);
 
                 if (netif_queue_stopped(bp->dev) &&
+                    (bp->state == BNX2X_STATE_OPEN) &&
                     (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3))
                         netif_wake_queue(bp->dev);
 
@@ -905,6 +884,7 @@ static void bnx2x_tx_int(struct bnx2x_fastpath *fp, int work)
         }
 }
 
+
 static void bnx2x_sp_event(struct bnx2x_fastpath *fp,
                            union eth_rx_cqe *rr_cqe)
 {
@@ -960,6 +940,7 @@ static void bnx2x_sp_event(struct bnx2x_fastpath *fp,
                 bnx2x_fp(bp, cid, state) = BNX2X_FP_STATE_CLOSED;
                 break;
 
+
         case (RAMROD_CMD_ID_ETH_SET_MAC | BNX2X_STATE_OPEN):
         case (RAMROD_CMD_ID_ETH_SET_MAC | BNX2X_STATE_DIAG):
                 DP(NETIF_MSG_IFUP, "got set mac ramrod\n");
@@ -1169,8 +1150,8 @@ static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp)
         memset(fp->sge_mask, 0xff,
                (NUM_RX_SGE >> RX_SGE_MASK_ELEM_SHIFT)*sizeof(u64));
 
-        /* Clear the two last indeces in the page to 1:
-           these are the indeces that correspond to the "next" element,
+        /* Clear the two last indices in the page to 1:
+           these are the indices that correspond to the "next" element,
            hence will never be indicated and should be removed from
            the calculations. */
         bnx2x_clear_sge_mask_next_elems(fp);
@@ -1261,7 +1242,7 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
                    where we are and drop the whole packet */
                 err = bnx2x_alloc_rx_sge(bp, fp, sge_idx);
                 if (unlikely(err)) {
-                        fp->rx_alloc_failed++;
+                        bp->eth_stats.rx_skb_alloc_failed++;
                         return err;
                 }
 
@@ -1297,14 +1278,13 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
         pci_unmap_single(bp->pdev, pci_unmap_addr(rx_buf, mapping),
                          bp->rx_buf_use_size, PCI_DMA_FROMDEVICE);
 
-        /* if alloc failed drop the packet and keep the buffer in the bin */
         if (likely(new_skb)) {
+                /* fix ip xsum and give it to the stack */
+                /* (no need to map the new skb) */
 
                 prefetch(skb);
                 prefetch(((char *)(skb)) + 128);
 
-                /* else fix ip xsum and give it to the stack */
-                /* (no need to map the new skb) */
 #ifdef BNX2X_STOP_ON_ERROR
                 if (pad + len > bp->rx_buf_size) {
                         BNX2X_ERR("skb_put is about to fail...  "
@@ -1353,9 +1333,10 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
                 fp->tpa_pool[queue].skb = new_skb;
 
         } else {
+                /* else drop the packet and keep the buffer in the bin */
                 DP(NETIF_MSG_RX_STATUS,
                    "Failed to allocate new skb - dropping packet!\n");
-                fp->rx_alloc_failed++;
+                bp->eth_stats.rx_skb_alloc_failed++;
         }
 
         fp->tpa_state[queue] = BNX2X_TPA_STOP;
@@ -1390,7 +1371,6 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
         u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons;
         u16 hw_comp_cons, sw_comp_cons, sw_comp_prod;
         int rx_pkt = 0;
-        u16 queue;
 
 #ifdef BNX2X_STOP_ON_ERROR
         if (unlikely(bp->panic))
@@ -1456,7 +1436,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
                         if ((!fp->disable_tpa) &&
                             (TPA_TYPE(cqe_fp_flags) !=
                                         (TPA_TYPE_START | TPA_TYPE_END))) {
-                                queue = cqe->fast_path_cqe.queue_index;
+                                u16 queue = cqe->fast_path_cqe.queue_index;
 
                                 if (TPA_TYPE(cqe_fp_flags) == TPA_TYPE_START) {
                                         DP(NETIF_MSG_RX_STATUS,
@@ -1503,11 +1483,10 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
 
                         /* is this an error packet? */
                         if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) {
-                        /* do we sometimes forward error packets anyway? */
                                 DP(NETIF_MSG_RX_ERR,
                                    "ERROR  flags %x  rx packet %u\n",
                                    cqe_fp_flags, sw_comp_cons);
-                                /* TBD make sure MC counts this as a drop */
+                                bp->eth_stats.rx_err_discard_pkt++;
                                 goto reuse_rx;
                         }
 
@@ -1524,7 +1503,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
                                         DP(NETIF_MSG_RX_ERR,
                                            "ERROR  packet dropped "
                                            "because of alloc failure\n");
-                                        fp->rx_alloc_failed++;
+                                        bp->eth_stats.rx_skb_alloc_failed++;
                                         goto reuse_rx;
                                 }
 
@@ -1550,7 +1529,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
                                 DP(NETIF_MSG_RX_ERR,
                                    "ERROR  packet dropped because "
                                    "of alloc failure\n");
-                                fp->rx_alloc_failed++;
+                                bp->eth_stats.rx_skb_alloc_failed++;
 reuse_rx:
                                 bnx2x_reuse_rx_skb(fp, skb, bd_cons, bd_prod);
                                 goto next_rx;
@@ -1559,10 +1538,12 @@ reuse_rx:
                         skb->protocol = eth_type_trans(skb, bp->dev);
 
                         skb->ip_summed = CHECKSUM_NONE;
-                        if (bp->rx_csum && BNX2X_RX_SUM_OK(cqe))
-                                skb->ip_summed = CHECKSUM_UNNECESSARY;
-
-                        /* TBD do we pass bad csum packets in promisc */
+                        if (bp->rx_csum) {
+                                if (likely(BNX2X_RX_CSUM_OK(cqe)))
+                                        skb->ip_summed = CHECKSUM_UNNECESSARY;
+                                else
+                                        bp->eth_stats.hw_csum_err++;
+                        }
                 }
 
 #ifdef BCM_VLAN
@@ -1615,6 +1596,12 @@ static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
         struct net_device *dev = bp->dev;
         int index = FP_IDX(fp);
 
+        /* Return here if interrupt is disabled */
+        if (unlikely(atomic_read(&bp->intr_sem) != 0)) {
+                DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n");
+                return IRQ_HANDLED;
+        }
+
         DP(BNX2X_MSG_FP, "got an MSI-X interrupt on IDX:SB [%d:%d]\n",
            index, FP_SB_ID(fp));
         bnx2x_ack_sb(bp, FP_SB_ID(fp), USTORM_ID, 0, IGU_INT_DISABLE, 0);
@@ -1648,17 +1635,17 @@ static irqreturn_t bnx2x_interrupt(int irq, void *dev_instance)
         }
         DP(NETIF_MSG_INTR, "got an interrupt  status %u\n", status);
 
-#ifdef BNX2X_STOP_ON_ERROR
-        if (unlikely(bp->panic))
-                return IRQ_HANDLED;
-#endif
-
         /* Return here if interrupt is disabled */
         if (unlikely(atomic_read(&bp->intr_sem) != 0)) {
                 DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n");
                 return IRQ_HANDLED;
         }
 
+#ifdef BNX2X_STOP_ON_ERROR
+        if (unlikely(bp->panic))
+                return IRQ_HANDLED;
+#endif
+
         mask = 0x2 << bp->fp[0].sb_id;
         if (status & mask) {
                 struct bnx2x_fastpath *fp = &bp->fp[0];
@@ -1699,11 +1686,12 @@ static void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event);
  * General service functions
  */
 
-static int bnx2x_hw_lock(struct bnx2x *bp, u32 resource)
+static int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource)
 {
         u32 lock_status;
         u32 resource_bit = (1 << resource);
-        u8 port = BP_PORT(bp);
+        int func = BP_FUNC(bp);
+        u32 hw_lock_control_reg;
         int cnt;
 
         /* Validating that the resource is within range */
@@ -1714,8 +1702,15 @@ static int bnx2x_hw_lock(struct bnx2x *bp, u32 resource)
                 return -EINVAL;
         }
 
+        if (func <= 5) {
+                hw_lock_control_reg = (MISC_REG_DRIVER_CONTROL_1 + func*8);
+        } else {
+                hw_lock_control_reg =
+                                (MISC_REG_DRIVER_CONTROL_7 + (func - 6)*8);
+        }
+
         /* Validating that the resource is not already taken */
-        lock_status = REG_RD(bp, MISC_REG_DRIVER_CONTROL_1 + port*8);
+        lock_status = REG_RD(bp, hw_lock_control_reg);
         if (lock_status & resource_bit) {
                 DP(NETIF_MSG_HW, "lock_status 0x%x  resource_bit 0x%x\n",
                    lock_status, resource_bit);
@@ -1725,9 +1720,8 @@ static int bnx2x_hw_lock(struct bnx2x *bp, u32 resource)
         /* Try for 1 second every 5ms */
         for (cnt = 0; cnt < 200; cnt++) {
                 /* Try to acquire the lock */
-                REG_WR(bp, MISC_REG_DRIVER_CONTROL_1 + port*8 + 4,
-                       resource_bit);
-                lock_status = REG_RD(bp, MISC_REG_DRIVER_CONTROL_1 + port*8);
+                REG_WR(bp, hw_lock_control_reg + 4, resource_bit);
+                lock_status = REG_RD(bp, hw_lock_control_reg);
                 if (lock_status & resource_bit)
                         return 0;
 
@@ -1737,11 +1731,12 @@ static int bnx2x_hw_lock(struct bnx2x *bp, u32 resource)
         return -EAGAIN;
 }
 
-static int bnx2x_hw_unlock(struct bnx2x *bp, u32 resource)
+static int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource)
 {
         u32 lock_status;
         u32 resource_bit = (1 << resource);
-        u8 port = BP_PORT(bp);
+        int func = BP_FUNC(bp);
+        u32 hw_lock_control_reg;
 
         /* Validating that the resource is within range */
         if (resource > HW_LOCK_MAX_RESOURCE_VALUE) {
@@ -1751,20 +1746,27 @@ static int bnx2x_hw_unlock(struct bnx2x *bp, u32 resource)
                 return -EINVAL;
         }
 
+        if (func <= 5) {
+                hw_lock_control_reg = (MISC_REG_DRIVER_CONTROL_1 + func*8);
+        } else {
+                hw_lock_control_reg =
+                                (MISC_REG_DRIVER_CONTROL_7 + (func - 6)*8);
+        }
+
         /* Validating that the resource is currently taken */
-        lock_status = REG_RD(bp, MISC_REG_DRIVER_CONTROL_1 + port*8);
+        lock_status = REG_RD(bp, hw_lock_control_reg);
         if (!(lock_status & resource_bit)) {
                 DP(NETIF_MSG_HW, "lock_status 0x%x  resource_bit 0x%x\n",
                    lock_status, resource_bit);
                 return -EFAULT;
         }
 
-        REG_WR(bp, MISC_REG_DRIVER_CONTROL_1 + port*8, resource_bit);
+        REG_WR(bp, hw_lock_control_reg, resource_bit);
         return 0;
 }
 
 /* HW Lock for shared dual port PHYs */
-static void bnx2x_phy_hw_lock(struct bnx2x *bp)
+static void bnx2x_acquire_phy_lock(struct bnx2x *bp)
 {
         u32 ext_phy_type = XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config);
 
@@ -1772,25 +1774,25 @@ static void bnx2x_phy_hw_lock(struct bnx2x *bp)
 
         if ((ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072) ||
             (ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073))
-                bnx2x_hw_lock(bp, HW_LOCK_RESOURCE_8072_MDIO);
+                bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_8072_MDIO);
 }
 
-static void bnx2x_phy_hw_unlock(struct bnx2x *bp)
+static void bnx2x_release_phy_lock(struct bnx2x *bp)
 {
         u32 ext_phy_type = XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config);
 
         if ((ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072) ||
             (ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073))
-                bnx2x_hw_unlock(bp, HW_LOCK_RESOURCE_8072_MDIO);
+                bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_8072_MDIO);
 
         mutex_unlock(&bp->port.phy_mutex);
 }
 
-int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode)
+int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port)
 {
         /* The GPIO should be swapped if swap register is set and active */
         int gpio_port = (REG_RD(bp, NIG_REG_PORT_SWAP) &&
-                         REG_RD(bp, NIG_REG_STRAP_OVERRIDE)) ^ BP_PORT(bp);
+                         REG_RD(bp, NIG_REG_STRAP_OVERRIDE)) ^ port;
         int gpio_shift = gpio_num +
                         (gpio_port ? MISC_REGISTERS_GPIO_PORT_SHIFT : 0);
         u32 gpio_mask = (1 << gpio_shift);
@@ -1801,7 +1803,7 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode)
                 return -EINVAL;
         }
 
-        bnx2x_hw_lock(bp, HW_LOCK_RESOURCE_GPIO);
+        bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_GPIO);
         /* read GPIO and mask except the float bits */
         gpio_reg = (REG_RD(bp, MISC_REG_GPIO) & MISC_REGISTERS_GPIO_FLOAT);
 
@@ -1822,7 +1824,7 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode)
                 gpio_reg |=  (gpio_mask << MISC_REGISTERS_GPIO_SET_POS);
                 break;
 
-        case MISC_REGISTERS_GPIO_INPUT_HI_Z :
+        case MISC_REGISTERS_GPIO_INPUT_HI_Z:
                 DP(NETIF_MSG_LINK, "Set GPIO %d (shift %d) -> input\n",
                    gpio_num, gpio_shift);
                 /* set FLOAT */
@@ -1834,7 +1836,7 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode)
         }
 
         REG_WR(bp, MISC_REG_GPIO, gpio_reg);
-        bnx2x_hw_unlock(bp, HW_LOCK_RESOURCE_GPIO);
+        bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_GPIO);
 
         return 0;
 }
@@ -1850,19 +1852,19 @@ static int bnx2x_set_spio(struct bnx2x *bp, int spio_num, u32 mode)
                 return -EINVAL;
         }
 
-        bnx2x_hw_lock(bp, HW_LOCK_RESOURCE_SPIO);
+        bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_SPIO);
         /* read SPIO and mask except the float bits */
         spio_reg = (REG_RD(bp, MISC_REG_SPIO) & MISC_REGISTERS_SPIO_FLOAT);
 
         switch (mode) {
-        case MISC_REGISTERS_SPIO_OUTPUT_LOW :
+        case MISC_REGISTERS_SPIO_OUTPUT_LOW:
                 DP(NETIF_MSG_LINK, "Set SPIO %d -> output low\n", spio_num);
                 /* clear FLOAT and set CLR */
                 spio_reg &= ~(spio_mask << MISC_REGISTERS_SPIO_FLOAT_POS);
                 spio_reg |=  (spio_mask << MISC_REGISTERS_SPIO_CLR_POS);
                 break;
 
-        case MISC_REGISTERS_SPIO_OUTPUT_HIGH :
+        case MISC_REGISTERS_SPIO_OUTPUT_HIGH:
                 DP(NETIF_MSG_LINK, "Set SPIO %d -> output high\n", spio_num);
                 /* clear FLOAT and set SET */
                 spio_reg &= ~(spio_mask << MISC_REGISTERS_SPIO_FLOAT_POS);
@@ -1880,7 +1882,7 @@ static int bnx2x_set_spio(struct bnx2x *bp, int spio_num, u32 mode)
         }
 
         REG_WR(bp, MISC_REG_SPIO, spio_reg);
-        bnx2x_hw_unlock(bp, HW_LOCK_RESOURCE_SPIO);
+        bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_SPIO);
 
         return 0;
 }
@@ -1940,46 +1942,63 @@ static void bnx2x_link_report(struct bnx2x *bp)
 
 static u8 bnx2x_initial_phy_init(struct bnx2x *bp)
 {
-        u8 rc;
+        if (!BP_NOMCP(bp)) {
+                u8 rc;
 
-        /* Initialize link parameters structure variables */
-        bp->link_params.mtu = bp->dev->mtu;
+                /* Initialize link parameters structure variables */
+                /* It is recommended to turn off RX FC for jumbo frames
+                   for better performance */
+                if (IS_E1HMF(bp))
+                        bp->link_params.req_fc_auto_adv = FLOW_CTRL_BOTH;
+                else if (bp->dev->mtu > 5000)
+                        bp->link_params.req_fc_auto_adv = FLOW_CTRL_TX;
+                else
+                        bp->link_params.req_fc_auto_adv = FLOW_CTRL_BOTH;
 
-        bnx2x_phy_hw_lock(bp);
-        rc = bnx2x_phy_init(&bp->link_params, &bp->link_vars);
-        bnx2x_phy_hw_unlock(bp);
+                bnx2x_acquire_phy_lock(bp);
+                rc = bnx2x_phy_init(&bp->link_params, &bp->link_vars);
+                bnx2x_release_phy_lock(bp);
 
-        if (bp->link_vars.link_up)
-                bnx2x_link_report(bp);
+                if (bp->link_vars.link_up)
+                        bnx2x_link_report(bp);
 
-        bnx2x_calc_fc_adv(bp);
+                bnx2x_calc_fc_adv(bp);
 
-        return rc;
+                return rc;
+        }
+        BNX2X_ERR("Bootcode is missing -not initializing link\n");
+        return -EINVAL;
 }
 
 static void bnx2x_link_set(struct bnx2x *bp)
 {
-        bnx2x_phy_hw_lock(bp);
-        bnx2x_phy_init(&bp->link_params, &bp->link_vars);
-        bnx2x_phy_hw_unlock(bp);
+        if (!BP_NOMCP(bp)) {
+                bnx2x_acquire_phy_lock(bp);
+                bnx2x_phy_init(&bp->link_params, &bp->link_vars);
+                bnx2x_release_phy_lock(bp);
 
-        bnx2x_calc_fc_adv(bp);
+                bnx2x_calc_fc_adv(bp);
+        } else
+                BNX2X_ERR("Bootcode is missing -not setting link\n");
 }
 
 static void bnx2x__link_reset(struct bnx2x *bp)
 {
-        bnx2x_phy_hw_lock(bp);
-        bnx2x_link_reset(&bp->link_params, &bp->link_vars);
-        bnx2x_phy_hw_unlock(bp);
+        if (!BP_NOMCP(bp)) {
+                bnx2x_acquire_phy_lock(bp);
+                bnx2x_link_reset(&bp->link_params, &bp->link_vars);
+                bnx2x_release_phy_lock(bp);
+        } else
+                BNX2X_ERR("Bootcode is missing -not resetting link\n");
 }
 
 static u8 bnx2x_link_test(struct bnx2x *bp)
 {
         u8 rc;
 
-        bnx2x_phy_hw_lock(bp);
+        bnx2x_acquire_phy_lock(bp);
         rc = bnx2x_test_link(&bp->link_params, &bp->link_vars);
-        bnx2x_phy_hw_unlock(bp);
+        bnx2x_release_phy_lock(bp);
 
         return rc;
 }
@@ -1991,7 +2010,7 @@ static u8 bnx2x_link_test(struct bnx2x *bp)
      sum of vn_min_rates
        or
      0 - if all the min_rates are 0.
-     In the later case fainess algorithm should be deactivated.
+     In the later case fairness algorithm should be deactivated.
      If not all min_rates are zero then those that are zeroes will
      be set to 1.
  */
@@ -2114,7 +2133,7 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int func,
                                 FUNC_MF_CFG_MIN_BW_SHIFT) * 100;
                 /* If FAIRNESS is enabled (not all min rates are zeroes) and
                    if current min rate is zero - set it to 1.
-                   This is a requirment of the algorithm. */
+                   This is a requirement of the algorithm. */
                 if ((vn_min_rate == 0) && wsum)
                         vn_min_rate = DEF_MIN_RATE;
                 vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >>
@@ -2203,9 +2222,9 @@ static void bnx2x_link_attn(struct bnx2x *bp)
         /* Make sure that we are synced with the current statistics */
         bnx2x_stats_handle(bp, STATS_EVENT_STOP);
 
-        bnx2x_phy_hw_lock(bp);
+        bnx2x_acquire_phy_lock(bp);
         bnx2x_link_update(&bp->link_params, &bp->link_vars);
-        bnx2x_phy_hw_unlock(bp);
+        bnx2x_release_phy_lock(bp);
 
         if (bp->link_vars.link_up) {
 
@@ -2357,7 +2376,7 @@ static int bnx2x_sp_post(struct bnx2x *bp, int command, int cid,
 }
 
 /* acquire split MCP access lock register */
-static int bnx2x_lock_alr(struct bnx2x *bp)
+static int bnx2x_acquire_alr(struct bnx2x *bp)
 {
         u32 i, j, val;
         int rc = 0;
@@ -2374,15 +2393,15 @@ static int bnx2x_lock_alr(struct bnx2x *bp)
                 msleep(5);
         }
         if (!(val & (1L << 31))) {
-                BNX2X_ERR("Cannot acquire nvram interface\n");
+                BNX2X_ERR("Cannot acquire MCP access lock register\n");
                 rc = -EBUSY;
         }
 
         return rc;
 }
 
-/* Release split MCP access lock register */
-static void bnx2x_unlock_alr(struct bnx2x *bp)
+/* release split MCP access lock register */
+static void bnx2x_release_alr(struct bnx2x *bp)
 {
         u32 val = 0;
 
@@ -2395,7 +2414,6 @@ static inline u16 bnx2x_update_dsb_idx(struct bnx2x *bp)
         u16 rc = 0;
 
         barrier(); /* status block is written to by the chip */
-
         if (bp->def_att_idx != def_sb->atten_status_block.attn_bits_index) {
                 bp->def_att_idx = def_sb->atten_status_block.attn_bits_index;
                 rc |= 1;
@@ -2426,26 +2444,31 @@ static inline u16 bnx2x_update_dsb_idx(struct bnx2x *bp)
 static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted)
 {
         int port = BP_PORT(bp);
-        int func = BP_FUNC(bp);
-        u32 igu_addr = (IGU_ADDR_ATTN_BITS_SET + IGU_FUNC_BASE * func) * 8;
+        u32 hc_addr = (HC_REG_COMMAND_REG + port*32 +
+                       COMMAND_REG_ATTN_BITS_SET);
         u32 aeu_addr = port ? MISC_REG_AEU_MASK_ATTN_FUNC_1 :
                               MISC_REG_AEU_MASK_ATTN_FUNC_0;
         u32 nig_int_mask_addr = port ? NIG_REG_MASK_INTERRUPT_PORT1 :
                                        NIG_REG_MASK_INTERRUPT_PORT0;
+        u32 aeu_mask;
 
-        if (~bp->aeu_mask & (asserted & 0xff))
-                BNX2X_ERR("IGU ERROR\n");
         if (bp->attn_state & asserted)
                 BNX2X_ERR("IGU ERROR\n");
 
+        bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_PORT0_ATT_MASK + port);
+        aeu_mask = REG_RD(bp, aeu_addr);
+
         DP(NETIF_MSG_HW, "aeu_mask %x  newly asserted %x\n",
-           bp->aeu_mask, asserted);
-        bp->aeu_mask &= ~(asserted & 0xff);
-        DP(NETIF_MSG_HW, "after masking: aeu_mask %x\n", bp->aeu_mask);
+           aeu_mask, asserted);
+        aeu_mask &= ~(asserted & 0xff);
+        DP(NETIF_MSG_HW, "new mask %x\n", aeu_mask);
 
-        REG_WR(bp, aeu_addr, bp->aeu_mask);
+        REG_WR(bp, aeu_addr, aeu_mask);
+        bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_PORT0_ATT_MASK + port);
 
+        DP(NETIF_MSG_HW, "attn_state %x\n", bp->attn_state);
         bp->attn_state |= asserted;
+        DP(NETIF_MSG_HW, "new state %x\n", bp->attn_state);
 
         if (asserted & ATTN_HARD_WIRED_MASK) {
                 if (asserted & ATTN_NIG_FOR_FUNC) {
@@ -2500,9 +2523,9 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted)
 
         } /* if hardwired */
 
-        DP(NETIF_MSG_HW, "about to mask 0x%08x at IGU addr 0x%x\n",
-           asserted, BAR_IGU_INTMEM + igu_addr);
-        REG_WR(bp, BAR_IGU_INTMEM + igu_addr, asserted);
+        DP(NETIF_MSG_HW, "about to mask 0x%08x at HC addr 0x%x\n",
+           asserted, hc_addr);
+        REG_WR(bp, hc_addr, asserted);
 
         /* now set back the mask */
         if (asserted & ATTN_NIG_FOR_FUNC)
@@ -2530,12 +2553,12 @@ static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)
                 case SHARED_HW_CFG_BOARD_TYPE_BCM957710A1022G:
                         /* Fan failure attention */
 
-                        /* The PHY reset is controled by GPIO 1 */
+                        /* The PHY reset is controlled by GPIO 1 */
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
-                                       MISC_REGISTERS_GPIO_OUTPUT_LOW);
-                        /* Low power mode is controled by GPIO 2 */
+                                       MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
+                        /* Low power mode is controlled by GPIO 2 */
                         bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
-                                       MISC_REGISTERS_GPIO_OUTPUT_LOW);
+                                       MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
                         /* mark the failure */
                         bp->link_params.ext_phy_config &=
                                         ~PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK;
@@ -2699,10 +2722,11 @@ static void bnx2x_attn_int_deasserted(struct bnx2x *bp, u32 deasserted)
         int index;
         u32 reg_addr;
         u32 val;
+        u32 aeu_mask;
 
         /* need to take HW lock because MCP or other port might also
            try to handle this event */
-        bnx2x_lock_alr(bp);
+        bnx2x_acquire_alr(bp);
 
         attn.sig[0] = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_1_FUNC_0 + port*4);
         attn.sig[1] = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_2_FUNC_0 + port*4);
@@ -2734,32 +2758,35 @@ static void bnx2x_attn_int_deasserted(struct bnx2x *bp, u32 deasserted)
                                                 HW_PRTY_ASSERT_SET_1) ||
                             (attn.sig[2] & group_mask.sig[2] &
                                                 HW_PRTY_ASSERT_SET_2))
-                               BNX2X_ERR("FATAL HW block parity attention\n");
+                                BNX2X_ERR("FATAL HW block parity attention\n");
                 }
         }
 
-        bnx2x_unlock_alr(bp);
+        bnx2x_release_alr(bp);
 
-        reg_addr = (IGU_ADDR_ATTN_BITS_CLR + IGU_FUNC_BASE * BP_FUNC(bp)) * 8;
+        reg_addr = (HC_REG_COMMAND_REG + port*32 + COMMAND_REG_ATTN_BITS_CLR);
 
         val = ~deasserted;
-/*      DP(NETIF_MSG_INTR, "write 0x%08x to IGU addr 0x%x\n",
-           val, BAR_IGU_INTMEM + reg_addr); */
-        REG_WR(bp, BAR_IGU_INTMEM + reg_addr, val);
+        DP(NETIF_MSG_HW, "about to mask 0x%08x at HC addr 0x%x\n",
+           val, reg_addr);
+        REG_WR(bp, reg_addr, val);
 
-        if (bp->aeu_mask & (deasserted & 0xff))
-                BNX2X_ERR("IGU BUG!\n");
         if (~bp->attn_state & deasserted)
-                BNX2X_ERR("IGU BUG!\n");
+                BNX2X_ERR("IGU ERROR\n");
 
         reg_addr = port ? MISC_REG_AEU_MASK_ATTN_FUNC_1 :
                           MISC_REG_AEU_MASK_ATTN_FUNC_0;
 
-        DP(NETIF_MSG_HW, "aeu_mask %x\n", bp->aeu_mask);
-        bp->aeu_mask |= (deasserted & 0xff);
+        bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_PORT0_ATT_MASK + port);
+        aeu_mask = REG_RD(bp, reg_addr);
+
+        DP(NETIF_MSG_HW, "aeu_mask %x  newly deasserted %x\n",
+           aeu_mask, deasserted);
+        aeu_mask |= (deasserted & 0xff);
+        DP(NETIF_MSG_HW, "new mask %x\n", aeu_mask);
 
-        DP(NETIF_MSG_HW, "new mask %x\n", bp->aeu_mask);
-        REG_WR(bp, reg_addr, bp->aeu_mask);
+        REG_WR(bp, reg_addr, aeu_mask);
+        bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_PORT0_ATT_MASK + port);
 
         DP(NETIF_MSG_HW, "attn_state %x\n", bp->attn_state);
         bp->attn_state &= ~deasserted;
@@ -2800,7 +2827,7 @@ static void bnx2x_sp_task(struct work_struct *work)
 
         /* Return here if interrupt is disabled */
         if (unlikely(atomic_read(&bp->intr_sem) != 0)) {
-                DP(BNX2X_MSG_SP, "called but intr_sem not 0, returning\n");
+                DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n");
                 return;
         }
 
@@ -2808,7 +2835,7 @@ static void bnx2x_sp_task(struct work_struct *work)
 /*      if (status == 0)                                     */
 /*              BNX2X_ERR("spurious slowpath interrupt!\n"); */
 
-        DP(BNX2X_MSG_SP, "got a slowpath interrupt (updated %x)\n", status);
+        DP(NETIF_MSG_INTR, "got a slowpath interrupt (updated %x)\n", status);
 
         /* HW attentions */
         if (status & 0x1)
@@ -2838,7 +2865,7 @@ static irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)
 
         /* Return here if interrupt is disabled */
         if (unlikely(atomic_read(&bp->intr_sem) != 0)) {
-                DP(BNX2X_MSG_SP, "called but intr_sem not 0, returning\n");
+                DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n");
                 return IRQ_HANDLED;
         }
 
@@ -2876,11 +2903,11 @@ static irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)
                         /* underflow */ \
                         d_hi = m_hi - s_hi; \
                         if (d_hi > 0) { \
-                        /* we can 'loan' 1 */ \
+                                /* we can 'loan' 1 */ \
                                 d_hi--; \
                                 d_lo = m_lo + (UINT_MAX - s_lo) + 1; \
                         } else { \
-                        /* m_hi <= s_hi */ \
+                                /* m_hi <= s_hi */ \
                                 d_hi = 0; \
                                 d_lo = 0; \
                         } \
@@ -2890,7 +2917,7 @@ static irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)
                                 d_hi = 0; \
                                 d_lo = 0; \
                         } else { \
-                        /* m_hi >= s_hi */ \
+                                /* m_hi >= s_hi */ \
                                 d_hi = m_hi - s_hi; \
                                 d_lo = m_lo - s_lo; \
                         } \
@@ -2963,37 +2990,6 @@ static inline long bnx2x_hilo(u32 *hiref)
  * Init service functions
  */
 
-static void bnx2x_storm_stats_init(struct bnx2x *bp)
-{
-        int func = BP_FUNC(bp);
-
-        REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_STATS_FLAGS_OFFSET(func), 1);
-        REG_WR(bp, BAR_XSTRORM_INTMEM +
-               XSTORM_STATS_FLAGS_OFFSET(func) + 4, 0);
-
-        REG_WR(bp, BAR_TSTRORM_INTMEM + TSTORM_STATS_FLAGS_OFFSET(func), 1);
-        REG_WR(bp, BAR_TSTRORM_INTMEM +
-               TSTORM_STATS_FLAGS_OFFSET(func) + 4, 0);
-
-        REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_STATS_FLAGS_OFFSET(func), 0);
-        REG_WR(bp, BAR_CSTRORM_INTMEM +
-               CSTORM_STATS_FLAGS_OFFSET(func) + 4, 0);
-
-        REG_WR(bp, BAR_XSTRORM_INTMEM +
-               XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(func),
-               U64_LO(bnx2x_sp_mapping(bp, fw_stats)));
-        REG_WR(bp, BAR_XSTRORM_INTMEM +
-               XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(func) + 4,
-               U64_HI(bnx2x_sp_mapping(bp, fw_stats)));
-
-        REG_WR(bp, BAR_TSTRORM_INTMEM +
-               TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(func),
-               U64_LO(bnx2x_sp_mapping(bp, fw_stats)));
-        REG_WR(bp, BAR_TSTRORM_INTMEM +
-               TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(func) + 4,
-               U64_HI(bnx2x_sp_mapping(bp, fw_stats)));
-}
-
 static void bnx2x_storm_stats_post(struct bnx2x *bp)
 {
         if (!bp->stats_pending) {
@@ -3032,6 +3028,8 @@ static void bnx2x_stats_init(struct bnx2x *bp)
         memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
         bp->port.old_nig_stats.brb_discard =
                         REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
+        bp->port.old_nig_stats.brb_truncate =
+                        REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
         REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
                     &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
         REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
@@ -3101,12 +3099,12 @@ static int bnx2x_stats_comp(struct bnx2x *bp)
 
         might_sleep();
         while (*stats_comp != DMAE_COMP_VAL) {
-                msleep(1);
                 if (!cnt) {
                         BNX2X_ERR("timeout waiting for stats finished\n");
                         break;
                 }
                 cnt--;
+                msleep(1);
         }
         return 1;
 }
@@ -3451,8 +3449,7 @@ static void bnx2x_bmac_stats_update(struct bnx2x *bp)
         UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
         UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
         UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
-        UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
-        UPDATE_STAT64(rx_stat_grxcf, rx_stat_bmac_xcf);
+        UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
         UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
         UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffpauseframesreceived);
         UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
@@ -3536,6 +3533,8 @@ static int bnx2x_hw_stats_update(struct bnx2x *bp)
 
         ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
                       new->brb_discard - old->brb_discard);
+        ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
+                      new->brb_truncate - old->brb_truncate);
 
         UPDATE_STAT64_NIG(egress_mac_pkt0,
                                         etherstatspkts1024octetsto1522octets);
@@ -3713,8 +3712,7 @@ static void bnx2x_net_stats_update(struct bnx2x *bp)
         nstats->rx_length_errors =
                                 estats->rx_stat_etherstatsundersizepkts_lo +
                                 estats->jabber_packets_received;
-        nstats->rx_over_errors = estats->brb_drop_lo +
-                                 estats->brb_truncate_discard;
+        nstats->rx_over_errors = estats->brb_drop_lo + estats->brb_truncate_lo;
         nstats->rx_crc_errors = estats->rx_stat_dot3statsfcserrors_lo;
         nstats->rx_frame_errors = estats->rx_stat_dot3statsalignmenterrors_lo;
         nstats->rx_fifo_errors = old_tclient->no_buff_discard;
@@ -3783,7 +3781,7 @@ static void bnx2x_stats_update(struct bnx2x *bp)
                              bp->fp->rx_comp_cons),
                        le16_to_cpu(*bp->fp->rx_cons_sb), nstats->rx_packets);
                 printk(KERN_DEBUG "  %s (Xoff events %u)  brb drops %u\n",
-                       netif_queue_stopped(bp->dev)? "Xoff" : "Xon",
+                       netif_queue_stopped(bp->dev) ? "Xoff" : "Xon",
                        estats->driver_xoff, estats->brb_drop_lo);
                 printk(KERN_DEBUG "tstats: checksum_discard %u  "
                         "packets_too_big_discard %u  no_buff_discard %u  "
@@ -3994,14 +3992,14 @@ static void bnx2x_zero_sb(struct bnx2x *bp, int sb_id)
 
         bnx2x_init_fill(bp, BAR_USTRORM_INTMEM +
                         USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
-                        sizeof(struct ustorm_def_status_block)/4);
+                        sizeof(struct ustorm_status_block)/4);
         bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM +
                         CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
-                        sizeof(struct cstorm_def_status_block)/4);
+                        sizeof(struct cstorm_status_block)/4);
 }
 
-static void bnx2x_init_sb(struct bnx2x *bp, int sb_id,
-                          struct host_status_block *sb, dma_addr_t mapping)
+static void bnx2x_init_sb(struct bnx2x *bp, struct host_status_block *sb,
+                          dma_addr_t mapping, int sb_id)
 {
         int port = BP_PORT(bp);
         int func = BP_FUNC(bp);
@@ -4077,7 +4075,6 @@ static void bnx2x_init_def_sb(struct bnx2x *bp,
                                             atten_status_block);
         def_sb->atten_status_block.status_block_id = sb_id;
 
-        bp->def_att_idx = 0;
         bp->attn_state = 0;
 
         reg_offset = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 :
@@ -4094,9 +4091,6 @@ static void bnx2x_init_def_sb(struct bnx2x *bp,
                                                reg_offset + 0xc + 0x10*index);
         }
 
-        bp->aeu_mask = REG_RD(bp, (port ? MISC_REG_AEU_MASK_ATTN_FUNC_1 :
-                                          MISC_REG_AEU_MASK_ATTN_FUNC_0));
-
         reg_offset = (port ? HC_REG_ATTN_MSG1_ADDR_L :
                              HC_REG_ATTN_MSG0_ADDR_L);
 
@@ -4114,17 +4108,13 @@ static void bnx2x_init_def_sb(struct bnx2x *bp,
                                             u_def_status_block);
         def_sb->u_def_status_block.status_block_id = sb_id;
 
-        bp->def_u_idx = 0;
-
         REG_WR(bp, BAR_USTRORM_INTMEM +
                USTORM_DEF_SB_HOST_SB_ADDR_OFFSET(func), U64_LO(section));
         REG_WR(bp, BAR_USTRORM_INTMEM +
                ((USTORM_DEF_SB_HOST_SB_ADDR_OFFSET(func)) + 4),
                U64_HI(section));
-        REG_WR8(bp, BAR_USTRORM_INTMEM +  DEF_USB_FUNC_OFF +
+        REG_WR8(bp, BAR_USTRORM_INTMEM + DEF_USB_FUNC_OFF +
                 USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), func);
-        REG_WR(bp, BAR_USTRORM_INTMEM + USTORM_HC_BTR_OFFSET(func),
-               BNX2X_BTR);
 
         for (index = 0; index < HC_USTORM_DEF_SB_NUM_INDICES; index++)
                 REG_WR16(bp, BAR_USTRORM_INTMEM +
@@ -4135,17 +4125,13 @@ static void bnx2x_init_def_sb(struct bnx2x *bp,
                                             c_def_status_block);
         def_sb->c_def_status_block.status_block_id = sb_id;
 
-        bp->def_c_idx = 0;
-
         REG_WR(bp, BAR_CSTRORM_INTMEM +
                CSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(func), U64_LO(section));
         REG_WR(bp, BAR_CSTRORM_INTMEM +
                ((CSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(func)) + 4),
                U64_HI(section));
-        REG_WR8(bp, BAR_CSTRORM_INTMEM +  DEF_CSB_FUNC_OFF +
+        REG_WR8(bp, BAR_CSTRORM_INTMEM + DEF_CSB_FUNC_OFF +
                 CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), func);
-        REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_HC_BTR_OFFSET(func),
-               BNX2X_BTR);
 
         for (index = 0; index < HC_CSTORM_DEF_SB_NUM_INDICES; index++)
                 REG_WR16(bp, BAR_CSTRORM_INTMEM +
@@ -4156,17 +4142,13 @@ static void bnx2x_init_def_sb(struct bnx2x *bp,
                                             t_def_status_block);
         def_sb->t_def_status_block.status_block_id = sb_id;
 
-        bp->def_t_idx = 0;
-
         REG_WR(bp, BAR_TSTRORM_INTMEM +
                TSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(func), U64_LO(section));
         REG_WR(bp, BAR_TSTRORM_INTMEM +
                ((TSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(func)) + 4),
                U64_HI(section));
-        REG_WR8(bp, BAR_TSTRORM_INTMEM +  DEF_TSB_FUNC_OFF +
+        REG_WR8(bp, BAR_TSTRORM_INTMEM + DEF_TSB_FUNC_OFF +
                 TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), func);
-        REG_WR(bp, BAR_TSTRORM_INTMEM + TSTORM_HC_BTR_OFFSET(func),
-               BNX2X_BTR);
 
         for (index = 0; index < HC_TSTORM_DEF_SB_NUM_INDICES; index++)
                 REG_WR16(bp, BAR_TSTRORM_INTMEM +
@@ -4177,23 +4159,20 @@ static void bnx2x_init_def_sb(struct bnx2x *bp,
                                             x_def_status_block);
         def_sb->x_def_status_block.status_block_id = sb_id;
 
-        bp->def_x_idx = 0;
-
         REG_WR(bp, BAR_XSTRORM_INTMEM +
                XSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(func), U64_LO(section));
         REG_WR(bp, BAR_XSTRORM_INTMEM +
                ((XSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(func)) + 4),
                U64_HI(section));
-        REG_WR8(bp, BAR_XSTRORM_INTMEM +  DEF_XSB_FUNC_OFF +
+        REG_WR8(bp, BAR_XSTRORM_INTMEM + DEF_XSB_FUNC_OFF +
                 XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), func);
-        REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_HC_BTR_OFFSET(func),
-               BNX2X_BTR);
 
         for (index = 0; index < HC_XSTORM_DEF_SB_NUM_INDICES; index++)
                 REG_WR16(bp, BAR_XSTRORM_INTMEM +
                          XSTORM_DEF_SB_HC_DISABLE_OFFSET(func, index), 1);
 
         bp->stats_pending = 0;
+        bp->set_mac_pending = 0;
 
         bnx2x_ack_sb(bp, sb_id, CSTORM_ID, 0, IGU_INT_ENABLE, 0);
 }
@@ -4209,21 +4188,25 @@ static void bnx2x_update_coalesce(struct bnx2x *bp)
                 /* HC_INDEX_U_ETH_RX_CQ_CONS */
                 REG_WR8(bp, BAR_USTRORM_INTMEM +
                         USTORM_SB_HC_TIMEOUT_OFFSET(port, sb_id,
-                                                   HC_INDEX_U_ETH_RX_CQ_CONS),
+                                                    U_SB_ETH_RX_CQ_INDEX),
                         bp->rx_ticks/12);
                 REG_WR16(bp, BAR_USTRORM_INTMEM +
                          USTORM_SB_HC_DISABLE_OFFSET(port, sb_id,
-                                                   HC_INDEX_U_ETH_RX_CQ_CONS),
+                                                     U_SB_ETH_RX_CQ_INDEX),
+                         bp->rx_ticks ? 0 : 1);
+                REG_WR16(bp, BAR_USTRORM_INTMEM +
+                         USTORM_SB_HC_DISABLE_OFFSET(port, sb_id,
+                                                     U_SB_ETH_RX_BD_INDEX),
                          bp->rx_ticks ? 0 : 1);
 
                 /* HC_INDEX_C_ETH_TX_CQ_CONS */
                 REG_WR8(bp, BAR_CSTRORM_INTMEM +
                         CSTORM_SB_HC_TIMEOUT_OFFSET(port, sb_id,
-                                                   HC_INDEX_C_ETH_TX_CQ_CONS),
+                                                    C_SB_ETH_TX_CQ_INDEX),
                         bp->tx_ticks/12);
                 REG_WR16(bp, BAR_CSTRORM_INTMEM +
                          CSTORM_SB_HC_DISABLE_OFFSET(port, sb_id,
-                                                   HC_INDEX_C_ETH_TX_CQ_CONS),
+                                                     C_SB_ETH_TX_CQ_INDEX),
                          bp->tx_ticks ? 0 : 1);
         }
 }
@@ -4256,7 +4239,9 @@ static inline void bnx2x_free_tpa_pool(struct bnx2x *bp,
 static void bnx2x_init_rx_rings(struct bnx2x *bp)
 {
         int func = BP_FUNC(bp);
-        u16 ring_prod, cqe_ring_prod = 0;
+        int max_agg_queues = CHIP_IS_E1(bp) ? ETH_MAX_AGGREGATION_QUEUES_E1 :
+                                              ETH_MAX_AGGREGATION_QUEUES_E1H;
+        u16 ring_prod, cqe_ring_prod;
         int i, j;
 
         bp->rx_buf_use_size = bp->dev->mtu;
@@ -4270,9 +4255,9 @@ static void bnx2x_init_rx_rings(struct bnx2x *bp)
                    bp->dev->mtu + ETH_OVREHEAD);
 
                 for_each_queue(bp, j) {
-                        for (i = 0; i < ETH_MAX_AGGREGATION_QUEUES_E1H; i++) {
-                                struct bnx2x_fastpath *fp = &bp->fp[j];
+                        struct bnx2x_fastpath *fp = &bp->fp[j];
 
+                        for (i = 0; i < max_agg_queues; i++) {
                                 fp->tpa_pool[i].skb =
                                    netdev_alloc_skb(bp->dev, bp->rx_buf_size);
                                 if (!fp->tpa_pool[i].skb) {
@@ -4352,8 +4337,7 @@ static void bnx2x_init_rx_rings(struct bnx2x *bp)
                                 BNX2X_ERR("disabling TPA for queue[%d]\n", j);
                                 /* Cleanup already allocated elements */
                                 bnx2x_free_rx_sge_range(bp, fp, ring_prod);
-                                bnx2x_free_tpa_pool(bp, fp,
-                                              ETH_MAX_AGGREGATION_QUEUES_E1H);
+                                bnx2x_free_tpa_pool(bp, fp, max_agg_queues);
                                 fp->disable_tpa = 1;
                                 ring_prod = 0;
                                 break;
@@ -4363,13 +4347,13 @@ static void bnx2x_init_rx_rings(struct bnx2x *bp)
                 fp->rx_sge_prod = ring_prod;
 
                 /* Allocate BDs and initialize BD ring */
-                fp->rx_comp_cons = fp->rx_alloc_failed = 0;
+                fp->rx_comp_cons = 0;
                 cqe_ring_prod = ring_prod = 0;
                 for (i = 0; i < bp->rx_ring_size; i++) {
                         if (bnx2x_alloc_rx_skb(bp, fp, ring_prod) < 0) {
                                 BNX2X_ERR("was only able to allocate "
                                           "%d rx skbs\n", i);
-                                fp->rx_alloc_failed++;
+                                bp->eth_stats.rx_skb_alloc_failed++;
                                 break;
                         }
                         ring_prod = NEXT_RX_IDX(ring_prod);
@@ -4497,7 +4481,7 @@ static void bnx2x_init_context(struct bnx2x *bp)
                 }
 
                 context->cstorm_st_context.sb_index_number =
-                                                HC_INDEX_C_ETH_TX_CQ_CONS;
+                                                C_SB_ETH_TX_CQ_INDEX;
                 context->cstorm_st_context.status_block_id = sb_id;
 
                 context->xstorm_ag_context.cdu_reserved =
@@ -4535,7 +4519,7 @@ static void bnx2x_set_client_config(struct bnx2x *bp)
         int i;
 
         tstorm_client.mtu = bp->dev->mtu + ETH_OVREHEAD;
-        tstorm_client.statistics_counter_id = 0;
+        tstorm_client.statistics_counter_id = BP_CL_ID(bp);
         tstorm_client.config_flags =
                                 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE;
 #ifdef BCM_VLAN
@@ -4579,7 +4563,7 @@ static void bnx2x_set_storm_rx_mode(struct bnx2x *bp)
         int func = BP_FUNC(bp);
         int i;
 
-        DP(NETIF_MSG_RX_STATUS, "rx mode is %d\n", mode);
+        DP(NETIF_MSG_IFUP, "rx mode %d  mask 0x%x\n", mode, mask);
 
         switch (mode) {
         case BNX2X_RX_MODE_NONE: /* no Rx */
@@ -4617,13 +4601,35 @@ static void bnx2x_set_storm_rx_mode(struct bnx2x *bp)
                 bnx2x_set_client_config(bp);
 }
 
-static void bnx2x_init_internal(struct bnx2x *bp)
+static void bnx2x_init_internal_common(struct bnx2x *bp)
+{
+        int i;
+
+        /* Zero this manually as its initialization is
+           currently missing in the initTool */
+        for (i = 0; i < (USTORM_AGG_DATA_SIZE >> 2); i++)
+                REG_WR(bp, BAR_USTRORM_INTMEM +
+                       USTORM_AGG_DATA_OFFSET + i * 4, 0);
+}
+
+static void bnx2x_init_internal_port(struct bnx2x *bp)
+{
+        int port = BP_PORT(bp);
+
+        REG_WR(bp, BAR_USTRORM_INTMEM + USTORM_HC_BTR_OFFSET(port), BNX2X_BTR);
+        REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_HC_BTR_OFFSET(port), BNX2X_BTR);
+        REG_WR(bp, BAR_TSTRORM_INTMEM + TSTORM_HC_BTR_OFFSET(port), BNX2X_BTR);
+        REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_HC_BTR_OFFSET(port), BNX2X_BTR);
+}
+
+static void bnx2x_init_internal_func(struct bnx2x *bp)
 {
         struct tstorm_eth_function_common_config tstorm_config = {0};
         struct stats_indication_flags stats_flags = {0};
         int port = BP_PORT(bp);
         int func = BP_FUNC(bp);
         int i;
+        u16 max_agg_size;
 
         if (is_multi(bp)) {
                 tstorm_config.config_flags = MULTI_FLAGS;
@@ -4636,31 +4642,53 @@ static void bnx2x_init_internal(struct bnx2x *bp)
                TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(func),
                (*(u32 *)&tstorm_config));
 
-/*      DP(NETIF_MSG_IFUP, "tstorm_config: 0x%08x\n",
-           (*(u32 *)&tstorm_config)); */
-
         bp->rx_mode = BNX2X_RX_MODE_NONE; /* no rx until link is up */
         bnx2x_set_storm_rx_mode(bp);
 
+        /* reset xstorm per client statistics */
+        for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++) {
+                REG_WR(bp, BAR_XSTRORM_INTMEM +
+                       XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, BP_CL_ID(bp)) +
+                       i*4, 0);
+        }
+        /* reset tstorm per client statistics */
+        for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++) {
+                REG_WR(bp, BAR_TSTRORM_INTMEM +
+                       TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, BP_CL_ID(bp)) +
+                       i*4, 0);
+        }
+
+        /* Init statistics related context */
         stats_flags.collect_eth = 1;
 
-        REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_STATS_FLAGS_OFFSET(port),
+        REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_STATS_FLAGS_OFFSET(func),
                ((u32 *)&stats_flags)[0]);
-        REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_STATS_FLAGS_OFFSET(port) + 4,
+        REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_STATS_FLAGS_OFFSET(func) + 4,
                ((u32 *)&stats_flags)[1]);
 
-        REG_WR(bp, BAR_TSTRORM_INTMEM + TSTORM_STATS_FLAGS_OFFSET(port),
+        REG_WR(bp, BAR_TSTRORM_INTMEM + TSTORM_STATS_FLAGS_OFFSET(func),
                ((u32 *)&stats_flags)[0]);
-        REG_WR(bp, BAR_TSTRORM_INTMEM + TSTORM_STATS_FLAGS_OFFSET(port) + 4,
+        REG_WR(bp, BAR_TSTRORM_INTMEM + TSTORM_STATS_FLAGS_OFFSET(func) + 4,
                ((u32 *)&stats_flags)[1]);
 
-        REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_STATS_FLAGS_OFFSET(port),
+        REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_STATS_FLAGS_OFFSET(func),
                ((u32 *)&stats_flags)[0]);
-        REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_STATS_FLAGS_OFFSET(port) + 4,
+        REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_STATS_FLAGS_OFFSET(func) + 4,
                ((u32 *)&stats_flags)[1]);
 
-/*      DP(NETIF_MSG_IFUP, "stats_flags: 0x%08x 0x%08x\n",
-           ((u32 *)&stats_flags)[0], ((u32 *)&stats_flags)[1]); */
+        REG_WR(bp, BAR_XSTRORM_INTMEM +
+               XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(func),
+               U64_LO(bnx2x_sp_mapping(bp, fw_stats)));
+        REG_WR(bp, BAR_XSTRORM_INTMEM +
+               XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(func) + 4,
+               U64_HI(bnx2x_sp_mapping(bp, fw_stats)));
+
+        REG_WR(bp, BAR_TSTRORM_INTMEM +
+               TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(func),
+               U64_LO(bnx2x_sp_mapping(bp, fw_stats)));
+        REG_WR(bp, BAR_TSTRORM_INTMEM +
+               TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(func) + 4,
+               U64_HI(bnx2x_sp_mapping(bp, fw_stats)));
 
         if (CHIP_IS_E1H(bp)) {
                 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNCTION_MODE_OFFSET,
@@ -4676,15 +4704,12 @@ static void bnx2x_init_internal(struct bnx2x *bp)
                          bp->e1hov);
         }
 
-        /* Zero this manualy as its initialization is
-           currently missing in the initTool */
-        for (i = 0; i < USTORM_AGG_DATA_SIZE >> 2; i++)
-                REG_WR(bp, BAR_USTRORM_INTMEM +
-                       USTORM_AGG_DATA_OFFSET + 4*i, 0);
-
+        /* Init CQ ring mapping and aggregation size */
+        max_agg_size = min((u32)(bp->rx_buf_use_size +
+                                 8*BCM_PAGE_SIZE*PAGES_PER_SGE),
+                           (u32)0xffff);
         for_each_queue(bp, i) {
                 struct bnx2x_fastpath *fp = &bp->fp[i];
-                u16 max_agg_size;
 
                 REG_WR(bp, BAR_USTRORM_INTMEM +
                        USTORM_CQE_PAGE_BASE_OFFSET(port, FP_CL_ID(fp)),
@@ -4693,16 +4718,34 @@ static void bnx2x_init_internal(struct bnx2x *bp)
                        USTORM_CQE_PAGE_BASE_OFFSET(port, FP_CL_ID(fp)) + 4,
                        U64_HI(fp->rx_comp_mapping));
 
-                max_agg_size = min((u32)(bp->rx_buf_use_size +
-                                         8*BCM_PAGE_SIZE*PAGES_PER_SGE),
-                                   (u32)0xffff);
                 REG_WR16(bp, BAR_USTRORM_INTMEM +
                          USTORM_MAX_AGG_SIZE_OFFSET(port, FP_CL_ID(fp)),
                          max_agg_size);
         }
 }
 
-static void bnx2x_nic_init(struct bnx2x *bp)
+static void bnx2x_init_internal(struct bnx2x *bp, u32 load_code)
+{
+        switch (load_code) {
+        case FW_MSG_CODE_DRV_LOAD_COMMON:
+                bnx2x_init_internal_common(bp);
+                /* no break */
+
+        case FW_MSG_CODE_DRV_LOAD_PORT:
+                bnx2x_init_internal_port(bp);
+                /* no break */
+
+        case FW_MSG_CODE_DRV_LOAD_FUNCTION:
+                bnx2x_init_internal_func(bp);
+                break;
+
+        default:
+                BNX2X_ERR("Unknown load_code (0x%x) from MCP\n", load_code);
+                break;
+        }
+}
+
+static void bnx2x_nic_init(struct bnx2x *bp, u32 load_code)
 {
         int i;
 
@@ -4717,19 +4760,20 @@ static void bnx2x_nic_init(struct bnx2x *bp)
                 DP(NETIF_MSG_IFUP,
                    "bnx2x_init_sb(%p,%p) index %d  cl_id %d  sb %d\n",
                    bp, fp->status_blk, i, FP_CL_ID(fp), FP_SB_ID(fp));
-                bnx2x_init_sb(bp, FP_SB_ID(fp), fp->status_blk,
-                              fp->status_blk_mapping);
+                bnx2x_init_sb(bp, fp->status_blk, fp->status_blk_mapping,
+                              FP_SB_ID(fp));
+                bnx2x_update_fpsb_idx(fp);
         }
 
-        bnx2x_init_def_sb(bp, bp->def_status_blk,
-                          bp->def_status_blk_mapping, DEF_SB_ID);
+        bnx2x_init_def_sb(bp, bp->def_status_blk, bp->def_status_blk_mapping,
+                          DEF_SB_ID);
+        bnx2x_update_dsb_idx(bp);
         bnx2x_update_coalesce(bp);
         bnx2x_init_rx_rings(bp);
         bnx2x_init_tx_ring(bp);
         bnx2x_init_sp_ring(bp);
         bnx2x_init_context(bp);
-        bnx2x_init_internal(bp);
-        bnx2x_storm_stats_init(bp);
+        bnx2x_init_internal(bp, load_code);
         bnx2x_init_ind_table(bp);
         bnx2x_int_enable(bp);
 }
@@ -4878,7 +4922,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp)
         REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x0);
         REG_WR(bp, TCM_REG_PRS_IFEN, 0x0);
         REG_WR(bp, CFC_REG_DEBUG0, 0x1);
-        NIG_WR(NIG_REG_PRS_REQ_IN_EN, 0x0);
+        REG_WR(bp, NIG_REG_PRS_REQ_IN_EN, 0x0);
 
         /*  Write 0 to parser credits for CFC search request */
         REG_WR(bp, PRS_REG_CFC_SEARCH_INITIAL_CREDIT, 0x0);
@@ -4933,7 +4977,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp)
         REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x0);
         REG_WR(bp, TCM_REG_PRS_IFEN, 0x0);
         REG_WR(bp, CFC_REG_DEBUG0, 0x1);
-        NIG_WR(NIG_REG_PRS_REQ_IN_EN, 0x0);
+        REG_WR(bp, NIG_REG_PRS_REQ_IN_EN, 0x0);
 
         /* Write 0 to parser credits for CFC search request */
         REG_WR(bp, PRS_REG_CFC_SEARCH_INITIAL_CREDIT, 0x0);
@@ -5000,7 +5044,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp)
         REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x7fffffff);
         REG_WR(bp, TCM_REG_PRS_IFEN, 0x1);
         REG_WR(bp, CFC_REG_DEBUG0, 0x0);
-        NIG_WR(NIG_REG_PRS_REQ_IN_EN, 0x1);
+        REG_WR(bp, NIG_REG_PRS_REQ_IN_EN, 0x1);
 
         DP(NETIF_MSG_HW, "done\n");
 
@@ -5089,11 +5133,6 @@ static int bnx2x_init_common(struct bnx2x *bp)
         REG_WR(bp, PXP2_REG_RD_CDURD_SWAP_MODE, 1);
 #endif
 
-#ifndef BCM_ISCSI
-                /* set NIC mode */
-                REG_WR(bp, PRS_REG_NIC_MODE, 1);
-#endif
-
         REG_WR(bp, PXP2_REG_RQ_CDU_P_SIZE, 2);
 #ifdef BCM_ISCSI
         REG_WR(bp, PXP2_REG_RQ_TM_P_SIZE, 5);
@@ -5163,6 +5202,8 @@ static int bnx2x_init_common(struct bnx2x *bp)
         }
 
         bnx2x_init_block(bp, PRS_COMMON_START, PRS_COMMON_END);
+        /* set NIC mode */
+        REG_WR(bp, PRS_REG_NIC_MODE, 1);
         if (CHIP_IS_E1H(bp))
                 REG_WR(bp, PRS_REG_E1HOV_MODE, IS_E1HMF(bp));
 
@@ -5333,6 +5374,13 @@ static int bnx2x_init_common(struct bnx2x *bp)
                        ((u32 *)&tmp)[1]);
         }
 
+        if (!BP_NOMCP(bp)) {
+                bnx2x_acquire_phy_lock(bp);
+                bnx2x_common_init_phy(bp, bp->common.shmem_base);
+                bnx2x_release_phy_lock(bp);
+        } else
+                BNX2X_ERR("Bootcode is missing - can not initialize link\n");
+
         return 0;
 }
 
@@ -5638,18 +5686,23 @@ static u32 bnx2x_fw_command(struct bnx2x *bp, u32 command)
         int func = BP_FUNC(bp);
         u32 seq = ++bp->fw_seq;
         u32 rc = 0;
+        u32 cnt = 1;
+        u8 delay = CHIP_REV_IS_SLOW(bp) ? 100 : 10;
 
         SHMEM_WR(bp, func_mb[func].drv_mb_header, (command | seq));
         DP(BNX2X_MSG_MCP, "wrote command (%x) to FW MB\n", (command | seq));
 
-        /* let the FW do it's magic ... */
-        msleep(100); /* TBD */
+        do {
+                /* let the FW do it's magic ... */
+                msleep(delay);
 
-        if (CHIP_REV_IS_SLOW(bp))
-                msleep(900);
+                rc = SHMEM_RD(bp, func_mb[func].fw_mb_header);
 
-        rc = SHMEM_RD(bp, func_mb[func].fw_mb_header);
-        DP(BNX2X_MSG_MCP, "read (%x) seq is (%x) from FW MB\n", rc, seq);
+                /* Give the FW up to 2 second (200*10ms) */
+        } while ((seq != (rc & FW_MSG_SEQ_NUMBER_MASK)) && (cnt++ < 200));
+
+        DP(BNX2X_MSG_MCP, "[after %d ms] read (%x) seq is (%x) from FW MB\n",
+           cnt*delay, rc, seq);
 
         /* is this a reply to our command? */
         if (seq == (rc & FW_MSG_SEQ_NUMBER_MASK)) {
@@ -5713,6 +5766,7 @@ static void bnx2x_free_mem(struct bnx2x *bp)
                                NUM_RCQ_BD);
 
                 /* SGE ring */
+                BNX2X_FREE(bnx2x_fp(bp, i, rx_page_ring));
                 BNX2X_PCI_FREE(bnx2x_fp(bp, i, rx_sge_ring),
                                bnx2x_fp(bp, i, rx_sge_mapping),
                                BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
@@ -5890,7 +5944,8 @@ static void bnx2x_free_rx_skbs(struct bnx2x *bp)
                         dev_kfree_skb(skb);
                 }
                 if (!fp->disable_tpa)
-                        bnx2x_free_tpa_pool(bp, fp,
+                        bnx2x_free_tpa_pool(bp, fp, CHIP_IS_E1(bp) ?
+                                            ETH_MAX_AGGREGATION_QUEUES_E1 :
                                             ETH_MAX_AGGREGATION_QUEUES_E1H);
         }
 }
@@ -5976,8 +6031,8 @@ static int bnx2x_req_msix_irqs(struct bnx2x *bp)
                                  bnx2x_msix_fp_int, 0,
                                  bp->dev->name, &bp->fp[i]);
                 if (rc) {
-                        BNX2X_ERR("request fp #%d irq failed  rc %d\n",
-                                  i + offset, rc);
+                        BNX2X_ERR("request fp #%d irq failed  rc -%d\n",
+                                  i + offset, -rc);
                         bnx2x_free_msix_irqs(bp);
                         return -EBUSY;
                 }
@@ -6004,7 +6059,7 @@ static int bnx2x_req_irq(struct bnx2x *bp)
  * Init service functions
  */
 
-static void bnx2x_set_mac_addr_e1(struct bnx2x *bp)
+static void bnx2x_set_mac_addr_e1(struct bnx2x *bp, int set)
 {
         struct mac_configuration_cmd *config = bnx2x_sp(bp, mac_config);
         int port = BP_PORT(bp);
@@ -6026,11 +6081,15 @@ static void bnx2x_set_mac_addr_e1(struct bnx2x *bp)
         config->config_table[0].cam_entry.lsb_mac_addr =
                                         swab16(*(u16 *)&bp->dev->dev_addr[4]);
         config->config_table[0].cam_entry.flags = cpu_to_le16(port);
-        config->config_table[0].target_table_entry.flags = 0;
+        if (set)
+                config->config_table[0].target_table_entry.flags = 0;
+        else
+                CAM_INVALIDATE(config->config_table[0]);
         config->config_table[0].target_table_entry.client_id = 0;
         config->config_table[0].target_table_entry.vlan_id = 0;
 
-        DP(NETIF_MSG_IFUP, "setting MAC (%04x:%04x:%04x)\n",
+        DP(NETIF_MSG_IFUP, "%s MAC (%04x:%04x:%04x)\n",
+           (set ? "setting" : "clearing"),
            config->config_table[0].cam_entry.msb_mac_addr,
            config->config_table[0].cam_entry.middle_mac_addr,
            config->config_table[0].cam_entry.lsb_mac_addr);
@@ -6040,8 +6099,11 @@ static void bnx2x_set_mac_addr_e1(struct bnx2x *bp)
         config->config_table[1].cam_entry.middle_mac_addr = 0xffff;
         config->config_table[1].cam_entry.lsb_mac_addr = 0xffff;
         config->config_table[1].cam_entry.flags = cpu_to_le16(port);
-        config->config_table[1].target_table_entry.flags =
+        if (set)
+                config->config_table[1].target_table_entry.flags =
                                 TSTORM_CAM_TARGET_TABLE_ENTRY_BROADCAST;
+        else
+                CAM_INVALIDATE(config->config_table[1]);
         config->config_table[1].target_table_entry.client_id = 0;
         config->config_table[1].target_table_entry.vlan_id = 0;
 
@@ -6050,12 +6112,12 @@ static void bnx2x_set_mac_addr_e1(struct bnx2x *bp)
                       U64_LO(bnx2x_sp_mapping(bp, mac_config)), 0);
 }
 
-static void bnx2x_set_mac_addr_e1h(struct bnx2x *bp)
+static void bnx2x_set_mac_addr_e1h(struct bnx2x *bp, int set)
 {
         struct mac_configuration_cmd_e1h *config =
                 (struct mac_configuration_cmd_e1h *)bnx2x_sp(bp, mac_config);
 
-        if (bp->state != BNX2X_STATE_OPEN) {
+        if (set && (bp->state != BNX2X_STATE_OPEN)) {
                 DP(NETIF_MSG_IFUP, "state is %x, returning\n", bp->state);
                 return;
         }
@@ -6079,9 +6141,14 @@ static void bnx2x_set_mac_addr_e1h(struct bnx2x *bp)
         config->config_table[0].client_id = BP_L_ID(bp);
         config->config_table[0].vlan_id = 0;
         config->config_table[0].e1hov_id = cpu_to_le16(bp->e1hov);
-        config->config_table[0].flags = BP_PORT(bp);
+        if (set)
+                config->config_table[0].flags = BP_PORT(bp);
+        else
+                config->config_table[0].flags =
+                                MAC_CONFIGURATION_ENTRY_E1H_ACTION_TYPE;
 
-        DP(NETIF_MSG_IFUP, "setting MAC (%04x:%04x:%04x)  E1HOV %d  CLID %d\n",
+        DP(NETIF_MSG_IFUP, "%s MAC (%04x:%04x:%04x)  E1HOV %d  CLID %d\n",
+           (set ? "setting" : "clearing"),
            config->config_table[0].msb_mac_addr,
            config->config_table[0].middle_mac_addr,
            config->config_table[0].lsb_mac_addr, bp->e1hov, BP_L_ID(bp));
@@ -6106,13 +6173,13 @@ static int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx,
                         bnx2x_rx_int(bp->fp, 10);
                         /* if index is different from 0
                          * the reply for some commands will
-                         * be on the none default queue
+                         * be on the non default queue
                          */
                         if (idx)
                                 bnx2x_rx_int(&bp->fp[idx], 10);
                 }
-                mb(); /* state is changed by bnx2x_sp_event() */
 
+                mb(); /* state is changed by bnx2x_sp_event() */
                 if (*state_p == state)
                         return 0;
 
@@ -6167,7 +6234,6 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
 {
         u32 load_code;
         int i, rc;
-
 #ifdef BNX2X_STOP_ON_ERROR
         if (unlikely(bp->panic))
                 return -EPERM;
@@ -6183,22 +6249,24 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
         if (!BP_NOMCP(bp)) {
                 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ);
                 if (!load_code) {
-                        BNX2X_ERR("MCP response failure, unloading\n");
+                        BNX2X_ERR("MCP response failure, aborting\n");
                         return -EBUSY;
                 }
                 if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED)
                         return -EBUSY; /* other port in diagnostic mode */
 
         } else {
+                int port = BP_PORT(bp);
+
                 DP(NETIF_MSG_IFUP, "NO MCP load counts before us %d, %d, %d\n",
                    load_count[0], load_count[1], load_count[2]);
                 load_count[0]++;
-                load_count[1 + BP_PORT(bp)]++;
+                load_count[1 + port]++;
                 DP(NETIF_MSG_IFUP, "NO MCP new load counts       %d, %d, %d\n",
                    load_count[0], load_count[1], load_count[2]);
                 if (load_count[0] == 1)
                         load_code = FW_MSG_CODE_DRV_LOAD_COMMON;
-                else if (load_count[1 + BP_PORT(bp)] == 1)
+                else if (load_count[1 + port] == 1)
                         load_code = FW_MSG_CODE_DRV_LOAD_PORT;
                 else
                         load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION;
@@ -6247,9 +6315,6 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
                 bnx2x_fp(bp, i, disable_tpa) =
                                         ((bp->flags & TPA_ENABLE_FLAG) == 0);
 
-        /* Disable interrupt handling until HW is initialized */
-        atomic_set(&bp->intr_sem, 1);
-
         if (bp->flags & USING_MSIX_FLAG) {
                 rc = bnx2x_req_msix_irqs(bp);
                 if (rc) {
@@ -6276,17 +6341,14 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
                 goto load_error;
         }
 
-        /* Enable interrupt handling */
-        atomic_set(&bp->intr_sem, 0);
-
         /* Setup NIC internals and enable interrupts */
-        bnx2x_nic_init(bp);
+        bnx2x_nic_init(bp, load_code);
 
         /* Send LOAD_DONE command to MCP */
         if (!BP_NOMCP(bp)) {
                 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE);
                 if (!load_code) {
-                        BNX2X_ERR("MCP response failure, unloading\n");
+                        BNX2X_ERR("MCP response failure, aborting\n");
                         rc = -EBUSY;
                         goto load_int_disable;
                 }
@@ -6301,11 +6363,12 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
         for_each_queue(bp, i)
                 napi_enable(&bnx2x_fp(bp, i, napi));
 
+        /* Enable interrupt handling */
+        atomic_set(&bp->intr_sem, 0);
+
         rc = bnx2x_setup_leading(bp);
         if (rc) {
-#ifdef BNX2X_STOP_ON_ERROR
-                bp->panic = 1;
-#endif
+                BNX2X_ERR("Setup leading failed!\n");
                 goto load_stop_netif;
         }
 
@@ -6323,9 +6386,9 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
                 }
 
         if (CHIP_IS_E1(bp))
-                bnx2x_set_mac_addr_e1(bp);
+                bnx2x_set_mac_addr_e1(bp, 1);
         else
-                bnx2x_set_mac_addr_e1h(bp);
+                bnx2x_set_mac_addr_e1h(bp, 1);
 
         if (bp->port.pmf)
                 bnx2x_initial_phy_init(bp);
@@ -6339,7 +6402,6 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
                 break;
 
         case LOAD_OPEN:
-                /* IRQ is only requested from bnx2x_open */
                 netif_start_queue(bp->dev);
                 bnx2x_set_rx_mode(bp->dev);
                 if (bp->flags & USING_MSIX_FLAG)
@@ -6378,8 +6440,7 @@ load_int_disable:
         /* Free SKBs, SGEs, TPA pool and driver internals */
         bnx2x_free_skbs(bp);
         for_each_queue(bp, i)
-                bnx2x_free_rx_sge_range(bp, bp->fp + i,
-                                        RX_SGE_CNT*NUM_RX_SGE_PAGES);
+                bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
 load_error:
         bnx2x_free_mem(bp);
 
@@ -6411,7 +6472,7 @@ static int bnx2x_stop_multi(struct bnx2x *bp, int index)
         return rc;
 }
 
-static void bnx2x_stop_leading(struct bnx2x *bp)
+static int bnx2x_stop_leading(struct bnx2x *bp)
 {
         u16 dsb_sp_prod_idx;
         /* if the other port is handling traffic,
@@ -6429,7 +6490,7 @@ static void bnx2x_stop_leading(struct bnx2x *bp)
         rc = bnx2x_wait_ramrod(bp, BNX2X_FP_STATE_HALTED, 0,
                                &(bp->fp[0].state), 1);
         if (rc) /* timeout */
-                return;
+                return rc;
 
         dsb_sp_prod_idx = *bp->dsb_sp_prod;
 
@@ -6441,20 +6502,24 @@ static void bnx2x_stop_leading(struct bnx2x *bp)
            so there is not much to do if this times out
          */
         while (dsb_sp_prod_idx == *bp->dsb_sp_prod) {
-                msleep(1);
                 if (!cnt) {
                         DP(NETIF_MSG_IFDOWN, "timeout waiting for port del "
                            "dsb_sp_prod 0x%x != dsb_sp_prod_idx 0x%x\n",
                            *bp->dsb_sp_prod, dsb_sp_prod_idx);
 #ifdef BNX2X_STOP_ON_ERROR
                         bnx2x_panic();
+#else
+                        rc = -EBUSY;
 #endif
                         break;
                 }
                 cnt--;
+                msleep(1);
         }
         bp->state = BNX2X_STATE_CLOSING_WAIT4_UNLOAD;
         bp->fp[0].state = BNX2X_FP_STATE_CLOSED;
+
+        return rc;
 }
 
 static void bnx2x_reset_func(struct bnx2x *bp)
@@ -6496,7 +6561,7 @@ static void bnx2x_reset_port(struct bnx2x *bp)
         val = REG_RD(bp, BRB1_REG_PORT_NUM_OCC_BLOCKS_0 + port*4);
         if (val)
                 DP(NETIF_MSG_IFDOWN,
-                   "BRB1 is not empty  %d blooks are occupied\n", val);
+                   "BRB1 is not empty  %d blocks are occupied\n", val);
 
         /* TODO: Close Doorbell port? */
 }
@@ -6536,11 +6601,12 @@ static void bnx2x_reset_chip(struct bnx2x *bp, u32 reset_code)
         }
 }
 
-/* msut be called with rtnl_lock */
+/* must be called with rtnl_lock */
 static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
 {
+        int port = BP_PORT(bp);
         u32 reset_code = 0;
-        int i, cnt;
+        int i, cnt, rc;
 
         bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT;
 
@@ -6557,22 +6623,17 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
                  (DRV_PULSE_ALWAYS_ALIVE | bp->fw_drv_pulse_wr_seq));
         bnx2x_stats_handle(bp, STATS_EVENT_STOP);
 
-        /* Wait until all fast path tasks complete */
+        /* Wait until tx fast path tasks complete */
         for_each_queue(bp, i) {
                 struct bnx2x_fastpath *fp = &bp->fp[i];
 
-#ifdef BNX2X_STOP_ON_ERROR
-#ifdef __powerpc64__
-                DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n",
-#else
-                DP(NETIF_MSG_IFDOWN, "fp->tpa_queue_used = 0x%llx\n",
-#endif
-                   fp->tpa_queue_used);
-#endif
                 cnt = 1000;
                 smp_rmb();
-                while (bnx2x_has_work(fp)) {
-                        msleep(1);
+                while (BNX2X_HAS_TX_WORK(fp)) {
+
+                        if (!netif_running(bp->dev))
+                                bnx2x_tx_int(fp, 1000);
+
                         if (!cnt) {
                                 BNX2X_ERR("timeout waiting for queue[%d]\n",
                                           i);
@@ -6584,14 +6645,13 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
 #endif
                         }
                         cnt--;
+                        msleep(1);
                         smp_rmb();
                 }
         }
 
-        /* Wait until all slow path tasks complete */
-        cnt = 1000;
-        while ((bp->spq_left != MAX_SPQ_PENDING) && cnt--)
-                msleep(1);
+        /* Give HW time to discard old tx messages */
+        msleep(1);
 
         for_each_queue(bp, i)
                 napi_disable(&bnx2x_fp(bp, i, napi));
@@ -6601,52 +6661,79 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
         /* Release IRQs */
         bnx2x_free_irq(bp);
 
-        if (bp->flags & NO_WOL_FLAG)
+        if (unload_mode == UNLOAD_NORMAL)
+                reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS;
+
+        else if (bp->flags & NO_WOL_FLAG) {
                 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP;
+                if (CHIP_IS_E1H(bp))
+                        REG_WR(bp, MISC_REG_E1HMF_MODE, 0);
 
-        else if (bp->wol) {
-                u32 emac_base = BP_PORT(bp) ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
+        } else if (bp->wol) {
+                u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
                 u8 *mac_addr = bp->dev->dev_addr;
                 u32 val;
-
                 /* The mac address is written to entries 1-4 to
                    preserve entry 0 which is used by the PMF */
+                u8 entry = (BP_E1HVN(bp) + 1)*8;
+
                 val = (mac_addr[0] << 8) | mac_addr[1];
-                EMAC_WR(EMAC_REG_EMAC_MAC_MATCH + (BP_E1HVN(bp) + 1)*8, val);
+                EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry, val);
 
                 val = (mac_addr[2] << 24) | (mac_addr[3] << 16) |
                       (mac_addr[4] << 8) | mac_addr[5];
-                EMAC_WR(EMAC_REG_EMAC_MAC_MATCH + (BP_E1HVN(bp) + 1)*8 + 4,
-                        val);
+                EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry + 4, val);
 
                 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_EN;
 
         } else
                 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS;
 
+        if (CHIP_IS_E1(bp)) {
+                struct mac_configuration_cmd *config =
+                                                bnx2x_sp(bp, mcast_config);
+
+                bnx2x_set_mac_addr_e1(bp, 0);
+
+                for (i = 0; i < config->hdr.length_6b; i++)
+                        CAM_INVALIDATE(config->config_table[i]);
+
+                config->hdr.length_6b = i;
+                if (CHIP_REV_IS_SLOW(bp))
+                        config->hdr.offset = BNX2X_MAX_EMUL_MULTI*(1 + port);
+                else
+                        config->hdr.offset = BNX2X_MAX_MULTICAST*(1 + port);
+                config->hdr.client_id = BP_CL_ID(bp);
+                config->hdr.reserved1 = 0;
+
+                bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0,
+                              U64_HI(bnx2x_sp_mapping(bp, mcast_config)),
+                              U64_LO(bnx2x_sp_mapping(bp, mcast_config)), 0);
+
+        } else { /* E1H */
+                bnx2x_set_mac_addr_e1h(bp, 0);
+
+                for (i = 0; i < MC_HASH_SIZE; i++)
+                        REG_WR(bp, MC_HASH_OFFSET(bp, i), 0);
+        }
+
+        if (CHIP_IS_E1H(bp))
+                REG_WR(bp, NIG_REG_LLH0_FUNC_EN + port*8, 0);
+
         /* Close multi and leading connections
            Completions for ramrods are collected in a synchronous way */
         for_each_nondefault_queue(bp, i)
                 if (bnx2x_stop_multi(bp, i))
                         goto unload_error;
 
-        if (CHIP_IS_E1H(bp))
-                REG_WR(bp, NIG_REG_LLH0_FUNC_EN + BP_PORT(bp)*8, 0);
-
-        bnx2x_stop_leading(bp);
-#ifdef BNX2X_STOP_ON_ERROR
-        /* If ramrod completion timed out - break here! */
-        if (bp->panic) {
+        rc = bnx2x_stop_leading(bp);
+        if (rc) {
                 BNX2X_ERR("Stop leading failed!\n");
+#ifdef BNX2X_STOP_ON_ERROR
                 return -EBUSY;
-        }
+#else
+                goto unload_error;
 #endif
-
-        if ((bp->state != BNX2X_STATE_CLOSING_WAIT4_UNLOAD) ||
-            (bp->fp[0].state != BNX2X_FP_STATE_CLOSED)) {
-                DP(NETIF_MSG_IFDOWN, "failed to close leading properly!  "
-                   "state 0x%x  fp[0].state 0x%x\n",
-                   bp->state, bp->fp[0].state);
         }
 
 unload_error:
@@ -6656,12 +6743,12 @@ unload_error:
                 DP(NETIF_MSG_IFDOWN, "NO MCP load counts      %d, %d, %d\n",
                    load_count[0], load_count[1], load_count[2]);
                 load_count[0]--;
-                load_count[1 + BP_PORT(bp)]--;
+                load_count[1 + port]--;
                 DP(NETIF_MSG_IFDOWN, "NO MCP new load counts  %d, %d, %d\n",
                    load_count[0], load_count[1], load_count[2]);
                 if (load_count[0] == 0)
                         reset_code = FW_MSG_CODE_DRV_UNLOAD_COMMON;
-                else if (load_count[1 + BP_PORT(bp)] == 0)
+                else if (load_count[1 + port] == 0)
                         reset_code = FW_MSG_CODE_DRV_UNLOAD_PORT;
                 else
                         reset_code = FW_MSG_CODE_DRV_UNLOAD_FUNCTION;
@@ -6681,8 +6768,7 @@ unload_error:
         /* Free SKBs, SGEs, TPA pool and driver internals */
         bnx2x_free_skbs(bp);
         for_each_queue(bp, i)
-                bnx2x_free_rx_sge_range(bp, bp->fp + i,
-                                        RX_SGE_CNT*NUM_RX_SGE_PAGES);
+                bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
         bnx2x_free_mem(bp);
 
         bp->state = BNX2X_STATE_CLOSED;
@@ -6733,56 +6819,93 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp)
                 /* Check if it is the UNDI driver
                  * UNDI driver initializes CID offset for normal bell to 0x7
                  */
+                bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
                 val = REG_RD(bp, DORQ_REG_NORM_CID_OFST);
                 if (val == 0x7) {
                         u32 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS;
-                        /* save our func and fw_seq */
+                        /* save our func */
                         int func = BP_FUNC(bp);
-                        u16 fw_seq = bp->fw_seq;
+                        u32 swap_en;
+                        u32 swap_val;
 
                         BNX2X_DEV_INFO("UNDI is active! reset device\n");
 
                         /* try unload UNDI on port 0 */
                         bp->func = 0;
-                        bp->fw_seq = (SHMEM_RD(bp,
-                                             func_mb[bp->func].drv_mb_header) &
-                                      DRV_MSG_SEQ_NUMBER_MASK);
-
+                        bp->fw_seq =
+                               (SHMEM_RD(bp, func_mb[bp->func].drv_mb_header) &
+                                DRV_MSG_SEQ_NUMBER_MASK);
                         reset_code = bnx2x_fw_command(bp, reset_code);
-                        bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE);
 
                         /* if UNDI is loaded on the other port */
                         if (reset_code != FW_MSG_CODE_DRV_UNLOAD_COMMON) {
 
+                                /* send "DONE" for previous unload */
+                                bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE);
+
+                                /* unload UNDI on port 1 */
                                 bp->func = 1;
-                                bp->fw_seq = (SHMEM_RD(bp,
-                                             func_mb[bp->func].drv_mb_header) &
-                                              DRV_MSG_SEQ_NUMBER_MASK);
-
-                                bnx2x_fw_command(bp,
-                                             DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS);
-                                bnx2x_fw_command(bp,
-                                                 DRV_MSG_CODE_UNLOAD_DONE);
-
-                                /* restore our func and fw_seq */
-                                bp->func = func;
-                                bp->fw_seq = fw_seq;
+                                bp->fw_seq =
+                               (SHMEM_RD(bp, func_mb[bp->func].drv_mb_header) &
+                                        DRV_MSG_SEQ_NUMBER_MASK);
+                                reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS;
+
+                                bnx2x_fw_command(bp, reset_code);
                         }
 
+                        REG_WR(bp, (BP_PORT(bp) ? HC_REG_CONFIG_1 :
+                                    HC_REG_CONFIG_0), 0x1000);
+
+                        /* close input traffic and wait for it */
+                        /* Do not rcv packets to BRB */
+                        REG_WR(bp,
+                              (BP_PORT(bp) ? NIG_REG_LLH1_BRB1_DRV_MASK :
+                                             NIG_REG_LLH0_BRB1_DRV_MASK), 0x0);
+                        /* Do not direct rcv packets that are not for MCP to
+                         * the BRB */
+                        REG_WR(bp,
+                               (BP_PORT(bp) ? NIG_REG_LLH1_BRB1_NOT_MCP :
+                                              NIG_REG_LLH0_BRB1_NOT_MCP), 0x0);
+                        /* clear AEU */
+                        REG_WR(bp,
+                             (BP_PORT(bp) ? MISC_REG_AEU_MASK_ATTN_FUNC_1 :
+                                            MISC_REG_AEU_MASK_ATTN_FUNC_0), 0);
+                        msleep(10);
+
+                        /* save NIG port swap info */
+                        swap_val = REG_RD(bp, NIG_REG_PORT_SWAP);
+                        swap_en = REG_RD(bp, NIG_REG_STRAP_OVERRIDE);
                         /* reset device */
                         REG_WR(bp,
                                GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
-                               0xd3ffff7f);
+                               0xd3ffffff);
                         REG_WR(bp,
                                GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
                                0x1403);
+                        /* take the NIG out of reset and restore swap values */
+                        REG_WR(bp,
+                               GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET,
+                               MISC_REGISTERS_RESET_REG_1_RST_NIG);
+                        REG_WR(bp, NIG_REG_PORT_SWAP, swap_val);
+                        REG_WR(bp, NIG_REG_STRAP_OVERRIDE, swap_en);
+
+                        /* send unload done to the MCP */
+                        bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE);
+
+                        /* restore our func and fw_seq */
+                        bp->func = func;
+                        bp->fw_seq =
+                               (SHMEM_RD(bp, func_mb[bp->func].drv_mb_header) &
+                                DRV_MSG_SEQ_NUMBER_MASK);
                 }
+                bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
         }
 }
 
 static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)
 {
         u32 val, val2, val3, val4, id;
+        u16 pmc;
 
         /* Get the chip revision id and number. */
         /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */
@@ -6840,8 +6963,16 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)
                 BNX2X_ERR("This driver needs bc_ver %X but found %X,"
                           " please upgrade BC\n", BNX2X_BC_VER, val);
         }
-        BNX2X_DEV_INFO("%sWoL Capable\n",
-                       (bp->flags & NO_WOL_FLAG)? "Not " : "");
+
+        if (BP_E1HVN(bp) == 0) {
+                pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_PMC, &pmc);
+                bp->flags |= (pmc & PCI_PM_CAP_PME_D3cold) ? 0 : NO_WOL_FLAG;
+        } else {
+                /* no WOL capability for E1HVN != 0 */
+                bp->flags |= NO_WOL_FLAG;
+        }
+        BNX2X_DEV_INFO("%sWoL capable\n",
+                       (bp->flags & NO_WOL_FLAG) ? "Not " : "");
 
         val = SHMEM_RD(bp, dev_info.shared_hw_config.part_num);
         val2 = SHMEM_RD(bp, dev_info.shared_hw_config.part_num[4]);
@@ -7202,7 +7333,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp)
         bp->link_params.req_flow_ctrl = (bp->port.link_config &
                                          PORT_FEATURE_FLOW_CONTROL_MASK);
         if ((bp->link_params.req_flow_ctrl == FLOW_CTRL_AUTO) &&
-            (!bp->port.supported & SUPPORTED_Autoneg))
+            !(bp->port.supported & SUPPORTED_Autoneg))
                 bp->link_params.req_flow_ctrl = FLOW_CTRL_NONE;
 
         BNX2X_DEV_INFO("req_line_speed %d  req_duplex %d  req_flow_ctrl 0x%x"
@@ -7274,9 +7405,8 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp)
                 bp->mf_config =
                         SHMEM_RD(bp, mf_cfg.func_mf_config[func].config);
 
-                val =
-                   (SHMEM_RD(bp, mf_cfg.func_mf_config[func].e1hov_tag) &
-                    FUNC_MF_CFG_E1HOV_TAG_MASK);
+                val = (SHMEM_RD(bp, mf_cfg.func_mf_config[func].e1hov_tag) &
+                       FUNC_MF_CFG_E1HOV_TAG_MASK);
                 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
 
                         bp->e1hov = val;
@@ -7324,7 +7454,7 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp)
 
         if (BP_NOMCP(bp)) {
                 /* only supposed to happen on emulation/FPGA */
-                BNX2X_ERR("warning rendom MAC workaround active\n");
+                BNX2X_ERR("warning random MAC workaround active\n");
                 random_ether_addr(bp->dev->dev_addr);
                 memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN);
         }
@@ -7337,8 +7467,8 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
         int func = BP_FUNC(bp);
         int rc;
 
-        if (nomcp)
-                bp->flags |= NO_MCP_FLAG;
+        /* Disable interrupt handling until HW is initialized */
+        atomic_set(&bp->intr_sem, 1);
 
         mutex_init(&bp->port.phy_mutex);
 
@@ -7377,8 +7507,6 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
         bp->tx_ticks = 50;
         bp->rx_ticks = 25;
 
-        bp->stats_ticks = 1000000 & 0xffff00;
-
         bp->timer_interval = (CHIP_REV_IS_SLOW(bp) ? 5*HZ : HZ);
         bp->current_interval = (poll ? poll : bp->timer_interval);
 
@@ -7628,25 +7756,25 @@ static void bnx2x_get_drvinfo(struct net_device *dev,
                               struct ethtool_drvinfo *info)
 {
         struct bnx2x *bp = netdev_priv(dev);
-        char phy_fw_ver[PHY_FW_VER_LEN];
+        u8 phy_fw_ver[PHY_FW_VER_LEN];
 
         strcpy(info->driver, DRV_MODULE_NAME);
         strcpy(info->version, DRV_MODULE_VERSION);
 
         phy_fw_ver[0] = '\0';
         if (bp->port.pmf) {
-                bnx2x_phy_hw_lock(bp);
+                bnx2x_acquire_phy_lock(bp);
                 bnx2x_get_ext_phy_fw_version(&bp->link_params,
                                              (bp->state != BNX2X_STATE_CLOSED),
                                              phy_fw_ver, PHY_FW_VER_LEN);
-                bnx2x_phy_hw_unlock(bp);
+                bnx2x_release_phy_lock(bp);
         }
 
-        snprintf(info->fw_version, 32, "%d.%d.%d:%d BC:%x%s%s",
-                 BCM_5710_FW_MAJOR_VERSION, BCM_5710_FW_MINOR_VERSION,
-                 BCM_5710_FW_REVISION_VERSION,
-                 BCM_5710_FW_COMPILE_FLAGS, bp->common.bc_ver,
-                 ((phy_fw_ver[0] != '\0')? " PHY:":""), phy_fw_ver);
+        snprintf(info->fw_version, 32, "BC:%d.%d.%d%s%s",
+                 (bp->common.bc_ver & 0xff0000) >> 16,
+                 (bp->common.bc_ver & 0xff00) >> 8,
+                 (bp->common.bc_ver & 0xff),
+                 ((phy_fw_ver[0] != '\0') ? " PHY:" : ""), phy_fw_ver);
         strcpy(info->bus_info, pci_name(bp->pdev));
         info->n_stats = BNX2X_NUM_STATS;
         info->testinfo_len = BNX2X_NUM_TESTS;
@@ -8097,7 +8225,7 @@ static int bnx2x_set_eeprom(struct net_device *dev,
         if (eeprom->magic == 0x00504859)
                 if (bp->port.pmf) {
 
-                        bnx2x_phy_hw_lock(bp);
+                        bnx2x_acquire_phy_lock(bp);
                         rc = bnx2x_flash_download(bp, BP_PORT(bp),
                                              bp->link_params.ext_phy_config,
                                              (bp->state != BNX2X_STATE_CLOSED),
@@ -8109,7 +8237,7 @@ static int bnx2x_set_eeprom(struct net_device *dev,
                                 rc |= bnx2x_phy_init(&bp->link_params,
                                                      &bp->link_vars);
                         }
-                        bnx2x_phy_hw_unlock(bp);
+                        bnx2x_release_phy_lock(bp);
 
                 } else /* Only the PMF can access the PHY */
                         return -EINVAL;
@@ -8128,7 +8256,6 @@ static int bnx2x_get_coalesce(struct net_device *dev,
 
         coal->rx_coalesce_usecs = bp->rx_ticks;
         coal->tx_coalesce_usecs = bp->tx_ticks;
-        coal->stats_block_coalesce_usecs = bp->stats_ticks;
 
         return 0;
 }
@@ -8146,44 +8273,12 @@ static int bnx2x_set_coalesce(struct net_device *dev,
         if (bp->tx_ticks > 0x3000)
                 bp->tx_ticks = 0x3000;
 
-        bp->stats_ticks = coal->stats_block_coalesce_usecs;
-        if (bp->stats_ticks > 0xffff00)
-                bp->stats_ticks = 0xffff00;
-        bp->stats_ticks &= 0xffff00;
-
         if (netif_running(dev))
                 bnx2x_update_coalesce(bp);
 
         return 0;
 }
 
-static int bnx2x_set_flags(struct net_device *dev, u32 data)
-{
-        struct bnx2x *bp = netdev_priv(dev);
-        int changed = 0;
-        int rc = 0;
-
-        if (data & ETH_FLAG_LRO) {
-                if (!(dev->features & NETIF_F_LRO)) {
-                        dev->features |= NETIF_F_LRO;
-                        bp->flags |= TPA_ENABLE_FLAG;
-                        changed = 1;
-                }
-
-        } else if (dev->features & NETIF_F_LRO) {
-                dev->features &= ~NETIF_F_LRO;
-                bp->flags &= ~TPA_ENABLE_FLAG;
-                changed = 1;
-        }
-
-        if (changed && netif_running(dev)) {
-                bnx2x_nic_unload(bp, UNLOAD_NORMAL);
-                rc = bnx2x_nic_load(bp, LOAD_NORMAL);
-        }
-
-        return rc;
-}
-
 static void bnx2x_get_ringparam(struct net_device *dev,
                                 struct ethtool_ringparam *ering)
 {
@@ -8266,7 +8361,7 @@ static int bnx2x_set_pauseparam(struct net_device *dev,
 
         if (epause->autoneg) {
                 if (!(bp->port.supported & SUPPORTED_Autoneg)) {
-                        DP(NETIF_MSG_LINK, "Autoneg not supported\n");
+                        DP(NETIF_MSG_LINK, "autoneg not supported\n");
                         return -EINVAL;
                 }
 
@@ -8285,6 +8380,34 @@ static int bnx2x_set_pauseparam(struct net_device *dev,
         return 0;
 }
 
+static int bnx2x_set_flags(struct net_device *dev, u32 data)
+{
+        struct bnx2x *bp = netdev_priv(dev);
+        int changed = 0;
+        int rc = 0;
+
+        /* TPA requires Rx CSUM offloading */
+        if ((data & ETH_FLAG_LRO) && bp->rx_csum) {
+                if (!(dev->features & NETIF_F_LRO)) {
+                        dev->features |= NETIF_F_LRO;
+                        bp->flags |= TPA_ENABLE_FLAG;
+                        changed = 1;
+                }
+
+        } else if (dev->features & NETIF_F_LRO) {
+                dev->features &= ~NETIF_F_LRO;
+                bp->flags &= ~TPA_ENABLE_FLAG;
+                changed = 1;
+        }
+
+        if (changed && netif_running(dev)) {
+                bnx2x_nic_unload(bp, UNLOAD_NORMAL);
+                rc = bnx2x_nic_load(bp, LOAD_NORMAL);
+        }
+
+        return rc;
+}
+
 static u32 bnx2x_get_rx_csum(struct net_device *dev)
 {
         struct bnx2x *bp = netdev_priv(dev);
@@ -8295,9 +8418,19 @@ static u32 bnx2x_get_rx_csum(struct net_device *dev)
 static int bnx2x_set_rx_csum(struct net_device *dev, u32 data)
 {
         struct bnx2x *bp = netdev_priv(dev);
+        int rc = 0;
 
         bp->rx_csum = data;
-        return 0;
+
+        /* Disable TPA, when Rx CSUM is disabled. Otherwise all
+           TPA'ed packets will be discarded due to wrong TCP CSUM */
+        if (!data) {
+                u32 flags = ethtool_op_get_flags(dev);
+
+                rc = bnx2x_set_flags(dev, (flags & ~ETH_FLAG_LRO));
+        }
+
+        return rc;
 }
 
 static int bnx2x_set_tso(struct net_device *dev, u32 data)
@@ -8335,6 +8468,7 @@ static int bnx2x_test_registers(struct bnx2x *bp)
 {
         int idx, i, rc = -ENODEV;
         u32 wr_val = 0;
+        int port = BP_PORT(bp);
         static const struct {
                 u32  offset0;
                 u32  offset1;
@@ -8400,7 +8534,6 @@ static int bnx2x_test_registers(struct bnx2x *bp)
 
                 for (i = 0; reg_tbl[i].offset0 != 0xffffffff; i++) {
                         u32 offset, mask, save_val, val;
-                        int port = BP_PORT(bp);
 
                         offset = reg_tbl[i].offset0 + port*reg_tbl[i].offset1;
                         mask = reg_tbl[i].mask;
@@ -8446,16 +8579,17 @@ static int bnx2x_test_memory(struct bnx2x *bp)
         static const struct {
                 char *name;
                 u32 offset;
-                u32 mask;
+                u32 e1_mask;
+                u32 e1h_mask;
         } prty_tbl[] = {
-                { "CCM_REG_CCM_PRTY_STS",     CCM_REG_CCM_PRTY_STS,     0 },
-                { "CFC_REG_CFC_PRTY_STS",     CFC_REG_CFC_PRTY_STS,     0 },
-                { "DMAE_REG_DMAE_PRTY_STS",   DMAE_REG_DMAE_PRTY_STS,   0 },
-                { "TCM_REG_TCM_PRTY_STS",     TCM_REG_TCM_PRTY_STS,     0 },
-                { "UCM_REG_UCM_PRTY_STS",     UCM_REG_UCM_PRTY_STS,     0 },
-                { "XCM_REG_XCM_PRTY_STS",     XCM_REG_XCM_PRTY_STS,     0x1 },
-
-                { NULL, 0xffffffff, 0 }
+                { "CCM_PRTY_STS",  CCM_REG_CCM_PRTY_STS,   0x3ffc0, 0 },
+                { "CFC_PRTY_STS",  CFC_REG_CFC_PRTY_STS,   0x2,     0x2 },
+                { "DMAE_PRTY_STS", DMAE_REG_DMAE_PRTY_STS, 0,       0 },
+                { "TCM_PRTY_STS",  TCM_REG_TCM_PRTY_STS,   0x3ffc0, 0 },
+                { "UCM_PRTY_STS",  UCM_REG_UCM_PRTY_STS,   0x3ffc0, 0 },
+                { "XCM_PRTY_STS",  XCM_REG_XCM_PRTY_STS,   0x3ffc1, 0 },
+
+                { NULL, 0xffffffff, 0, 0 }
         };
 
         if (!netif_running(bp->dev))
@@ -8469,7 +8603,8 @@ static int bnx2x_test_memory(struct bnx2x *bp)
         /* Check the parity status */
         for (i = 0; prty_tbl[i].offset != 0xffffffff; i++) {
                 val = REG_RD(bp, prty_tbl[i].offset);
-                if (val & ~(prty_tbl[i].mask)) {
+                if ((CHIP_IS_E1(bp) && (val & ~(prty_tbl[i].e1_mask))) ||
+                    (CHIP_IS_E1H(bp) && (val & ~(prty_tbl[i].e1h_mask)))) {
                         DP(NETIF_MSG_HW,
                            "%s is 0x%x\n", prty_tbl[i].name, val);
                         goto test_mem_exit;
@@ -8539,15 +8674,15 @@ static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode, u8 link_up)
 
         if (loopback_mode == BNX2X_MAC_LOOPBACK) {
                 bp->link_params.loopback_mode = LOOPBACK_BMAC;
-                bnx2x_phy_hw_lock(bp);
+                bnx2x_acquire_phy_lock(bp);
                 bnx2x_phy_init(&bp->link_params, &bp->link_vars);
-                bnx2x_phy_hw_unlock(bp);
+                bnx2x_release_phy_lock(bp);
 
         } else if (loopback_mode == BNX2X_PHY_LOOPBACK) {
                 bp->link_params.loopback_mode = LOOPBACK_XGXS_10;
-                bnx2x_phy_hw_lock(bp);
+                bnx2x_acquire_phy_lock(bp);
                 bnx2x_phy_init(&bp->link_params, &bp->link_vars);
-                bnx2x_phy_hw_unlock(bp);
+                bnx2x_release_phy_lock(bp);
                 /* wait until link state is restored */
                 bnx2x_wait_for_link(bp, link_up);
 
@@ -8771,7 +8906,7 @@ static void bnx2x_self_test(struct net_device *dev,
         if (!netif_running(dev))
                 return;
 
-        /* offline tests are not suppoerted in MF mode */
+        /* offline tests are not supported in MF mode */
         if (IS_E1HMF(bp))
                 etest->flags &= ~ETH_TEST_FL_OFFLINE;
 
@@ -8827,76 +8962,99 @@ static const struct {
         long offset;
         int size;
         u32 flags;
-        char string[ETH_GSTRING_LEN];
+#define STATS_FLAGS_PORT                1
+#define STATS_FLAGS_FUNC                2
+        u8 string[ETH_GSTRING_LEN];
 } bnx2x_stats_arr[BNX2X_NUM_STATS] = {
-/* 1 */ { STATS_OFFSET32(valid_bytes_received_hi),     8, 1, "rx_bytes" },
-        { STATS_OFFSET32(error_bytes_received_hi),     8, 1, "rx_error_bytes" },
-        { STATS_OFFSET32(total_bytes_transmitted_hi),  8, 1, "tx_bytes" },
-        { STATS_OFFSET32(tx_stat_ifhcoutbadoctets_hi), 8, 0, "tx_error_bytes" },
+/* 1 */ { STATS_OFFSET32(valid_bytes_received_hi),
+                                8, STATS_FLAGS_FUNC, "rx_bytes" },
+        { STATS_OFFSET32(error_bytes_received_hi),
+                                8, STATS_FLAGS_FUNC, "rx_error_bytes" },
+        { STATS_OFFSET32(total_bytes_transmitted_hi),
+                                8, STATS_FLAGS_FUNC, "tx_bytes" },
+        { STATS_OFFSET32(tx_stat_ifhcoutbadoctets_hi),
+                                8, STATS_FLAGS_PORT, "tx_error_bytes" },
         { STATS_OFFSET32(total_unicast_packets_received_hi),
-                                                8, 1, "rx_ucast_packets" },
+                                8, STATS_FLAGS_FUNC, "rx_ucast_packets" },
         { STATS_OFFSET32(total_multicast_packets_received_hi),
-                                                8, 1, "rx_mcast_packets" },
+                                8, STATS_FLAGS_FUNC, "rx_mcast_packets" },
         { STATS_OFFSET32(total_broadcast_packets_received_hi),
-                                                8, 1, "rx_bcast_packets" },
+                                8, STATS_FLAGS_FUNC, "rx_bcast_packets" },
         { STATS_OFFSET32(total_unicast_packets_transmitted_hi),
-                                                8, 1, "tx_packets" },
+                                8, STATS_FLAGS_FUNC, "tx_packets" },
         { STATS_OFFSET32(tx_stat_dot3statsinternalmactransmiterrors_hi),
-                                                8, 0, "tx_mac_errors" },
+                                8, STATS_FLAGS_PORT, "tx_mac_errors" },
 /* 10 */{ STATS_OFFSET32(rx_stat_dot3statscarriersenseerrors_hi),
-                                                8, 0, "tx_carrier_errors" },
+                                8, STATS_FLAGS_PORT, "tx_carrier_errors" },
         { STATS_OFFSET32(rx_stat_dot3statsfcserrors_hi),
-                                                8, 0, "rx_crc_errors" },
+                                8, STATS_FLAGS_PORT, "rx_crc_errors" },
         { STATS_OFFSET32(rx_stat_dot3statsalignmenterrors_hi),
-                                                8, 0, "rx_align_errors" },
+                                8, STATS_FLAGS_PORT, "rx_align_errors" },
         { STATS_OFFSET32(tx_stat_dot3statssinglecollisionframes_hi),
-                                                8, 0, "tx_single_collisions" },
+                                8, STATS_FLAGS_PORT, "tx_single_collisions" },
         { STATS_OFFSET32(tx_stat_dot3statsmultiplecollisionframes_hi),
-                                                8, 0, "tx_multi_collisions" },
+                                8, STATS_FLAGS_PORT, "tx_multi_collisions" },
         { STATS_OFFSET32(tx_stat_dot3statsdeferredtransmissions_hi),
-                                                8, 0, "tx_deferred" },
+                                8, STATS_FLAGS_PORT, "tx_deferred" },
         { STATS_OFFSET32(tx_stat_dot3statsexcessivecollisions_hi),
-                                                8, 0, "tx_excess_collisions" },
+                                8, STATS_FLAGS_PORT, "tx_excess_collisions" },
         { STATS_OFFSET32(tx_stat_dot3statslatecollisions_hi),
-                                                8, 0, "tx_late_collisions" },
+                                8, STATS_FLAGS_PORT, "tx_late_collisions" },
         { STATS_OFFSET32(tx_stat_etherstatscollisions_hi),
-                                                8, 0, "tx_total_collisions" },
+                                8, STATS_FLAGS_PORT, "tx_total_collisions" },
         { STATS_OFFSET32(rx_stat_etherstatsfragments_hi),
-                                                8, 0, "rx_fragments" },
-/* 20 */{ STATS_OFFSET32(rx_stat_etherstatsjabbers_hi), 8, 0, "rx_jabbers" },
+                                8, STATS_FLAGS_PORT, "rx_fragments" },
+/* 20 */{ STATS_OFFSET32(rx_stat_etherstatsjabbers_hi),
+                                8, STATS_FLAGS_PORT, "rx_jabbers" },
         { STATS_OFFSET32(rx_stat_etherstatsundersizepkts_hi),
-                                                8, 0, "rx_undersize_packets" },
+                                8, STATS_FLAGS_PORT, "rx_undersize_packets" },
         { STATS_OFFSET32(jabber_packets_received),
-                                                4, 1, "rx_oversize_packets" },
+                                4, STATS_FLAGS_FUNC, "rx_oversize_packets" },
         { STATS_OFFSET32(tx_stat_etherstatspkts64octets_hi),
-                                                8, 0, "tx_64_byte_packets" },
+                                8, STATS_FLAGS_PORT, "tx_64_byte_packets" },
         { STATS_OFFSET32(tx_stat_etherstatspkts65octetsto127octets_hi),
-                                        8, 0, "tx_65_to_127_byte_packets" },
+                        8, STATS_FLAGS_PORT, "tx_65_to_127_byte_packets" },
         { STATS_OFFSET32(tx_stat_etherstatspkts128octetsto255octets_hi),
-                                        8, 0, "tx_128_to_255_byte_packets" },
+                        8, STATS_FLAGS_PORT, "tx_128_to_255_byte_packets" },
         { STATS_OFFSET32(tx_stat_etherstatspkts256octetsto511octets_hi),
-                                        8, 0, "tx_256_to_511_byte_packets" },
+                        8, STATS_FLAGS_PORT, "tx_256_to_511_byte_packets" },
         { STATS_OFFSET32(tx_stat_etherstatspkts512octetsto1023octets_hi),
-                                        8, 0, "tx_512_to_1023_byte_packets" },
+                        8, STATS_FLAGS_PORT, "tx_512_to_1023_byte_packets" },
         { STATS_OFFSET32(etherstatspkts1024octetsto1522octets_hi),
-                                        8, 0, "tx_1024_to_1522_byte_packets" },
+                        8, STATS_FLAGS_PORT, "tx_1024_to_1522_byte_packets" },
         { STATS_OFFSET32(etherstatspktsover1522octets_hi),
-                                        8, 0, "tx_1523_to_9022_byte_packets" },
+                        8, STATS_FLAGS_PORT, "tx_1523_to_9022_byte_packets" },
 /* 30 */{ STATS_OFFSET32(rx_stat_xonpauseframesreceived_hi),
-                                                8, 0, "rx_xon_frames" },
+                                8, STATS_FLAGS_PORT, "rx_xon_frames" },
         { STATS_OFFSET32(rx_stat_xoffpauseframesreceived_hi),
-                                                8, 0, "rx_xoff_frames" },
-        { STATS_OFFSET32(tx_stat_outxonsent_hi),  8, 0, "tx_xon_frames" },
-        { STATS_OFFSET32(tx_stat_outxoffsent_hi), 8, 0, "tx_xoff_frames" },
+                                8, STATS_FLAGS_PORT, "rx_xoff_frames" },
+        { STATS_OFFSET32(tx_stat_outxonsent_hi),
+                                8, STATS_FLAGS_PORT, "tx_xon_frames" },
+        { STATS_OFFSET32(tx_stat_outxoffsent_hi),
+                                8, STATS_FLAGS_PORT, "tx_xoff_frames" },
         { STATS_OFFSET32(rx_stat_maccontrolframesreceived_hi),
-                                                8, 0, "rx_mac_ctrl_frames" },
-        { STATS_OFFSET32(mac_filter_discard),   4, 1, "rx_filtered_packets" },
-        { STATS_OFFSET32(no_buff_discard),      4, 1, "rx_discards" },
-        { STATS_OFFSET32(xxoverflow_discard),   4, 1, "rx_fw_discards" },
-        { STATS_OFFSET32(brb_drop_hi),          8, 1, "brb_discard" },
-/* 39 */{ STATS_OFFSET32(brb_truncate_discard), 8, 1, "brb_truncate" }
+                                8, STATS_FLAGS_PORT, "rx_mac_ctrl_frames" },
+        { STATS_OFFSET32(mac_filter_discard),
+                                4, STATS_FLAGS_PORT, "rx_filtered_packets" },
+        { STATS_OFFSET32(no_buff_discard),
+                                4, STATS_FLAGS_FUNC, "rx_discards" },
+        { STATS_OFFSET32(xxoverflow_discard),
+                                4, STATS_FLAGS_PORT, "rx_fw_discards" },
+        { STATS_OFFSET32(brb_drop_hi),
+                                8, STATS_FLAGS_PORT, "brb_discard" },
+        { STATS_OFFSET32(brb_truncate_hi),
+                                8, STATS_FLAGS_PORT, "brb_truncate" },
+/* 40 */{ STATS_OFFSET32(rx_err_discard_pkt),
+                                4, STATS_FLAGS_FUNC, "rx_phy_ip_err_discards"},
+        { STATS_OFFSET32(rx_skb_alloc_failed),
+                                4, STATS_FLAGS_FUNC, "rx_skb_alloc_discard" },
+/* 42 */{ STATS_OFFSET32(hw_csum_err),
+                                4, STATS_FLAGS_FUNC, "rx_csum_offload_errors" }
 };
 
+#define IS_NOT_E1HMF_STAT(bp, i) \
+                (IS_E1HMF(bp) && (bnx2x_stats_arr[i].flags & STATS_FLAGS_PORT))
+
 static void bnx2x_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
 {
         struct bnx2x *bp = netdev_priv(dev);
@@ -8905,7 +9063,7 @@ static void bnx2x_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
         switch (stringset) {
         case ETH_SS_STATS:
                 for (i = 0, j = 0; i < BNX2X_NUM_STATS; i++) {
-                        if (IS_E1HMF(bp) && (!bnx2x_stats_arr[i].flags))
+                        if (IS_NOT_E1HMF_STAT(bp, i))
                                 continue;
                         strcpy(buf + j*ETH_GSTRING_LEN,
                                bnx2x_stats_arr[i].string);
@@ -8925,7 +9083,7 @@ static int bnx2x_get_stats_count(struct net_device *dev)
         int i, num_stats = 0;
 
         for (i = 0; i < BNX2X_NUM_STATS; i++) {
-                if (IS_E1HMF(bp) && (!bnx2x_stats_arr[i].flags))
+                if (IS_NOT_E1HMF_STAT(bp, i))
                         continue;
                 num_stats++;
         }
@@ -8940,7 +9098,7 @@ static void bnx2x_get_ethtool_stats(struct net_device *dev,
         int i, j;
 
         for (i = 0, j = 0; i < BNX2X_NUM_STATS; i++) {
-                if (IS_E1HMF(bp) && (!bnx2x_stats_arr[i].flags))
+                if (IS_NOT_E1HMF_STAT(bp, i))
                         continue;
 
                 if (bnx2x_stats_arr[i].size == 0) {
@@ -9057,7 +9215,7 @@ static int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
                                        PCI_PM_CTRL_PME_STATUS));
 
                 if (pmcsr & PCI_PM_CTRL_STATE_MASK)
-                /* delay required during transition out of D3hot */
+                        /* delay required during transition out of D3hot */
                         msleep(20);
                 break;
 
@@ -9104,17 +9262,16 @@ static int bnx2x_poll(struct napi_struct *napi, int budget)
 
         bnx2x_update_fpsb_idx(fp);
 
-        if ((fp->tx_pkt_prod != le16_to_cpu(*fp->tx_cons_sb)) ||
-            (fp->tx_pkt_prod != fp->tx_pkt_cons))
+        if (BNX2X_HAS_TX_WORK(fp))
                 bnx2x_tx_int(fp, budget);
 
-        if (le16_to_cpu(*fp->rx_cons_sb) != fp->rx_comp_cons)
+        if (BNX2X_HAS_RX_WORK(fp))
                 work_done = bnx2x_rx_int(fp, budget);
 
-        rmb(); /* bnx2x_has_work() reads the status block */
+        rmb(); /* BNX2X_HAS_WORK() reads the status block */
 
         /* must not complete if we consumed full budget */
-        if ((work_done < budget) && !bnx2x_has_work(fp)) {
+        if ((work_done < budget) && !BNX2X_HAS_WORK(fp)) {
 
 #ifdef BNX2X_STOP_ON_ERROR
 poll_panic:
@@ -9131,7 +9288,7 @@ poll_panic:
 
 
 /* we split the first BD into headers and data BDs
- * to ease the pain of our fellow micocode engineers
+ * to ease the pain of our fellow microcode engineers
  * we use one mapping for both BDs
  * So far this has only been observed to happen
  * in Other Operating Systems(TM)
@@ -9238,7 +9395,7 @@ static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb,
                         /* Check if LSO packet needs to be copied:
                            3 = 1 (for headers BD) + 2 (for PBD and last BD) */
                         int wnd_size = MAX_FETCH_BD - 3;
-                        /* Number of widnows to check */
+                        /* Number of windows to check */
                         int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size;
                         int wnd_idx = 0;
                         int frag_idx = 0;
@@ -9340,7 +9497,7 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
            skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr,
            ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type);
 
-        /* First, check if we need to linearaize the skb
+        /* First, check if we need to linearize the skb
            (due to FW restrictions) */
         if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) {
                 /* Statistics of linearization */
@@ -9349,7 +9506,7 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
                         DP(NETIF_MSG_TX_QUEUED, "SKB linearization failed - "
                            "silently dropping this SKB\n");
                         dev_kfree_skb_any(skb);
-                        return 0;
+                        return NETDEV_TX_OK;
                 }
         }
 
@@ -9372,7 +9529,8 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
         tx_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
         tx_bd->general_data = (UNICAST_ADDRESS <<
                                ETH_TX_BD_ETH_ADDR_TYPE_SHIFT);
-        tx_bd->general_data |= 1; /* header nbd */
+        /* header nbd */
+        tx_bd->general_data |= (1 << ETH_TX_BD_HDR_NBDS_SHIFT);
 
         /* remember the first BD of the packet */
         tx_buf->first_bd = fp->tx_bd_prod;
@@ -9451,7 +9609,7 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
 
         tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
         tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
-        nbd = skb_shinfo(skb)->nr_frags + ((pbd == NULL)? 1 : 2);
+        nbd = skb_shinfo(skb)->nr_frags + ((pbd == NULL) ? 1 : 2);
         tx_bd->nbd = cpu_to_le16(nbd);
         tx_bd->nbytes = cpu_to_le16(skb_headlen(skb));
 
@@ -9721,9 +9879,9 @@ static int bnx2x_change_mac_addr(struct net_device *dev, void *p)
         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
         if (netif_running(dev)) {
                 if (CHIP_IS_E1(bp))
-                        bnx2x_set_mac_addr_e1(bp);
+                        bnx2x_set_mac_addr_e1(bp, 1);
                 else
-                        bnx2x_set_mac_addr_e1h(bp);
+                        bnx2x_set_mac_addr_e1h(bp, 1);
         }
 
         return 0;
@@ -9734,6 +9892,7 @@ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 {
         struct mii_ioctl_data *data = if_mii(ifr);
         struct bnx2x *bp = netdev_priv(dev);
+        int port = BP_PORT(bp);
         int err;
 
         switch (cmd) {
@@ -9749,7 +9908,7 @@ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
                         return -EAGAIN;
 
                 mutex_lock(&bp->port.phy_mutex);
-                err = bnx2x_cl45_read(bp, BP_PORT(bp), 0, bp->port.phy_addr,
+                err = bnx2x_cl45_read(bp, port, 0, bp->port.phy_addr,
                                       DEFAULT_PHY_DEV_ADDR,
                                       (data->reg_num & 0x1f), &mii_regval);
                 data->val_out = mii_regval;
@@ -9765,7 +9924,7 @@ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
                         return -EAGAIN;
 
                 mutex_lock(&bp->port.phy_mutex);
-                err = bnx2x_cl45_write(bp, BP_PORT(bp), 0, bp->port.phy_addr,
+                err = bnx2x_cl45_write(bp, port, 0, bp->port.phy_addr,
                                        DEFAULT_PHY_DEV_ADDR,
                                        (data->reg_num & 0x1f), data->val_in);
                 mutex_unlock(&bp->port.phy_mutex);
@@ -10141,7 +10300,7 @@ static int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state)
 
         netif_device_detach(dev);
 
-        bnx2x_nic_unload(bp, UNLOAD_NORMAL);
+        bnx2x_nic_unload(bp, UNLOAD_CLOSE);
 
         bnx2x_set_power_state(bp, pci_choose_state(pdev, state));
 
@@ -10174,7 +10333,7 @@ static int bnx2x_resume(struct pci_dev *pdev)
         bnx2x_set_power_state(bp, PCI_D0);
         netif_device_attach(dev);
 
-        rc = bnx2x_nic_load(bp, LOAD_NORMAL);
+        rc = bnx2x_nic_load(bp, LOAD_OPEN);
 
         rtnl_unlock();
 
diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h
index 15c9a9946724..a67b0c358ae4 100644
--- a/drivers/net/bnx2x_reg.h
+++ b/drivers/net/bnx2x_reg.h
@@ -6,7 +6,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation.
  *
- * The registers description starts with the regsister Access type followed
+ * The registers description starts with the register Access type followed
  * by size in bits. For example [RW 32]. The access types are:
  * R  - Read only
  * RC - Clear on read
@@ -49,7 +49,7 @@
 /* [RW 10] Write client 0: Assert pause threshold. */
 #define BRB1_REG_PAUSE_LOW_THRESHOLD_0                           0x60068
 #define BRB1_REG_PAUSE_LOW_THRESHOLD_1                           0x6006c
-/* [R 24] The number of full blocks occpied by port. */
+/* [R 24] The number of full blocks occupied by port. */
 #define BRB1_REG_PORT_NUM_OCC_BLOCKS_0                           0x60094
 /* [RW 1] Reset the design by software. */
 #define BRB1_REG_SOFT_RESET                                      0x600dc
@@ -740,6 +740,7 @@
 #define HC_REG_ATTN_MSG1_ADDR_L                                  0x108020
 #define HC_REG_ATTN_NUM_P0                                       0x108038
 #define HC_REG_ATTN_NUM_P1                                       0x10803c
+#define HC_REG_COMMAND_REG                                       0x108180
 #define HC_REG_CONFIG_0                                          0x108000
 #define HC_REG_CONFIG_1                                          0x108004
 #define HC_REG_FUNC_NUM_P0                                       0x1080ac
@@ -1372,6 +1373,23 @@
    be asserted). */
 #define MISC_REG_DRIVER_CONTROL_16                               0xa5f0
 #define MISC_REG_DRIVER_CONTROL_16_SIZE                          2
+/* [RW 32] The following driver registers(1...16) represent 16 drivers and
+   32 clients. Each client can be controlled by one driver only. One in each
+   bit represent that this driver control the appropriate client (Ex: bit 5
+   is set means this driver control client number 5). addr1 = set; addr0 =
+   clear; read from both addresses will give the same result = status. write
+   to address 1 will set a request to control all the clients that their
+   appropriate bit (in the write command) is set. if the client is free (the
+   appropriate bit in all the other drivers is clear) one will be written to
+   that driver register; if the client isn't free the bit will remain zero.
+   if the appropriate bit is set (the driver request to gain control on a
+   client it already controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW
+   interrupt will be asserted). write to address 0 will set a request to
+   free all the clients that their appropriate bit (in the write command) is
+   set. if the appropriate bit is clear (the driver request to free a client
+   it doesn't controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW interrupt will
+   be asserted). */
+#define MISC_REG_DRIVER_CONTROL_7                                0xa3c8
 /* [RW 1] e1hmf for WOL. If clr WOL signal o the PXP will be send on bit 0
    only. */
 #define MISC_REG_E1HMF_MODE                                      0xa5f8
@@ -1394,13 +1412,13 @@
 #define MISC_REG_GPIO                                            0xa490
 /* [R 28] this field hold the last information that caused reserved
    attention. bits [19:0] - address; [22:20] function; [23] reserved;
-   [27:24] the master thatcaused the attention - according to the following
+   [27:24] the master that caused the attention - according to the following
    encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 =
    dbu; 8 = dmae */
 #define MISC_REG_GRC_RSV_ATTN                                    0xa3c0
 /* [R 28] this field hold the last information that caused timeout
    attention. bits [19:0] - address; [22:20] function; [23] reserved;
-   [27:24] the master thatcaused the attention - according to the following
+   [27:24] the master that caused the attention - according to the following
    encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 =
    dbu; 8 = dmae */
 #define MISC_REG_GRC_TIMEOUT_ATTN                                0xa3c4
@@ -1677,6 +1695,7 @@
 /* [RW 8] init credit counter for port0 in LLH */
 #define NIG_REG_LLH0_XCM_INIT_CREDIT                             0x10554
 #define NIG_REG_LLH0_XCM_MASK                                    0x10130
+#define NIG_REG_LLH1_BRB1_DRV_MASK                               0x10248
 /* [RW 1] send to BRB1 if no match on any of RMP rules. */
 #define NIG_REG_LLH1_BRB1_NOT_MCP                                0x102dc
 /* [RW 2] Determine the classification participants. 0: no classification.1:
@@ -1727,6 +1746,9 @@
 /* [R 32] Rx statistics : In user packets discarded due to BRB backpressure
    for port0 */
 #define NIG_REG_STAT0_BRB_DISCARD                                0x105f0
+/* [R 32] Rx statistics : In user packets truncated due to BRB backpressure
+   for port0 */
+#define NIG_REG_STAT0_BRB_TRUNCATE                               0x105f8
 /* [WB_R 36] Tx statistics : Number of packets from emac0 or bmac0 that
    between 1024 and 1522 bytes for port0 */
 #define NIG_REG_STAT0_EGRESS_MAC_PKT0                            0x10750
@@ -2298,7 +2320,7 @@
 /* [RW 3] page size in L2P table for QM module; -4k; -8k; -16k; -32k; -64k;
    -128k */
 #define PXP2_REG_RQ_QM_P_SIZE                                    0x120050
-/* [RW 1] 1' indicates that the RBC has finished configurating the PSWRQ */
+/* [RW 1] 1' indicates that the RBC has finished configuring the PSWRQ */
 #define PXP2_REG_RQ_RBC_DONE                                     0x1201b0
 /* [RW 3] Max burst size filed for read requests port 0; 000 - 128B;
    001:256B; 010: 512B; 11:1K:100:2K; 01:4K */
@@ -2406,7 +2428,7 @@
 /* [RW 2] 0 - 128B;  - 256B;  - 512B;  - 1024B; when the payload in the
    buffer reaches this number has_payload will be asserted */
 #define PXP2_REG_WR_DMAE_MPS                                     0x1205ec
-/* [RW 10] if Number of entries in dmae fifo will be higer than this
+/* [RW 10] if Number of entries in dmae fifo will be higher than this
    threshold then has_payload indication will be asserted; the default value
    should be equal to &gt;  write MBS size! */
 #define PXP2_REG_WR_DMAE_TH                                      0x120368
@@ -2427,7 +2449,7 @@
 /* [RW 2] 0 - 128B;  - 256B;  - 512B;  - 1024B; when the payload in the
    buffer reaches this number has_payload will be asserted */
 #define PXP2_REG_WR_TSDM_MPS                                     0x1205d4
-/* [RW 10] if Number of entries in usdmdp fifo will be higer than this
+/* [RW 10] if Number of entries in usdmdp fifo will be higher than this
    threshold then has_payload indication will be asserted; the default value
    should be equal to &gt;  write MBS size! */
 #define PXP2_REG_WR_USDMDP_TH                                    0x120348
@@ -3294,12 +3316,12 @@
 #define XSEM_XSEM_INT_MASK_0_REG_ADDRESS_ERROR_SIZE              0
 #define CFC_DEBUG1_REG_WRITE_AC                                  (0x1<<4)
 #define CFC_DEBUG1_REG_WRITE_AC_SIZE                             4
-/* [R 1] debug only: This bit indicates wheter indicates that external
+/* [R 1] debug only: This bit indicates whether indicates that external
    buffer was wrapped (oldest data was thrown); Relevant only when
    ~dbg_registers_debug_target=2 (PCI) & ~dbg_registers_full_mode=1 (wrap); */
 #define DBG_REG_WRAP_ON_EXT_BUFFER                               0xc124
 #define DBG_REG_WRAP_ON_EXT_BUFFER_SIZE                          1
-/* [R 1] debug only: This bit indicates wheter the internal buffer was
+/* [R 1] debug only: This bit indicates whether the internal buffer was
    wrapped (oldest data was thrown) Relevant only when
    ~dbg_registers_debug_target=0 (internal buffer) */
 #define DBG_REG_WRAP_ON_INT_BUFFER                               0xc128
@@ -4944,6 +4966,7 @@
 #define EMAC_RX_MODE_PROMISCUOUS                                 (1L<<8)
 #define EMAC_RX_MTU_SIZE_JUMBO_ENA                               (1L<<31)
 #define EMAC_TX_MODE_EXT_PAUSE_EN                                (1L<<3)
+#define EMAC_TX_MODE_FLOW_EN                                     (1L<<4)
 #define MISC_REGISTERS_GPIO_0                                    0
 #define MISC_REGISTERS_GPIO_1                                    1
 #define MISC_REGISTERS_GPIO_2                                    2
@@ -4959,6 +4982,7 @@
 #define MISC_REGISTERS_GPIO_PORT_SHIFT                           4
 #define MISC_REGISTERS_GPIO_SET_POS                              8
 #define MISC_REGISTERS_RESET_REG_1_CLEAR                         0x588
+#define MISC_REGISTERS_RESET_REG_1_RST_NIG                       (0x1<<7)
 #define MISC_REGISTERS_RESET_REG_1_SET                           0x584
 #define MISC_REGISTERS_RESET_REG_2_CLEAR                         0x598
 #define MISC_REGISTERS_RESET_REG_2_RST_BMAC0                     (0x1<<0)
@@ -4993,7 +5017,9 @@
 #define HW_LOCK_MAX_RESOURCE_VALUE                               31
 #define HW_LOCK_RESOURCE_8072_MDIO                               0
 #define HW_LOCK_RESOURCE_GPIO                                    1
+#define HW_LOCK_RESOURCE_PORT0_ATT_MASK                          3
 #define HW_LOCK_RESOURCE_SPIO                                    2
+#define HW_LOCK_RESOURCE_UNDI                                    5
 #define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR                 (1<<18)
 #define AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT                 (1<<31)
 #define AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT                 (1<<9)
@@ -5144,59 +5170,73 @@
 #define GRCBASE_MISC_AEU        GRCBASE_MISC
 
 
-/*the offset of the configuration space in the pci core register*/
+/* offset of configuration space in the pci core register */
 #define PCICFG_OFFSET                                   0x2000
 #define PCICFG_VENDOR_ID_OFFSET                         0x00
 #define PCICFG_DEVICE_ID_OFFSET                         0x02
 #define PCICFG_COMMAND_OFFSET                           0x04
+#define PCICFG_COMMAND_IO_SPACE                 (1<<0)
+#define PCICFG_COMMAND_MEM_SPACE                (1<<1)
+#define PCICFG_COMMAND_BUS_MASTER               (1<<2)
+#define PCICFG_COMMAND_SPECIAL_CYCLES           (1<<3)
+#define PCICFG_COMMAND_MWI_CYCLES               (1<<4)
+#define PCICFG_COMMAND_VGA_SNOOP                (1<<5)
+#define PCICFG_COMMAND_PERR_ENA                 (1<<6)
+#define PCICFG_COMMAND_STEPPING                 (1<<7)
+#define PCICFG_COMMAND_SERR_ENA                 (1<<8)
+#define PCICFG_COMMAND_FAST_B2B                 (1<<9)
+#define PCICFG_COMMAND_INT_DISABLE              (1<<10)
+#define PCICFG_COMMAND_RESERVED                 (0x1f<<11)
 #define PCICFG_STATUS_OFFSET                            0x06
-#define PCICFG_REVESION_ID                                  0x08
+#define PCICFG_REVESION_ID                              0x08
 #define PCICFG_CACHE_LINE_SIZE                          0x0c
 #define PCICFG_LATENCY_TIMER                            0x0d
-#define PCICFG_BAR_1_LOW                                    0x10
-#define PCICFG_BAR_1_HIGH                                   0x14
-#define PCICFG_BAR_2_LOW                                    0x18
-#define PCICFG_BAR_2_HIGH                                   0x1c
-#define PCICFG_SUBSYSTEM_VENDOR_ID_OFFSET       0x2c
+#define PCICFG_BAR_1_LOW                                0x10
+#define PCICFG_BAR_1_HIGH                               0x14
+#define PCICFG_BAR_2_LOW                                0x18
+#define PCICFG_BAR_2_HIGH                               0x1c
+#define PCICFG_SUBSYSTEM_VENDOR_ID_OFFSET               0x2c
 #define PCICFG_SUBSYSTEM_ID_OFFSET                      0x2e
-#define PCICFG_INT_LINE                                     0x3c
-#define PCICFG_INT_PIN                                      0x3d
-#define PCICFG_PM_CSR_OFFSET                    0x4c
-#define PCICFG_GRC_ADDRESS                                  0x78
-#define PCICFG_GRC_DATA                                     0x80
+#define PCICFG_INT_LINE                                 0x3c
+#define PCICFG_INT_PIN                                  0x3d
+#define PCICFG_PM_CAPABILITY                            0x48
+#define PCICFG_PM_CAPABILITY_VERSION            (0x3<<16)
+#define PCICFG_PM_CAPABILITY_CLOCK              (1<<19)
+#define PCICFG_PM_CAPABILITY_RESERVED           (1<<20)
+#define PCICFG_PM_CAPABILITY_DSI                (1<<21)
+#define PCICFG_PM_CAPABILITY_AUX_CURRENT        (0x7<<22)
+#define PCICFG_PM_CAPABILITY_D1_SUPPORT         (1<<25)
+#define PCICFG_PM_CAPABILITY_D2_SUPPORT         (1<<26)
+#define PCICFG_PM_CAPABILITY_PME_IN_D0          (1<<27)
+#define PCICFG_PM_CAPABILITY_PME_IN_D1          (1<<28)
+#define PCICFG_PM_CAPABILITY_PME_IN_D2          (1<<29)
+#define PCICFG_PM_CAPABILITY_PME_IN_D3_HOT      (1<<30)
+#define PCICFG_PM_CAPABILITY_PME_IN_D3_COLD     (1<<31)
+#define PCICFG_PM_CSR_OFFSET                            0x4c
+#define PCICFG_PM_CSR_STATE                     (0x3<<0)
+#define PCICFG_PM_CSR_PME_ENABLE                (1<<8)
+#define PCICFG_PM_CSR_PME_STATUS                (1<<15)
+#define PCICFG_GRC_ADDRESS                              0x78
+#define PCICFG_GRC_DATA                                 0x80
 #define PCICFG_DEVICE_CONTROL                           0xb4
 #define PCICFG_LINK_CONTROL                             0xbc
 
-#define PCICFG_COMMAND_IO_SPACE                     (1<<0)
-#define PCICFG_COMMAND_MEM_SPACE                    (1<<1)
-#define PCICFG_COMMAND_BUS_MASTER                   (1<<2)
-#define PCICFG_COMMAND_SPECIAL_CYCLES               (1<<3)
-#define PCICFG_COMMAND_MWI_CYCLES                   (1<<4)
-#define PCICFG_COMMAND_VGA_SNOOP                    (1<<5)
-#define PCICFG_COMMAND_PERR_ENA                     (1<<6)
-#define PCICFG_COMMAND_STEPPING                     (1<<7)
-#define PCICFG_COMMAND_SERR_ENA                     (1<<8)
-#define PCICFG_COMMAND_FAST_B2B                     (1<<9)
-#define PCICFG_COMMAND_INT_DISABLE                  (1<<10)
-#define PCICFG_COMMAND_RESERVED                     (0x1f<<11)
-
-#define PCICFG_PM_CSR_STATE                         (0x3<<0)
-#define PCICFG_PM_CSR_PME_STATUS                    (1<<15)
 
 #define BAR_USTRORM_INTMEM                              0x400000
 #define BAR_CSTRORM_INTMEM                              0x410000
 #define BAR_XSTRORM_INTMEM                              0x420000
 #define BAR_TSTRORM_INTMEM                              0x430000
 
+/* for accessing the IGU in case of status block ACK */
 #define BAR_IGU_INTMEM                                  0x440000
 
 #define BAR_DOORBELL_OFFSET                             0x800000
 
 #define BAR_ME_REGISTER                                 0x450000
 
-
-#define GRC_CONFIG_2_SIZE_REG               0x408 /* config_2 offset */
-#define PCI_CONFIG_2_BAR1_SIZE                      (0xfL<<0)
+/* config_2 offset */
+#define GRC_CONFIG_2_SIZE_REG                           0x408
+#define PCI_CONFIG_2_BAR1_SIZE                  (0xfL<<0)
 #define PCI_CONFIG_2_BAR1_SIZE_DISABLED         (0L<<0)
 #define PCI_CONFIG_2_BAR1_SIZE_64K              (1L<<0)
 #define PCI_CONFIG_2_BAR1_SIZE_128K             (2L<<0)
@@ -5213,11 +5253,11 @@
 #define PCI_CONFIG_2_BAR1_SIZE_256M             (13L<<0)
 #define PCI_CONFIG_2_BAR1_SIZE_512M             (14L<<0)
 #define PCI_CONFIG_2_BAR1_SIZE_1G               (15L<<0)
-#define PCI_CONFIG_2_BAR1_64ENA                     (1L<<4)
-#define PCI_CONFIG_2_EXP_ROM_RETRY                  (1L<<5)
-#define PCI_CONFIG_2_CFG_CYCLE_RETRY                (1L<<6)
-#define PCI_CONFIG_2_FIRST_CFG_DONE                 (1L<<7)
-#define PCI_CONFIG_2_EXP_ROM_SIZE                   (0xffL<<8)
+#define PCI_CONFIG_2_BAR1_64ENA                 (1L<<4)
+#define PCI_CONFIG_2_EXP_ROM_RETRY              (1L<<5)
+#define PCI_CONFIG_2_CFG_CYCLE_RETRY            (1L<<6)
+#define PCI_CONFIG_2_FIRST_CFG_DONE             (1L<<7)
+#define PCI_CONFIG_2_EXP_ROM_SIZE               (0xffL<<8)
 #define PCI_CONFIG_2_EXP_ROM_SIZE_DISABLED      (0L<<8)
 #define PCI_CONFIG_2_EXP_ROM_SIZE_2K            (1L<<8)
 #define PCI_CONFIG_2_EXP_ROM_SIZE_4K            (2L<<8)
@@ -5234,46 +5274,44 @@
 #define PCI_CONFIG_2_EXP_ROM_SIZE_8M            (13L<<8)
 #define PCI_CONFIG_2_EXP_ROM_SIZE_16M           (14L<<8)
 #define PCI_CONFIG_2_EXP_ROM_SIZE_32M           (15L<<8)
-#define PCI_CONFIG_2_BAR_PREFETCH                   (1L<<16)
-#define PCI_CONFIG_2_RESERVED0                      (0x7fffL<<17)
+#define PCI_CONFIG_2_BAR_PREFETCH               (1L<<16)
+#define PCI_CONFIG_2_RESERVED0                  (0x7fffL<<17)
 
 /* config_3 offset */
-#define GRC_CONFIG_3_SIZE_REG                           (0x40c)
-#define PCI_CONFIG_3_STICKY_BYTE                    (0xffL<<0)
-#define PCI_CONFIG_3_FORCE_PME                      (1L<<24)
-#define PCI_CONFIG_3_PME_STATUS                     (1L<<25)
-#define PCI_CONFIG_3_PME_ENABLE                     (1L<<26)
-#define PCI_CONFIG_3_PM_STATE                       (0x3L<<27)
-#define PCI_CONFIG_3_VAUX_PRESET                    (1L<<30)
-#define PCI_CONFIG_3_PCI_POWER                      (1L<<31)
-
-/* config_2 offset */
-#define GRC_CONFIG_2_SIZE_REG               0x408
+#define GRC_CONFIG_3_SIZE_REG                           0x40c
+#define PCI_CONFIG_3_STICKY_BYTE                (0xffL<<0)
+#define PCI_CONFIG_3_FORCE_PME                  (1L<<24)
+#define PCI_CONFIG_3_PME_STATUS                 (1L<<25)
+#define PCI_CONFIG_3_PME_ENABLE                 (1L<<26)
+#define PCI_CONFIG_3_PM_STATE                   (0x3L<<27)
+#define PCI_CONFIG_3_VAUX_PRESET                (1L<<30)
+#define PCI_CONFIG_3_PCI_POWER                  (1L<<31)
 
 #define GRC_BAR2_CONFIG                                 0x4e0
-#define PCI_CONFIG_2_BAR2_SIZE                      (0xfL<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_DISABLED             (0L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_64K                  (1L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_128K                 (2L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_256K                 (3L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_512K                 (4L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_1M                   (5L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_2M                   (6L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_4M                   (7L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_8M                   (8L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_16M                  (9L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_32M                  (10L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_64M                  (11L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_128M                 (12L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_256M                 (13L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_512M                 (14L<<0)
-#define PCI_CONFIG_2_BAR2_SIZE_1G                   (15L<<0)
-#define PCI_CONFIG_2_BAR2_64ENA                     (1L<<4)
+#define PCI_CONFIG_2_BAR2_SIZE                  (0xfL<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_DISABLED         (0L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_64K              (1L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_128K             (2L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_256K             (3L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_512K             (4L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_1M               (5L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_2M               (6L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_4M               (7L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_8M               (8L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_16M              (9L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_32M              (10L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_64M              (11L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_128M             (12L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_256M             (13L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_512M             (14L<<0)
+#define PCI_CONFIG_2_BAR2_SIZE_1G               (15L<<0)
+#define PCI_CONFIG_2_BAR2_64ENA                 (1L<<4)
+
+#define PCI_PM_DATA_A                                   0x410
+#define PCI_PM_DATA_B                                   0x414
+#define PCI_ID_VAL1                                     0x434
+#define PCI_ID_VAL2                                     0x438
 
-#define PCI_PM_DATA_A                                   (0x410)
-#define PCI_PM_DATA_B                                   (0x414)
-#define PCI_ID_VAL1                                     (0x434)
-#define PCI_ID_VAL2                                     (0x438)
 
 #define MDIO_REG_BANK_CL73_IEEEB0                       0x0
 #define MDIO_CL73_IEEEB0_CL73_AN_CONTROL                0x0
@@ -5522,6 +5560,8 @@ Theotherbitsarereservedandshouldbezero*/
 #define MDIO_PMA_REG_GEN_CTRL           0xca10
 #define MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP     0x0188
 #define MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET           0x018a
+#define MDIO_PMA_REG_M8051_MSGIN_REG    0xca12
+#define MDIO_PMA_REG_M8051_MSGOUT_REG   0xca13
 #define MDIO_PMA_REG_ROM_VER1           0xca19
 #define MDIO_PMA_REG_ROM_VER2           0xca1a
 #define MDIO_PMA_REG_EDC_FFE_MAIN       0xca1b
@@ -5576,7 +5616,8 @@ Theotherbitsarereservedandshouldbezero*/
 #define MDIO_AN_REG_LINK_STATUS         0x8304
 #define MDIO_AN_REG_CL37_CL73           0x8370
 #define MDIO_AN_REG_CL37_AN             0xffe0
-#define MDIO_AN_REG_CL37_FD             0xffe4
+#define MDIO_AN_REG_CL37_FC_LD          0xffe4
+#define MDIO_AN_REG_CL37_FC_LP          0xffe5
 
 
 #define IGU_FUNC_BASE                   0x0400
@@ -5600,4 +5641,13 @@ Theotherbitsarereservedandshouldbezero*/
 #define IGU_INT_NOP                             2
 #define IGU_INT_NOP2                    3
 
+#define COMMAND_REG_INT_ACK         0x0
+#define COMMAND_REG_PROD_UPD        0x4
+#define COMMAND_REG_ATTN_BITS_UPD   0x8
+#define COMMAND_REG_ATTN_BITS_SET   0xc
+#define COMMAND_REG_ATTN_BITS_CLR   0x10
+#define COMMAND_REG_COALESCE_NOW    0x14
+#define COMMAND_REG_SIMD_MASK       0x18
+#define COMMAND_REG_SIMD_NOMASK     0x1c
+
 
diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c
index ebb539e090c3..6106660a4a44 100644
--- a/drivers/net/bonding/bond_3ad.c
+++ b/drivers/net/bonding/bond_3ad.c
@@ -2107,6 +2107,7 @@ void bond_3ad_state_machine_handler(struct work_struct *work)
                         aggregator = __get_first_agg(port);
                         ad_agg_selection_logic(aggregator);
                 }
+                bond_3ad_set_carrier(bond);
         }
 
         // for each port run the state machines
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index a641eeaa2a2f..c792138511e6 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -2223,272 +2223,217 @@ static int bond_slave_info_query(struct net_device *bond_dev, struct ifslave *in
 
 /*-------------------------------- Monitoring -------------------------------*/
 
-/*
- * if !have_locks, return nonzero if a failover is necessary.  if
- * have_locks, do whatever failover activities are needed.
- *
- * This is to separate the inspection and failover steps for locking
- * purposes; failover requires rtnl, but acquiring it for every
- * inspection is undesirable, so a wrapper first does inspection, and
- * the acquires the necessary locks and calls again to perform
- * failover if needed.  Since all locks are dropped, a complete
- * restart is needed between calls.
- */
-static int __bond_mii_monitor(struct bonding *bond, int have_locks)
-{
-        struct slave *slave, *oldcurrent;
-        int do_failover = 0;
-        int i;
-
-        if (bond->slave_cnt == 0)
-                goto out;
 
-        /* we will try to read the link status of each of our slaves, and
-         * set their IFF_RUNNING flag appropriately. For each slave not
-         * supporting MII status, we won't do anything so that a user-space
-         * program could monitor the link itself if needed.
-         */
-
-        read_lock(&bond->curr_slave_lock);
-        oldcurrent = bond->curr_active_slave;
-        read_unlock(&bond->curr_slave_lock);
+static int bond_miimon_inspect(struct bonding *bond)
+{
+        struct slave *slave;
+        int i, link_state, commit = 0;
 
         bond_for_each_slave(bond, slave, i) {
-                struct net_device *slave_dev = slave->dev;
-                int link_state;
-                u16 old_speed = slave->speed;
-                u8 old_duplex = slave->duplex;
+                slave->new_link = BOND_LINK_NOCHANGE;
 
-                link_state = bond_check_dev_link(bond, slave_dev, 0);
+                link_state = bond_check_dev_link(bond, slave->dev, 0);
 
                 switch (slave->link) {
-                case BOND_LINK_UP:      /* the link was up */
-                        if (link_state == BMSR_LSTATUS) {
-                                if (!oldcurrent) {
-                                        if (!have_locks)
-                                                return 1;
-                                        do_failover = 1;
-                                }
-                                break;
-                        } else { /* link going down */
-                                slave->link  = BOND_LINK_FAIL;
-                                slave->delay = bond->params.downdelay;
-
-                                if (slave->link_failure_count < UINT_MAX) {
-                                        slave->link_failure_count++;
-                                }
+                case BOND_LINK_UP:
+                        if (link_state)
+                                continue;
 
-                                if (bond->params.downdelay) {
-                                        printk(KERN_INFO DRV_NAME
-                                               ": %s: link status down for %s "
-                                               "interface %s, disabling it in "
-                                               "%d ms.\n",
-                                               bond->dev->name,
-                                               IS_UP(slave_dev)
-                                               ? ((bond->params.mode == BOND_MODE_ACTIVEBACKUP)
-                                                  ? ((slave == oldcurrent)
-                                                     ? "active " : "backup ")
-                                                  : "")
-                                               : "idle ",
-                                               slave_dev->name,
-                                               bond->params.downdelay * bond->params.miimon);
-                                }
+                        slave->link = BOND_LINK_FAIL;
+                        slave->delay = bond->params.downdelay;
+                        if (slave->delay) {
+                                printk(KERN_INFO DRV_NAME
+                                       ": %s: link status down for %s"
+                                       "interface %s, disabling it in %d ms.\n",
+                                       bond->dev->name,
+                                       (bond->params.mode ==
+                                        BOND_MODE_ACTIVEBACKUP) ?
+                                       ((slave->state == BOND_STATE_ACTIVE) ?
+                                        "active " : "backup ") : "",
+                                       slave->dev->name,
+                                       bond->params.downdelay * bond->params.miimon);
                         }
-                        /* no break ! fall through the BOND_LINK_FAIL test to
-                           ensure proper action to be taken
-                        */
-                case BOND_LINK_FAIL:    /* the link has just gone down */
-                        if (link_state != BMSR_LSTATUS) {
-                                /* link stays down */
-                                if (slave->delay <= 0) {
-                                        if (!have_locks)
-                                                return 1;
-
-                                        /* link down for too long time */
-                                        slave->link = BOND_LINK_DOWN;
-
-                                        /* in active/backup mode, we must
-                                         * completely disable this interface
-                                         */
-                                        if ((bond->params.mode == BOND_MODE_ACTIVEBACKUP) ||
-                                            (bond->params.mode == BOND_MODE_8023AD)) {
-                                                bond_set_slave_inactive_flags(slave);
-                                        }
-
-                                        printk(KERN_INFO DRV_NAME
-                                               ": %s: link status definitely "
-                                               "down for interface %s, "
-                                               "disabling it\n",
-                                               bond->dev->name,
-                                               slave_dev->name);
-
-                                        /* notify ad that the link status has changed */
-                                        if (bond->params.mode == BOND_MODE_8023AD) {
-                                                bond_3ad_handle_link_change(slave, BOND_LINK_DOWN);
-                                        }
-
-                                        if ((bond->params.mode == BOND_MODE_TLB) ||
-                                            (bond->params.mode == BOND_MODE_ALB)) {
-                                                bond_alb_handle_link_change(bond, slave, BOND_LINK_DOWN);
-                                        }
-
-                                        if (slave == oldcurrent) {
-                                                do_failover = 1;
-                                        }
-                                } else {
-                                        slave->delay--;
-                                }
-                        } else {
-                                /* link up again */
-                                slave->link  = BOND_LINK_UP;
+                        /*FALLTHRU*/
+                case BOND_LINK_FAIL:
+                        if (link_state) {
+                                /*
+                                 * recovered before downdelay expired
+                                 */
+                                slave->link = BOND_LINK_UP;
                                 slave->jiffies = jiffies;
                                 printk(KERN_INFO DRV_NAME
                                        ": %s: link status up again after %d "
                                        "ms for interface %s.\n",
                                        bond->dev->name,
-                                       (bond->params.downdelay - slave->delay) * bond->params.miimon,
-                                       slave_dev->name);
+                                       (bond->params.downdelay - slave->delay) *
+                                       bond->params.miimon,
+                                       slave->dev->name);
+                                continue;
                         }
-                        break;
-                case BOND_LINK_DOWN:    /* the link was down */
-                        if (link_state != BMSR_LSTATUS) {
-                                /* the link stays down, nothing more to do */
-                                break;
-                        } else {        /* link going up */
-                                slave->link  = BOND_LINK_BACK;
-                                slave->delay = bond->params.updelay;
 
-                                if (bond->params.updelay) {
-                                        /* if updelay == 0, no need to
-                                           advertise about a 0 ms delay */
-                                        printk(KERN_INFO DRV_NAME
-                                               ": %s: link status up for "
-                                               "interface %s, enabling it "
-                                               "in %d ms.\n",
-                                               bond->dev->name,
-                                               slave_dev->name,
-                                               bond->params.updelay * bond->params.miimon);
-                                }
+                        if (slave->delay <= 0) {
+                                slave->new_link = BOND_LINK_DOWN;
+                                commit++;
+                                continue;
                         }
-                        /* no break ! fall through the BOND_LINK_BACK state in
-                           case there's something to do.
-                        */
-                case BOND_LINK_BACK:    /* the link has just come back */
-                        if (link_state != BMSR_LSTATUS) {
-                                /* link down again */
-                                slave->link  = BOND_LINK_DOWN;
 
+                        slave->delay--;
+                        break;
+
+                case BOND_LINK_DOWN:
+                        if (!link_state)
+                                continue;
+
+                        slave->link = BOND_LINK_BACK;
+                        slave->delay = bond->params.updelay;
+
+                        if (slave->delay) {
+                                printk(KERN_INFO DRV_NAME
+                                       ": %s: link status up for "
+                                       "interface %s, enabling it in %d ms.\n",
+                                       bond->dev->name, slave->dev->name,
+                                       bond->params.updelay *
+                                       bond->params.miimon);
+                        }
+                        /*FALLTHRU*/
+                case BOND_LINK_BACK:
+                        if (!link_state) {
+                                slave->link = BOND_LINK_DOWN;
                                 printk(KERN_INFO DRV_NAME
                                        ": %s: link status down again after %d "
                                        "ms for interface %s.\n",
                                        bond->dev->name,
-                                       (bond->params.updelay - slave->delay) * bond->params.miimon,
-                                       slave_dev->name);
-                        } else {
-                                /* link stays up */
-                                if (slave->delay == 0) {
-                                        if (!have_locks)
-                                                return 1;
-
-                                        /* now the link has been up for long time enough */
-                                        slave->link = BOND_LINK_UP;
-                                        slave->jiffies = jiffies;
-
-                                        if (bond->params.mode == BOND_MODE_8023AD) {
-                                                /* prevent it from being the active one */
-                                                slave->state = BOND_STATE_BACKUP;
-                                        } else if (bond->params.mode != BOND_MODE_ACTIVEBACKUP) {
-                                                /* make it immediately active */
-                                                slave->state = BOND_STATE_ACTIVE;
-                                        } else if (slave != bond->primary_slave) {
-                                                /* prevent it from being the active one */
-                                                slave->state = BOND_STATE_BACKUP;
-                                        }
+                                       (bond->params.updelay - slave->delay) *
+                                       bond->params.miimon,
+                                       slave->dev->name);
 
-                                        printk(KERN_INFO DRV_NAME
-                                               ": %s: link status definitely "
-                                               "up for interface %s.\n",
-                                               bond->dev->name,
-                                               slave_dev->name);
-
-                                        /* notify ad that the link status has changed */
-                                        if (bond->params.mode == BOND_MODE_8023AD) {
-                                                bond_3ad_handle_link_change(slave, BOND_LINK_UP);
-                                        }
-
-                                        if ((bond->params.mode == BOND_MODE_TLB) ||
-                                            (bond->params.mode == BOND_MODE_ALB)) {
-                                                bond_alb_handle_link_change(bond, slave, BOND_LINK_UP);
-                                        }
-
-                                        if ((!oldcurrent) ||
-                                            (slave == bond->primary_slave)) {
-                                                do_failover = 1;
-                                        }
-                                } else {
-                                        slave->delay--;
-                                }
+                                continue;
                         }
+
+                        if (slave->delay <= 0) {
+                                slave->new_link = BOND_LINK_UP;
+                                commit++;
+                                continue;
+                        }
+
+                        slave->delay--;
                         break;
-                default:
-                        /* Should not happen */
-                        printk(KERN_ERR DRV_NAME
-                               ": %s: Error: %s Illegal value (link=%d)\n",
-                               bond->dev->name,
-                               slave->dev->name,
-                               slave->link);
-                        goto out;
-                } /* end of switch (slave->link) */
+                }
+        }
 
-                bond_update_speed_duplex(slave);
+        return commit;
+}
 
-                if (bond->params.mode == BOND_MODE_8023AD) {
-                        if (old_speed != slave->speed) {
-                                bond_3ad_adapter_speed_changed(slave);
-                        }
+static void bond_miimon_commit(struct bonding *bond)
+{
+        struct slave *slave;
+        int i;
+
+        bond_for_each_slave(bond, slave, i) {
+                switch (slave->new_link) {
+                case BOND_LINK_NOCHANGE:
+                        continue;
+
+                case BOND_LINK_UP:
+                        slave->link = BOND_LINK_UP;
+                        slave->jiffies = jiffies;
 
-                        if (old_duplex != slave->duplex) {
-                                bond_3ad_adapter_duplex_changed(slave);
+                        if (bond->params.mode == BOND_MODE_8023AD) {
+                                /* prevent it from being the active one */
+                                slave->state = BOND_STATE_BACKUP;
+                        } else if (bond->params.mode != BOND_MODE_ACTIVEBACKUP) {
+                                /* make it immediately active */
+                                slave->state = BOND_STATE_ACTIVE;
+                        } else if (slave != bond->primary_slave) {
+                                /* prevent it from being the active one */
+                                slave->state = BOND_STATE_BACKUP;
                         }
-                }
 
-        } /* end of for */
+                        printk(KERN_INFO DRV_NAME
+                               ": %s: link status definitely "
+                               "up for interface %s.\n",
+                               bond->dev->name, slave->dev->name);
 
-        if (do_failover) {
-                ASSERT_RTNL();
+                        /* notify ad that the link status has changed */
+                        if (bond->params.mode == BOND_MODE_8023AD)
+                                bond_3ad_handle_link_change(slave, BOND_LINK_UP);
 
-                write_lock_bh(&bond->curr_slave_lock);
+                        if ((bond->params.mode == BOND_MODE_TLB) ||
+                            (bond->params.mode == BOND_MODE_ALB))
+                                bond_alb_handle_link_change(bond, slave,
+                                                            BOND_LINK_UP);
 
-                bond_select_active_slave(bond);
+                        if (!bond->curr_active_slave ||
+                            (slave == bond->primary_slave))
+                                goto do_failover;
 
-                write_unlock_bh(&bond->curr_slave_lock);
+                        continue;
 
-        } else
-                bond_set_carrier(bond);
+                case BOND_LINK_DOWN:
+                        slave->link = BOND_LINK_DOWN;
 
-out:
-        return 0;
+                        if (bond->params.mode == BOND_MODE_ACTIVEBACKUP ||
+                            bond->params.mode == BOND_MODE_8023AD)
+                                bond_set_slave_inactive_flags(slave);
+
+                        printk(KERN_INFO DRV_NAME
+                               ": %s: link status definitely down for "
+                               "interface %s, disabling it\n",
+                               bond->dev->name, slave->dev->name);
+
+                        if (bond->params.mode == BOND_MODE_8023AD)
+                                bond_3ad_handle_link_change(slave,
+                                                            BOND_LINK_DOWN);
+
+                        if (bond->params.mode == BOND_MODE_TLB ||
+                            bond->params.mode == BOND_MODE_ALB)
+                                bond_alb_handle_link_change(bond, slave,
+                                                            BOND_LINK_DOWN);
+
+                        if (slave == bond->curr_active_slave)
+                                goto do_failover;
+
+                        continue;
+
+                default:
+                        printk(KERN_ERR DRV_NAME
+                               ": %s: invalid new link %d on slave %s\n",
+                               bond->dev->name, slave->new_link,
+                               slave->dev->name);
+                        slave->new_link = BOND_LINK_NOCHANGE;
+
+                        continue;
+                }
+
+do_failover:
+                ASSERT_RTNL();
+                write_lock_bh(&bond->curr_slave_lock);
+                bond_select_active_slave(bond);
+                write_unlock_bh(&bond->curr_slave_lock);
+        }
+
+        bond_set_carrier(bond);
 }
 
 /*
  * bond_mii_monitor
  *
  * Really a wrapper that splits the mii monitor into two phases: an
- * inspection, then (if inspection indicates something needs to be
- * done) an acquisition of appropriate locks followed by another pass
- * to implement whatever link state changes are indicated.
+ * inspection, then (if inspection indicates something needs to be done)
+ * an acquisition of appropriate locks followed by a commit phase to
+ * implement whatever link state changes are indicated.
  */
 void bond_mii_monitor(struct work_struct *work)
 {
         struct bonding *bond = container_of(work, struct bonding,
                                             mii_work.work);
-        unsigned long delay;
 
         read_lock(&bond->lock);
-        if (bond->kill_timers) {
-                read_unlock(&bond->lock);
-                return;
-        }
+        if (bond->kill_timers)
+                goto out;
+
+        if (bond->slave_cnt == 0)
+                goto re_arm;
 
         if (bond->send_grat_arp) {
                 read_lock(&bond->curr_slave_lock);
@@ -2496,19 +2441,24 @@ void bond_mii_monitor(struct work_struct *work)
                 read_unlock(&bond->curr_slave_lock);
         }
 
-        if (__bond_mii_monitor(bond, 0)) {
+        if (bond_miimon_inspect(bond)) {
                 read_unlock(&bond->lock);
                 rtnl_lock();
                 read_lock(&bond->lock);
-                __bond_mii_monitor(bond, 1);
+
+                bond_miimon_commit(bond);
+
                 read_unlock(&bond->lock);
                 rtnl_unlock();  /* might sleep, hold no other locks */
                 read_lock(&bond->lock);
         }
 
-        delay = msecs_to_jiffies(bond->params.miimon);
+re_arm:
+        if (bond->params.miimon)
+                queue_delayed_work(bond->wq, &bond->mii_work,
+                                   msecs_to_jiffies(bond->params.miimon));
+out:
         read_unlock(&bond->lock);
-        queue_delayed_work(bond->wq, &bond->mii_work, delay);
 }
 
 static __be32 bond_glean_dev_ip(struct net_device *dev)
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index 6caac0ffb2f2..3bdb47382521 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -350,9 +350,6 @@ static ssize_t bonding_store_slaves(struct device *d,
                 if (dev) {
                         printk(KERN_INFO DRV_NAME ": %s: Removing slave %s\n",
                                 bond->dev->name, dev->name);
-                        if (bond->setup_by_slave)
-                                res = bond_release_and_destroy(bond->dev, dev);
-                        else
                                 res = bond_release(bond->dev, dev);
                         if (res) {
                                 ret = res;
diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index a7800e559090..ec6b0af3d46b 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -26,7 +26,6 @@
 #include <linux/errno.h>
 #include <linux/types.h>
 #include <linux/delay.h>
-#include <linux/version.h>
 
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index fba87abe78ee..ea6144a9565e 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -189,7 +189,7 @@ static unsigned int netcard_portlist[] __used __initdata = {IXDP2X01_CS8900_VIRT
 static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0};
 #elif defined(CONFIG_ARCH_PNX010X)
 #include <asm/irq.h>
-#include <asm/arch/gpio.h>
+#include <mach/gpio.h>
 #define CIRRUS_DEFAULT_BASE     IO_ADDRESS(EXT_STATIC2_s0_BASE + 0x200000)      /* = Physical address 0x48200000 */
 #define CIRRUS_DEFAULT_IRQ      VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */
 static unsigned int netcard_portlist[] __used __initdata = {CIRRUS_DEFAULT_BASE, 0};
diff --git a/drivers/net/de620.c b/drivers/net/de620.c
index 3f5190c654cf..d454e143483e 100644
--- a/drivers/net/de620.c
+++ b/drivers/net/de620.c
@@ -488,13 +488,6 @@ static void de620_set_multicast_list(struct net_device *dev)
 {
         if (dev->mc_count || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
         { /* Enable promiscuous mode */
-                /*
-                 *      We must make the kernel realise we had to move
-                 *      into promisc mode or we start all out war on
-                 *      the cable. - AC
-                 */
-                dev->flags|=IFF_PROMISC;
-
                 de620_set_register(dev, W_TCR, (TCR_DEF & ~RXPBM) | RXALL);
         }
         else
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
index 0b0f1c407a7e..f42c23f42652 100644
--- a/drivers/net/dm9000.c
+++ b/drivers/net/dm9000.c
@@ -1374,6 +1374,11 @@ dm9000_probe(struct platform_device *pdev)
         for (i = 0; i < 6; i += 2)
                 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
 
+        if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
+                mac_src = "platform data";
+                memcpy(ndev->dev_addr, pdata->dev_addr, 6);
+        }
+
         if (!is_valid_ether_addr(ndev->dev_addr)) {
                 /* try reading from mac */
                 
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index f823b8ba5785..14b0e6cd3b8d 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -389,7 +389,7 @@
 
 /* Interrupt Cause Set */
 #define E1000_ICS_LSC       E1000_ICR_LSC       /* Link Status Change */
-#define E1000_ICS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
+#define E1000_ICS_RXSEQ     E1000_ICR_RXSEQ     /* Rx sequence error */
 #define E1000_ICS_RXDMT0    E1000_ICR_RXDMT0    /* Rx desc min. threshold */
 
 /* Transmit Descriptor Control */
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index 4a4f62e002b2..ac4e506b4f88 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -41,24 +41,25 @@
 
 struct e1000_info;
 
-#define ndev_printk(level, netdev, format, arg...) \
-        printk(level "%s: " format, (netdev)->name, ## arg)
+#define e_printk(level, adapter, format, arg...) \
+        printk(level "%s: %s: " format, pci_name(adapter->pdev), \
+               adapter->netdev->name, ## arg)
 
 #ifdef DEBUG
-#define ndev_dbg(netdev, format, arg...) \
-        ndev_printk(KERN_DEBUG , netdev, format, ## arg)
+#define e_dbg(format, arg...) \
+        e_printk(KERN_DEBUG , adapter, format, ## arg)
 #else
-#define ndev_dbg(netdev, format, arg...) do { (void)(netdev); } while (0)
+#define e_dbg(format, arg...) do { (void)(adapter); } while (0)
 #endif
 
-#define ndev_err(netdev, format, arg...) \
-        ndev_printk(KERN_ERR , netdev, format, ## arg)
-#define ndev_info(netdev, format, arg...) \
-        ndev_printk(KERN_INFO , netdev, format, ## arg)
-#define ndev_warn(netdev, format, arg...) \
-        ndev_printk(KERN_WARNING , netdev, format, ## arg)
-#define ndev_notice(netdev, format, arg...) \
-        ndev_printk(KERN_NOTICE , netdev, format, ## arg)
+#define e_err(format, arg...) \
+        e_printk(KERN_ERR, adapter, format, ## arg)
+#define e_info(format, arg...) \
+        e_printk(KERN_INFO, adapter, format, ## arg)
+#define e_warn(format, arg...) \
+        e_printk(KERN_WARNING, adapter, format, ## arg)
+#define e_notice(format, arg...) \
+        e_printk(KERN_NOTICE, adapter, format, ## arg)
 
 
 /* Tx/Rx descriptor defines */
@@ -283,10 +284,6 @@ struct e1000_adapter {
         unsigned long led_status;
 
         unsigned int flags;
-
-        /* for ioport free */
-        int bars;
-        int need_ioport;
 };
 
 struct e1000_info {
@@ -329,6 +326,7 @@ struct e1000_info {
 #define FLAG_RX_CSUM_ENABLED              (1 << 28)
 #define FLAG_TSO_FORCE                    (1 << 29)
 #define FLAG_RX_RESTART_NOW               (1 << 30)
+#define FLAG_MSI_TEST_FAILED              (1 << 31)
 
 #define E1000_RX_DESC_PS(R, i)      \
         (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c
index 9350564065e7..e21c9e0f3738 100644
--- a/drivers/net/e1000e/ethtool.c
+++ b/drivers/net/e1000e/ethtool.c
@@ -177,7 +177,7 @@ static u32 e1000_get_link(struct net_device *netdev)
         u32 status;
         
         status = er32(STATUS);
-        return (status & E1000_STATUS_LU);
+        return (status & E1000_STATUS_LU) ? 1 : 0;
 }
 
 static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
@@ -189,8 +189,7 @@ static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
         /* Fiber NICs only allow 1000 gbps Full duplex */
         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
-                ndev_err(adapter->netdev, "Unsupported Speed/Duplex "
-                         "configuration\n");
+                e_err("Unsupported Speed/Duplex configuration\n");
                 return -EINVAL;
         }
 
@@ -213,8 +212,7 @@ static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
                 break;
         case SPEED_1000 + DUPLEX_HALF: /* not supported */
         default:
-                ndev_err(adapter->netdev, "Unsupported Speed/Duplex "
-                         "configuration\n");
+                e_err("Unsupported Speed/Duplex configuration\n");
                 return -EINVAL;
         }
         return 0;
@@ -231,8 +229,8 @@ static int e1000_set_settings(struct net_device *netdev,
          * cannot be changed
          */
         if (e1000_check_reset_block(hw)) {
-                ndev_err(netdev, "Cannot change link "
-                         "characteristics when SoL/IDER is active.\n");
+                e_err("Cannot change link characteristics when SoL/IDER is "
+                      "active.\n");
                 return -EINVAL;
         }
 
@@ -380,8 +378,7 @@ static int e1000_set_tso(struct net_device *netdev, u32 data)
                 netdev->features &= ~NETIF_F_TSO6;
         }
 
-        ndev_info(netdev, "TSO is %s\n",
-                  data ? "Enabled" : "Disabled");
+        e_info("TSO is %s\n", data ? "Enabled" : "Disabled");
         adapter->flags |= FLAG_TSO_FORCE;
         return 0;
 }
@@ -722,10 +719,9 @@ static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
                                       (test[pat] & write));
                 val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
                 if (val != (test[pat] & write & mask)) {
-                        ndev_err(adapter->netdev, "pattern test reg %04X "
-                                 "failed: got 0x%08X expected 0x%08X\n",
-                                 reg + offset,
-                                 val, (test[pat] & write & mask));
+                        e_err("pattern test reg %04X failed: got 0x%08X "
+                              "expected 0x%08X\n", reg + offset, val,
+                              (test[pat] & write & mask));
                         *data = reg;
                         return 1;
                 }
@@ -740,9 +736,8 @@ static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
         __ew32(&adapter->hw, reg, write & mask);
         val = __er32(&adapter->hw, reg);
         if ((write & mask) != (val & mask)) {
-                ndev_err(adapter->netdev, "set/check reg %04X test failed: "
-                         "got 0x%08X expected 0x%08X\n", reg, (val & mask),
-                         (write & mask));
+                e_err("set/check reg %04X test failed: got 0x%08X "
+                      "expected 0x%08X\n", reg, (val & mask), (write & mask));
                 *data = reg;
                 return 1;
         }
@@ -766,7 +761,6 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
 {
         struct e1000_hw *hw = &adapter->hw;
         struct e1000_mac_info *mac = &adapter->hw.mac;
-        struct net_device *netdev = adapter->netdev;
         u32 value;
         u32 before;
         u32 after;
@@ -799,8 +793,8 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
         ew32(STATUS, toggle);
         after = er32(STATUS) & toggle;
         if (value != after) {
-                ndev_err(netdev, "failed STATUS register test got: "
-                         "0x%08X expected: 0x%08X\n", after, value);
+                e_err("failed STATUS register test got: 0x%08X expected: "
+                      "0x%08X\n", after, value);
                 *data = 1;
                 return 1;
         }
@@ -903,8 +897,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
                 *data = 1;
                 return -1;
         }
-        ndev_info(netdev, "testing %s interrupt\n",
-                  (shared_int ? "shared" : "unshared"));
+        e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
 
         /* Disable all the interrupts */
         ew32(IMC, 0xFFFFFFFF);
@@ -1526,8 +1519,7 @@ static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
          * sessions are active
          */
         if (e1000_check_reset_block(&adapter->hw)) {
-                ndev_err(adapter->netdev, "Cannot do PHY loopback test "
-                         "when SoL/IDER is active.\n");
+                e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
                 *data = 0;
                 goto out;
         }
@@ -1612,7 +1604,7 @@ static void e1000_diag_test(struct net_device *netdev,
                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
                 autoneg = adapter->hw.mac.autoneg;
 
-                ndev_info(netdev, "offline testing starting\n");
+                e_info("offline testing starting\n");
 
                 /*
                  * Link test performed before hardware reset so autoneg doesn't
@@ -1658,7 +1650,7 @@ static void e1000_diag_test(struct net_device *netdev,
                 if (if_running)
                         dev_open(netdev);
         } else {
-                ndev_info(netdev, "online testing starting\n");
+                e_info("online testing starting\n");
                 /* Online tests */
                 if (e1000_link_test(adapter, &data[4]))
                         eth_test->flags |= ETH_TEST_FL_FAILED;
@@ -1694,8 +1686,8 @@ static void e1000_get_wol(struct net_device *netdev,
                 wol->supported &= ~WAKE_UCAST;
 
                 if (adapter->wol & E1000_WUFC_EX)
-                        ndev_err(netdev, "Interface does not support "
-                                 "directed (unicast) frame wake-up packets\n");
+                        e_err("Interface does not support directed (unicast) "
+                              "frame wake-up packets\n");
         }
 
         if (adapter->wol & E1000_WUFC_EX)
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index d13677899767..d266510c8a94 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -484,8 +484,8 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
                  * packet, also make sure the frame isn't just CRC only */
                 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
                         /* All receives must fit into a single buffer */
-                        ndev_dbg(netdev, "%s: Receive packet consumed "
-                                 "multiple buffers\n", netdev->name);
+                        e_dbg("%s: Receive packet consumed multiple buffers\n",
+                              netdev->name);
                         /* recycle */
                         buffer_info->skb = skb;
                         goto next_desc;
@@ -510,9 +510,12 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
                             netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
                         if (new_skb) {
                                 skb_reserve(new_skb, NET_IP_ALIGN);
-                                memcpy(new_skb->data - NET_IP_ALIGN,
-                                       skb->data - NET_IP_ALIGN,
-                                       length + NET_IP_ALIGN);
+                                skb_copy_to_linear_data_offset(new_skb,
+                                                               -NET_IP_ALIGN,
+                                                               (skb->data -
+                                                                NET_IP_ALIGN),
+                                                               (length +
+                                                                NET_IP_ALIGN));
                                 /* save the skb in buffer_info as good */
                                 buffer_info->skb = skb;
                                 skb = new_skb;
@@ -576,28 +579,26 @@ static void e1000_print_tx_hang(struct e1000_adapter *adapter)
         unsigned int i = tx_ring->next_to_clean;
         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
-        struct net_device *netdev = adapter->netdev;
 
         /* detected Tx unit hang */
-        ndev_err(netdev,
-                 "Detected Tx Unit Hang:\n"
-                 "  TDH                  <%x>\n"
-                 "  TDT                  <%x>\n"
-                 "  next_to_use          <%x>\n"
-                 "  next_to_clean        <%x>\n"
-                 "buffer_info[next_to_clean]:\n"
-                 "  time_stamp           <%lx>\n"
-                 "  next_to_watch        <%x>\n"
-                 "  jiffies              <%lx>\n"
-                 "  next_to_watch.status <%x>\n",
-                 readl(adapter->hw.hw_addr + tx_ring->head),
-                 readl(adapter->hw.hw_addr + tx_ring->tail),
-                 tx_ring->next_to_use,
-                 tx_ring->next_to_clean,
-                 tx_ring->buffer_info[eop].time_stamp,
-                 eop,
-                 jiffies,
-                 eop_desc->upper.fields.status);
+        e_err("Detected Tx Unit Hang:\n"
+              "  TDH                  <%x>\n"
+              "  TDT                  <%x>\n"
+              "  next_to_use          <%x>\n"
+              "  next_to_clean        <%x>\n"
+              "buffer_info[next_to_clean]:\n"
+              "  time_stamp           <%lx>\n"
+              "  next_to_watch        <%x>\n"
+              "  jiffies              <%lx>\n"
+              "  next_to_watch.status <%x>\n",
+              readl(adapter->hw.hw_addr + tx_ring->head),
+              readl(adapter->hw.hw_addr + tx_ring->tail),
+              tx_ring->next_to_use,
+              tx_ring->next_to_clean,
+              tx_ring->buffer_info[eop].time_stamp,
+              eop,
+              jiffies,
+              eop_desc->upper.fields.status);
 }
 
 /**
@@ -747,8 +748,8 @@ static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
                 buffer_info->dma = 0;
 
                 if (!(staterr & E1000_RXD_STAT_EOP)) {
-                        ndev_dbg(netdev, "%s: Packet Split buffers didn't pick "
-                                 "up the full packet\n", netdev->name);
+                        e_dbg("%s: Packet Split buffers didn't pick up the "
+                              "full packet\n", netdev->name);
                         dev_kfree_skb_irq(skb);
                         goto next_desc;
                 }
@@ -761,8 +762,8 @@ static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
                 length = le16_to_cpu(rx_desc->wb.middle.length0);
 
                 if (!length) {
-                        ndev_dbg(netdev, "%s: Last part of the packet spanning"
-                                 " multiple descriptors\n", netdev->name);
+                        e_dbg("%s: Last part of the packet spanning multiple "
+                              "descriptors\n", netdev->name);
                         dev_kfree_skb_irq(skb);
                         goto next_desc;
                 }
@@ -1011,7 +1012,7 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
 
                 /* eth type trans needs skb->data to point to something */
                 if (!pskb_may_pull(skb, ETH_HLEN)) {
-                        ndev_err(netdev, "pskb_may_pull failed.\n");
+                        e_err("pskb_may_pull failed.\n");
                         dev_kfree_skb(skb);
                         goto next_desc;
                 }
@@ -1235,28 +1236,36 @@ static irqreturn_t e1000_intr(int irq, void *data)
         return IRQ_HANDLED;
 }
 
+/**
+ * e1000_request_irq - initialize interrupts
+ *
+ * Attempts to configure interrupts using the best available
+ * capabilities of the hardware and kernel.
+ **/
 static int e1000_request_irq(struct e1000_adapter *adapter)
 {
         struct net_device *netdev = adapter->netdev;
-        irq_handler_t handler = e1000_intr;
         int irq_flags = IRQF_SHARED;
         int err;
 
-        if (!pci_enable_msi(adapter->pdev)) {
-                adapter->flags |= FLAG_MSI_ENABLED;
-                handler = e1000_intr_msi;
-                irq_flags = 0;
+        if (!(adapter->flags & FLAG_MSI_TEST_FAILED)) {
+                err = pci_enable_msi(adapter->pdev);
+                if (!err) {
+                        adapter->flags |= FLAG_MSI_ENABLED;
+                        irq_flags = 0;
+                }
         }
 
-        err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
-                          netdev);
+        err = request_irq(adapter->pdev->irq,
+                          ((adapter->flags & FLAG_MSI_ENABLED) ?
+                                &e1000_intr_msi : &e1000_intr),
+                          irq_flags, netdev->name, netdev);
         if (err) {
-                ndev_err(netdev,
-                       "Unable to allocate %s interrupt (return: %d)\n",
-                        adapter->flags & FLAG_MSI_ENABLED ? "MSI":"INTx",
-                        err);
-                if (adapter->flags & FLAG_MSI_ENABLED)
+                if (adapter->flags & FLAG_MSI_ENABLED) {
                         pci_disable_msi(adapter->pdev);
+                        adapter->flags &= ~FLAG_MSI_ENABLED;
+                }
+                e_err("Unable to allocate interrupt, Error: %d\n", err);
         }
 
         return err;
@@ -1395,8 +1404,7 @@ int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
         return 0;
 err:
         vfree(tx_ring->buffer_info);
-        ndev_err(adapter->netdev,
-        "Unable to allocate memory for the transmit descriptor ring\n");
+        e_err("Unable to allocate memory for the transmit descriptor ring\n");
         return err;
 }
 
@@ -1450,8 +1458,7 @@ err_pages:
         }
 err:
         vfree(rx_ring->buffer_info);
-        ndev_err(adapter->netdev,
-        "Unable to allocate memory for the transmit descriptor ring\n");
+        e_err("Unable to allocate memory for the transmit descriptor ring\n");
         return err;
 }
 
@@ -2450,13 +2457,13 @@ void e1000e_reset(struct e1000_adapter *adapter)
          * For parts with AMT enabled, let the firmware know
          * that the network interface is in control
          */
-        if ((adapter->flags & FLAG_HAS_AMT) && e1000e_check_mng_mode(hw))
+        if (adapter->flags & FLAG_HAS_AMT)
                 e1000_get_hw_control(adapter);
 
         ew32(WUC, 0);
 
         if (mac->ops.init_hw(hw))
-                ndev_err(adapter->netdev, "Hardware Error\n");
+                e_err("Hardware Error\n");
 
         e1000_update_mng_vlan(adapter);
 
@@ -2591,13 +2598,142 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
         return 0;
 
 err:
-        ndev_err(netdev, "Unable to allocate memory for queues\n");
+        e_err("Unable to allocate memory for queues\n");
         kfree(adapter->rx_ring);
         kfree(adapter->tx_ring);
         return -ENOMEM;
 }
 
 /**
+ * e1000_intr_msi_test - Interrupt Handler
+ * @irq: interrupt number
+ * @data: pointer to a network interface device structure
+ **/
+static irqreturn_t e1000_intr_msi_test(int irq, void *data)
+{
+        struct net_device *netdev = data;
+        struct e1000_adapter *adapter = netdev_priv(netdev);
+        struct e1000_hw *hw = &adapter->hw;
+        u32 icr = er32(ICR);
+
+        e_dbg("%s: icr is %08X\n", netdev->name, icr);
+        if (icr & E1000_ICR_RXSEQ) {
+                adapter->flags &= ~FLAG_MSI_TEST_FAILED;
+                wmb();
+        }
+
+        return IRQ_HANDLED;
+}
+
+/**
+ * e1000_test_msi_interrupt - Returns 0 for successful test
+ * @adapter: board private struct
+ *
+ * code flow taken from tg3.c
+ **/
+static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+        struct e1000_hw *hw = &adapter->hw;
+        int err;
+
+        /* poll_enable hasn't been called yet, so don't need disable */
+        /* clear any pending events */
+        er32(ICR);
+
+        /* free the real vector and request a test handler */
+        e1000_free_irq(adapter);
+
+        /* Assume that the test fails, if it succeeds then the test
+         * MSI irq handler will unset this flag */
+        adapter->flags |= FLAG_MSI_TEST_FAILED;
+
+        err = pci_enable_msi(adapter->pdev);
+        if (err)
+                goto msi_test_failed;
+
+        err = request_irq(adapter->pdev->irq, &e1000_intr_msi_test, 0,
+                          netdev->name, netdev);
+        if (err) {
+                pci_disable_msi(adapter->pdev);
+                goto msi_test_failed;
+        }
+
+        wmb();
+
+        e1000_irq_enable(adapter);
+
+        /* fire an unusual interrupt on the test handler */
+        ew32(ICS, E1000_ICS_RXSEQ);
+        e1e_flush();
+        msleep(50);
+
+        e1000_irq_disable(adapter);
+
+        rmb();
+
+        if (adapter->flags & FLAG_MSI_TEST_FAILED) {
+                err = -EIO;
+                e_info("MSI interrupt test failed!\n");
+        }
+
+        free_irq(adapter->pdev->irq, netdev);
+        pci_disable_msi(adapter->pdev);
+
+        if (err == -EIO)
+                goto msi_test_failed;
+
+        /* okay so the test worked, restore settings */
+        e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
+msi_test_failed:
+        /* restore the original vector, even if it failed */
+        e1000_request_irq(adapter);
+        return err;
+}
+
+/**
+ * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
+ * @adapter: board private struct
+ *
+ * code flow taken from tg3.c, called with e1000 interrupts disabled.
+ **/
+static int e1000_test_msi(struct e1000_adapter *adapter)
+{
+        int err;
+        u16 pci_cmd;
+
+        if (!(adapter->flags & FLAG_MSI_ENABLED))
+                return 0;
+
+        /* disable SERR in case the MSI write causes a master abort */
+        pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
+        pci_write_config_word(adapter->pdev, PCI_COMMAND,
+                              pci_cmd & ~PCI_COMMAND_SERR);
+
+        err = e1000_test_msi_interrupt(adapter);
+
+        /* restore previous setting of command word */
+        pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
+
+        /* success ! */
+        if (!err)
+                return 0;
+
+        /* EIO means MSI test failed */
+        if (err != -EIO)
+                return err;
+
+        /* back to INTx mode */
+        e_warn("MSI interrupt test failed, using legacy interrupt.\n");
+
+        e1000_free_irq(adapter);
+
+        err = e1000_request_irq(adapter);
+
+        return err;
+}
+
+/**
  * e1000_open - Called when a network interface is made active
  * @netdev: network interface device structure
  *
@@ -2640,8 +2776,7 @@ static int e1000_open(struct net_device *netdev)
          * If AMT is enabled, let the firmware know that the network
          * interface is now open
          */
-        if ((adapter->flags & FLAG_HAS_AMT) &&
-            e1000e_check_mng_mode(&adapter->hw))
+        if (adapter->flags & FLAG_HAS_AMT)
                 e1000_get_hw_control(adapter);
 
         /*
@@ -2656,6 +2791,19 @@ static int e1000_open(struct net_device *netdev)
         if (err)
                 goto err_req_irq;
 
+        /*
+         * Work around PCIe errata with MSI interrupts causing some chipsets to
+         * ignore e1000e MSI messages, which means we need to test our MSI
+         * interrupt now
+         */
+        {
+                err = e1000_test_msi(adapter);
+                if (err) {
+                        e_err("Interrupt allocation failed\n");
+                        goto err_req_irq;
+                }
+        }
+
         /* From here on the code is the same as e1000e_up() */
         clear_bit(__E1000_DOWN, &adapter->state);
 
@@ -2719,8 +2867,7 @@ static int e1000_close(struct net_device *netdev)
          * If AMT is enabled, let the firmware know that the network
          * interface is now closed
          */
-        if ((adapter->flags & FLAG_HAS_AMT) &&
-            e1000e_check_mng_mode(&adapter->hw))
+        if (adapter->flags & FLAG_HAS_AMT)
                 e1000_release_hw_control(adapter);
 
         return 0;
@@ -2917,8 +3064,7 @@ static void e1000_phy_read_status(struct e1000_adapter *adapter)
                 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
                 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
                 if (ret_val)
-                        ndev_warn(adapter->netdev,
-                                  "Error reading PHY register\n");
+                        e_warn("Error reading PHY register\n");
         } else {
                 /*
                  * Do not read PHY registers if link is not up
@@ -2943,18 +3089,16 @@ static void e1000_phy_read_status(struct e1000_adapter *adapter)
 static void e1000_print_link_info(struct e1000_adapter *adapter)
 {
         struct e1000_hw *hw = &adapter->hw;
-        struct net_device *netdev = adapter->netdev;
         u32 ctrl = er32(CTRL);
 
-        ndev_info(netdev,
-                "Link is Up %d Mbps %s, Flow Control: %s\n",
-                adapter->link_speed,
-                (adapter->link_duplex == FULL_DUPLEX) ?
-                                "Full Duplex" : "Half Duplex",
-                ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
-                                "RX/TX" :
-                ((ctrl & E1000_CTRL_RFCE) ? "RX" :
-                ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
+        e_info("Link is Up %d Mbps %s, Flow Control: %s\n",
+               adapter->link_speed,
+               (adapter->link_duplex == FULL_DUPLEX) ?
+                                "Full Duplex" : "Half Duplex",
+               ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
+                                "RX/TX" :
+               ((ctrl & E1000_CTRL_RFCE) ? "RX" :
+               ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
 }
 
 static bool e1000_has_link(struct e1000_adapter *adapter)
@@ -2994,8 +3138,7 @@ static bool e1000_has_link(struct e1000_adapter *adapter)
         if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
-                ndev_info(adapter->netdev,
-                          "Gigabit has been disabled, downgrading speed\n");
+                e_info("Gigabit has been disabled, downgrading speed\n");
         }
 
         return link_active;
@@ -3067,7 +3210,7 @@ static void e1000_watchdog_task(struct work_struct *work)
                         case SPEED_10:
                                 txb2b = 0;
                                 netdev->tx_queue_len = 10;
-                                adapter->tx_timeout_factor = 14;
+                                adapter->tx_timeout_factor = 16;
                                 break;
                         case SPEED_100:
                                 txb2b = 0;
@@ -3096,8 +3239,7 @@ static void e1000_watchdog_task(struct work_struct *work)
                                 switch (adapter->link_speed) {
                                 case SPEED_10:
                                 case SPEED_100:
-                                        ndev_info(netdev,
-                                        "10/100 speed: disabling TSO\n");
+                                        e_info("10/100 speed: disabling TSO\n");
                                         netdev->features &= ~NETIF_F_TSO;
                                         netdev->features &= ~NETIF_F_TSO6;
                                         break;
@@ -3130,7 +3272,7 @@ static void e1000_watchdog_task(struct work_struct *work)
                 if (netif_carrier_ok(netdev)) {
                         adapter->link_speed = 0;
                         adapter->link_duplex = 0;
-                        ndev_info(netdev, "Link is Down\n");
+                        e_info("Link is Down\n");
                         netif_carrier_off(netdev);
                         netif_tx_stop_all_queues(netdev);
                         if (!test_bit(__E1000_DOWN, &adapter->state))
@@ -3604,8 +3746,7 @@ static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
 
                         pull_size = min((unsigned int)4, skb->data_len);
                         if (!__pskb_pull_tail(skb, pull_size)) {
-                                ndev_err(netdev,
-                                         "__pskb_pull_tail failed.\n");
+                                e_err("__pskb_pull_tail failed.\n");
                                 dev_kfree_skb_any(skb);
                                 return NETDEV_TX_OK;
                         }
@@ -3735,27 +3876,27 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
         struct e1000_adapter *adapter = netdev_priv(netdev);
         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
 
-        if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
+        if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
-                ndev_err(netdev, "Invalid MTU setting\n");
+                e_err("Invalid MTU setting\n");
                 return -EINVAL;
         }
 
         /* Jumbo frame size limits */
         if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
                 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
-                        ndev_err(netdev, "Jumbo Frames not supported.\n");
+                        e_err("Jumbo Frames not supported.\n");
                         return -EINVAL;
                 }
                 if (adapter->hw.phy.type == e1000_phy_ife) {
-                        ndev_err(netdev, "Jumbo Frames not supported.\n");
+                        e_err("Jumbo Frames not supported.\n");
                         return -EINVAL;
                 }
         }
 
 #define MAX_STD_JUMBO_FRAME_SIZE 9234
         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
-                ndev_err(netdev, "MTU > 9216 not supported.\n");
+                e_err("MTU > 9216 not supported.\n");
                 return -EINVAL;
         }
 
@@ -3792,8 +3933,7 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
                 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
                                          + ETH_FCS_LEN;
 
-        ndev_info(netdev, "changing MTU from %d to %d\n",
-                netdev->mtu, new_mtu);
+        e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
         netdev->mtu = new_mtu;
 
         if (netif_running(netdev))
@@ -4006,10 +4146,7 @@ static int e1000_resume(struct pci_dev *pdev)
         pci_restore_state(pdev);
         e1000e_disable_l1aspm(pdev);
 
-        if (adapter->need_ioport)
-                err = pci_enable_device(pdev);
-        else
-                err = pci_enable_device_mem(pdev);
+        err = pci_enable_device_mem(pdev);
         if (err) {
                 dev_err(&pdev->dev,
                         "Cannot enable PCI device from suspend\n");
@@ -4043,7 +4180,7 @@ static int e1000_resume(struct pci_dev *pdev)
          * is up.  For all other cases, let the f/w know that the h/w is now
          * under the control of the driver.
          */
-        if (!(adapter->flags & FLAG_HAS_AMT) || !e1000e_check_mng_mode(&adapter->hw))
+        if (!(adapter->flags & FLAG_HAS_AMT))
                 e1000_get_hw_control(adapter);
 
         return 0;
@@ -4111,10 +4248,7 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
         int err;
 
         e1000e_disable_l1aspm(pdev);
-        if (adapter->need_ioport)
-                err = pci_enable_device(pdev);
-        else
-                err = pci_enable_device_mem(pdev);
+        err = pci_enable_device_mem(pdev);
         if (err) {
                 dev_err(&pdev->dev,
                         "Cannot re-enable PCI device after reset.\n");
@@ -4162,8 +4296,7 @@ static void e1000_io_resume(struct pci_dev *pdev)
          * is up.  For all other cases, let the f/w know that the h/w is now
          * under the control of the driver.
          */
-        if (!(adapter->flags & FLAG_HAS_AMT) ||
-            !e1000e_check_mng_mode(&adapter->hw))
+        if (!(adapter->flags & FLAG_HAS_AMT))
                 e1000_get_hw_control(adapter);
 
 }
@@ -4175,36 +4308,40 @@ static void e1000_print_device_info(struct e1000_adapter *adapter)
         u32 pba_num;
 
         /* print bus type/speed/width info */
-        ndev_info(netdev, "(PCI Express:2.5GB/s:%s) "
-                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
-                  /* bus width */
-                 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
-                  "Width x1"),
-                  /* MAC address */
-                  netdev->dev_addr[0], netdev->dev_addr[1],
-                  netdev->dev_addr[2], netdev->dev_addr[3],
-                  netdev->dev_addr[4], netdev->dev_addr[5]);
-        ndev_info(netdev, "Intel(R) PRO/%s Network Connection\n",
-                  (hw->phy.type == e1000_phy_ife)
-                   ? "10/100" : "1000");
+        e_info("(PCI Express:2.5GB/s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
+               /* bus width */
+               ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
+                "Width x1"),
+               /* MAC address */
+               netdev->dev_addr[0], netdev->dev_addr[1],
+               netdev->dev_addr[2], netdev->dev_addr[3],
+               netdev->dev_addr[4], netdev->dev_addr[5]);
+        e_info("Intel(R) PRO/%s Network Connection\n",
+               (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
         e1000e_read_pba_num(hw, &pba_num);
-        ndev_info(netdev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
-                  hw->mac.type, hw->phy.type,
-                  (pba_num >> 8), (pba_num & 0xff));
+        e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
+               hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
 }
 
-/**
- * e1000e_is_need_ioport - determine if an adapter needs ioport resources or not
- * @pdev: PCI device information struct
- *
- * Returns true if an adapters needs ioport resources
- **/
-static int e1000e_is_need_ioport(struct pci_dev *pdev)
+static void e1000_eeprom_checks(struct e1000_adapter *adapter)
 {
-        switch (pdev->device) {
-        /* Currently there are no adapters that need ioport resources */
-        default:
-                return false;
+        struct e1000_hw *hw = &adapter->hw;
+        int ret_val;
+        u16 buf = 0;
+
+        if (hw->mac.type != e1000_82573)
+                return;
+
+        ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
+        if (!(le16_to_cpu(buf) & (1 << 0))) {
+                /* Deep Smart Power Down (DSPD) */
+                e_warn("Warning: detected DSPD enabled in EEPROM\n");
+        }
+
+        ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
+        if (le16_to_cpu(buf) & (3 << 2)) {
+                /* ASPM enable */
+                e_warn("Warning: detected ASPM enabled in EEPROM\n");
         }
 }
 
@@ -4233,19 +4370,10 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
         int i, err, pci_using_dac;
         u16 eeprom_data = 0;
         u16 eeprom_apme_mask = E1000_EEPROM_APME;
-        int bars, need_ioport;
 
         e1000e_disable_l1aspm(pdev);
 
-        /* do not allocate ioport bars when not needed */
-        need_ioport = e1000e_is_need_ioport(pdev);
-        if (need_ioport) {
-                bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
-                err = pci_enable_device(pdev);
-        } else {
-                bars = pci_select_bars(pdev, IORESOURCE_MEM);
-                err = pci_enable_device_mem(pdev);
-        }
+        err = pci_enable_device_mem(pdev);
         if (err)
                 return err;
 
@@ -4268,7 +4396,9 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
                 }
         }
 
-        err = pci_request_selected_regions(pdev, bars, e1000e_driver_name);
+        err = pci_request_selected_regions(pdev,
+                                          pci_select_bars(pdev, IORESOURCE_MEM),
+                                          e1000e_driver_name);
         if (err)
                 goto err_pci_reg;
 
@@ -4293,8 +4423,6 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
         adapter->hw.adapter = adapter;
         adapter->hw.mac.type = ei->mac;
         adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
-        adapter->bars = bars;
-        adapter->need_ioport = need_ioport;
 
         mmio_start = pci_resource_start(pdev, 0);
         mmio_len = pci_resource_len(pdev, 0);
@@ -4366,8 +4494,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
         }
 
         if (e1000_check_reset_block(&adapter->hw))
-                ndev_info(netdev,
-                          "PHY reset is blocked due to SOL/IDER session.\n");
+                e_info("PHY reset is blocked due to SOL/IDER session.\n");
 
         netdev->features = NETIF_F_SG |
                            NETIF_F_HW_CSUM |
@@ -4411,25 +4538,26 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
                         break;
                 if (i == 2) {
-                        ndev_err(netdev, "The NVM Checksum Is Not Valid\n");
+                        e_err("The NVM Checksum Is Not Valid\n");
                         err = -EIO;
                         goto err_eeprom;
                 }
         }
 
+        e1000_eeprom_checks(adapter);
+
         /* copy the MAC address out of the NVM */
         if (e1000e_read_mac_addr(&adapter->hw))
-                ndev_err(netdev, "NVM Read Error while reading MAC address\n");
+                e_err("NVM Read Error while reading MAC address\n");
 
         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
         memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
 
         if (!is_valid_ether_addr(netdev->perm_addr)) {
-                ndev_err(netdev, "Invalid MAC Address: "
-                         "%02x:%02x:%02x:%02x:%02x:%02x\n",
-                         netdev->perm_addr[0], netdev->perm_addr[1],
-                         netdev->perm_addr[2], netdev->perm_addr[3],
-                         netdev->perm_addr[4], netdev->perm_addr[5]);
+                e_err("Invalid MAC Address: %02x:%02x:%02x:%02x:%02x:%02x\n",
+                      netdev->perm_addr[0], netdev->perm_addr[1],
+                      netdev->perm_addr[2], netdev->perm_addr[3],
+                      netdev->perm_addr[4], netdev->perm_addr[5]);
                 err = -EIO;
                 goto err_eeprom;
         }
@@ -4499,8 +4627,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
          * is up.  For all other cases, let the f/w know that the h/w is now
          * under the control of the driver.
          */
-        if (!(adapter->flags & FLAG_HAS_AMT) ||
-            !e1000e_check_mng_mode(&adapter->hw))
+        if (!(adapter->flags & FLAG_HAS_AMT))
                 e1000_get_hw_control(adapter);
 
         /* tell the stack to leave us alone until e1000_open() is called */
@@ -4517,24 +4644,25 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
         return 0;
 
 err_register:
-err_hw_init:
-        e1000_release_hw_control(adapter);
+        if (!(adapter->flags & FLAG_HAS_AMT))
+                e1000_release_hw_control(adapter);
 err_eeprom:
         if (!e1000_check_reset_block(&adapter->hw))
                 e1000_phy_hw_reset(&adapter->hw);
+err_hw_init:
 
-        if (adapter->hw.flash_address)
-                iounmap(adapter->hw.flash_address);
-
-err_flashmap:
         kfree(adapter->tx_ring);
         kfree(adapter->rx_ring);
 err_sw_init:
+        if (adapter->hw.flash_address)
+                iounmap(adapter->hw.flash_address);
+err_flashmap:
         iounmap(adapter->hw.hw_addr);
 err_ioremap:
         free_netdev(netdev);
 err_alloc_etherdev:
-        pci_release_selected_regions(pdev, bars);
+        pci_release_selected_regions(pdev,
+                                     pci_select_bars(pdev, IORESOURCE_MEM));
 err_pci_reg:
 err_dma:
         pci_disable_device(pdev);
@@ -4582,7 +4710,8 @@ static void __devexit e1000_remove(struct pci_dev *pdev)
         iounmap(adapter->hw.hw_addr);
         if (adapter->hw.flash_address)
                 iounmap(adapter->hw.flash_address);
-        pci_release_selected_regions(pdev, adapter->bars);
+        pci_release_selected_regions(pdev,
+                                     pci_select_bars(pdev, IORESOURCE_MEM));
 
         free_netdev(netdev);
 
diff --git a/drivers/net/e1000e/param.c b/drivers/net/e1000e/param.c
index a66b92efcf80..ed912e023a72 100644
--- a/drivers/net/e1000e/param.c
+++ b/drivers/net/e1000e/param.c
@@ -27,6 +27,7 @@
 *******************************************************************************/
 
 #include <linux/netdevice.h>
+#include <linux/pci.h>
 
 #include "e1000.h"
 
@@ -162,17 +163,16 @@ static int __devinit e1000_validate_option(unsigned int *value,
         case enable_option:
                 switch (*value) {
                 case OPTION_ENABLED:
-                        ndev_info(adapter->netdev, "%s Enabled\n", opt->name);
+                        e_info("%s Enabled\n", opt->name);
                         return 0;
                 case OPTION_DISABLED:
-                        ndev_info(adapter->netdev, "%s Disabled\n", opt->name);
+                        e_info("%s Disabled\n", opt->name);
                         return 0;
                 }
                 break;
         case range_option:
                 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
-                        ndev_info(adapter->netdev,
-                                        "%s set to %i\n", opt->name, *value);
+                        e_info("%s set to %i\n", opt->name, *value);
                         return 0;
                 }
                 break;
@@ -184,8 +184,7 @@ static int __devinit e1000_validate_option(unsigned int *value,
                         ent = &opt->arg.l.p[i];
                         if (*value == ent->i) {
                                 if (ent->str[0] != '\0')
-                                        ndev_info(adapter->netdev, "%s\n",
-                                                  ent->str);
+                                        e_info("%s\n", ent->str);
                                 return 0;
                         }
                 }
@@ -195,8 +194,8 @@ static int __devinit e1000_validate_option(unsigned int *value,
                 BUG();
         }
 
-        ndev_info(adapter->netdev, "Invalid %s value specified (%i) %s\n",
-               opt->name, *value, opt->err);
+        e_info("Invalid %s value specified (%i) %s\n", opt->name, *value,
+               opt->err);
         *value = opt->def;
         return -1;
 }
@@ -213,13 +212,11 @@ static int __devinit e1000_validate_option(unsigned int *value,
 void __devinit e1000e_check_options(struct e1000_adapter *adapter)
 {
         struct e1000_hw *hw = &adapter->hw;
-        struct net_device *netdev = adapter->netdev;
         int bd = adapter->bd_number;
 
         if (bd >= E1000_MAX_NIC) {
-                ndev_notice(netdev,
-                       "Warning: no configuration for board #%i\n", bd);
-                ndev_notice(netdev, "Using defaults for all values\n");
+                e_notice("Warning: no configuration for board #%i\n", bd);
+                e_notice("Using defaults for all values\n");
         }
 
         { /* Transmit Interrupt Delay */
@@ -313,32 +310,41 @@ void __devinit e1000e_check_options(struct e1000_adapter *adapter)
                         adapter->itr = InterruptThrottleRate[bd];
                         switch (adapter->itr) {
                         case 0:
-                                ndev_info(netdev, "%s turned off\n",
-                                        opt.name);
+                                e_info("%s turned off\n", opt.name);
                                 break;
                         case 1:
-                                ndev_info(netdev,
-                                          "%s set to dynamic mode\n",
-                                          opt.name);
+                                e_info("%s set to dynamic mode\n", opt.name);
                                 adapter->itr_setting = adapter->itr;
                                 adapter->itr = 20000;
                                 break;
                         case 3:
-                                ndev_info(netdev,
-                                        "%s set to dynamic conservative mode\n",
+                                e_info("%s set to dynamic conservative mode\n",
                                         opt.name);
                                 adapter->itr_setting = adapter->itr;
                                 adapter->itr = 20000;
                                 break;
                         default:
-                                e1000_validate_option(&adapter->itr, &opt,
-                                        adapter);
                                 /*
-                                 * save the setting, because the dynamic bits
-                                 * change itr. clear the lower two bits
-                                 * because they are used as control
+                                 * Save the setting, because the dynamic bits
+                                 * change itr.
                                  */
-                                adapter->itr_setting = adapter->itr & ~3;
+                                if (e1000_validate_option(&adapter->itr, &opt,
+                                                          adapter) &&
+                                    (adapter->itr == 3)) {
+                                        /*
+                                         * In case of invalid user value,
+                                         * default to conservative mode.
+                                         */
+                                        adapter->itr_setting = adapter->itr;
+                                        adapter->itr = 20000;
+                                } else {
+                                        /*
+                                         * Clear the lower two bits because
+                                         * they are used as control.
+                                         */
+                                        adapter->itr_setting =
+                                                adapter->itr & ~3;
+                                }
                                 break;
                         }
                 } else {
diff --git a/drivers/net/eepro.c b/drivers/net/eepro.c
index 56f50491a453..1f11350e16cf 100644
--- a/drivers/net/eepro.c
+++ b/drivers/net/eepro.c
@@ -1283,14 +1283,6 @@ set_multicast_list(struct net_device *dev)
 
         if (dev->flags&(IFF_ALLMULTI|IFF_PROMISC) || dev->mc_count > 63)
         {
-                /*
-                 *      We must make the kernel realise we had to move
-                 *      into promisc mode or we start all out war on
-                 *      the cable. If it was a promisc request the
-                 *      flag is already set. If not we assert it.
-                 */
-                dev->flags|=IFF_PROMISC;
-
                 eepro_sw2bank2(ioaddr); /* be CAREFUL, BANK 2 now */
                 mode = inb(ioaddr + REG2);
                 outb(mode | PRMSC_Mode, ioaddr + REG2);
diff --git a/drivers/net/eth16i.c b/drivers/net/eth16i.c
index e3dd8b136908..bee8b3fbc565 100644
--- a/drivers/net/eth16i.c
+++ b/drivers/net/eth16i.c
@@ -1356,7 +1356,6 @@ static void eth16i_multicast(struct net_device *dev)
 
         if(dev->mc_count || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
         {
-                dev->flags|=IFF_PROMISC;        /* Must do this */
                 outb(3, ioaddr + RECEIVE_MODE_REG);
         } else {
                 outb(2, ioaddr + RECEIVE_MODE_REG);
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 01b38b092c76..053971e5fc94 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -77,26 +77,27 @@
  * Hardware access:
  */
 
-#define DEV_NEED_TIMERIRQ          0x00001  /* set the timer irq flag in the irq mask */
-#define DEV_NEED_LINKTIMER         0x00002  /* poll link settings. Relies on the timer irq */
-#define DEV_HAS_LARGEDESC          0x00004  /* device supports jumbo frames and needs packet format 2 */
-#define DEV_HAS_HIGH_DMA           0x00008  /* device supports 64bit dma */
-#define DEV_HAS_CHECKSUM           0x00010  /* device supports tx and rx checksum offloads */
-#define DEV_HAS_VLAN               0x00020  /* device supports vlan tagging and striping */
-#define DEV_HAS_MSI                0x00040  /* device supports MSI */
-#define DEV_HAS_MSI_X              0x00080  /* device supports MSI-X */
-#define DEV_HAS_POWER_CNTRL        0x00100  /* device supports power savings */
-#define DEV_HAS_STATISTICS_V1      0x00200  /* device supports hw statistics version 1 */
-#define DEV_HAS_STATISTICS_V2      0x00400  /* device supports hw statistics version 2 */
-#define DEV_HAS_TEST_EXTENDED      0x00800  /* device supports extended diagnostic test */
-#define DEV_HAS_MGMT_UNIT          0x01000  /* device supports management unit */
-#define DEV_HAS_CORRECT_MACADDR    0x02000  /* device supports correct mac address order */
-#define DEV_HAS_COLLISION_FIX      0x04000  /* device supports tx collision fix */
-#define DEV_HAS_PAUSEFRAME_TX_V1   0x08000  /* device supports tx pause frames version 1 */
-#define DEV_HAS_PAUSEFRAME_TX_V2   0x10000  /* device supports tx pause frames version 2 */
-#define DEV_HAS_PAUSEFRAME_TX_V3   0x20000  /* device supports tx pause frames version 3 */
-#define DEV_NEED_TX_LIMIT          0x40000  /* device needs to limit tx */
-#define DEV_HAS_GEAR_MODE          0x80000  /* device supports gear mode */
+#define DEV_NEED_TIMERIRQ          0x000001  /* set the timer irq flag in the irq mask */
+#define DEV_NEED_LINKTIMER         0x000002  /* poll link settings. Relies on the timer irq */
+#define DEV_HAS_LARGEDESC          0x000004  /* device supports jumbo frames and needs packet format 2 */
+#define DEV_HAS_HIGH_DMA           0x000008  /* device supports 64bit dma */
+#define DEV_HAS_CHECKSUM           0x000010  /* device supports tx and rx checksum offloads */
+#define DEV_HAS_VLAN               0x000020  /* device supports vlan tagging and striping */
+#define DEV_HAS_MSI                0x000040  /* device supports MSI */
+#define DEV_HAS_MSI_X              0x000080  /* device supports MSI-X */
+#define DEV_HAS_POWER_CNTRL        0x000100  /* device supports power savings */
+#define DEV_HAS_STATISTICS_V1      0x000200  /* device supports hw statistics version 1 */
+#define DEV_HAS_STATISTICS_V2      0x000400  /* device supports hw statistics version 2 */
+#define DEV_HAS_STATISTICS_V3      0x000800  /* device supports hw statistics version 3 */
+#define DEV_HAS_TEST_EXTENDED      0x001000  /* device supports extended diagnostic test */
+#define DEV_HAS_MGMT_UNIT          0x002000  /* device supports management unit */
+#define DEV_HAS_CORRECT_MACADDR    0x004000  /* device supports correct mac address order */
+#define DEV_HAS_COLLISION_FIX      0x008000  /* device supports tx collision fix */
+#define DEV_HAS_PAUSEFRAME_TX_V1   0x010000  /* device supports tx pause frames version 1 */
+#define DEV_HAS_PAUSEFRAME_TX_V2   0x020000  /* device supports tx pause frames version 2 */
+#define DEV_HAS_PAUSEFRAME_TX_V3   0x040000  /* device supports tx pause frames version 3 */
+#define DEV_NEED_TX_LIMIT          0x080000  /* device needs to limit tx */
+#define DEV_HAS_GEAR_MODE          0x100000  /* device supports gear mode */
 
 enum {
         NvRegIrqStatus = 0x000,
@@ -248,6 +249,8 @@ enum {
 #define NVREG_TX_PAUSEFRAME_ENABLE_V1   0x01800010
 #define NVREG_TX_PAUSEFRAME_ENABLE_V2   0x056003f0
 #define NVREG_TX_PAUSEFRAME_ENABLE_V3   0x09f00880
+        NvRegTxPauseFrameLimit = 0x174,
+#define NVREG_TX_PAUSEFRAMELIMIT_ENABLE 0x00010000
         NvRegMIIStatus = 0x180,
 #define NVREG_MIISTAT_ERROR             0x0001
 #define NVREG_MIISTAT_LINKCHANGE        0x0008
@@ -270,6 +273,9 @@ enum {
 #define NVREG_MIICTL_WRITE      0x00400
 #define NVREG_MIICTL_ADDRSHIFT  5
         NvRegMIIData = 0x194,
+        NvRegTxUnicast = 0x1a0,
+        NvRegTxMulticast = 0x1a4,
+        NvRegTxBroadcast = 0x1a8,
         NvRegWakeUpFlags = 0x200,
 #define NVREG_WAKEUPFLAGS_VAL           0x7770
 #define NVREG_WAKEUPFLAGS_BUSYSHIFT     24
@@ -402,6 +408,7 @@ union ring_type {
 #define NV_RX_FRAMINGERR        (1<<29)
 #define NV_RX_ERROR             (1<<30)
 #define NV_RX_AVAIL             (1<<31)
+#define NV_RX_ERROR_MASK        (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3|NV_RX_ERROR4|NV_RX_CRCERR|NV_RX_OVERFLOW|NV_RX_FRAMINGERR)
 
 #define NV_RX2_CHECKSUMMASK     (0x1C000000)
 #define NV_RX2_CHECKSUM_IP      (0x10000000)
@@ -419,6 +426,7 @@ union ring_type {
 /* error and avail are the same for both */
 #define NV_RX2_ERROR            (1<<30)
 #define NV_RX2_AVAIL            (1<<31)
+#define NV_RX2_ERROR_MASK       (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3|NV_RX2_ERROR4|NV_RX2_CRCERR|NV_RX2_OVERFLOW|NV_RX2_FRAMINGERR)
 
 #define NV_RX3_VLAN_TAG_PRESENT (1<<16)
 #define NV_RX3_VLAN_TAG_MASK    (0x0000FFFF)
@@ -616,7 +624,12 @@ static const struct nv_ethtool_str nv_estats_str[] = {
         { "rx_bytes" },
         { "tx_pause" },
         { "rx_pause" },
-        { "rx_drop_frame" }
+        { "rx_drop_frame" },
+
+        /* version 3 stats */
+        { "tx_unicast" },
+        { "tx_multicast" },
+        { "tx_broadcast" }
 };
 
 struct nv_ethtool_stats {
@@ -652,9 +665,15 @@ struct nv_ethtool_stats {
         u64 tx_pause;
         u64 rx_pause;
         u64 rx_drop_frame;
+
+        /* version 3 stats */
+        u64 tx_unicast;
+        u64 tx_multicast;
+        u64 tx_broadcast;
 };
 
-#define NV_DEV_STATISTICS_V2_COUNT (sizeof(struct nv_ethtool_stats)/sizeof(u64))
+#define NV_DEV_STATISTICS_V3_COUNT (sizeof(struct nv_ethtool_stats)/sizeof(u64))
+#define NV_DEV_STATISTICS_V2_COUNT (NV_DEV_STATISTICS_V3_COUNT - 3)
 #define NV_DEV_STATISTICS_V1_COUNT (NV_DEV_STATISTICS_V2_COUNT - 6)
 
 /* diagnostics */
@@ -1628,6 +1647,12 @@ static void nv_get_hw_stats(struct net_device *dev)
                 np->estats.rx_pause += readl(base + NvRegRxPause);
                 np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame);
         }
+
+        if (np->driver_data & DEV_HAS_STATISTICS_V3) {
+                np->estats.tx_unicast += readl(base + NvRegTxUnicast);
+                np->estats.tx_multicast += readl(base + NvRegTxMulticast);
+                np->estats.tx_broadcast += readl(base + NvRegTxBroadcast);
+        }
 }
 
 /*
@@ -1641,7 +1666,7 @@ static struct net_device_stats *nv_get_stats(struct net_device *dev)
         struct fe_priv *np = netdev_priv(dev);
 
         /* If the nic supports hw counters then retrieve latest values */
-        if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2)) {
+        if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3)) {
                 nv_get_hw_stats(dev);
 
                 /* copy to net_device stats */
@@ -2632,7 +2657,7 @@ static int nv_rx_process(struct net_device *dev, int limit)
                         if (likely(flags & NV_RX_DESCRIPTORVALID)) {
                                 len = flags & LEN_MASK_V1;
                                 if (unlikely(flags & NV_RX_ERROR)) {
-                                        if (flags & NV_RX_ERROR4) {
+                                        if ((flags & NV_RX_ERROR_MASK) == NV_RX_ERROR4) {
                                                 len = nv_getlen(dev, skb->data, len);
                                                 if (len < 0) {
                                                         dev->stats.rx_errors++;
@@ -2641,7 +2666,7 @@ static int nv_rx_process(struct net_device *dev, int limit)
                                                 }
                                         }
                                         /* framing errors are soft errors */
-                                        else if (flags & NV_RX_FRAMINGERR) {
+                                        else if ((flags & NV_RX_ERROR_MASK) == NV_RX_FRAMINGERR) {
                                                 if (flags & NV_RX_SUBSTRACT1) {
                                                         len--;
                                                 }
@@ -2667,7 +2692,7 @@ static int nv_rx_process(struct net_device *dev, int limit)
                         if (likely(flags & NV_RX2_DESCRIPTORVALID)) {
                                 len = flags & LEN_MASK_V2;
                                 if (unlikely(flags & NV_RX2_ERROR)) {
-                                        if (flags & NV_RX2_ERROR4) {
+                                        if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_ERROR4) {
                                                 len = nv_getlen(dev, skb->data, len);
                                                 if (len < 0) {
                                                         dev->stats.rx_errors++;
@@ -2676,7 +2701,7 @@ static int nv_rx_process(struct net_device *dev, int limit)
                                                 }
                                         }
                                         /* framing errors are soft errors */
-                                        else if (flags & NV_RX2_FRAMINGERR) {
+                                        else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) {
                                                 if (flags & NV_RX2_SUBSTRACT1) {
                                                         len--;
                                                 }
@@ -2766,7 +2791,7 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit)
                 if (likely(flags & NV_RX2_DESCRIPTORVALID)) {
                         len = flags & LEN_MASK_V2;
                         if (unlikely(flags & NV_RX2_ERROR)) {
-                                if (flags & NV_RX2_ERROR4) {
+                                if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_ERROR4) {
                                         len = nv_getlen(dev, skb->data, len);
                                         if (len < 0) {
                                                 dev_kfree_skb(skb);
@@ -2774,7 +2799,7 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit)
                                         }
                                 }
                                 /* framing errors are soft errors */
-                                else if (flags & NV_RX2_FRAMINGERR) {
+                                else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) {
                                         if (flags & NV_RX2_SUBSTRACT1) {
                                                 len--;
                                         }
@@ -3053,8 +3078,11 @@ static void nv_update_pause(struct net_device *dev, u32 pause_flags)
                         u32 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V1;
                         if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V2)
                                 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V2;
-                        if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V3)
+                        if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V3) {
                                 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V3;
+                                /* limit the number of tx pause frames to a default of 8 */
+                                writel(readl(base + NvRegTxPauseFrameLimit)|NVREG_TX_PAUSEFRAMELIMIT_ENABLE, base + NvRegTxPauseFrameLimit);
+                        }
                         writel(pause_enable,  base + NvRegTxPauseFrame);
                         writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1);
                         np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
@@ -4740,6 +4768,8 @@ static int nv_get_sset_count(struct net_device *dev, int sset)
                         return NV_DEV_STATISTICS_V1_COUNT;
                 else if (np->driver_data & DEV_HAS_STATISTICS_V2)
                         return NV_DEV_STATISTICS_V2_COUNT;
+                else if (np->driver_data & DEV_HAS_STATISTICS_V3)
+                        return NV_DEV_STATISTICS_V3_COUNT;
                 else
                         return 0;
         default:
@@ -5324,7 +5354,7 @@ static int nv_open(struct net_device *dev)
                 mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
 
         /* start statistics timer */
-        if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2))
+        if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3))
                 mod_timer(&np->stats_poll,
                         round_jiffies(jiffies + STATS_INTERVAL));
 
@@ -5428,7 +5458,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
         if (err < 0)
                 goto out_disable;
 
-        if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V2))
+        if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3))
                 np->register_size = NV_PCI_REGSZ_VER3;
         else if (id->driver_data & DEV_HAS_STATISTICS_V1)
                 np->register_size = NV_PCI_REGSZ_VER2;
@@ -6083,35 +6113,35 @@ static struct pci_device_id pci_tbl[] = {
         },
         {       /* MCP77 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_32),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
         },
         {       /* MCP77 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_33),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
         },
         {       /* MCP77 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_34),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
         },
         {       /* MCP77 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_35),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
         },
         {       /* MCP79 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_36),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
         },
         {       /* MCP79 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_37),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
         },
         {       /* MCP79 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_38),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
         },
         {       /* MCP79 Ethernet Controller */
                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_39),
-                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V3|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
         },
         {0,},
 };
diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_enet/mac-fcc.c
index 0a97fc2d97ec..1c7ef812a8e3 100644
--- a/drivers/net/fs_enet/mac-fcc.c
+++ b/drivers/net/fs_enet/mac-fcc.c
@@ -126,7 +126,7 @@ out:
 #define FCC_NAPI_RX_EVENT_MSK   (FCC_ENET_RXF | FCC_ENET_RXB)
 #define FCC_RX_EVENT            (FCC_ENET_RXF)
 #define FCC_TX_EVENT            (FCC_ENET_TXB)
-#define FCC_ERR_EVENT_MSK       (FCC_ENET_TXE | FCC_ENET_BSY)
+#define FCC_ERR_EVENT_MSK       (FCC_ENET_TXE)
 
 static int setup_data(struct net_device *dev)
 {
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index b8394cf134e8..999d69168277 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -134,9 +134,7 @@ static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int l
 static void gfar_vlan_rx_register(struct net_device *netdev,
                                 struct vlan_group *grp);
 void gfar_halt(struct net_device *dev);
-#ifdef CONFIG_PM
 static void gfar_halt_nodisable(struct net_device *dev);
-#endif
 void gfar_start(struct net_device *dev);
 static void gfar_clear_exact_match(struct net_device *dev);
 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr);
@@ -414,9 +412,7 @@ static int gfar_suspend(struct platform_device *pdev, pm_message_t state)
                 spin_unlock(&priv->rxlock);
                 spin_unlock_irqrestore(&priv->txlock, flags);
 
-#ifdef CONFIG_GFAR_NAPI
                 napi_disable(&priv->napi);
-#endif
 
                 if (magic_packet) {
                         /* Enable interrupt on Magic Packet */
@@ -469,9 +465,7 @@ static int gfar_resume(struct platform_device *pdev)
 
         netif_device_attach(dev);
 
-#ifdef CONFIG_GFAR_NAPI
         napi_enable(&priv->napi);
-#endif
 
         return 0;
 }
@@ -635,7 +629,6 @@ static void init_registers(struct net_device *dev)
 }
 
 
-#ifdef CONFIG_PM
 /* Halt the receive and transmit queues */
 static void gfar_halt_nodisable(struct net_device *dev)
 {
@@ -661,7 +654,6 @@ static void gfar_halt_nodisable(struct net_device *dev)
                         cpu_relax();
         }
 }
-#endif
 
 /* Halt the receive and transmit queues */
 void gfar_halt(struct net_device *dev)
@@ -670,6 +662,8 @@ void gfar_halt(struct net_device *dev)
         struct gfar __iomem *regs = priv->regs;
         u32 tempval;
 
+        gfar_halt_nodisable(dev);
+
         /* Disable Rx and Tx */
         tempval = gfar_read(&regs->maccfg1);
         tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
diff --git a/drivers/net/gianfar_sysfs.c b/drivers/net/gianfar_sysfs.c
index 5116f68e01b9..782c20170082 100644
--- a/drivers/net/gianfar_sysfs.c
+++ b/drivers/net/gianfar_sysfs.c
@@ -33,7 +33,6 @@
 
 #include <asm/uaccess.h>
 #include <linux/module.h>
-#include <linux/version.h>
 
 #include "gianfar.h"
 
diff --git a/drivers/net/hamradio/mkiss.c b/drivers/net/hamradio/mkiss.c
index 3249df5e0f17..b8e25c4624d2 100644
--- a/drivers/net/hamradio/mkiss.c
+++ b/drivers/net/hamradio/mkiss.c
@@ -548,7 +548,7 @@ static int ax_xmit(struct sk_buff *skb, struct net_device *dev)
                 }
 
                 printk(KERN_ERR "mkiss: %s: transmit timed out, %s?\n", dev->name,
-                       (ax->tty->ops->chars_in_buffer(ax->tty) || ax->xleft) ?
+                       (tty_chars_in_buffer(ax->tty) || ax->xleft) ?
                        "bad line quality" : "driver error");
 
                 ax->xleft = 0;
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c
index e098f234770f..bb823acc7443 100644
--- a/drivers/net/igb/e1000_82575.c
+++ b/drivers/net/igb/e1000_82575.c
@@ -850,7 +850,7 @@ void igb_update_mc_addr_list_82575(struct e1000_hw *hw,
         for (; mc_addr_count > 0; mc_addr_count--) {
                 hash_value = igb_hash_mc_addr(hw, mc_addr_list);
                 hw_dbg("Hash value = 0x%03X\n", hash_value);
-                hw->mac.ops.mta_set(hw, hash_value);
+                igb_mta_set(hw, hash_value);
                 mc_addr_list += ETH_ALEN;
         }
 }
@@ -1136,6 +1136,12 @@ static s32 igb_setup_fiber_serdes_link_82575(struct e1000_hw *hw)
                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
                 hw_dbg("Configuring Forced Link; PCS_LCTL = 0x%08X\n", reg);
         }
+
+        if (hw->mac.type == e1000_82576) {
+                reg |= E1000_PCS_LCTL_FORCE_FCTRL;
+                igb_force_mac_fc(hw);
+        }
+
         wr32(E1000_PCS_LCTL, reg);
 
         return 0;
@@ -1232,70 +1238,6 @@ out:
 }
 
 /**
- *  igb_translate_register_82576 - Translate the proper register offset
- *  @reg: e1000 register to be read
- *
- *  Registers in 82576 are located in different offsets than other adapters
- *  even though they function in the same manner.  This function takes in
- *  the name of the register to read and returns the correct offset for
- *  82576 silicon.
- **/
-u32 igb_translate_register_82576(u32 reg)
-{
-        /*
-         * Some of the Kawela registers are located at different
-         * offsets than they are in older adapters.
-         * Despite the difference in location, the registers
-         * function in the same manner.
-         */
-        switch (reg) {
-        case E1000_TDBAL(0):
-                reg = 0x0E000;
-                break;
-        case E1000_TDBAH(0):
-                reg = 0x0E004;
-                break;
-        case E1000_TDLEN(0):
-                reg = 0x0E008;
-                break;
-        case E1000_TDH(0):
-                reg = 0x0E010;
-                break;
-        case E1000_TDT(0):
-                reg = 0x0E018;
-                break;
-        case E1000_TXDCTL(0):
-                reg = 0x0E028;
-                break;
-        case E1000_RDBAL(0):
-                reg = 0x0C000;
-                break;
-        case E1000_RDBAH(0):
-                reg = 0x0C004;
-                break;
-        case E1000_RDLEN(0):
-                reg = 0x0C008;
-                break;
-        case E1000_RDH(0):
-                reg = 0x0C010;
-                break;
-        case E1000_RDT(0):
-                reg = 0x0C018;
-                break;
-        case E1000_RXDCTL(0):
-                reg = 0x0C028;
-                break;
-        case E1000_SRRCTL(0):
-                reg = 0x0C00C;
-                break;
-        default:
-                break;
-        }
-
-        return reg;
-}
-
-/**
  *  igb_reset_init_script_82575 - Inits HW defaults after reset
  *  @hw: pointer to the HW structure
  *
diff --git a/drivers/net/igb/e1000_82575.h b/drivers/net/igb/e1000_82575.h
index 2f848e578a24..c1928b5efe1f 100644
--- a/drivers/net/igb/e1000_82575.h
+++ b/drivers/net/igb/e1000_82575.h
@@ -28,7 +28,6 @@
 #ifndef _E1000_82575_H_
 #define _E1000_82575_H_
 
-u32 igb_translate_register_82576(u32 reg);
 void igb_update_mc_addr_list_82575(struct e1000_hw*, u8*, u32, u32, u32);
 extern void igb_shutdown_fiber_serdes_link_82575(struct e1000_hw *hw);
 extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw);
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h
index afdba3c9073c..ce700689fb57 100644
--- a/drivers/net/igb/e1000_defines.h
+++ b/drivers/net/igb/e1000_defines.h
@@ -257,6 +257,7 @@
 #define E1000_PCS_LCTL_FDV_FULL          8
 #define E1000_PCS_LCTL_FSD               0x10
 #define E1000_PCS_LCTL_FORCE_LINK        0x20
+#define E1000_PCS_LCTL_FORCE_FCTRL       0x80
 #define E1000_PCS_LCTL_AN_ENABLE         0x10000
 #define E1000_PCS_LCTL_AN_RESTART        0x20000
 #define E1000_PCS_LCTL_AN_TIMEOUT        0x40000
diff --git a/drivers/net/igb/e1000_hw.h b/drivers/net/igb/e1000_hw.h
index 19fa4ee96f2e..a65ccc3095c3 100644
--- a/drivers/net/igb/e1000_hw.h
+++ b/drivers/net/igb/e1000_hw.h
@@ -420,7 +420,6 @@ struct e1000_mac_operations {
         void (*rar_set)(struct e1000_hw *, u8 *, u32);
         s32  (*read_mac_addr)(struct e1000_hw *);
         s32  (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
-        void (*mta_set)(struct e1000_hw *, u32);
 };
 
 struct e1000_phy_operations {
diff --git a/drivers/net/igb/e1000_mac.c b/drivers/net/igb/e1000_mac.c
index 20408aa1f916..e18747c70bec 100644
--- a/drivers/net/igb/e1000_mac.c
+++ b/drivers/net/igb/e1000_mac.c
@@ -144,34 +144,6 @@ void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
 }
 
 /**
- *  igb_init_rx_addrs - Initialize receive address's
- *  @hw: pointer to the HW structure
- *  @rar_count: receive address registers
- *
- *  Setups the receive address registers by setting the base receive address
- *  register to the devices MAC address and clearing all the other receive
- *  address registers to 0.
- **/
-void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
-{
-        u32 i;
-
-        /* Setup the receive address */
-        hw_dbg("Programming MAC Address into RAR[0]\n");
-
-        hw->mac.ops.rar_set(hw, hw->mac.addr, 0);
-
-        /* Zero out the other (rar_entry_count - 1) receive addresses */
-        hw_dbg("Clearing RAR[1-%u]\n", rar_count-1);
-        for (i = 1; i < rar_count; i++) {
-                array_wr32(E1000_RA, (i << 1), 0);
-                wrfl();
-                array_wr32(E1000_RA, ((i << 1) + 1), 0);
-                wrfl();
-        }
-}
-
-/**
  *  igb_check_alt_mac_addr - Check for alternate MAC addr
  *  @hw: pointer to the HW structure
  *
@@ -271,7 +243,7 @@ void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
  *  current value is read, the new bit is OR'd in and the new value is
  *  written back into the register.
  **/
-static void igb_mta_set(struct e1000_hw *hw, u32 hash_value)
+void igb_mta_set(struct e1000_hw *hw, u32 hash_value)
 {
         u32 hash_bit, hash_reg, mta;
 
@@ -297,60 +269,6 @@ static void igb_mta_set(struct e1000_hw *hw, u32 hash_value)
 }
 
 /**
- *  igb_update_mc_addr_list - Update Multicast addresses
- *  @hw: pointer to the HW structure
- *  @mc_addr_list: array of multicast addresses to program
- *  @mc_addr_count: number of multicast addresses to program
- *  @rar_used_count: the first RAR register free to program
- *  @rar_count: total number of supported Receive Address Registers
- *
- *  Updates the Receive Address Registers and Multicast Table Array.
- *  The caller must have a packed mc_addr_list of multicast addresses.
- *  The parameter rar_count will usually be hw->mac.rar_entry_count
- *  unless there are workarounds that change this.
- **/
-void igb_update_mc_addr_list(struct e1000_hw *hw,
-                               u8 *mc_addr_list, u32 mc_addr_count,
-                               u32 rar_used_count, u32 rar_count)
-{
-        u32 hash_value;
-        u32 i;
-
-        /*
-         * Load the first set of multicast addresses into the exact
-         * filters (RAR).  If there are not enough to fill the RAR
-         * array, clear the filters.
-         */
-        for (i = rar_used_count; i < rar_count; i++) {
-                if (mc_addr_count) {
-                        hw->mac.ops.rar_set(hw, mc_addr_list, i);
-                        mc_addr_count--;
-                        mc_addr_list += ETH_ALEN;
-                } else {
-                        array_wr32(E1000_RA, i << 1, 0);
-                        wrfl();
-                        array_wr32(E1000_RA, (i << 1) + 1, 0);
-                        wrfl();
-                }
-        }
-
-        /* Clear the old settings from the MTA */
-        hw_dbg("Clearing MTA\n");
-        for (i = 0; i < hw->mac.mta_reg_count; i++) {
-                array_wr32(E1000_MTA, i, 0);
-                wrfl();
-        }
-
-        /* Load any remaining multicast addresses into the hash table. */
-        for (; mc_addr_count > 0; mc_addr_count--) {
-                hash_value = igb_hash_mc_addr(hw, mc_addr_list);
-                hw_dbg("Hash value = 0x%03X\n", hash_value);
-                igb_mta_set(hw, hash_value);
-                mc_addr_list += ETH_ALEN;
-        }
-}
-
-/**
  *  igb_hash_mc_addr - Generate a multicast hash value
  *  @hw: pointer to the HW structure
  *  @mc_addr: pointer to a multicast address
diff --git a/drivers/net/igb/e1000_mac.h b/drivers/net/igb/e1000_mac.h
index dc2f8cce15e7..cbee6af7d912 100644
--- a/drivers/net/igb/e1000_mac.h
+++ b/drivers/net/igb/e1000_mac.h
@@ -51,9 +51,6 @@ s32  igb_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed,
                                        u16 *duplex);
 s32  igb_id_led_init(struct e1000_hw *hw);
 s32  igb_led_off(struct e1000_hw *hw);
-void igb_update_mc_addr_list(struct e1000_hw *hw,
-                               u8 *mc_addr_list, u32 mc_addr_count,
-                               u32 rar_used_count, u32 rar_count);
 s32  igb_setup_link(struct e1000_hw *hw);
 s32  igb_validate_mdi_setting(struct e1000_hw *hw);
 s32  igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
@@ -62,7 +59,7 @@ s32  igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
 void igb_clear_hw_cntrs_base(struct e1000_hw *hw);
 void igb_clear_vfta(struct e1000_hw *hw);
 void igb_config_collision_dist(struct e1000_hw *hw);
-void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
+void igb_mta_set(struct e1000_hw *hw, u32 hash_value);
 void igb_put_hw_semaphore(struct e1000_hw *hw);
 void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
 s32  igb_check_alt_mac_addr(struct e1000_hw *hw);
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h
index b95093d24c09..95523af26056 100644
--- a/drivers/net/igb/e1000_regs.h
+++ b/drivers/net/igb/e1000_regs.h
@@ -262,9 +262,6 @@
 #define E1000_RETA(_i)  (0x05C00 + ((_i) * 4))
 #define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW Array */
 
-#define E1000_REGISTER(a, reg) (((a)->mac.type < e1000_82576) \
-                               ? reg : e1000_translate_register_82576(reg))
-
 #define wr32(reg, value) (writel(value, hw->hw_addr + reg))
 #define rd32(reg) (readl(hw->hw_addr + reg))
 #define wrfl() ((void)rd32(E1000_STATUS))
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index b602c4dd0d14..8f66e15ec8d6 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -311,7 +311,7 @@ static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
                 break;
         case e1000_82576:
-                /* Kawela uses a table-based method for assigning vectors.
+                /* The 82576 uses a table-based method for assigning vectors.
                    Each queue has a single entry in the table to which we write
                    a vector number along with a "valid" bit.  Sadly, the layout
                    of the table is somewhat counterintuitive. */
@@ -720,28 +720,6 @@ static void igb_get_hw_control(struct igb_adapter *adapter)
                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
 }
 
-static void igb_init_manageability(struct igb_adapter *adapter)
-{
-        struct e1000_hw *hw = &adapter->hw;
-
-        if (adapter->en_mng_pt) {
-                u32 manc2h = rd32(E1000_MANC2H);
-                u32 manc = rd32(E1000_MANC);
-
-                /* enable receiving management packets to the host */
-                /* this will probably generate destination unreachable messages
-                 * from the host OS, but the packets will be handled on SMBUS */
-                manc |= E1000_MANC_EN_MNG2HOST;
-#define E1000_MNG2HOST_PORT_623 (1 << 5)
-#define E1000_MNG2HOST_PORT_664 (1 << 6)
-                manc2h |= E1000_MNG2HOST_PORT_623;
-                manc2h |= E1000_MNG2HOST_PORT_664;
-                wr32(E1000_MANC2H, manc2h);
-
-                wr32(E1000_MANC, manc);
-        }
-}
-
 /**
  * igb_configure - configure the hardware for RX and TX
  * @adapter: private board structure
@@ -755,7 +733,6 @@ static void igb_configure(struct igb_adapter *adapter)
         igb_set_multi(netdev);
 
         igb_restore_vlan(adapter);
-        igb_init_manageability(adapter);
 
         igb_configure_tx(adapter);
         igb_setup_rctl(adapter);
@@ -1372,7 +1349,8 @@ static void __devexit igb_remove(struct pci_dev *pdev)
 
         unregister_netdev(netdev);
 
-        if (!igb_check_reset_block(&adapter->hw))
+        if (adapter->hw.phy.ops.reset_phy &&
+            !igb_check_reset_block(&adapter->hw))
                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
 
         igb_remove_device(&adapter->hw);
@@ -4523,8 +4501,6 @@ static void igb_io_resume(struct pci_dev *pdev)
         struct net_device *netdev = pci_get_drvdata(pdev);
         struct igb_adapter *adapter = netdev_priv(netdev);
 
-        igb_init_manageability(adapter);
-
         if (netif_running(netdev)) {
                 if (igb_up(adapter)) {
                         dev_err(&pdev->dev, "igb_up failed after reset\n");
diff --git a/drivers/net/ipg.h b/drivers/net/ipg.h
index e0e718ab4c2e..dd9318f19497 100644
--- a/drivers/net/ipg.h
+++ b/drivers/net/ipg.h
@@ -7,7 +7,6 @@
 #ifndef __LINUX_IPG_H
 #define __LINUX_IPG_H
 
-#include <linux/version.h>
 #include <linux/module.h>
 
 #include <linux/kernel.h>
@@ -21,7 +20,6 @@
 #include <linux/etherdevice.h>
 #include <linux/init.h>
 #include <linux/skbuff.h>
-#include <linux/version.h>
 #include <asm/bitops.h>
 
 /*
diff --git a/drivers/net/irda/ep7211-sir.c b/drivers/net/irda/ep7211-sir.c
index 831572429bb9..f83c5b881d2d 100644
--- a/drivers/net/irda/ep7211-sir.c
+++ b/drivers/net/irda/ep7211-sir.c
@@ -14,7 +14,7 @@
 #include <net/irda/irda_device.h>
 
 #include <asm/io.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include "sir-dev.h"
 
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c
index f76b0b6c277d..4aa61a1a3d55 100644
--- a/drivers/net/irda/pxaficp_ir.c
+++ b/drivers/net/irda/pxaficp_ir.c
@@ -23,8 +23,8 @@
 #include <net/irda/irda_device.h>
 
 #include <asm/dma.h>
-#include <asm/arch/irda.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/irda.h>
+#include <mach/pxa-regs.h>
 
 #define IrSR_RXPL_NEG_IS_ZERO (1<<4)
 #define IrSR_RXPL_POS_IS_ZERO 0x0
diff --git a/drivers/net/irda/sa1100_ir.c b/drivers/net/irda/sa1100_ir.c
index 1bc8518f9197..a95188948de7 100644
--- a/drivers/net/irda/sa1100_ir.c
+++ b/drivers/net/irda/sa1100_ir.c
@@ -37,7 +37,7 @@
 
 #include <asm/irq.h>
 #include <asm/dma.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach/irda.h>
 
 static int power_level = 3;
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index 2f38e847e2cd..f96358b641af 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -190,6 +190,7 @@ static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
         case IXGBE_DEV_ID_82598AF_DUAL_PORT:
         case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
         case IXGBE_DEV_ID_82598EB_CX4:
+        case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
                 media_type = ixgbe_media_type_fiber;
                 break;
         case IXGBE_DEV_ID_82598AT_DUAL_PORT:
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index e5f3da8468cc..34bca16d48a6 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -48,7 +48,7 @@ char ixgbe_driver_name[] = "ixgbe";
 static const char ixgbe_driver_string[] =
         "Intel(R) 10 Gigabit PCI Express Network Driver";
 
-#define DRV_VERSION "1.3.18-k2"
+#define DRV_VERSION "1.3.18-k4"
 const char ixgbe_driver_version[] = DRV_VERSION;
 static const char ixgbe_copyright[] =
          "Copyright (c) 1999-2007 Intel Corporation.";
@@ -72,6 +72,8 @@ static struct pci_device_id ixgbe_pci_tbl[] = {
          board_82598 },
         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
          board_82598 },
+        {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
+         board_82598 },
 
         /* required last entry */
         {0, }
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 1ad7cb9c25a8..c0282a223df3 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -39,6 +39,7 @@
 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
 #define IXGBE_DEV_ID_82598AT_DUAL_PORT   0x10C8
 #define IXGBE_DEV_ID_82598EB_CX4         0x10DD
+#define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC
 
 /* General Registers */
 #define IXGBE_CTRL      0x00000
diff --git a/drivers/net/ixp2000/ixp2400-msf.c b/drivers/net/ixp2000/ixp2400-msf.c
index 9ec38eebfb56..f5ffd7e05d26 100644
--- a/drivers/net/ixp2000/ixp2400-msf.c
+++ b/drivers/net/ixp2000/ixp2400-msf.c
@@ -13,8 +13,8 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <asm/hardware.h>
-#include <asm/arch/ixp2000-regs.h>
+#include <mach/hardware.h>
+#include <mach/ixp2000-regs.h>
 #include <asm/delay.h>
 #include <asm/io.h>
 #include "ixp2400-msf.h"
diff --git a/drivers/net/ixp2000/ixpdev.c b/drivers/net/ixp2000/ixpdev.c
index 7111c65f0b30..7b70c66504a0 100644
--- a/drivers/net/ixp2000/ixpdev.c
+++ b/drivers/net/ixp2000/ixpdev.c
@@ -16,7 +16,6 @@
 #include <linux/init.h>
 #include <linux/moduleparam.h>
 #include <asm/hardware/uengine.h>
-#include <asm/mach-types.h>
 #include <asm/io.h>
 #include "ixp2400_rx.ucode"
 #include "ixp2400_tx.ucode"
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index 49f6bc036a92..3b43bfd85a0f 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -64,68 +64,6 @@ struct pcpu_lstats {
         unsigned long bytes;
 };
 
-/* KISS: just allocate small chunks and copy bits.
- *
- * So, in fact, this is documentation, explaining what we expect
- * of largesending device modulo TCP checksum, which is ignored for loopback.
- */
-
-#ifdef LOOPBACK_TSO
-static void emulate_large_send_offload(struct sk_buff *skb)
-{
-        struct iphdr *iph = ip_hdr(skb);
-        struct tcphdr *th = (struct tcphdr *)(skb_network_header(skb) +
-                                              (iph->ihl * 4));
-        unsigned int doffset = (iph->ihl + th->doff) * 4;
-        unsigned int mtu = skb_shinfo(skb)->gso_size + doffset;
-        unsigned int offset = 0;
-        u32 seq = ntohl(th->seq);
-        u16 id  = ntohs(iph->id);
-
-        while (offset + doffset < skb->len) {
-                unsigned int frag_size = min(mtu, skb->len - offset) - doffset;
-                struct sk_buff *nskb = alloc_skb(mtu + 32, GFP_ATOMIC);
-
-                if (!nskb)
-                        break;
-                skb_reserve(nskb, 32);
-                skb_set_mac_header(nskb, -ETH_HLEN);
-                skb_reset_network_header(nskb);
-                iph = ip_hdr(nskb);
-                skb_copy_to_linear_data(nskb, skb_network_header(skb),
-                                        doffset);
-                if (skb_copy_bits(skb,
-                                  doffset + offset,
-                                  nskb->data + doffset,
-                                  frag_size))
-                        BUG();
-                skb_put(nskb, doffset + frag_size);
-                nskb->ip_summed = CHECKSUM_UNNECESSARY;
-                nskb->dev = skb->dev;
-                nskb->priority = skb->priority;
-                nskb->protocol = skb->protocol;
-                nskb->dst = dst_clone(skb->dst);
-                memcpy(nskb->cb, skb->cb, sizeof(skb->cb));
-                nskb->pkt_type = skb->pkt_type;
-
-                th = (struct tcphdr *)(skb_network_header(nskb) + iph->ihl * 4);
-                iph->tot_len = htons(frag_size + doffset);
-                iph->id = htons(id);
-                iph->check = 0;
-                iph->check = ip_fast_csum((unsigned char *) iph, iph->ihl);
-                th->seq = htonl(seq);
-                if (offset + doffset + frag_size < skb->len)
-                        th->fin = th->psh = 0;
-                netif_rx(nskb);
-                offset += frag_size;
-                seq += frag_size;
-                id++;
-        }
-
-        dev_kfree_skb(skb);
-}
-#endif /* LOOPBACK_TSO */
-
 /*
  * The higher levels take care of making this non-reentrant (it's
  * called with bh's disabled).
@@ -137,9 +75,6 @@ static int loopback_xmit(struct sk_buff *skb, struct net_device *dev)
         skb_orphan(skb);
 
         skb->protocol = eth_type_trans(skb,dev);
-#ifndef LOOPBACK_MUST_CHECKSUM
-        skb->ip_summed = CHECKSUM_UNNECESSARY;
-#endif
 
 #ifdef LOOPBACK_TSO
         if (skb_is_gso(skb)) {
@@ -234,9 +169,7 @@ static void loopback_setup(struct net_device *dev)
         dev->type               = ARPHRD_LOOPBACK;      /* 0x0001*/
         dev->flags              = IFF_LOOPBACK;
         dev->features           = NETIF_F_SG | NETIF_F_FRAGLIST
-#ifdef LOOPBACK_TSO
                 | NETIF_F_TSO
-#endif
                 | NETIF_F_NO_CSUM
                 | NETIF_F_HIGHDMA
                 | NETIF_F_LLTX
diff --git a/drivers/net/lp486e.c b/drivers/net/lp486e.c
index 591a7e4220c7..83fa9d82a004 100644
--- a/drivers/net/lp486e.c
+++ b/drivers/net/lp486e.c
@@ -1272,8 +1272,6 @@ static void set_multicast_list(struct net_device *dev) {
                         return;
                 }
                 if (dev->mc_count == 0 && !(dev->flags & (IFF_PROMISC | IFF_ALLMULTI))) {
-                        if (dev->flags & IFF_ALLMULTI)
-                                dev->flags |= IFF_PROMISC;
                         lp->i596_config[8] &= ~0x01;
                 } else {
                         lp->i596_config[8] |= 0x01;
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index daba82bbcb56..84c77f1f9a5c 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -21,8 +21,8 @@
 #include <linux/platform_device.h>
 #include <linux/phy.h>
 
-#include <asm/arch/board.h>
-#include <asm/arch/cpu.h>
+#include <mach/board.h>
+#include <mach/cpu.h>
 
 #include "macb.h"
 
diff --git a/drivers/net/meth.c b/drivers/net/meth.c
index 4cb364e67dc6..0a97c26df6ab 100644
--- a/drivers/net/meth.c
+++ b/drivers/net/meth.c
@@ -100,7 +100,7 @@ static inline void load_eaddr(struct net_device *dev)
         DPRINTK("Loading MAC Address: %s\n", print_mac(mac, dev->dev_addr));
         macaddr = 0;
         for (i = 0; i < 6; i++)
-                macaddr |= dev->dev_addr[i] << ((5 - i) * 8);
+                macaddr |= (u64)dev->dev_addr[i] << ((5 - i) * 8);
 
         mace->eth.mac_addr = macaddr;
 }
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index 3ab0e5289f7a..5d76cd09e246 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -3548,7 +3548,11 @@ static void myri10ge_probe_slices(struct myri10ge_priv *mgp)
 
         /* try to load the slice aware rss firmware */
         old_fw = mgp->fw_name;
-        if (old_fw == myri10ge_fw_aligned)
+        if (myri10ge_fw_name != NULL) {
+                dev_info(&mgp->pdev->dev, "overriding rss firmware to %s\n",
+                         myri10ge_fw_name);
+                mgp->fw_name = myri10ge_fw_name;
+        } else if (old_fw == myri10ge_fw_aligned)
                 mgp->fw_name = myri10ge_fw_rss_aligned;
         else
                 mgp->fw_name = myri10ge_fw_rss_unaligned;
@@ -3699,6 +3703,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
                 goto abort_with_netdev;
         }
+        (void)pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
         mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
                                       &mgp->cmd_bus, GFP_KERNEL);
         if (mgp->cmd == NULL)
diff --git a/drivers/net/myri10ge/myri10ge_mcp.h b/drivers/net/myri10ge/myri10ge_mcp.h
index fdbeeee07372..993721090777 100644
--- a/drivers/net/myri10ge/myri10ge_mcp.h
+++ b/drivers/net/myri10ge/myri10ge_mcp.h
@@ -101,6 +101,8 @@ struct mcp_kreq_ether_recv {
 #define MXGEFW_ETH_SEND_3       0x2c0000
 #define MXGEFW_ETH_RECV_SMALL   0x300000
 #define MXGEFW_ETH_RECV_BIG     0x340000
+#define MXGEFW_ETH_SEND_GO      0x380000
+#define MXGEFW_ETH_SEND_STOP    0x3C0000
 
 #define MXGEFW_ETH_SEND(n)              (0x200000 + (((n) & 0x03) * 0x40000))
 #define MXGEFW_ETH_SEND_OFFSET(n)       (MXGEFW_ETH_SEND(n) - MXGEFW_ETH_SEND_4)
@@ -120,6 +122,11 @@ enum myri10ge_mcp_cmd_type {
          * MXGEFW_CMD_RESET is issued */
 
         MXGEFW_CMD_SET_INTRQ_DMA,
+        /* data0 = LSW of the host address
+         * data1 = MSW of the host address
+         * data2 = slice number if multiple slices are used
+         */
+
         MXGEFW_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
         MXGEFW_CMD_SET_SMALL_BUFFER_SIZE,       /* in bytes */
 
@@ -129,6 +136,8 @@ enum myri10ge_mcp_cmd_type {
         MXGEFW_CMD_GET_SEND_OFFSET,
         MXGEFW_CMD_GET_SMALL_RX_OFFSET,
         MXGEFW_CMD_GET_BIG_RX_OFFSET,
+        /* data0 = slice number if multiple slices are used */
+
         MXGEFW_CMD_GET_IRQ_ACK_OFFSET,
         MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
 
@@ -200,7 +209,12 @@ enum myri10ge_mcp_cmd_type {
         MXGEFW_CMD_SET_STATS_DMA_V2,
         /* data0, data1 = bus addr,
          * data2 = sizeof(struct mcp_irq_data) from driver point of view, allows
-         * adding new stuff to mcp_irq_data without changing the ABI */
+         * adding new stuff to mcp_irq_data without changing the ABI
+         *
+         * If multiple slices are used, data2 contains both the size of the
+         * structure (in the lower 16 bits) and the slice number
+         * (in the upper 16 bits).
+         */
 
         MXGEFW_CMD_UNALIGNED_TEST,
         /* same than DMA_TEST (same args) but abort with UNALIGNED on unaligned
@@ -222,13 +236,18 @@ enum myri10ge_mcp_cmd_type {
         MXGEFW_CMD_GET_MAX_RSS_QUEUES,
         MXGEFW_CMD_ENABLE_RSS_QUEUES,
         /* data0 = number of slices n (0, 1, ..., n-1) to enable
-         * data1 = interrupt mode.
-         * 0=share one INTx/MSI, 1=use one MSI-X per queue.
+         * data1 = interrupt mode | use of multiple transmit queues.
+         * 0=share one INTx/MSI.
+         * 1=use one MSI-X per queue.
          * If all queues share one interrupt, the driver must have set
          * RSS_SHARED_INTERRUPT_DMA before enabling queues.
+         * 2=enable both receive and send queues.
+         * Without this bit set, only one send queue (slice 0's send queue)
+         * is enabled.  The receive queues are always enabled.
          */
-#define MXGEFW_SLICE_INTR_MODE_SHARED 0
-#define MXGEFW_SLICE_INTR_MODE_ONE_PER_SLICE 1
+#define MXGEFW_SLICE_INTR_MODE_SHARED          0x0
+#define MXGEFW_SLICE_INTR_MODE_ONE_PER_SLICE   0x1
+#define MXGEFW_SLICE_ENABLE_MULTIPLE_TX_QUEUES 0x2
 
         MXGEFW_CMD_GET_RSS_SHARED_INTERRUPT_MASK_OFFSET,
         MXGEFW_CMD_SET_RSS_SHARED_INTERRUPT_DMA,
@@ -250,10 +269,13 @@ enum myri10ge_mcp_cmd_type {
          * 2: TCP_IPV4        (required by RSS)
          * 3: IPV4 | TCP_IPV4 (required by RSS)
          * 4: source port
+         * 5: source port + destination port
          */
 #define MXGEFW_RSS_HASH_TYPE_IPV4      0x1
 #define MXGEFW_RSS_HASH_TYPE_TCP_IPV4  0x2
 #define MXGEFW_RSS_HASH_TYPE_SRC_PORT  0x4
+#define MXGEFW_RSS_HASH_TYPE_SRC_DST_PORT 0x5
+#define MXGEFW_RSS_HASH_TYPE_MAX 0x5
 
         MXGEFW_CMD_GET_MAX_TSO6_HDR_SIZE,
         /* Return data = the max. size of the entire headers of a IPv6 TSO packet.
@@ -329,6 +351,20 @@ enum myri10ge_mcp_cmd_type {
 
         MXGEFW_CMD_GET_DCA_OFFSET,
         /* offset of dca control for WDMAs */
+
+        /* VMWare NetQueue commands */
+        MXGEFW_CMD_NETQ_GET_FILTERS_PER_QUEUE,
+        MXGEFW_CMD_NETQ_ADD_FILTER,
+        /* data0 = filter_id << 16 | queue << 8 | type */
+        /* data1 = MS4 of MAC Addr */
+        /* data2 = LS2_MAC << 16 | VLAN_tag */
+        MXGEFW_CMD_NETQ_DEL_FILTER,
+        /* data0 = filter_id */
+        MXGEFW_CMD_NETQ_QUERY1,
+        MXGEFW_CMD_NETQ_QUERY2,
+        MXGEFW_CMD_NETQ_QUERY3,
+        MXGEFW_CMD_NETQ_QUERY4,
+
 };
 
 enum myri10ge_mcp_cmd_status {
@@ -381,4 +417,10 @@ struct mcp_irq_data {
         u8 valid;
 };
 
+/* definitions for NETQ filter type */
+#define MXGEFW_NETQ_FILTERTYPE_NONE 0
+#define MXGEFW_NETQ_FILTERTYPE_MACADDR 1
+#define MXGEFW_NETQ_FILTERTYPE_VLAN 2
+#define MXGEFW_NETQ_FILTERTYPE_VLANMACADDR 3
+
 #endif                          /* __MYRI10GE_MCP_H__ */
diff --git a/drivers/net/myri10ge/myri10ge_mcp_gen_header.h b/drivers/net/myri10ge/myri10ge_mcp_gen_header.h
index 07d65c2cbb24..a8662ea8079a 100644
--- a/drivers/net/myri10ge/myri10ge_mcp_gen_header.h
+++ b/drivers/net/myri10ge/myri10ge_mcp_gen_header.h
@@ -35,7 +35,7 @@ struct mcp_gen_header {
         unsigned char mcp_index;
         unsigned char disable_rabbit;
         unsigned char unaligned_tlp;
-        unsigned char pad1;
+        unsigned char pcie_link_algo;
         unsigned counters_addr;
         unsigned copy_block_info;       /* for small mcps loaded with "lload -d" */
         unsigned short handoff_id_major;        /* must be equal */
diff --git a/drivers/net/ne.c b/drivers/net/ne.c
index 42443d697423..fa3ceca4e15c 100644
--- a/drivers/net/ne.c
+++ b/drivers/net/ne.c
@@ -118,7 +118,7 @@ bad_clone_list[] __initdata = {
     {"E-LAN100", "E-LAN200", {0x00, 0x00, 0x5d}}, /* Broken ne1000 clones */
     {"PCM-4823", "PCM-4823", {0x00, 0xc0, 0x6c}}, /* Broken Advantech MoBo */
     {"REALTEK", "RTL8019", {0x00, 0x00, 0xe8}}, /* no-name with Realtek chip */
-#if defined(CONFIG_TOSHIBA_RBTX4927) || defined(CONFIG_TOSHIBA_RBTX4938)
+#ifdef CONFIG_MACH_TX49XX
     {"RBHMA4X00-RTL8019", "RBHMA4X00/RTL8019", {0x00, 0x60, 0x0a}},  /* Toshiba built-in */
 #endif
     {"LCS-8834", "LCS-8836", {0x04, 0x04, 0x37}}, /* ShinyNet (SET) */
@@ -142,7 +142,7 @@ bad_clone_list[] __initdata = {
 #if defined(CONFIG_PLAT_MAPPI)
 #  define DCR_VAL 0x4b
 #elif defined(CONFIG_PLAT_OAKS32R)  || \
-   defined(CONFIG_TOSHIBA_RBTX4927) || defined(CONFIG_TOSHIBA_RBTX4938)
+   defined(CONFIG_MACH_TX49XX)
 #  define DCR_VAL 0x48          /* 8-bit mode */
 #else
 #  define DCR_VAL 0x49
diff --git a/drivers/net/netx-eth.c b/drivers/net/netx-eth.c
index dc442e370850..3f9af759cb90 100644
--- a/drivers/net/netx-eth.c
+++ b/drivers/net/netx-eth.c
@@ -29,12 +29,11 @@
 #include <linux/mii.h>
 
 #include <asm/io.h>
-#include <asm/hardware.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/netx-regs.h>
-#include <asm/arch/pfifo.h>
-#include <asm/arch/xc.h>
-#include <asm/arch/eth.h>
+#include <mach/hardware.h>
+#include <mach/netx-regs.h>
+#include <mach/pfifo.h>
+#include <mach/xc.h>
+#include <mach/eth.h>
 
 /* XC Fifo Offsets */
 #define EMPTY_PTR_FIFO(xcno)    (0 + ((xcno) << 3))     /* Index of the empty pointer FIFO */
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index 8e736614407d..ab871df6b1db 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -66,8 +66,8 @@
 
 #define _NETXEN_NIC_LINUX_MAJOR 4
 #define _NETXEN_NIC_LINUX_MINOR 0
-#define _NETXEN_NIC_LINUX_SUBVERSION 0
-#define NETXEN_NIC_LINUX_VERSIONID  "4.0.0"
+#define _NETXEN_NIC_LINUX_SUBVERSION 11
+#define NETXEN_NIC_LINUX_VERSIONID  "4.0.11"
 
 #define NETXEN_VERSION_CODE(a, b, c)    (((a) << 16) + ((b) << 8) + (c))
 
@@ -508,6 +508,8 @@ typedef enum {
         NETXEN_BRDTYPE_P3_10000_BASE_T = 0x0027,
         NETXEN_BRDTYPE_P3_XG_LOM = 0x0028,
         NETXEN_BRDTYPE_P3_4_GB_MM = 0x0029,
+        NETXEN_BRDTYPE_P3_10G_SFP_CT = 0x002a,
+        NETXEN_BRDTYPE_P3_10G_SFP_QT = 0x002b,
         NETXEN_BRDTYPE_P3_10G_CX4 = 0x0031,
         NETXEN_BRDTYPE_P3_10G_XFP = 0x0032
 
@@ -1170,6 +1172,36 @@ typedef struct {
         nx_nic_intr_coalesce_data_t     irq;
 } nx_nic_intr_coalesce_t;
 
+#define NX_HOST_REQUEST         0x13
+#define NX_NIC_REQUEST          0x14
+
+#define NX_MAC_EVENT            0x1
+
+enum {
+        NX_NIC_H2C_OPCODE_START = 0,
+        NX_NIC_H2C_OPCODE_CONFIG_RSS,
+        NX_NIC_H2C_OPCODE_CONFIG_RSS_TBL,
+        NX_NIC_H2C_OPCODE_CONFIG_INTR_COALESCE,
+        NX_NIC_H2C_OPCODE_CONFIG_LED,
+        NX_NIC_H2C_OPCODE_CONFIG_PROMISCUOUS,
+        NX_NIC_H2C_OPCODE_CONFIG_L2_MAC,
+        NX_NIC_H2C_OPCODE_LRO_REQUEST,
+        NX_NIC_H2C_OPCODE_GET_SNMP_STATS,
+        NX_NIC_H2C_OPCODE_PROXY_START_REQUEST,
+        NX_NIC_H2C_OPCODE_PROXY_STOP_REQUEST,
+        NX_NIC_H2C_OPCODE_PROXY_SET_MTU,
+        NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE,
+        NX_H2P_OPCODE_GET_FINGER_PRINT_REQUEST,
+        NX_H2P_OPCODE_INSTALL_LICENSE_REQUEST,
+        NX_H2P_OPCODE_GET_LICENSE_CAPABILITY_REQUEST,
+        NX_NIC_H2C_OPCODE_GET_NET_STATS,
+        NX_NIC_H2C_OPCODE_LAST
+};
+
+#define VPORT_MISS_MODE_DROP            0 /* drop all unmatched */
+#define VPORT_MISS_MODE_ACCEPT_ALL      1 /* accept all packets */
+#define VPORT_MISS_MODE_ACCEPT_MULTI    2 /* accept unmatched multicast */
+
 typedef struct {
         u64 qhdr;
         u64 req_hdr;
@@ -1288,7 +1320,7 @@ struct netxen_adapter {
         int (*disable_phy_interrupts) (struct netxen_adapter *);
         int (*macaddr_set) (struct netxen_adapter *, netxen_ethernet_macaddr_t);
         int (*set_mtu) (struct netxen_adapter *, int);
-        int (*set_promisc) (struct netxen_adapter *, netxen_niu_prom_mode_t);
+        int (*set_promisc) (struct netxen_adapter *, u32);
         int (*phy_read) (struct netxen_adapter *, long reg, u32 *);
         int (*phy_write) (struct netxen_adapter *, long reg, u32 val);
         int (*init_port) (struct netxen_adapter *, int);
@@ -1465,9 +1497,10 @@ int netxen_process_cmd_ring(struct netxen_adapter *adapter);
 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctx, int max);
 void netxen_p2_nic_set_multi(struct net_device *netdev);
 void netxen_p3_nic_set_multi(struct net_device *netdev);
+int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32);
 int netxen_config_intr_coalesce(struct netxen_adapter *adapter);
 
-u32 nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, u32 mtu);
+int nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu);
 int netxen_nic_change_mtu(struct net_device *netdev, int new_mtu);
 
 int netxen_nic_set_mac(struct net_device *netdev, void *p);
@@ -1502,7 +1535,9 @@ static const struct netxen_brdinfo netxen_boards[] = {
         {NETXEN_BRDTYPE_P3_10G_SFP_PLUS, 2, "Dual XGb SFP+ LP"},
         {NETXEN_BRDTYPE_P3_10000_BASE_T, 1, "XGB 10G BaseT LP"},
         {NETXEN_BRDTYPE_P3_XG_LOM,  2, "Dual XGb LOM"},
-        {NETXEN_BRDTYPE_P3_4_GB_MM, 4, "Quad GB - March Madness"},
+        {NETXEN_BRDTYPE_P3_4_GB_MM, 4, "NX3031 Gigabit Ethernet"},
+        {NETXEN_BRDTYPE_P3_10G_SFP_CT, 2, "NX3031 10 Gigabit Ethernet"},
+        {NETXEN_BRDTYPE_P3_10G_SFP_QT, 2, "Quanta Dual XGb SFP+"},
         {NETXEN_BRDTYPE_P3_10G_CX4, 2, "Reference Dual CX4 Option"},
         {NETXEN_BRDTYPE_P3_10G_XFP, 1, "Reference Single XFP Option"}
 };
@@ -1580,7 +1615,8 @@ dma_watchdog_wakeup(struct netxen_adapter *adapter)
 
 
 int netxen_is_flash_supported(struct netxen_adapter *adapter);
-int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 mac[]);
+int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 *mac);
+int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac);
 extern void netxen_change_ringparam(struct netxen_adapter *adapter);
 extern int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr,
                                 int *valp);
diff --git a/drivers/net/netxen/netxen_nic_ctx.c b/drivers/net/netxen/netxen_nic_ctx.c
index 64babc59e699..64b51643c626 100644
--- a/drivers/net/netxen/netxen_nic_ctx.c
+++ b/drivers/net/netxen/netxen_nic_ctx.c
@@ -145,8 +145,8 @@ netxen_issue_cmd(struct netxen_adapter *adapter,
         return rcode;
 }
 
-u32
-nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, u32 mtu)
+int
+nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
 {
         u32 rcode = NX_RCODE_SUCCESS;
         struct netxen_recv_context *recv_ctx = &adapter->recv_ctx[0];
@@ -160,7 +160,10 @@ nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, u32 mtu)
                                 0,
                                 NX_CDRP_CMD_SET_MTU);
 
-        return rcode;
+        if (rcode != NX_RCODE_SUCCESS)
+                return -EIO;
+
+        return 0;
 }
 
 static int
diff --git a/drivers/net/netxen/netxen_nic_ethtool.c b/drivers/net/netxen/netxen_nic_ethtool.c
index 48ee06b6f4e9..4ad3e0844b99 100644
--- a/drivers/net/netxen/netxen_nic_ethtool.c
+++ b/drivers/net/netxen/netxen_nic_ethtool.c
@@ -140,18 +140,33 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
                 if (netif_running(dev)) {
                         ecmd->speed = adapter->link_speed;
                         ecmd->duplex = adapter->link_duplex;
-                } else
-                        return -EIO;    /* link absent */
+                        ecmd->autoneg = adapter->link_autoneg;
+                }
+
         } else if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
-                ecmd->supported = (SUPPORTED_TP |
-                                   SUPPORTED_1000baseT_Full |
-                                   SUPPORTED_10000baseT_Full);
-                ecmd->advertising = (ADVERTISED_TP |
-                                     ADVERTISED_1000baseT_Full |
-                                     ADVERTISED_10000baseT_Full);
+                u32 val;
+
+                adapter->hw_read_wx(adapter, NETXEN_PORT_MODE_ADDR, &val, 4);
+                if (val == NETXEN_PORT_MODE_802_3_AP) {
+                        ecmd->supported = SUPPORTED_1000baseT_Full;
+                        ecmd->advertising = ADVERTISED_1000baseT_Full;
+                } else {
+                        ecmd->supported = SUPPORTED_10000baseT_Full;
+                        ecmd->advertising = ADVERTISED_10000baseT_Full;
+                }
+
                 ecmd->port = PORT_TP;
 
-                ecmd->speed = SPEED_10000;
+                if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
+                        u16 pcifn = adapter->ahw.pci_func;
+
+                        adapter->hw_read_wx(adapter,
+                                P3_LINK_SPEED_REG(pcifn), &val, 4);
+                        ecmd->speed = P3_LINK_SPEED_MHZ *
+                                        P3_LINK_SPEED_VAL(pcifn, val);
+                } else
+                        ecmd->speed = SPEED_10000;
+
                 ecmd->duplex = DUPLEX_FULL;
                 ecmd->autoneg = AUTONEG_DISABLE;
         } else
@@ -192,6 +207,8 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
                 break;
         case NETXEN_BRDTYPE_P2_SB31_10G:
         case NETXEN_BRDTYPE_P3_10G_SFP_PLUS:
+        case NETXEN_BRDTYPE_P3_10G_SFP_CT:
+        case NETXEN_BRDTYPE_P3_10G_SFP_QT:
         case NETXEN_BRDTYPE_P3_10G_XFP:
                 ecmd->supported |= SUPPORTED_FIBRE;
                 ecmd->advertising |= ADVERTISED_FIBRE;
diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h
index 3ce13e451aac..e8e8d73f6ed7 100644
--- a/drivers/net/netxen/netxen_nic_hdr.h
+++ b/drivers/net/netxen/netxen_nic_hdr.h
@@ -724,6 +724,13 @@ enum {
 #define XG_LINK_STATE_P3(pcifn,val) \
         (((val) >> ((pcifn) * 4)) & XG_LINK_STATE_P3_MASK)
 
+#define P3_LINK_SPEED_MHZ       100
+#define P3_LINK_SPEED_MASK      0xff
+#define P3_LINK_SPEED_REG(pcifn)        \
+        (CRB_PF_LINK_SPEED_1 + (((pcifn) / 4) * 4))
+#define P3_LINK_SPEED_VAL(pcifn, reg)   \
+        (((reg) >> (8 * ((pcifn) & 0x3))) & P3_LINK_SPEED_MASK)
+
 #define NETXEN_CAM_RAM_BASE     (NETXEN_CRB_CAM + 0x02000)
 #define NETXEN_CAM_RAM(reg)     (NETXEN_CAM_RAM_BASE + (reg))
 #define NETXEN_FW_VERSION_MAJOR (NETXEN_CAM_RAM(0x150))
@@ -836,9 +843,11 @@ enum {
 
 #define PCIE_SETUP_FUNCTION     (0x12040)
 #define PCIE_SETUP_FUNCTION2    (0x12048)
+#define PCIE_MISCCFG_RC         (0x1206c)
 #define PCIE_TGT_SPLIT_CHICKEN  (0x12080)
 #define PCIE_CHICKEN3           (0x120c8)
 
+#define ISR_INT_STATE_REG       (NETXEN_PCIX_PS_REG(PCIE_MISCCFG_RC))
 #define PCIE_MAX_MASTER_SPLIT   (0x14048)
 
 #define NETXEN_PORT_MODE_NONE           0
@@ -854,6 +863,7 @@ enum {
 #define NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL                (0x14)
 
 #define ISR_MSI_INT_TRIGGER(FUNC) (NETXEN_PCIX_PS_REG(PCIX_MSI_F(FUNC)))
+#define ISR_LEGACY_INT_TRIGGERED(VAL)   (((VAL) & 0x300) == 0x200)
 
 /*
  * PCI Interrupt Vector Values.
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 96a3bc6426e2..84978f80f396 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -285,14 +285,7 @@ static unsigned crb_hub_agt[64] =
 #define ADDR_IN_RANGE(addr, low, high)  \
         (((addr) <= (high)) && ((addr) >= (low)))
 
-#define NETXEN_MAX_MTU          8000 + NETXEN_ENET_HEADER_SIZE + NETXEN_ETH_FCS_SIZE
-#define NETXEN_MIN_MTU          64
-#define NETXEN_ETH_FCS_SIZE     4
-#define NETXEN_ENET_HEADER_SIZE 14
 #define NETXEN_WINDOW_ONE       0x2000000 /*CRB Window: bit 25 of CRB address */
-#define NETXEN_FIRMWARE_LEN     ((16 * 1024) / 4)
-#define NETXEN_NIU_HDRSIZE      (0x1 << 6)
-#define NETXEN_NIU_TLRSIZE      (0x1 << 5)
 
 #define NETXEN_NIC_ZERO_PAUSE_ADDR     0ULL
 #define NETXEN_NIC_UNIT_PAUSE_ADDR     0x200ULL
@@ -541,9 +534,6 @@ netxen_send_cmd_descs(struct netxen_adapter *adapter,
         return 0;
 }
 
-#define NIC_REQUEST             0x14
-#define NETXEN_MAC_EVENT        0x1
-
 static int nx_p3_sre_macaddr_change(struct net_device *dev,
                 u8 *addr, unsigned op)
 {
@@ -553,8 +543,8 @@ static int nx_p3_sre_macaddr_change(struct net_device *dev,
         int rv;
 
         memset(&req, 0, sizeof(nx_nic_req_t));
-        req.qhdr |= (NIC_REQUEST << 23);
-        req.req_hdr |= NETXEN_MAC_EVENT;
+        req.qhdr |= (NX_NIC_REQUEST << 23);
+        req.req_hdr |= NX_MAC_EVENT;
         req.req_hdr |= ((u64)adapter->portnum << 16);
         mac_req.op = op;
         memcpy(&mac_req.mac_addr, addr, 6);
@@ -575,31 +565,35 @@ void netxen_p3_nic_set_multi(struct net_device *netdev)
         nx_mac_list_t *cur, *next, *del_list, *add_list = NULL;
         struct dev_mc_list *mc_ptr;
         u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
-
-        adapter->set_promisc(adapter, NETXEN_NIU_PROMISC_MODE);
-
-        /*
-         * Programming mac addresses will automaticly enabling L2 filtering.
-         * HW will replace timestamp with L2 conid when L2 filtering is
-         * enabled. This causes problem for LSA. Do not enabling L2 filtering
-         * until that problem is fixed.
-         */
-        if ((netdev->flags & IFF_PROMISC) ||
-                        (netdev->mc_count > adapter->max_mc_count))
-                return;
+        u32 mode = VPORT_MISS_MODE_DROP;
 
         del_list = adapter->mac_list;
         adapter->mac_list = NULL;
 
         nx_p3_nic_add_mac(adapter, netdev->dev_addr, &add_list, &del_list);
+        nx_p3_nic_add_mac(adapter, bcast_addr, &add_list, &del_list);
+
+        if (netdev->flags & IFF_PROMISC) {
+                mode = VPORT_MISS_MODE_ACCEPT_ALL;
+                goto send_fw_cmd;
+        }
+
+        if ((netdev->flags & IFF_ALLMULTI) ||
+                        (netdev->mc_count > adapter->max_mc_count)) {
+                mode = VPORT_MISS_MODE_ACCEPT_MULTI;
+                goto send_fw_cmd;
+        }
+
         if (netdev->mc_count > 0) {
-                nx_p3_nic_add_mac(adapter, bcast_addr, &add_list, &del_list);
                 for (mc_ptr = netdev->mc_list; mc_ptr;
                      mc_ptr = mc_ptr->next) {
                         nx_p3_nic_add_mac(adapter, mc_ptr->dmi_addr,
                                           &add_list, &del_list);
                 }
         }
+
+send_fw_cmd:
+        adapter->set_promisc(adapter, mode);
         for (cur = del_list; cur;) {
                 nx_p3_sre_macaddr_change(netdev, cur->mac_addr, NETXEN_MAC_DEL);
                 next = cur->next;
@@ -615,6 +609,21 @@ void netxen_p3_nic_set_multi(struct net_device *netdev)
         }
 }
 
+int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32 mode)
+{
+        nx_nic_req_t req;
+
+        memset(&req, 0, sizeof(nx_nic_req_t));
+
+        req.qhdr |= (NX_HOST_REQUEST << 23);
+        req.req_hdr |= NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE;
+        req.req_hdr |= ((u64)adapter->portnum << 16);
+        req.words[0] = cpu_to_le64(mode);
+
+        return netxen_send_cmd_descs(adapter,
+                                (struct cmd_desc_type0 *)&req, 1);
+}
+
 #define NETXEN_CONFIG_INTR_COALESCE     3
 
 /*
@@ -627,7 +636,7 @@ int netxen_config_intr_coalesce(struct netxen_adapter *adapter)
 
         memset(&req, 0, sizeof(nx_nic_req_t));
 
-        req.qhdr |= (NIC_REQUEST << 23);
+        req.qhdr |= (NX_NIC_REQUEST << 23);
         req.req_hdr |= NETXEN_CONFIG_INTR_COALESCE;
         req.req_hdr |= ((u64)adapter->portnum << 16);
 
@@ -653,6 +662,7 @@ int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
 {
         struct netxen_adapter *adapter = netdev_priv(netdev);
         int max_mtu;
+        int rc = 0;
 
         if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
                 max_mtu = P3_MAX_MTU;
@@ -666,16 +676,12 @@ int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
         }
 
         if (adapter->set_mtu)
-                adapter->set_mtu(adapter, mtu);
-        netdev->mtu = mtu;
+                rc = adapter->set_mtu(adapter, mtu);
 
-        mtu += MTU_FUDGE_FACTOR;
-        if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
-                nx_fw_cmd_set_mtu(adapter, mtu);
-        else if (adapter->set_mtu)
-                adapter->set_mtu(adapter, mtu);
+        if (!rc)
+                netdev->mtu = mtu;
 
-        return 0;
+        return rc;
 }
 
 int netxen_is_flash_supported(struct netxen_adapter *adapter)
@@ -727,31 +733,56 @@ static int netxen_get_flash_block(struct netxen_adapter *adapter, int base,
         return 0;
 }
 
-int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 mac[])
+int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 *mac)
 {
-        __le32 *pmac = (__le32 *) & mac[0];
+        __le32 *pmac = (__le32 *) mac;
+        u32 offset;
+
+        offset = NETXEN_USER_START +
+                offsetof(struct netxen_new_user_info, mac_addr) +
+                adapter->portnum * sizeof(u64);
 
-        if (netxen_get_flash_block(adapter,
-                                   NETXEN_USER_START +
-                                   offsetof(struct netxen_new_user_info,
-                                            mac_addr),
-                                   FLASH_NUM_PORTS * sizeof(u64), pmac) == -1) {
+        if (netxen_get_flash_block(adapter, offset, sizeof(u64), pmac) == -1)
                 return -1;
-        }
+
         if (*mac == cpu_to_le64(~0ULL)) {
+
+                offset = NETXEN_USER_START_OLD +
+                        offsetof(struct netxen_user_old_info, mac_addr) +
+                        adapter->portnum * sizeof(u64);
+
                 if (netxen_get_flash_block(adapter,
-                                           NETXEN_USER_START_OLD +
-                                           offsetof(struct netxen_user_old_info,
-                                                    mac_addr),
-                                           FLASH_NUM_PORTS * sizeof(u64),
-                                           pmac) == -1)
+                                        offset, sizeof(u64), pmac) == -1)
                         return -1;
+
                 if (*mac == cpu_to_le64(~0ULL))
                         return -1;
         }
         return 0;
 }
 
+int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac)
+{
+        uint32_t crbaddr, mac_hi, mac_lo;
+        int pci_func = adapter->ahw.pci_func;
+
+        crbaddr = CRB_MAC_BLOCK_START +
+                (4 * ((pci_func/2) * 3)) + (4 * (pci_func & 1));
+
+        adapter->hw_read_wx(adapter, crbaddr, &mac_lo, 4);
+        adapter->hw_read_wx(adapter, crbaddr+4, &mac_hi, 4);
+
+        mac_hi = cpu_to_le32(mac_hi);
+        mac_lo = cpu_to_le32(mac_lo);
+
+        if (pci_func & 1)
+                *mac = ((mac_lo >> 16) | ((u64)mac_hi << 16));
+        else
+                *mac = ((mac_lo) | ((u64)mac_hi << 32));
+
+        return 0;
+}
+
 #define CRB_WIN_LOCK_TIMEOUT 100000000
 
 static int crb_win_lock(struct netxen_adapter *adapter)
@@ -1411,7 +1442,8 @@ static int netxen_nic_pci_mem_read_direct(struct netxen_adapter *adapter,
                 (netxen_nic_pci_is_same_window(adapter, off+size-1) == 0)) {
                 write_unlock_irqrestore(&adapter->adapter_lock, flags);
                 printk(KERN_ERR "%s out of bound pci memory access. "
-                        "offset is 0x%llx\n", netxen_nic_driver_name, off);
+                        "offset is 0x%llx\n", netxen_nic_driver_name,
+                        (unsigned long long)off);
                 return -1;
         }
 
@@ -1484,7 +1516,8 @@ netxen_nic_pci_mem_write_direct(struct netxen_adapter *adapter, u64 off,
                 (netxen_nic_pci_is_same_window(adapter, off+size-1) == 0)) {
                 write_unlock_irqrestore(&adapter->adapter_lock, flags);
                 printk(KERN_ERR "%s out of bound pci memory access. "
-                        "offset is 0x%llx\n", netxen_nic_driver_name, off);
+                        "offset is 0x%llx\n", netxen_nic_driver_name,
+                        (unsigned long long)off);
                 return -1;
         }
 
@@ -2016,6 +2049,8 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter)
         case NETXEN_BRDTYPE_P3_10G_CX4_LP:
         case NETXEN_BRDTYPE_P3_IMEZ:
         case NETXEN_BRDTYPE_P3_10G_SFP_PLUS:
+        case NETXEN_BRDTYPE_P3_10G_SFP_CT:
+        case NETXEN_BRDTYPE_P3_10G_SFP_QT:
         case NETXEN_BRDTYPE_P3_10G_XFP:
         case NETXEN_BRDTYPE_P3_10000_BASE_T:
 
@@ -2034,6 +2069,7 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter)
         default:
                 printk("%s: Unknown(%x)\n", netxen_nic_driver_name,
                        boardinfo->board_type);
+                rv = -ENODEV;
                 break;
         }
 
@@ -2044,6 +2080,7 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter)
 
 int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu)
 {
+        new_mtu += MTU_FUDGE_FACTOR;
         netxen_nic_write_w0(adapter,
                 NETXEN_NIU_GB_MAX_FRAME_SIZE(adapter->physical_port),
                 new_mtu);
@@ -2052,7 +2089,7 @@ int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu)
 
 int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu)
 {
-        new_mtu += NETXEN_NIU_HDRSIZE + NETXEN_NIU_TLRSIZE;
+        new_mtu += MTU_FUDGE_FACTOR;
         if (adapter->physical_port == 0)
                 netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE,
                                 new_mtu);
@@ -2074,12 +2111,22 @@ void netxen_nic_set_link_parameters(struct netxen_adapter *adapter)
         __u32 status;
         __u32 autoneg;
         __u32 mode;
+        __u32 port_mode;
 
         netxen_nic_read_w0(adapter, NETXEN_NIU_MODE, &mode);
         if (netxen_get_niu_enable_ge(mode)) {   /* Gb 10/100/1000 Mbps mode */
+
+                adapter->hw_read_wx(adapter,
+                                NETXEN_PORT_MODE_ADDR, &port_mode, 4);
+                if (port_mode == NETXEN_PORT_MODE_802_3_AP) {
+                        adapter->link_speed   = SPEED_1000;
+                        adapter->link_duplex  = DUPLEX_FULL;
+                        adapter->link_autoneg = AUTONEG_DISABLE;
+                        return;
+                }
+
                 if (adapter->phy_read
-                    && adapter->
-                    phy_read(adapter,
+                    && adapter->phy_read(adapter,
                              NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
                              &status) == 0) {
                         if (netxen_get_phy_link(status)) {
@@ -2109,8 +2156,7 @@ void netxen_nic_set_link_parameters(struct netxen_adapter *adapter)
                                         break;
                                 }
                                 if (adapter->phy_read
-                                    && adapter->
-                                    phy_read(adapter,
+                                    && adapter->phy_read(adapter,
                                              NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG,
                                              &autoneg) != 0)
                                         adapter->link_autoneg = autoneg;
@@ -2162,10 +2208,10 @@ void netxen_nic_flash_print(struct netxen_adapter *adapter)
         if (adapter->portnum == 0) {
                 get_brd_name_by_type(board_info->board_type, brd_name);
 
-                printk("NetXen %s Board S/N %s  Chip id 0x%x\n",
-                                brd_name, serial_num, board_info->chip_id);
-                printk("NetXen Firmware version %d.%d.%d\n", fw_major,
-                                fw_minor, fw_build);
+                printk(KERN_INFO "NetXen %s Board S/N %s  Chip rev 0x%x\n",
+                                brd_name, serial_num, adapter->ahw.revision_id);
+                printk(KERN_INFO "NetXen Firmware version %d.%d.%d\n",
+                                fw_major, fw_minor, fw_build);
         }
 
         if (NETXEN_VERSION_CODE(fw_major, fw_minor, fw_build) <
diff --git a/drivers/net/netxen/netxen_nic_hw.h b/drivers/net/netxen/netxen_nic_hw.h
index b8e0030f03d7..aae737dc77a8 100644
--- a/drivers/net/netxen/netxen_nic_hw.h
+++ b/drivers/net/netxen/netxen_nic_hw.h
@@ -419,12 +419,9 @@ typedef enum {
 #define netxen_get_niu_enable_ge(config_word)   \
                 _netxen_crb_get_bit(config_word, 1)
 
-/* Promiscous mode options (GbE mode only) */
-typedef enum {
-        NETXEN_NIU_PROMISC_MODE = 0,
-        NETXEN_NIU_NON_PROMISC_MODE,
-        NETXEN_NIU_ALLMULTI_MODE
-} netxen_niu_prom_mode_t;
+#define NETXEN_NIU_NON_PROMISC_MODE     0
+#define NETXEN_NIU_PROMISC_MODE         1
+#define NETXEN_NIU_ALLMULTI_MODE        2
 
 /*
  * NIU GB Drop CRC Register
@@ -471,9 +468,9 @@ typedef enum {
 
 /* Set promiscuous mode for a GbE interface */
 int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
-                                    netxen_niu_prom_mode_t mode);
+                                    u32 mode);
 int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
-                                       netxen_niu_prom_mode_t mode);
+                                       u32 mode);
 
 /* set the MAC address for a given MAC */
 int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index 01ab31b34a85..5bba675d0504 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -364,6 +364,11 @@ void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
         default:
                 break;
         }
+
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
+                adapter->set_mtu = nx_fw_cmd_set_mtu;
+                adapter->set_promisc = netxen_p3_nic_set_promisc;
+        }
 }
 
 /*
@@ -1074,10 +1079,12 @@ int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
 
 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
 {
-        int i;
+        int i = 100;
+
+        if (!adapter->dummy_dma.addr)
+                return;
 
-        if (adapter->dummy_dma.addr) {
-                i = 100;
+        if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
                 do {
                         if (dma_watchdog_shutdown_request(adapter) == 1)
                                 break;
@@ -1085,17 +1092,17 @@ void netxen_free_adapter_offload(struct netxen_adapter *adapter)
                         if (dma_watchdog_shutdown_poll_result(adapter) == 1)
                                 break;
                 } while (--i);
+        }
 
-                if (i) {
-                        pci_free_consistent(adapter->pdev,
-                                    NETXEN_HOST_DUMMY_DMA_SIZE,
-                                    adapter->dummy_dma.addr,
-                                    adapter->dummy_dma.phys_addr);
-                        adapter->dummy_dma.addr = NULL;
-                } else {
-                        printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
-                                        adapter->netdev->name);
-                }
+        if (i) {
+                pci_free_consistent(adapter->pdev,
+                            NETXEN_HOST_DUMMY_DMA_SIZE,
+                            adapter->dummy_dma.addr,
+                            adapter->dummy_dma.phys_addr);
+                adapter->dummy_dma.addr = NULL;
+        } else {
+                printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
+                                adapter->netdev->name);
         }
 }
 
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index 91d209a8f6cb..32bb47adbe39 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -149,80 +149,18 @@ static uint32_t msi_tgt_status[8] = {
 
 static struct netxen_legacy_intr_set legacy_intr[] = NX_LEGACY_INTR_CONFIG;
 
-static void netxen_nic_disable_int(struct netxen_adapter *adapter)
+static inline void netxen_nic_disable_int(struct netxen_adapter *adapter)
 {
-        u32 mask = 0x7ff;
-        int retries = 32;
-        int pci_fn = adapter->ahw.pci_func;
-
-        if (adapter->msi_mode != MSI_MODE_MULTIFUNC)
-                adapter->pci_write_normalize(adapter,
-                                adapter->crb_intr_mask, 0);
-
-        if (adapter->intr_scheme != -1 &&
-            adapter->intr_scheme != INTR_SCHEME_PERPORT)
-                adapter->pci_write_immediate(adapter, ISR_INT_MASK, mask);
-
-        if (!NETXEN_IS_MSI_FAMILY(adapter)) {
-                do {
-                        adapter->pci_write_immediate(adapter,
-                                        ISR_INT_TARGET_STATUS, 0xffffffff);
-                        mask = adapter->pci_read_immediate(adapter,
-                                        ISR_INT_VECTOR);
-                        if (!(mask & 0x80))
-                                break;
-                        udelay(10);
-                } while (--retries);
-
-                if (!retries) {
-                        printk(KERN_NOTICE "%s: Failed to disable interrupt completely\n",
-                                        netxen_nic_driver_name);
-                }
-        } else {
-                if (adapter->msi_mode == MSI_MODE_MULTIFUNC) {
-                        adapter->pci_write_immediate(adapter,
-                                        msi_tgt_status[pci_fn], 0xffffffff);
-                }
-        }
+        adapter->pci_write_normalize(adapter, adapter->crb_intr_mask, 0);
 }
 
-static void netxen_nic_enable_int(struct netxen_adapter *adapter)
+static inline void netxen_nic_enable_int(struct netxen_adapter *adapter)
 {
-        u32 mask;
-
-        DPRINTK(1, INFO, "Entered ISR Enable \n");
-
-        if (adapter->intr_scheme != -1 &&
-                adapter->intr_scheme != INTR_SCHEME_PERPORT) {
-                switch (adapter->ahw.board_type) {
-                case NETXEN_NIC_GBE:
-                        mask  =  0x77b;
-                        break;
-                case NETXEN_NIC_XGBE:
-                        mask  =  0x77f;
-                        break;
-                default:
-                        mask  =  0x7ff;
-                        break;
-                }
-
-                adapter->pci_write_immediate(adapter, ISR_INT_MASK, mask);
-        }
-
         adapter->pci_write_normalize(adapter, adapter->crb_intr_mask, 0x1);
 
-        if (!NETXEN_IS_MSI_FAMILY(adapter)) {
-                mask = 0xbff;
-                if (adapter->intr_scheme != -1 &&
-                        adapter->intr_scheme != INTR_SCHEME_PERPORT) {
-                        adapter->pci_write_normalize(adapter,
-                                        CRB_INT_VECTOR, 0);
-                }
+        if (!NETXEN_IS_MSI_FAMILY(adapter))
                 adapter->pci_write_immediate(adapter,
-                                ISR_INT_TARGET_MASK, mask);
-        }
-
-        DPRINTK(1, INFO, "Done with enable Int\n");
+                                adapter->legacy_intr.tgt_mask_reg, 0xfbff);
 }
 
 static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id)
@@ -284,6 +222,8 @@ static void netxen_check_options(struct netxen_adapter *adapter)
         case NETXEN_BRDTYPE_P3_10G_CX4_LP:
         case NETXEN_BRDTYPE_P3_IMEZ:
         case NETXEN_BRDTYPE_P3_10G_SFP_PLUS:
+        case NETXEN_BRDTYPE_P3_10G_SFP_QT:
+        case NETXEN_BRDTYPE_P3_10G_SFP_CT:
         case NETXEN_BRDTYPE_P3_10G_XFP:
         case NETXEN_BRDTYPE_P3_10000_BASE_T:
                 adapter->msix_supported = !!use_msi_x;
@@ -301,6 +241,10 @@ static void netxen_check_options(struct netxen_adapter *adapter)
         case NETXEN_BRDTYPE_P3_REF_QG:
         case NETXEN_BRDTYPE_P3_4_GB:
         case NETXEN_BRDTYPE_P3_4_GB_MM:
+                adapter->msix_supported = 0;
+                adapter->max_rx_desc_count = MAX_RCV_DESCRIPTORS_10G;
+                break;
+
         case NETXEN_BRDTYPE_P2_SB35_4G:
         case NETXEN_BRDTYPE_P2_SB31_2G:
                 adapter->msix_supported = 0;
@@ -499,6 +443,44 @@ static void netxen_init_msix_entries(struct netxen_adapter *adapter)
                 adapter->msix_entries[i].entry = i;
 }
 
+static int
+netxen_read_mac_addr(struct netxen_adapter *adapter)
+{
+        int i;
+        unsigned char *p;
+        __le64 mac_addr;
+        DECLARE_MAC_BUF(mac);
+        struct net_device *netdev = adapter->netdev;
+        struct pci_dev *pdev = adapter->pdev;
+
+        if (netxen_is_flash_supported(adapter) != 0)
+                return -EIO;
+
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
+                if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0)
+                        return -EIO;
+        } else {
+                if (netxen_get_flash_mac_addr(adapter, &mac_addr) != 0)
+                        return -EIO;
+        }
+
+        p = (unsigned char *)&mac_addr;
+        for (i = 0; i < 6; i++)
+                netdev->dev_addr[i] = *(p + 5 - i);
+
+        memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
+
+        /* set station address */
+
+        if (!is_valid_ether_addr(netdev->perm_addr)) {
+                dev_warn(&pdev->dev, "Bad MAC address %s.\n",
+                                print_mac(mac, netdev->dev_addr));
+        } else
+                adapter->macaddr_set(adapter, netdev->dev_addr);
+
+        return 0;
+}
+
 /*
  * netxen_nic_probe()
  *
@@ -527,10 +509,8 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         unsigned long mem_base, mem_len, db_base, db_len, pci_len0 = 0;
         int i = 0, err;
         int first_driver, first_boot;
-        __le64 mac_addr[FLASH_NUM_PORTS + 1];
         u32 val;
         int pci_func_id = PCI_FUNC(pdev->devfn);
-        DECLARE_MAC_BUF(mac);
         struct netxen_legacy_intr_set *legacy_intrp;
         uint8_t revision_id;
 
@@ -543,6 +523,13 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                 return -ENODEV;
         }
 
+        if (pdev->revision >= NX_P3_A0 && pdev->revision < NX_P3_B1) {
+                printk(KERN_WARNING "NetXen chip revisions between 0x%x-0x%x"
+                                "will not be enabled.\n",
+                                NX_P3_A0, NX_P3_B1);
+                return -ENODEV;
+        }
+
         if ((err = pci_enable_device(pdev)))
                 return err;
 
@@ -700,13 +687,10 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         adapter->status   &= ~NETXEN_NETDEV_STATUS;
         adapter->rx_csum = 1;
         adapter->mc_enabled = 0;
-        if (NX_IS_REVISION_P3(revision_id)) {
+        if (NX_IS_REVISION_P3(revision_id))
                 adapter->max_mc_count = 38;
-                adapter->max_rds_rings = 2;
-        } else {
+        else
                 adapter->max_mc_count = 16;
-                adapter->max_rds_rings = 3;
-        }
 
         netdev->open               = netxen_nic_open;
         netdev->stop               = netxen_nic_close;
@@ -779,10 +763,6 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                 if (adapter->portnum == 0)
                         first_driver = 1;
         }
-        adapter->crb_addr_cmd_producer = crb_cmd_producer[adapter->portnum];
-        adapter->crb_addr_cmd_consumer = crb_cmd_consumer[adapter->portnum];
-        netxen_nic_update_cmd_producer(adapter, 0);
-        netxen_nic_update_cmd_consumer(adapter, 0);
 
         if (first_driver) {
                 first_boot = adapter->pci_read_normalize(adapter,
@@ -903,34 +883,14 @@ request_msi:
                 goto err_out_disable_msi;
 
         init_timer(&adapter->watchdog_timer);
-        adapter->ahw.linkup = 0;
         adapter->watchdog_timer.function = &netxen_watchdog;
         adapter->watchdog_timer.data = (unsigned long)adapter;
         INIT_WORK(&adapter->watchdog_task, netxen_watchdog_task);
         INIT_WORK(&adapter->tx_timeout_task, netxen_tx_timeout_task);
 
-        if (netxen_is_flash_supported(adapter) == 0 &&
-                        netxen_get_flash_mac_addr(adapter, mac_addr) == 0) {
-                unsigned char *p;
-
-                p = (unsigned char *)&mac_addr[adapter->portnum];
-                netdev->dev_addr[0] = *(p + 5);
-                netdev->dev_addr[1] = *(p + 4);
-                netdev->dev_addr[2] = *(p + 3);
-                netdev->dev_addr[3] = *(p + 2);
-                netdev->dev_addr[4] = *(p + 1);
-                netdev->dev_addr[5] = *(p + 0);
-
-                memcpy(netdev->perm_addr, netdev->dev_addr,
-                        netdev->addr_len);
-                if (!is_valid_ether_addr(netdev->perm_addr)) {
-                        printk(KERN_ERR "%s: Bad MAC address %s.\n",
-                                        netxen_nic_driver_name,
-                                        print_mac(mac, netdev->dev_addr));
-                } else {
-                        adapter->macaddr_set(adapter, netdev->dev_addr);
-                }
-        }
+        err = netxen_read_mac_addr(adapter);
+        if (err)
+                dev_warn(&pdev->dev, "failed to read mac addr\n");
 
         netif_carrier_off(netdev);
         netif_stop_queue(netdev);
@@ -1005,6 +965,7 @@ static void __devexit netxen_nic_remove(struct pci_dev *pdev)
 
         if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) {
                 netxen_free_hw_resources(adapter);
+                netxen_release_rx_buffers(adapter);
                 netxen_free_sw_resources(adapter);
         }
 
@@ -1053,6 +1014,11 @@ static int netxen_nic_open(struct net_device *netdev)
                         return -EIO;
                 }
 
+                if (adapter->fw_major < 4)
+                        adapter->max_rds_rings = 3;
+                else
+                        adapter->max_rds_rings = 2;
+
                 err = netxen_alloc_sw_resources(adapter);
                 if (err) {
                         printk(KERN_ERR "%s: Error in setting sw resources\n",
@@ -1069,15 +1035,24 @@ static int netxen_nic_open(struct net_device *netdev)
                         goto err_out_free_sw;
                 }
 
+                if ((adapter->msi_mode != MSI_MODE_MULTIFUNC) ||
+                        (adapter->intr_scheme != INTR_SCHEME_PERPORT)) {
+                        printk(KERN_ERR "%s: Firmware interrupt scheme is "
+                                        "incompatible with driver\n",
+                                        netdev->name);
+                        adapter->driver_mismatch = 1;
+                        goto err_out_free_hw;
+                }
+
                 if (adapter->fw_major < 4) {
                         adapter->crb_addr_cmd_producer =
                                 crb_cmd_producer[adapter->portnum];
                         adapter->crb_addr_cmd_consumer =
                                 crb_cmd_consumer[adapter->portnum];
-                }
 
-                netxen_nic_update_cmd_producer(adapter, 0);
-                netxen_nic_update_cmd_consumer(adapter, 0);
+                        netxen_nic_update_cmd_producer(adapter, 0);
+                        netxen_nic_update_cmd_consumer(adapter, 0);
+                }
 
                 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
                         for (ring = 0; ring < adapter->max_rds_rings; ring++)
@@ -1094,7 +1069,7 @@ static int netxen_nic_open(struct net_device *netdev)
                                   flags, netdev->name, adapter);
                 if (err) {
                         printk(KERN_ERR "request_irq failed with: %d\n", err);
-                        goto err_out_free_hw;
+                        goto err_out_free_rxbuf;
                 }
 
                 adapter->is_up = NETXEN_ADAPTER_UP_MAGIC;
@@ -1113,11 +1088,10 @@ static int netxen_nic_open(struct net_device *netdev)
         netxen_nic_set_link_parameters(adapter);
 
         netdev->set_multicast_list(netdev);
-        if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
-                nx_fw_cmd_set_mtu(adapter, netdev->mtu);
-        else
+        if (adapter->set_mtu)
                 adapter->set_mtu(adapter, netdev->mtu);
 
+        adapter->ahw.linkup = 0;
         mod_timer(&adapter->watchdog_timer, jiffies);
 
         napi_enable(&adapter->napi);
@@ -1129,6 +1103,8 @@ static int netxen_nic_open(struct net_device *netdev)
 
 err_out_free_irq:
         free_irq(adapter->irq, adapter);
+err_out_free_rxbuf:
+        netxen_release_rx_buffers(adapter);
 err_out_free_hw:
         netxen_free_hw_resources(adapter);
 err_out_free_sw:
@@ -1154,10 +1130,8 @@ static int netxen_nic_close(struct net_device *netdev)
 
         netxen_release_tx_buffers(adapter);
 
-        if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) {
-                FLUSH_SCHEDULED_WORK();
-                del_timer_sync(&adapter->watchdog_timer);
-        }
+        FLUSH_SCHEDULED_WORK();
+        del_timer_sync(&adapter->watchdog_timer);
 
         return 0;
 }
@@ -1410,20 +1384,17 @@ static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter)
 
         port = adapter->physical_port;
 
-        if (adapter->ahw.board_type == NETXEN_NIC_GBE) {
-                val = adapter->pci_read_normalize(adapter, CRB_XG_STATE);
-                linkup = (val >> port) & 1;
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
+                val = adapter->pci_read_normalize(adapter, CRB_XG_STATE_P3);
+                val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
+                linkup = (val == XG_LINK_UP_P3);
         } else {
-                if (adapter->fw_major < 4) {
-                        val = adapter->pci_read_normalize(adapter,
-                                        CRB_XG_STATE);
+                val = adapter->pci_read_normalize(adapter, CRB_XG_STATE);
+                if (adapter->ahw.board_type == NETXEN_NIC_GBE)
+                        linkup = (val >> port) & 1;
+                else {
                         val = (val >> port*8) & 0xff;
                         linkup = (val == XG_LINK_UP);
-                } else {
-                        val = adapter->pci_read_normalize(adapter,
-                                CRB_XG_STATE_P3);
-                        val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
-                        linkup = (val == XG_LINK_UP_P3);
                 }
         }
 
@@ -1463,7 +1434,8 @@ void netxen_watchdog_task(struct work_struct *work)
 
         netxen_nic_handle_phy_intr(adapter);
 
-        mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
+        if (netif_running(adapter->netdev))
+                mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
 }
 
 static void netxen_tx_timeout(struct net_device *netdev)
@@ -1523,30 +1495,49 @@ struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev)
         return stats;
 }
 
-static inline void
-netxen_handle_int(struct netxen_adapter *adapter)
-{
-        netxen_nic_disable_int(adapter);
-        napi_schedule(&adapter->napi);
-}
-
 static irqreturn_t netxen_intr(int irq, void *data)
 {
         struct netxen_adapter *adapter = data;
-        u32 our_int = 0;
+        u32 status = 0;
+
+        status = adapter->pci_read_immediate(adapter, ISR_INT_VECTOR);
 
-        our_int = adapter->pci_read_normalize(adapter, CRB_INT_VECTOR);
-        /* not our interrupt */
-        if ((our_int & (0x80 << adapter->portnum)) == 0)
+        if (!(status & adapter->legacy_intr.int_vec_bit))
                 return IRQ_NONE;
 
-        if (adapter->intr_scheme == INTR_SCHEME_PERPORT) {
+        if (adapter->ahw.revision_id >= NX_P3_B1) {
+                /* check interrupt state machine, to be sure */
+                status = adapter->pci_read_immediate(adapter,
+                                ISR_INT_STATE_REG);
+                if (!ISR_LEGACY_INT_TRIGGERED(status))
+                        return IRQ_NONE;
+
+        } else {
+                unsigned long our_int = 0;
+
+                our_int = adapter->pci_read_normalize(adapter, CRB_INT_VECTOR);
+
+                /* not our interrupt */
+                if (!test_and_clear_bit((7 + adapter->portnum), &our_int))
+                        return IRQ_NONE;
+
                 /* claim interrupt */
-                adapter->pci_write_normalize(adapter, CRB_INT_VECTOR,
-                                our_int & ~((u32)(0x80 << adapter->portnum)));
+                adapter->pci_write_normalize(adapter,
+                                CRB_INT_VECTOR, (our_int & 0xffffffff));
         }
 
-        netxen_handle_int(adapter);
+        /* clear interrupt */
+        if (adapter->fw_major < 4)
+                netxen_nic_disable_int(adapter);
+
+        adapter->pci_write_immediate(adapter,
+                        adapter->legacy_intr.tgt_status_reg,
+                        0xffffffff);
+        /* read twice to ensure write is flushed */
+        adapter->pci_read_immediate(adapter, ISR_INT_VECTOR);
+        adapter->pci_read_immediate(adapter, ISR_INT_VECTOR);
+
+        napi_schedule(&adapter->napi);
 
         return IRQ_HANDLED;
 }
@@ -1555,7 +1546,11 @@ static irqreturn_t netxen_msi_intr(int irq, void *data)
 {
         struct netxen_adapter *adapter = data;
 
-        netxen_handle_int(adapter);
+        /* clear interrupt */
+        adapter->pci_write_immediate(adapter,
+                        msi_tgt_status[adapter->ahw.pci_func], 0xffffffff);
+
+        napi_schedule(&adapter->napi);
         return IRQ_HANDLED;
 }
 
diff --git a/drivers/net/netxen/netxen_nic_niu.c b/drivers/net/netxen/netxen_nic_niu.c
index 4cb8f4a1cf4b..27f07f6a45b1 100644
--- a/drivers/net/netxen/netxen_nic_niu.c
+++ b/drivers/net/netxen/netxen_nic_niu.c
@@ -610,6 +610,9 @@ int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
         int i;
         DECLARE_MAC_BUF(mac);
 
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
+                return 0;
+
         for (i = 0; i < 10; i++) {
                 temp[0] = temp[1] = 0;
                 memcpy(temp + 2, addr, 2);
@@ -727,6 +730,9 @@ int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter)
         __u32 mac_cfg0;
         u32 port = adapter->physical_port;
 
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
+                return 0;
+
         if (port > NETXEN_NIU_MAX_GBE_PORTS)
                 return -EINVAL;
         mac_cfg0 = 0;
@@ -743,6 +749,9 @@ int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
         __u32 mac_cfg;
         u32 port = adapter->physical_port;
 
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
+                return 0;
+
         if (port > NETXEN_NIU_MAX_XG_PORTS)
                 return -EINVAL;
 
@@ -755,7 +764,7 @@ int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
 
 /* Set promiscuous mode for a GbE interface */
 int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
-                                    netxen_niu_prom_mode_t mode)
+                u32 mode)
 {
         __u32 reg;
         u32 port = adapter->physical_port;
@@ -819,6 +828,9 @@ int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
         u8 temp[4];
         u32 val;
 
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
+                return 0;
+
         if ((phy < 0) || (phy > NETXEN_NIU_MAX_XG_PORTS))
                 return -EIO;
 
@@ -894,7 +906,7 @@ int netxen_niu_xg_macaddr_get(struct netxen_adapter *adapter,
 #endif  /*  0  */
 
 int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
-                                       netxen_niu_prom_mode_t mode)
+                u32 mode)
 {
         __u32 reg;
         u32 port = adapter->physical_port;
diff --git a/drivers/net/netxen/netxen_nic_phan_reg.h b/drivers/net/netxen/netxen_nic_phan_reg.h
index 3bfa51b62a4f..b293adcc95ab 100644
--- a/drivers/net/netxen/netxen_nic_phan_reg.h
+++ b/drivers/net/netxen/netxen_nic_phan_reg.h
@@ -95,8 +95,8 @@
 #define CRB_HOST_STS_PROD           NETXEN_NIC_REG(0xdc)
 #define CRB_HOST_STS_CONS           NETXEN_NIC_REG(0xe0)
 #define CRB_PEG_CMD_PROD            NETXEN_NIC_REG(0xe4)
-#define CRB_PEG_CMD_CONS            NETXEN_NIC_REG(0xe8)
-#define CRB_HOST_BUFFER_PROD        NETXEN_NIC_REG(0xec)
+#define CRB_PF_LINK_SPEED_1         NETXEN_NIC_REG(0xe8)
+#define CRB_PF_LINK_SPEED_2         NETXEN_NIC_REG(0xec)
 #define CRB_HOST_BUFFER_CONS        NETXEN_NIC_REG(0xf0)
 #define CRB_JUMBO_BUFFER_PROD       NETXEN_NIC_REG(0xf4)
 #define CRB_JUMBO_BUFFER_CONS       NETXEN_NIC_REG(0xf8)
@@ -125,6 +125,8 @@
 #define CRB_SW_INT_MASK_2          NETXEN_NIC_REG(0x1e4)
 #define CRB_SW_INT_MASK_3          NETXEN_NIC_REG(0x1e8)
 
+#define CRB_MAC_BLOCK_START        NETXEN_CAM_RAM(0x1c0)
+
 /*
  * capabilities register, can be used to selectively enable/disable features
  * for backward compability
diff --git a/drivers/net/ni5010.c b/drivers/net/ni5010.c
index a20005c09e07..8e0ca9f4e404 100644
--- a/drivers/net/ni5010.c
+++ b/drivers/net/ni5010.c
@@ -648,7 +648,6 @@ static void ni5010_set_multicast_list(struct net_device *dev)
         PRINTK2((KERN_DEBUG "%s: entering set_multicast_list\n", dev->name));
 
         if (dev->flags&IFF_PROMISC || dev->flags&IFF_ALLMULTI || dev->mc_list) {
-                dev->flags |= IFF_PROMISC;
                 outb(RMD_PROMISC, EDLC_RMODE); /* Enable promiscuous mode */
                 PRINTK((KERN_DEBUG "%s: Entering promiscuous mode\n", dev->name));
         } else {
diff --git a/drivers/net/ni52.c b/drivers/net/ni52.c
index a316dcc8a06d..b9a882d362da 100644
--- a/drivers/net/ni52.c
+++ b/drivers/net/ni52.c
@@ -621,7 +621,7 @@ static int init586(struct net_device *dev)
                 if (num_addrs > len) {
                         printk(KERN_ERR "%s: switching to promisc. mode\n",
                                 dev->name);
-                        dev->flags |= IFF_PROMISC;
+                        writeb(0x01, &cfg_cmd->promisc);
                 }
         }
         if (dev->flags & IFF_PROMISC)
diff --git a/drivers/net/ppp_mppe.c b/drivers/net/ppp_mppe.c
index b35d79449500..88f03c9e9403 100644
--- a/drivers/net/ppp_mppe.c
+++ b/drivers/net/ppp_mppe.c
@@ -46,7 +46,6 @@
 #include <linux/err.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/slab.h>
diff --git a/drivers/net/pppol2tp.c b/drivers/net/pppol2tp.c
index f9298827a76c..ff175e8f36b2 100644
--- a/drivers/net/pppol2tp.c
+++ b/drivers/net/pppol2tp.c
@@ -61,7 +61,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/string.h>
 #include <linux/list.h>
 #include <asm/uaccess.h>
diff --git a/drivers/net/qla3xxx.c b/drivers/net/qla3xxx.c
index e82b37bbd6c3..3cdd07c45b6d 100644
--- a/drivers/net/qla3xxx.c
+++ b/drivers/net/qla3xxx.c
@@ -38,7 +38,7 @@
 
 #define DRV_NAME        "qla3xxx"
 #define DRV_STRING      "QLogic ISP3XXX Network Driver"
-#define DRV_VERSION     "v2.03.00-k4"
+#define DRV_VERSION     "v2.03.00-k5"
 #define PFX             DRV_NAME " "
 
 static const char ql3xxx_driver_name[] = DRV_NAME;
@@ -3495,8 +3495,6 @@ static void ql_set_mac_info(struct ql3_adapter *qdev)
         case ISP_CONTROL_FN0_NET:
                 qdev->mac_index = 0;
                 qdev->mac_ob_opcode = OUTBOUND_MAC_IOCB | func_number;
-                qdev->tcp_ob_opcode = OUTBOUND_TCP_IOCB | func_number;
-                qdev->update_ob_opcode = UPDATE_NCB_IOCB | func_number;
                 qdev->mb_bit_mask = FN0_MA_BITS_MASK;
                 qdev->PHYAddr = PORT0_PHY_ADDRESS;
                 if (port_status & PORT_STATUS_SM0)
@@ -3508,8 +3506,6 @@ static void ql_set_mac_info(struct ql3_adapter *qdev)
         case ISP_CONTROL_FN1_NET:
                 qdev->mac_index = 1;
                 qdev->mac_ob_opcode = OUTBOUND_MAC_IOCB | func_number;
-                qdev->tcp_ob_opcode = OUTBOUND_TCP_IOCB | func_number;
-                qdev->update_ob_opcode = UPDATE_NCB_IOCB | func_number;
                 qdev->mb_bit_mask = FN1_MA_BITS_MASK;
                 qdev->PHYAddr = PORT1_PHY_ADDRESS;
                 if (port_status & PORT_STATUS_SM1)
@@ -3730,14 +3726,6 @@ static int ql3xxx_open(struct net_device *ndev)
         return (ql_adapter_up(qdev));
 }
 
-static void ql3xxx_set_multicast_list(struct net_device *ndev)
-{
-        /*
-         * We are manually parsing the list in the net_device structure.
-         */
-        return;
-}
-
 static int ql3xxx_set_mac_address(struct net_device *ndev, void *p)
 {
         struct ql3_adapter *qdev = (struct ql3_adapter *)netdev_priv(ndev);
@@ -4007,7 +3995,11 @@ static int __devinit ql3xxx_probe(struct pci_dev *pdev,
         ndev->open = ql3xxx_open;
         ndev->hard_start_xmit = ql3xxx_send;
         ndev->stop = ql3xxx_close;
-        ndev->set_multicast_list = ql3xxx_set_multicast_list;
+        /* ndev->set_multicast_list
+         * This device is one side of a two-function adapter
+         * (NIC and iSCSI).  Promiscuous mode setting/clearing is
+         * not allowed from the NIC side.
+         */
         SET_ETHTOOL_OPS(ndev, &ql3xxx_ethtool_ops);
         ndev->set_mac_address = ql3xxx_set_mac_address;
         ndev->tx_timeout = ql3xxx_tx_timeout;
@@ -4040,9 +4032,6 @@ static int __devinit ql3xxx_probe(struct pci_dev *pdev,
 
         ndev->tx_queue_len = NUM_REQ_Q_ENTRIES;
 
-        /* Turn off support for multicasting */
-        ndev->flags &= ~IFF_MULTICAST;
-
         /* Record PCI bus information. */
         ql_get_board_info(qdev);
 
diff --git a/drivers/net/qla3xxx.h b/drivers/net/qla3xxx.h
index 58a086fddec6..7113e71b15a1 100644
--- a/drivers/net/qla3xxx.h
+++ b/drivers/net/qla3xxx.h
@@ -14,24 +14,14 @@
 
 #define OPCODE_OB_MAC_IOCB_FN0          0x01
 #define OPCODE_OB_MAC_IOCB_FN2          0x21
-#define OPCODE_OB_TCP_IOCB_FN0          0x03
-#define OPCODE_OB_TCP_IOCB_FN2          0x23
-#define OPCODE_UPDATE_NCB_IOCB_FN0      0x00
-#define OPCODE_UPDATE_NCB_IOCB_FN2      0x20
 
-#define OPCODE_UPDATE_NCB_IOCB      0xF0
 #define OPCODE_IB_MAC_IOCB          0xF9
 #define OPCODE_IB_3032_MAC_IOCB     0x09
 #define OPCODE_IB_IP_IOCB           0xFA
 #define OPCODE_IB_3032_IP_IOCB      0x0A
-#define OPCODE_IB_TCP_IOCB          0xFB
-#define OPCODE_DUMP_PROTO_IOCB      0xFE
-#define OPCODE_BUFFER_ALERT_IOCB    0xFB
 
 #define OPCODE_FUNC_ID_MASK                 0x30
 #define OUTBOUND_MAC_IOCB                   0x01        /* plus function bits */
-#define OUTBOUND_TCP_IOCB                   0x03        /* plus function bits */
-#define UPDATE_NCB_IOCB                     0x00        /* plus function bits */
 
 #define FN0_MA_BITS_MASK    0x00
 #define FN1_MA_BITS_MASK    0x80
@@ -159,75 +149,6 @@ struct ob_ip_iocb_rsp {
         __le32 reserved2;
 };
 
-struct ob_tcp_iocb_req {
-        u8 opcode;
-
-        u8 flags0;
-#define OB_TCP_IOCB_REQ_P       0x80
-#define OB_TCP_IOCB_REQ_CI      0x20
-#define OB_TCP_IOCB_REQ_H       0x10
-#define OB_TCP_IOCB_REQ_LN      0x08
-#define OB_TCP_IOCB_REQ_K       0x04
-#define OB_TCP_IOCB_REQ_D       0x02
-#define OB_TCP_IOCB_REQ_I       0x01
-
-        u8 flags1;
-#define OB_TCP_IOCB_REQ_OSM     0x40
-#define OB_TCP_IOCB_REQ_URG     0x20
-#define OB_TCP_IOCB_REQ_ACK     0x10
-#define OB_TCP_IOCB_REQ_PSH     0x08
-#define OB_TCP_IOCB_REQ_RST     0x04
-#define OB_TCP_IOCB_REQ_SYN     0x02
-#define OB_TCP_IOCB_REQ_FIN     0x01
-
-        u8 options_len;
-#define OB_TCP_IOCB_REQ_OMASK   0xF0
-#define OB_TCP_IOCB_REQ_SHIFT   4
-
-        __le32 transaction_id;
-        __le32 data_len;
-        __le32 hncb_ptr_low;
-        __le32 hncb_ptr_high;
-        __le32 buf_addr0_low;
-        __le32 buf_addr0_high;
-        __le32 buf_0_len;
-        __le32 buf_addr1_low;
-        __le32 buf_addr1_high;
-        __le32 buf_1_len;
-        __le32 buf_addr2_low;
-        __le32 buf_addr2_high;
-        __le32 buf_2_len;
-        __le32 time_stamp;
-        __le32 reserved1;
-};
-
-struct ob_tcp_iocb_rsp {
-        u8 opcode;
-
-        u8 flags0;
-#define OB_TCP_IOCB_RSP_C       0x20
-#define OB_TCP_IOCB_RSP_H       0x10
-#define OB_TCP_IOCB_RSP_LN      0x08
-#define OB_TCP_IOCB_RSP_K       0x04
-#define OB_TCP_IOCB_RSP_D       0x02
-#define OB_TCP_IOCB_RSP_I       0x01
-
-        u8 flags1;
-#define OB_TCP_IOCB_RSP_E       0x10
-#define OB_TCP_IOCB_RSP_W       0x08
-#define OB_TCP_IOCB_RSP_P       0x04
-#define OB_TCP_IOCB_RSP_T       0x02
-#define OB_TCP_IOCB_RSP_F       0x01
-
-        u8 state;
-#define OB_TCP_IOCB_RSP_SMASK   0xF0
-#define OB_TCP_IOCB_RSP_SHIFT   4
-
-        __le32 transaction_id;
-        __le32 local_ncb_ptr;
-        __le32 reserved0;
-};
-
 struct ib_ip_iocb_rsp {
         u8 opcode;
 #define IB_IP_IOCB_RSP_3032_V   0x80
@@ -256,25 +177,6 @@ struct ib_ip_iocb_rsp {
         __le32 ial_high;
 };
 
-struct ib_tcp_iocb_rsp {
-        u8 opcode;
-        u8 flags;
-#define IB_TCP_IOCB_RSP_P       0x80
-#define IB_TCP_IOCB_RSP_T       0x40
-#define IB_TCP_IOCB_RSP_D       0x20
-#define IB_TCP_IOCB_RSP_N       0x10
-#define IB_TCP_IOCB_RSP_IP      0x03
-#define IB_TCP_FLAG_MASK        0xf0
-#define IB_TCP_FLAG_IOCB_SYN    0x00
-
-#define TCP_IB_RSP_FLAGS(x) (x->flags & ~IB_TCP_FLAG_MASK)
-
-        __le16 length;
-        __le32 hncb_ref_num;
-        __le32 ial_low;
-        __le32 ial_high;
-};
-
 struct net_rsp_iocb {
         u8 opcode;
         u8 flags;
@@ -1266,20 +1168,13 @@ struct ql3_adapter {
         u32 small_buf_release_cnt;
         u32 small_buf_total_size;
 
-        /* ISR related, saves status for DPC. */
-        u32 control_status;
-
         struct eeprom_data nvram_data;
-        struct timer_list ioctl_timer;
         u32 port_link_state;
-        u32 last_rsp_offset;
 
         /* 4022 specific */
         u32 mac_index;          /* Driver's MAC number can be 0 or 1 for first and second networking functions respectively */
         u32 PHYAddr;            /* Address of PHY 0x1e00 Port 0 and 0x1f00 Port 1 */
         u32 mac_ob_opcode;      /* Opcode to use on mac transmission */
-        u32 tcp_ob_opcode;      /* Opcode to use on tcp transmission */
-        u32 update_ob_opcode;   /* Opcode to use for updating NCB */
         u32 mb_bit_mask;        /* MA Bits mask to use on transmission */
         u32 numPorts;
         struct workqueue_struct *workqueue;
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c
index 6531ff565c54..5d86281d9363 100644
--- a/drivers/net/r6040.c
+++ b/drivers/net/r6040.c
@@ -24,7 +24,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/moduleparam.h>
 #include <linux/string.h>
 #include <linux/timer.h>
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 6a06b9503e4f..1c370e6aa641 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -20,7 +20,6 @@
  *  the file called "COPYING".
  */
 
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/dma-mapping.h>
 #include <linux/etherdevice.h>
@@ -34,6 +33,29 @@
 
 #include "sh_eth.h"
 
+/* CPU <-> EDMAC endian convert */
+static inline __u32 cpu_to_edmac(struct sh_eth_private *mdp, u32 x)
+{
+        switch (mdp->edmac_endian) {
+        case EDMAC_LITTLE_ENDIAN:
+                return cpu_to_le32(x);
+        case EDMAC_BIG_ENDIAN:
+                return cpu_to_be32(x);
+        }
+        return x;
+}
+
+static inline __u32 edmac_to_cpu(struct sh_eth_private *mdp, u32 x)
+{
+        switch (mdp->edmac_endian) {
+        case EDMAC_LITTLE_ENDIAN:
+                return le32_to_cpu(x);
+        case EDMAC_BIG_ENDIAN:
+                return be32_to_cpu(x);
+        }
+        return x;
+}
+
 /*
  * Program the hardware MAC address from dev->dev_addr.
  */
@@ -240,7 +262,7 @@ static void sh_eth_ring_format(struct net_device *ndev)
                 /* RX descriptor */
                 rxdesc = &mdp->rx_ring[i];
                 rxdesc->addr = (u32)skb->data & ~0x3UL;
-                rxdesc->status = cpu_to_le32(RD_RACT | RD_RFP);
+                rxdesc->status = cpu_to_edmac(mdp, RD_RACT | RD_RFP);
 
                 /* The size of the buffer is 16 byte boundary. */
                 rxdesc->buffer_length = (mdp->rx_buf_sz + 16) & ~0x0F;
@@ -262,7 +284,7 @@ static void sh_eth_ring_format(struct net_device *ndev)
         mdp->dirty_rx = (u32) (i - RX_RING_SIZE);
 
         /* Mark the last entry as wrapping the ring. */
-        rxdesc->status |= cpu_to_le32(RD_RDEL);
+        rxdesc->status |= cpu_to_edmac(mdp, RD_RDEL);
 
         memset(mdp->tx_ring, 0, tx_ringsize);
 
@@ -270,10 +292,10 @@ static void sh_eth_ring_format(struct net_device *ndev)
         for (i = 0; i < TX_RING_SIZE; i++) {
                 mdp->tx_skbuff[i] = NULL;
                 txdesc = &mdp->tx_ring[i];
-                txdesc->status = cpu_to_le32(TD_TFP);
+                txdesc->status = cpu_to_edmac(mdp, TD_TFP);
                 txdesc->buffer_length = 0;
                 if (i == 0) {
-                        /* Rx descriptor address set */
+                        /* Tx descriptor address set */
                         ctrl_outl((u32)txdesc, ioaddr + TDLAR);
 #if defined(CONFIG_CPU_SUBTYPE_SH7763)
                         ctrl_outl((u32)txdesc, ioaddr + TDFAR);
@@ -281,13 +303,13 @@ static void sh_eth_ring_format(struct net_device *ndev)
                 }
         }
 
-        /* Rx descriptor address set */
+        /* Tx descriptor address set */
 #if defined(CONFIG_CPU_SUBTYPE_SH7763)
         ctrl_outl((u32)txdesc, ioaddr + TDFXR);
         ctrl_outl(0x1, ioaddr + TDFFR);
 #endif
 
-        txdesc->status |= cpu_to_le32(TD_TDLE);
+        txdesc->status |= cpu_to_edmac(mdp, TD_TDLE);
 }
 
 /* Get skb and descriptor buffer */
@@ -455,7 +477,7 @@ static int sh_eth_txfree(struct net_device *ndev)
         for (; mdp->cur_tx - mdp->dirty_tx > 0; mdp->dirty_tx++) {
                 entry = mdp->dirty_tx % TX_RING_SIZE;
                 txdesc = &mdp->tx_ring[entry];
-                if (txdesc->status & cpu_to_le32(TD_TACT))
+                if (txdesc->status & cpu_to_edmac(mdp, TD_TACT))
                         break;
                 /* Free the original skb. */
                 if (mdp->tx_skbuff[entry]) {
@@ -463,9 +485,9 @@ static int sh_eth_txfree(struct net_device *ndev)
                         mdp->tx_skbuff[entry] = NULL;
                         freeNum++;
                 }
-                txdesc->status = cpu_to_le32(TD_TFP);
+                txdesc->status = cpu_to_edmac(mdp, TD_TFP);
                 if (entry >= TX_RING_SIZE - 1)
-                        txdesc->status |= cpu_to_le32(TD_TDLE);
+                        txdesc->status |= cpu_to_edmac(mdp, TD_TDLE);
 
                 mdp->stats.tx_packets++;
                 mdp->stats.tx_bytes += txdesc->buffer_length;
@@ -486,8 +508,8 @@ static int sh_eth_rx(struct net_device *ndev)
         u32 desc_status, reserve = 0;
 
         rxdesc = &mdp->rx_ring[entry];
-        while (!(rxdesc->status & cpu_to_le32(RD_RACT))) {
-                desc_status = le32_to_cpu(rxdesc->status);
+        while (!(rxdesc->status & cpu_to_edmac(mdp, RD_RACT))) {
+                desc_status = edmac_to_cpu(mdp, rxdesc->status);
                 pkt_len = rxdesc->frame_length;
 
                 if (--boguscnt < 0)
@@ -522,7 +544,7 @@ static int sh_eth_rx(struct net_device *ndev)
                         mdp->stats.rx_packets++;
                         mdp->stats.rx_bytes += pkt_len;
                 }
-                rxdesc->status |= cpu_to_le32(RD_RACT);
+                rxdesc->status |= cpu_to_edmac(mdp, RD_RACT);
                 entry = (++mdp->cur_rx) % RX_RING_SIZE;
         }
 
@@ -552,10 +574,10 @@ static int sh_eth_rx(struct net_device *ndev)
                 }
                 if (entry >= RX_RING_SIZE - 1)
                         rxdesc->status |=
-                                cpu_to_le32(RD_RACT | RD_RFP | RD_RDEL);
+                                cpu_to_edmac(mdp, RD_RACT | RD_RFP | RD_RDEL);
                 else
                         rxdesc->status |=
-                                cpu_to_le32(RD_RACT | RD_RFP);
+                                cpu_to_edmac(mdp, RD_RACT | RD_RFP);
         }
 
         /* Restart Rx engine if stopped. */
@@ -931,9 +953,9 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
                 txdesc->buffer_length = skb->len;
 
         if (entry >= TX_RING_SIZE - 1)
-                txdesc->status |= cpu_to_le32(TD_TACT | TD_TDLE);
+                txdesc->status |= cpu_to_edmac(mdp, TD_TACT | TD_TDLE);
         else
-                txdesc->status |= cpu_to_le32(TD_TACT);
+                txdesc->status |= cpu_to_edmac(mdp, TD_TACT);
 
         mdp->cur_tx++;
 
@@ -1159,6 +1181,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
         struct resource *res;
         struct net_device *ndev = NULL;
         struct sh_eth_private *mdp;
+        struct sh_eth_plat_data *pd;
 
         /* get base addr */
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1196,8 +1219,11 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
         mdp = netdev_priv(ndev);
         spin_lock_init(&mdp->lock);
 
+        pd = (struct sh_eth_plat_data *)(pdev->dev.platform_data);
         /* get PHY ID */
-        mdp->phy_id = (int)pdev->dev.platform_data;
+        mdp->phy_id = pd->phy;
+        /* EDMAC endian */
+        mdp->edmac_endian = pd->edmac_endian;
 
         /* set function */
         ndev->open = sh_eth_open;
@@ -1217,12 +1243,16 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
 
         /* First device only init */
         if (!devno) {
+#if defined(ARSTR)
                 /* reset device */
                 ctrl_outl(ARSTR_ARSTR, ARSTR);
                 mdelay(1);
+#endif
 
+#if defined(SH_TSU_ADDR)
                 /* TSU init (Init only)*/
                 sh_eth_tsu_init(SH_TSU_ADDR);
+#endif
         }
 
         /* network device register */
@@ -1240,8 +1270,8 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
                ndev->name, CARDNAME, (u32) ndev->base_addr);
 
         for (i = 0; i < 5; i++)
-                printk(KERN_INFO "%02X:", ndev->dev_addr[i]);
-        printk(KERN_INFO "%02X, IRQ %d.\n", ndev->dev_addr[i], ndev->irq);
+                printk("%02X:", ndev->dev_addr[i]);
+        printk("%02X, IRQ %d.\n", ndev->dev_addr[i], ndev->irq);
 
         platform_set_drvdata(pdev, ndev);
 
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 45ad1b09ca5a..73bc7181cc18 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -30,6 +30,8 @@
 #include <linux/netdevice.h>
 #include <linux/phy.h>
 
+#include <asm/sh_eth.h>
+
 #define CARDNAME        "sh-eth"
 #define TX_TIMEOUT      (5*HZ)
 #define TX_RING_SIZE    64      /* Tx ring size */
@@ -143,10 +145,11 @@
 
 #else /* CONFIG_CPU_SUBTYPE_SH7763 */
 # define RX_OFFSET 2    /* skb offset */
+#ifndef CONFIG_CPU_SUBTYPE_SH7619
 /* Chip base address */
 # define SH_TSU_ADDR  0xA7000804
 # define ARSTR            0xA7000800
-
+#endif
 /* Chip Registers */
 /* E-DMAC */
 # define EDMR   0x0000
@@ -384,7 +387,11 @@ enum FCFTR_BIT {
         FCFTR_RFD1 = 0x00000002, FCFTR_RFD0 = 0x00000001,
 };
 #define FIFO_F_D_RFF    (FCFTR_RFF2|FCFTR_RFF1|FCFTR_RFF0)
+#ifndef CONFIG_CPU_SUBTYPE_SH7619
 #define FIFO_F_D_RFD    (FCFTR_RFD2|FCFTR_RFD1|FCFTR_RFD0)
+#else
+#define FIFO_F_D_RFD    (FCFTR_RFD0)
+#endif
 
 /* Transfer descriptor bit */
 enum TD_STS_BIT {
@@ -414,8 +421,10 @@ enum FELIC_MODE_BIT {
 #ifdef CONFIG_CPU_SUBTYPE_SH7763
 #define ECMR_CHG_DM     (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF |\
                         ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
+#elif CONFIG_CPU_SUBTYPE_SH7619
+#define ECMR_CHG_DM     (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
 #else
-#define ECMR_CHG_DM     (ECMR_ZPF | ECMR_PFR ECMR_RXF | ECMR_TXF | ECMR_MCT)
+#define ECMR_CHG_DM     (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
 #endif
 
 /* ECSR */
@@ -485,7 +494,11 @@ enum RPADIR_BIT {
 
 /* FDR */
 enum FIFO_SIZE_BIT {
+#ifndef CONFIG_CPU_SUBTYPE_SH7619
         FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007,
+#else
+        FIFO_SIZE_T = 0x00000100, FIFO_SIZE_R = 0x00000001,
+#endif
 };
 enum phy_offsets {
         PHY_CTRL = 0, PHY_STAT = 1, PHY_IDT1 = 2, PHY_IDT2 = 3,
@@ -601,7 +614,7 @@ struct sh_eth_txdesc {
 #endif
         u32 addr;               /* TD2 */
         u32 pad1;               /* padding data */
-};
+} __attribute__((aligned(2), packed));
 
 /*
  * The sh ether Rx buffer descriptors.
@@ -618,7 +631,7 @@ struct sh_eth_rxdesc {
 #endif
         u32 addr;               /* RD2 */
         u32 pad0;               /* padding data */
-};
+} __attribute__((aligned(2), packed));
 
 struct sh_eth_private {
         dma_addr_t rx_desc_dma;
@@ -633,6 +646,7 @@ struct sh_eth_private {
         u32 cur_rx, dirty_rx;   /* Producer/consumer ring indices */
         u32 cur_tx, dirty_tx;
         u32 rx_buf_sz;          /* Based on MTU+slack. */
+        int edmac_endian;
         /* MII transceiver section. */
         u32 phy_id;                                     /* PHY ID */
         struct mii_bus *mii_bus;        /* MDIO bus control */
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 5257cf464f1a..e24b25ca1c69 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -24,7 +24,6 @@
 
 #include <linux/crc32.h>
 #include <linux/kernel.h>
-#include <linux/version.h>
 #include <linux/module.h>
 #include <linux/netdevice.h>
 #include <linux/dma-mapping.h>
@@ -275,86 +274,6 @@ static void sky2_power_aux(struct sky2_hw *hw)
                              PC_VAUX_ON | PC_VCC_OFF));
 }
 
-static void sky2_power_state(struct sky2_hw *hw, pci_power_t state)
-{
-        u16 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL);
-        int pex = pci_find_capability(hw->pdev, PCI_CAP_ID_EXP);
-        u32 reg;
-
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
-
-        switch (state) {
-        case PCI_D0:
-                break;
-
-        case PCI_D1:
-                power_control |= 1;
-                break;
-
-        case PCI_D2:
-                power_control |= 2;
-                break;
-
-        case PCI_D3hot:
-        case PCI_D3cold:
-                power_control |= 3;
-                if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
-                        /* additional power saving measurements */
-                        reg = sky2_pci_read32(hw, PCI_DEV_REG4);
-
-                        /* set gating core clock for LTSSM in L1 state */
-                        reg |= P_PEX_LTSSM_STAT(P_PEX_LTSSM_L1_STAT) |
-                                /* auto clock gated scheme controlled by CLKREQ */
-                                P_ASPM_A1_MODE_SELECT |
-                                /* enable Gate Root Core Clock */
-                                P_CLK_GATE_ROOT_COR_ENA;
-
-                        if (pex && (hw->flags & SKY2_HW_CLK_POWER)) {
-                                /* enable Clock Power Management (CLKREQ) */
-                                u16 ctrl = sky2_pci_read16(hw, pex + PCI_EXP_DEVCTL);
-
-                                ctrl |= PCI_EXP_DEVCTL_AUX_PME;
-                                sky2_pci_write16(hw, pex + PCI_EXP_DEVCTL, ctrl);
-                        } else
-                                /* force CLKREQ Enable in Our4 (A1b only) */
-                                reg |= P_ASPM_FORCE_CLKREQ_ENA;
-
-                        /* set Mask Register for Release/Gate Clock */
-                        sky2_pci_write32(hw, PCI_DEV_REG5,
-                                         P_REL_PCIE_EXIT_L1_ST | P_GAT_PCIE_ENTER_L1_ST |
-                                         P_REL_PCIE_RX_EX_IDLE | P_GAT_PCIE_RX_EL_IDLE |
-                                         P_REL_GPHY_LINK_UP | P_GAT_GPHY_LINK_DOWN);
-                } else
-                        sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_CLK_HALT);
-
-                /* put CPU into reset state */
-                sky2_write8(hw,  B28_Y2_ASF_STAT_CMD, HCU_CCSR_ASF_RESET);
-                if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev == CHIP_REV_YU_SU_A0)
-                        /* put CPU into halt state */
-                        sky2_write8(hw, B28_Y2_ASF_STAT_CMD, HCU_CCSR_ASF_HALTED);
-
-                if (pex && !(hw->flags & SKY2_HW_RAM_BUFFER)) {
-                        reg = sky2_pci_read32(hw, PCI_DEV_REG1);
-                        /* force to PCIe L1 */
-                        reg |= PCI_FORCE_PEX_L1;
-                        sky2_pci_write32(hw, PCI_DEV_REG1, reg);
-                }
-                break;
-
-        default:
-                dev_warn(&hw->pdev->dev, PFX "Invalid power state (%d) ",
-                       state);
-                return;
-        }
-
-        power_control |= PCI_PM_CTRL_PME_ENABLE;
-        /* Finally, set the new power state. */
-        sky2_pci_write32(hw, hw->pm_cap + PCI_PM_CTRL, power_control);
-
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
-        sky2_pci_read32(hw, B0_CTST);
-}
-
 static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
 {
         u16 reg;
@@ -709,6 +628,11 @@ static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
         sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
         sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
         sky2_pci_read32(hw, PCI_DEV_REG1);
+
+        if (hw->chip_id == CHIP_ID_YUKON_FE)
+                gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE);
+        else if (hw->flags & SKY2_HW_ADV_POWER_CTL)
+                sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
 }
 
 static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
@@ -741,11 +665,16 @@ static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
 
         if (hw->chip_id != CHIP_ID_YUKON_EC) {
                 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
-                        ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
+                        /* select page 2 to access MAC control register */
+                        gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
 
+                        ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
                         /* enable Power Down */
                         ctrl |= PHY_M_PC_POW_D_ENA;
                         gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
+
+                        /* set page register back to 0 */
+                        gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
                 }
 
                 /* set IEEE compatible Power Down Mode (dev. #4.99) */
@@ -2855,10 +2784,6 @@ static int __devinit sky2_init(struct sky2_hw *hw)
                 hw->flags = SKY2_HW_GIGABIT
                         | SKY2_HW_NEWER_PHY
                         | SKY2_HW_ADV_POWER_CTL;
-
-                /* check for Rev. A1 dev 4200 */
-                if (sky2_read16(hw, Q_ADDR(Q_XA1, Q_WM)) == 0)
-                        hw->flags |= SKY2_HW_CLK_POWER;
                 break;
 
         case CHIP_ID_YUKON_EX:
@@ -2914,12 +2839,6 @@ static int __devinit sky2_init(struct sky2_hw *hw)
         if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
                 hw->flags |= SKY2_HW_FIBRE_PHY;
 
-        hw->pm_cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PM);
-        if (hw->pm_cap == 0) {
-                dev_err(&hw->pdev->dev, "cannot find PowerManagement capability\n");
-                return -EIO;
-        }
-
         hw->ports = 1;
         t8 = sky2_read8(hw, B2_Y2_HW_RES);
         if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
@@ -4512,7 +4431,7 @@ static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
 
         pci_save_state(pdev);
         pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
-        sky2_power_state(hw, pci_choose_state(pdev, state));
+        pci_set_power_state(pdev, pci_choose_state(pdev, state));
 
         return 0;
 }
@@ -4525,7 +4444,9 @@ static int sky2_resume(struct pci_dev *pdev)
         if (!hw)
                 return 0;
 
-        sky2_power_state(hw, PCI_D0);
+        err = pci_set_power_state(pdev, PCI_D0);
+        if (err)
+                goto out;
 
         err = pci_restore_state(pdev);
         if (err)
@@ -4595,7 +4516,7 @@ static void sky2_shutdown(struct pci_dev *pdev)
         pci_enable_wake(pdev, PCI_D3cold, wol);
 
         pci_disable_device(pdev);
-        sky2_power_state(hw, PCI_D3hot);
+        pci_set_power_state(pdev, PCI_D3hot);
 }
 
 static struct pci_driver sky2_driver = {
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 4d9c4a19bb85..92fb24b27d45 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -2072,9 +2072,7 @@ struct sky2_hw {
 #define SKY2_HW_NEW_LE          0x00000020      /* new LSOv2 format */
 #define SKY2_HW_AUTO_TX_SUM     0x00000040      /* new IP decode for Tx */
 #define SKY2_HW_ADV_POWER_CTL   0x00000080      /* additional PHY power regs */
-#define SKY2_HW_CLK_POWER       0x00000100      /* clock power management */
 
-        int                  pm_cap;
         u8                   chip_id;
         u8                   chip_rev;
         u8                   pmd_type;
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index 76c17c28fab4..2abfc2845198 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -222,7 +222,7 @@ static inline void SMC_outsl(struct smc911x_local *lp, int reg,
  */
 #include <linux/dma-mapping.h>
 #include <asm/dma.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 
 static dma_addr_t rx_dmabuf, tx_dmabuf;
 static int rx_dmalen, tx_dmalen;
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index 22209b6f1405..997e7f1d5c6e 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -187,7 +187,7 @@ static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg)
 
 #elif defined(CONFIG_SA1100_ASSABET)
 
-#include <asm/arch/neponset.h>
+#include <mach/neponset.h>
 
 /* We can only do 8-bit reads and writes in the static memory space. */
 #define SMC_CAN_USE_8BIT        1
@@ -339,7 +339,7 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
  * IOBARRIER on entry to their ISR.
  */
 
-#include <asm/arch/constants.h> /* IOBARRIER_VIRT */
+#include <mach/constants.h>     /* IOBARRIER_VIRT */
 
 #define SMC_CAN_USE_8BIT        0
 #define SMC_CAN_USE_16BIT       1
@@ -525,7 +525,7 @@ struct smc_local {
  */
 #include <linux/dma-mapping.h>
 #include <asm/dma.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 
 #ifdef SMC_insl
 #undef SMC_insl
diff --git a/drivers/net/sun3_82586.c b/drivers/net/sun3_82586.c
index 9b2a7f7bb258..e531302d95f5 100644
--- a/drivers/net/sun3_82586.c
+++ b/drivers/net/sun3_82586.c
@@ -425,14 +425,11 @@ static int init586(struct net_device *dev)
                 int len = ((char *) p->iscp - (char *) ptr - 8) / 6;
                 if(num_addrs > len)     {
                         printk("%s: switching to promisc. mode\n",dev->name);
-                        dev->flags|=IFF_PROMISC;
+                        cfg_cmd->promisc = 1;
                 }
         }
         if(dev->flags&IFF_PROMISC)
-        {
-                         cfg_cmd->promisc=1;
-                         dev->flags|=IFF_PROMISC;
-        }
+                cfg_cmd->promisc = 1;
         cfg_cmd->carr_coll      = 0x00;
 
         p->scb->cbl_offset      = make16(cfg_cmd);
diff --git a/drivers/net/tehuti.h b/drivers/net/tehuti.h
index c66dfc9ec1ec..7db48f1cd949 100644
--- a/drivers/net/tehuti.h
+++ b/drivers/net/tehuti.h
@@ -27,7 +27,6 @@
 #include <linux/sched.h>
 #include <linux/tty.h>
 #include <linux/if_vlan.h>
-#include <linux/version.h>
 #include <linux/interrupt.h>
 #include <linux/vmalloc.h>
 #include <asm/byteorder.h>
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index d2439b85a790..71d2c5cfdad9 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -66,8 +66,8 @@
 
 #define DRV_MODULE_NAME         "tg3"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "3.93"
-#define DRV_MODULE_RELDATE      "May 22, 2008"
+#define DRV_MODULE_VERSION      "3.94"
+#define DRV_MODULE_RELDATE      "August 14, 2008"
 
 #define TG3_DEF_MAC_MODE        0
 #define TG3_DEF_RX_MODE         0
@@ -536,6 +536,7 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum)
                 return 0;
 
         switch (locknum) {
+                case TG3_APE_LOCK_GRC:
                 case TG3_APE_LOCK_MEM:
                         break;
                 default:
@@ -573,6 +574,7 @@ static void tg3_ape_unlock(struct tg3 *tp, int locknum)
                 return;
 
         switch (locknum) {
+                case TG3_APE_LOCK_GRC:
                 case TG3_APE_LOCK_MEM:
                         break;
                 default:
@@ -1018,15 +1020,43 @@ static void tg3_mdio_fini(struct tg3 *tp)
 }
 
 /* tp->lock is held. */
+static inline void tg3_generate_fw_event(struct tg3 *tp)
+{
+        u32 val;
+
+        val = tr32(GRC_RX_CPU_EVENT);
+        val |= GRC_RX_CPU_DRIVER_EVENT;
+        tw32_f(GRC_RX_CPU_EVENT, val);
+
+        tp->last_event_jiffies = jiffies;
+}
+
+#define TG3_FW_EVENT_TIMEOUT_USEC 2500
+
+/* tp->lock is held. */
 static void tg3_wait_for_event_ack(struct tg3 *tp)
 {
         int i;
+        unsigned int delay_cnt;
+        long time_remain;
+
+        /* If enough time has passed, no wait is necessary. */
+        time_remain = (long)(tp->last_event_jiffies + 1 +
+                      usecs_to_jiffies(TG3_FW_EVENT_TIMEOUT_USEC)) -
+                      (long)jiffies;
+        if (time_remain < 0)
+                return;
 
-        /* Wait for up to 2.5 milliseconds */
-        for (i = 0; i < 250000; i++) {
+        /* Check if we can shorten the wait time. */
+        delay_cnt = jiffies_to_usecs(time_remain);
+        if (delay_cnt > TG3_FW_EVENT_TIMEOUT_USEC)
+                delay_cnt = TG3_FW_EVENT_TIMEOUT_USEC;
+        delay_cnt = (delay_cnt >> 3) + 1;
+
+        for (i = 0; i < delay_cnt; i++) {
                 if (!(tr32(GRC_RX_CPU_EVENT) & GRC_RX_CPU_DRIVER_EVENT))
                         break;
-                udelay(10);
+                udelay(8);
         }
 }
 
@@ -1075,9 +1105,7 @@ static void tg3_ump_link_report(struct tg3 *tp)
                 val = 0;
         tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 12, val);
 
-        val = tr32(GRC_RX_CPU_EVENT);
-        val |= GRC_RX_CPU_DRIVER_EVENT;
-        tw32_f(GRC_RX_CPU_EVENT, val);
+        tg3_generate_fw_event(tp);
 }
 
 static void tg3_link_report(struct tg3 *tp)
@@ -2124,6 +2152,13 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
                      (tp->tg3_flags & TG3_FLAG_WOL_ENABLE))
                         mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE;
 
+                if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
+                        mac_mode |= tp->mac_mode &
+                                    (MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN);
+                        if (mac_mode & MAC_MODE_APE_TX_EN)
+                                mac_mode |= MAC_MODE_TDE_ENABLE;
+                }
+
                 tw32_f(MAC_MODE, mac_mode);
                 udelay(100);
 
@@ -5493,7 +5528,7 @@ static void tg3_ape_send_event(struct tg3 *tp, u32 event)
                 return;
 
         apedata = tg3_ape_read32(tp, TG3_APE_FW_STATUS);
-        if (apedata != APE_FW_STATUS_READY)
+        if (!(apedata & APE_FW_STATUS_READY))
                 return;
 
         /* Wait for up to 1 millisecond for APE to service previous event. */
@@ -5760,6 +5795,8 @@ static int tg3_chip_reset(struct tg3 *tp)
 
         tg3_mdio_stop(tp);
 
+        tg3_ape_lock(tp, TG3_APE_LOCK_GRC);
+
         /* No matching tg3_nvram_unlock() after this because
          * chip reset below will undo the nvram lock.
          */
@@ -5908,12 +5945,19 @@ static int tg3_chip_reset(struct tg3 *tp)
         } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
                 tp->mac_mode = MAC_MODE_PORT_MODE_GMII;
                 tw32_f(MAC_MODE, tp->mac_mode);
+        } else if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
+                tp->mac_mode &= (MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN);
+                if (tp->mac_mode & MAC_MODE_APE_TX_EN)
+                        tp->mac_mode |= MAC_MODE_TDE_ENABLE;
+                tw32_f(MAC_MODE, tp->mac_mode);
         } else
                 tw32_f(MAC_MODE, 0);
         udelay(40);
 
         tg3_mdio_start(tp);
 
+        tg3_ape_unlock(tp, TG3_APE_LOCK_GRC);
+
         err = tg3_poll_fw(tp);
         if (err)
                 return err;
@@ -5935,6 +5979,7 @@ static int tg3_chip_reset(struct tg3 *tp)
                 tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg);
                 if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
                         tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
+                        tp->last_event_jiffies = jiffies;
                         if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
                                 tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE;
                 }
@@ -5948,15 +5993,12 @@ static void tg3_stop_fw(struct tg3 *tp)
 {
         if ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) &&
            !(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) {
-                u32 val;
-
                 /* Wait for RX cpu to ACK the previous event. */
                 tg3_wait_for_event_ack(tp);
 
                 tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, FWCMD_NICDRV_PAUSE_FW);
-                val = tr32(GRC_RX_CPU_EVENT);
-                val |= GRC_RX_CPU_DRIVER_EVENT;
-                tw32(GRC_RX_CPU_EVENT, val);
+
+                tg3_generate_fw_event(tp);
 
                 /* Wait for RX cpu to ACK this event. */
                 tg3_wait_for_event_ack(tp);
@@ -7406,7 +7448,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
                 udelay(10);
         }
 
-        tp->mac_mode = MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE |
+        if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
+                tp->mac_mode &= MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
+        else
+                tp->mac_mode = 0;
+        tp->mac_mode |= MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE |
                 MAC_MODE_TDE_ENABLE | MAC_MODE_RDE_ENABLE | MAC_MODE_FHDE_ENABLE;
         if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
             !(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
@@ -7840,9 +7886,8 @@ static void tg3_timer(unsigned long __opaque)
          * resets.
          */
         if (!--tp->asf_counter) {
-                if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) {
-                        u32 val;
-
+                if ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) &&
+                    !(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) {
                         tg3_wait_for_event_ack(tp);
 
                         tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX,
@@ -7850,9 +7895,8 @@ static void tg3_timer(unsigned long __opaque)
                         tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
                         /* 5 seconds timeout */
                         tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5);
-                        val = tr32(GRC_RX_CPU_EVENT);
-                        val |= GRC_RX_CPU_DRIVER_EVENT;
-                        tw32_f(GRC_RX_CPU_EVENT, val);
+
+                        tg3_generate_fw_event(tp);
                 }
                 tp->asf_counter = tp->asf_multiplier;
         }
@@ -8422,6 +8466,11 @@ static inline unsigned long get_stat64(tg3_stat64_t *val)
         return ret;
 }
 
+static inline u64 get_estat64(tg3_stat64_t *val)
+{
+       return ((u64)val->high << 32) | ((u64)val->low);
+}
+
 static unsigned long calc_crc_errors(struct tg3 *tp)
 {
         struct tg3_hw_stats *hw_stats = tp->hw_stats;
@@ -8450,7 +8499,7 @@ static unsigned long calc_crc_errors(struct tg3 *tp)
 
 #define ESTAT_ADD(member) \
         estats->member =        old_estats->member + \
-                                get_stat64(&hw_stats->member)
+                                get_estat64(&hw_stats->member)
 
 static struct tg3_ethtool_stats *tg3_get_estats(struct tg3 *tp)
 {
@@ -12416,6 +12465,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
                                        tp->misc_host_ctrl);
         }
 
+        /* Preserve the APE MAC_MODE bits */
+        if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
+                tp->mac_mode = tr32(MAC_MODE) |
+                               MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
+        else
+                tp->mac_mode = TG3_DEF_MAC_MODE;
+
         /* these are limited to 10/100 only */
         if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 &&
              (grc_misc_cfg == 0x8000 || grc_misc_cfg == 0x4000)) ||
@@ -13275,7 +13331,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
         tp->pdev = pdev;
         tp->dev = dev;
         tp->pm_cap = pm_cap;
-        tp->mac_mode = TG3_DEF_MAC_MODE;
         tp->rx_mode = TG3_DEF_RX_MODE;
         tp->tx_mode = TG3_DEF_TX_MODE;
 
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index df07842172b7..f5b8cab8d4b5 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -325,6 +325,8 @@
 #define  MAC_MODE_TDE_ENABLE             0x00200000
 #define  MAC_MODE_RDE_ENABLE             0x00400000
 #define  MAC_MODE_FHDE_ENABLE            0x00800000
+#define  MAC_MODE_APE_RX_EN              0x08000000
+#define  MAC_MODE_APE_TX_EN              0x10000000
 #define MAC_STATUS                      0x00000404
 #define  MAC_STATUS_PCS_SYNCED           0x00000001
 #define  MAC_STATUS_SIGNAL_DET           0x00000002
@@ -1889,6 +1891,7 @@
 #define  APE_EVENT_STATUS_EVENT_PENDING  0x80000000
 
 /* APE convenience enumerations. */
+#define TG3_APE_LOCK_GRC                1
 #define TG3_APE_LOCK_MEM                4
 
 #define TG3_EEPROM_SB_F1R2_MBA_OFF      0x10
@@ -2429,7 +2432,10 @@ struct tg3 {
         struct tg3_ethtool_stats        estats;
         struct tg3_ethtool_stats        estats_prev;
 
+        union {
         unsigned long                   phy_crc_errors;
+        unsigned long                   last_event_jiffies;
+        };
 
         u32                             rx_offset;
         u32                             tg3_flags;
diff --git a/drivers/net/tlan.c b/drivers/net/tlan.c
index 85246ed7cb9c..ec871f646766 100644
--- a/drivers/net/tlan.c
+++ b/drivers/net/tlan.c
@@ -360,8 +360,8 @@ TLan_GetSKB( const struct tlan_list_tag *tag)
 {
         unsigned long addr;
 
-        addr = tag->buffer[8].address;
-        addr |= (tag->buffer[9].address << 16) << 16;
+        addr = tag->buffer[9].address;
+        addr |= (tag->buffer[8].address << 16) << 16;
         return (struct sk_buff *) addr;
 }
 
@@ -1984,7 +1984,6 @@ static void TLan_ResetLists( struct net_device *dev )
         TLanList        *list;
         dma_addr_t      list_phys;
         struct sk_buff  *skb;
-        void            *t = NULL;
 
         priv->txHead = 0;
         priv->txTail = 0;
@@ -2022,7 +2021,8 @@ static void TLan_ResetLists( struct net_device *dev )
                         }
 
                         skb_reserve( skb, NET_IP_ALIGN );
-                        list->buffer[0].address = pci_map_single(priv->pciDev, t,
+                        list->buffer[0].address = pci_map_single(priv->pciDev,
+                                                                 skb->data,
                                                                  TLAN_MAX_FRAME_SIZE,
                                                                  PCI_DMA_FROMDEVICE);
                         TLan_StoreSKB(list, skb);
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index e6bbc639c2d0..6daea0c91862 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -358,6 +358,66 @@ static unsigned int tun_chr_poll(struct file *file, poll_table * wait)
         return mask;
 }
 
+/* prepad is the amount to reserve at front.  len is length after that.
+ * linear is a hint as to how much to copy (usually headers). */
+static struct sk_buff *tun_alloc_skb(size_t prepad, size_t len, size_t linear,
+                                     gfp_t gfp)
+{
+        struct sk_buff *skb;
+        unsigned int i;
+
+        skb = alloc_skb(prepad + len, gfp|__GFP_NOWARN);
+        if (skb) {
+                skb_reserve(skb, prepad);
+                skb_put(skb, len);
+                return skb;
+        }
+
+        /* Under a page?  Don't bother with paged skb. */
+        if (prepad + len < PAGE_SIZE)
+                return NULL;
+
+        /* Start with a normal skb, and add pages. */
+        skb = alloc_skb(prepad + linear, gfp);
+        if (!skb)
+                return NULL;
+
+        skb_reserve(skb, prepad);
+        skb_put(skb, linear);
+
+        len -= linear;
+
+        for (i = 0; i < MAX_SKB_FRAGS; i++) {
+                skb_frag_t *f = &skb_shinfo(skb)->frags[i];
+
+                f->page = alloc_page(gfp|__GFP_ZERO);
+                if (!f->page)
+                        break;
+
+                f->page_offset = 0;
+                f->size = PAGE_SIZE;
+
+                skb->data_len += PAGE_SIZE;
+                skb->len += PAGE_SIZE;
+                skb->truesize += PAGE_SIZE;
+                skb_shinfo(skb)->nr_frags++;
+
+                if (len < PAGE_SIZE) {
+                        len = 0;
+                        break;
+                }
+                len -= PAGE_SIZE;
+        }
+
+        /* Too large, or alloc fail? */
+        if (unlikely(len)) {
+                kfree_skb(skb);
+                skb = NULL;
+        }
+
+        return skb;
+}
+
 /* Get packet from user space buffer */
 static __inline__ ssize_t tun_get_user(struct tun_struct *tun, struct iovec *iv, size_t count)
 {
@@ -391,14 +451,12 @@ static __inline__ ssize_t tun_get_user(struct tun_struct *tun, struct iovec *iv,
                         return -EINVAL;
         }
 
-        if (!(skb = alloc_skb(len + align, GFP_KERNEL))) {
+        if (!(skb = tun_alloc_skb(align, len, gso.hdr_len, GFP_KERNEL))) {
                 tun->dev->stats.rx_dropped++;
                 return -ENOMEM;
         }
 
-        if (align)
-                skb_reserve(skb, align);
-        if (memcpy_fromiovec(skb_put(skb, len), iv, len)) {
+        if (skb_copy_datagram_from_iovec(skb, 0, iv, len)) {
                 tun->dev->stats.rx_dropped++;
                 kfree_skb(skb);
                 return -EFAULT;
@@ -748,6 +806,36 @@ static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr)
         return err;
 }
 
+static int tun_get_iff(struct net *net, struct file *file, struct ifreq *ifr)
+{
+        struct tun_struct *tun = file->private_data;
+
+        if (!tun)
+                return -EBADFD;
+
+        DBG(KERN_INFO "%s: tun_get_iff\n", tun->dev->name);
+
+        strcpy(ifr->ifr_name, tun->dev->name);
+
+        ifr->ifr_flags = 0;
+
+        if (ifr->ifr_flags & TUN_TUN_DEV)
+                ifr->ifr_flags |= IFF_TUN;
+        else
+                ifr->ifr_flags |= IFF_TAP;
+
+        if (tun->flags & TUN_NO_PI)
+                ifr->ifr_flags |= IFF_NO_PI;
+
+        if (tun->flags & TUN_ONE_QUEUE)
+                ifr->ifr_flags |= IFF_ONE_QUEUE;
+
+        if (tun->flags & TUN_VNET_HDR)
+                ifr->ifr_flags |= IFF_VNET_HDR;
+
+        return 0;
+}
+
 /* This is like a cut-down ethtool ops, except done via tun fd so no
  * privs required. */
 static int set_offload(struct net_device *dev, unsigned long arg)
@@ -833,6 +921,15 @@ static int tun_chr_ioctl(struct inode *inode, struct file *file,
         DBG(KERN_INFO "%s: tun_chr_ioctl cmd %d\n", tun->dev->name, cmd);
 
         switch (cmd) {
+        case TUNGETIFF:
+                ret = tun_get_iff(current->nsproxy->net_ns, file, &ifr);
+                if (ret)
+                        return ret;
+
+                if (copy_to_user(argp, &ifr, sizeof(ifr)))
+                        return -EFAULT;
+                break;
+
         case TUNSETNOCSUM:
                 /* Disable/Enable checksum */
                 if (arg)
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c
index 8549f1159a30..734ce0977f02 100644
--- a/drivers/net/typhoon.c
+++ b/drivers/net/typhoon.c
@@ -128,7 +128,6 @@ static const int multicast_filter_limit = 32;
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <linux/in6.h>
-#include <linux/version.h>
 #include <linux/dma-mapping.h>
 
 #include "typhoon.h"
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index 68e198bd538b..0973b6e37024 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -154,17 +154,6 @@ config USB_NET_AX8817X
           This driver creates an interface named "ethX", where X depends on
           what other networking devices you have in use.
 
-config USB_HSO
-        tristate "Option USB High Speed Mobile Devices"
-        depends on USB && RFKILL
-        default n
-        help
-          Choose this option if you have an Option HSDPA/HSUPA card.
-          These cards support downlink speeds of 7.2Mbps or greater.
-
-          To compile this driver as a module, choose M here: the
-          module will be called hso.
-
 config USB_NET_CDCETHER
         tristate "CDC Ethernet support (smart devices such as cable modems)"
         depends on USB_USBNET
@@ -337,5 +326,15 @@ config USB_NET_ZAURUS
           really need this non-conformant variant of CDC Ethernet (or in
           some cases CDC MDLM) protocol, not "g_ether".
 
+config USB_HSO
+        tristate "Option USB High Speed Mobile Devices"
+        depends on USB && RFKILL
+        default n
+        help
+          Choose this option if you have an Option HSDPA/HSUPA card.
+          These cards support downlink speeds of 7.2Mbps or greater.
+
+          To compile this driver as a module, choose M here: the
+          module will be called hso.
 
 endmenu
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c
index 031d07b105af..1b7cac77159e 100644
--- a/drivers/net/usb/hso.c
+++ b/drivers/net/usb/hso.c
@@ -102,8 +102,12 @@
 
 #define MAX_RX_URBS                     2
 
-#define get_serial_by_tty(x)    \
-        (x ? (struct hso_serial *)x->driver_data : NULL)
+static inline struct hso_serial *get_serial_by_tty(struct tty_struct *tty)
+{
+        if (tty)
+                return tty->driver_data;
+        return NULL;
+}
 
 /*****************************************************************************/
 /* Debugging functions                                                       */
@@ -294,24 +298,25 @@ static int hso_get_activity(struct hso_device *hso_dev);
 
 /* #define DEBUG */
 
-#define dev2net(x) (x->port_data.dev_net)
-#define dev2ser(x) (x->port_data.dev_serial)
+static inline struct hso_net *dev2net(struct hso_device *hso_dev)
+{
+        return hso_dev->port_data.dev_net;
+}
+
+static inline struct hso_serial *dev2ser(struct hso_device *hso_dev)
+{
+        return hso_dev->port_data.dev_serial;
+}
 
 /* Debugging functions */
 #ifdef DEBUG
 static void dbg_dump(int line_count, const char *func_name, unsigned char *buf,
                      unsigned int len)
 {
-        u8 i = 0;
+        static char name[255];
 
-        printk(KERN_DEBUG "[%d:%s]: len %d", line_count, func_name, len);
-
-        for (i = 0; i < len; i++) {
-                if (!(i % 16))
-                        printk("\n    0x%03x:  ", i);
-                printk("%02x ", (unsigned char)buf[i]);
-        }
-        printk("\n");
+        sprintf(name, "hso[%d:%s]", line_count, func_name);
+        print_hex_dump_bytes(name, DUMP_PREFIX_NONE, buf, len);
 }
 
 #define DUMP(buf_, len_)        \
@@ -528,13 +533,12 @@ static struct hso_serial *get_serial_by_shared_int_and_type(
 
 static struct hso_serial *get_serial_by_index(unsigned index)
 {
-        struct hso_serial *serial;
+        struct hso_serial *serial = NULL;
         unsigned long flags;
 
-        if (!serial_table[index])
-                return NULL;
         spin_lock_irqsave(&serial_table_lock, flags);
-        serial = dev2ser(serial_table[index]);
+        if (serial_table[index])
+                serial = dev2ser(serial_table[index]);
         spin_unlock_irqrestore(&serial_table_lock, flags);
 
         return serial;
@@ -561,6 +565,7 @@ static int get_free_serial_index(void)
 static void set_serial_by_index(unsigned index, struct hso_serial *serial)
 {
         unsigned long flags;
+
         spin_lock_irqsave(&serial_table_lock, flags);
         if (serial)
                 serial_table[index] = serial->parent;
@@ -569,7 +574,7 @@ static void set_serial_by_index(unsigned index, struct hso_serial *serial)
         spin_unlock_irqrestore(&serial_table_lock, flags);
 }
 
-/* log a meaningfull explanation of an USB status */
+/* log a meaningful explanation of an USB status */
 static void log_usb_status(int status, const char *function)
 {
         char *explanation;
@@ -1103,8 +1108,8 @@ static void hso_serial_close(struct tty_struct *tty, struct file *filp)
         /* reset the rts and dtr */
         /* do the actual close */
         serial->open_count--;
+        kref_put(&serial->parent->ref, hso_serial_ref_free);
         if (serial->open_count <= 0) {
-                kref_put(&serial->parent->ref, hso_serial_ref_free);
                 serial->open_count = 0;
                 if (serial->tty) {
                         serial->tty->driver_data = NULL;
@@ -1467,7 +1472,8 @@ static void hso_std_serial_write_bulk_callback(struct urb *urb)
                 return;
         }
         hso_put_activity(serial->parent);
-        tty_wakeup(serial->tty);
+        if (serial->tty)
+                tty_wakeup(serial->tty);
         hso_kick_transmit(serial);
 
         D1(" ");
@@ -1538,7 +1544,8 @@ static void ctrl_callback(struct urb *urb)
                         clear_bit(HSO_SERIAL_FLAG_RX_SENT, &serial->flags);
         } else {
                 hso_put_activity(serial->parent);
-                tty_wakeup(serial->tty);
+                if (serial->tty)
+                        tty_wakeup(serial->tty);
                 /* response to a write command */
                 hso_kick_transmit(serial);
         }
@@ -2652,7 +2659,7 @@ static void hso_free_interface(struct usb_interface *interface)
                         hso_stop_net_device(network_table[i]);
                         cancel_work_sync(&network_table[i]->async_put_intf);
                         cancel_work_sync(&network_table[i]->async_get_intf);
-                        if(rfk)
+                        if (rfk)
                                 rfkill_unregister(rfk);
                         hso_free_net_device(network_table[i]);
                 }
@@ -2723,7 +2730,7 @@ static int hso_mux_submit_intr_urb(struct hso_shared_int *shared_int,
 }
 
 /* operations setup of the serial interface */
-static struct tty_operations hso_serial_ops = {
+static const struct tty_operations hso_serial_ops = {
         .open = hso_serial_open,
         .close = hso_serial_close,
         .write = hso_serial_write,
diff --git a/drivers/net/usb/pegasus.c b/drivers/net/usb/pegasus.c
index b588c890ea70..a84ba487c713 100644
--- a/drivers/net/usb/pegasus.c
+++ b/drivers/net/usb/pegasus.c
@@ -1285,6 +1285,21 @@ static void check_carrier(struct work_struct *work)
         }
 }
 
+static int pegasus_blacklisted(struct usb_device *udev)
+{
+        struct usb_device_descriptor *udd = &udev->descriptor;
+
+        /* Special quirk to keep the driver from handling the Belkin Bluetooth
+         * dongle which happens to have the same ID.
+         */
+        if ((udd->idVendor == VENDOR_BELKIN && udd->idProduct == 0x0121) &&
+            (udd->bDeviceClass == USB_CLASS_WIRELESS_CONTROLLER) &&
+            (udd->bDeviceProtocol == 1))
+                return 1;
+
+        return 0;
+}
+
 static int pegasus_probe(struct usb_interface *intf,
                          const struct usb_device_id *id)
 {
@@ -1296,6 +1311,12 @@ static int pegasus_probe(struct usb_interface *intf,
         DECLARE_MAC_BUF(mac);
 
         usb_get_dev(dev);
+
+        if (pegasus_blacklisted(dev)) {
+                res = -ENODEV;
+                goto out;
+        }
+
         net = alloc_etherdev(sizeof(struct pegasus));
         if (!net) {
                 dev_err(&intf->dev, "can't allocate %s\n", "device");
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index 370ce30f2f45..007c12970065 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -662,6 +662,10 @@ static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid
         spin_unlock_irq(&vptr->lock);
 }
 
+static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
+{
+        vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
+}
 
 /**
  *      velocity_rx_reset       -       handle a receive reset
@@ -677,16 +681,16 @@ static void velocity_rx_reset(struct velocity_info *vptr)
         struct mac_regs __iomem * regs = vptr->mac_regs;
         int i;
 
-        vptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0;
+        velocity_init_rx_ring_indexes(vptr);
 
         /*
          *      Init state, all RD entries belong to the NIC
          */
         for (i = 0; i < vptr->options.numrx; ++i)
-                vptr->rd_ring[i].rdesc0.len |= OWNED_BY_NIC;
+                vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
 
         writew(vptr->options.numrx, &regs->RBRDU);
-        writel(vptr->rd_pool_dma, &regs->RDBaseLo);
+        writel(vptr->rx.pool_dma, &regs->RDBaseLo);
         writew(0, &regs->RDIdx);
         writew(vptr->options.numrx - 1, &regs->RDCSize);
 }
@@ -779,15 +783,15 @@ static void velocity_init_registers(struct velocity_info *vptr,
 
                 vptr->int_mask = INT_MASK_DEF;
 
-                writel(vptr->rd_pool_dma, &regs->RDBaseLo);
+                writel(vptr->rx.pool_dma, &regs->RDBaseLo);
                 writew(vptr->options.numrx - 1, &regs->RDCSize);
                 mac_rx_queue_run(regs);
                 mac_rx_queue_wake(regs);
 
                 writew(vptr->options.numtx - 1, &regs->TDCSize);
 
-                for (i = 0; i < vptr->num_txq; i++) {
-                        writel(vptr->td_pool_dma[i], &regs->TDBaseLo[i]);
+                for (i = 0; i < vptr->tx.numq; i++) {
+                        writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
                         mac_tx_queue_run(regs, i);
                 }
 
@@ -1047,7 +1051,7 @@ static void __devinit velocity_init_info(struct pci_dev *pdev,
 
         vptr->pdev = pdev;
         vptr->chip_id = info->chip_id;
-        vptr->num_txq = info->txqueue;
+        vptr->tx.numq = info->txqueue;
         vptr->multicast_limit = MCAM_SIZE;
         spin_lock_init(&vptr->lock);
         INIT_LIST_HEAD(&vptr->list);
@@ -1093,14 +1097,14 @@ static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pc
 }
 
 /**
- *      velocity_init_rings     -       set up DMA rings
+ *      velocity_init_dma_rings -       set up DMA rings
  *      @vptr: Velocity to set up
  *
  *      Allocate PCI mapped DMA rings for the receive and transmit layer
  *      to use.
  */
 
-static int velocity_init_rings(struct velocity_info *vptr)
+static int velocity_init_dma_rings(struct velocity_info *vptr)
 {
         struct velocity_opt *opt = &vptr->options;
         const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
@@ -1116,7 +1120,7 @@ static int velocity_init_rings(struct velocity_info *vptr)
          * pci_alloc_consistent() fulfills the requirement for 64 bytes
          * alignment
          */
-        pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->num_txq +
+        pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
                                     rx_ring_size, &pool_dma);
         if (!pool) {
                 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
@@ -1124,15 +1128,15 @@ static int velocity_init_rings(struct velocity_info *vptr)
                 return -ENOMEM;
         }
 
-        vptr->rd_ring = pool;
-        vptr->rd_pool_dma = pool_dma;
+        vptr->rx.ring = pool;
+        vptr->rx.pool_dma = pool_dma;
 
         pool += rx_ring_size;
         pool_dma += rx_ring_size;
 
-        for (i = 0; i < vptr->num_txq; i++) {
-                vptr->td_rings[i] = pool;
-                vptr->td_pool_dma[i] = pool_dma;
+        for (i = 0; i < vptr->tx.numq; i++) {
+                vptr->tx.rings[i] = pool;
+                vptr->tx.pool_dma[i] = pool_dma;
                 pool += tx_ring_size;
                 pool_dma += tx_ring_size;
         }
@@ -1141,18 +1145,18 @@ static int velocity_init_rings(struct velocity_info *vptr)
 }
 
 /**
- *      velocity_free_rings     -       free PCI ring pointers
+ *      velocity_free_dma_rings -       free PCI ring pointers
  *      @vptr: Velocity to free from
  *
  *      Clean up the PCI ring buffers allocated to this velocity.
  */
 
-static void velocity_free_rings(struct velocity_info *vptr)
+static void velocity_free_dma_rings(struct velocity_info *vptr)
 {
         const int size = vptr->options.numrx * sizeof(struct rx_desc) +
-                vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
+                vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
 
-        pci_free_consistent(vptr->pdev, size, vptr->rd_ring, vptr->rd_pool_dma);
+        pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
 }
 
 static void velocity_give_many_rx_descs(struct velocity_info *vptr)
@@ -1164,44 +1168,44 @@ static void velocity_give_many_rx_descs(struct velocity_info *vptr)
          * RD number must be equal to 4X per hardware spec
          * (programming guide rev 1.20, p.13)
          */
-        if (vptr->rd_filled < 4)
+        if (vptr->rx.filled < 4)
                 return;
 
         wmb();
 
-        unusable = vptr->rd_filled & 0x0003;
-        dirty = vptr->rd_dirty - unusable;
-        for (avail = vptr->rd_filled & 0xfffc; avail; avail--) {
+        unusable = vptr->rx.filled & 0x0003;
+        dirty = vptr->rx.dirty - unusable;
+        for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
                 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
-                vptr->rd_ring[dirty].rdesc0.len |= OWNED_BY_NIC;
+                vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
         }
 
-        writew(vptr->rd_filled & 0xfffc, &regs->RBRDU);
-        vptr->rd_filled = unusable;
+        writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
+        vptr->rx.filled = unusable;
 }
 
 static int velocity_rx_refill(struct velocity_info *vptr)
 {
-        int dirty = vptr->rd_dirty, done = 0;
+        int dirty = vptr->rx.dirty, done = 0;
 
         do {
-                struct rx_desc *rd = vptr->rd_ring + dirty;
+                struct rx_desc *rd = vptr->rx.ring + dirty;
 
                 /* Fine for an all zero Rx desc at init time as well */
                 if (rd->rdesc0.len & OWNED_BY_NIC)
                         break;
 
-                if (!vptr->rd_info[dirty].skb) {
+                if (!vptr->rx.info[dirty].skb) {
                         if (velocity_alloc_rx_buf(vptr, dirty) < 0)
                                 break;
                 }
                 done++;
                 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
-        } while (dirty != vptr->rd_curr);
+        } while (dirty != vptr->rx.curr);
 
         if (done) {
-                vptr->rd_dirty = dirty;
-                vptr->rd_filled += done;
+                vptr->rx.dirty = dirty;
+                vptr->rx.filled += done;
         }
 
         return done;
@@ -1209,7 +1213,7 @@ static int velocity_rx_refill(struct velocity_info *vptr)
 
 static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
 {
-        vptr->rx_buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
+        vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
 }
 
 /**
@@ -1224,12 +1228,12 @@ static int velocity_init_rd_ring(struct velocity_info *vptr)
 {
         int ret = -ENOMEM;
 
-        vptr->rd_info = kcalloc(vptr->options.numrx,
+        vptr->rx.info = kcalloc(vptr->options.numrx,
                                 sizeof(struct velocity_rd_info), GFP_KERNEL);
-        if (!vptr->rd_info)
+        if (!vptr->rx.info)
                 goto out;
 
-        vptr->rd_filled = vptr->rd_dirty = vptr->rd_curr = 0;
+        velocity_init_rx_ring_indexes(vptr);
 
         if (velocity_rx_refill(vptr) != vptr->options.numrx) {
                 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
@@ -1255,18 +1259,18 @@ static void velocity_free_rd_ring(struct velocity_info *vptr)
 {
         int i;
 
-        if (vptr->rd_info == NULL)
+        if (vptr->rx.info == NULL)
                 return;
 
         for (i = 0; i < vptr->options.numrx; i++) {
-                struct velocity_rd_info *rd_info = &(vptr->rd_info[i]);
-                struct rx_desc *rd = vptr->rd_ring + i;
+                struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
+                struct rx_desc *rd = vptr->rx.ring + i;
 
                 memset(rd, 0, sizeof(*rd));
 
                 if (!rd_info->skb)
                         continue;
-                pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
+                pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
                                  PCI_DMA_FROMDEVICE);
                 rd_info->skb_dma = (dma_addr_t) NULL;
 
@@ -1274,8 +1278,8 @@ static void velocity_free_rd_ring(struct velocity_info *vptr)
                 rd_info->skb = NULL;
         }
 
-        kfree(vptr->rd_info);
-        vptr->rd_info = NULL;
+        kfree(vptr->rx.info);
+        vptr->rx.info = NULL;
 }
 
 /**
@@ -1293,19 +1297,19 @@ static int velocity_init_td_ring(struct velocity_info *vptr)
         unsigned int j;
 
         /* Init the TD ring entries */
-        for (j = 0; j < vptr->num_txq; j++) {
-                curr = vptr->td_pool_dma[j];
+        for (j = 0; j < vptr->tx.numq; j++) {
+                curr = vptr->tx.pool_dma[j];
 
-                vptr->td_infos[j] = kcalloc(vptr->options.numtx,
+                vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
                                             sizeof(struct velocity_td_info),
                                             GFP_KERNEL);
-                if (!vptr->td_infos[j]) {
+                if (!vptr->tx.infos[j]) {
                         while(--j >= 0)
-                                kfree(vptr->td_infos[j]);
+                                kfree(vptr->tx.infos[j]);
                         return -ENOMEM;
                 }
 
-                vptr->td_tail[j] = vptr->td_curr[j] = vptr->td_used[j] = 0;
+                vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
         }
         return 0;
 }
@@ -1317,7 +1321,7 @@ static int velocity_init_td_ring(struct velocity_info *vptr)
 static void velocity_free_td_ring_entry(struct velocity_info *vptr,
                                                          int q, int n)
 {
-        struct velocity_td_info * td_info = &(vptr->td_infos[q][n]);
+        struct velocity_td_info * td_info = &(vptr->tx.infos[q][n]);
         int i;
 
         if (td_info == NULL)
@@ -1349,15 +1353,15 @@ static void velocity_free_td_ring(struct velocity_info *vptr)
 {
         int i, j;
 
-        for (j = 0; j < vptr->num_txq; j++) {
-                if (vptr->td_infos[j] == NULL)
+        for (j = 0; j < vptr->tx.numq; j++) {
+                if (vptr->tx.infos[j] == NULL)
                         continue;
                 for (i = 0; i < vptr->options.numtx; i++) {
                         velocity_free_td_ring_entry(vptr, j, i);
 
                 }
-                kfree(vptr->td_infos[j]);
-                vptr->td_infos[j] = NULL;
+                kfree(vptr->tx.infos[j]);
+                vptr->tx.infos[j] = NULL;
         }
 }
 
@@ -1374,13 +1378,13 @@ static void velocity_free_td_ring(struct velocity_info *vptr)
 static int velocity_rx_srv(struct velocity_info *vptr, int status)
 {
         struct net_device_stats *stats = &vptr->stats;
-        int rd_curr = vptr->rd_curr;
+        int rd_curr = vptr->rx.curr;
         int works = 0;
 
         do {
-                struct rx_desc *rd = vptr->rd_ring + rd_curr;
+                struct rx_desc *rd = vptr->rx.ring + rd_curr;
 
-                if (!vptr->rd_info[rd_curr].skb)
+                if (!vptr->rx.info[rd_curr].skb)
                         break;
 
                 if (rd->rdesc0.len & OWNED_BY_NIC)
@@ -1412,7 +1416,7 @@ static int velocity_rx_srv(struct velocity_info *vptr, int status)
                         rd_curr = 0;
         } while (++works <= 15);
 
-        vptr->rd_curr = rd_curr;
+        vptr->rx.curr = rd_curr;
 
         if ((works > 0) && (velocity_rx_refill(vptr) > 0))
                 velocity_give_many_rx_descs(vptr);
@@ -1510,8 +1514,8 @@ static int velocity_receive_frame(struct velocity_info *vptr, int idx)
 {
         void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
         struct net_device_stats *stats = &vptr->stats;
-        struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
-        struct rx_desc *rd = &(vptr->rd_ring[idx]);
+        struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
+        struct rx_desc *rd = &(vptr->rx.ring[idx]);
         int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
         struct sk_buff *skb;
 
@@ -1527,7 +1531,7 @@ static int velocity_receive_frame(struct velocity_info *vptr, int idx)
         skb = rd_info->skb;
 
         pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
-                                    vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
+                                    vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
 
         /*
          *      Drop frame not meeting IEEE 802.3
@@ -1550,7 +1554,7 @@ static int velocity_receive_frame(struct velocity_info *vptr, int idx)
                 rd_info->skb = NULL;
         }
 
-        pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
+        pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
                    PCI_DMA_FROMDEVICE);
 
         skb_put(skb, pkt_len - 4);
@@ -1580,10 +1584,10 @@ static int velocity_receive_frame(struct velocity_info *vptr, int idx)
 
 static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
 {
-        struct rx_desc *rd = &(vptr->rd_ring[idx]);
-        struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
+        struct rx_desc *rd = &(vptr->rx.ring[idx]);
+        struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
 
-        rd_info->skb = netdev_alloc_skb(vptr->dev, vptr->rx_buf_sz + 64);
+        rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
         if (rd_info->skb == NULL)
                 return -ENOMEM;
 
@@ -1592,14 +1596,15 @@ static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
          *      64byte alignment.
          */
         skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
-        rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
+        rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
+                                        vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
 
         /*
          *      Fill in the descriptor to match
-         */
+         */
 
         *((u32 *) & (rd->rdesc0)) = 0;
-        rd->size = cpu_to_le16(vptr->rx_buf_sz) | RX_INTEN;
+        rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
         rd->pa_low = cpu_to_le32(rd_info->skb_dma);
         rd->pa_high = 0;
         return 0;
@@ -1625,15 +1630,15 @@ static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
         struct velocity_td_info *tdinfo;
         struct net_device_stats *stats = &vptr->stats;
 
-        for (qnum = 0; qnum < vptr->num_txq; qnum++) {
-                for (idx = vptr->td_tail[qnum]; vptr->td_used[qnum] > 0;
+        for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
+                for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
                         idx = (idx + 1) % vptr->options.numtx) {
 
                         /*
                          *      Get Tx Descriptor
                          */
-                        td = &(vptr->td_rings[qnum][idx]);
-                        tdinfo = &(vptr->td_infos[qnum][idx]);
+                        td = &(vptr->tx.rings[qnum][idx]);
+                        tdinfo = &(vptr->tx.infos[qnum][idx]);
 
                         if (td->tdesc0.len & OWNED_BY_NIC)
                                 break;
@@ -1657,9 +1662,9 @@ static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
                                 stats->tx_bytes += tdinfo->skb->len;
                         }
                         velocity_free_tx_buf(vptr, tdinfo);
-                        vptr->td_used[qnum]--;
+                        vptr->tx.used[qnum]--;
                 }
-                vptr->td_tail[qnum] = idx;
+                vptr->tx.tail[qnum] = idx;
 
                 if (AVAIL_TD(vptr, qnum) < 1) {
                         full = 1;
@@ -1846,6 +1851,40 @@ static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_
         tdinfo->skb = NULL;
 }
 
+static int velocity_init_rings(struct velocity_info *vptr, int mtu)
+{
+        int ret;
+
+        velocity_set_rxbufsize(vptr, mtu);
+
+        ret = velocity_init_dma_rings(vptr);
+        if (ret < 0)
+                goto out;
+
+        ret = velocity_init_rd_ring(vptr);
+        if (ret < 0)
+                goto err_free_dma_rings_0;
+
+        ret = velocity_init_td_ring(vptr);
+        if (ret < 0)
+                goto err_free_rd_ring_1;
+out:
+        return ret;
+
+err_free_rd_ring_1:
+        velocity_free_rd_ring(vptr);
+err_free_dma_rings_0:
+        velocity_free_dma_rings(vptr);
+        goto out;
+}
+
+static void velocity_free_rings(struct velocity_info *vptr)
+{
+        velocity_free_td_ring(vptr);
+        velocity_free_rd_ring(vptr);
+        velocity_free_dma_rings(vptr);
+}
+
 /**
  *      velocity_open           -       interface activation callback
  *      @dev: network layer device to open
@@ -1862,20 +1901,10 @@ static int velocity_open(struct net_device *dev)
         struct velocity_info *vptr = netdev_priv(dev);
         int ret;
 
-        velocity_set_rxbufsize(vptr, dev->mtu);
-
-        ret = velocity_init_rings(vptr);
+        ret = velocity_init_rings(vptr, dev->mtu);
         if (ret < 0)
                 goto out;
 
-        ret = velocity_init_rd_ring(vptr);
-        if (ret < 0)
-                goto err_free_desc_rings;
-
-        ret = velocity_init_td_ring(vptr);
-        if (ret < 0)
-                goto err_free_rd_ring;
-
         /* Ensure chip is running */
         pci_set_power_state(vptr->pdev, PCI_D0);
 
@@ -1888,7 +1917,8 @@ static int velocity_open(struct net_device *dev)
         if (ret < 0) {
                 /* Power down the chip */
                 pci_set_power_state(vptr->pdev, PCI_D3hot);
-                goto err_free_td_ring;
+                velocity_free_rings(vptr);
+                goto out;
         }
 
         mac_enable_int(vptr->mac_regs);
@@ -1896,14 +1926,6 @@ static int velocity_open(struct net_device *dev)
         vptr->flags |= VELOCITY_FLAGS_OPENED;
 out:
         return ret;
-
-err_free_td_ring:
-        velocity_free_td_ring(vptr);
-err_free_rd_ring:
-        velocity_free_rd_ring(vptr);
-err_free_desc_rings:
-        velocity_free_rings(vptr);
-        goto out;
 }
 
 /**
@@ -1919,50 +1941,72 @@ err_free_desc_rings:
 static int velocity_change_mtu(struct net_device *dev, int new_mtu)
 {
         struct velocity_info *vptr = netdev_priv(dev);
-        unsigned long flags;
-        int oldmtu = dev->mtu;
         int ret = 0;
 
         if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
                 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
                                 vptr->dev->name);
-                return -EINVAL;
+                ret = -EINVAL;
+                goto out_0;
         }
 
         if (!netif_running(dev)) {
                 dev->mtu = new_mtu;
-                return 0;
+                goto out_0;
         }
 
-        if (new_mtu != oldmtu) {
+        if (dev->mtu != new_mtu) {
+                struct velocity_info *tmp_vptr;
+                unsigned long flags;
+                struct rx_info rx;
+                struct tx_info tx;
+
+                tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
+                if (!tmp_vptr) {
+                        ret = -ENOMEM;
+                        goto out_0;
+                }
+
+                tmp_vptr->dev = dev;
+                tmp_vptr->pdev = vptr->pdev;
+                tmp_vptr->options = vptr->options;
+                tmp_vptr->tx.numq = vptr->tx.numq;
+
+                ret = velocity_init_rings(tmp_vptr, new_mtu);
+                if (ret < 0)
+                        goto out_free_tmp_vptr_1;
+
                 spin_lock_irqsave(&vptr->lock, flags);
 
                 netif_stop_queue(dev);
                 velocity_shutdown(vptr);
 
-                velocity_free_td_ring(vptr);
-                velocity_free_rd_ring(vptr);
+                rx = vptr->rx;
+                tx = vptr->tx;
 
-                dev->mtu = new_mtu;
+                vptr->rx = tmp_vptr->rx;
+                vptr->tx = tmp_vptr->tx;
 
-                velocity_set_rxbufsize(vptr, new_mtu);
+                tmp_vptr->rx = rx;
+                tmp_vptr->tx = tx;
 
-                ret = velocity_init_rd_ring(vptr);
-                if (ret < 0)
-                        goto out_unlock;
+                dev->mtu = new_mtu;
 
-                ret = velocity_init_td_ring(vptr);
-                if (ret < 0)
-                        goto out_unlock;
+                velocity_give_many_rx_descs(vptr);
 
                 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
 
                 mac_enable_int(vptr->mac_regs);
                 netif_start_queue(dev);
-out_unlock:
+
                 spin_unlock_irqrestore(&vptr->lock, flags);
-        }
 
+                velocity_free_rings(tmp_vptr);
+
+out_free_tmp_vptr_1:
+                kfree(tmp_vptr);
+        }
+out_0:
         return ret;
 }
 
@@ -2008,9 +2052,6 @@ static int velocity_close(struct net_device *dev)
         /* Power down the chip */
         pci_set_power_state(vptr->pdev, PCI_D3hot);
 
-        /* Free the resources */
-        velocity_free_td_ring(vptr);
-        velocity_free_rd_ring(vptr);
         velocity_free_rings(vptr);
 
         vptr->flags &= (~VELOCITY_FLAGS_OPENED);
@@ -2056,9 +2097,9 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
 
         spin_lock_irqsave(&vptr->lock, flags);
 
-        index = vptr->td_curr[qnum];
-        td_ptr = &(vptr->td_rings[qnum][index]);
-        tdinfo = &(vptr->td_infos[qnum][index]);
+        index = vptr->tx.curr[qnum];
+        td_ptr = &(vptr->tx.rings[qnum][index]);
+        tdinfo = &(vptr->tx.infos[qnum][index]);
 
         td_ptr->tdesc1.TCR = TCR0_TIC;
         td_ptr->td_buf[0].size &= ~TD_QUEUE;
@@ -2071,9 +2112,9 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
                         skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
                         tdinfo->skb_dma[0] = tdinfo->buf_dma;
                         td_ptr->tdesc0.len = len;
-                        td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
-                        td_ptr->td_buf[0].pa_high = 0;
-                        td_ptr->td_buf[0].size = len;   /* queue is 0 anyway */
+                        td_ptr->tx.buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
+                        td_ptr->tx.buf[0].pa_high = 0;
+                        td_ptr->tx.buf[0].size = len;   /* queue is 0 anyway */
                         tdinfo->nskb_dma = 1;
                 } else {
                         int i = 0;
@@ -2084,9 +2125,9 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
                         td_ptr->tdesc0.len = len;
 
                         /* FIXME: support 48bit DMA later */
-                        td_ptr->td_buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
-                        td_ptr->td_buf[i].pa_high = 0;
-                        td_ptr->td_buf[i].size = cpu_to_le16(skb_headlen(skb));
+                        td_ptr->tx.buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
+                        td_ptr->tx.buf[i].pa_high = 0;
+                        td_ptr->tx.buf[i].size = cpu_to_le16(skb_headlen(skb));
 
                         for (i = 0; i < nfrags; i++) {
                                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
@@ -2094,9 +2135,9 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
 
                                 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
 
-                                td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
-                                td_ptr->td_buf[i + 1].pa_high = 0;
-                                td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size);
+                                td_ptr->tx.buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
+                                td_ptr->tx.buf[i + 1].pa_high = 0;
+                                td_ptr->tx.buf[i + 1].size = cpu_to_le16(frag->size);
                         }
                         tdinfo->nskb_dma = i - 1;
                 }
@@ -2142,13 +2183,13 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
                 if (prev < 0)
                         prev = vptr->options.numtx - 1;
                 td_ptr->tdesc0.len |= OWNED_BY_NIC;
-                vptr->td_used[qnum]++;
-                vptr->td_curr[qnum] = (index + 1) % vptr->options.numtx;
+                vptr->tx.used[qnum]++;
+                vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
 
                 if (AVAIL_TD(vptr, qnum) < 1)
                         netif_stop_queue(dev);
 
-                td_ptr = &(vptr->td_rings[qnum][prev]);
+                td_ptr = &(vptr->tx.rings[qnum][prev]);
                 td_ptr->td_buf[0].size |= TD_QUEUE;
                 mac_tx_queue_wake(vptr->mac_regs, qnum);
         }
@@ -3405,8 +3446,8 @@ static int velocity_resume(struct pci_dev *pdev)
 
         velocity_tx_srv(vptr, 0);
 
-        for (i = 0; i < vptr->num_txq; i++) {
-                if (vptr->td_used[i]) {
+        for (i = 0; i < vptr->tx.numq; i++) {
+                if (vptr->tx.used[i]) {
                         mac_tx_queue_wake(vptr->mac_regs, i);
                 }
         }
diff --git a/drivers/net/via-velocity.h b/drivers/net/via-velocity.h
index 86446147284c..1b95b04c9257 100644
--- a/drivers/net/via-velocity.h
+++ b/drivers/net/via-velocity.h
@@ -1494,6 +1494,10 @@ struct velocity_opt {
         u32 flags;
 };
 
+#define AVAIL_TD(p,q)   ((p)->options.numtx-((p)->tx.used[(q)]))
+
+#define GET_RD_BY_IDX(vptr, idx)   (vptr->rd_ring[idx])
+
 struct velocity_info {
         struct list_head list;
 
@@ -1501,9 +1505,6 @@ struct velocity_info {
         struct net_device *dev;
         struct net_device_stats stats;
 
-        dma_addr_t rd_pool_dma;
-        dma_addr_t td_pool_dma[TX_QUEUE_NO];
-
         struct vlan_group    *vlgrp;
         u8 ip_addr[4];
         enum chip_type chip_id;
@@ -1512,25 +1513,29 @@ struct velocity_info {
         unsigned long memaddr;
         unsigned long ioaddr;
 
-        u8 rev_id;
-
-#define AVAIL_TD(p,q)   ((p)->options.numtx-((p)->td_used[(q)]))
+        struct tx_info {
+                int numq;
+
+                /* FIXME: the locality of the data seems rather poor. */
+                int used[TX_QUEUE_NO];
+                int curr[TX_QUEUE_NO];
+                int tail[TX_QUEUE_NO];
+                struct tx_desc *rings[TX_QUEUE_NO];
+                struct velocity_td_info *infos[TX_QUEUE_NO];
+                dma_addr_t pool_dma[TX_QUEUE_NO];
+        } tx;
+
+        struct rx_info {
+                int buf_sz;
+
+                int dirty;
+                int curr;
+                u32 filled;
+                struct rx_desc *ring;
+                struct velocity_rd_info *info;  /* It's an array */
+                dma_addr_t pool_dma;
+        } rx;
 
-        int num_txq;
-
-        volatile int td_used[TX_QUEUE_NO];
-        int td_curr[TX_QUEUE_NO];
-        int td_tail[TX_QUEUE_NO];
-        struct tx_desc *td_rings[TX_QUEUE_NO];
-        struct velocity_td_info *td_infos[TX_QUEUE_NO];
-
-        int rd_curr;
-        int rd_dirty;
-        u32 rd_filled;
-        struct rx_desc *rd_ring;
-        struct velocity_rd_info *rd_info;       /* It's an array */
-
-#define GET_RD_BY_IDX(vptr, idx)   (vptr->rd_ring[idx])
         u32 mib_counter[MAX_HW_MIB_COUNTER];
         struct velocity_opt options;
 
@@ -1538,7 +1543,6 @@ struct velocity_info {
 
         u32 flags;
 
-        int rx_buf_sz;
         u32 mii_status;
         u32 phy_id;
         int multicast_limit;
@@ -1554,8 +1558,8 @@ struct velocity_info {
         struct velocity_context context;
 
         u32 ticks;
-        u32 rx_bytes;
 
+        u8 rev_id;
 };
 
 /**
diff --git a/drivers/net/wan/Kconfig b/drivers/net/wan/Kconfig
index 846be60e7821..2ae2ec40015d 100644
--- a/drivers/net/wan/Kconfig
+++ b/drivers/net/wan/Kconfig
@@ -25,7 +25,7 @@ if WAN
 # There is no way to detect a comtrol sv11 - force it modular for now.
 config HOSTESS_SV11
         tristate "Comtrol Hostess SV-11 support"
-        depends on ISA && m && ISA_DMA_API && INET
+        depends on ISA && m && ISA_DMA_API && INET && HDLC
         help
           Driver for Comtrol Hostess SV-11 network card which
           operates on low speed synchronous serial links at up to
@@ -37,7 +37,7 @@ config HOSTESS_SV11
 # The COSA/SRP driver has not been tested as non-modular yet.
 config COSA
         tristate "COSA/SRP sync serial boards support"
-        depends on ISA && m && ISA_DMA_API
+        depends on ISA && m && ISA_DMA_API && HDLC
         ---help---
           Driver for COSA and SRP synchronous serial boards.
 
@@ -61,7 +61,7 @@ config COSA
 #
 config LANMEDIA
         tristate "LanMedia Corp. SSI/V.35, T1/E1, HSSI, T3 boards"
-        depends on PCI && VIRT_TO_BUS
+        depends on PCI && VIRT_TO_BUS && HDLC
         ---help---
           Driver for the following Lan Media family of serial boards:
 
@@ -78,9 +78,8 @@ config LANMEDIA
           - LMC 5245 board connects directly to a T3 circuit saving the
           additional external hardware.
 
-          To change setting such as syncPPP vs Cisco HDLC or clock source you
-          will need lmcctl.  It is available at <ftp://ftp.lanmedia.com/>
-          (broken link).
+          To change setting such as clock source you will need lmcctl.
+          It is available at <ftp://ftp.lanmedia.com/> (broken link).
 
           To compile this driver as a module, choose M here: the
           module will be called lmc.
@@ -88,7 +87,7 @@ config LANMEDIA
 # There is no way to detect a Sealevel board. Force it modular
 config SEALEVEL_4021
         tristate "Sealevel Systems 4021 support"
-        depends on ISA && m && ISA_DMA_API && INET
+        depends on ISA && m && ISA_DMA_API && INET && HDLC
         help
           This is a driver for the Sealevel Systems ACB 56 serial I/O adapter.
 
@@ -154,8 +153,6 @@ config HDLC_PPP
         help
           Generic HDLC driver supporting PPP over WAN connections.
 
-          It will be replaced by new PPP implementation in Linux 2.6.26.
-
           If unsure, say N.
 
 config HDLC_X25
diff --git a/drivers/net/wan/Makefile b/drivers/net/wan/Makefile
index d61fef36afc9..102549605d09 100644
--- a/drivers/net/wan/Makefile
+++ b/drivers/net/wan/Makefile
@@ -21,12 +21,11 @@ pc300-y				:= pc300_drv.o
 pc300-$(CONFIG_PC300_MLPPP)     += pc300_tty.o
 pc300-objs                      := $(pc300-y)
 
-obj-$(CONFIG_HOSTESS_SV11)      += z85230.o     syncppp.o       hostess_sv11.o
-obj-$(CONFIG_SEALEVEL_4021)     += z85230.o     syncppp.o       sealevel.o
-obj-$(CONFIG_COSA)              +=              syncppp.o       cosa.o
-obj-$(CONFIG_FARSYNC)           +=              syncppp.o       farsync.o
-obj-$(CONFIG_DSCC4)             +=                              dscc4.o
-obj-$(CONFIG_LANMEDIA)          +=              syncppp.o
+obj-$(CONFIG_HOSTESS_SV11)      += z85230.o     hostess_sv11.o
+obj-$(CONFIG_SEALEVEL_4021)     += z85230.o     sealevel.o
+obj-$(CONFIG_COSA)              += cosa.o
+obj-$(CONFIG_FARSYNC)           += farsync.o
+obj-$(CONFIG_DSCC4)             += dscc4.o
 obj-$(CONFIG_X25_ASY)           += x25_asy.o
 
 obj-$(CONFIG_LANMEDIA)          += lmc/
diff --git a/drivers/net/wan/cosa.c b/drivers/net/wan/cosa.c
index f7d3349dc3ec..f14051556c87 100644
--- a/drivers/net/wan/cosa.c
+++ b/drivers/net/wan/cosa.c
@@ -2,6 +2,7 @@
 
 /*
  *  Copyright (C) 1995-1997  Jan "Yenya" Kasprzak <kas@fi.muni.cz>
+ *  Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -54,7 +55,7 @@
  *
  * The Linux driver (unlike the present *BSD drivers :-) can work even
  * for the COSA and SRP in one computer and allows each channel to work
- * in one of the three modes (character device, Cisco HDLC, Sync PPP).
+ * in one of the two modes (character or network device).
  *
  * AUTHOR
  *
@@ -72,12 +73,6 @@
  * The Comtrol Hostess SV11 driver by Alan Cox
  * The Sync PPP/Cisco HDLC layer (syncppp.c) ported to Linux by Alan Cox
  */
-/*
- *     5/25/1999 : Marcelo Tosatti <marcelo@conectiva.com.br>
- *             fixed a deadlock in cosa_sppp_open
- */
-
-/* ---------- Headers, macros, data structures ---------- */
 
 #include <linux/module.h>
 #include <linux/kernel.h>
@@ -86,6 +81,7 @@
 #include <linux/fs.h>
 #include <linux/interrupt.h>
 #include <linux/delay.h>
+#include <linux/hdlc.h>
 #include <linux/errno.h>
 #include <linux/ioport.h>
 #include <linux/netdevice.h>
@@ -93,14 +89,12 @@
 #include <linux/mutex.h>
 #include <linux/device.h>
 #include <linux/smp_lock.h>
-
-#undef COSA_SLOW_IO     /* for testing purposes only */
-
 #include <asm/io.h>
 #include <asm/dma.h>
 #include <asm/byteorder.h>
 
-#include <net/syncppp.h>
+#undef COSA_SLOW_IO     /* for testing purposes only */
+
 #include "cosa.h"
 
 /* Maximum length of the identification string. */
@@ -112,7 +106,6 @@
 /* Per-channel data structure */
 
 struct channel_data {
-        void *if_ptr;   /* General purpose pointer (used by SPPP) */
         int usage;      /* Usage count; >0 for chrdev, -1 for netdev */
         int num;        /* Number of the channel */
         struct cosa_data *cosa; /* Pointer to the per-card structure */
@@ -136,10 +129,9 @@ struct channel_data {
         wait_queue_head_t txwaitq, rxwaitq;
         int tx_status, rx_status;
 
-        /* SPPP/HDLC device parts */
-        struct ppp_device pppdev;
+        /* generic HDLC device parts */
+        struct net_device *netdev;
         struct sk_buff *rx_skb, *tx_skb;
-        struct net_device_stats stats;
 };
 
 /* cosa->firmware_status bits */
@@ -281,21 +273,19 @@ static int cosa_start_tx(struct channel_data *channel, char *buf, int size);
 static void cosa_kick(struct cosa_data *cosa);
 static int cosa_dma_able(struct channel_data *chan, char *buf, int data);
 
-/* SPPP/HDLC stuff */
-static void sppp_channel_init(struct channel_data *chan);
-static void sppp_channel_delete(struct channel_data *chan);
-static int cosa_sppp_open(struct net_device *d);
-static int cosa_sppp_close(struct net_device *d);
-static void cosa_sppp_timeout(struct net_device *d);
-static int cosa_sppp_tx(struct sk_buff *skb, struct net_device *d);
-static char *sppp_setup_rx(struct channel_data *channel, int size);
-static int sppp_rx_done(struct channel_data *channel);
-static int sppp_tx_done(struct channel_data *channel, int size);
-static int cosa_sppp_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
-static struct net_device_stats *cosa_net_stats(struct net_device *dev);
+/* Network device stuff */
+static int cosa_net_attach(struct net_device *dev, unsigned short encoding,
+                           unsigned short parity);
+static int cosa_net_open(struct net_device *d);
+static int cosa_net_close(struct net_device *d);
+static void cosa_net_timeout(struct net_device *d);
+static int cosa_net_tx(struct sk_buff *skb, struct net_device *d);
+static char *cosa_net_setup_rx(struct channel_data *channel, int size);
+static int cosa_net_rx_done(struct channel_data *channel);
+static int cosa_net_tx_done(struct channel_data *channel, int size);
+static int cosa_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
 
 /* Character device */
-static void chardev_channel_init(struct channel_data *chan);
 static char *chrdev_setup_rx(struct channel_data *channel, int size);
 static int chrdev_rx_done(struct channel_data *channel);
 static int chrdev_tx_done(struct channel_data *channel, int size);
@@ -357,17 +347,17 @@ static void debug_status_in(struct cosa_data *cosa, int status);
 static void debug_status_out(struct cosa_data *cosa, int status);
 #endif
 
-
+static inline struct channel_data* dev_to_chan(struct net_device *dev)
+{
+        return (struct channel_data *)dev_to_hdlc(dev)->priv;
+}
+
 /* ---------- Initialization stuff ---------- */
 
 static int __init cosa_init(void)
 {
         int i, err = 0;
 
-        printk(KERN_INFO "cosa v1.08 (c) 1997-2000 Jan Kasprzak <kas@fi.muni.cz>\n");
-#ifdef CONFIG_SMP
-        printk(KERN_INFO "cosa: SMP found. Please mail any success/failure reports to the author.\n");
-#endif
         if (cosa_major > 0) {
                 if (register_chrdev(cosa_major, "cosa", &cosa_fops)) {
                         printk(KERN_WARNING "cosa: unable to get major %d\n",
@@ -402,7 +392,7 @@ static int __init cosa_init(void)
                                       NULL, "cosa%d", i);
         err = 0;
         goto out;
-        
+
 out_chrdev:
         unregister_chrdev(cosa_major, "cosa");
 out:
@@ -414,43 +404,29 @@ static void __exit cosa_exit(void)
 {
         struct cosa_data *cosa;
         int i;
-        printk(KERN_INFO "Unloading the cosa module\n");
 
-        for (i=0; i<nr_cards; i++)
+        for (i = 0; i < nr_cards; i++)
                 device_destroy(cosa_class, MKDEV(cosa_major, i));
         class_destroy(cosa_class);
-        for (cosa=cosa_cards; nr_cards--; cosa++) {
+
+        for (cosa = cosa_cards; nr_cards--; cosa++) {
                 /* Clean up the per-channel data */
-                for (i=0; i<cosa->nchannels; i++) {
+                for (i = 0; i < cosa->nchannels; i++) {
                         /* Chardev driver has no alloc'd per-channel data */
-                        sppp_channel_delete(cosa->chan+i);
+                        unregister_hdlc_device(cosa->chan[i].netdev);
+                        free_netdev(cosa->chan[i].netdev);
                 }
                 /* Clean up the per-card data */
                 kfree(cosa->chan);
                 kfree(cosa->bouncebuf);
                 free_irq(cosa->irq, cosa);
                 free_dma(cosa->dma);
-                release_region(cosa->datareg,is_8bit(cosa)?2:4);
+                release_region(cosa->datareg, is_8bit(cosa) ? 2 : 4);
         }
         unregister_chrdev(cosa_major, "cosa");
 }
 module_exit(cosa_exit);
 
-/*
- * This function should register all the net devices needed for the
- * single channel.
- */
-static __inline__ void channel_init(struct channel_data *chan)
-{
-        sprintf(chan->name, "cosa%dc%d", chan->cosa->num, chan->num);
-
-        /* Initialize the chardev data structures */
-        chardev_channel_init(chan);
-
-        /* Register the sppp interface */
-        sppp_channel_init(chan);
-}
-        
 static int cosa_probe(int base, int irq, int dma)
 {
         struct cosa_data *cosa = cosa_cards+nr_cards;
@@ -576,13 +552,43 @@ static int cosa_probe(int base, int irq, int dma)
         /* Initialize the per-channel data */
         cosa->chan = kcalloc(cosa->nchannels, sizeof(struct channel_data), GFP_KERNEL);
         if (!cosa->chan) {
-                err = -ENOMEM;
+                err = -ENOMEM;
                 goto err_out3;
         }
-        for (i=0; i<cosa->nchannels; i++) {
-                cosa->chan[i].cosa = cosa;
-                cosa->chan[i].num = i;
-                channel_init(cosa->chan+i);
+
+        for (i = 0; i < cosa->nchannels; i++) {
+                struct channel_data *chan = &cosa->chan[i];
+
+                chan->cosa = cosa;
+                chan->num = i;
+                sprintf(chan->name, "cosa%dc%d", chan->cosa->num, i);
+
+                /* Initialize the chardev data structures */
+                mutex_init(&chan->rlock);
+                init_MUTEX(&chan->wsem);
+
+                /* Register the network interface */
+                if (!(chan->netdev = alloc_hdlcdev(chan))) {
+                        printk(KERN_WARNING "%s: alloc_hdlcdev failed.\n",
+                               chan->name);
+                        goto err_hdlcdev;
+                }
+                dev_to_hdlc(chan->netdev)->attach = cosa_net_attach;
+                dev_to_hdlc(chan->netdev)->xmit = cosa_net_tx;
+                chan->netdev->open = cosa_net_open;
+                chan->netdev->stop = cosa_net_close;
+                chan->netdev->do_ioctl = cosa_net_ioctl;
+                chan->netdev->tx_timeout = cosa_net_timeout;
+                chan->netdev->watchdog_timeo = TX_TIMEOUT;
+                chan->netdev->base_addr = chan->cosa->datareg;
+                chan->netdev->irq = chan->cosa->irq;
+                chan->netdev->dma = chan->cosa->dma;
+                if (register_hdlc_device(chan->netdev)) {
+                        printk(KERN_WARNING "%s: register_hdlc_device()"
+                               " failed.\n", chan->netdev->name);
+                        free_netdev(chan->netdev);
+                        goto err_hdlcdev;
+                }
         }
 
         printk (KERN_INFO "cosa%d: %s (%s at 0x%x irq %d dma %d), %d channels\n",
@@ -590,13 +596,20 @@ static int cosa_probe(int base, int irq, int dma)
                 cosa->datareg, cosa->irq, cosa->dma, cosa->nchannels);
 
         return nr_cards++;
+
+err_hdlcdev:
+        while (i-- > 0) {
+                unregister_hdlc_device(cosa->chan[i].netdev);
+                free_netdev(cosa->chan[i].netdev);
+        }
+        kfree(cosa->chan);
 err_out3:
         kfree(cosa->bouncebuf);
 err_out2:
         free_dma(cosa->dma);
 err_out1:
         free_irq(cosa->irq, cosa);
-err_out:        
+err_out:
         release_region(cosa->datareg,is_8bit(cosa)?2:4);
         printk(KERN_NOTICE "cosa%d: allocating resources failed\n",
                cosa->num);
@@ -604,54 +617,19 @@ err_out:
 }
 
 
-/*---------- SPPP/HDLC netdevice ---------- */
+/*---------- network device ---------- */
 
-static void cosa_setup(struct net_device *d)
+static int cosa_net_attach(struct net_device *dev, unsigned short encoding,
+                           unsigned short parity)
 {
-        d->open = cosa_sppp_open;
-        d->stop = cosa_sppp_close;
-        d->hard_start_xmit = cosa_sppp_tx;
-        d->do_ioctl = cosa_sppp_ioctl;
-        d->get_stats = cosa_net_stats;
-        d->tx_timeout = cosa_sppp_timeout;
-        d->watchdog_timeo = TX_TIMEOUT;
-}
-
-static void sppp_channel_init(struct channel_data *chan)
-{
-        struct net_device *d;
-        chan->if_ptr = &chan->pppdev;
-        d = alloc_netdev(0, chan->name, cosa_setup);
-        if (!d) {
-                printk(KERN_WARNING "%s: alloc_netdev failed.\n", chan->name);
-                return;
-        }
-        chan->pppdev.dev = d;
-        d->base_addr = chan->cosa->datareg;
-        d->irq = chan->cosa->irq;
-        d->dma = chan->cosa->dma;
-        d->ml_priv = chan;
-        sppp_attach(&chan->pppdev);
-        if (register_netdev(d)) {
-                printk(KERN_WARNING "%s: register_netdev failed.\n", d->name);
-                sppp_detach(d);
-                free_netdev(d);
-                chan->pppdev.dev = NULL;
-                return;
-        }
-}
-
-static void sppp_channel_delete(struct channel_data *chan)
-{
-        unregister_netdev(chan->pppdev.dev);
-        sppp_detach(chan->pppdev.dev);
-        free_netdev(chan->pppdev.dev);
-        chan->pppdev.dev = NULL;
+        if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
+                return 0;
+        return -EINVAL;
 }
 
-static int cosa_sppp_open(struct net_device *d)
+static int cosa_net_open(struct net_device *dev)
 {
-        struct channel_data *chan = d->ml_priv;
+        struct channel_data *chan = dev_to_chan(dev);
         int err;
         unsigned long flags;
 
@@ -662,36 +640,35 @@ static int cosa_sppp_open(struct net_device *d)
         }
         spin_lock_irqsave(&chan->cosa->lock, flags);
         if (chan->usage != 0) {
-                printk(KERN_WARNING "%s: sppp_open called with usage count %d\n",
-                        chan->name, chan->usage);
+                printk(KERN_WARNING "%s: cosa_net_open called with usage count"
+                       " %d\n", chan->name, chan->usage);
                 spin_unlock_irqrestore(&chan->cosa->lock, flags);
                 return -EBUSY;
         }
-        chan->setup_rx = sppp_setup_rx;
-        chan->tx_done = sppp_tx_done;
-        chan->rx_done = sppp_rx_done;
-        chan->usage=-1;
+        chan->setup_rx = cosa_net_setup_rx;
+        chan->tx_done = cosa_net_tx_done;
+        chan->rx_done = cosa_net_rx_done;
+        chan->usage = -1;
         chan->cosa->usage++;
         spin_unlock_irqrestore(&chan->cosa->lock, flags);
 
-        err = sppp_open(d);
+        err = hdlc_open(dev);
         if (err) {
                 spin_lock_irqsave(&chan->cosa->lock, flags);
-                chan->usage=0;
+                chan->usage = 0;
                 chan->cosa->usage--;
-                
                 spin_unlock_irqrestore(&chan->cosa->lock, flags);
                 return err;
         }
 
-        netif_start_queue(d);
+        netif_start_queue(dev);
         cosa_enable_rx(chan);
         return 0;
 }
 
-static int cosa_sppp_tx(struct sk_buff *skb, struct net_device *dev)
+static int cosa_net_tx(struct sk_buff *skb, struct net_device *dev)
 {
-        struct channel_data *chan = dev->ml_priv;
+        struct channel_data *chan = dev_to_chan(dev);
 
         netif_stop_queue(dev);
 
@@ -700,16 +677,16 @@ static int cosa_sppp_tx(struct sk_buff *skb, struct net_device *dev)
         return 0;
 }
 
-static void cosa_sppp_timeout(struct net_device *dev)
+static void cosa_net_timeout(struct net_device *dev)
 {
-        struct channel_data *chan = dev->ml_priv;
+        struct channel_data *chan = dev_to_chan(dev);
 
         if (test_bit(RXBIT, &chan->cosa->rxtx)) {
-                chan->stats.rx_errors++;
-                chan->stats.rx_missed_errors++;
+                chan->netdev->stats.rx_errors++;
+                chan->netdev->stats.rx_missed_errors++;
         } else {
-                chan->stats.tx_errors++;
-                chan->stats.tx_aborted_errors++;
+                chan->netdev->stats.tx_errors++;
+                chan->netdev->stats.tx_aborted_errors++;
         }
         cosa_kick(chan->cosa);
         if (chan->tx_skb) {
@@ -719,13 +696,13 @@ static void cosa_sppp_timeout(struct net_device *dev)
         netif_wake_queue(dev);
 }
 
-static int cosa_sppp_close(struct net_device *d)
+static int cosa_net_close(struct net_device *dev)
 {
-        struct channel_data *chan = d->ml_priv;
+        struct channel_data *chan = dev_to_chan(dev);
         unsigned long flags;
 
-        netif_stop_queue(d);
-        sppp_close(d);
+        netif_stop_queue(dev);
+        hdlc_close(dev);
         cosa_disable_rx(chan);
         spin_lock_irqsave(&chan->cosa->lock, flags);
         if (chan->rx_skb) {
@@ -736,13 +713,13 @@ static int cosa_sppp_close(struct net_device *d)
                 kfree_skb(chan->tx_skb);
                 chan->tx_skb = NULL;
         }
-        chan->usage=0;
+        chan->usage = 0;
         chan->cosa->usage--;
         spin_unlock_irqrestore(&chan->cosa->lock, flags);
         return 0;
 }
 
-static char *sppp_setup_rx(struct channel_data *chan, int size)
+static char *cosa_net_setup_rx(struct channel_data *chan, int size)
 {
         /*
          * We can safely fall back to non-dma-able memory, because we have
@@ -754,66 +731,53 @@ static char *sppp_setup_rx(struct channel_data *chan, int size)
         if (chan->rx_skb == NULL) {
                 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet\n",
                         chan->name);
-                chan->stats.rx_dropped++;
+                chan->netdev->stats.rx_dropped++;
                 return NULL;
         }
-        chan->pppdev.dev->trans_start = jiffies;
+        chan->netdev->trans_start = jiffies;
         return skb_put(chan->rx_skb, size);
 }
 
-static int sppp_rx_done(struct channel_data *chan)
+static int cosa_net_rx_done(struct channel_data *chan)
 {
         if (!chan->rx_skb) {
                 printk(KERN_WARNING "%s: rx_done with empty skb!\n",
                         chan->name);
-                chan->stats.rx_errors++;
-                chan->stats.rx_frame_errors++;
+                chan->netdev->stats.rx_errors++;
+                chan->netdev->stats.rx_frame_errors++;
                 return 0;
         }
-        chan->rx_skb->protocol = htons(ETH_P_WAN_PPP);
-        chan->rx_skb->dev = chan->pppdev.dev;
+        chan->rx_skb->protocol = hdlc_type_trans(chan->rx_skb, chan->netdev);
+        chan->rx_skb->dev = chan->netdev;
         skb_reset_mac_header(chan->rx_skb);
-        chan->stats.rx_packets++;
-        chan->stats.rx_bytes += chan->cosa->rxsize;
+        chan->netdev->stats.rx_packets++;
+        chan->netdev->stats.rx_bytes += chan->cosa->rxsize;
         netif_rx(chan->rx_skb);
         chan->rx_skb = NULL;
-        chan->pppdev.dev->last_rx = jiffies;
+        chan->netdev->last_rx = jiffies;
         return 0;
 }
 
 /* ARGSUSED */
-static int sppp_tx_done(struct channel_data *chan, int size)
+static int cosa_net_tx_done(struct channel_data *chan, int size)
 {
         if (!chan->tx_skb) {
                 printk(KERN_WARNING "%s: tx_done with empty skb!\n",
                         chan->name);
-                chan->stats.tx_errors++;
-                chan->stats.tx_aborted_errors++;
+                chan->netdev->stats.tx_errors++;
+                chan->netdev->stats.tx_aborted_errors++;
                 return 1;
         }
         dev_kfree_skb_irq(chan->tx_skb);
         chan->tx_skb = NULL;
-        chan->stats.tx_packets++;
-        chan->stats.tx_bytes += size;
-        netif_wake_queue(chan->pppdev.dev);
+        chan->netdev->stats.tx_packets++;
+        chan->netdev->stats.tx_bytes += size;
+        netif_wake_queue(chan->netdev);
         return 1;
 }
 
-static struct net_device_stats *cosa_net_stats(struct net_device *dev)
-{
-        struct channel_data *chan = dev->ml_priv;
-        return &chan->stats;
-}
-
-
 /*---------- Character device ---------- */
 
-static void chardev_channel_init(struct channel_data *chan)
-{
-        mutex_init(&chan->rlock);
-        init_MUTEX(&chan->wsem);
-}
-
 static ssize_t cosa_read(struct file *file,
         char __user *buf, size_t count, loff_t *ppos)
 {
@@ -1223,16 +1187,15 @@ static int cosa_ioctl_common(struct cosa_data *cosa,
         return -ENOIOCTLCMD;
 }
 
-static int cosa_sppp_ioctl(struct net_device *dev, struct ifreq *ifr,
-        int cmd)
+static int cosa_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 {
         int rv;
-        struct channel_data *chan = dev->ml_priv;
-        rv = cosa_ioctl_common(chan->cosa, chan, cmd, (unsigned long)ifr->ifr_data);
-        if (rv == -ENOIOCTLCMD) {
-                return sppp_do_ioctl(dev, ifr, cmd);
-        }
-        return rv;
+        struct channel_data *chan = dev_to_chan(dev);
+        rv = cosa_ioctl_common(chan->cosa, chan, cmd,
+                               (unsigned long)ifr->ifr_data);
+        if (rv != -ENOIOCTLCMD)
+                return rv;
+        return hdlc_ioctl(dev, ifr, cmd);
 }
 
 static int cosa_chardev_ioctl(struct inode *inode, struct file *file,
diff --git a/drivers/net/wan/dscc4.c b/drivers/net/wan/dscc4.c
index 50ef5b4efd6d..f5d55ad02267 100644
--- a/drivers/net/wan/dscc4.c
+++ b/drivers/net/wan/dscc4.c
@@ -103,7 +103,6 @@
 #include <linux/netdevice.h>
 #include <linux/skbuff.h>
 #include <linux/delay.h>
-#include <net/syncppp.h>
 #include <linux/hdlc.h>
 #include <linux/mutex.h>
 
diff --git a/drivers/net/wan/farsync.c b/drivers/net/wan/farsync.c
index 754f00809e3e..9557ad078ab8 100644
--- a/drivers/net/wan/farsync.c
+++ b/drivers/net/wan/farsync.c
@@ -47,10 +47,7 @@ MODULE_LICENSE("GPL");
 /*      Default parameters for the link
  */
 #define FST_TX_QUEUE_LEN        100     /* At 8Mbps a longer queue length is
-                                         * useful, the syncppp module forces
-                                         * this down assuming a slower line I
-                                         * guess.
-                                         */
+                                         * useful */
 #define FST_TXQ_DEPTH           16      /* This one is for the buffering
                                          * of frames on the way down to the card
                                          * so that we can keep the card busy
diff --git a/drivers/net/wan/farsync.h b/drivers/net/wan/farsync.h
index d871dafa87a1..6b27e7c3d449 100644
--- a/drivers/net/wan/farsync.h
+++ b/drivers/net/wan/farsync.h
@@ -54,9 +54,6 @@
 
 
 /*      Ioctl call command values
- *
- *      The first three private ioctls are used by the sync-PPP module,
- *      allowing a little room for expansion we start our numbering at 10.
  */
 #define FSTWRITE        (SIOCDEVPRIVATE+10)
 #define FSTCPURESET     (SIOCDEVPRIVATE+11)
@@ -202,9 +199,6 @@ struct fstioc_info {
 #define J1              7
 
 /* "proto" */
-#define FST_HDLC        1               /* Cisco compatible HDLC */
-#define FST_PPP         2               /* Sync PPP */
-#define FST_MONITOR     3               /* Monitor only (raw packet reception) */
 #define FST_RAW         4               /* Two way raw packets */
 #define FST_GEN_HDLC    5               /* Using "Generic HDLC" module */
 
diff --git a/drivers/net/wan/hdlc.c b/drivers/net/wan/hdlc.c
index e3a536477c7e..1f2a140c9f7c 100644
--- a/drivers/net/wan/hdlc.c
+++ b/drivers/net/wan/hdlc.c
@@ -22,20 +22,19 @@
  * - proto->start() and stop() are called with spin_lock_irq held.
  */
 
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/poll.h>
 #include <linux/errno.h>
+#include <linux/hdlc.h>
 #include <linux/if_arp.h>
+#include <linux/inetdevice.h>
 #include <linux/init.h>
-#include <linux/skbuff.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/notifier.h>
 #include <linux/pkt_sched.h>
-#include <linux/inetdevice.h>
-#include <linux/lapb.h>
+#include <linux/poll.h>
 #include <linux/rtnetlink.h>
-#include <linux/notifier.h>
-#include <linux/hdlc.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
 #include <net/net_namespace.h>
 
 
@@ -109,7 +108,7 @@ static int hdlc_device_event(struct notifier_block *this, unsigned long event,
 
         if (dev->get_stats != hdlc_get_stats)
                 return NOTIFY_DONE; /* not an HDLC device */
- 
+
         if (event != NETDEV_CHANGE)
                 return NOTIFY_DONE; /* Only interrested in carrier changes */
 
@@ -357,7 +356,7 @@ static struct packet_type hdlc_packet_type = {
 
 
 static struct notifier_block hdlc_notifier = {
-        .notifier_call = hdlc_device_event,
+        .notifier_call = hdlc_device_event,
 };
 
 
@@ -367,8 +366,8 @@ static int __init hdlc_module_init(void)
 
         printk(KERN_INFO "%s\n", version);
         if ((result = register_netdevice_notifier(&hdlc_notifier)) != 0)
-                return result;
-        dev_add_pack(&hdlc_packet_type);
+                return result;
+        dev_add_pack(&hdlc_packet_type);
         return 0;
 }
 
diff --git a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c
index 849819c2552d..44e64b15dbd1 100644
--- a/drivers/net/wan/hdlc_cisco.c
+++ b/drivers/net/wan/hdlc_cisco.c
@@ -9,19 +9,18 @@
  * as published by the Free Software Foundation.
  */
 
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/poll.h>
 #include <linux/errno.h>
+#include <linux/hdlc.h>
 #include <linux/if_arp.h>
+#include <linux/inetdevice.h>
 #include <linux/init.h>
-#include <linux/skbuff.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/pkt_sched.h>
-#include <linux/inetdevice.h>
-#include <linux/lapb.h>
+#include <linux/poll.h>
 #include <linux/rtnetlink.h>
-#include <linux/hdlc.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
 
 #undef DEBUG_HARD_HEADER
 
@@ -68,9 +67,9 @@ struct cisco_state {
 static int cisco_ioctl(struct net_device *dev, struct ifreq *ifr);
 
 
-static inline struct cisco_state * state(hdlc_device *hdlc)
+static inline struct cisco_state* state(hdlc_device *hdlc)
 {
-        return(struct cisco_state *)(hdlc->state);
+        return (struct cisco_state *)hdlc->state;
 }
 
 
@@ -172,7 +171,7 @@ static int cisco_rx(struct sk_buff *skb)
             data->address != CISCO_UNICAST)
                 goto rx_error;
 
-        switch(ntohs(data->protocol)) {
+        switch (ntohs(data->protocol)) {
         case CISCO_SYS_INFO:
                 /* Packet is not needed, drop it. */
                 dev_kfree_skb_any(skb);
@@ -336,7 +335,7 @@ static struct hdlc_proto proto = {
 static const struct header_ops cisco_header_ops = {
         .create = cisco_hard_header,
 };
- 
+
 static int cisco_ioctl(struct net_device *dev, struct ifreq *ifr)
 {
         cisco_proto __user *cisco_s = ifr->ifr_settings.ifs_ifsu.cisco;
@@ -359,10 +358,10 @@ static int cisco_ioctl(struct net_device *dev, struct ifreq *ifr)
                 return 0;
 
         case IF_PROTO_CISCO:
-                if(!capable(CAP_NET_ADMIN))
+                if (!capable(CAP_NET_ADMIN))
                         return -EPERM;
 
-                if(dev->flags & IFF_UP)
+                if (dev->flags & IFF_UP)
                         return -EBUSY;
 
                 if (copy_from_user(&new_settings, cisco_s, size))
@@ -372,7 +371,7 @@ static int cisco_ioctl(struct net_device *dev, struct ifreq *ifr)
                     new_settings.timeout < 2)
                         return -EINVAL;
 
-                result=hdlc->attach(dev, ENCODING_NRZ,PARITY_CRC16_PR1_CCITT);
+                result = hdlc->attach(dev, ENCODING_NRZ,PARITY_CRC16_PR1_CCITT);
                 if (result)
                         return result;
 
diff --git a/drivers/net/wan/hdlc_fr.c b/drivers/net/wan/hdlc_fr.c
index 62e93dac6b13..d3d5055741ad 100644
--- a/drivers/net/wan/hdlc_fr.c
+++ b/drivers/net/wan/hdlc_fr.c
@@ -33,20 +33,19 @@
 
 */
 
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/poll.h>
 #include <linux/errno.h>
+#include <linux/etherdevice.h>
+#include <linux/hdlc.h>
 #include <linux/if_arp.h>
+#include <linux/inetdevice.h>
 #include <linux/init.h>
-#include <linux/skbuff.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/pkt_sched.h>
-#include <linux/inetdevice.h>
-#include <linux/lapb.h>
+#include <linux/poll.h>
 #include <linux/rtnetlink.h>
-#include <linux/etherdevice.h>
-#include <linux/hdlc.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
 
 #undef DEBUG_PKT
 #undef DEBUG_ECN
@@ -96,7 +95,7 @@ typedef struct {
         unsigned ea1:   1;
         unsigned cr:    1;
         unsigned dlcih: 6;
-  
+
         unsigned ea2:   1;
         unsigned de:    1;
         unsigned becn:  1;
diff --git a/drivers/net/wan/hdlc_ppp.c b/drivers/net/wan/hdlc_ppp.c
index 00308337928e..4efe9e6d32d5 100644
--- a/drivers/net/wan/hdlc_ppp.c
+++ b/drivers/net/wan/hdlc_ppp.c
@@ -9,19 +9,18 @@
  * as published by the Free Software Foundation.
  */
 
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/poll.h>
 #include <linux/errno.h>
+#include <linux/hdlc.h>
 #include <linux/if_arp.h>
+#include <linux/inetdevice.h>
 #include <linux/init.h>
-#include <linux/skbuff.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/pkt_sched.h>
-#include <linux/inetdevice.h>
-#include <linux/lapb.h>
+#include <linux/poll.h>
 #include <linux/rtnetlink.h>
-#include <linux/hdlc.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
 #include <net/syncppp.h>
 
 struct ppp_state {
diff --git a/drivers/net/wan/hdlc_raw.c b/drivers/net/wan/hdlc_raw.c
index bbbb819d764c..8612311748f4 100644
--- a/drivers/net/wan/hdlc_raw.c
+++ b/drivers/net/wan/hdlc_raw.c
@@ -9,19 +9,18 @@
  * as published by the Free Software Foundation.
  */
 
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/poll.h>
 #include <linux/errno.h>
+#include <linux/hdlc.h>
 #include <linux/if_arp.h>
+#include <linux/inetdevice.h>
 #include <linux/init.h>
-#include <linux/skbuff.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/pkt_sched.h>
-#include <linux/inetdevice.h>
-#include <linux/lapb.h>
+#include <linux/poll.h>
 #include <linux/rtnetlink.h>
-#include <linux/hdlc.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
 
 
 static int raw_ioctl(struct net_device *dev, struct ifreq *ifr);
diff --git a/drivers/net/wan/hdlc_raw_eth.c b/drivers/net/wan/hdlc_raw_eth.c
index 26dee600506f..a13fc3207520 100644
--- a/drivers/net/wan/hdlc_raw_eth.c
+++ b/drivers/net/wan/hdlc_raw_eth.c
@@ -9,20 +9,19 @@
  * as published by the Free Software Foundation.
  */
 
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/poll.h>
 #include <linux/errno.h>
+#include <linux/etherdevice.h>
+#include <linux/hdlc.h>
 #include <linux/if_arp.h>
+#include <linux/inetdevice.h>
 #include <linux/init.h>
-#include <linux/skbuff.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/pkt_sched.h>
-#include <linux/inetdevice.h>
-#include <linux/lapb.h>
+#include <linux/poll.h>
 #include <linux/rtnetlink.h>
-#include <linux/etherdevice.h>
-#include <linux/hdlc.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
 
 static int raw_eth_ioctl(struct net_device *dev, struct ifreq *ifr);
 
diff --git a/drivers/net/wan/hdlc_x25.c b/drivers/net/wan/hdlc_x25.c
index e808720030ef..8b7e5d2e2ac9 100644
--- a/drivers/net/wan/hdlc_x25.c
+++ b/drivers/net/wan/hdlc_x25.c
@@ -9,20 +9,19 @@
  * as published by the Free Software Foundation.
  */
 
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/poll.h>
 #include <linux/errno.h>
+#include <linux/hdlc.h>
 #include <linux/if_arp.h>
-#include <linux/init.h>
-#include <linux/skbuff.h>
-#include <linux/pkt_sched.h>
 #include <linux/inetdevice.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
 #include <linux/lapb.h>
+#include <linux/module.h>
+#include <linux/pkt_sched.h>
+#include <linux/poll.h>
 #include <linux/rtnetlink.h>
-#include <linux/hdlc.h>
-
+#include <linux/skbuff.h>
+#include <linux/slab.h>
 #include <net/x25device.h>
 
 static int x25_ioctl(struct net_device *dev, struct ifreq *ifr);
diff --git a/drivers/net/wan/hostess_sv11.c b/drivers/net/wan/hostess_sv11.c
index f3065d3473fd..e299313f828a 100644
--- a/drivers/net/wan/hostess_sv11.c
+++ b/drivers/net/wan/hostess_sv11.c
@@ -16,6 +16,8 @@
  *      touching control registers.
  *
  *      Port B isnt wired (why - beats me)
+ *
+ *      Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
  */
 
 #include <linux/module.h>
@@ -26,6 +28,7 @@
 #include <linux/netdevice.h>
 #include <linux/if_arp.h>
 #include <linux/delay.h>
+#include <linux/hdlc.h>
 #include <linux/ioport.h>
 #include <net/arp.h>
 
@@ -33,34 +36,31 @@
 #include <asm/io.h>
 #include <asm/dma.h>
 #include <asm/byteorder.h>
-#include <net/syncppp.h>
 #include "z85230.h"
 
 static int dma;
 
-struct sv11_device
-{
-        void *if_ptr;   /* General purpose pointer (used by SPPP) */
-        struct z8530_dev sync;
-        struct ppp_device netdev;
-};
-
 /*
  *      Network driver support routines
  */
 
+static inline struct z8530_dev* dev_to_sv(struct net_device *dev)
+{
+        return (struct z8530_dev *)dev_to_hdlc(dev)->priv;
+}
+
 /*
- *      Frame receive. Simple for our card as we do sync ppp and there
+ *      Frame receive. Simple for our card as we do HDLC and there
  *      is no funny garbage involved
  */
- 
+
 static void hostess_input(struct z8530_channel *c, struct sk_buff *skb)
 {
         /* Drop the CRC - it's not a good idea to try and negotiate it ;) */
-        skb_trim(skb, skb->len-2);
-        skb->protocol=__constant_htons(ETH_P_WAN_PPP);
+        skb_trim(skb, skb->len - 2);
+        skb->protocol = hdlc_type_trans(skb, c->netdevice);
         skb_reset_mac_header(skb);
-        skb->dev=c->netdevice;
+        skb->dev = c->netdevice;
         /*
          *      Send it to the PPP layer. We don't have time to process
          *      it right now.
@@ -68,56 +68,51 @@ static void hostess_input(struct z8530_channel *c, struct sk_buff *skb)
         netif_rx(skb);
         c->netdevice->last_rx = jiffies;
 }
- 
+
 /*
  *      We've been placed in the UP state
- */ 
- 
+ */
+
 static int hostess_open(struct net_device *d)
 {
-        struct sv11_device *sv11=d->ml_priv;
+        struct z8530_dev *sv11 = dev_to_sv(d);
         int err = -1;
-        
+
         /*
          *      Link layer up
          */
-        switch(dma)
-        {
+        switch (dma) {
                 case 0:
-                        err=z8530_sync_open(d, &sv11->sync.chanA);
+                        err = z8530_sync_open(d, &sv11->chanA);
                         break;
                 case 1:
-                        err=z8530_sync_dma_open(d, &sv11->sync.chanA);
+                        err = z8530_sync_dma_open(d, &sv11->chanA);
                         break;
                 case 2:
-                        err=z8530_sync_txdma_open(d, &sv11->sync.chanA);
+                        err = z8530_sync_txdma_open(d, &sv11->chanA);
                         break;
         }
-        
-        if(err)
+
+        if (err)
                 return err;
-        /*
-         *      Begin PPP
-         */
-        err=sppp_open(d);
-        if(err)
-        {
-                switch(dma)
-                {
+
+        err = hdlc_open(d);
+        if (err) {
+                switch (dma) {
                         case 0:
-                                z8530_sync_close(d, &sv11->sync.chanA);
+                                z8530_sync_close(d, &sv11->chanA);
                                 break;
                         case 1:
-                                z8530_sync_dma_close(d, &sv11->sync.chanA);
+                                z8530_sync_dma_close(d, &sv11->chanA);
                                 break;
                         case 2:
-                                z8530_sync_txdma_close(d, &sv11->sync.chanA);
+                                z8530_sync_txdma_close(d, &sv11->chanA);
                                 break;
-                }                               
+                }
                 return err;
         }
-        sv11->sync.chanA.rx_function=hostess_input;
-        
+        sv11->chanA.rx_function = hostess_input;
+
         /*
          *      Go go go
          */
@@ -128,30 +123,24 @@ static int hostess_open(struct net_device *d)
 
 static int hostess_close(struct net_device *d)
 {
-        struct sv11_device *sv11=d->ml_priv;
+        struct z8530_dev *sv11 = dev_to_sv(d);
         /*
          *      Discard new frames
          */
-        sv11->sync.chanA.rx_function=z8530_null_rx;
-        /*
-         *      PPP off
-         */
-        sppp_close(d);
-        /*
-         *      Link layer down
-         */
+        sv11->chanA.rx_function = z8530_null_rx;
+
+        hdlc_close(d);
         netif_stop_queue(d);
-                
-        switch(dma)
-        {
+
+        switch (dma) {
                 case 0:
-                        z8530_sync_close(d, &sv11->sync.chanA);
+                        z8530_sync_close(d, &sv11->chanA);
                         break;
                 case 1:
-                        z8530_sync_dma_close(d, &sv11->sync.chanA);
+                        z8530_sync_dma_close(d, &sv11->chanA);
                         break;
                 case 2:
-                        z8530_sync_txdma_close(d, &sv11->sync.chanA);
+                        z8530_sync_txdma_close(d, &sv11->chanA);
                         break;
         }
         return 0;
@@ -159,232 +148,174 @@ static int hostess_close(struct net_device *d)
 
 static int hostess_ioctl(struct net_device *d, struct ifreq *ifr, int cmd)
 {
-        /* struct sv11_device *sv11=d->ml_priv;
-           z8530_ioctl(d,&sv11->sync.chanA,ifr,cmd) */
-        return sppp_do_ioctl(d, ifr,cmd);
-}
-
-static struct net_device_stats *hostess_get_stats(struct net_device *d)
-{
-        struct sv11_device *sv11=d->ml_priv;
-        if(sv11)
-                return z8530_get_stats(&sv11->sync.chanA);
-        else
-                return NULL;
+        /* struct z8530_dev *sv11=dev_to_sv(d);
+           z8530_ioctl(d,&sv11->chanA,ifr,cmd) */
+        return hdlc_ioctl(d, ifr, cmd);
 }
 
 /*
- *      Passed PPP frames, fire them downwind.
+ *      Passed network frames, fire them downwind.
  */
- 
+
 static int hostess_queue_xmit(struct sk_buff *skb, struct net_device *d)
 {
-        struct sv11_device *sv11=d->ml_priv;
-        return z8530_queue_xmit(&sv11->sync.chanA, skb);
+        return z8530_queue_xmit(&dev_to_sv(d)->chanA, skb);
 }
 
-static int hostess_neigh_setup(struct neighbour *n)
+static int hostess_attach(struct net_device *dev, unsigned short encoding,
+                          unsigned short parity)
 {
-        if (n->nud_state == NUD_NONE) {
-                n->ops = &arp_broken_ops;
-                n->output = n->ops->output;
-        }
-        return 0;
-}
-
-static int hostess_neigh_setup_dev(struct net_device *dev, struct neigh_parms *p)
-{
-        if (p->tbl->family == AF_INET) {
-                p->neigh_setup = hostess_neigh_setup;
-                p->ucast_probes = 0;
-                p->mcast_probes = 0;
-        }
-        return 0;
-}
-
-static void sv11_setup(struct net_device *dev)
-{       
-        dev->open = hostess_open;
-        dev->stop = hostess_close;
-        dev->hard_start_xmit = hostess_queue_xmit;
-        dev->get_stats = hostess_get_stats;
-        dev->do_ioctl = hostess_ioctl;
-        dev->neigh_setup = hostess_neigh_setup_dev;
+        if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
+                return 0;
+        return -EINVAL;
 }
 
 /*
  *      Description block for a Comtrol Hostess SV11 card
  */
- 
-static struct sv11_device *sv11_init(int iobase, int irq)
+
+static struct z8530_dev *sv11_init(int iobase, int irq)
 {
-        struct z8530_dev *dev;
-        struct sv11_device *sv;
-        
+        struct z8530_dev *sv;
+        struct net_device *netdev;
         /*
          *      Get the needed I/O space
          */
-         
-        if(!request_region(iobase, 8, "Comtrol SV11"))
-        {       
-                printk(KERN_WARNING "hostess: I/O 0x%X already in use.\n", iobase);
+
+        if (!request_region(iobase, 8, "Comtrol SV11")) {
+                printk(KERN_WARNING "hostess: I/O 0x%X already in use.\n",
+                       iobase);
                 return NULL;
         }
-        
-        sv = kzalloc(sizeof(struct sv11_device), GFP_KERNEL);
-        if(!sv)
-                goto fail3;
-                        
-        sv->if_ptr=&sv->netdev;
-        
-        sv->netdev.dev = alloc_netdev(0, "hdlc%d", sv11_setup);
-        if(!sv->netdev.dev)
-                goto fail2;
-
-        dev=&sv->sync;
-        
+
+        sv = kzalloc(sizeof(struct z8530_dev), GFP_KERNEL);
+        if (!sv)
+                goto err_kzalloc;
+
         /*
          *      Stuff in the I/O addressing
          */
-         
-        dev->active = 0;
-        
-        dev->chanA.ctrlio=iobase+1;
-        dev->chanA.dataio=iobase+3;
-        dev->chanB.ctrlio=-1;
-        dev->chanB.dataio=-1;
-        dev->chanA.irqs=&z8530_nop;
-        dev->chanB.irqs=&z8530_nop;
-        
-        outb(0, iobase+4);              /* DMA off */
-        
+
+        sv->active = 0;
+
+        sv->chanA.ctrlio = iobase + 1;
+        sv->chanA.dataio = iobase + 3;
+        sv->chanB.ctrlio = -1;
+        sv->chanB.dataio = -1;
+        sv->chanA.irqs = &z8530_nop;
+        sv->chanB.irqs = &z8530_nop;
+
+        outb(0, iobase + 4);            /* DMA off */
+
         /* We want a fast IRQ for this device. Actually we'd like an even faster
            IRQ ;) - This is one driver RtLinux is made for */
-           
-        if(request_irq(irq, &z8530_interrupt, IRQF_DISABLED, "Hostess SV11", dev)<0)
-        {
+
+        if (request_irq(irq, &z8530_interrupt, IRQF_DISABLED,
+                        "Hostess SV11", sv) < 0) {
                 printk(KERN_WARNING "hostess: IRQ %d already in use.\n", irq);
-                goto fail1;
+                goto err_irq;
         }
-        
-        dev->irq=irq;
-        dev->chanA.private=sv;
-        dev->chanA.netdevice=sv->netdev.dev;
-        dev->chanA.dev=dev;
-        dev->chanB.dev=dev;
-        
-        if(dma)
-        {
+
+        sv->irq = irq;
+        sv->chanA.private = sv;
+        sv->chanA.dev = sv;
+        sv->chanB.dev = sv;
+
+        if (dma) {
                 /*
                  *      You can have DMA off or 1 and 3 thats the lot
                  *      on the Comtrol.
                  */
-                dev->chanA.txdma=3;
-                dev->chanA.rxdma=1;
-                outb(0x03|0x08, iobase+4);              /* DMA on */
-                if(request_dma(dev->chanA.txdma, "Hostess SV/11 (TX)")!=0)
-                        goto fail;
-                        
-                if(dma==1)
-                {
-                        if(request_dma(dev->chanA.rxdma, "Hostess SV/11 (RX)")!=0)
-                                goto dmafail;
-                }
+                sv->chanA.txdma = 3;
+                sv->chanA.rxdma = 1;
+                outb(0x03 | 0x08, iobase + 4);          /* DMA on */
+                if (request_dma(sv->chanA.txdma, "Hostess SV/11 (TX)"))
+                        goto err_txdma;
+
+                if (dma == 1)
+                        if (request_dma(sv->chanA.rxdma, "Hostess SV/11 (RX)"))
+                                goto err_rxdma;
         }
 
         /* Kill our private IRQ line the hostess can end up chattering
            until the configuration is set */
         disable_irq(irq);
-                
+
         /*
          *      Begin normal initialise
          */
-         
-        if(z8530_init(dev)!=0)
-        {
+
+        if (z8530_init(sv)) {
                 printk(KERN_ERR "Z8530 series device not found.\n");
                 enable_irq(irq);
-                goto dmafail2;
+                goto free_dma;
         }
-        z8530_channel_load(&dev->chanB, z8530_dead_port);
-        if(dev->type==Z85C30)
-                z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream);
+        z8530_channel_load(&sv->chanB, z8530_dead_port);
+        if (sv->type == Z85C30)
+                z8530_channel_load(&sv->chanA, z8530_hdlc_kilostream);
         else
-                z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230);
-        
+                z8530_channel_load(&sv->chanA, z8530_hdlc_kilostream_85230);
+
         enable_irq(irq);
-        
 
         /*
          *      Now we can take the IRQ
          */
-        if(dev_alloc_name(dev->chanA.netdevice,"hdlc%d")>=0)
-        {
-                struct net_device *d=dev->chanA.netdevice;
 
-                /* 
-                 *      Initialise the PPP components
-                 */
-                d->ml_priv = sv;
-                sppp_attach(&sv->netdev);
-                
-                /*
-                 *      Local fields
-                 */     
-                
-                d->base_addr = iobase;
-                d->irq = irq;
-                
-                if(register_netdev(d))
-                {
-                        printk(KERN_ERR "%s: unable to register device.\n",
-                                d->name);
-                        sppp_detach(d);
-                        goto dmafail2;
-                }
+        sv->chanA.netdevice = netdev = alloc_hdlcdev(sv);
+        if (!netdev)
+                goto free_dma;
 
-                z8530_describe(dev, "I/O", iobase);
-                dev->active=1;
-                return sv;      
+        dev_to_hdlc(netdev)->attach = hostess_attach;
+        dev_to_hdlc(netdev)->xmit = hostess_queue_xmit;
+        netdev->open = hostess_open;
+        netdev->stop = hostess_close;
+        netdev->do_ioctl = hostess_ioctl;
+        netdev->base_addr = iobase;
+        netdev->irq = irq;
+
+        if (register_hdlc_device(netdev)) {
+                printk(KERN_ERR "hostess: unable to register HDLC device.\n");
+                free_netdev(netdev);
+                goto free_dma;
         }
-dmafail2:
-        if(dma==1)
-                free_dma(dev->chanA.rxdma);
-dmafail:
-        if(dma)
-                free_dma(dev->chanA.txdma);
-fail:
-        free_irq(irq, dev);
-fail1:
-        free_netdev(sv->netdev.dev);
-fail2:
+
+        z8530_describe(sv, "I/O", iobase);
+        sv->active = 1;
+        return sv;
+
+free_dma:
+        if (dma == 1)
+                free_dma(sv->chanA.rxdma);
+err_rxdma:
+        if (dma)
+                free_dma(sv->chanA.txdma);
+err_txdma:
+        free_irq(irq, sv);
+err_irq:
         kfree(sv);
-fail3:
-        release_region(iobase,8);
+err_kzalloc:
+        release_region(iobase, 8);
         return NULL;
 }
 
-static void sv11_shutdown(struct sv11_device *dev)
+static void sv11_shutdown(struct z8530_dev *dev)
 {
-        sppp_detach(dev->netdev.dev);
-        unregister_netdev(dev->netdev.dev);
-        z8530_shutdown(&dev->sync);
-        free_irq(dev->sync.irq, dev);
-        if(dma)
-        {
-                if(dma==1)
-                        free_dma(dev->sync.chanA.rxdma);
-                free_dma(dev->sync.chanA.txdma);
+        unregister_hdlc_device(dev->chanA.netdevice);
+        z8530_shutdown(dev);
+        free_irq(dev->irq, dev);
+        if (dma) {
+                if (dma == 1)
+                        free_dma(dev->chanA.rxdma);
+                free_dma(dev->chanA.txdma);
         }
-        release_region(dev->sync.chanA.ctrlio-1, 8);
-        free_netdev(dev->netdev.dev);
+        release_region(dev->chanA.ctrlio - 1, 8);
+        free_netdev(dev->chanA.netdevice);
         kfree(dev);
 }
 
-#ifdef MODULE
-
-static int io=0x200;
-static int irq=9;
+static int io = 0x200;
+static int irq = 9;
 
 module_param(io, int, 0);
 MODULE_PARM_DESC(io, "The I/O base of the Comtrol Hostess SV11 card");
@@ -397,22 +328,17 @@ MODULE_AUTHOR("Alan Cox");
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Modular driver for the Comtrol Hostess SV11");
 
-static struct sv11_device *sv11_unit;
+static struct z8530_dev *sv11_unit;
 
 int init_module(void)
 {
-        printk(KERN_INFO "SV-11 Z85230 Synchronous Driver v 0.03.\n");
-        printk(KERN_INFO "(c) Copyright 2001, Red Hat Inc.\n"); 
-        if((sv11_unit=sv11_init(io,irq))==NULL)
+        if ((sv11_unit = sv11_init(io, irq)) == NULL)
                 return -ENODEV;
         return 0;
 }
 
 void cleanup_module(void)
 {
-        if(sv11_unit)
+        if (sv11_unit)
                 sv11_shutdown(sv11_unit);
 }
-
-#endif
-
diff --git a/drivers/net/wan/lmc/lmc.h b/drivers/net/wan/lmc/lmc.h
index 882e58c1bfd7..4ced7ac16c2c 100644
--- a/drivers/net/wan/lmc/lmc.h
+++ b/drivers/net/wan/lmc/lmc.h
@@ -11,12 +11,12 @@ unsigned lmc_mii_readreg(lmc_softc_t * const sc, unsigned
                           devaddr, unsigned regno);
 void lmc_mii_writereg(lmc_softc_t * const sc, unsigned devaddr,
                                unsigned regno, unsigned data);
-void lmc_led_on(lmc_softc_t * const, u_int32_t);
-void lmc_led_off(lmc_softc_t * const, u_int32_t);
+void lmc_led_on(lmc_softc_t * const, u32);
+void lmc_led_off(lmc_softc_t * const, u32);
 unsigned lmc_mii_readreg(lmc_softc_t * const, unsigned, unsigned);
 void lmc_mii_writereg(lmc_softc_t * const, unsigned, unsigned, unsigned);
-void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits);
-void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits);
+void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits);
+void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits);
 
 int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
 
@@ -26,8 +26,7 @@ extern lmc_media_t lmc_t1_media;
 extern lmc_media_t lmc_hssi_media;
 
 #ifdef _DBG_EVENTLOG
-static void lmcEventLog( u_int32_t EventNum, u_int32_t arg2, u_int32_t arg3 );
+static void lmcEventLog(u32 EventNum, u32 arg2, u32 arg3);
 #endif
 
 #endif
-
diff --git a/drivers/net/wan/lmc/lmc_debug.c b/drivers/net/wan/lmc/lmc_debug.c
index 3b94352b0d03..15049d711f47 100644
--- a/drivers/net/wan/lmc/lmc_debug.c
+++ b/drivers/net/wan/lmc/lmc_debug.c
@@ -1,4 +1,3 @@
-
 #include <linux/types.h>
 #include <linux/netdevice.h>
 #include <linux/interrupt.h>
@@ -48,10 +47,10 @@ void lmcConsoleLog(char *type, unsigned char *ucData, int iLen)
 #endif
 
 #ifdef DEBUG
-u_int32_t lmcEventLogIndex = 0;
-u_int32_t lmcEventLogBuf[LMC_EVENTLOGSIZE * LMC_EVENTLOGARGS];
+u32 lmcEventLogIndex;
+u32 lmcEventLogBuf[LMC_EVENTLOGSIZE * LMC_EVENTLOGARGS];
 
-void lmcEventLog (u_int32_t EventNum, u_int32_t arg2, u_int32_t arg3)
+void lmcEventLog(u32 EventNum, u32 arg2, u32 arg3)
 {
   lmcEventLogBuf[lmcEventLogIndex++] = EventNum;
   lmcEventLogBuf[lmcEventLogIndex++] = arg2;
diff --git a/drivers/net/wan/lmc/lmc_debug.h b/drivers/net/wan/lmc/lmc_debug.h
index cf3563859bf3..2d46f121549f 100644
--- a/drivers/net/wan/lmc/lmc_debug.h
+++ b/drivers/net/wan/lmc/lmc_debug.h
@@ -38,15 +38,15 @@
 
 
 #ifdef DEBUG
-extern u_int32_t lmcEventLogIndex;
-extern u_int32_t lmcEventLogBuf[LMC_EVENTLOGSIZE * LMC_EVENTLOGARGS];
+extern u32 lmcEventLogIndex;
+extern u32 lmcEventLogBuf[LMC_EVENTLOGSIZE * LMC_EVENTLOGARGS];
 #define LMC_EVENT_LOG(x, y, z) lmcEventLog((x), (y), (z))
 #else
 #define LMC_EVENT_LOG(x,y,z)
 #endif /* end ifdef _DBG_EVENTLOG */
 
 void lmcConsoleLog(char *type, unsigned char *ucData, int iLen);
-void lmcEventLog (u_int32_t EventNum, u_int32_t arg2, u_int32_t arg3);
+void lmcEventLog(u32 EventNum, u32 arg2, u32 arg3);
 void lmc_trace(struct net_device *dev, char *msg);
 
 #endif
diff --git a/drivers/net/wan/lmc/lmc_ioctl.h b/drivers/net/wan/lmc/lmc_ioctl.h
index 57dd861cd3db..72fb113a44ca 100644
--- a/drivers/net/wan/lmc/lmc_ioctl.h
+++ b/drivers/net/wan/lmc/lmc_ioctl.h
@@ -61,7 +61,7 @@
 /*
  * IFTYPE defines
  */
-#define LMC_PPP         1               /* use sppp interface */
+#define LMC_PPP         1               /* use generic HDLC interface */
 #define LMC_NET         2               /* use direct net interface */
 #define LMC_RAW         3               /* use direct net interface */
 
diff --git a/drivers/net/wan/lmc/lmc_main.c b/drivers/net/wan/lmc/lmc_main.c
index 62133cee446a..f80640f5a744 100644
--- a/drivers/net/wan/lmc/lmc_main.c
+++ b/drivers/net/wan/lmc/lmc_main.c
@@ -1,6 +1,7 @@
  /*
   * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
   * All rights reserved.  www.lanmedia.com
+  * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
   *
   * This code is written by:
   * Andrew Stanley-Jones (asj@cban.com)
@@ -36,8 +37,6 @@
   *
   */
 
-/* $Id: lmc_main.c,v 1.36 2000/04/11 05:25:25 asj Exp $ */
-
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/string.h>
@@ -49,6 +48,7 @@
 #include <linux/interrupt.h>
 #include <linux/pci.h>
 #include <linux/delay.h>
+#include <linux/hdlc.h>
 #include <linux/init.h>
 #include <linux/in.h>
 #include <linux/if_arp.h>
@@ -57,9 +57,6 @@
 #include <linux/skbuff.h>
 #include <linux/inet.h>
 #include <linux/bitops.h>
-
-#include <net/syncppp.h>
-
 #include <asm/processor.h>             /* Processor type for cache alignment. */
 #include <asm/io.h>
 #include <asm/dma.h>
@@ -78,8 +75,6 @@
 #include "lmc_debug.h"
 #include "lmc_proto.h"
 
-static int lmc_first_load = 0;
-
 static int LMC_PKT_BUF_SZ = 1542;
 
 static struct pci_device_id lmc_pci_tbl[] = {
@@ -91,11 +86,10 @@ static struct pci_device_id lmc_pci_tbl[] = {
 };
 
 MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
 
 
 static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
-static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
 static int lmc_rx (struct net_device *dev);
 static int lmc_open(struct net_device *dev);
 static int lmc_close(struct net_device *dev);
@@ -114,20 +108,14 @@ static void lmc_driver_timeout(struct net_device *dev);
  * linux reserves 16 device specific IOCTLs.  We call them
  * LMCIOC* to control various bits of our world.
  */
-int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
+int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
 {
-    lmc_softc_t *sc;
+    lmc_softc_t *sc = dev_to_sc(dev);
     lmc_ctl_t ctl;
-    int ret;
-    u_int16_t regVal;
+    int ret = -EOPNOTSUPP;
+    u16 regVal;
     unsigned long flags;
 
-    struct sppp *sp;
-
-    ret = -EOPNOTSUPP;
-
-    sc = dev->priv;
-
     lmc_trace(dev, "lmc_ioctl in");
 
     /*
@@ -149,7 +137,6 @@ int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
         break;
 
     case LMCIOCSINFO: /*fold01*/
-        sp = &((struct ppp_device *) dev)->sppp;
         if (!capable(CAP_NET_ADMIN)) {
             ret = -EPERM;
             break;
@@ -175,25 +162,20 @@ int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
                 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
         }
 
-        if (ctl.keepalive_onoff == LMC_CTL_OFF)
-            sp->pp_flags &= ~PP_KEEPALIVE;      /* Turn off */
-        else
-            sp->pp_flags |= PP_KEEPALIVE;       /* Turn on */
-
         ret = 0;
         break;
 
     case LMCIOCIFTYPE: /*fold01*/
         {
-            u_int16_t   old_type = sc->if_type;
-            u_int16_t   new_type;
+            u16 old_type = sc->if_type;
+            u16 new_type;
 
             if (!capable(CAP_NET_ADMIN)) {
                 ret = -EPERM;
                 break;
             }
 
-            if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u_int16_t))) {
+            if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
                 ret = -EFAULT;
                 break;
             }
@@ -206,15 +188,11 @@ int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
             }
             
             lmc_proto_close(sc);
-            lmc_proto_detach(sc);
 
             sc->if_type = new_type;
-//            lmc_proto_init(sc);
             lmc_proto_attach(sc);
-            lmc_proto_open(sc);
-
-            ret = 0 ;
-            break ;
+            ret = lmc_proto_open(sc);
+            break;
         }
 
     case LMCIOCGETXINFO: /*fold01*/
@@ -241,51 +219,53 @@ int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
 
         break;
 
-    case LMCIOCGETLMCSTATS: /*fold01*/
-        if (sc->lmc_cardtype == LMC_CARDTYPE_T1){
-            lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_LSB);
-            sc->stats.framingBitErrorCount +=
-                lmc_mii_readreg (sc, 0, 18) & 0xff;
-            lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_MSB);
-            sc->stats.framingBitErrorCount +=
-                (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
-            lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_LSB);
-            sc->stats.lineCodeViolationCount +=
-                lmc_mii_readreg (sc, 0, 18) & 0xff;
-            lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_MSB);
-            sc->stats.lineCodeViolationCount +=
-                (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
-            lmc_mii_writereg (sc, 0, 17, T1FRAMER_AERR);
-            regVal = lmc_mii_readreg (sc, 0, 18) & 0xff;
-
-            sc->stats.lossOfFrameCount +=
-                (regVal & T1FRAMER_LOF_MASK) >> 4;
-            sc->stats.changeOfFrameAlignmentCount +=
-                (regVal & T1FRAMER_COFA_MASK) >> 2;
-            sc->stats.severelyErroredFrameCount +=
-                regVal & T1FRAMER_SEF_MASK;
-        }
-
-        if (copy_to_user(ifr->ifr_data, &sc->stats,
-                         sizeof (struct lmc_statistics)))
-                ret = -EFAULT;
-        else
-                ret = 0;
-        break;
+    case LMCIOCGETLMCSTATS:
+            if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
+                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
+                    sc->extra_stats.framingBitErrorCount +=
+                            lmc_mii_readreg(sc, 0, 18) & 0xff;
+                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
+                    sc->extra_stats.framingBitErrorCount +=
+                            (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
+                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
+                    sc->extra_stats.lineCodeViolationCount +=
+                            lmc_mii_readreg(sc, 0, 18) & 0xff;
+                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
+                    sc->extra_stats.lineCodeViolationCount +=
+                            (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
+                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
+                    regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
+
+                    sc->extra_stats.lossOfFrameCount +=
+                            (regVal & T1FRAMER_LOF_MASK) >> 4;
+                    sc->extra_stats.changeOfFrameAlignmentCount +=
+                            (regVal & T1FRAMER_COFA_MASK) >> 2;
+                    sc->extra_stats.severelyErroredFrameCount +=
+                            regVal & T1FRAMER_SEF_MASK;
+            }
+            if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
+                             sizeof(sc->lmc_device->stats)) ||
+                copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
+                             &sc->extra_stats, sizeof(sc->extra_stats)))
+                    ret = -EFAULT;
+            else
+                    ret = 0;
+            break;
 
-    case LMCIOCCLEARLMCSTATS: /*fold01*/
-        if (!capable(CAP_NET_ADMIN)){
-            ret = -EPERM;
-            break;
-        }
+    case LMCIOCCLEARLMCSTATS:
+            if (!capable(CAP_NET_ADMIN)) {
+                    ret = -EPERM;
+                    break;
+            }
 
-        memset (&sc->stats, 0, sizeof (struct lmc_statistics));
-        sc->stats.check = STATCHECK;
-        sc->stats.version_size = (DRIVER_VERSION << 16) +
-            sizeof (struct lmc_statistics);
-        sc->stats.lmc_cardtype = sc->lmc_cardtype;
-        ret = 0;
-        break;
+            memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
+            memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
+            sc->extra_stats.check = STATCHECK;
+            sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
+                    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
+            sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
+            ret = 0;
+            break;
 
     case LMCIOCSETCIRCUIT: /*fold01*/
         if (!capable(CAP_NET_ADMIN)){
@@ -330,7 +310,8 @@ int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
                 ret = -EFAULT;
                 break;
         }
-        if (copy_to_user(ifr->ifr_data + sizeof (u32), lmcEventLogBuf, sizeof (lmcEventLogBuf)))
+        if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
+                         sizeof(lmcEventLogBuf)))
                 ret = -EFAULT;
         else
                 ret = 0;
@@ -641,14 +622,12 @@ int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
 /* the watchdog process that cruises around */
 static void lmc_watchdog (unsigned long data) /*fold00*/
 {
-    struct net_device *dev = (struct net_device *) data;
-    lmc_softc_t *sc;
+    struct net_device *dev = (struct net_device *)data;
+    lmc_softc_t *sc = dev_to_sc(dev);
     int link_status;
-    u_int32_t ticks;
+    u32 ticks;
     unsigned long flags;
 
-    sc = dev->priv;
-
     lmc_trace(dev, "lmc_watchdog in");
 
     spin_lock_irqsave(&sc->lmc_lock, flags);
@@ -677,22 +656,22 @@ static void lmc_watchdog (unsigned long data) /*fold00*/
      * check for a transmit interrupt timeout
      * Has the packet xmt vs xmt serviced threshold been exceeded */
     if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
-        sc->stats.tx_packets > sc->lasttx_packets &&
-        sc->tx_TimeoutInd == 0)
+        sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
+        sc->tx_TimeoutInd == 0)
     {
 
         /* wait for the watchdog to come around again */
         sc->tx_TimeoutInd = 1;
     }
     else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
-             sc->stats.tx_packets > sc->lasttx_packets &&
-             sc->tx_TimeoutInd)
+             sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
+             sc->tx_TimeoutInd)
     {
 
         LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
 
         sc->tx_TimeoutDisplay = 1;
-        sc->stats.tx_TimeoutCnt++;
+        sc->extra_stats.tx_TimeoutCnt++;
 
         /* DEC chip is stuck, hit it with a RESET!!!! */
         lmc_running_reset (dev);
@@ -712,13 +691,11 @@ static void lmc_watchdog (unsigned long data) /*fold00*/
         /* reset the transmit timeout detection flag */
         sc->tx_TimeoutInd = 0;
         sc->lastlmc_taint_tx = sc->lmc_taint_tx;
-        sc->lasttx_packets = sc->stats.tx_packets;
-    }
-    else
-    {
+        sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
+    } else {
         sc->tx_TimeoutInd = 0;
         sc->lastlmc_taint_tx = sc->lmc_taint_tx;
-        sc->lasttx_packets = sc->stats.tx_packets;
+        sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
     }
 
     /* --- end time out check ----------------------------------- */
@@ -748,19 +725,7 @@ static void lmc_watchdog (unsigned long data) /*fold00*/
          sc->last_link_status = 1;
          /* lmc_reset (sc); Again why reset??? */
 
-         /* Inform the world that link protocol is back up. */
          netif_carrier_on(dev);
-
-         /* Now we have to tell the syncppp that we had an outage
-          * and that it should deal.  Calling sppp_reopen here
-          * should do the trick, but we may have to call sppp_close
-          * when the link goes down, and call sppp_open here.
-          * Subject to more testing.
-          * --bbraun
-          */
-
-         lmc_proto_reopen(sc);
-
      }
 
     /* Call media specific watchdog functions */
@@ -816,114 +781,93 @@ kick_timer:
 
 }
 
-static void lmc_setup(struct net_device * const dev) /*fold00*/
+static int lmc_attach(struct net_device *dev, unsigned short encoding,
+                      unsigned short parity)
 {
-    lmc_trace(dev, "lmc_setup in");
-
-    dev->type = ARPHRD_HDLC;
-    dev->hard_start_xmit = lmc_start_xmit;
-    dev->open = lmc_open;
-    dev->stop = lmc_close;
-    dev->get_stats = lmc_get_stats;
-    dev->do_ioctl = lmc_ioctl;
-    dev->tx_timeout = lmc_driver_timeout;
-    dev->watchdog_timeo = (HZ); /* 1 second */
-    
-    lmc_trace(dev, "lmc_setup out");
+        if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
+                return 0;
+        return -EINVAL;
 }
 
-
 static int __devinit lmc_init_one(struct pci_dev *pdev,
                                   const struct pci_device_id *ent)
 {
-    struct net_device *dev;
-    lmc_softc_t *sc;
-    u16 subdevice;
-    u_int16_t AdapModelNum;
-    int err = -ENOMEM;
-    static int cards_found;
-#ifndef GCOM
-    /* We name by type not by vendor */
-    static const char lmcname[] = "hdlc%d";
-#else
-    /* 
-     * GCOM uses LMC vendor name so that clients can know which card
-     * to attach to.
-     */
-    static const char lmcname[] = "lmc%d";
-#endif
-
-
-    /*
-     * Allocate our own device structure
-     */
-    dev = alloc_netdev(sizeof(lmc_softc_t), lmcname, lmc_setup);
-    if (!dev) {
-        printk (KERN_ERR "lmc:alloc_netdev for device failed\n");
-        goto out1;
-    }
- 
-    lmc_trace(dev, "lmc_init_one in");
-
-    err = pci_enable_device(pdev);
-    if (err) {
-            printk(KERN_ERR "lmc: pci enable failed:%d\n", err);
-            goto out2;
-    }
-    
-    if (pci_request_regions(pdev, "lmc")) {
-            printk(KERN_ERR "lmc: pci_request_region failed\n");
-            err = -EIO;
-            goto out3;
-    }
-
-    pci_set_drvdata(pdev, dev);
-
-    if(lmc_first_load == 0){
-        printk(KERN_INFO "Lan Media Corporation WAN Driver Version %d.%d.%d\n",
-               DRIVER_MAJOR_VERSION, DRIVER_MINOR_VERSION,DRIVER_SUB_VERSION);
-        lmc_first_load = 1;
-    }
-    
-    sc = dev->priv;
-    sc->lmc_device = dev;
-    sc->name = dev->name;
-
-    /* Initialize the sppp layer */
-    /* An ioctl can cause a subsequent detach for raw frame interface */
-    dev->ml_priv = sc;
-    sc->if_type = LMC_PPP;
-    sc->check = 0xBEAFCAFE;
-    dev->base_addr = pci_resource_start(pdev, 0);
-    dev->irq = pdev->irq;
-
-    SET_NETDEV_DEV(dev, &pdev->dev);
-
-    /*
-     * This will get the protocol layer ready and do any 1 time init's
-     * Must have a valid sc and dev structure
-     */
-    lmc_proto_init(sc);
-
-    lmc_proto_attach(sc);
+        lmc_softc_t *sc;
+        struct net_device *dev;
+        u16 subdevice;
+        u16 AdapModelNum;
+        int err;
+        static int cards_found;
+
+        /* lmc_trace(dev, "lmc_init_one in"); */
+
+        err = pci_enable_device(pdev);
+        if (err) {
+                printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
+                return err;
+        }
 
-    /*
-     * Why were we changing this???
-     dev->tx_queue_len = 100;
-     */
+        err = pci_request_regions(pdev, "lmc");
+        if (err) {
+                printk(KERN_ERR "lmc: pci_request_region failed\n");
+                goto err_req_io;
+        }
 
-    /* Init the spin lock so can call it latter */
+        /*
+         * Allocate our own device structure
+         */
+        sc = kzalloc(sizeof(lmc_softc_t), GFP_KERNEL);
+        if (!sc) {
+                err = -ENOMEM;
+                goto err_kzalloc;
+        }
 
-    spin_lock_init(&sc->lmc_lock);
-    pci_set_master(pdev);
+        dev = alloc_hdlcdev(sc);
+        if (!dev) {
+                printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
+                goto err_hdlcdev;
+        }
 
-    printk ("%s: detected at %lx, irq %d\n", dev->name,
-            dev->base_addr, dev->irq);
 
-    if (register_netdev (dev) != 0) {
-        printk (KERN_ERR "%s: register_netdev failed.\n", dev->name);
-        goto out4;
-    }
+        dev->type = ARPHRD_HDLC;
+        dev_to_hdlc(dev)->xmit = lmc_start_xmit;
+        dev_to_hdlc(dev)->attach = lmc_attach;
+        dev->open = lmc_open;
+        dev->stop = lmc_close;
+        dev->get_stats = lmc_get_stats;
+        dev->do_ioctl = lmc_ioctl;
+        dev->tx_timeout = lmc_driver_timeout;
+        dev->watchdog_timeo = HZ; /* 1 second */
+        dev->tx_queue_len = 100;
+        sc->lmc_device = dev;
+        sc->name = dev->name;
+        sc->if_type = LMC_PPP;
+        sc->check = 0xBEAFCAFE;
+        dev->base_addr = pci_resource_start(pdev, 0);
+        dev->irq = pdev->irq;
+        pci_set_drvdata(pdev, dev);
+        SET_NETDEV_DEV(dev, &pdev->dev);
+
+        /*
+         * This will get the protocol layer ready and do any 1 time init's
+         * Must have a valid sc and dev structure
+         */
+        lmc_proto_attach(sc);
+
+        /* Init the spin lock so can call it latter */
+
+        spin_lock_init(&sc->lmc_lock);
+        pci_set_master(pdev);
+
+        printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
+               dev->base_addr, dev->irq);
+
+        err = register_hdlc_device(dev);
+        if (err) {
+                printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
+                free_netdev(dev);
+                goto err_hdlcdev;
+        }
 
     sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
     sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
@@ -939,27 +883,27 @@ static int __devinit lmc_init_one(struct pci_dev *pdev,
 
     switch (subdevice) {
     case PCI_DEVICE_ID_LMC_HSSI:
-        printk ("%s: LMC HSSI\n", dev->name);
+        printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
         sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
         sc->lmc_media = &lmc_hssi_media;
         break;
     case PCI_DEVICE_ID_LMC_DS3:
-        printk ("%s: LMC DS3\n", dev->name);
+        printk(KERN_INFO "%s: LMC DS3\n", dev->name);
         sc->lmc_cardtype = LMC_CARDTYPE_DS3;
         sc->lmc_media = &lmc_ds3_media;
         break;
     case PCI_DEVICE_ID_LMC_SSI:
-        printk ("%s: LMC SSI\n", dev->name);
+        printk(KERN_INFO "%s: LMC SSI\n", dev->name);
         sc->lmc_cardtype = LMC_CARDTYPE_SSI;
         sc->lmc_media = &lmc_ssi_media;
         break;
     case PCI_DEVICE_ID_LMC_T1:
-        printk ("%s: LMC T1\n", dev->name);
+        printk(KERN_INFO "%s: LMC T1\n", dev->name);
         sc->lmc_cardtype = LMC_CARDTYPE_T1;
         sc->lmc_media = &lmc_t1_media;
         break;
     default:
-        printk (KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name);
+        printk(KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name);
         break;
     }
 
@@ -977,32 +921,28 @@ static int __devinit lmc_init_one(struct pci_dev *pdev,
      */
     AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
 
-    if ((AdapModelNum == LMC_ADAP_T1
-         && subdevice == PCI_DEVICE_ID_LMC_T1) ||       /* detect LMC1200 */
-        (AdapModelNum == LMC_ADAP_SSI
-         && subdevice == PCI_DEVICE_ID_LMC_SSI) ||      /* detect LMC1000 */
-        (AdapModelNum == LMC_ADAP_DS3
-         && subdevice == PCI_DEVICE_ID_LMC_DS3) ||      /* detect LMC5245 */
-        (AdapModelNum == LMC_ADAP_HSSI
-         && subdevice == PCI_DEVICE_ID_LMC_HSSI))
-    {                           /* detect LMC5200 */
+    if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
+         subdevice != PCI_DEVICE_ID_LMC_T1) &&
+        (AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
+         subdevice != PCI_DEVICE_ID_LMC_SSI) &&
+        (AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
+         subdevice != PCI_DEVICE_ID_LMC_DS3) &&
+        (AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
+         subdevice != PCI_DEVICE_ID_LMC_HSSI))
+            printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
+                   " Subsystem ID = 0x%04x\n",
+                   dev->name, AdapModelNum, subdevice);
 
-    }
-    else {
-        printk ("%s: Model number (%d) miscompare for PCI Subsystem ID = 0x%04x\n",
-                dev->name, AdapModelNum, subdevice);
-//        return (NULL);
-    }
     /*
      * reset clock
      */
     LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
 
     sc->board_idx = cards_found++;
-    sc->stats.check = STATCHECK;
-    sc->stats.version_size = (DRIVER_VERSION << 16) +
-        sizeof (struct lmc_statistics);
-    sc->stats.lmc_cardtype = sc->lmc_cardtype;
+    sc->extra_stats.check = STATCHECK;
+    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
+            sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
+    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 
     sc->lmc_ok = 0;
     sc->last_link_status = 0;
@@ -1010,58 +950,51 @@ static int __devinit lmc_init_one(struct pci_dev *pdev,
     lmc_trace(dev, "lmc_init_one out");
     return 0;
 
- out4:
-    lmc_proto_detach(sc);
- out3:
-    if (pdev) {
-            pci_release_regions(pdev);
-            pci_set_drvdata(pdev, NULL);
-    }
- out2:
-    free_netdev(dev);
- out1:
-    return err;
+err_hdlcdev:
+        pci_set_drvdata(pdev, NULL);
+        kfree(sc);
+err_kzalloc:
+        pci_release_regions(pdev);
+err_req_io:
+        pci_disable_device(pdev);
+        return err;
 }
 
 /*
  * Called from pci when removing module.
  */
-static void __devexit lmc_remove_one (struct pci_dev *pdev)
+static void __devexit lmc_remove_one(struct pci_dev *pdev)
 {
-    struct net_device *dev = pci_get_drvdata(pdev);
-    
-    if (dev) {
-            lmc_softc_t *sc = dev->priv;
-            
-            printk("%s: removing...\n", dev->name);
-            lmc_proto_detach(sc);
-            unregister_netdev(dev);
-            free_netdev(dev);
-            pci_release_regions(pdev);
-            pci_disable_device(pdev);
-            pci_set_drvdata(pdev, NULL);
-    }
+        struct net_device *dev = pci_get_drvdata(pdev);
+
+        if (dev) {
+                printk(KERN_DEBUG "%s: removing...\n", dev->name);
+                unregister_hdlc_device(dev);
+                free_netdev(dev);
+                pci_release_regions(pdev);
+                pci_disable_device(pdev);
+                pci_set_drvdata(pdev, NULL);
+        }
 }
 
 /* After this is called, packets can be sent.
  * Does not initialize the addresses
  */
-static int lmc_open (struct net_device *dev) /*fold00*/
+static int lmc_open(struct net_device *dev)
 {
-    lmc_softc_t *sc = dev->priv;
+    lmc_softc_t *sc = dev_to_sc(dev);
+    int err;
 
     lmc_trace(dev, "lmc_open in");
 
     lmc_led_on(sc, LMC_DS3_LED0);
 
-    lmc_dec_reset (sc);
-    lmc_reset (sc);
-
-    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
-    LMC_EVENT_LOG(LMC_EVENT_RESET2,
-                  lmc_mii_readreg (sc, 0, 16),
-                  lmc_mii_readreg (sc, 0, 17));
+    lmc_dec_reset(sc);
+    lmc_reset(sc);
 
+    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
+    LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
+                  lmc_mii_readreg(sc, 0, 17));
 
     if (sc->lmc_ok){
         lmc_trace(dev, "lmc_open lmc_ok out");
@@ -1106,14 +1039,14 @@ static int lmc_open (struct net_device *dev) /*fold00*/
 
     /* dev->flags |= IFF_UP; */
 
-    lmc_proto_open(sc);
+    if ((err = lmc_proto_open(sc)) != 0)
+            return err;
 
     dev->do_ioctl = lmc_ioctl;
 
 
     netif_start_queue(dev);
-    
-    sc->stats.tx_tbusy0++ ;
+    sc->extra_stats.tx_tbusy0++;
 
     /*
      * select what interrupts we want to get
@@ -1165,8 +1098,7 @@ static int lmc_open (struct net_device *dev) /*fold00*/
 
 static void lmc_running_reset (struct net_device *dev) /*fold00*/
 {
-
-    lmc_softc_t *sc = (lmc_softc_t *) dev->priv;
+    lmc_softc_t *sc = dev_to_sc(dev);
 
     lmc_trace(dev, "lmc_runnig_reset in");
 
@@ -1184,7 +1116,7 @@ static void lmc_running_reset (struct net_device *dev) /*fold00*/
     netif_wake_queue(dev);
 
     sc->lmc_txfull = 0;
-    sc->stats.tx_tbusy0++ ;
+    sc->extra_stats.tx_tbusy0++;
 
     sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
     LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
@@ -1200,14 +1132,13 @@ static void lmc_running_reset (struct net_device *dev) /*fold00*/
  * This disables the timer for the watchdog and keepalives,
  * and disables the irq for dev.
  */
-static int lmc_close (struct net_device *dev) /*fold00*/
+static int lmc_close(struct net_device *dev)
 {
     /* not calling release_region() as we should */
-    lmc_softc_t *sc;
+    lmc_softc_t *sc = dev_to_sc(dev);
 
     lmc_trace(dev, "lmc_close in");
-    
-    sc = dev->priv;
+
     sc->lmc_ok = 0;
     sc->lmc_media->set_link_status (sc, 0);
     del_timer (&sc->timer);
@@ -1215,7 +1146,7 @@ static int lmc_close (struct net_device *dev) /*fold00*/
     lmc_ifdown (dev);
 
     lmc_trace(dev, "lmc_close out");
-    
+
     return 0;
 }
 
@@ -1223,16 +1154,16 @@ static int lmc_close (struct net_device *dev) /*fold00*/
 /* When the interface goes down, this is called */
 static int lmc_ifdown (struct net_device *dev) /*fold00*/
 {
-    lmc_softc_t *sc = dev->priv;
+    lmc_softc_t *sc = dev_to_sc(dev);
     u32 csr6;
     int i;
 
     lmc_trace(dev, "lmc_ifdown in");
-    
+
     /* Don't let anything else go on right now */
     //    dev->start = 0;
     netif_stop_queue(dev);
-    sc->stats.tx_tbusy1++ ;
+    sc->extra_stats.tx_tbusy1++;
 
     /* stop interrupts */
     /* Clear the interrupt mask */
@@ -1244,8 +1175,8 @@ static int lmc_ifdown (struct net_device *dev) /*fold00*/
     csr6 &= ~LMC_DEC_SR;                /* Turn off the Receive bit */
     LMC_CSR_WRITE (sc, csr_command, csr6);
 
-    sc->stats.rx_missed_errors +=
-        LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
+    sc->lmc_device->stats.rx_missed_errors +=
+            LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
 
     /* release the interrupt */
     if(sc->got_irq == 1){
@@ -1276,7 +1207,7 @@ static int lmc_ifdown (struct net_device *dev) /*fold00*/
     lmc_led_off (sc, LMC_MII16_LED_ALL);
 
     netif_wake_queue(dev);
-    sc->stats.tx_tbusy0++ ;
+    sc->extra_stats.tx_tbusy0++;
 
     lmc_trace(dev, "lmc_ifdown out");
 
@@ -1289,7 +1220,7 @@ static int lmc_ifdown (struct net_device *dev) /*fold00*/
 static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
 {
     struct net_device *dev = (struct net_device *) dev_instance;
-    lmc_softc_t *sc;
+    lmc_softc_t *sc = dev_to_sc(dev);
     u32 csr;
     int i;
     s32 stat;
@@ -1300,8 +1231,6 @@ static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
 
     lmc_trace(dev, "lmc_interrupt in");
 
-    sc = dev->priv;
-    
     spin_lock(&sc->lmc_lock);
 
     /*
@@ -1354,7 +1283,7 @@ static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
 
             int         n_compl = 0 ;
             /* reset the transmit timeout detection flag -baz */
-            sc->stats.tx_NoCompleteCnt = 0;
+            sc->extra_stats.tx_NoCompleteCnt = 0;
 
             badtx = sc->lmc_taint_tx;
             i = badtx % LMC_TXDESCS;
@@ -1378,27 +1307,25 @@ static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
                 if (sc->lmc_txq[i] == NULL)
                     continue;
 
-                /*
-                 * Check the total error summary to look for any errors
-                 */
-                if (stat & 0x8000) {
-                    sc->stats.tx_errors++;
-                    if (stat & 0x4104)
-                        sc->stats.tx_aborted_errors++;
-                    if (stat & 0x0C00)
-                        sc->stats.tx_carrier_errors++;
-                    if (stat & 0x0200)
-                        sc->stats.tx_window_errors++;
-                    if (stat & 0x0002)
-                        sc->stats.tx_fifo_errors++;
-                }
-                else {
-                    
-                    sc->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
-                    
-                    sc->stats.tx_packets++;
+                /*
+                 * Check the total error summary to look for any errors
+                 */
+                if (stat & 0x8000) {
+                        sc->lmc_device->stats.tx_errors++;
+                        if (stat & 0x4104)
+                                sc->lmc_device->stats.tx_aborted_errors++;
+                        if (stat & 0x0C00)
+                                sc->lmc_device->stats.tx_carrier_errors++;
+                        if (stat & 0x0200)
+                                sc->lmc_device->stats.tx_window_errors++;
+                        if (stat & 0x0002)
+                                sc->lmc_device->stats.tx_fifo_errors++;
+                } else {
+                        sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
+
+                        sc->lmc_device->stats.tx_packets++;
                 }
-                
+
                 //                dev_kfree_skb(sc->lmc_txq[i]);
                 dev_kfree_skb_irq(sc->lmc_txq[i]);
                 sc->lmc_txq[i] = NULL;
@@ -1415,13 +1342,13 @@ static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
             LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
             sc->lmc_txfull = 0;
             netif_wake_queue(dev);
-            sc->stats.tx_tbusy0++ ;
+            sc->extra_stats.tx_tbusy0++;
 
 
 #ifdef DEBUG
-            sc->stats.dirtyTx = badtx;
-            sc->stats.lmc_next_tx = sc->lmc_next_tx;
-            sc->stats.lmc_txfull = sc->lmc_txfull;
+            sc->extra_stats.dirtyTx = badtx;
+            sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
+            sc->extra_stats.lmc_txfull = sc->lmc_txfull;
 #endif
             sc->lmc_taint_tx = badtx;
 
@@ -1476,9 +1403,9 @@ lmc_int_fail_out:
     return IRQ_RETVAL(handled);
 }
 
-static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00*/
+static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
-    lmc_softc_t *sc;
+    lmc_softc_t *sc = dev_to_sc(dev);
     u32 flag;
     int entry;
     int ret = 0;
@@ -1486,8 +1413,6 @@ static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00
 
     lmc_trace(dev, "lmc_start_xmit in");
 
-    sc = dev->priv;
-
     spin_lock_irqsave(&sc->lmc_lock, flags);
 
     /* normal path, tbusy known to be zero */
@@ -1532,8 +1457,8 @@ static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00
     if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
     {                           /* ring full, go busy */
         sc->lmc_txfull = 1;
-        netif_stop_queue(dev);
-        sc->stats.tx_tbusy1++ ;
+        netif_stop_queue(dev);
+        sc->extra_stats.tx_tbusy1++;
         LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
     }
 #endif
@@ -1550,7 +1475,7 @@ static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00
      * the watchdog timer handler. -baz
      */
 
-    sc->stats.tx_NoCompleteCnt++;
+    sc->extra_stats.tx_NoCompleteCnt++;
     sc->lmc_next_tx++;
 
     /* give ownership to the chip */
@@ -1569,9 +1494,9 @@ static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00
 }
 
 
-static int lmc_rx (struct net_device *dev) /*fold00*/
+static int lmc_rx(struct net_device *dev)
 {
-    lmc_softc_t *sc;
+    lmc_softc_t *sc = dev_to_sc(dev);
     int i;
     int rx_work_limit = LMC_RXDESCS;
     unsigned int next_rx;
@@ -1583,8 +1508,6 @@ static int lmc_rx (struct net_device *dev) /*fold00*/
 
     lmc_trace(dev, "lmc_rx in");
 
-    sc = dev->priv;
-
     lmc_led_on(sc, LMC_DS3_LED3);
 
     rxIntLoopCnt = 0;           /* debug -baz */
@@ -1597,39 +1520,38 @@ static int lmc_rx (struct net_device *dev) /*fold00*/
         rxIntLoopCnt++;         /* debug -baz */
         len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
         if ((stat & 0x0300) != 0x0300) {  /* Check first segment and last segment */
-            if ((stat & 0x0000ffff) != 0x7fff) {
-                /* Oversized frame */
-                sc->stats.rx_length_errors++;
-                goto skip_packet;
-            }
-        }
-
-        if(stat & 0x00000008){ /* Catch a dribbling bit error */
-            sc->stats.rx_errors++;
-            sc->stats.rx_frame_errors++;
-            goto skip_packet;
-        }
+                if ((stat & 0x0000ffff) != 0x7fff) {
+                        /* Oversized frame */
+                        sc->lmc_device->stats.rx_length_errors++;
+                        goto skip_packet;
+                }
+        }
 
+        if (stat & 0x00000008) { /* Catch a dribbling bit error */
+                sc->lmc_device->stats.rx_errors++;
+                sc->lmc_device->stats.rx_frame_errors++;
+                goto skip_packet;
+        }
 
-        if(stat & 0x00000004){ /* Catch a CRC error by the Xilinx */
-            sc->stats.rx_errors++;
-            sc->stats.rx_crc_errors++;
-            goto skip_packet;
-        }
 
+        if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
+                sc->lmc_device->stats.rx_errors++;
+                sc->lmc_device->stats.rx_crc_errors++;
+                goto skip_packet;
+        }
 
-        if (len > LMC_PKT_BUF_SZ){
-            sc->stats.rx_length_errors++;
-            localLengthErrCnt++;
-            goto skip_packet;
-        }
+        if (len > LMC_PKT_BUF_SZ) {
+                sc->lmc_device->stats.rx_length_errors++;
+                localLengthErrCnt++;
+                goto skip_packet;
+        }
 
-        if (len < sc->lmc_crcSize + 2) {
-            sc->stats.rx_length_errors++;
-            sc->stats.rx_SmallPktCnt++;
-            localLengthErrCnt++;
-            goto skip_packet;
-        }
+        if (len < sc->lmc_crcSize + 2) {
+                sc->lmc_device->stats.rx_length_errors++;
+                sc->extra_stats.rx_SmallPktCnt++;
+                localLengthErrCnt++;
+                goto skip_packet;
+        }
 
         if(stat & 0x00004000){
             printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
@@ -1656,8 +1578,8 @@ static int lmc_rx (struct net_device *dev) /*fold00*/
         }
         
         dev->last_rx = jiffies;
-        sc->stats.rx_packets++;
-        sc->stats.rx_bytes += len;
+        sc->lmc_device->stats.rx_packets++;
+        sc->lmc_device->stats.rx_bytes += len;
 
         LMC_CONSOLE_LOG("recv", skb->data, len);
 
@@ -1679,7 +1601,6 @@ static int lmc_rx (struct net_device *dev) /*fold00*/
 
             skb_put (skb, len);
             skb->protocol = lmc_proto_type(sc, skb);
-            skb->protocol = htons(ETH_P_WAN_PPP);
             skb_reset_mac_header(skb);
             /* skb_reset_network_header(skb); */
             skb->dev = dev;
@@ -1704,7 +1625,7 @@ static int lmc_rx (struct net_device *dev) /*fold00*/
                  * in which care we'll try to allocate the buffer
                  * again.  (once a second)
                  */
-                sc->stats.rx_BuffAllocErr++;
+                sc->extra_stats.rx_BuffAllocErr++;
                 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
                 sc->failed_recv_alloc = 1;
                 goto skip_out_of_mem;
@@ -1739,16 +1660,14 @@ static int lmc_rx (struct net_device *dev) /*fold00*/
      * descriptors with bogus packets
      *
     if (localLengthErrCnt > LMC_RXDESCS - 3) {
-        sc->stats.rx_BadPktSurgeCnt++;
-        LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE,
-                      localLengthErrCnt,
-                      sc->stats.rx_BadPktSurgeCnt);
+        sc->extra_stats.rx_BadPktSurgeCnt++;
+        LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
+                      sc->extra_stats.rx_BadPktSurgeCnt);
     } */
 
     /* save max count of receive descriptors serviced */
-    if (rxIntLoopCnt > sc->stats.rxIntLoopCnt) {
-        sc->stats.rxIntLoopCnt = rxIntLoopCnt;  /* debug -baz */
-    }
+    if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
+            sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
 
 #ifdef DEBUG
     if (rxIntLoopCnt == 0)
@@ -1775,23 +1694,22 @@ skip_out_of_mem:
     return 0;
 }
 
-static struct net_device_stats *lmc_get_stats (struct net_device *dev) /*fold00*/
+static struct net_device_stats *lmc_get_stats(struct net_device *dev)
 {
-    lmc_softc_t *sc = dev->priv;
+    lmc_softc_t *sc = dev_to_sc(dev);
     unsigned long flags;
 
     lmc_trace(dev, "lmc_get_stats in");
 
-
     spin_lock_irqsave(&sc->lmc_lock, flags);
 
-    sc->stats.rx_missed_errors += LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
+    sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
 
     spin_unlock_irqrestore(&sc->lmc_lock, flags);
 
     lmc_trace(dev, "lmc_get_stats out");
 
-    return (struct net_device_stats *) &sc->stats;
+    return &sc->lmc_device->stats;
 }
 
 static struct pci_driver lmc_driver = {
@@ -1970,7 +1888,7 @@ static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
     {
         if (sc->lmc_txq[i] != NULL){            /* have buffer */
             dev_kfree_skb(sc->lmc_txq[i]);      /* free it */
-            sc->stats.tx_dropped++;      /* We just dropped a packet */
+            sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */
         }
         sc->lmc_txq[i] = NULL;
         sc->lmc_txring[i].status = 0x00000000;
@@ -1982,7 +1900,7 @@ static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
     lmc_trace(sc->lmc_device, "lmc_softreset out");
 }
 
-void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
+void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
 {
     lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
     sc->lmc_gpio_io &= ~bits;
@@ -1990,7 +1908,7 @@ void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
     lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
 }
 
-void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
+void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
 {
     lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
     sc->lmc_gpio_io |= bits;
@@ -1998,7 +1916,7 @@ void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
     lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
 }
 
-void lmc_led_on(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
+void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
 {
     lmc_trace(sc->lmc_device, "lmc_led_on in");
     if((~sc->lmc_miireg16) & led){ /* Already on! */
@@ -2011,7 +1929,7 @@ void lmc_led_on(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
     lmc_trace(sc->lmc_device, "lmc_led_on out");
 }
 
-void lmc_led_off(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
+void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
 {
     lmc_trace(sc->lmc_device, "lmc_led_off in");
     if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
@@ -2061,13 +1979,13 @@ static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
      */
     sc->lmc_media->init(sc);
 
-    sc->stats.resetCount++;
+    sc->extra_stats.resetCount++;
     lmc_trace(sc->lmc_device, "lmc_reset out");
 }
 
 static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
 {
-    u_int32_t val;
+    u32 val;
     lmc_trace(sc->lmc_device, "lmc_dec_reset in");
 
     /*
@@ -2151,23 +2069,21 @@ static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00
     lmc_trace(sc->lmc_device, "lmc_initcsrs out");
 }
 
-static void lmc_driver_timeout(struct net_device *dev) { /*fold00*/
-    lmc_softc_t *sc;
+static void lmc_driver_timeout(struct net_device *dev)
+{
+    lmc_softc_t *sc = dev_to_sc(dev);
     u32 csr6;
     unsigned long flags;
 
     lmc_trace(dev, "lmc_driver_timeout in");
 
-    sc = dev->priv;
-
     spin_lock_irqsave(&sc->lmc_lock, flags);
 
     printk("%s: Xmitter busy|\n", dev->name);
 
-    sc->stats.tx_tbusy_calls++ ;
-    if (jiffies - dev->trans_start < TX_TIMEOUT) {
-        goto bug_out;
-    }
+    sc->extra_stats.tx_tbusy_calls++;
+    if (jiffies - dev->trans_start < TX_TIMEOUT)
+            goto bug_out;
 
     /*
      * Chip seems to have locked up
@@ -2178,7 +2094,7 @@ static void lmc_driver_timeout(struct net_device *dev) { /*fold00*/
 
     LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
                   LMC_CSR_READ (sc, csr_status),
-                  sc->stats.tx_ProcTimeout);
+                  sc->extra_stats.tx_ProcTimeout);
 
     lmc_running_reset (dev);
 
@@ -2195,8 +2111,8 @@ static void lmc_driver_timeout(struct net_device *dev) { /*fold00*/
     /* immediate transmit */
     LMC_CSR_WRITE (sc, csr_txpoll, 0);
 
-    sc->stats.tx_errors++;
-    sc->stats.tx_ProcTimeout++; /* -baz */
+    sc->lmc_device->stats.tx_errors++;
+    sc->extra_stats.tx_ProcTimeout++; /* -baz */
 
     dev->trans_start = jiffies;
 
diff --git a/drivers/net/wan/lmc/lmc_media.c b/drivers/net/wan/lmc/lmc_media.c
index 8aa461c941ce..f327674fc93a 100644
--- a/drivers/net/wan/lmc/lmc_media.c
+++ b/drivers/net/wan/lmc/lmc_media.c
@@ -16,8 +16,6 @@
 #include <linux/inet.h>
 #include <linux/bitops.h>
 
-#include <net/syncppp.h>
-
 #include <asm/processor.h>             /* Processor type for cache alignment. */
 #include <asm/io.h>
 #include <asm/dma.h>
@@ -95,8 +93,7 @@ static void lmc_dummy_set_1 (lmc_softc_t * const, int);
 static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *);
 
 static inline void write_av9110_bit (lmc_softc_t *, int);
-static void write_av9110 (lmc_softc_t *, u_int32_t, u_int32_t, u_int32_t,
-                          u_int32_t, u_int32_t);
+static void write_av9110(lmc_softc_t *, u32, u32, u32, u32, u32);
 
 lmc_media_t lmc_ds3_media = {
   lmc_ds3_init,                 /* special media init stuff */
@@ -427,7 +424,7 @@ lmc_ds3_set_scram (lmc_softc_t * const sc, int ie)
 static int
 lmc_ds3_get_link_status (lmc_softc_t * const sc)
 {
-    u_int16_t link_status, link_status_11;
+    u16 link_status, link_status_11;
     int ret = 1;
 
     lmc_mii_writereg (sc, 0, 17, 7);
@@ -449,7 +446,7 @@ lmc_ds3_get_link_status (lmc_softc_t * const sc)
         (link_status & LMC_FRAMER_REG0_OOFS)){
         ret = 0;
         if(sc->last_led_err[3] != 1){
-            u16 r1;
+            u16 r1;
             lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */
             r1 = lmc_mii_readreg (sc, 0, 18);
             r1 &= 0xfe;
@@ -462,7 +459,7 @@ lmc_ds3_get_link_status (lmc_softc_t * const sc)
     else {
         lmc_led_off(sc, LMC_DS3_LED3);  /* turn on red LED */
         if(sc->last_led_err[3] == 1){
-            u16 r1;
+            u16 r1;
             lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */
             r1 = lmc_mii_readreg (sc, 0, 18);
             r1 |= 0x01;
@@ -540,20 +537,19 @@ lmc_ds3_watchdog (lmc_softc_t * const sc)
  *  SSI methods
  */
 
-static void
-lmc_ssi_init (lmc_softc_t * const sc)
+static void lmc_ssi_init(lmc_softc_t * const sc)
 {
-  u_int16_t mii17;
-  int cable;
+        u16 mii17;
+        int cable;
 
-  sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
+        sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
 
-  mii17 = lmc_mii_readreg (sc, 0, 17);
+        mii17 = lmc_mii_readreg(sc, 0, 17);
 
-  cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT;
-  sc->ictl.cable_type = cable;
+        cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT;
+        sc->ictl.cable_type = cable;
 
-  lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
+        lmc_gpio_mkoutput(sc, LMC_GEP_SSI_TXCLOCK);
 }
 
 static void
@@ -681,11 +677,11 @@ lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl)
 static int
 lmc_ssi_get_link_status (lmc_softc_t * const sc)
 {
-  u_int16_t link_status;
-  u_int32_t ticks;
+  u16 link_status;
+  u32 ticks;
   int ret = 1;
   int hw_hdsk = 1;
-  
+
   /*
    * missing CTS?  Hmm.  If we require CTS on, we may never get the
    * link to come up, so omit it in this test.
@@ -720,9 +716,9 @@ lmc_ssi_get_link_status (lmc_softc_t * const sc)
   }
   else if (ticks == 0 ) {                               /* no clock found ? */
       ret = 0;
-      if(sc->last_led_err[3] != 1){
-          sc->stats.tx_lossOfClockCnt++;
-          printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
+      if (sc->last_led_err[3] != 1) {
+              sc->extra_stats.tx_lossOfClockCnt++;
+              printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
       }
       sc->last_led_err[3] = 1;
       lmc_led_on (sc, LMC_MII16_LED3);  /* turn ON red LED */
@@ -838,9 +834,7 @@ write_av9110_bit (lmc_softc_t * sc, int c)
   LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 }
 
-static void
-write_av9110 (lmc_softc_t * sc, u_int32_t n, u_int32_t m, u_int32_t v,
-              u_int32_t x, u_int32_t r)
+static void write_av9110(lmc_softc_t *sc, u32 n, u32 m, u32 v, u32 x, u32 r)
 {
   int i;
 
@@ -887,19 +881,13 @@ write_av9110 (lmc_softc_t * sc, u_int32_t n, u_int32_t m, u_int32_t v,
                      | LMC_GEP_SSI_GENERATOR));
 }
 
-static void
-lmc_ssi_watchdog (lmc_softc_t * const sc)
+static void lmc_ssi_watchdog(lmc_softc_t * const sc)
 {
-  u_int16_t mii17 = lmc_mii_readreg (sc, 0, 17);
-  if (((mii17 >> 3) & 7) == 7)
-    {
-      lmc_led_off (sc, LMC_MII16_LED2);
-    }
-  else
-    {
-      lmc_led_on (sc, LMC_MII16_LED2);
-    }
-
+        u16 mii17 = lmc_mii_readreg(sc, 0, 17);
+        if (((mii17 >> 3) & 7) == 7)
+                lmc_led_off(sc, LMC_MII16_LED2);
+        else
+                lmc_led_on(sc, LMC_MII16_LED2);
 }
 
 /*
@@ -929,7 +917,7 @@ lmc_t1_read (lmc_softc_t * const sc, int a)
 static void
 lmc_t1_init (lmc_softc_t * const sc)
 {
-  u_int16_t mii16;
+  u16 mii16;
   int i;
 
   sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
@@ -1028,7 +1016,7 @@ lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
  */ static int
 lmc_t1_get_link_status (lmc_softc_t * const sc)
 {
-    u_int16_t link_status;
+    u16 link_status;
     int ret = 1;
 
   /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
diff --git a/drivers/net/wan/lmc/lmc_proto.c b/drivers/net/wan/lmc/lmc_proto.c
index 85315758198d..be9877ff551e 100644
--- a/drivers/net/wan/lmc/lmc_proto.c
+++ b/drivers/net/wan/lmc/lmc_proto.c
@@ -36,9 +36,6 @@
 #include <linux/workqueue.h>
 #include <linux/proc_fs.h>
 #include <linux/bitops.h>
-
-#include <net/syncppp.h>
-
 #include <asm/processor.h>             /* Processor type for cache alignment. */
 #include <asm/io.h>
 #include <asm/dma.h>
@@ -50,48 +47,6 @@
 #include "lmc_ioctl.h"
 #include "lmc_proto.h"
 
-/*
- * The compile-time variable SPPPSTUP causes the module to be
- * compiled without referencing any of the sync ppp routines.
- */
-#ifdef SPPPSTUB
-#define SPPP_detach(d)  (void)0
-#define SPPP_open(d)    0
-#define SPPP_reopen(d)  (void)0
-#define SPPP_close(d)   (void)0
-#define SPPP_attach(d)  (void)0
-#define SPPP_do_ioctl(d,i,c)    -EOPNOTSUPP
-#else
-#define SPPP_attach(x)  sppp_attach((x)->pd)
-#define SPPP_detach(x)  sppp_detach((x)->pd->dev)
-#define SPPP_open(x)    sppp_open((x)->pd->dev)
-#define SPPP_reopen(x)  sppp_reopen((x)->pd->dev)
-#define SPPP_close(x)   sppp_close((x)->pd->dev)
-#define SPPP_do_ioctl(x, y, z)  sppp_do_ioctl((x)->pd->dev, (y), (z))
-#endif
-
-// init
-void lmc_proto_init(lmc_softc_t *sc) /*FOLD00*/
-{
-    lmc_trace(sc->lmc_device, "lmc_proto_init in");
-    switch(sc->if_type){
-    case LMC_PPP:
-        sc->pd = kmalloc(sizeof(struct ppp_device), GFP_KERNEL);
-        if (!sc->pd) {
-                printk("lmc_proto_init(): kmalloc failure!\n");
-                return;
-        }
-        sc->pd->dev = sc->lmc_device;
-        sc->if_ptr = sc->pd;
-        break;
-    case LMC_RAW:
-        break;
-    default:
-        break;
-    }
-    lmc_trace(sc->lmc_device, "lmc_proto_init out");
-}
-
 // attach
 void lmc_proto_attach(lmc_softc_t *sc) /*FOLD00*/
 {
@@ -100,7 +55,6 @@ void lmc_proto_attach(lmc_softc_t *sc) /*FOLD00*/
     case LMC_PPP:
         {
             struct net_device *dev = sc->lmc_device;
-            SPPP_attach(sc);
             dev->do_ioctl = lmc_ioctl;
         }
         break;
@@ -108,7 +62,7 @@ void lmc_proto_attach(lmc_softc_t *sc) /*FOLD00*/
         {
             struct net_device *dev = sc->lmc_device;
             /*
-             * They set a few basics because they don't use sync_ppp
+             * They set a few basics because they don't use HDLC
              */
             dev->flags |= IFF_POINTOPOINT;
 
@@ -124,88 +78,39 @@ void lmc_proto_attach(lmc_softc_t *sc) /*FOLD00*/
     lmc_trace(sc->lmc_device, "lmc_proto_attach out");
 }
 
-// detach
-void lmc_proto_detach(lmc_softc_t *sc) /*FOLD00*/
+int lmc_proto_ioctl(lmc_softc_t *sc, struct ifreq *ifr, int cmd)
 {
-    switch(sc->if_type){
-    case LMC_PPP:
-        SPPP_detach(sc);
-        break;
-    case LMC_RAW: /* Tell someone we're detaching? */
-        break;
-    default:
-        break;
-    }
-
+        lmc_trace(sc->lmc_device, "lmc_proto_ioctl");
+        if (sc->if_type == LMC_PPP)
+                return hdlc_ioctl(sc->lmc_device, ifr, cmd);
+        return -EOPNOTSUPP;
 }
 
-// reopen
-void lmc_proto_reopen(lmc_softc_t *sc) /*FOLD00*/
+int lmc_proto_open(lmc_softc_t *sc)
 {
-    lmc_trace(sc->lmc_device, "lmc_proto_reopen in");
-    switch(sc->if_type){
-    case LMC_PPP:
-        SPPP_reopen(sc);
-        break;
-    case LMC_RAW: /* Reset the interface after being down, prerape to receive packets again */
-        break;
-    default:
-        break;
-    }
-    lmc_trace(sc->lmc_device, "lmc_proto_reopen out");
-}
+        int ret = 0;
 
+        lmc_trace(sc->lmc_device, "lmc_proto_open in");
 
-// ioctl
-int lmc_proto_ioctl(lmc_softc_t *sc, struct ifreq *ifr, int cmd) /*FOLD00*/
-{
-    lmc_trace(sc->lmc_device, "lmc_proto_ioctl out");
-    switch(sc->if_type){
-    case LMC_PPP:
-        return SPPP_do_ioctl (sc, ifr, cmd);
-        break;
-    default:
-        return -EOPNOTSUPP;
-        break;
-    }
-    lmc_trace(sc->lmc_device, "lmc_proto_ioctl out");
+        if (sc->if_type == LMC_PPP) {
+                ret = hdlc_open(sc->lmc_device);
+                if (ret < 0)
+                        printk(KERN_WARNING "%s: HDLC open failed: %d\n",
+                               sc->name, ret);
+        }
+
+        lmc_trace(sc->lmc_device, "lmc_proto_open out");
+        return ret;
 }
 
-// open
-void lmc_proto_open(lmc_softc_t *sc) /*FOLD00*/
+void lmc_proto_close(lmc_softc_t *sc)
 {
-    int ret;
+        lmc_trace(sc->lmc_device, "lmc_proto_close in");
 
-    lmc_trace(sc->lmc_device, "lmc_proto_open in");
-    switch(sc->if_type){
-    case LMC_PPP:
-        ret = SPPP_open(sc);
-        if(ret < 0)
-            printk("%s: syncPPP open failed: %d\n", sc->name, ret);
-        break;
-    case LMC_RAW: /* We're about to start getting packets! */
-        break;
-    default:
-        break;
-    }
-    lmc_trace(sc->lmc_device, "lmc_proto_open out");
-}
-
-// close
+        if (sc->if_type == LMC_PPP)
+                hdlc_close(sc->lmc_device);
 
-void lmc_proto_close(lmc_softc_t *sc) /*FOLD00*/
-{
-    lmc_trace(sc->lmc_device, "lmc_proto_close in");
-    switch(sc->if_type){
-    case LMC_PPP:
-        SPPP_close(sc);
-        break;
-    case LMC_RAW: /* Interface going down */
-        break;
-    default:
-        break;
-    }
-    lmc_trace(sc->lmc_device, "lmc_proto_close out");
+        lmc_trace(sc->lmc_device, "lmc_proto_close out");
 }
 
 __be16 lmc_proto_type(lmc_softc_t *sc, struct sk_buff *skb) /*FOLD00*/
@@ -213,8 +118,8 @@ __be16 lmc_proto_type(lmc_softc_t *sc, struct sk_buff *skb) /*FOLD00*/
     lmc_trace(sc->lmc_device, "lmc_proto_type in");
     switch(sc->if_type){
     case LMC_PPP:
-        return htons(ETH_P_WAN_PPP);
-        break;
+            return hdlc_type_trans(skb, sc->lmc_device);
+            break;
     case LMC_NET:
         return htons(ETH_P_802_2);
         break;
@@ -245,4 +150,3 @@ void lmc_proto_netif(lmc_softc_t *sc, struct sk_buff *skb) /*FOLD00*/
     }
     lmc_trace(sc->lmc_device, "lmc_proto_netif out");
 }
-
diff --git a/drivers/net/wan/lmc/lmc_proto.h b/drivers/net/wan/lmc/lmc_proto.h
index ccaa69e8b3c7..662148c54644 100644
--- a/drivers/net/wan/lmc/lmc_proto.h
+++ b/drivers/net/wan/lmc/lmc_proto.h
@@ -1,16 +1,18 @@
 #ifndef _LMC_PROTO_H_
 #define _LMC_PROTO_H_
 
-void lmc_proto_init(lmc_softc_t *sc);
+#include <linux/hdlc.h>
+
 void lmc_proto_attach(lmc_softc_t *sc);
-void lmc_proto_detach(lmc_softc_t *sc);
-void lmc_proto_reopen(lmc_softc_t *sc);
 int lmc_proto_ioctl(lmc_softc_t *sc, struct ifreq *ifr, int cmd);
-void lmc_proto_open(lmc_softc_t *sc);
+int lmc_proto_open(lmc_softc_t *sc);
 void lmc_proto_close(lmc_softc_t *sc);
 __be16 lmc_proto_type(lmc_softc_t *sc, struct sk_buff *skb);
 void lmc_proto_netif(lmc_softc_t *sc, struct sk_buff *skb);
-int lmc_skb_rawpackets(char *buf, char **start, off_t offset, int len, int unused);
 
-#endif
+static inline lmc_softc_t* dev_to_sc(struct net_device *dev)
+{
+        return (lmc_softc_t *)dev_to_hdlc(dev)->priv;
+}
 
+#endif
diff --git a/drivers/net/wan/lmc/lmc_var.h b/drivers/net/wan/lmc/lmc_var.h
index 6d003a39bfad..65d01978e784 100644
--- a/drivers/net/wan/lmc/lmc_var.h
+++ b/drivers/net/wan/lmc/lmc_var.h
@@ -1,8 +1,6 @@
 #ifndef _LMC_VAR_H_
 #define _LMC_VAR_H_
 
-/* $Id: lmc_var.h,v 1.17 2000/04/06 12:16:47 asj Exp $ */
-
  /*
   * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
   * All rights reserved.  www.lanmedia.com
@@ -19,23 +17,6 @@
 
 #include <linux/timer.h>
 
-#ifndef __KERNEL__
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
-#define BITS_PER_LONG 32 
-
-#endif
-
 /*
  * basic definitions used in lmc include files
  */
@@ -45,9 +26,6 @@ typedef struct lmc___media lmc_media_t;
 typedef struct lmc___ctl lmc_ctl_t;
 
 #define lmc_csrptr_t    unsigned long
-#define u_int16_t       u16
-#define u_int8_t        u8
-#define tulip_uint32_t  u32
 
 #define LMC_REG_RANGE 0x80
 
@@ -122,45 +100,45 @@ struct lmc_regfile_t {
  *  used to define bits in the second tulip_desc_t field (length)
  *  for the transmit descriptor -baz */
 
-#define LMC_TDES_FIRST_BUFFER_SIZE       ((u_int32_t)(0x000007FF))
-#define LMC_TDES_SECOND_BUFFER_SIZE      ((u_int32_t)(0x003FF800))
-#define LMC_TDES_HASH_FILTERING          ((u_int32_t)(0x00400000))
-#define LMC_TDES_DISABLE_PADDING         ((u_int32_t)(0x00800000))
-#define LMC_TDES_SECOND_ADDR_CHAINED     ((u_int32_t)(0x01000000))
-#define LMC_TDES_END_OF_RING             ((u_int32_t)(0x02000000))
-#define LMC_TDES_ADD_CRC_DISABLE         ((u_int32_t)(0x04000000))
-#define LMC_TDES_SETUP_PACKET            ((u_int32_t)(0x08000000))
-#define LMC_TDES_INVERSE_FILTERING       ((u_int32_t)(0x10000000))
-#define LMC_TDES_FIRST_SEGMENT           ((u_int32_t)(0x20000000))
-#define LMC_TDES_LAST_SEGMENT            ((u_int32_t)(0x40000000))
-#define LMC_TDES_INTERRUPT_ON_COMPLETION ((u_int32_t)(0x80000000))
+#define LMC_TDES_FIRST_BUFFER_SIZE       ((u32)(0x000007FF))
+#define LMC_TDES_SECOND_BUFFER_SIZE      ((u32)(0x003FF800))
+#define LMC_TDES_HASH_FILTERING          ((u32)(0x00400000))
+#define LMC_TDES_DISABLE_PADDING         ((u32)(0x00800000))
+#define LMC_TDES_SECOND_ADDR_CHAINED     ((u32)(0x01000000))
+#define LMC_TDES_END_OF_RING             ((u32)(0x02000000))
+#define LMC_TDES_ADD_CRC_DISABLE         ((u32)(0x04000000))
+#define LMC_TDES_SETUP_PACKET            ((u32)(0x08000000))
+#define LMC_TDES_INVERSE_FILTERING       ((u32)(0x10000000))
+#define LMC_TDES_FIRST_SEGMENT           ((u32)(0x20000000))
+#define LMC_TDES_LAST_SEGMENT            ((u32)(0x40000000))
+#define LMC_TDES_INTERRUPT_ON_COMPLETION ((u32)(0x80000000))
 
 #define TDES_SECOND_BUFFER_SIZE_BIT_NUMBER  11
 #define TDES_COLLISION_COUNT_BIT_NUMBER     3
 
 /* Constants for the RCV descriptor RDES */
 
-#define LMC_RDES_OVERFLOW             ((u_int32_t)(0x00000001))
-#define LMC_RDES_CRC_ERROR            ((u_int32_t)(0x00000002))
-#define LMC_RDES_DRIBBLING_BIT            ((u_int32_t)(0x00000004))
-#define LMC_RDES_REPORT_ON_MII_ERR    ((u_int32_t)(0x00000008))
-#define LMC_RDES_RCV_WATCHDOG_TIMEOUT ((u_int32_t)(0x00000010))
-#define LMC_RDES_FRAME_TYPE           ((u_int32_t)(0x00000020))
-#define LMC_RDES_COLLISION_SEEN       ((u_int32_t)(0x00000040))
-#define LMC_RDES_FRAME_TOO_LONG       ((u_int32_t)(0x00000080))
-#define LMC_RDES_LAST_DESCRIPTOR      ((u_int32_t)(0x00000100))
-#define LMC_RDES_FIRST_DESCRIPTOR     ((u_int32_t)(0x00000200))
-#define LMC_RDES_MULTICAST_FRAME      ((u_int32_t)(0x00000400))
-#define LMC_RDES_RUNT_FRAME           ((u_int32_t)(0x00000800))
-#define LMC_RDES_DATA_TYPE            ((u_int32_t)(0x00003000))
-#define LMC_RDES_LENGTH_ERROR         ((u_int32_t)(0x00004000))
-#define LMC_RDES_ERROR_SUMMARY        ((u_int32_t)(0x00008000))
-#define LMC_RDES_FRAME_LENGTH         ((u_int32_t)(0x3FFF0000))
-#define LMC_RDES_OWN_BIT              ((u_int32_t)(0x80000000))
+#define LMC_RDES_OVERFLOW             ((u32)(0x00000001))
+#define LMC_RDES_CRC_ERROR            ((u32)(0x00000002))
+#define LMC_RDES_DRIBBLING_BIT        ((u32)(0x00000004))
+#define LMC_RDES_REPORT_ON_MII_ERR    ((u32)(0x00000008))
+#define LMC_RDES_RCV_WATCHDOG_TIMEOUT ((u32)(0x00000010))
+#define LMC_RDES_FRAME_TYPE           ((u32)(0x00000020))
+#define LMC_RDES_COLLISION_SEEN       ((u32)(0x00000040))
+#define LMC_RDES_FRAME_TOO_LONG       ((u32)(0x00000080))
+#define LMC_RDES_LAST_DESCRIPTOR      ((u32)(0x00000100))
+#define LMC_RDES_FIRST_DESCRIPTOR     ((u32)(0x00000200))
+#define LMC_RDES_MULTICAST_FRAME      ((u32)(0x00000400))
+#define LMC_RDES_RUNT_FRAME           ((u32)(0x00000800))
+#define LMC_RDES_DATA_TYPE            ((u32)(0x00003000))
+#define LMC_RDES_LENGTH_ERROR         ((u32)(0x00004000))
+#define LMC_RDES_ERROR_SUMMARY        ((u32)(0x00008000))
+#define LMC_RDES_FRAME_LENGTH         ((u32)(0x3FFF0000))
+#define LMC_RDES_OWN_BIT              ((u32)(0x80000000))
 
 #define RDES_FRAME_LENGTH_BIT_NUMBER       16
 
-#define LMC_RDES_ERROR_MASK ( (u_int32_t)( \
+#define LMC_RDES_ERROR_MASK ( (u32)( \
           LMC_RDES_OVERFLOW \
         | LMC_RDES_DRIBBLING_BIT \
         | LMC_RDES_REPORT_ON_MII_ERR \
@@ -172,32 +150,32 @@ struct lmc_regfile_t {
  */
 
 typedef struct {
-        u_int32_t       n;
-        u_int32_t       m;
-        u_int32_t       v;
-        u_int32_t       x;
-        u_int32_t       r;
-        u_int32_t       f;
-        u_int32_t       exact;
+        u32     n;
+        u32     m;
+        u32     v;
+        u32     x;
+        u32     r;
+        u32     f;
+        u32     exact;
 } lmc_av9110_t;
 
 /*
  * Common structure passed to the ioctl code.
  */
 struct lmc___ctl {
-        u_int32_t       cardtype;
-        u_int32_t       clock_source;           /* HSSI, T1 */
-        u_int32_t       clock_rate;             /* T1 */
-        u_int32_t       crc_length;
-        u_int32_t       cable_length;           /* DS3 */
-        u_int32_t       scrambler_onoff;        /* DS3 */
-        u_int32_t       cable_type;             /* T1 */
-        u_int32_t       keepalive_onoff;        /* protocol */
-        u_int32_t       ticks;                  /* ticks/sec */
+        u32     cardtype;
+        u32     clock_source;           /* HSSI, T1 */
+        u32     clock_rate;             /* T1 */
+        u32     crc_length;
+        u32     cable_length;           /* DS3 */
+        u32     scrambler_onoff;        /* DS3 */
+        u32     cable_type;             /* T1 */
+        u32     keepalive_onoff;        /* protocol */
+        u32     ticks;                  /* ticks/sec */
         union {
                 lmc_av9110_t    ssi;
         } cardspec;
-        u_int32_t       circuit_type;   /* T1 or E1 */
+        u32       circuit_type;   /* T1 or E1 */
 };
 
 
@@ -244,108 +222,69 @@ struct lmc___media {
 
 #define STATCHECK     0xBEEFCAFE
 
-/*  Included in this structure are first
- *   - standard net_device_stats
- *   - some other counters used for debug and driver performance
- *  evaluation -baz
- */
-struct lmc_statistics
+struct lmc_extra_statistics
 {
-        unsigned long     rx_packets;             /* total packets received       */
-        unsigned long     tx_packets;             /* total packets transmitted    */
-        unsigned long     rx_bytes;
-        unsigned long     tx_bytes;
-        
-        unsigned long     rx_errors;              /* bad packets received         */
-        unsigned long     tx_errors;              /* packet transmit problems     */
-        unsigned long     rx_dropped;             /* no space in linux buffers    */
-        unsigned long     tx_dropped;             /* no space available in linux  */
-        unsigned long     multicast;              /* multicast packets received   */
-        unsigned long     collisions;
-
-        /* detailed rx_errors: */
-        unsigned long     rx_length_errors;
-        unsigned long     rx_over_errors;         /* receiver ring buff overflow  */
-        unsigned long     rx_crc_errors;          /* recved pkt with crc error    */
-        unsigned long     rx_frame_errors;        /* recv'd frame alignment error */
-        unsigned long     rx_fifo_errors;         /* recv'r fifo overrun          */
-        unsigned long     rx_missed_errors;       /* receiver missed packet       */
-
-        /* detailed tx_errors */
-        unsigned long     tx_aborted_errors;
-        unsigned long     tx_carrier_errors;
-        unsigned long     tx_fifo_errors;
-        unsigned long     tx_heartbeat_errors;
-        unsigned long     tx_window_errors;
-
-        /* for cslip etc */
-        unsigned long rx_compressed;
-        unsigned long tx_compressed;
-
-        /* -------------------------------------
-         * Custom stats & counters follow -baz */
-        u_int32_t       version_size;
-        u_int32_t       lmc_cardtype;
-
-        u_int32_t       tx_ProcTimeout;
-        u_int32_t       tx_IntTimeout;
-        u_int32_t       tx_NoCompleteCnt;
-        u_int32_t       tx_MaxXmtsB4Int;
-        u_int32_t       tx_TimeoutCnt;
-        u_int32_t       tx_OutOfSyncPtr;
-        u_int32_t       tx_tbusy0;
-        u_int32_t       tx_tbusy1;
-        u_int32_t       tx_tbusy_calls;
-        u_int32_t       resetCount;
-        u_int32_t       lmc_txfull;
-        u_int32_t       tbusy;
-        u_int32_t       dirtyTx;
-        u_int32_t       lmc_next_tx;
-        u_int32_t       otherTypeCnt;
-        u_int32_t       lastType;
-        u_int32_t       lastTypeOK;
-        u_int32_t       txLoopCnt;
-        u_int32_t       usedXmtDescripCnt;
-        u_int32_t       txIndexCnt;
-        u_int32_t       rxIntLoopCnt;
-
-        u_int32_t       rx_SmallPktCnt;
-        u_int32_t       rx_BadPktSurgeCnt;
-        u_int32_t       rx_BuffAllocErr;
-        u_int32_t       tx_lossOfClockCnt;
-
-        /* T1 error counters */
-        u_int32_t       framingBitErrorCount;
-        u_int32_t       lineCodeViolationCount;
-
-        u_int32_t       lossOfFrameCount;
-        u_int32_t       changeOfFrameAlignmentCount;
-        u_int32_t       severelyErroredFrameCount;
-
-        u_int32_t       check;
+        u32       version_size;
+        u32       lmc_cardtype;
+
+        u32       tx_ProcTimeout;
+        u32       tx_IntTimeout;
+        u32       tx_NoCompleteCnt;
+        u32       tx_MaxXmtsB4Int;
+        u32       tx_TimeoutCnt;
+        u32       tx_OutOfSyncPtr;
+        u32       tx_tbusy0;
+        u32       tx_tbusy1;
+        u32       tx_tbusy_calls;
+        u32       resetCount;
+        u32       lmc_txfull;
+        u32       tbusy;
+        u32       dirtyTx;
+        u32       lmc_next_tx;
+        u32       otherTypeCnt;
+        u32       lastType;
+        u32       lastTypeOK;
+        u32       txLoopCnt;
+        u32       usedXmtDescripCnt;
+        u32       txIndexCnt;
+        u32       rxIntLoopCnt;
+
+        u32       rx_SmallPktCnt;
+        u32       rx_BadPktSurgeCnt;
+        u32       rx_BuffAllocErr;
+        u32       tx_lossOfClockCnt;
+
+        /* T1 error counters */
+        u32       framingBitErrorCount;
+        u32       lineCodeViolationCount;
+
+        u32       lossOfFrameCount;
+        u32       changeOfFrameAlignmentCount;
+        u32       severelyErroredFrameCount;
+
+        u32       check;
 };
 
-
 typedef struct lmc_xinfo {
-        u_int32_t       Magic0;                         /* BEEFCAFE */
+        u32       Magic0;                         /* BEEFCAFE */
 
-        u_int32_t       PciCardType;
-        u_int32_t       PciSlotNumber;          /* PCI slot number       */
+        u32       PciCardType;
+        u32       PciSlotNumber;          /* PCI slot number       */
 
-        u_int16_t       DriverMajorVersion;
-        u_int16_t       DriverMinorVersion;
-        u_int16_t       DriverSubVersion;
+        u16            DriverMajorVersion;
+        u16            DriverMinorVersion;
+        u16            DriverSubVersion;
 
-        u_int16_t       XilinxRevisionNumber;
-        u_int16_t       MaxFrameSize;
+        u16            XilinxRevisionNumber;
+        u16            MaxFrameSize;
 
-        u_int16_t       t1_alarm1_status;
-        u_int16_t       t1_alarm2_status;
+        u16               t1_alarm1_status;
+        u16             t1_alarm2_status;
 
-        int                     link_status;
-        u_int32_t       mii_reg16;
+        int             link_status;
+        u32       mii_reg16;
 
-        u_int32_t       Magic1;                         /* DEADBEEF */
+        u32       Magic1;                         /* DEADBEEF */
 } LMC_XINFO;
 
 
@@ -353,23 +292,22 @@ typedef struct lmc_xinfo {
  * forward decl
  */
 struct lmc___softc {
-        void *if_ptr;   /* General purpose pointer (used by SPPP) */
         char                   *name;
         u8                      board_idx;
-        struct lmc_statistics   stats;
-        struct net_device          *lmc_device;
+        struct lmc_extra_statistics extra_stats;
+        struct net_device      *lmc_device;
 
         int                     hang, rxdesc, bad_packet, some_counter;
-        u_int32_t               txgo;
+        u32                     txgo;
         struct lmc_regfile_t    lmc_csrs;
-        volatile u_int32_t      lmc_txtick;
-        volatile u_int32_t      lmc_rxtick;
-        u_int32_t               lmc_flags;
-        u_int32_t               lmc_intrmask;   /* our copy of csr_intr */
-        u_int32_t               lmc_cmdmode;    /* our copy of csr_cmdmode */
-        u_int32_t               lmc_busmode;    /* our copy of csr_busmode */
-        u_int32_t               lmc_gpio_io;    /* state of in/out settings */
-        u_int32_t               lmc_gpio;       /* state of outputs */
+        volatile u32            lmc_txtick;
+        volatile u32            lmc_rxtick;
+        u32                     lmc_flags;
+        u32                     lmc_intrmask;   /* our copy of csr_intr */
+        u32                     lmc_cmdmode;    /* our copy of csr_cmdmode */
+        u32                     lmc_busmode;    /* our copy of csr_busmode */
+        u32                     lmc_gpio_io;    /* state of in/out settings */
+        u32                     lmc_gpio;       /* state of outputs */
         struct sk_buff*         lmc_txq[LMC_TXDESCS];
         struct sk_buff*         lmc_rxq[LMC_RXDESCS];
         volatile
@@ -381,42 +319,41 @@ struct lmc___softc {
         unsigned int            lmc_taint_tx, lmc_taint_rx;
         int                     lmc_tx_start, lmc_txfull;
         int                     lmc_txbusy;
-        u_int16_t               lmc_miireg16;
+        u16                     lmc_miireg16;
         int                     lmc_ok;
         int                     last_link_status;
         int                     lmc_cardtype;
-        u_int32_t               last_frameerr;
+        u32                     last_frameerr;
         lmc_media_t            *lmc_media;
         struct timer_list       timer;
         lmc_ctl_t               ictl;
-        u_int32_t               TxDescriptControlInit;  
+        u32                     TxDescriptControlInit;
 
         int                     tx_TimeoutInd; /* additional driver state */
         int                     tx_TimeoutDisplay;
         unsigned int            lastlmc_taint_tx;
         int                     lasttx_packets;
-        u_int32_t               tx_clockState;
-        u_int32_t               lmc_crcSize;
-        LMC_XINFO               lmc_xinfo; 
+        u32                     tx_clockState;
+        u32                     lmc_crcSize;
+        LMC_XINFO               lmc_xinfo;
         char                    lmc_yel, lmc_blue, lmc_red; /* for T1 and DS3 */
-        char                    lmc_timing; /* for HSSI and SSI */
-        int                     got_irq;
+        char                    lmc_timing; /* for HSSI and SSI */
+        int                     got_irq;
 
-        char                    last_led_err[4];
+        char                    last_led_err[4];
 
-        u32                     last_int;
-        u32                     num_int;
+        u32                     last_int;
+        u32                     num_int;
 
         spinlock_t              lmc_lock;
-        u_int16_t               if_type;       /* PPP or NET */
-        struct ppp_device       *pd;
+        u16                     if_type;       /* HDLC/PPP or NET */
 
-        /* Failure cases */
-        u8                       failed_ring;
-        u8                       failed_recv_alloc;
+        /* Failure cases */
+        u8                      failed_ring;
+        u8                      failed_recv_alloc;
 
-        /* Structure check */
-        u32                     check;
+        /* Structure check */
+        u32                     check;
 };
 
 #define LMC_PCI_TIME 1
@@ -512,8 +449,8 @@ struct lmc___softc {
   | TULIP_STS_TXUNDERFLOW\
   | TULIP_STS_RXSTOPPED )
 
-#define DESC_OWNED_BY_SYSTEM   ((u_int32_t)(0x00000000))
-#define DESC_OWNED_BY_DC21X4   ((u_int32_t)(0x80000000))
+#define DESC_OWNED_BY_SYSTEM   ((u32)(0x00000000))
+#define DESC_OWNED_BY_DC21X4   ((u32)(0x80000000))
 
 #ifndef TULIP_CMD_RECEIVEALL
 #define TULIP_CMD_RECEIVEALL 0x40000000L
@@ -525,46 +462,9 @@ struct lmc___softc {
 #define LMC_ADAP_SSI            4
 #define LMC_ADAP_T1             5
 
-#define HDLC_HDR_LEN  4
-#define HDLC_ADDR_LEN 1
-#define HDLC_SLARP    0x8035
 #define LMC_MTU 1500
-#define SLARP_LINECHECK 2
 
 #define LMC_CRC_LEN_16 2  /* 16-bit CRC */
 #define LMC_CRC_LEN_32 4
 
-#ifdef LMC_HDLC
-/* definition of an hdlc header. */
-struct hdlc_hdr
-{
-        u8  address;
-        u8  control;
-        u16 type;
-};
-
-/* definition of a slarp header. */
-struct slarp
-{
-        long code;
-        union sl
-        {
-                struct
-                {
-                        ulong address;
-                        ulong mask;
-                        ushort unused;
-                } add;
-                struct
-                {
-                        ulong mysequence;
-                        ulong yoursequence;
-                        ushort reliability;
-                        ulong time;
-                } chk;
-        } t;
-};
-#endif /* LMC_HDLC */
-
-
 #endif /* _LMC_VAR_H_ */
diff --git a/drivers/net/wan/pc300.h b/drivers/net/wan/pc300.h
index 63e9fcf31fb8..2e4f84f6cad4 100644
--- a/drivers/net/wan/pc300.h
+++ b/drivers/net/wan/pc300.h
@@ -100,31 +100,14 @@
 #define _PC300_H
 
 #include <linux/hdlc.h>
-#include <net/syncppp.h>
 #include "hd64572.h"
 #include "pc300-falc-lh.h"
 
-#ifndef CY_TYPES
-#define CY_TYPES
-typedef __u64   ucdouble;       /* 64 bits, unsigned */
-typedef __u32   uclong;         /* 32 bits, unsigned */
-typedef __u16   ucshort;        /* 16 bits, unsigned */
-typedef __u8    ucchar;         /* 8 bits, unsigned */
-#endif /* CY_TYPES */
+#define PC300_PROTO_MLPPP 1
 
-#define PC300_PROTO_MLPPP 1             
-
-#define PC300_KERNEL    "2.4.x" /* Kernel supported by this driver */
-
-#define PC300_DEVNAME   "hdlc"  /* Dev. name base (for hdlc0, hdlc1, etc.) */
-#define PC300_MAXINDEX  100     /* Max dev. name index (the '0' in hdlc0) */
-
-#define PC300_MAXCARDS  4       /* Max number of cards per system */
 #define PC300_MAXCHAN   2       /* Number of channels per card */
 
-#define PC300_PLX_WIN   0x80    /* PLX control window size (128b) */
 #define PC300_RAMSIZE   0x40000 /* RAM window size (256Kb) */
-#define PC300_SCASIZE   0x400   /* SCA window size (1Kb) */
 #define PC300_FALCSIZE  0x400   /* FALC window size (1Kb) */
 
 #define PC300_OSC_CLOCK 24576000
@@ -160,26 +143,14 @@ typedef	__u8	ucchar;		/* 8 bits, unsigned */
  * Memory access functions/macros      *
  * (required to support Alpha systems) *
  ***************************************/
-#ifdef __KERNEL__
-#define cpc_writeb(port,val)    {writeb((ucchar)(val),(port)); mb();}
+#define cpc_writeb(port,val)    {writeb((u8)(val),(port)); mb();}
 #define cpc_writew(port,val)    {writew((ushort)(val),(port)); mb();}
-#define cpc_writel(port,val)    {writel((uclong)(val),(port)); mb();}
+#define cpc_writel(port,val)    {writel((u32)(val),(port)); mb();}
 
 #define cpc_readb(port)         readb(port)
 #define cpc_readw(port)         readw(port)
 #define cpc_readl(port)         readl(port)
 
-#else /* __KERNEL__ */
-#define cpc_writeb(port,val)    (*(volatile ucchar *)(port) = (ucchar)(val))
-#define cpc_writew(port,val)    (*(volatile ucshort *)(port) = (ucshort)(val))
-#define cpc_writel(port,val)    (*(volatile uclong *)(port) = (uclong)(val))
-
-#define cpc_readb(port)         (*(volatile ucchar *)(port))
-#define cpc_readw(port)         (*(volatile ucshort *)(port))
-#define cpc_readl(port)         (*(volatile uclong *)(port))
-
-#endif /* __KERNEL__ */
-
 /****** Data Structures *****************************************************/
 
 /*
@@ -188,15 +159,15 @@ typedef	__u8	ucchar;		/* 8 bits, unsigned */
  *      (memory mapped).
  */
 struct RUNTIME_9050 {
-        uclong  loc_addr_range[4];      /* 00-0Ch : Local Address Ranges */
-        uclong  loc_rom_range;          /* 10h : Local ROM Range */
-        uclong  loc_addr_base[4];       /* 14-20h : Local Address Base Addrs */
-        uclong  loc_rom_base;           /* 24h : Local ROM Base */
-        uclong  loc_bus_descr[4];       /* 28-34h : Local Bus Descriptors */
-        uclong  rom_bus_descr;          /* 38h : ROM Bus Descriptor */
-        uclong  cs_base[4];             /* 3C-48h : Chip Select Base Addrs */
-        uclong  intr_ctrl_stat;         /* 4Ch : Interrupt Control/Status */
-        uclong  init_ctrl;              /* 50h : EEPROM ctrl, Init Ctrl, etc */
+        u32 loc_addr_range[4];  /* 00-0Ch : Local Address Ranges */
+        u32 loc_rom_range;      /* 10h : Local ROM Range */
+        u32 loc_addr_base[4];   /* 14-20h : Local Address Base Addrs */
+        u32 loc_rom_base;       /* 24h : Local ROM Base */
+        u32 loc_bus_descr[4];   /* 28-34h : Local Bus Descriptors */
+        u32 rom_bus_descr;      /* 38h : ROM Bus Descriptor */
+        u32 cs_base[4];         /* 3C-48h : Chip Select Base Addrs */
+        u32 intr_ctrl_stat;     /* 4Ch : Interrupt Control/Status */
+        u32 init_ctrl;          /* 50h : EEPROM ctrl, Init Ctrl, etc */
 };
 
 #define PLX_9050_LINT1_ENABLE   0x01
@@ -240,66 +211,66 @@ struct RUNTIME_9050 {
 #define PC300_FALC_MAXLOOP      0x0000ffff      /* for falc_issue_cmd() */
 
 typedef struct falc {
-        ucchar sync;            /* If true FALC is synchronized */
-        ucchar active;          /* if TRUE then already active */
-        ucchar loop_active;     /* if TRUE a line loopback UP was received */
-        ucchar loop_gen;        /* if TRUE a line loopback UP was issued */
+        u8 sync;        /* If true FALC is synchronized */
+        u8 active;      /* if TRUE then already active */
+        u8 loop_active; /* if TRUE a line loopback UP was received */
+        u8 loop_gen;    /* if TRUE a line loopback UP was issued */
 
-        ucchar num_channels;
-        ucchar offset;          /* 1 for T1, 0 for E1 */
-        ucchar full_bandwidth;
+        u8 num_channels;
+        u8 offset;      /* 1 for T1, 0 for E1 */
+        u8 full_bandwidth;
 
-        ucchar xmb_cause;
-        ucchar multiframe_mode;
+        u8 xmb_cause;
+        u8 multiframe_mode;
 
         /* Statistics */
-        ucshort pden;   /* Pulse Density violation count */
-        ucshort los;    /* Loss of Signal count */
-        ucshort losr;   /* Loss of Signal recovery count */
-        ucshort lfa;    /* Loss of frame alignment count */
-        ucshort farec;  /* Frame Alignment Recovery count */
-        ucshort lmfa;   /* Loss of multiframe alignment count */
-        ucshort ais;    /* Remote Alarm indication Signal count */
-        ucshort sec;    /* One-second timer */
-        ucshort es;     /* Errored second */
-        ucshort rai;    /* remote alarm received */
-        ucshort bec;
-        ucshort fec;
-        ucshort cvc;
-        ucshort cec;
-        ucshort ebc;
+        u16 pden;       /* Pulse Density violation count */
+        u16 los;        /* Loss of Signal count */
+        u16 losr;       /* Loss of Signal recovery count */
+        u16 lfa;        /* Loss of frame alignment count */
+        u16 farec;      /* Frame Alignment Recovery count */
+        u16 lmfa;       /* Loss of multiframe alignment count */
+        u16 ais;        /* Remote Alarm indication Signal count */
+        u16 sec;        /* One-second timer */
+        u16 es;         /* Errored second */
+        u16 rai;        /* remote alarm received */
+        u16 bec;
+        u16 fec;
+        u16 cvc;
+        u16 cec;
+        u16 ebc;
 
         /* Status */
-        ucchar red_alarm;
-        ucchar blue_alarm;
-        ucchar loss_fa;
-        ucchar yellow_alarm;
-        ucchar loss_mfa;
-        ucchar prbs;
+        u8 red_alarm;
+        u8 blue_alarm;
+        u8 loss_fa;
+        u8 yellow_alarm;
+        u8 loss_mfa;
+        u8 prbs;
 } falc_t;
 
 typedef struct falc_status {
-        ucchar sync;  /* If true FALC is synchronized */
-        ucchar red_alarm;
-        ucchar blue_alarm;
-        ucchar loss_fa;
-        ucchar yellow_alarm;
-        ucchar loss_mfa;
-        ucchar prbs;
+        u8 sync;        /* If true FALC is synchronized */
+        u8 red_alarm;
+        u8 blue_alarm;
+        u8 loss_fa;
+        u8 yellow_alarm;
+        u8 loss_mfa;
+        u8 prbs;
 } falc_status_t;
 
 typedef struct rsv_x21_status {
-        ucchar dcd;
-        ucchar dsr;
-        ucchar cts;
-        ucchar rts;
-        ucchar dtr;
+        u8 dcd;
+        u8 dsr;
+        u8 cts;
+        u8 rts;
+        u8 dtr;
 } rsv_x21_status_t;
 
 typedef struct pc300stats {
         int hw_type;
-        uclong line_on;
-        uclong line_off;
+        u32 line_on;
+        u32 line_off;
         struct net_device_stats gen_stats;
         falc_t te_stats;
 } pc300stats_t;
@@ -317,28 +288,19 @@ typedef struct pc300loopback {
 
 typedef struct pc300patterntst {
         char patrntst_on;       /* 0 - off; 1 - on; 2 - read num_errors */
-        ucshort num_errors;
+        u16 num_errors;
 } pc300patterntst_t;
 
 typedef struct pc300dev {
-        void *if_ptr;           /* General purpose pointer */
         struct pc300ch *chan;
-        ucchar trace_on;
-        uclong line_on;         /* DCD(X.21, RSV) / sync(TE) change counters */
-        uclong line_off;
-#ifdef __KERNEL__
+        u8 trace_on;
+        u32 line_on;            /* DCD(X.21, RSV) / sync(TE) change counters */
+        u32 line_off;
         char name[16];
         struct net_device *dev;
-
-        void *private;
-        struct sk_buff *tx_skb;
-        union { /* This union has all the protocol-specific structures */
-                struct ppp_device pppdev;
-        }ifu;
 #ifdef CONFIG_PC300_MLPPP
         void *cpc_tty;  /* information to PC300 TTY driver */
 #endif
-#endif /* __KERNEL__ */
 }pc300dev_t;
 
 typedef struct pc300hw {
@@ -346,43 +308,42 @@ typedef struct pc300hw {
         int bus;                /* Bus (PCI, PMC, etc.) */
         int nchan;              /* number of channels */
         int irq;                /* interrupt request level */
-        uclong clock;           /* Board clock */
-        ucchar cpld_id;         /* CPLD ID (TE only) */
-        ucshort cpld_reg1;      /* CPLD reg 1 (TE only) */
-        ucshort cpld_reg2;      /* CPLD reg 2 (TE only) */
-        ucshort gpioc_reg;      /* PLX GPIOC reg */
-        ucshort intctl_reg;     /* PLX Int Ctrl/Status reg */
-        uclong iophys;          /* PLX registers I/O base */
-        uclong iosize;          /* PLX registers I/O size */
-        uclong plxphys;         /* PLX registers MMIO base (physical) */
+        u32 clock;              /* Board clock */
+        u8 cpld_id;             /* CPLD ID (TE only) */
+        u16 cpld_reg1;          /* CPLD reg 1 (TE only) */
+        u16 cpld_reg2;          /* CPLD reg 2 (TE only) */
+        u16 gpioc_reg;          /* PLX GPIOC reg */
+        u16 intctl_reg;         /* PLX Int Ctrl/Status reg */
+        u32 iophys;             /* PLX registers I/O base */
+        u32 iosize;             /* PLX registers I/O size */
+        u32 plxphys;            /* PLX registers MMIO base (physical) */
         void __iomem * plxbase; /* PLX registers MMIO base (virtual) */
-        uclong plxsize;         /* PLX registers MMIO size */
-        uclong scaphys;         /* SCA registers MMIO base (physical) */
+        u32 plxsize;            /* PLX registers MMIO size */
+        u32 scaphys;            /* SCA registers MMIO base (physical) */
         void __iomem * scabase; /* SCA registers MMIO base (virtual) */
-        uclong scasize;         /* SCA registers MMIO size */
-        uclong ramphys;         /* On-board RAM MMIO base (physical) */
+        u32 scasize;            /* SCA registers MMIO size */
+        u32 ramphys;            /* On-board RAM MMIO base (physical) */
         void __iomem * rambase; /* On-board RAM MMIO base (virtual) */
-        uclong alloc_ramsize;   /* RAM MMIO size allocated by the PCI bridge */
-        uclong ramsize;         /* On-board RAM MMIO size */
-        uclong falcphys;        /* FALC registers MMIO base (physical) */
+        u32 alloc_ramsize;      /* RAM MMIO size allocated by the PCI bridge */
+        u32 ramsize;            /* On-board RAM MMIO size */
+        u32 falcphys;           /* FALC registers MMIO base (physical) */
         void __iomem * falcbase;/* FALC registers MMIO base (virtual) */
-        uclong falcsize;        /* FALC registers MMIO size */
+        u32 falcsize;           /* FALC registers MMIO size */
 } pc300hw_t;
 
 typedef struct pc300chconf {
-        sync_serial_settings    phys_settings;  /* Clock type/rate (in bps), 
+        sync_serial_settings    phys_settings;  /* Clock type/rate (in bps),
                                                    loopback mode */
         raw_hdlc_proto          proto_settings; /* Encoding, parity (CRC) */
-        uclong media;           /* HW media (RS232, V.35, etc.) */
-        uclong proto;           /* Protocol (PPP, X.25, etc.) */
-        ucchar monitor;         /* Monitor mode (0 = off, !0 = on) */
+        u32 media;              /* HW media (RS232, V.35, etc.) */
+        u32 proto;              /* Protocol (PPP, X.25, etc.) */
 
         /* TE-specific parameters */
-        ucchar lcode;           /* Line Code (AMI, B8ZS, etc.) */
-        ucchar fr_mode;         /* Frame Mode (ESF, D4, etc.) */
-        ucchar lbo;             /* Line Build Out */
-        ucchar rx_sens;         /* Rx Sensitivity (long- or short-haul) */
-        uclong tslot_bitmap;    /* bit[i]=1  =>  timeslot _i_ is active */
+        u8 lcode;               /* Line Code (AMI, B8ZS, etc.) */
+        u8 fr_mode;             /* Frame Mode (ESF, D4, etc.) */
+        u8 lbo;                 /* Line Build Out */
+        u8 rx_sens;             /* Rx Sensitivity (long- or short-haul) */
+        u32 tslot_bitmap;       /* bit[i]=1  =>  timeslot _i_ is active */
 } pc300chconf_t;
 
 typedef struct pc300ch {
@@ -390,20 +351,18 @@ typedef struct pc300ch {
         int channel;
         pc300dev_t d;
         pc300chconf_t conf;
-        ucchar tx_first_bd;     /* First TX DMA block descr. w/ data */
-        ucchar tx_next_bd;      /* Next free TX DMA block descriptor */
-        ucchar rx_first_bd;     /* First free RX DMA block descriptor */
-        ucchar rx_last_bd;      /* Last free RX DMA block descriptor */
-        ucchar nfree_tx_bd;     /* Number of free TX DMA block descriptors */
-        falc_t falc;            /* FALC structure (TE only) */
+        u8 tx_first_bd; /* First TX DMA block descr. w/ data */
+        u8 tx_next_bd;  /* Next free TX DMA block descriptor */
+        u8 rx_first_bd; /* First free RX DMA block descriptor */
+        u8 rx_last_bd;  /* Last free RX DMA block descriptor */
+        u8 nfree_tx_bd; /* Number of free TX DMA block descriptors */
+        falc_t falc;    /* FALC structure (TE only) */
 } pc300ch_t;
 
 typedef struct pc300 {
         pc300hw_t hw;                   /* hardware config. */
         pc300ch_t chan[PC300_MAXCHAN];
-#ifdef __KERNEL__
         spinlock_t card_lock;
-#endif /* __KERNEL__ */
 } pc300_t;
 
 typedef struct pc300conf {
@@ -471,12 +430,7 @@ enum pc300_loopback_cmds {
 #define PC300_TX_QUEUE_LEN      100
 #define PC300_DEF_MTU           1600
 
-#ifdef __KERNEL__
 /* Function Prototypes */
-void tx_dma_start(pc300_t *, int);
 int cpc_open(struct net_device *dev);
-int cpc_set_media(hdlc_device *, int);
-#endif /* __KERNEL__ */
 
 #endif  /* _PC300_H */
-
diff --git a/drivers/net/wan/pc300_drv.c b/drivers/net/wan/pc300_drv.c
index 334170527755..d0a8d1e352ac 100644
--- a/drivers/net/wan/pc300_drv.c
+++ b/drivers/net/wan/pc300_drv.c
@@ -227,8 +227,6 @@ static char rcsid[] =
 #include <linux/netdevice.h>
 #include <linux/spinlock.h>
 #include <linux/if.h>
-
-#include <net/syncppp.h>
 #include <net/arp.h>
 
 #include <asm/io.h>
@@ -285,8 +283,8 @@ static void rx_dma_buf_init(pc300_t *, int);
 static void tx_dma_buf_check(pc300_t *, int);
 static void rx_dma_buf_check(pc300_t *, int);
 static irqreturn_t cpc_intr(int, void *);
-static int clock_rate_calc(uclong, uclong, int *);
-static uclong detect_ram(pc300_t *);
+static int clock_rate_calc(u32, u32, int *);
+static u32 detect_ram(pc300_t *);
 static void plx_init(pc300_t *);
 static void cpc_trace(struct net_device *, struct sk_buff *, char);
 static int cpc_attach(struct net_device *, unsigned short, unsigned short);
@@ -311,10 +309,10 @@ static void tx_dma_buf_pt_init(pc300_t * card, int ch)
                                        + DMA_TX_BD_BASE + ch_factor * sizeof(pcsca_bd_t));
 
         for (i = 0; i < N_DMA_TX_BUF; i++, ptdescr++) {
-                cpc_writel(&ptdescr->next, (uclong) (DMA_TX_BD_BASE +
+                cpc_writel(&ptdescr->next, (u32)(DMA_TX_BD_BASE +
                         (ch_factor + ((i + 1) & (N_DMA_TX_BUF - 1))) * sizeof(pcsca_bd_t)));
-                cpc_writel(&ptdescr->ptbuf, 
-                                                (uclong) (DMA_TX_BASE + (ch_factor + i) * BD_DEF_LEN));
+                cpc_writel(&ptdescr->ptbuf,
+                           (u32)(DMA_TX_BASE + (ch_factor + i) * BD_DEF_LEN));
         }
 }
 
@@ -341,10 +339,10 @@ static void rx_dma_buf_pt_init(pc300_t * card, int ch)
                                        + DMA_RX_BD_BASE + ch_factor * sizeof(pcsca_bd_t));
 
         for (i = 0; i < N_DMA_RX_BUF; i++, ptdescr++) {
-                cpc_writel(&ptdescr->next, (uclong) (DMA_RX_BD_BASE +
-                (ch_factor + ((i + 1) & (N_DMA_RX_BUF - 1))) * sizeof(pcsca_bd_t)));
+                cpc_writel(&ptdescr->next, (u32)(DMA_RX_BD_BASE +
+                        (ch_factor + ((i + 1) & (N_DMA_RX_BUF - 1))) * sizeof(pcsca_bd_t)));
                 cpc_writel(&ptdescr->ptbuf,
-                           (uclong) (DMA_RX_BASE + (ch_factor + i) * BD_DEF_LEN));
+                           (u32)(DMA_RX_BASE + (ch_factor + i) * BD_DEF_LEN));
         }
 }
 
@@ -367,8 +365,8 @@ static void tx_dma_buf_check(pc300_t * card, int ch)
 {
         volatile pcsca_bd_t __iomem *ptdescr;
         int i;
-        ucshort first_bd = card->chan[ch].tx_first_bd;
-        ucshort next_bd = card->chan[ch].tx_next_bd;
+        u16 first_bd = card->chan[ch].tx_first_bd;
+        u16 next_bd = card->chan[ch].tx_next_bd;
 
         printk("#CH%d: f_bd = %d(0x%08zx), n_bd = %d(0x%08zx)\n", ch,
                first_bd, TX_BD_ADDR(ch, first_bd),
@@ -392,9 +390,9 @@ static void tx1_dma_buf_check(pc300_t * card, int ch)
 {
         volatile pcsca_bd_t __iomem *ptdescr;
         int i;
-        ucshort first_bd = card->chan[ch].tx_first_bd;
-        ucshort next_bd = card->chan[ch].tx_next_bd;
-        uclong scabase = card->hw.scabase;
+        u16 first_bd = card->chan[ch].tx_first_bd;
+        u16 next_bd = card->chan[ch].tx_next_bd;
+        u32 scabase = card->hw.scabase;
 
         printk ("\nnfree_tx_bd = %d \n", card->chan[ch].nfree_tx_bd);
         printk("#CH%d: f_bd = %d(0x%08x), n_bd = %d(0x%08x)\n", ch,
@@ -413,13 +411,13 @@ static void tx1_dma_buf_check(pc300_t * card, int ch)
         printk("\n");
 }
 #endif
-                         
+
 static void rx_dma_buf_check(pc300_t * card, int ch)
 {
         volatile pcsca_bd_t __iomem *ptdescr;
         int i;
-        ucshort first_bd = card->chan[ch].rx_first_bd;
-        ucshort last_bd = card->chan[ch].rx_last_bd;
+        u16 first_bd = card->chan[ch].rx_first_bd;
+        u16 last_bd = card->chan[ch].rx_last_bd;
         int ch_factor;
 
         ch_factor = ch * N_DMA_RX_BUF;
@@ -440,9 +438,9 @@ static void rx_dma_buf_check(pc300_t * card, int ch)
 static int dma_get_rx_frame_size(pc300_t * card, int ch)
 {
         volatile pcsca_bd_t __iomem *ptdescr;
-        ucshort first_bd = card->chan[ch].rx_first_bd;
+        u16 first_bd = card->chan[ch].rx_first_bd;
         int rcvd = 0;
-        volatile ucchar status;
+        volatile u8 status;
 
         ptdescr = (card->hw.rambase + RX_BD_ADDR(ch, first_bd));
         while ((status = cpc_readb(&ptdescr->status)) & DST_OSB) {
@@ -462,12 +460,12 @@ static int dma_get_rx_frame_size(pc300_t * card, int ch)
  * dma_buf_write: writes a frame to the Tx DMA buffers
  * NOTE: this function writes one frame at a time.
  */
-static int dma_buf_write(pc300_t * card, int ch, ucchar * ptdata, int len)
+static int dma_buf_write(pc300_t *card, int ch, u8 *ptdata, int len)
 {
         int i, nchar;
         volatile pcsca_bd_t __iomem *ptdescr;
         int tosend = len;
-        ucchar nbuf = ((len - 1) / BD_DEF_LEN) + 1;
+        u8 nbuf = ((len - 1) / BD_DEF_LEN) + 1;
 
         if (nbuf >= card->chan[ch].nfree_tx_bd) {
                 return -ENOMEM;
@@ -509,7 +507,7 @@ static int dma_buf_read(pc300_t * card, int ch, struct sk_buff *skb)
         pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
         volatile pcsca_bd_t __iomem *ptdescr;
         int rcvd = 0;
-        volatile ucchar status;
+        volatile u8 status;
 
         ptdescr = (card->hw.rambase +
                                   RX_BD_ADDR(ch, chan->rx_first_bd));
@@ -563,8 +561,8 @@ static int dma_buf_read(pc300_t * card, int ch, struct sk_buff *skb)
 static void tx_dma_stop(pc300_t * card, int ch)
 {
         void __iomem *scabase = card->hw.scabase;
-        ucchar drr_ena_bit = 1 << (5 + 2 * ch);
-        ucchar drr_rst_bit = 1 << (1 + 2 * ch);
+        u8 drr_ena_bit = 1 << (5 + 2 * ch);
+        u8 drr_rst_bit = 1 << (1 + 2 * ch);
 
         /* Disable DMA */
         cpc_writeb(scabase + DRR, drr_ena_bit);
@@ -574,8 +572,8 @@ static void tx_dma_stop(pc300_t * card, int ch)
 static void rx_dma_stop(pc300_t * card, int ch)
 {
         void __iomem *scabase = card->hw.scabase;
-        ucchar drr_ena_bit = 1 << (4 + 2 * ch);
-        ucchar drr_rst_bit = 1 << (2 * ch);
+        u8 drr_ena_bit = 1 << (4 + 2 * ch);
+        u8 drr_rst_bit = 1 << (2 * ch);
 
         /* Disable DMA */
         cpc_writeb(scabase + DRR, drr_ena_bit);
@@ -607,7 +605,7 @@ static void rx_dma_start(pc300_t * card, int ch)
 /*************************/
 /***   FALC Routines   ***/
 /*************************/
-static void falc_issue_cmd(pc300_t * card, int ch, ucchar cmd)
+static void falc_issue_cmd(pc300_t *card, int ch, u8 cmd)
 {
         void __iomem *falcbase = card->hw.falcbase;
         unsigned long i = 0;
@@ -675,7 +673,7 @@ static void falc_intr_enable(pc300_t * card, int ch)
 static void falc_open_timeslot(pc300_t * card, int ch, int timeslot)
 {
         void __iomem *falcbase = card->hw.falcbase;
-        ucchar tshf = card->chan[ch].falc.offset;
+        u8 tshf = card->chan[ch].falc.offset;
 
         cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch),
                    cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) & 
@@ -691,7 +689,7 @@ static void falc_open_timeslot(pc300_t * card, int ch, int timeslot)
 static void falc_close_timeslot(pc300_t * card, int ch, int timeslot)
 {
         void __iomem *falcbase = card->hw.falcbase;
-        ucchar tshf = card->chan[ch].falc.offset;
+        u8 tshf = card->chan[ch].falc.offset;
 
         cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch),
                    cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) | 
@@ -812,7 +810,7 @@ static void falc_init_t1(pc300_t * card, int ch)
         pc300chconf_t *conf = (pc300chconf_t *) & chan->conf;
         falc_t *pfalc = (falc_t *) & chan->falc;
         void __iomem *falcbase = card->hw.falcbase;
-        ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0);
+        u8 dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0);
 
         /* Switch to T1 mode (PCM 24) */
         cpc_writeb(falcbase + F_REG(FMR1, ch), FMR1_PMOD);
@@ -981,7 +979,7 @@ static void falc_init_e1(pc300_t * card, int ch)
         pc300chconf_t *conf = (pc300chconf_t *) & chan->conf;
         falc_t *pfalc = (falc_t *) & chan->falc;
         void __iomem *falcbase = card->hw.falcbase;
-        ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0);
+        u8 dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0);
 
         /* Switch to E1 mode (PCM 30) */
         cpc_writeb(falcbase + F_REG(FMR1, ch),
@@ -1187,7 +1185,7 @@ static void te_config(pc300_t * card, int ch)
         pc300chconf_t *conf = (pc300chconf_t *) & chan->conf;
         falc_t *pfalc = (falc_t *) & chan->falc;
         void __iomem *falcbase = card->hw.falcbase;
-        ucchar dummy;
+        u8 dummy;
         unsigned long flags;
 
         memset(pfalc, 0, sizeof(falc_t));
@@ -1403,7 +1401,7 @@ static void falc_update_stats(pc300_t * card, int ch)
         pc300chconf_t *conf = (pc300chconf_t *) & chan->conf;
         falc_t *pfalc = (falc_t *) & chan->falc;
         void __iomem *falcbase = card->hw.falcbase;
-        ucshort counter;
+        u16 counter;
 
         counter = cpc_readb(falcbase + F_REG(FECL, ch));
         counter |= cpc_readb(falcbase + F_REG(FECH, ch)) << 8;
@@ -1729,7 +1727,7 @@ static void falc_pattern_test(pc300_t * card, int ch, unsigned int activate)
  * Description: This routine returns the bit error counter value
  *----------------------------------------------------------------------------
  */
-static ucshort falc_pattern_test_error(pc300_t * card, int ch)
+static u16 falc_pattern_test_error(pc300_t * card, int ch)
 {
         pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
         falc_t *pfalc = (falc_t *) & chan->falc;
@@ -1776,7 +1774,7 @@ static void cpc_tx_timeout(struct net_device *dev)
         pc300_t *card = (pc300_t *) chan->card;
         int ch = chan->channel;
         unsigned long flags;
-        ucchar ilar;
+        u8 ilar;
 
         dev->stats.tx_errors++;
         dev->stats.tx_aborted_errors++;
@@ -1807,11 +1805,7 @@ static int cpc_queue_xmit(struct sk_buff *skb, struct net_device *dev)
         int i;
 #endif
 
-        if (chan->conf.monitor) {
-                /* In monitor mode no Tx is done: ignore packet */
-                dev_kfree_skb(skb);
-                return 0;
-        } else if (!netif_carrier_ok(dev)) {
+        if (!netif_carrier_ok(dev)) {
                 /* DCD must be OFF: drop packet */
                 dev_kfree_skb(skb);
                 dev->stats.tx_errors++;
@@ -1836,7 +1830,7 @@ static int cpc_queue_xmit(struct sk_buff *skb, struct net_device *dev)
         }
 
         /* Write buffer to DMA buffers */
-        if (dma_buf_write(card, ch, (ucchar *) skb->data, skb->len) != 0) {
+        if (dma_buf_write(card, ch, (u8 *)skb->data, skb->len) != 0) {
 //              printk("%s: write error. Dropping TX packet.\n", dev->name);
                 netif_stop_queue(dev);
                 dev_kfree_skb(skb);
@@ -2001,7 +1995,7 @@ static void sca_tx_intr(pc300dev_t *dev)
 static void sca_intr(pc300_t * card)
 {
         void __iomem *scabase = card->hw.scabase;
-        volatile uclong status;
+        volatile u32 status;
         int ch;
         int intr_count = 0;
         unsigned char dsr_rx;
@@ -2016,7 +2010,7 @@ static void sca_intr(pc300_t * card)
 
             /**** Reception ****/
                         if (status & IR0_DRX((IR0_DMIA | IR0_DMIB), ch)) {
-                                ucchar drx_stat = cpc_readb(scabase + DSR_RX(ch));
+                                u8 drx_stat = cpc_readb(scabase + DSR_RX(ch));
 
                                 /* Clear RX interrupts */
                                 cpc_writeb(scabase + DSR_RX(ch), drx_stat | DSR_DWE);
@@ -2090,7 +2084,7 @@ static void sca_intr(pc300_t * card)
 
             /**** Transmission ****/
                         if (status & IR0_DTX((IR0_EFT | IR0_DMIA | IR0_DMIB), ch)) {
-                                ucchar dtx_stat = cpc_readb(scabase + DSR_TX(ch));
+                                u8 dtx_stat = cpc_readb(scabase + DSR_TX(ch));
 
                                 /* Clear TX interrupts */
                                 cpc_writeb(scabase + DSR_TX(ch), dtx_stat | DSR_DWE);
@@ -2134,7 +2128,7 @@ static void sca_intr(pc300_t * card)
 
             /**** MSCI ****/
                         if (status & IR0_M(IR0_RXINTA, ch)) {
-                                ucchar st1 = cpc_readb(scabase + M_REG(ST1, ch));
+                                u8 st1 = cpc_readb(scabase + M_REG(ST1, ch));
 
                                 /* Clear MSCI interrupts */
                                 cpc_writeb(scabase + M_REG(ST1, ch), st1);
@@ -2176,7 +2170,7 @@ static void sca_intr(pc300_t * card)
         }
 }
 
-static void falc_t1_loop_detection(pc300_t * card, int ch, ucchar frs1)
+static void falc_t1_loop_detection(pc300_t *card, int ch, u8 frs1)
 {
         pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
         falc_t *pfalc = (falc_t *) & chan->falc;
@@ -2201,7 +2195,7 @@ static void falc_t1_loop_detection(pc300_t * card, int ch, ucchar frs1)
         }
 }
 
-static void falc_e1_loop_detection(pc300_t * card, int ch, ucchar rsp)
+static void falc_e1_loop_detection(pc300_t *card, int ch, u8 rsp)
 {
         pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
         falc_t *pfalc = (falc_t *) & chan->falc;
@@ -2231,8 +2225,8 @@ static void falc_t1_intr(pc300_t * card, int ch)
         pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
         falc_t *pfalc = (falc_t *) & chan->falc;
         void __iomem *falcbase = card->hw.falcbase;
-        ucchar isr0, isr3, gis;
-        ucchar dummy;
+        u8 isr0, isr3, gis;
+        u8 dummy;
 
         while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) {
                 if (gis & GIS_ISR0) {
@@ -2278,8 +2272,8 @@ static void falc_e1_intr(pc300_t * card, int ch)
         pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
         falc_t *pfalc = (falc_t *) & chan->falc;
         void __iomem *falcbase = card->hw.falcbase;
-        ucchar isr1, isr2, isr3, gis, rsp;
-        ucchar dummy;
+        u8 isr1, isr2, isr3, gis, rsp;
+        u8 dummy;
 
         while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) {
                 rsp = cpc_readb(falcbase + F_REG(RSP, ch));
@@ -2361,7 +2355,7 @@ static void falc_intr(pc300_t * card)
 static irqreturn_t cpc_intr(int irq, void *dev_id)
 {
         pc300_t *card = dev_id;
-        volatile ucchar plx_status;
+        volatile u8 plx_status;
 
         if (!card) {
 #ifdef PC300_DEBUG_INTR
@@ -2400,7 +2394,7 @@ static irqreturn_t cpc_intr(int irq, void *dev_id)
 
 static void cpc_sca_status(pc300_t * card, int ch)
 {
-        ucchar ilar;
+        u8 ilar;
         void __iomem *scabase = card->hw.scabase;
         unsigned long flags;
 
@@ -2818,7 +2812,7 @@ static int cpc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
         }
 }
 
-static int clock_rate_calc(uclong rate, uclong clock, int *br_io)
+static int clock_rate_calc(u32 rate, u32 clock, int *br_io)
 {
         int br, tc;
         int br_pwr, error;
@@ -2855,12 +2849,12 @@ static int ch_config(pc300dev_t * d)
         void __iomem *scabase = card->hw.scabase;
         void __iomem *plxbase = card->hw.plxbase;
         int ch = chan->channel;
-        uclong clkrate = chan->conf.phys_settings.clock_rate;
-        uclong clktype = chan->conf.phys_settings.clock_type;
-        ucshort encoding = chan->conf.proto_settings.encoding;
-        ucshort parity = chan->conf.proto_settings.parity;   
-        ucchar md0, md2;
-    
+        u32 clkrate = chan->conf.phys_settings.clock_rate;
+        u32 clktype = chan->conf.phys_settings.clock_type;
+        u16 encoding = chan->conf.proto_settings.encoding;
+        u16 parity = chan->conf.proto_settings.parity;
+        u8 md0, md2;
+
         /* Reset the channel */
         cpc_writeb(scabase + M_REG(CMD, ch), CMD_CH_RST);
 
@@ -3152,19 +3146,10 @@ int cpc_open(struct net_device *dev)
         printk("pc300: cpc_open");
 #endif
 
-#ifdef FIXME
-        if (hdlc->proto.id == IF_PROTO_PPP) {
-                d->if_ptr = &hdlc->state.ppp.pppdev;
-        }
-#endif
-
         result = hdlc_open(dev);
-        if (/* FIXME hdlc->proto.id == IF_PROTO_PPP*/ 0) {
-                dev->priv = d;
-        }
-        if (result) {
+
+        if (result)
                 return result;
-        }
 
         sprintf(ifr.ifr_name, "%s", dev->name);
         result = cpc_opench(d);
@@ -3197,9 +3182,7 @@ static int cpc_close(struct net_device *dev)
         CPC_UNLOCK(card, flags);
 
         hdlc_close(dev);
-        if (/* FIXME hdlc->proto.id == IF_PROTO_PPP*/ 0) {
-                d->if_ptr = NULL;
-        }
+
 #ifdef CONFIG_PC300_MLPPP
         if (chan->conf.proto == PC300_PROTO_MLPPP) {
                 cpc_tty_unregister_service(d);
@@ -3210,16 +3193,16 @@ static int cpc_close(struct net_device *dev)
         return 0;
 }
 
-static uclong detect_ram(pc300_t * card)
+static u32 detect_ram(pc300_t * card)
 {
-        uclong i;
-        ucchar data;
+        u32 i;
+        u8 data;
         void __iomem *rambase = card->hw.rambase;
 
         card->hw.ramsize = PC300_RAMSIZE;
         /* Let's find out how much RAM is present on this board */
         for (i = 0; i < card->hw.ramsize; i++) {
-                data = (ucchar) (i & 0xff);
+                data = (u8)(i & 0xff);
                 cpc_writeb(rambase + i, data);
                 if (cpc_readb(rambase + i) != data) {
                         break;
@@ -3296,7 +3279,7 @@ static void cpc_init_card(pc300_t * card)
         cpc_writeb(card->hw.scabase + DMER, 0x80);
 
         if (card->hw.type == PC300_TE) {
-                ucchar reg1;
+                u8 reg1;
 
                 /* Check CPLD version */
                 reg1 = cpc_readb(card->hw.falcbase + CPLD_REG1);
@@ -3360,7 +3343,6 @@ static void cpc_init_card(pc300_t * card)
                 chan->nfree_tx_bd = N_DMA_TX_BUF;
 
                 d->chan = chan;
-                d->tx_skb = NULL;
                 d->trace_on = 0;
                 d->line_on = 0;
                 d->line_off = 0;
@@ -3431,7 +3413,7 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
         static int first_time = 1;
         int err, eeprom_outdated = 0;
-        ucshort device_id;
+        u16 device_id;
         pc300_t *card;
 
         if (first_time) {
diff --git a/drivers/net/wan/sealevel.c b/drivers/net/wan/sealevel.c
index 44a89df1b8bf..c0235844a4d5 100644
--- a/drivers/net/wan/sealevel.c
+++ b/drivers/net/wan/sealevel.c
@@ -8,6 +8,7 @@
  *
  *      (c) Copyright 1999, 2001 Alan Cox
  *      (c) Copyright 2001 Red Hat Inc.
+ *      Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
  *
  */
 
@@ -19,6 +20,7 @@
 #include <linux/netdevice.h>
 #include <linux/if_arp.h>
 #include <linux/delay.h>
+#include <linux/hdlc.h>
 #include <linux/ioport.h>
 #include <linux/init.h>
 #include <net/arp.h>
@@ -27,22 +29,19 @@
 #include <asm/io.h>
 #include <asm/dma.h>
 #include <asm/byteorder.h>
-#include <net/syncppp.h>
 #include "z85230.h"
 
 
 struct slvl_device
 {
-        void *if_ptr;   /* General purpose pointer (used by SPPP) */
         struct z8530_channel *chan;
-        struct ppp_device pppdev;
         int channel;
 };
 
 
 struct slvl_board
 {
-        struct slvl_device *dev[2];
+        struct slvl_device dev[2];
         struct z8530_dev board;
         int iobase;
 };
@@ -51,72 +50,69 @@ struct slvl_board
  *      Network driver support routines
  */
 
+static inline struct slvl_device* dev_to_chan(struct net_device *dev)
+{
+        return (struct slvl_device *)dev_to_hdlc(dev)->priv;
+}
+
 /*
- *      Frame receive. Simple for our card as we do sync ppp and there
+ *      Frame receive. Simple for our card as we do HDLC and there
  *      is no funny garbage involved
  */
- 
+
 static void sealevel_input(struct z8530_channel *c, struct sk_buff *skb)
 {
         /* Drop the CRC - it's not a good idea to try and negotiate it ;) */
-        skb_trim(skb, skb->len-2);
-        skb->protocol=htons(ETH_P_WAN_PPP);
+        skb_trim(skb, skb->len - 2);
+        skb->protocol = hdlc_type_trans(skb, c->netdevice);
         skb_reset_mac_header(skb);
-        skb->dev=c->netdevice;
-        /*
-         *      Send it to the PPP layer. We don't have time to process
-         *      it right now.
-         */
+        skb->dev = c->netdevice;
         netif_rx(skb);
         c->netdevice->last_rx = jiffies;
 }
- 
+
 /*
  *      We've been placed in the UP state
- */ 
- 
+ */
+
 static int sealevel_open(struct net_device *d)
 {
-        struct slvl_device *slvl=d->priv;
+        struct slvl_device *slvl = dev_to_chan(d);
         int err = -1;
         int unit = slvl->channel;
-        
+
         /*
-         *      Link layer up. 
+         *      Link layer up.
          */
 
-        switch(unit)
+        switch (unit)
         {
                 case 0:
-                        err=z8530_sync_dma_open(d, slvl->chan);
+                        err = z8530_sync_dma_open(d, slvl->chan);
                         break;
                 case 1:
-                        err=z8530_sync_open(d, slvl->chan);
+                        err = z8530_sync_open(d, slvl->chan);
                         break;
         }
-        
-        if(err)
+
+        if (err)
                 return err;
-        /*
-         *      Begin PPP
-         */
-        err=sppp_open(d);
-        if(err)
-        {
-                switch(unit)
-                {
+
+        err = hdlc_open(d);
+        if (err) {
+                switch (unit) {
                         case 0:
                                 z8530_sync_dma_close(d, slvl->chan);
                                 break;
                         case 1:
                                 z8530_sync_close(d, slvl->chan);
                                 break;
-                }                               
+                }
                 return err;
         }
-        
-        slvl->chan->rx_function=sealevel_input;
-        
+
+        slvl->chan->rx_function = sealevel_input;
+
         /*
          *      Go go go
          */
@@ -126,26 +122,19 @@ static int sealevel_open(struct net_device *d)
 
 static int sealevel_close(struct net_device *d)
 {
-        struct slvl_device *slvl=d->priv;
+        struct slvl_device *slvl = dev_to_chan(d);
         int unit = slvl->channel;
-        
+
         /*
          *      Discard new frames
          */
-        
-        slvl->chan->rx_function=z8530_null_rx;
-                
-        /*
-         *      PPP off
-         */
-        sppp_close(d);
-        /*
-         *      Link layer down
-         */
 
+        slvl->chan->rx_function = z8530_null_rx;
+
+        hdlc_close(d);
         netif_stop_queue(d);
-                
-        switch(unit)
+
+        switch (unit)
         {
                 case 0:
                         z8530_sync_dma_close(d, slvl->chan);
@@ -159,210 +148,153 @@ static int sealevel_close(struct net_device *d)
 
 static int sealevel_ioctl(struct net_device *d, struct ifreq *ifr, int cmd)
 {
-        /* struct slvl_device *slvl=d->priv;
+        /* struct slvl_device *slvl=dev_to_chan(d);
            z8530_ioctl(d,&slvl->sync.chanA,ifr,cmd) */
-        return sppp_do_ioctl(d, ifr,cmd);
-}
-
-static struct net_device_stats *sealevel_get_stats(struct net_device *d)
-{
-        struct slvl_device *slvl=d->priv;
-        if(slvl)
-                return z8530_get_stats(slvl->chan);
-        else
-                return NULL;
+        return hdlc_ioctl(d, ifr, cmd);
 }
 
 /*
- *      Passed PPP frames, fire them downwind.
+ *      Passed network frames, fire them downwind.
  */
- 
+
 static int sealevel_queue_xmit(struct sk_buff *skb, struct net_device *d)
 {
-        struct slvl_device *slvl=d->priv;
-        return z8530_queue_xmit(slvl->chan, skb);
+        return z8530_queue_xmit(dev_to_chan(d)->chan, skb);
 }
 
-static int sealevel_neigh_setup(struct neighbour *n)
+static int sealevel_attach(struct net_device *dev, unsigned short encoding,
+                           unsigned short parity)
 {
-        if (n->nud_state == NUD_NONE) {
-                n->ops = &arp_broken_ops;
-                n->output = n->ops->output;
-        }
-        return 0;
+        if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
+                return 0;
+        return -EINVAL;
 }
 
-static int sealevel_neigh_setup_dev(struct net_device *dev, struct neigh_parms *p)
+static int slvl_setup(struct slvl_device *sv, int iobase, int irq)
 {
-        if (p->tbl->family == AF_INET) {
-                p->neigh_setup = sealevel_neigh_setup;
-                p->ucast_probes = 0;
-                p->mcast_probes = 0;
+        struct net_device *dev = alloc_hdlcdev(sv);
+        if (!dev)
+                return -1;
+
+        dev_to_hdlc(dev)->attach = sealevel_attach;
+        dev_to_hdlc(dev)->xmit = sealevel_queue_xmit;
+        dev->open = sealevel_open;
+        dev->stop = sealevel_close;
+        dev->do_ioctl = sealevel_ioctl;
+        dev->base_addr = iobase;
+        dev->irq = irq;
+
+        if (register_hdlc_device(dev)) {
+                printk(KERN_ERR "sealevel: unable to register HDLC device\n");
+                free_netdev(dev);
+                return -1;
         }
-        return 0;
-}
 
-static int sealevel_attach(struct net_device *dev)
-{
-        struct slvl_device *sv = dev->priv;
-        sppp_attach(&sv->pppdev);
+        sv->chan->netdevice = dev;
         return 0;
 }
 
-static void sealevel_detach(struct net_device *dev)
-{
-        sppp_detach(dev);
-}
-                
-static void slvl_setup(struct net_device *d)
-{
-        d->open = sealevel_open;
-        d->stop = sealevel_close;
-        d->init = sealevel_attach;
-        d->uninit = sealevel_detach;
-        d->hard_start_xmit = sealevel_queue_xmit;
-        d->get_stats = sealevel_get_stats;
-        d->set_multicast_list = NULL;
-        d->do_ioctl = sealevel_ioctl;
-        d->neigh_setup = sealevel_neigh_setup_dev;
-        d->set_mac_address = NULL;
-
-}
-
-static inline struct slvl_device *slvl_alloc(int iobase, int irq)
-{
-        struct net_device *d;
-        struct slvl_device *sv;
-
-        d = alloc_netdev(sizeof(struct slvl_device), "hdlc%d",
-                         slvl_setup);
-
-        if (!d) 
-                return NULL;
-
-        sv = d->priv;
-        d->ml_priv = sv;
-        sv->if_ptr = &sv->pppdev;
-        sv->pppdev.dev = d;
-        d->base_addr = iobase;
-        d->irq = irq;
-                
-        return sv;
-}
-
 
 /*
  *      Allocate and setup Sealevel board.
  */
- 
-static __init struct slvl_board *slvl_init(int iobase, int irq, 
+
+static __init struct slvl_board *slvl_init(int iobase, int irq,
                                            int txdma, int rxdma, int slow)
 {
         struct z8530_dev *dev;
         struct slvl_board *b;
-        
+
         /*
          *      Get the needed I/O space
          */
 
-        if(!request_region(iobase, 8, "Sealevel 4021")) 
-        {       
-                printk(KERN_WARNING "sealevel: I/O 0x%X already in use.\n", iobase);
+        if (!request_region(iobase, 8, "Sealevel 4021")) {
+                printk(KERN_WARNING "sealevel: I/O 0x%X already in use.\n",
+                       iobase);
                 return NULL;
         }
-        
-        b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL);
-        if(!b)
-                goto fail3;
 
-        if (!(b->dev[0]= slvl_alloc(iobase, irq)))
-                goto fail2;
+        b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL);
+        if (!b)
+                goto err_kzalloc;
 
-        b->dev[0]->chan = &b->board.chanA;      
-        b->dev[0]->channel = 0;
-        
-        if (!(b->dev[1] = slvl_alloc(iobase, irq)))
-                goto fail1_0;
+        b->dev[0].chan = &b->board.chanA;
+        b->dev[0].channel = 0;
 
-        b->dev[1]->chan = &b->board.chanB;
-        b->dev[1]->channel = 1;
+        b->dev[1].chan = &b->board.chanB;
+        b->dev[1].channel = 1;
 
         dev = &b->board;
-        
+
         /*
          *      Stuff in the I/O addressing
          */
-         
+
         dev->active = 0;
 
         b->iobase = iobase;
-        
+
         /*
          *      Select 8530 delays for the old board
          */
-         
-        if(slow)
+
+        if (slow)
                 iobase |= Z8530_PORT_SLEEP;
-                
-        dev->chanA.ctrlio=iobase+1;
-        dev->chanA.dataio=iobase;
-        dev->chanB.ctrlio=iobase+3;
-        dev->chanB.dataio=iobase+2;
-        
-        dev->chanA.irqs=&z8530_nop;
-        dev->chanB.irqs=&z8530_nop;
-        
+
+        dev->chanA.ctrlio = iobase + 1;
+        dev->chanA.dataio = iobase;
+        dev->chanB.ctrlio = iobase + 3;
+        dev->chanB.dataio = iobase + 2;
+
+        dev->chanA.irqs = &z8530_nop;
+        dev->chanB.irqs = &z8530_nop;
+
         /*
          *      Assert DTR enable DMA
          */
-         
-        outb(3|(1<<7), b->iobase+4);    
-        
+
+        outb(3 | (1 << 7), b->iobase + 4);
+
 
         /* We want a fast IRQ for this device. Actually we'd like an even faster
            IRQ ;) - This is one driver RtLinux is made for */
-   
-        if(request_irq(irq, &z8530_interrupt, IRQF_DISABLED, "SeaLevel", dev)<0)
-        {
+
+        if (request_irq(irq, &z8530_interrupt, IRQF_DISABLED,
+                        "SeaLevel", dev) < 0) {
                 printk(KERN_WARNING "sealevel: IRQ %d already in use.\n", irq);
-                goto fail1_1;
+                goto err_request_irq;
         }
-        
-        dev->irq=irq;
-        dev->chanA.private=&b->dev[0];
-        dev->chanB.private=&b->dev[1];
-        dev->chanA.netdevice=b->dev[0]->pppdev.dev;
-        dev->chanB.netdevice=b->dev[1]->pppdev.dev;
-        dev->chanA.dev=dev;
-        dev->chanB.dev=dev;
-
-        dev->chanA.txdma=3;
-        dev->chanA.rxdma=1;
-        if(request_dma(dev->chanA.txdma, "SeaLevel (TX)")!=0)
-                goto fail;
-                
-        if(request_dma(dev->chanA.rxdma, "SeaLevel (RX)")!=0)
-                goto dmafail;
-        
+
+        dev->irq = irq;
+        dev->chanA.private = &b->dev[0];
+        dev->chanB.private = &b->dev[1];
+        dev->chanA.dev = dev;
+        dev->chanB.dev = dev;
+
+        dev->chanA.txdma = 3;
+        dev->chanA.rxdma = 1;
+        if (request_dma(dev->chanA.txdma, "SeaLevel (TX)"))
+                goto err_dma_tx;
+
+        if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)"))
+                goto err_dma_rx;
+
         disable_irq(irq);
-                
+
         /*
          *      Begin normal initialise
          */
-         
-        if(z8530_init(dev)!=0)
-        {
+
+        if (z8530_init(dev) != 0) {
                 printk(KERN_ERR "Z8530 series device not found.\n");
                 enable_irq(irq);
-                goto dmafail2;
+                goto free_hw;
         }
-        if(dev->type==Z85C30)
-        {
+        if (dev->type == Z85C30) {
                 z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream);
                 z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream);
-        }
-        else
-        {
+        } else {
                 z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230);
                 z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream_85230);
         }
@@ -370,36 +302,31 @@ static __init struct slvl_board *slvl_init(int iobase, int irq,
         /*
          *      Now we can take the IRQ
          */
-        
+
         enable_irq(irq);
 
-        if (register_netdev(b->dev[0]->pppdev.dev)) 
-                goto dmafail2;
-                
-        if (register_netdev(b->dev[1]->pppdev.dev)) 
-                goto fail_unit;
+        if (slvl_setup(&b->dev[0], iobase, irq))
+                goto free_hw;
+        if (slvl_setup(&b->dev[1], iobase, irq))
+                goto free_netdev0;
 
         z8530_describe(dev, "I/O", iobase);
-        dev->active=1;
+        dev->active = 1;
         return b;
 
-fail_unit:
-        unregister_netdev(b->dev[0]->pppdev.dev);
-        
-dmafail2:
+free_netdev0:
+        unregister_hdlc_device(b->dev[0].chan->netdevice);
+        free_netdev(b->dev[0].chan->netdevice);
+free_hw:
         free_dma(dev->chanA.rxdma);
-dmafail:
+err_dma_rx:
         free_dma(dev->chanA.txdma);
-fail:
+err_dma_tx:
         free_irq(irq, dev);
-fail1_1:
-        free_netdev(b->dev[1]->pppdev.dev);
-fail1_0:
-        free_netdev(b->dev[0]->pppdev.dev);
-fail2:
+err_request_irq:
         kfree(b);
-fail3:
-        release_region(iobase,8);
+err_kzalloc:
+        release_region(iobase, 8);
         return NULL;
 }
 
@@ -408,14 +335,14 @@ static void __exit slvl_shutdown(struct slvl_board *b)
         int u;
 
         z8530_shutdown(&b->board);
-        
-        for(u=0; u<2; u++)
+
+        for (u = 0; u < 2; u++)
         {
-                struct net_device *d = b->dev[u]->pppdev.dev;
-                unregister_netdev(d);
+                struct net_device *d = b->dev[u].chan->netdevice;
+                unregister_hdlc_device(d);
                 free_netdev(d);
         }
-        
+
         free_irq(b->board.irq, &b->board);
         free_dma(b->board.chanA.rxdma);
         free_dma(b->board.chanA.txdma);
@@ -451,10 +378,6 @@ static struct slvl_board *slvl_unit;
 
 static int __init slvl_init_module(void)
 {
-#ifdef MODULE
-        printk(KERN_INFO "SeaLevel Z85230 Synchronous Driver v 0.02.\n");
-        printk(KERN_INFO "(c) Copyright 1998, Building Number Three Ltd.\n");
-#endif
         slvl_unit = slvl_init(io, irq, txdma, rxdma, slow);
 
         return slvl_unit ? 0 : -ENODEV;
diff --git a/drivers/net/wan/syncppp.c b/drivers/net/wan/syncppp.c
index 29b4b94e4947..327d58589e12 100644
--- a/drivers/net/wan/syncppp.c
+++ b/drivers/net/wan/syncppp.c
@@ -230,13 +230,6 @@ static void sppp_input (struct net_device *dev, struct sk_buff *skb)
         skb->dev=dev;
         skb_reset_mac_header(skb);
 
-        if (dev->flags & IFF_RUNNING)
-        {
-                /* Count received bytes, add FCS and one flag */
-                sp->ibytes+= skb->len + 3;
-                sp->ipkts++;
-        }
-
         if (!pskb_may_pull(skb, PPP_HEADER_LEN)) {
                 /* Too small packet, drop it. */
                 if (sp->pp_flags & PP_DEBUG)
@@ -832,7 +825,6 @@ static void sppp_cp_send (struct sppp *sp, u16 proto, u8 type,
                         sppp_print_bytes ((u8*) (lh+1), len);
                 printk (">\n");
         }
-        sp->obytes += skb->len;
         /* Control is high priority so it doesn't get queued behind data */
         skb->priority=TC_PRIO_CONTROL;
         skb->dev = dev;
@@ -875,7 +867,6 @@ static void sppp_cisco_send (struct sppp *sp, int type, u32 par1, u32 par2)
                 printk (KERN_WARNING "%s: cisco output: <%xh %xh %xh %xh %xh-%xh>\n",
                         dev->name,  ntohl (ch->type), ch->par1,
                         ch->par2, ch->rel, ch->time0, ch->time1);
-        sp->obytes += skb->len;
         skb->priority=TC_PRIO_CONTROL;
         skb->dev = dev;
         skb_queue_tail(&tx_queue, skb);
diff --git a/drivers/net/wan/z85230.c b/drivers/net/wan/z85230.c
index 98ef400908b8..243bd8d918fe 100644
--- a/drivers/net/wan/z85230.c
+++ b/drivers/net/wan/z85230.c
@@ -43,6 +43,7 @@
 #include <linux/netdevice.h>
 #include <linux/if_arp.h>
 #include <linux/delay.h>
+#include <linux/hdlc.h>
 #include <linux/ioport.h>
 #include <linux/init.h>
 #include <asm/dma.h>
@@ -51,7 +52,6 @@
 #define RT_UNLOCK
 #include <linux/spinlock.h>
 
-#include <net/syncppp.h>
 #include "z85230.h"
 
 
@@ -440,51 +440,46 @@ static void z8530_tx(struct z8530_channel *c)
  *      A status event occurred in PIO synchronous mode. There are several
  *      reasons the chip will bother us here. A transmit underrun means we
  *      failed to feed the chip fast enough and just broke a packet. A DCD
- *      change is a line up or down. We communicate that back to the protocol
- *      layer for synchronous PPP to renegotiate.
+ *      change is a line up or down.
  */
 
 static void z8530_status(struct z8530_channel *chan)
 {
         u8 status, altered;
 
-        status=read_zsreg(chan, R0);
-        altered=chan->status^status;
-        
-        chan->status=status;
-        
-        if(status&TxEOM)
-        {
+        status = read_zsreg(chan, R0);
+        altered = chan->status ^ status;
+
+        chan->status = status;
+
+        if (status & TxEOM) {
 /*              printk("%s: Tx underrun.\n", chan->dev->name); */
-                chan->stats.tx_fifo_errors++;
+                chan->netdevice->stats.tx_fifo_errors++;
                 write_zsctrl(chan, ERR_RES);
                 z8530_tx_done(chan);
         }
-                
-        if(altered&chan->dcdcheck)
+
+        if (altered & chan->dcdcheck)
         {
-                if(status&chan->dcdcheck)
-                {
+                if (status & chan->dcdcheck) {
                         printk(KERN_INFO "%s: DCD raised\n", chan->dev->name);
-                        write_zsreg(chan, R3, chan->regs[3]|RxENABLE);
-                        if(chan->netdevice &&
-                            ((chan->netdevice->type == ARPHRD_HDLC) ||
-                            (chan->netdevice->type == ARPHRD_PPP)))
-                                sppp_reopen(chan->netdevice);
-                }
-                else
-                {
+                        write_zsreg(chan, R3, chan->regs[3] | RxENABLE);
+                        if (chan->netdevice)
+                                netif_carrier_on(chan->netdevice);
+                } else {
                         printk(KERN_INFO "%s: DCD lost\n", chan->dev->name);
-                        write_zsreg(chan, R3, chan->regs[3]&~RxENABLE);
+                        write_zsreg(chan, R3, chan->regs[3] & ~RxENABLE);
                         z8530_flush_fifo(chan);
+                        if (chan->netdevice)
+                                netif_carrier_off(chan->netdevice);
                 }
-                
-        }       
+
+        }
         write_zsctrl(chan, RES_EXT_INT);
         write_zsctrl(chan, RES_H_IUS);
 }
 
-struct z8530_irqhandler z8530_sync=
+struct z8530_irqhandler z8530_sync =
 {
         z8530_rx,
         z8530_tx,
@@ -556,8 +551,7 @@ static void z8530_dma_tx(struct z8530_channel *chan)
  *      
  *      A status event occurred on the Z8530. We receive these for two reasons
  *      when in DMA mode. Firstly if we finished a packet transfer we get one
- *      and kick the next packet out. Secondly we may see a DCD change and
- *      have to poke the protocol layer.
+ *      and kick the next packet out. Secondly we may see a DCD change.
  *
  */
  
@@ -586,24 +580,21 @@ static void z8530_dma_status(struct z8530_channel *chan)
                 }
         }
 
-        if(altered&chan->dcdcheck)
+        if (altered & chan->dcdcheck)
         {
-                if(status&chan->dcdcheck)
-                {
+                if (status & chan->dcdcheck) {
                         printk(KERN_INFO "%s: DCD raised\n", chan->dev->name);
-                        write_zsreg(chan, R3, chan->regs[3]|RxENABLE);
-                        if(chan->netdevice &&
-                            ((chan->netdevice->type == ARPHRD_HDLC) ||
-                            (chan->netdevice->type == ARPHRD_PPP)))
-                                sppp_reopen(chan->netdevice);
-                }
-                else
-                {
+                        write_zsreg(chan, R3, chan->regs[3] | RxENABLE);
+                        if (chan->netdevice)
+                                netif_carrier_on(chan->netdevice);
+                } else {
                         printk(KERN_INFO "%s:DCD lost\n", chan->dev->name);
-                        write_zsreg(chan, R3, chan->regs[3]&~RxENABLE);
+                        write_zsreg(chan, R3, chan->regs[3] & ~RxENABLE);
                         z8530_flush_fifo(chan);
+                        if (chan->netdevice)
+                                netif_carrier_off(chan->netdevice);
                 }
-        }       
+        }
 
         write_zsctrl(chan, RES_EXT_INT);
         write_zsctrl(chan, RES_H_IUS);
@@ -1459,10 +1450,10 @@ static void z8530_tx_begin(struct z8530_channel *c)
                         /*
                          *      Check if we crapped out.
                          */
-                        if(get_dma_residue(c->txdma))
+                        if (get_dma_residue(c->txdma))
                         {
-                                c->stats.tx_dropped++;
-                                c->stats.tx_fifo_errors++;
+                                c->netdevice->stats.tx_dropped++;
+                                c->netdevice->stats.tx_fifo_errors++;
                         }
                         release_dma_lock(flags);
                 }
@@ -1534,21 +1525,21 @@ static void z8530_tx_begin(struct z8530_channel *c)
  *      packet. This code is fairly timing sensitive.
  *
  *      Called with the register lock held.
- */ 
- 
+ */
+
 static void z8530_tx_done(struct z8530_channel *c)
 {
         struct sk_buff *skb;
 
         /* Actually this can happen.*/
-        if(c->tx_skb==NULL)
+        if (c->tx_skb == NULL)
                 return;
 
-        skb=c->tx_skb;
-        c->tx_skb=NULL;
+        skb = c->tx_skb;
+        c->tx_skb = NULL;
         z8530_tx_begin(c);
-        c->stats.tx_packets++;
-        c->stats.tx_bytes+=skb->len;
+        c->netdevice->stats.tx_packets++;
+        c->netdevice->stats.tx_bytes += skb->len;
         dev_kfree_skb_irq(skb);
 }
 
@@ -1558,7 +1549,7 @@ static void z8530_tx_done(struct z8530_channel *c)
  *      @skb: The buffer
  *
  *      We point the receive handler at this function when idle. Instead
- *      of syncppp processing the frames we get to throw them away.
+ *      of processing the frames we get to throw them away.
  */
  
 void z8530_null_rx(struct z8530_channel *c, struct sk_buff *skb)
@@ -1635,10 +1626,11 @@ static void z8530_rx_done(struct z8530_channel *c)
                 else
                         /* Can't occur as we dont reenable the DMA irq until
                            after the flip is done */
-                        printk(KERN_WARNING "%s: DMA flip overrun!\n", c->netdevice->name);
-                        
+                        printk(KERN_WARNING "%s: DMA flip overrun!\n",
+                               c->netdevice->name);
+
                 release_dma_lock(flags);
-                
+
                 /*
                  *      Shove the old buffer into an sk_buff. We can't DMA
                  *      directly into one on a PC - it might be above the 16Mb
@@ -1646,27 +1638,23 @@ static void z8530_rx_done(struct z8530_channel *c)
                  *      can avoid the copy. Optimisation 2 - make the memcpy
                  *      a copychecksum.
                  */
-                 
-                skb=dev_alloc_skb(ct);
-                if(skb==NULL)
-                {
-                        c->stats.rx_dropped++;
-                        printk(KERN_WARNING "%s: Memory squeeze.\n", c->netdevice->name);
-                }
-                else
-                {
+
+                skb = dev_alloc_skb(ct);
+                if (skb == NULL) {
+                        c->netdevice->stats.rx_dropped++;
+                        printk(KERN_WARNING "%s: Memory squeeze.\n",
+                               c->netdevice->name);
+                } else {
                         skb_put(skb, ct);
                         skb_copy_to_linear_data(skb, rxb, ct);
-                        c->stats.rx_packets++;
-                        c->stats.rx_bytes+=ct;
+                        c->netdevice->stats.rx_packets++;
+                        c->netdevice->stats.rx_bytes += ct;
                 }
-                c->dma_ready=1;
-        }
-        else
-        {
-                RT_LOCK;        
-                skb=c->skb;
-                
+                c->dma_ready = 1;
+        } else {
+                RT_LOCK;
+                skb = c->skb;
+
                 /*
                  *      The game we play for non DMA is similar. We want to
                  *      get the controller set up for the next packet as fast
@@ -1677,48 +1665,39 @@ static void z8530_rx_done(struct z8530_channel *c)
                  *      if you build a system where the sync irq isnt blocked
                  *      by the kernel IRQ disable then you need only block the
                  *      sync IRQ for the RT_LOCK area.
-                 *      
+                 *
                  */
                 ct=c->count;
-                
+
                 c->skb = c->skb2;
                 c->count = 0;
                 c->max = c->mtu;
-                if(c->skb)
-                {
+                if (c->skb) {
                         c->dptr = c->skb->data;
                         c->max = c->mtu;
-                }
-                else
-                {
-                        c->count= 0;
+                } else {
+                        c->count = 0;
                         c->max = 0;
                 }
                 RT_UNLOCK;
 
                 c->skb2 = dev_alloc_skb(c->mtu);
-                if(c->skb2==NULL)
+                if (c->skb2 == NULL)
                         printk(KERN_WARNING "%s: memory squeeze.\n",
-                                c->netdevice->name);
+                               c->netdevice->name);
                 else
-                {
-                        skb_put(c->skb2,c->mtu);
-                }
-                c->stats.rx_packets++;
-                c->stats.rx_bytes+=ct;
-                
+                        skb_put(c->skb2, c->mtu);
+                c->netdevice->stats.rx_packets++;
+                c->netdevice->stats.rx_bytes += ct;
         }
         /*
          *      If we received a frame we must now process it.
          */
-        if(skb)
-        {
+        if (skb) {
                 skb_trim(skb, ct);
-                c->rx_function(c,skb);
-        }
-        else
-        {
-                c->stats.rx_dropped++;
+                c->rx_function(c, skb);
+        } else {
+                c->netdevice->stats.rx_dropped++;
                 printk(KERN_ERR "%s: Lost a frame\n", c->netdevice->name);
         }
 }
@@ -1730,7 +1709,7 @@ static void z8530_rx_done(struct z8530_channel *c)
  *      Returns true if the buffer cross a DMA boundary on a PC. The poor
  *      thing can only DMA within a 64K block not across the edges of it.
  */
- 
+
 static inline int spans_boundary(struct sk_buff *skb)
 {
         unsigned long a=(unsigned long)skb->data;
@@ -1799,24 +1778,6 @@ int z8530_queue_xmit(struct z8530_channel *c, struct sk_buff *skb)
 
 EXPORT_SYMBOL(z8530_queue_xmit);
 
-/**
- *      z8530_get_stats - Get network statistics
- *      @c: The channel to use
- *
- *      Get the statistics block. We keep the statistics in software as
- *      the chip doesn't do it for us.
- *
- *      Locking is ignored here - we could lock for a copy but its
- *      not likely to be that big an issue
- */
- 
-struct net_device_stats *z8530_get_stats(struct z8530_channel *c)
-{
-        return &c->stats;
-}
-
-EXPORT_SYMBOL(z8530_get_stats);
-
 /*
  *      Module support
  */
diff --git a/drivers/net/wan/z85230.h b/drivers/net/wan/z85230.h
index 158aea7b8eac..4f372396c512 100644
--- a/drivers/net/wan/z85230.h
+++ b/drivers/net/wan/z85230.h
@@ -325,7 +325,6 @@ struct z8530_channel
 
         void            *private;       /* For our owner */
         struct net_device       *netdevice;     /* Network layer device */
-        struct net_device_stats stats;  /* Network layer statistics */
 
         /*
          *      Async features
@@ -366,13 +365,13 @@ struct z8530_channel
         unsigned char           tx_active; /* character is being xmitted */
         unsigned char           tx_stopped; /* output is suspended */
 
-        spinlock_t              *lock;    /* Devicr lock */
-};      
+        spinlock_t              *lock;    /* Device lock */
+};
 
 /*
  *      Each Z853x0 device.
- */     
- 
+ */
+
 struct z8530_dev
 {
         char *name;     /* Device instance name */
@@ -408,7 +407,6 @@ extern int z8530_sync_txdma_open(struct net_device *, struct z8530_channel *);
 extern int z8530_sync_txdma_close(struct net_device *, struct z8530_channel *);
 extern int z8530_channel_load(struct z8530_channel *, u8 *);
 extern int z8530_queue_xmit(struct z8530_channel *c, struct sk_buff *skb);
-extern struct net_device_stats *z8530_get_stats(struct z8530_channel *c);
 extern void z8530_null_rx(struct z8530_channel *c, struct sk_buff *skb);
 
 
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 4c7ff61a1a9c..9931b5ab59cd 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -695,6 +695,7 @@ config MAC80211_HWSIM
 
 source "drivers/net/wireless/p54/Kconfig"
 source "drivers/net/wireless/ath5k/Kconfig"
+source "drivers/net/wireless/ath9k/Kconfig"
 source "drivers/net/wireless/iwlwifi/Kconfig"
 source "drivers/net/wireless/hostap/Kconfig"
 source "drivers/net/wireless/b43/Kconfig"
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 54a4f6f1db67..59aa89ec6e81 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -62,5 +62,6 @@ obj-$(CONFIG_RT2X00)	+= rt2x00/
 obj-$(CONFIG_P54_COMMON)        += p54/
 
 obj-$(CONFIG_ATH5K)     += ath5k/
+obj-$(CONFIG_ATH9K)     += ath9k/
 
 obj-$(CONFIG_MAC80211_HWSIM)    += mac80211_hwsim.o
diff --git a/drivers/net/wireless/ath5k/base.c b/drivers/net/wireless/ath5k/base.c
index ebf19bc11f5b..b20a45aa8680 100644
--- a/drivers/net/wireless/ath5k/base.c
+++ b/drivers/net/wireless/ath5k/base.c
@@ -40,7 +40,6 @@
  *
  */
 
-#include <linux/version.h>
 #include <linux/module.h>
 #include <linux/delay.h>
 #include <linux/hardirq.h>
@@ -95,8 +94,6 @@ static struct pci_device_id ath5k_pci_id_table[] __devinitdata = {
         { PCI_VDEVICE(ATHEROS, 0x001a), .driver_data = AR5K_AR5212 }, /* 2413 Griffin-lite */
         { PCI_VDEVICE(ATHEROS, 0x001b), .driver_data = AR5K_AR5212 }, /* 5413 Eagle */
         { PCI_VDEVICE(ATHEROS, 0x001c), .driver_data = AR5K_AR5212 }, /* 5424 Condor (PCI-E)*/
-        { PCI_VDEVICE(ATHEROS, 0x0023), .driver_data = AR5K_AR5212 }, /* 5416 */
-        { PCI_VDEVICE(ATHEROS, 0x0024), .driver_data = AR5K_AR5212 }, /* 5418 */
         { 0 }
 };
 MODULE_DEVICE_TABLE(pci, ath5k_pci_id_table);
@@ -589,7 +586,6 @@ ath5k_pci_suspend(struct pci_dev *pdev, pm_message_t state)
         ath5k_stop_hw(sc);
 
         free_irq(pdev->irq, sc);
-        pci_disable_msi(pdev);
         pci_save_state(pdev);
         pci_disable_device(pdev);
         pci_set_power_state(pdev, PCI_D3hot);
@@ -618,12 +614,10 @@ ath5k_pci_resume(struct pci_dev *pdev)
          */
         pci_write_config_byte(pdev, 0x41, 0);
 
-        pci_enable_msi(pdev);
-
         err = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc);
         if (err) {
                 ATH5K_ERR(sc, "request_irq failed\n");
-                goto err_msi;
+                goto err_no_irq;
         }
 
         err = ath5k_init(sc);
@@ -644,8 +638,7 @@ ath5k_pci_resume(struct pci_dev *pdev)
         return 0;
 err_irq:
         free_irq(pdev->irq, sc);
-err_msi:
-        pci_disable_msi(pdev);
+err_no_irq:
         pci_disable_device(pdev);
         return err;
 }
diff --git a/drivers/net/wireless/ath9k/Kconfig b/drivers/net/wireless/ath9k/Kconfig
new file mode 100644
index 000000000000..9e19dcceb3a2
--- /dev/null
+++ b/drivers/net/wireless/ath9k/Kconfig
@@ -0,0 +1,8 @@
+config ATH9K
+        tristate "Atheros 802.11n wireless cards support"
+        depends on PCI && MAC80211 && WLAN_80211
+        ---help---
+          This module adds support for wireless adapters based on
+          Atheros IEEE 802.11n AR5008 and AR9001 family of chipsets.
+
+          If you choose to build a module, it'll be called ath9k.
diff --git a/drivers/net/wireless/ath9k/Makefile b/drivers/net/wireless/ath9k/Makefile
new file mode 100644
index 000000000000..a6411517e5f8
--- /dev/null
+++ b/drivers/net/wireless/ath9k/Makefile
@@ -0,0 +1,11 @@
+ath9k-y +=      hw.o \
+                phy.o \
+                regd.o \
+                beacon.o \
+                main.o \
+                recv.o \
+                xmit.o \
+                rc.o \
+                core.o
+
+obj-$(CONFIG_ATH9K) += ath9k.o
diff --git a/drivers/net/wireless/ath9k/ath9k.h b/drivers/net/wireless/ath9k/ath9k.h
new file mode 100644
index 000000000000..d1b0fbae5a32
--- /dev/null
+++ b/drivers/net/wireless/ath9k/ath9k.h
@@ -0,0 +1,1021 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef ATH9K_H
+#define ATH9K_H
+
+#include <linux/io.h>
+
+#define ATHEROS_VENDOR_ID       0x168c
+
+#define AR5416_DEVID_PCI        0x0023
+#define AR5416_DEVID_PCIE       0x0024
+#define AR9160_DEVID_PCI        0x0027
+#define AR9280_DEVID_PCI        0x0029
+#define AR9280_DEVID_PCIE       0x002a
+
+#define AR5416_AR9100_DEVID     0x000b
+
+#define AR_SUBVENDOR_ID_NOG     0x0e11
+#define AR_SUBVENDOR_ID_NEW_A   0x7065
+
+#define ATH9K_TXERR_XRETRY         0x01
+#define ATH9K_TXERR_FILT           0x02
+#define ATH9K_TXERR_FIFO           0x04
+#define ATH9K_TXERR_XTXOP          0x08
+#define ATH9K_TXERR_TIMER_EXPIRED  0x10
+
+#define ATH9K_TX_BA                0x01
+#define ATH9K_TX_PWRMGMT           0x02
+#define ATH9K_TX_DESC_CFG_ERR      0x04
+#define ATH9K_TX_DATA_UNDERRUN     0x08
+#define ATH9K_TX_DELIM_UNDERRUN    0x10
+#define ATH9K_TX_SW_ABORTED        0x40
+#define ATH9K_TX_SW_FILTERED       0x80
+
+#define NBBY    8
+
+struct ath_tx_status {
+        u32 ts_tstamp;
+        u16 ts_seqnum;
+        u8 ts_status;
+        u8 ts_ratecode;
+        u8 ts_rateindex;
+        int8_t ts_rssi;
+        u8 ts_shortretry;
+        u8 ts_longretry;
+        u8 ts_virtcol;
+        u8 ts_antenna;
+        u8 ts_flags;
+        int8_t ts_rssi_ctl0;
+        int8_t ts_rssi_ctl1;
+        int8_t ts_rssi_ctl2;
+        int8_t ts_rssi_ext0;
+        int8_t ts_rssi_ext1;
+        int8_t ts_rssi_ext2;
+        u8 pad[3];
+        u32 ba_low;
+        u32 ba_high;
+        u32 evm0;
+        u32 evm1;
+        u32 evm2;
+};
+
+struct ath_rx_status {
+        u32 rs_tstamp;
+        u16 rs_datalen;
+        u8 rs_status;
+        u8 rs_phyerr;
+        int8_t rs_rssi;
+        u8 rs_keyix;
+        u8 rs_rate;
+        u8 rs_antenna;
+        u8 rs_more;
+        int8_t rs_rssi_ctl0;
+        int8_t rs_rssi_ctl1;
+        int8_t rs_rssi_ctl2;
+        int8_t rs_rssi_ext0;
+        int8_t rs_rssi_ext1;
+        int8_t rs_rssi_ext2;
+        u8 rs_isaggr;
+        u8 rs_moreaggr;
+        u8 rs_num_delims;
+        u8 rs_flags;
+        u32 evm0;
+        u32 evm1;
+        u32 evm2;
+};
+
+#define ATH9K_RXERR_CRC           0x01
+#define ATH9K_RXERR_PHY           0x02
+#define ATH9K_RXERR_FIFO          0x04
+#define ATH9K_RXERR_DECRYPT       0x08
+#define ATH9K_RXERR_MIC           0x10
+
+#define ATH9K_RX_MORE             0x01
+#define ATH9K_RX_MORE_AGGR        0x02
+#define ATH9K_RX_GI               0x04
+#define ATH9K_RX_2040             0x08
+#define ATH9K_RX_DELIM_CRC_PRE    0x10
+#define ATH9K_RX_DELIM_CRC_POST   0x20
+#define ATH9K_RX_DECRYPT_BUSY     0x40
+
+#define ATH9K_RXKEYIX_INVALID   ((u8)-1)
+#define ATH9K_TXKEYIX_INVALID   ((u32)-1)
+
+struct ath_desc {
+        u32 ds_link;
+        u32 ds_data;
+        u32 ds_ctl0;
+        u32 ds_ctl1;
+        u32 ds_hw[20];
+        union {
+                struct ath_tx_status tx;
+                struct ath_rx_status rx;
+                void *stats;
+        } ds_us;
+        void *ds_vdata;
+} __packed;
+
+#define ds_txstat       ds_us.tx
+#define ds_rxstat       ds_us.rx
+#define ds_stat         ds_us.stats
+
+#define ATH9K_TXDESC_CLRDMASK           0x0001
+#define ATH9K_TXDESC_NOACK              0x0002
+#define ATH9K_TXDESC_RTSENA             0x0004
+#define ATH9K_TXDESC_CTSENA             0x0008
+#define ATH9K_TXDESC_INTREQ             0x0010
+#define ATH9K_TXDESC_VEOL               0x0020
+#define ATH9K_TXDESC_EXT_ONLY           0x0040
+#define ATH9K_TXDESC_EXT_AND_CTL        0x0080
+#define ATH9K_TXDESC_VMF                0x0100
+#define ATH9K_TXDESC_FRAG_IS_ON         0x0200
+
+#define ATH9K_RXDESC_INTREQ             0x0020
+
+enum wireless_mode {
+        ATH9K_MODE_11A = 0,
+        ATH9K_MODE_11B = 2,
+        ATH9K_MODE_11G = 3,
+        ATH9K_MODE_11NA_HT20 = 6,
+        ATH9K_MODE_11NG_HT20 = 7,
+        ATH9K_MODE_11NA_HT40PLUS = 8,
+        ATH9K_MODE_11NA_HT40MINUS = 9,
+        ATH9K_MODE_11NG_HT40PLUS = 10,
+        ATH9K_MODE_11NG_HT40MINUS = 11,
+        ATH9K_MODE_MAX
+};
+
+enum ath9k_hw_caps {
+        ATH9K_HW_CAP_CHAN_SPREAD                = BIT(0),
+        ATH9K_HW_CAP_MIC_AESCCM                 = BIT(1),
+        ATH9K_HW_CAP_MIC_CKIP                   = BIT(2),
+        ATH9K_HW_CAP_MIC_TKIP                   = BIT(3),
+        ATH9K_HW_CAP_CIPHER_AESCCM              = BIT(4),
+        ATH9K_HW_CAP_CIPHER_CKIP                = BIT(5),
+        ATH9K_HW_CAP_CIPHER_TKIP                = BIT(6),
+        ATH9K_HW_CAP_VEOL                       = BIT(7),
+        ATH9K_HW_CAP_BSSIDMASK                  = BIT(8),
+        ATH9K_HW_CAP_MCAST_KEYSEARCH            = BIT(9),
+        ATH9K_HW_CAP_CHAN_HALFRATE              = BIT(10),
+        ATH9K_HW_CAP_CHAN_QUARTERRATE           = BIT(11),
+        ATH9K_HW_CAP_HT                         = BIT(12),
+        ATH9K_HW_CAP_GTT                        = BIT(13),
+        ATH9K_HW_CAP_FASTCC                     = BIT(14),
+        ATH9K_HW_CAP_RFSILENT                   = BIT(15),
+        ATH9K_HW_CAP_WOW                        = BIT(16),
+        ATH9K_HW_CAP_CST                        = BIT(17),
+        ATH9K_HW_CAP_ENHANCEDPM                 = BIT(18),
+        ATH9K_HW_CAP_AUTOSLEEP                  = BIT(19),
+        ATH9K_HW_CAP_4KB_SPLITTRANS             = BIT(20),
+        ATH9K_HW_CAP_WOW_MATCHPATTERN_EXACT     = BIT(21),
+};
+
+enum ath9k_capability_type {
+        ATH9K_CAP_CIPHER = 0,
+        ATH9K_CAP_TKIP_MIC,
+        ATH9K_CAP_TKIP_SPLIT,
+        ATH9K_CAP_PHYCOUNTERS,
+        ATH9K_CAP_DIVERSITY,
+        ATH9K_CAP_TXPOW,
+        ATH9K_CAP_PHYDIAG,
+        ATH9K_CAP_MCAST_KEYSRCH,
+        ATH9K_CAP_TSF_ADJUST,
+        ATH9K_CAP_WME_TKIPMIC,
+        ATH9K_CAP_RFSILENT,
+        ATH9K_CAP_ANT_CFG_2GHZ,
+        ATH9K_CAP_ANT_CFG_5GHZ
+};
+
+struct ath9k_hw_capabilities {
+        u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */
+        DECLARE_BITMAP(wireless_modes, ATH9K_MODE_MAX); /* ATH9K_MODE_* */
+        u16 total_queues;
+        u16 keycache_size;
+        u16 low_5ghz_chan, high_5ghz_chan;
+        u16 low_2ghz_chan, high_2ghz_chan;
+        u16 num_mr_retries;
+        u16 rts_aggr_limit;
+        u8 tx_chainmask;
+        u8 rx_chainmask;
+        u16 tx_triglevel_max;
+        u16 reg_cap;
+        u8 num_gpio_pins;
+        u8 num_antcfg_2ghz;
+        u8 num_antcfg_5ghz;
+};
+
+struct ath9k_ops_config {
+        int dma_beacon_response_time;
+        int sw_beacon_response_time;
+        int additional_swba_backoff;
+        int ack_6mb;
+        int cwm_ignore_extcca;
+        u8 pcie_powersave_enable;
+        u8 pcie_l1skp_enable;
+        u8 pcie_clock_req;
+        u32 pcie_waen;
+        int pcie_power_reset;
+        u8 pcie_restore;
+        u8 analog_shiftreg;
+        u8 ht_enable;
+        u32 ofdm_trig_low;
+        u32 ofdm_trig_high;
+        u32 cck_trig_high;
+        u32 cck_trig_low;
+        u32 enable_ani;
+        u8 noise_immunity_level;
+        u32 ofdm_weaksignal_det;
+        u32 cck_weaksignal_thr;
+        u8 spur_immunity_level;
+        u8 firstep_level;
+        int8_t rssi_thr_high;
+        int8_t rssi_thr_low;
+        u16 diversity_control;
+        u16 antenna_switch_swap;
+        int serialize_regmode;
+        int intr_mitigation;
+#define SPUR_DISABLE            0
+#define SPUR_ENABLE_IOCTL       1
+#define SPUR_ENABLE_EEPROM      2
+#define AR_EEPROM_MODAL_SPURS   5
+#define AR_SPUR_5413_1          1640
+#define AR_SPUR_5413_2          1200
+#define AR_NO_SPUR              0x8000
+#define AR_BASE_FREQ_2GHZ       2300
+#define AR_BASE_FREQ_5GHZ       4900
+#define AR_SPUR_FEEQ_BOUND_HT40 19
+#define AR_SPUR_FEEQ_BOUND_HT20 10
+        int spurmode;
+        u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
+};
+
+enum ath9k_tx_queue {
+        ATH9K_TX_QUEUE_INACTIVE = 0,
+        ATH9K_TX_QUEUE_DATA,
+        ATH9K_TX_QUEUE_BEACON,
+        ATH9K_TX_QUEUE_CAB,
+        ATH9K_TX_QUEUE_UAPSD,
+        ATH9K_TX_QUEUE_PSPOLL
+};
+
+#define ATH9K_NUM_TX_QUEUES 10
+
+enum ath9k_tx_queue_subtype {
+        ATH9K_WME_AC_BK = 0,
+        ATH9K_WME_AC_BE,
+        ATH9K_WME_AC_VI,
+        ATH9K_WME_AC_VO,
+        ATH9K_WME_UPSD
+};
+
+enum ath9k_tx_queue_flags {
+        TXQ_FLAG_TXOKINT_ENABLE = 0x0001,
+        TXQ_FLAG_TXERRINT_ENABLE = 0x0001,
+        TXQ_FLAG_TXDESCINT_ENABLE = 0x0002,
+        TXQ_FLAG_TXEOLINT_ENABLE = 0x0004,
+        TXQ_FLAG_TXURNINT_ENABLE = 0x0008,
+        TXQ_FLAG_BACKOFF_DISABLE = 0x0010,
+        TXQ_FLAG_COMPRESSION_ENABLE = 0x0020,
+        TXQ_FLAG_RDYTIME_EXP_POLICY_ENABLE = 0x0040,
+        TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE = 0x0080,
+};
+
+#define ATH9K_TXQ_USEDEFAULT ((u32) -1)
+
+#define ATH9K_DECOMP_MASK_SIZE     128
+#define ATH9K_READY_TIME_LO_BOUND  50
+#define ATH9K_READY_TIME_HI_BOUND  96
+
+enum ath9k_pkt_type {
+        ATH9K_PKT_TYPE_NORMAL = 0,
+        ATH9K_PKT_TYPE_ATIM,
+        ATH9K_PKT_TYPE_PSPOLL,
+        ATH9K_PKT_TYPE_BEACON,
+        ATH9K_PKT_TYPE_PROBE_RESP,
+        ATH9K_PKT_TYPE_CHIRP,
+        ATH9K_PKT_TYPE_GRP_POLL,
+};
+
+struct ath9k_tx_queue_info {
+        u32 tqi_ver;
+        enum ath9k_tx_queue tqi_type;
+        enum ath9k_tx_queue_subtype tqi_subtype;
+        enum ath9k_tx_queue_flags tqi_qflags;
+        u32 tqi_priority;
+        u32 tqi_aifs;
+        u32 tqi_cwmin;
+        u32 tqi_cwmax;
+        u16 tqi_shretry;
+        u16 tqi_lgretry;
+        u32 tqi_cbrPeriod;
+        u32 tqi_cbrOverflowLimit;
+        u32 tqi_burstTime;
+        u32 tqi_readyTime;
+        u32 tqi_physCompBuf;
+        u32 tqi_intFlags;
+};
+
+enum ath9k_rx_filter {
+        ATH9K_RX_FILTER_UCAST = 0x00000001,
+        ATH9K_RX_FILTER_MCAST = 0x00000002,
+        ATH9K_RX_FILTER_BCAST = 0x00000004,
+        ATH9K_RX_FILTER_CONTROL = 0x00000008,
+        ATH9K_RX_FILTER_BEACON = 0x00000010,
+        ATH9K_RX_FILTER_PROM = 0x00000020,
+        ATH9K_RX_FILTER_PROBEREQ = 0x00000080,
+        ATH9K_RX_FILTER_PSPOLL = 0x00004000,
+        ATH9K_RX_FILTER_PHYERR = 0x00000100,
+        ATH9K_RX_FILTER_PHYRADAR = 0x00002000,
+};
+
+enum ath9k_int {
+        ATH9K_INT_RX = 0x00000001,
+        ATH9K_INT_RXDESC = 0x00000002,
+        ATH9K_INT_RXNOFRM = 0x00000008,
+        ATH9K_INT_RXEOL = 0x00000010,
+        ATH9K_INT_RXORN = 0x00000020,
+        ATH9K_INT_TX = 0x00000040,
+        ATH9K_INT_TXDESC = 0x00000080,
+        ATH9K_INT_TIM_TIMER = 0x00000100,
+        ATH9K_INT_TXURN = 0x00000800,
+        ATH9K_INT_MIB = 0x00001000,
+        ATH9K_INT_RXPHY = 0x00004000,
+        ATH9K_INT_RXKCM = 0x00008000,
+        ATH9K_INT_SWBA = 0x00010000,
+        ATH9K_INT_BMISS = 0x00040000,
+        ATH9K_INT_BNR = 0x00100000,
+        ATH9K_INT_TIM = 0x00200000,
+        ATH9K_INT_DTIM = 0x00400000,
+        ATH9K_INT_DTIMSYNC = 0x00800000,
+        ATH9K_INT_GPIO = 0x01000000,
+        ATH9K_INT_CABEND = 0x02000000,
+        ATH9K_INT_CST = 0x10000000,
+        ATH9K_INT_GTT = 0x20000000,
+        ATH9K_INT_FATAL = 0x40000000,
+        ATH9K_INT_GLOBAL = 0x80000000,
+        ATH9K_INT_BMISC = ATH9K_INT_TIM |
+                ATH9K_INT_DTIM |
+                ATH9K_INT_DTIMSYNC |
+                ATH9K_INT_CABEND,
+        ATH9K_INT_COMMON = ATH9K_INT_RXNOFRM |
+                ATH9K_INT_RXDESC |
+                ATH9K_INT_RXEOL |
+                ATH9K_INT_RXORN |
+                ATH9K_INT_TXURN |
+                ATH9K_INT_TXDESC |
+                ATH9K_INT_MIB |
+                ATH9K_INT_RXPHY |
+                ATH9K_INT_RXKCM |
+                ATH9K_INT_SWBA |
+                ATH9K_INT_BMISS |
+                ATH9K_INT_GPIO,
+        ATH9K_INT_NOCARD = 0xffffffff
+};
+
+struct ath9k_rate_table {
+        int rateCount;
+        u8 rateCodeToIndex[256];
+        struct {
+                u8 valid;
+                u8 phy;
+                u32 rateKbps;
+                u8 rateCode;
+                u8 shortPreamble;
+                u8 dot11Rate;
+                u8 controlRate;
+                u16 lpAckDuration;
+                u16 spAckDuration;
+        } info[32];
+};
+
+#define ATH9K_RATESERIES_RTS_CTS  0x0001
+#define ATH9K_RATESERIES_2040     0x0002
+#define ATH9K_RATESERIES_HALFGI   0x0004
+
+struct ath9k_11n_rate_series {
+        u32 Tries;
+        u32 Rate;
+        u32 PktDuration;
+        u32 ChSel;
+        u32 RateFlags;
+};
+
+#define CHANNEL_CW_INT    0x00002
+#define CHANNEL_CCK       0x00020
+#define CHANNEL_OFDM      0x00040
+#define CHANNEL_2GHZ      0x00080
+#define CHANNEL_5GHZ      0x00100
+#define CHANNEL_PASSIVE   0x00200
+#define CHANNEL_DYN       0x00400
+#define CHANNEL_HALF      0x04000
+#define CHANNEL_QUARTER   0x08000
+#define CHANNEL_HT20      0x10000
+#define CHANNEL_HT40PLUS  0x20000
+#define CHANNEL_HT40MINUS 0x40000
+
+#define CHANNEL_INTERFERENCE    0x01
+#define CHANNEL_DFS             0x02
+#define CHANNEL_4MS_LIMIT       0x04
+#define CHANNEL_DFS_CLEAR       0x08
+#define CHANNEL_DISALLOW_ADHOC  0x10
+#define CHANNEL_PER_11D_ADHOC   0x20
+
+#define CHANNEL_A           (CHANNEL_5GHZ|CHANNEL_OFDM)
+#define CHANNEL_B           (CHANNEL_2GHZ|CHANNEL_CCK)
+#define CHANNEL_G           (CHANNEL_2GHZ|CHANNEL_OFDM)
+#define CHANNEL_G_HT20      (CHANNEL_2GHZ|CHANNEL_HT20)
+#define CHANNEL_A_HT20      (CHANNEL_5GHZ|CHANNEL_HT20)
+#define CHANNEL_G_HT40PLUS  (CHANNEL_2GHZ|CHANNEL_HT40PLUS)
+#define CHANNEL_G_HT40MINUS (CHANNEL_2GHZ|CHANNEL_HT40MINUS)
+#define CHANNEL_A_HT40PLUS  (CHANNEL_5GHZ|CHANNEL_HT40PLUS)
+#define CHANNEL_A_HT40MINUS (CHANNEL_5GHZ|CHANNEL_HT40MINUS)
+#define CHANNEL_ALL                             \
+        (CHANNEL_OFDM|                          \
+         CHANNEL_CCK|                           \
+         CHANNEL_2GHZ |                         \
+         CHANNEL_5GHZ |                         \
+         CHANNEL_HT20 |                         \
+         CHANNEL_HT40PLUS |                     \
+         CHANNEL_HT40MINUS)
+
+struct ath9k_channel {
+        u16 channel;
+        u32 channelFlags;
+        u8 privFlags;
+        int8_t maxRegTxPower;
+        int8_t maxTxPower;
+        int8_t minTxPower;
+        u32 chanmode;
+        int32_t CalValid;
+        bool oneTimeCalsDone;
+        int8_t iCoff;
+        int8_t qCoff;
+        int16_t rawNoiseFloor;
+        int8_t antennaMax;
+        u32 regDmnFlags;
+        u32 conformanceTestLimit[3]; /* 0:11a, 1: 11b, 2:11g */
+#ifdef ATH_NF_PER_CHAN
+        struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
+#endif
+};
+
+#define IS_CHAN_A(_c) ((((_c)->channelFlags & CHANNEL_A) == CHANNEL_A) || \
+       (((_c)->channelFlags & CHANNEL_A_HT20) == CHANNEL_A_HT20) || \
+       (((_c)->channelFlags & CHANNEL_A_HT40PLUS) == CHANNEL_A_HT40PLUS) || \
+       (((_c)->channelFlags & CHANNEL_A_HT40MINUS) == CHANNEL_A_HT40MINUS))
+#define IS_CHAN_B(_c) (((_c)->channelFlags & CHANNEL_B) == CHANNEL_B)
+#define IS_CHAN_G(_c) ((((_c)->channelFlags & (CHANNEL_G)) == CHANNEL_G) || \
+       (((_c)->channelFlags & CHANNEL_G_HT20) == CHANNEL_G_HT20) || \
+       (((_c)->channelFlags & CHANNEL_G_HT40PLUS) == CHANNEL_G_HT40PLUS) || \
+       (((_c)->channelFlags & CHANNEL_G_HT40MINUS) == CHANNEL_G_HT40MINUS))
+#define IS_CHAN_CCK(_c) (((_c)->channelFlags & CHANNEL_CCK) != 0)
+#define IS_CHAN_OFDM(_c) (((_c)->channelFlags & CHANNEL_OFDM) != 0)
+#define IS_CHAN_5GHZ(_c) (((_c)->channelFlags & CHANNEL_5GHZ) != 0)
+#define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0)
+#define IS_CHAN_PASSIVE(_c) (((_c)->channelFlags & CHANNEL_PASSIVE) != 0)
+#define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0)
+#define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0)
+
+/* These macros check chanmode and not channelFlags */
+#define IS_CHAN_HT20(_c) (((_c)->chanmode == CHANNEL_A_HT20) || \
+                          ((_c)->chanmode == CHANNEL_G_HT20))
+#define IS_CHAN_HT40(_c) (((_c)->chanmode == CHANNEL_A_HT40PLUS) ||     \
+                          ((_c)->chanmode == CHANNEL_A_HT40MINUS) ||    \
+                          ((_c)->chanmode == CHANNEL_G_HT40PLUS) ||     \
+                          ((_c)->chanmode == CHANNEL_G_HT40MINUS))
+#define IS_CHAN_HT(_c) (IS_CHAN_HT20((_c)) || IS_CHAN_HT40((_c)))
+
+#define IS_CHAN_IN_PUBLIC_SAFETY_BAND(_c) ((_c) > 4940 && (_c) < 4990)
+#define IS_CHAN_A_5MHZ_SPACED(_c)                       \
+        ((((_c)->channelFlags & CHANNEL_5GHZ) != 0) &&  \
+         (((_c)->channel % 20) != 0) &&                 \
+         (((_c)->channel % 10) != 0))
+
+struct ath9k_keyval {
+        u8 kv_type;
+        u8 kv_pad;
+        u16 kv_len;
+        u8 kv_val[16];
+        u8 kv_mic[8];
+        u8 kv_txmic[8];
+};
+
+enum ath9k_key_type {
+        ATH9K_KEY_TYPE_CLEAR,
+        ATH9K_KEY_TYPE_WEP,
+        ATH9K_KEY_TYPE_AES,
+        ATH9K_KEY_TYPE_TKIP,
+};
+
+enum ath9k_cipher {
+        ATH9K_CIPHER_WEP = 0,
+        ATH9K_CIPHER_AES_OCB = 1,
+        ATH9K_CIPHER_AES_CCM = 2,
+        ATH9K_CIPHER_CKIP = 3,
+        ATH9K_CIPHER_TKIP = 4,
+        ATH9K_CIPHER_CLR = 5,
+        ATH9K_CIPHER_MIC = 127
+};
+
+#define AR_EEPROM_EEPCAP_COMPRESS_DIS   0x0001
+#define AR_EEPROM_EEPCAP_AES_DIS        0x0002
+#define AR_EEPROM_EEPCAP_FASTFRAME_DIS  0x0004
+#define AR_EEPROM_EEPCAP_BURST_DIS      0x0008
+#define AR_EEPROM_EEPCAP_MAXQCU         0x01F0
+#define AR_EEPROM_EEPCAP_MAXQCU_S       4
+#define AR_EEPROM_EEPCAP_HEAVY_CLIP_EN  0x0200
+#define AR_EEPROM_EEPCAP_KC_ENTRIES     0xF000
+#define AR_EEPROM_EEPCAP_KC_ENTRIES_S   12
+
+#define AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND   0x0040
+#define AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN    0x0080
+#define AR_EEPROM_EEREGCAP_EN_KK_U2         0x0100
+#define AR_EEPROM_EEREGCAP_EN_KK_MIDBAND    0x0200
+#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD     0x0400
+#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A    0x0800
+
+#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0  0x4000
+#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0 0x8000
+
+#define SD_NO_CTL               0xE0
+#define NO_CTL                  0xff
+#define CTL_MODE_M              7
+#define CTL_11A                 0
+#define CTL_11B                 1
+#define CTL_11G                 2
+#define CTL_2GHT20              5
+#define CTL_5GHT20              6
+#define CTL_2GHT40              7
+#define CTL_5GHT40              8
+
+#define AR_EEPROM_MAC(i)        (0x1d+(i))
+#define EEP_SCALE       100
+#define EEP_DELTA       10
+
+#define AR_EEPROM_RFSILENT_GPIO_SEL     0x001c
+#define AR_EEPROM_RFSILENT_GPIO_SEL_S   2
+#define AR_EEPROM_RFSILENT_POLARITY     0x0002
+#define AR_EEPROM_RFSILENT_POLARITY_S   1
+
+#define CTRY_DEBUG 0x1ff
+#define CTRY_DEFAULT 0
+
+enum reg_ext_bitmap {
+        REG_EXT_JAPAN_MIDBAND = 1,
+        REG_EXT_FCC_DFS_HT40 = 2,
+        REG_EXT_JAPAN_NONDFS_HT40 = 3,
+        REG_EXT_JAPAN_DFS_HT40 = 4
+};
+
+struct ath9k_country_entry {
+        u16 countryCode;
+        u16 regDmnEnum;
+        u16 regDmn5G;
+        u16 regDmn2G;
+        u8 isMultidomain;
+        u8 iso[3];
+};
+
+#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg)
+#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg)
+
+#define SM(_v, _f)  (((_v) << _f##_S) & _f)
+#define MS(_v, _f)  (((_v) & _f) >> _f##_S)
+#define REG_RMW(_a, _r, _set, _clr)    \
+        REG_WRITE(_a, _r, (REG_READ(_a, _r) & ~(_clr)) | (_set))
+#define REG_RMW_FIELD(_a, _r, _f, _v) \
+        REG_WRITE(_a, _r, \
+        (REG_READ(_a, _r) & ~_f) | (((_v) << _f##_S) & _f))
+#define REG_SET_BIT(_a, _r, _f) \
+        REG_WRITE(_a, _r, REG_READ(_a, _r) | _f)
+#define REG_CLR_BIT(_a, _r, _f) \
+        REG_WRITE(_a, _r, REG_READ(_a, _r) & ~_f)
+
+#define ATH9K_COMP_BUF_MAX_SIZE   9216
+#define ATH9K_COMP_BUF_ALIGN_SIZE 512
+
+#define ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS   0x00000001
+
+#define INIT_AIFS       2
+#define INIT_CWMIN      15
+#define INIT_CWMIN_11B  31
+#define INIT_CWMAX      1023
+#define INIT_SH_RETRY   10
+#define INIT_LG_RETRY   10
+#define INIT_SSH_RETRY  32
+#define INIT_SLG_RETRY  32
+
+#define WLAN_CTRL_FRAME_SIZE (2+2+6+4)
+
+#define ATH_AMPDU_LIMIT_MAX      (64 * 1024 - 1)
+#define ATH_AMPDU_LIMIT_DEFAULT  ATH_AMPDU_LIMIT_MAX
+
+#define IEEE80211_WEP_IVLEN      3
+#define IEEE80211_WEP_KIDLEN     1
+#define IEEE80211_WEP_CRCLEN     4
+#define IEEE80211_MAX_MPDU_LEN  (3840 + FCS_LEN +               \
+                                 (IEEE80211_WEP_IVLEN +         \
+                                  IEEE80211_WEP_KIDLEN +        \
+                                  IEEE80211_WEP_CRCLEN))
+#define IEEE80211_MAX_LEN       (2300 + FCS_LEN +               \
+                                 (IEEE80211_WEP_IVLEN +         \
+                                  IEEE80211_WEP_KIDLEN +        \
+                                  IEEE80211_WEP_CRCLEN))
+
+#define MAX_REG_ADD_COUNT   129
+#define MAX_RATE_POWER 63
+
+enum ath9k_power_mode {
+        ATH9K_PM_AWAKE = 0,
+        ATH9K_PM_FULL_SLEEP,
+        ATH9K_PM_NETWORK_SLEEP,
+        ATH9K_PM_UNDEFINED
+};
+
+struct ath9k_mib_stats {
+        u32 ackrcv_bad;
+        u32 rts_bad;
+        u32 rts_good;
+        u32 fcs_bad;
+        u32 beacons;
+};
+
+enum ath9k_ant_setting {
+        ATH9K_ANT_VARIABLE = 0,
+        ATH9K_ANT_FIXED_A,
+        ATH9K_ANT_FIXED_B
+};
+
+enum ath9k_opmode {
+        ATH9K_M_STA = 1,
+        ATH9K_M_IBSS = 0,
+        ATH9K_M_HOSTAP = 6,
+        ATH9K_M_MONITOR = 8
+};
+
+#define ATH9K_SLOT_TIME_6 6
+#define ATH9K_SLOT_TIME_9 9
+#define ATH9K_SLOT_TIME_20 20
+
+enum ath9k_ht_macmode {
+        ATH9K_HT_MACMODE_20 = 0,
+        ATH9K_HT_MACMODE_2040 = 1,
+};
+
+enum ath9k_ht_extprotspacing {
+        ATH9K_HT_EXTPROTSPACING_20 = 0,
+        ATH9K_HT_EXTPROTSPACING_25 = 1,
+};
+
+struct ath9k_ht_cwm {
+        enum ath9k_ht_macmode ht_macmode;
+        enum ath9k_ht_extprotspacing ht_extprotspacing;
+};
+
+enum ath9k_ani_cmd {
+        ATH9K_ANI_PRESENT = 0x1,
+        ATH9K_ANI_NOISE_IMMUNITY_LEVEL = 0x2,
+        ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x4,
+        ATH9K_ANI_CCK_WEAK_SIGNAL_THR = 0x8,
+        ATH9K_ANI_FIRSTEP_LEVEL = 0x10,
+        ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x20,
+        ATH9K_ANI_MODE = 0x40,
+        ATH9K_ANI_PHYERR_RESET = 0x80,
+        ATH9K_ANI_ALL = 0xff
+};
+
+enum phytype {
+        PHY_DS,
+        PHY_FH,
+        PHY_OFDM,
+        PHY_HT,
+};
+#define PHY_CCK PHY_DS
+
+enum start_adhoc_option {
+        START_ADHOC_NO_11A,
+        START_ADHOC_PER_11D,
+        START_ADHOC_IN_11A,
+        START_ADHOC_IN_11B,
+};
+
+enum ath9k_tp_scale {
+        ATH9K_TP_SCALE_MAX = 0,
+        ATH9K_TP_SCALE_50,
+        ATH9K_TP_SCALE_25,
+        ATH9K_TP_SCALE_12,
+        ATH9K_TP_SCALE_MIN
+};
+
+enum ser_reg_mode {
+        SER_REG_MODE_OFF = 0,
+        SER_REG_MODE_ON = 1,
+        SER_REG_MODE_AUTO = 2,
+};
+
+#define AR_PHY_CCA_MAX_GOOD_VALUE               -85
+#define AR_PHY_CCA_MAX_HIGH_VALUE               -62
+#define AR_PHY_CCA_MIN_BAD_VALUE                -121
+#define AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT     3
+#define AR_PHY_CCA_FILTERWINDOW_LENGTH          5
+
+#define ATH9K_NF_CAL_HIST_MAX           5
+#define NUM_NF_READINGS                 6
+
+struct ath9k_nfcal_hist {
+        int16_t nfCalBuffer[ATH9K_NF_CAL_HIST_MAX];
+        u8 currIndex;
+        int16_t privNF;
+        u8 invalidNFcount;
+};
+
+struct ath9k_beacon_state {
+        u32 bs_nexttbtt;
+        u32 bs_nextdtim;
+        u32 bs_intval;
+#define ATH9K_BEACON_PERIOD       0x0000ffff
+#define ATH9K_BEACON_ENA          0x00800000
+#define ATH9K_BEACON_RESET_TSF    0x01000000
+        u32 bs_dtimperiod;
+        u16 bs_cfpperiod;
+        u16 bs_cfpmaxduration;
+        u32 bs_cfpnext;
+        u16 bs_timoffset;
+        u16 bs_bmissthreshold;
+        u32 bs_sleepduration;
+};
+
+struct ath9k_node_stats {
+        u32 ns_avgbrssi;
+        u32 ns_avgrssi;
+        u32 ns_avgtxrssi;
+        u32 ns_avgtxrate;
+};
+
+#define ATH9K_RSSI_EP_MULTIPLIER  (1<<7)
+
+enum ath9k_gpio_output_mux_type {
+        ATH9K_GPIO_OUTPUT_MUX_AS_OUTPUT,
+        ATH9K_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED,
+        ATH9K_GPIO_OUTPUT_MUX_AS_PCIE_POWER_LED,
+        ATH9K_GPIO_OUTPUT_MUX_AS_MAC_NETWORK_LED,
+        ATH9K_GPIO_OUTPUT_MUX_AS_MAC_POWER_LED,
+        ATH9K_GPIO_OUTPUT_MUX_NUM_ENTRIES
+};
+
+enum {
+        ATH9K_RESET_POWER_ON,
+        ATH9K_RESET_WARM,
+        ATH9K_RESET_COLD,
+};
+
+#define AH_USE_EEPROM   0x1
+
+struct ath_hal {
+        u32 ah_magic;
+        u16 ah_devid;
+        u16 ah_subvendorid;
+        struct ath_softc *ah_sc;
+        void __iomem *ah_sh;
+        u16 ah_countryCode;
+        u32 ah_macVersion;
+        u16 ah_macRev;
+        u16 ah_phyRev;
+        u16 ah_analog5GhzRev;
+        u16 ah_analog2GhzRev;
+        u8 ah_decompMask[ATH9K_DECOMP_MASK_SIZE];
+        u32 ah_flags;
+        enum ath9k_opmode ah_opmode;
+        struct ath9k_ops_config ah_config;
+        struct ath9k_hw_capabilities ah_caps;
+        int16_t ah_powerLimit;
+        u16 ah_maxPowerLevel;
+        u32 ah_tpScale;
+        u16 ah_currentRD;
+        u16 ah_currentRDExt;
+        u16 ah_currentRDInUse;
+        u16 ah_currentRD5G;
+        u16 ah_currentRD2G;
+        char ah_iso[4];
+        enum start_adhoc_option ah_adHocMode;
+        bool ah_commonMode;
+        struct ath9k_channel ah_channels[150];
+        u32 ah_nchan;
+        struct ath9k_channel *ah_curchan;
+        u16 ah_rfsilent;
+        bool ah_rfkillEnabled;
+        bool ah_isPciExpress;
+        u16 ah_txTrigLevel;
+#ifndef ATH_NF_PER_CHAN
+        struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
+#endif
+};
+
+struct chan_centers {
+        u16 synth_center;
+        u16 ctl_center;
+        u16 ext_center;
+};
+
+int ath_hal_getcapability(struct ath_hal *ah,
+                          enum ath9k_capability_type type,
+                          u32 capability,
+                          u32 *result);
+const struct ath9k_rate_table *ath9k_hw_getratetable(struct ath_hal *ah,
+                                                     u32 mode);
+void ath9k_hw_detach(struct ath_hal *ah);
+struct ath_hal *ath9k_hw_attach(u16 devid,
+                                struct ath_softc *sc,
+                                void __iomem *mem,
+                                int *error);
+bool ath9k_regd_init_channels(struct ath_hal *ah,
+                              u32 maxchans, u32 *nchans,
+                              u8 *regclassids,
+                              u32 maxregids, u32 *nregids,
+                              u16 cc,
+                              bool enableOutdoor,
+                              bool enableExtendedChannels);
+u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags);
+enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah,
+                                     enum ath9k_int ints);
+bool ath9k_hw_reset(struct ath_hal *ah, enum ath9k_opmode opmode,
+                    struct ath9k_channel *chan,
+                    enum ath9k_ht_macmode macmode,
+                    u8 txchainmask, u8 rxchainmask,
+                    enum ath9k_ht_extprotspacing extprotspacing,
+                    bool bChannelChange,
+                    int *status);
+bool ath9k_hw_phy_disable(struct ath_hal *ah);
+void ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan,
+                             bool *isCalDone);
+void ath9k_hw_ani_monitor(struct ath_hal *ah,
+                          const struct ath9k_node_stats *stats,
+                          struct ath9k_channel *chan);
+bool ath9k_hw_calibrate(struct ath_hal *ah,
+                        struct ath9k_channel *chan,
+                        u8 rxchainmask,
+                        bool longcal,
+                        bool *isCalDone);
+int16_t ath9k_hw_getchan_noise(struct ath_hal *ah,
+                               struct ath9k_channel *chan);
+void ath9k_hw_write_associd(struct ath_hal *ah, const u8 *bssid,
+                            u16 assocId);
+void ath9k_hw_setrxfilter(struct ath_hal *ah, u32 bits);
+void ath9k_hw_write_associd(struct ath_hal *ah, const u8 *bssid,
+                            u16 assocId);
+bool ath9k_hw_stoptxdma(struct ath_hal *ah, u32 q);
+void ath9k_hw_reset_tsf(struct ath_hal *ah);
+bool ath9k_hw_keyisvalid(struct ath_hal *ah, u16 entry);
+bool ath9k_hw_keysetmac(struct ath_hal *ah, u16 entry,
+                        const u8 *mac);
+bool ath9k_hw_set_keycache_entry(struct ath_hal *ah,
+                                 u16 entry,
+                                 const struct ath9k_keyval *k,
+                                 const u8 *mac,
+                                 int xorKey);
+bool ath9k_hw_set_tsfadjust(struct ath_hal *ah,
+                            u32 setting);
+void ath9k_hw_configpcipowersave(struct ath_hal *ah, int restore);
+bool ath9k_hw_intrpend(struct ath_hal *ah);
+bool ath9k_hw_getisr(struct ath_hal *ah, enum ath9k_int *masked);
+bool ath9k_hw_updatetxtriglevel(struct ath_hal *ah,
+                                bool bIncTrigLevel);
+void ath9k_hw_procmibevent(struct ath_hal *ah,
+                           const struct ath9k_node_stats *stats);
+bool ath9k_hw_setrxabort(struct ath_hal *ah, bool set);
+void ath9k_hw_set11nmac2040(struct ath_hal *ah, enum ath9k_ht_macmode mode);
+bool ath9k_hw_phycounters(struct ath_hal *ah);
+bool ath9k_hw_keyreset(struct ath_hal *ah, u16 entry);
+bool ath9k_hw_getcapability(struct ath_hal *ah,
+                            enum ath9k_capability_type type,
+                            u32 capability,
+                            u32 *result);
+bool ath9k_hw_setcapability(struct ath_hal *ah,
+                            enum ath9k_capability_type type,
+                            u32 capability,
+                            u32 setting,
+                            int *status);
+u32 ath9k_hw_getdefantenna(struct ath_hal *ah);
+void ath9k_hw_getmac(struct ath_hal *ah, u8 *mac);
+void ath9k_hw_getbssidmask(struct ath_hal *ah, u8 *mask);
+bool ath9k_hw_setbssidmask(struct ath_hal *ah,
+                           const u8 *mask);
+bool ath9k_hw_setpower(struct ath_hal *ah,
+                       enum ath9k_power_mode mode);
+enum ath9k_int ath9k_hw_intrget(struct ath_hal *ah);
+u64 ath9k_hw_gettsf64(struct ath_hal *ah);
+u32 ath9k_hw_getdefantenna(struct ath_hal *ah);
+bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us);
+bool ath9k_hw_setantennaswitch(struct ath_hal *ah,
+                               enum ath9k_ant_setting settings,
+                               struct ath9k_channel *chan,
+                               u8 *tx_chainmask,
+                               u8 *rx_chainmask,
+                               u8 *antenna_cfgd);
+void ath9k_hw_setantenna(struct ath_hal *ah, u32 antenna);
+int ath9k_hw_select_antconfig(struct ath_hal *ah,
+                              u32 cfg);
+bool ath9k_hw_puttxbuf(struct ath_hal *ah, u32 q,
+                       u32 txdp);
+bool ath9k_hw_txstart(struct ath_hal *ah, u32 q);
+u16 ath9k_hw_computetxtime(struct ath_hal *ah,
+                                 const struct ath9k_rate_table *rates,
+                                 u32 frameLen, u16 rateix,
+                                 bool shortPreamble);
+void ath9k_hw_set11n_ratescenario(struct ath_hal *ah, struct ath_desc *ds,
+                                  struct ath_desc *lastds,
+                                  u32 durUpdateEn, u32 rtsctsRate,
+                                  u32 rtsctsDuration,
+                                  struct ath9k_11n_rate_series series[],
+                                  u32 nseries, u32 flags);
+void ath9k_hw_set11n_burstduration(struct ath_hal *ah,
+                                   struct ath_desc *ds,
+                                   u32 burstDuration);
+void ath9k_hw_cleartxdesc(struct ath_hal *ah, struct ath_desc *ds);
+u32 ath9k_hw_reverse_bits(u32 val, u32 n);
+bool ath9k_hw_resettxqueue(struct ath_hal *ah, u32 q);
+u32 ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan);
+u32 ath9k_regd_get_antenna_allowed(struct ath_hal *ah,
+                                     struct ath9k_channel *chan);
+u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags);
+bool ath9k_hw_get_txq_props(struct ath_hal *ah, int q,
+                            struct ath9k_tx_queue_info *qinfo);
+bool ath9k_hw_set_txq_props(struct ath_hal *ah, int q,
+                            const struct ath9k_tx_queue_info *qinfo);
+struct ath9k_channel *ath9k_regd_check_channel(struct ath_hal *ah,
+                                              const struct ath9k_channel *c);
+void ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds,
+                            u32 pktLen, enum ath9k_pkt_type type,
+                            u32 txPower, u32 keyIx,
+                            enum ath9k_key_type keyType, u32 flags);
+bool ath9k_hw_filltxdesc(struct ath_hal *ah, struct ath_desc *ds,
+                         u32 segLen, bool firstSeg,
+                         bool lastSeg,
+                         const struct ath_desc *ds0);
+u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hal *ah,
+                                        u32 *rxc_pcnt,
+                                        u32 *rxf_pcnt,
+                                        u32 *txf_pcnt);
+void ath9k_hw_dmaRegDump(struct ath_hal *ah);
+void ath9k_hw_beaconinit(struct ath_hal *ah,
+                         u32 next_beacon, u32 beacon_period);
+void ath9k_hw_set_sta_beacon_timers(struct ath_hal *ah,
+                                    const struct ath9k_beacon_state *bs);
+bool ath9k_hw_setuprxdesc(struct ath_hal *ah, struct ath_desc *ds,
+                          u32 size, u32 flags);
+void ath9k_hw_putrxbuf(struct ath_hal *ah, u32 rxdp);
+void ath9k_hw_rxena(struct ath_hal *ah);
+void ath9k_hw_setopmode(struct ath_hal *ah);
+bool ath9k_hw_setmac(struct ath_hal *ah, const u8 *mac);
+void ath9k_hw_setmcastfilter(struct ath_hal *ah, u32 filter0,
+                             u32 filter1);
+u32 ath9k_hw_getrxfilter(struct ath_hal *ah);
+void ath9k_hw_startpcureceive(struct ath_hal *ah);
+void ath9k_hw_stoppcurecv(struct ath_hal *ah);
+bool ath9k_hw_stopdmarecv(struct ath_hal *ah);
+int ath9k_hw_rxprocdesc(struct ath_hal *ah,
+                        struct ath_desc *ds, u32 pa,
+                        struct ath_desc *nds, u64 tsf);
+u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q);
+int ath9k_hw_txprocdesc(struct ath_hal *ah,
+                        struct ath_desc *ds);
+void ath9k_hw_set11n_aggr_middle(struct ath_hal *ah, struct ath_desc *ds,
+                                 u32 numDelims);
+void ath9k_hw_set11n_aggr_first(struct ath_hal *ah, struct ath_desc *ds,
+                                u32 aggrLen);
+void ath9k_hw_set11n_aggr_last(struct ath_hal *ah, struct ath_desc *ds);
+bool ath9k_hw_releasetxqueue(struct ath_hal *ah, u32 q);
+void ath9k_hw_gettxintrtxqs(struct ath_hal *ah, u32 *txqs);
+void ath9k_hw_clr11n_aggr(struct ath_hal *ah, struct ath_desc *ds);
+void ath9k_hw_set11n_virtualmorefrag(struct ath_hal *ah,
+                                     struct ath_desc *ds, u32 vmf);
+bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit);
+bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah);
+int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type,
+                          const struct ath9k_tx_queue_info *qinfo);
+u32 ath9k_hw_numtxpending(struct ath_hal *ah, u32 q);
+const char *ath9k_hw_probe(u16 vendorid, u16 devid);
+bool ath9k_hw_disable(struct ath_hal *ah);
+void ath9k_hw_rfdetach(struct ath_hal *ah);
+void ath9k_hw_get_channel_centers(struct ath_hal *ah,
+                                  struct ath9k_channel *chan,
+                                  struct chan_centers *centers);
+bool ath9k_get_channel_edges(struct ath_hal *ah,
+                             u16 flags, u16 *low,
+                             u16 *high);
+#endif
diff --git a/drivers/net/wireless/ath9k/beacon.c b/drivers/net/wireless/ath9k/beacon.c
new file mode 100644
index 000000000000..caf569401a34
--- /dev/null
+++ b/drivers/net/wireless/ath9k/beacon.c
@@ -0,0 +1,979 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+ /* Implementation of beacon processing. */
+
+#include <asm/unaligned.h>
+#include "core.h"
+
+/*
+ *  Configure parameters for the beacon queue
+ *
+ *  This function will modify certain transmit queue properties depending on
+ *  the operating mode of the station (AP or AdHoc).  Parameters are AIFS
+ *  settings and channel width min/max
+*/
+
+static int ath_beaconq_config(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath9k_tx_queue_info qi;
+
+        ath9k_hw_get_txq_props(ah, sc->sc_bhalq, &qi);
+        if (sc->sc_opmode == ATH9K_M_HOSTAP) {
+                /* Always burst out beacon and CAB traffic. */
+                qi.tqi_aifs = 1;
+                qi.tqi_cwmin = 0;
+                qi.tqi_cwmax = 0;
+        } else {
+                /* Adhoc mode; important thing is to use 2x cwmin. */
+                qi.tqi_aifs = sc->sc_beacon_qi.tqi_aifs;
+                qi.tqi_cwmin = 2*sc->sc_beacon_qi.tqi_cwmin;
+                qi.tqi_cwmax = sc->sc_beacon_qi.tqi_cwmax;
+        }
+
+        if (!ath9k_hw_set_txq_props(ah, sc->sc_bhalq, &qi)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to update h/w beacon queue parameters\n",
+                        __func__);
+                return 0;
+        } else {
+                ath9k_hw_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
+                return 1;
+        }
+}
+
+/*
+ *  Setup the beacon frame for transmit.
+ *
+ *  Associates the beacon frame buffer with a transmit descriptor.  Will set
+ *  up all required antenna switch parameters, rate codes, and channel flags.
+ *  Beacons are always sent out at the lowest rate, and are not retried.
+*/
+
+static void ath_beacon_setup(struct ath_softc *sc,
+        struct ath_vap *avp, struct ath_buf *bf)
+{
+        struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_desc *ds;
+        int flags, antenna;
+        const struct ath9k_rate_table *rt;
+        u8 rix, rate;
+        int ctsrate = 0;
+        int ctsduration = 0;
+        struct ath9k_11n_rate_series  series[4];
+
+        DPRINTF(sc, ATH_DBG_BEACON, "%s: m %p len %u\n",
+                __func__, skb, skb->len);
+
+        /* setup descriptors */
+        ds = bf->bf_desc;
+
+        flags = ATH9K_TXDESC_NOACK;
+
+        if (sc->sc_opmode == ATH9K_M_IBSS &&
+            (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
+                ds->ds_link = bf->bf_daddr; /* self-linked */
+                flags |= ATH9K_TXDESC_VEOL;
+                /* Let hardware handle antenna switching. */
+                antenna = 0;
+        } else {
+                ds->ds_link = 0;
+                /*
+                 * Switch antenna every beacon.
+                 * Should only switch every beacon period, not for every
+                 * SWBA's
+                 * XXX assumes two antenna
+                 */
+                antenna = ((sc->ast_be_xmit / sc->sc_nbcnvaps) & 1 ? 2 : 1);
+        }
+
+        ds->ds_data = bf->bf_buf_addr;
+
+        /*
+         * Calculate rate code.
+         * XXX everything at min xmit rate
+         */
+        rix = 0;
+        rt = sc->sc_currates;
+        rate = rt->info[rix].rateCode;
+        if (sc->sc_flags & ATH_PREAMBLE_SHORT)
+                rate |= rt->info[rix].shortPreamble;
+
+        ath9k_hw_set11n_txdesc(ah, ds
+                              , skb->len + FCS_LEN /* frame length */
+                              , ATH9K_PKT_TYPE_BEACON /* Atheros packet type */
+                              , avp->av_btxctl.txpower /* txpower XXX */
+                              , ATH9K_TXKEYIX_INVALID /* no encryption */
+                              , ATH9K_KEY_TYPE_CLEAR /* no encryption */
+                              , flags /* no ack, veol for beacons */
+                );
+
+        /* NB: beacon's BufLen must be a multiple of 4 bytes */
+        ath9k_hw_filltxdesc(ah, ds
+                           , roundup(skb->len, 4) /* buffer length */
+                           , true /* first segment */
+                           , true /* last segment */
+                           , ds /* first descriptor */
+                );
+
+        memzero(series, sizeof(struct ath9k_11n_rate_series) * 4);
+        series[0].Tries = 1;
+        series[0].Rate = rate;
+        series[0].ChSel = sc->sc_tx_chainmask;
+        series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
+        ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
+                ctsrate, ctsduration, series, 4, 0);
+}
+
+/* Move everything from the vap's mcast queue to the hardware cab queue.
+ * Caller must hold mcasq lock and cabq lock
+ * XXX MORE_DATA bit?
+ */
+static void empty_mcastq_into_cabq(struct ath_hal *ah,
+        struct ath_txq *mcastq, struct ath_txq *cabq)
+{
+        struct ath_buf *bfmcast;
+
+        BUG_ON(list_empty(&mcastq->axq_q));
+
+        bfmcast = list_first_entry(&mcastq->axq_q, struct ath_buf, list);
+
+        /* link the descriptors */
+        if (!cabq->axq_link)
+                ath9k_hw_puttxbuf(ah, cabq->axq_qnum, bfmcast->bf_daddr);
+        else
+                *cabq->axq_link = bfmcast->bf_daddr;
+
+        /* append the private vap mcast list to  the cabq */
+
+        cabq->axq_depth += mcastq->axq_depth;
+        cabq->axq_totalqueued += mcastq->axq_totalqueued;
+        cabq->axq_linkbuf = mcastq->axq_linkbuf;
+        cabq->axq_link = mcastq->axq_link;
+        list_splice_tail_init(&mcastq->axq_q, &cabq->axq_q);
+        mcastq->axq_depth = 0;
+        mcastq->axq_totalqueued = 0;
+        mcastq->axq_linkbuf = NULL;
+        mcastq->axq_link = NULL;
+}
+
+/* This is only run at DTIM. We move everything from the vap's mcast queue
+ * to the hardware cab queue. Caller must hold the mcastq lock. */
+static void trigger_mcastq(struct ath_hal *ah,
+        struct ath_txq *mcastq, struct ath_txq *cabq)
+{
+        spin_lock_bh(&cabq->axq_lock);
+
+        if (!list_empty(&mcastq->axq_q))
+                empty_mcastq_into_cabq(ah, mcastq, cabq);
+
+        /* cabq is gated by beacon so it is safe to start here */
+        if (!list_empty(&cabq->axq_q))
+                ath9k_hw_txstart(ah, cabq->axq_qnum);
+
+        spin_unlock_bh(&cabq->axq_lock);
+}
+
+/*
+ *  Generate beacon frame and queue cab data for a vap.
+ *
+ *  Updates the contents of the beacon frame.  It is assumed that the buffer for
+ *  the beacon frame has been allocated in the ATH object, and simply needs to
+ *  be filled for this cycle.  Also, any CAB (crap after beacon?) traffic will
+ *  be added to the beacon frame at this point.
+*/
+static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_buf *bf;
+        struct ath_vap *avp;
+        struct sk_buff *skb;
+        int cabq_depth;
+        int mcastq_depth;
+        int is_beacon_dtim = 0;
+        unsigned int curlen;
+        struct ath_txq *cabq;
+        struct ath_txq *mcastq;
+        avp = sc->sc_vaps[if_id];
+
+        mcastq = &avp->av_mcastq;
+        cabq = sc->sc_cabq;
+
+        ASSERT(avp);
+
+        if (avp->av_bcbuf == NULL) {
+                DPRINTF(sc, ATH_DBG_BEACON, "%s: avp=%p av_bcbuf=%p\n",
+                        __func__, avp, avp->av_bcbuf);
+                return NULL;
+        }
+        bf = avp->av_bcbuf;
+        skb = (struct sk_buff *) bf->bf_mpdu;
+
+        /*
+         * Update dynamic beacon contents.  If this returns
+         * non-zero then we need to remap the memory because
+         * the beacon frame changed size (probably because
+         * of the TIM bitmap).
+         */
+        curlen = skb->len;
+
+        /* XXX: spin_lock_bh should not be used here, but sparse bitches
+         * otherwise. We should fix sparse :) */
+        spin_lock_bh(&mcastq->axq_lock);
+        mcastq_depth = avp->av_mcastq.axq_depth;
+
+        if (ath_update_beacon(sc, if_id, &avp->av_boff, skb, mcastq_depth) ==
+            1) {
+                ath_skb_unmap_single(sc, skb, PCI_DMA_TODEVICE,
+                                     get_dma_mem_context(bf, bf_dmacontext));
+                bf->bf_buf_addr = ath_skb_map_single(sc, skb, PCI_DMA_TODEVICE,
+                        get_dma_mem_context(bf, bf_dmacontext));
+        } else {
+                pci_dma_sync_single_for_cpu(sc->pdev,
+                                            bf->bf_buf_addr,
+                                            skb_tailroom(skb),
+                                            PCI_DMA_TODEVICE);
+        }
+
+        /*
+         * if the CABQ traffic from previous DTIM is pending and the current
+         *  beacon is also a DTIM.
+         *  1) if there is only one vap let the cab traffic continue.
+         *  2) if there are more than one vap and we are using staggered
+         *     beacons, then drain the cabq by dropping all the frames in
+         *     the cabq so that the current vaps cab traffic can be scheduled.
+         */
+        spin_lock_bh(&cabq->axq_lock);
+        cabq_depth = cabq->axq_depth;
+        spin_unlock_bh(&cabq->axq_lock);
+
+        is_beacon_dtim = avp->av_boff.bo_tim[4] & 1;
+
+        if (mcastq_depth && is_beacon_dtim && cabq_depth) {
+                /*
+                 * Unlock the cabq lock as ath_tx_draintxq acquires
+                 * the lock again which is a common function and that
+                 * acquires txq lock inside.
+                 */
+                if (sc->sc_nvaps > 1) {
+                        ath_tx_draintxq(sc, cabq, false);
+                        DPRINTF(sc, ATH_DBG_BEACON,
+                                "%s: flush previous cabq traffic\n", __func__);
+                }
+        }
+
+        /* Construct tx descriptor. */
+        ath_beacon_setup(sc, avp, bf);
+
+        /*
+         * Enable the CAB queue before the beacon queue to
+         * insure cab frames are triggered by this beacon.
+         */
+        if (is_beacon_dtim)
+                trigger_mcastq(ah, mcastq, cabq);
+
+        spin_unlock_bh(&mcastq->axq_lock);
+        return bf;
+}
+
+/*
+ * Startup beacon transmission for adhoc mode when they are sent entirely
+ * by the hardware using the self-linked descriptor + veol trick.
+*/
+
+static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_buf *bf;
+        struct ath_vap *avp;
+        struct sk_buff *skb;
+
+        avp = sc->sc_vaps[if_id];
+        ASSERT(avp);
+
+        if (avp->av_bcbuf == NULL) {
+                DPRINTF(sc, ATH_DBG_BEACON, "%s: avp=%p av_bcbuf=%p\n",
+                        __func__, avp, avp != NULL ? avp->av_bcbuf : NULL);
+                return;
+        }
+        bf = avp->av_bcbuf;
+        skb = (struct sk_buff *) bf->bf_mpdu;
+
+        /* Construct tx descriptor. */
+        ath_beacon_setup(sc, avp, bf);
+
+        /* NB: caller is known to have already stopped tx dma */
+        ath9k_hw_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
+        ath9k_hw_txstart(ah, sc->sc_bhalq);
+        DPRINTF(sc, ATH_DBG_BEACON, "%s: TXDP%u = %llx (%p)\n", __func__,
+                sc->sc_bhalq, ito64(bf->bf_daddr), bf->bf_desc);
+}
+
+/*
+ *  Setup a h/w transmit queue for beacons.
+ *
+ *  This function allocates an information structure (struct ath9k_txq_info)
+ *  on the stack, sets some specific parameters (zero out channel width
+ *  min/max, and enable aifs). The info structure does not need to be
+ *  persistant.
+*/
+
+int ath_beaconq_setup(struct ath_hal *ah)
+{
+        struct ath9k_tx_queue_info qi;
+
+        memzero(&qi, sizeof(qi));
+        qi.tqi_aifs = 1;
+        qi.tqi_cwmin = 0;
+        qi.tqi_cwmax = 0;
+        /* NB: don't enable any interrupts */
+        return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
+}
+
+
+/*
+ *  Allocate and setup an initial beacon frame.
+ *
+ *  Allocate a beacon state variable for a specific VAP instance created on
+ *  the ATH interface.  This routine also calculates the beacon "slot" for
+ *  staggared beacons in the mBSSID case.
+*/
+
+int ath_beacon_alloc(struct ath_softc *sc, int if_id)
+{
+        struct ath_vap *avp;
+        struct ieee80211_hdr *wh;
+        struct ath_buf *bf;
+        struct sk_buff *skb;
+
+        avp = sc->sc_vaps[if_id];
+        ASSERT(avp);
+
+        /* Allocate a beacon descriptor if we haven't done so. */
+        if (!avp->av_bcbuf) {
+                /*
+                 * Allocate beacon state for hostap/ibss.  We know
+                 * a buffer is available.
+                 */
+
+                avp->av_bcbuf = list_first_entry(&sc->sc_bbuf,
+                                struct ath_buf, list);
+                list_del(&avp->av_bcbuf->list);
+
+                if (sc->sc_opmode == ATH9K_M_HOSTAP ||
+                    !(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
+                        int slot;
+                        /*
+                         * Assign the vap to a beacon xmit slot. As
+                         * above, this cannot fail to find one.
+                         */
+                        avp->av_bslot = 0;
+                        for (slot = 0; slot < ATH_BCBUF; slot++)
+                                if (sc->sc_bslot[slot] == ATH_IF_ID_ANY) {
+                                        /*
+                                         * XXX hack, space out slots to better
+                                         * deal with misses
+                                         */
+                                        if (slot+1 < ATH_BCBUF &&
+                                            sc->sc_bslot[slot+1] ==
+                                                ATH_IF_ID_ANY) {
+                                                avp->av_bslot = slot+1;
+                                                break;
+                                        }
+                                        avp->av_bslot = slot;
+                                        /* NB: keep looking for a double slot */
+                                }
+                        BUG_ON(sc->sc_bslot[avp->av_bslot] != ATH_IF_ID_ANY);
+                        sc->sc_bslot[avp->av_bslot] = if_id;
+                        sc->sc_nbcnvaps++;
+                }
+        }
+
+        /* release the previous beacon frame , if it already exists. */
+        bf = avp->av_bcbuf;
+        if (bf->bf_mpdu != NULL) {
+                skb = (struct sk_buff *)bf->bf_mpdu;
+                ath_skb_unmap_single(sc, skb, PCI_DMA_TODEVICE,
+                                     get_dma_mem_context(bf, bf_dmacontext));
+                dev_kfree_skb_any(skb);
+                bf->bf_mpdu = NULL;
+        }
+
+        /*
+         * NB: the beacon data buffer must be 32-bit aligned;
+         * we assume the wbuf routines will return us something
+         * with this alignment (perhaps should assert).
+         * FIXME: Fill avp->av_boff.bo_tim,avp->av_btxctl.txpower and
+         * avp->av_btxctl.shortPreamble
+         */
+        skb = ieee80211_beacon_get(sc->hw, avp->av_if_data);
+        if (skb == NULL) {
+                DPRINTF(sc, ATH_DBG_BEACON, "%s: cannot get skb\n",
+                        __func__);
+                return -ENOMEM;
+        }
+
+        /*
+         * Calculate a TSF adjustment factor required for
+         * staggered beacons.  Note that we assume the format
+         * of the beacon frame leaves the tstamp field immediately
+         * following the header.
+         */
+        if (avp->av_bslot > 0) {
+                u64 tsfadjust;
+                __le64 val;
+                int intval;
+
+                /* FIXME: Use default value for now: Sujith */
+
+                intval = ATH_DEFAULT_BINTVAL;
+
+                /*
+                 * The beacon interval is in TU's; the TSF in usecs.
+                 * We figure out how many TU's to add to align the
+                 * timestamp then convert to TSF units and handle
+                 * byte swapping before writing it in the frame.
+                 * The hardware will then add this each time a beacon
+                 * frame is sent.  Note that we align vap's 1..N
+                 * and leave vap 0 untouched.  This means vap 0
+                 * has a timestamp in one beacon interval while the
+                 * others get a timestamp aligned to the next interval.
+                 */
+                tsfadjust = (intval * (ATH_BCBUF - avp->av_bslot)) / ATH_BCBUF;
+                val = cpu_to_le64(tsfadjust << 10);     /* TU->TSF */
+
+                DPRINTF(sc, ATH_DBG_BEACON,
+                        "%s: %s beacons, bslot %d intval %u tsfadjust %llu\n",
+                        __func__, "stagger",
+                        avp->av_bslot, intval, (unsigned long long)tsfadjust);
+
+                wh = (struct ieee80211_hdr *)skb->data;
+                memcpy(&wh[1], &val, sizeof(val));
+        }
+
+        bf->bf_buf_addr = ath_skb_map_single(sc, skb, PCI_DMA_TODEVICE,
+                get_dma_mem_context(bf, bf_dmacontext));
+        bf->bf_mpdu = skb;
+
+        return 0;
+}
+
+/*
+ *  Reclaim beacon resources and return buffer to the pool.
+ *
+ *  Checks the VAP to put the beacon frame buffer back to the ATH object
+ *  queue, and de-allocates any wbuf frames that were sent as CAB traffic.
+*/
+
+void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp)
+{
+        if (avp->av_bcbuf != NULL) {
+                struct ath_buf *bf;
+
+                if (avp->av_bslot != -1) {
+                        sc->sc_bslot[avp->av_bslot] = ATH_IF_ID_ANY;
+                        sc->sc_nbcnvaps--;
+                }
+
+                bf = avp->av_bcbuf;
+                if (bf->bf_mpdu != NULL) {
+                        struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
+                        ath_skb_unmap_single(sc, skb, PCI_DMA_TODEVICE,
+                                get_dma_mem_context(bf, bf_dmacontext));
+                        dev_kfree_skb_any(skb);
+                        bf->bf_mpdu = NULL;
+                }
+                list_add_tail(&bf->list, &sc->sc_bbuf);
+
+                avp->av_bcbuf = NULL;
+        }
+}
+
+/*
+ *  Reclaim beacon resources and return buffer to the pool.
+ *
+ *  This function will free any wbuf frames that are still attached to the
+ *  beacon buffers in the ATH object.  Note that this does not de-allocate
+ *  any wbuf objects that are in the transmit queue and have not yet returned
+ *  to the ATH object.
+*/
+
+void ath_beacon_free(struct ath_softc *sc)
+{
+        struct ath_buf *bf;
+
+        list_for_each_entry(bf, &sc->sc_bbuf, list) {
+                if (bf->bf_mpdu != NULL) {
+                        struct sk_buff *skb = (struct sk_buff *) bf->bf_mpdu;
+                        ath_skb_unmap_single(sc, skb, PCI_DMA_TODEVICE,
+                                get_dma_mem_context(bf, bf_dmacontext));
+                        dev_kfree_skb_any(skb);
+                        bf->bf_mpdu = NULL;
+                }
+        }
+}
+
+/*
+ * Tasklet for Sending Beacons
+ *
+ * Transmit one or more beacon frames at SWBA.  Dynamic updates to the frame
+ * contents are done as needed and the slot time is also adjusted based on
+ * current state.
+ *
+ * This tasklet is not scheduled, it's called in ISR context.
+*/
+
+void ath9k_beacon_tasklet(unsigned long data)
+{
+#define TSF_TO_TU(_h,_l)                                        \
+        ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
+
+        struct ath_softc *sc = (struct ath_softc *)data;
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_buf *bf = NULL;
+        int slot, if_id;
+        u32 bfaddr;
+        u32 rx_clear = 0, rx_frame = 0, tx_frame = 0;
+        u32 show_cycles = 0;
+        u32 bc = 0; /* beacon count */
+        u64 tsf;
+        u32 tsftu;
+        u16 intval;
+
+        if (sc->sc_noreset) {
+                show_cycles = ath9k_hw_GetMibCycleCountsPct(ah,
+                                                            &rx_clear,
+                                                            &rx_frame,
+                                                            &tx_frame);
+        }
+
+        /*
+         * Check if the previous beacon has gone out.  If
+         * not don't try to post another, skip this period
+         * and wait for the next.  Missed beacons indicate
+         * a problem and should not occur.  If we miss too
+         * many consecutive beacons reset the device.
+         */
+        if (ath9k_hw_numtxpending(ah, sc->sc_bhalq) != 0) {
+                sc->sc_bmisscount++;
+                /* XXX: doth needs the chanchange IE countdown decremented.
+                 *      We should consider adding a mac80211 call to indicate
+                 *      a beacon miss so appropriate action could be taken
+                 *      (in that layer).
+                 */
+                if (sc->sc_bmisscount < BSTUCK_THRESH) {
+                        if (sc->sc_noreset) {
+                                DPRINTF(sc, ATH_DBG_BEACON,
+                                        "%s: missed %u consecutive beacons\n",
+                                        __func__, sc->sc_bmisscount);
+                                if (show_cycles) {
+                                        /*
+                                         * Display cycle counter stats
+                                         * from HW to aide in debug of
+                                         * stickiness.
+                                         */
+                                        DPRINTF(sc,
+                                                ATH_DBG_BEACON,
+                                                "%s: busy times: rx_clear=%d, "
+                                                "rx_frame=%d, tx_frame=%d\n",
+                                                __func__, rx_clear, rx_frame,
+                                                tx_frame);
+                                } else {
+                                        DPRINTF(sc,
+                                                ATH_DBG_BEACON,
+                                                "%s: unable to obtain "
+                                                "busy times\n", __func__);
+                                }
+                        } else {
+                                DPRINTF(sc, ATH_DBG_BEACON,
+                                        "%s: missed %u consecutive beacons\n",
+                                        __func__, sc->sc_bmisscount);
+                        }
+                } else if (sc->sc_bmisscount >= BSTUCK_THRESH) {
+                        if (sc->sc_noreset) {
+                                if (sc->sc_bmisscount == BSTUCK_THRESH) {
+                                        DPRINTF(sc,
+                                                ATH_DBG_BEACON,
+                                                "%s: beacon is officially "
+                                                "stuck\n", __func__);
+                                        ath9k_hw_dmaRegDump(ah);
+                                }
+                        } else {
+                                DPRINTF(sc, ATH_DBG_BEACON,
+                                        "%s: beacon is officially stuck\n",
+                                        __func__);
+                                ath_bstuck_process(sc);
+                        }
+                }
+
+                return;
+        }
+        if (sc->sc_bmisscount != 0) {
+                if (sc->sc_noreset) {
+                        DPRINTF(sc,
+                                ATH_DBG_BEACON,
+                                "%s: resume beacon xmit after %u misses\n",
+                                __func__, sc->sc_bmisscount);
+                } else {
+                        DPRINTF(sc, ATH_DBG_BEACON,
+                                "%s: resume beacon xmit after %u misses\n",
+                                __func__, sc->sc_bmisscount);
+                }
+                sc->sc_bmisscount = 0;
+        }
+
+        /*
+         * Generate beacon frames. we are sending frames
+         * staggered so calculate the slot for this frame based
+         * on the tsf to safeguard against missing an swba.
+         */
+
+        /* FIXME: Use default value for now - Sujith */
+        intval = ATH_DEFAULT_BINTVAL;
+
+        tsf = ath9k_hw_gettsf64(ah);
+        tsftu = TSF_TO_TU(tsf>>32, tsf);
+        slot = ((tsftu % intval) * ATH_BCBUF) / intval;
+        if_id = sc->sc_bslot[(slot + 1) % ATH_BCBUF];
+        DPRINTF(sc, ATH_DBG_BEACON,
+                        "%s: slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
+                        __func__, slot, (unsigned long long) tsf, tsftu,
+                        intval, if_id);
+        bfaddr = 0;
+        if (if_id != ATH_IF_ID_ANY) {
+                bf = ath_beacon_generate(sc, if_id);
+                if (bf != NULL) {
+                        bfaddr = bf->bf_daddr;
+                        bc = 1;
+                }
+        }
+        /*
+         * Handle slot time change when a non-ERP station joins/leaves
+         * an 11g network.  The 802.11 layer notifies us via callback,
+         * we mark updateslot, then wait one beacon before effecting
+         * the change.  This gives associated stations at least one
+         * beacon interval to note the state change.
+         *
+         * NB: The slot time change state machine is clocked according
+         *     to whether we are bursting or staggering beacons.  We
+         *     recognize the request to update and record the current
+         *     slot then don't transition until that slot is reached
+         *     again.  If we miss a beacon for that slot then we'll be
+         *     slow to transition but we'll be sure at least one beacon
+         *     interval has passed.  When bursting slot is always left
+         *     set to ATH_BCBUF so this check is a noop.
+         */
+        /* XXX locking */
+        if (sc->sc_updateslot == UPDATE) {
+                sc->sc_updateslot = COMMIT; /* commit next beacon */
+                sc->sc_slotupdate = slot;
+        } else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot)
+                ath_setslottime(sc);        /* commit change to hardware */
+
+        if (bfaddr != 0) {
+                /*
+                 * Stop any current dma and put the new frame(s) on the queue.
+                 * This should never fail since we check above that no frames
+                 * are still pending on the queue.
+                 */
+                if (!ath9k_hw_stoptxdma(ah, sc->sc_bhalq)) {
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: beacon queue %u did not stop?\n",
+                                __func__, sc->sc_bhalq);
+                        /* NB: the HAL still stops DMA, so proceed */
+                }
+
+                /* NB: cabq traffic should already be queued and primed */
+                ath9k_hw_puttxbuf(ah, sc->sc_bhalq, bfaddr);
+                ath9k_hw_txstart(ah, sc->sc_bhalq);
+
+                sc->ast_be_xmit += bc;     /* XXX per-vap? */
+        }
+#undef TSF_TO_TU
+}
+
+/*
+ *  Tasklet for Beacon Stuck processing
+ *
+ *  Processing for Beacon Stuck.
+ *  Basically calls the ath_internal_reset function to reset the chip.
+*/
+
+void ath_bstuck_process(struct ath_softc *sc)
+{
+        DPRINTF(sc, ATH_DBG_BEACON,
+                "%s: stuck beacon; resetting (bmiss count %u)\n",
+                __func__, sc->sc_bmisscount);
+        ath_internal_reset(sc);
+}
+
+/*
+ * Configure the beacon and sleep timers.
+ *
+ * When operating as an AP this resets the TSF and sets
+ * up the hardware to notify us when we need to issue beacons.
+ *
+ * When operating in station mode this sets up the beacon
+ * timers according to the timestamp of the last received
+ * beacon and the current TSF, configures PCF and DTIM
+ * handling, programs the sleep registers so the hardware
+ * will wakeup in time to receive beacons, and configures
+ * the beacon miss handling so we'll receive a BMISS
+ * interrupt when we stop seeing beacons from the AP
+ * we've associated with.
+ */
+
+void ath_beacon_config(struct ath_softc *sc, int if_id)
+{
+#define TSF_TO_TU(_h,_l)                                        \
+        ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
+        struct ath_hal *ah = sc->sc_ah;
+        u32 nexttbtt, intval;
+        struct ath_beacon_config conf;
+        enum ath9k_opmode av_opmode;
+
+        if (if_id != ATH_IF_ID_ANY)
+                av_opmode = sc->sc_vaps[if_id]->av_opmode;
+        else
+                av_opmode = sc->sc_opmode;
+
+        memzero(&conf, sizeof(struct ath_beacon_config));
+
+        /* FIXME: Use default values for now - Sujith */
+        /* Query beacon configuration first */
+        /*
+         * Protocol stack doesn't support dynamic beacon configuration,
+         * use default configurations.
+         */
+        conf.beacon_interval = ATH_DEFAULT_BINTVAL;
+        conf.listen_interval = 1;
+        conf.dtim_period = conf.beacon_interval;
+        conf.dtim_count = 1;
+        conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
+
+        /* extract tstamp from last beacon and convert to TU */
+        nexttbtt = TSF_TO_TU(get_unaligned_le32(conf.u.last_tstamp + 4),
+                             get_unaligned_le32(conf.u.last_tstamp));
+        /* XXX conditionalize multi-bss support? */
+        if (sc->sc_opmode == ATH9K_M_HOSTAP) {
+                /*
+                 * For multi-bss ap support beacons are either staggered
+                 * evenly over N slots or burst together.  For the former
+                 * arrange for the SWBA to be delivered for each slot.
+                 * Slots that are not occupied will generate nothing.
+                 */
+                /* NB: the beacon interval is kept internally in TU's */
+                intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
+                intval /= ATH_BCBUF;    /* for staggered beacons */
+        } else {
+                intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
+        }
+
+        if (nexttbtt == 0)      /* e.g. for ap mode */
+                nexttbtt = intval;
+        else if (intval)        /* NB: can be 0 for monitor mode */
+                nexttbtt = roundup(nexttbtt, intval);
+        DPRINTF(sc, ATH_DBG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
+                __func__, nexttbtt, intval, conf.beacon_interval);
+        /* Check for ATH9K_M_HOSTAP and sc_nostabeacons for WDS client */
+        if (sc->sc_opmode == ATH9K_M_STA) {
+                struct ath9k_beacon_state bs;
+                u64 tsf;
+                u32 tsftu;
+                int dtimperiod, dtimcount, sleepduration;
+                int cfpperiod, cfpcount;
+
+                /*
+                 * Setup dtim and cfp parameters according to
+                 * last beacon we received (which may be none).
+                 */
+                dtimperiod = conf.dtim_period;
+                if (dtimperiod <= 0)        /* NB: 0 if not known */
+                        dtimperiod = 1;
+                dtimcount = conf.dtim_count;
+                if (dtimcount >= dtimperiod)    /* NB: sanity check */
+                        dtimcount = 0;      /* XXX? */
+                cfpperiod = 1;          /* NB: no PCF support yet */
+                cfpcount = 0;
+
+                sleepduration = conf.listen_interval * intval;
+                if (sleepduration <= 0)
+                        sleepduration = intval;
+
+#define FUDGE   2
+                /*
+                 * Pull nexttbtt forward to reflect the current
+                 * TSF and calculate dtim+cfp state for the result.
+                 */
+                tsf = ath9k_hw_gettsf64(ah);
+                tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
+                do {
+                        nexttbtt += intval;
+                        if (--dtimcount < 0) {
+                                dtimcount = dtimperiod - 1;
+                                if (--cfpcount < 0)
+                                        cfpcount = cfpperiod - 1;
+                        }
+                } while (nexttbtt < tsftu);
+#undef FUDGE
+                memzero(&bs, sizeof(bs));
+                bs.bs_intval = intval;
+                bs.bs_nexttbtt = nexttbtt;
+                bs.bs_dtimperiod = dtimperiod*intval;
+                bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
+                bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
+                bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
+                bs.bs_cfpmaxduration = 0;
+                /*
+                 * Calculate the number of consecutive beacons to miss
+                 * before taking a BMISS interrupt.  The configuration
+                 * is specified in TU so we only need calculate based
+                 * on the beacon interval.  Note that we clamp the
+                 * result to at most 15 beacons.
+                 */
+                if (sleepduration > intval) {
+                        bs.bs_bmissthreshold =
+                                conf.listen_interval *
+                                        ATH_DEFAULT_BMISS_LIMIT / 2;
+                } else {
+                        bs.bs_bmissthreshold =
+                                DIV_ROUND_UP(conf.bmiss_timeout, intval);
+                        if (bs.bs_bmissthreshold > 15)
+                                bs.bs_bmissthreshold = 15;
+                        else if (bs.bs_bmissthreshold <= 0)
+                                bs.bs_bmissthreshold = 1;
+                }
+
+                /*
+                 * Calculate sleep duration.  The configuration is
+                 * given in ms.  We insure a multiple of the beacon
+                 * period is used.  Also, if the sleep duration is
+                 * greater than the DTIM period then it makes senses
+                 * to make it a multiple of that.
+                 *
+                 * XXX fixed at 100ms
+                 */
+
+                bs.bs_sleepduration =
+                        roundup(IEEE80211_MS_TO_TU(100), sleepduration);
+                if (bs.bs_sleepduration > bs.bs_dtimperiod)
+                        bs.bs_sleepduration = bs.bs_dtimperiod;
+
+                DPRINTF(sc, ATH_DBG_BEACON,
+                        "%s: tsf %llu "
+                        "tsf:tu %u "
+                        "intval %u "
+                        "nexttbtt %u "
+                        "dtim %u "
+                        "nextdtim %u "
+                        "bmiss %u "
+                        "sleep %u "
+                        "cfp:period %u "
+                        "maxdur %u "
+                        "next %u "
+                        "timoffset %u\n"
+                        , __func__
+                        , (unsigned long long)tsf, tsftu
+                        , bs.bs_intval
+                        , bs.bs_nexttbtt
+                        , bs.bs_dtimperiod
+                        , bs.bs_nextdtim
+                        , bs.bs_bmissthreshold
+                        , bs.bs_sleepduration
+                        , bs.bs_cfpperiod
+                        , bs.bs_cfpmaxduration
+                        , bs.bs_cfpnext
+                        , bs.bs_timoffset
+                        );
+
+                ath9k_hw_set_interrupts(ah, 0);
+                ath9k_hw_set_sta_beacon_timers(ah, &bs);
+                sc->sc_imask |= ATH9K_INT_BMISS;
+                ath9k_hw_set_interrupts(ah, sc->sc_imask);
+        } else {
+                u64 tsf;
+                u32 tsftu;
+                ath9k_hw_set_interrupts(ah, 0);
+                if (nexttbtt == intval)
+                        intval |= ATH9K_BEACON_RESET_TSF;
+                if (sc->sc_opmode == ATH9K_M_IBSS) {
+                        /*
+                         * Pull nexttbtt forward to reflect the current
+                         * TSF .
+                         */
+#define FUDGE   2
+                        if (!(intval & ATH9K_BEACON_RESET_TSF)) {
+                                tsf = ath9k_hw_gettsf64(ah);
+                                tsftu = TSF_TO_TU((u32)(tsf>>32),
+                                        (u32)tsf) + FUDGE;
+                                do {
+                                        nexttbtt += intval;
+                                } while (nexttbtt < tsftu);
+                        }
+#undef FUDGE
+                        DPRINTF(sc, ATH_DBG_BEACON,
+                                "%s: IBSS nexttbtt %u intval %u (%u)\n",
+                                __func__, nexttbtt,
+                                intval & ~ATH9K_BEACON_RESET_TSF,
+                                conf.beacon_interval);
+
+                        /*
+                         * In IBSS mode enable the beacon timers but only
+                         * enable SWBA interrupts if we need to manually
+                         * prepare beacon frames.  Otherwise we use a
+                         * self-linked tx descriptor and let the hardware
+                         * deal with things.
+                         */
+                        intval |= ATH9K_BEACON_ENA;
+                        if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
+                                sc->sc_imask |= ATH9K_INT_SWBA;
+                        ath_beaconq_config(sc);
+                } else if (sc->sc_opmode == ATH9K_M_HOSTAP) {
+                        /*
+                         * In AP mode we enable the beacon timers and
+                         * SWBA interrupts to prepare beacon frames.
+                         */
+                        intval |= ATH9K_BEACON_ENA;
+                        sc->sc_imask |= ATH9K_INT_SWBA;   /* beacon prepare */
+                        ath_beaconq_config(sc);
+                }
+                ath9k_hw_beaconinit(ah, nexttbtt, intval);
+                sc->sc_bmisscount = 0;
+                ath9k_hw_set_interrupts(ah, sc->sc_imask);
+                /*
+                 * When using a self-linked beacon descriptor in
+                 * ibss mode load it once here.
+                 */
+                if (sc->sc_opmode == ATH9K_M_IBSS &&
+                    (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
+                        ath_beacon_start_adhoc(sc, 0);
+        }
+#undef TSF_TO_TU
+}
+
+/* Function to collect beacon rssi data and resync beacon if necessary */
+
+void ath_beacon_sync(struct ath_softc *sc, int if_id)
+{
+        /*
+         * Resync beacon timers using the tsf of the
+         * beacon frame we just received.
+         */
+        ath_beacon_config(sc, if_id);
+        sc->sc_beacons = 1;
+}
diff --git a/drivers/net/wireless/ath9k/core.c b/drivers/net/wireless/ath9k/core.c
new file mode 100644
index 000000000000..f6c45288d0e7
--- /dev/null
+++ b/drivers/net/wireless/ath9k/core.c
@@ -0,0 +1,1923 @@
+/*
+ * Copyright (c) 2008, Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+ /* Implementation of the main "ATH" layer. */
+
+#include "core.h"
+#include "regd.h"
+
+static int ath_outdoor;         /* enable outdoor use */
+
+static const u8 ath_bcast_mac[ETH_ALEN] =
+    { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+static u32 ath_chainmask_sel_up_rssi_thres =
+        ATH_CHAINMASK_SEL_UP_RSSI_THRES;
+static u32 ath_chainmask_sel_down_rssi_thres =
+        ATH_CHAINMASK_SEL_DOWN_RSSI_THRES;
+static u32 ath_chainmask_sel_period =
+        ATH_CHAINMASK_SEL_TIMEOUT;
+
+/* return bus cachesize in 4B word units */
+
+static void bus_read_cachesize(struct ath_softc *sc, int *csz)
+{
+        u8 u8tmp;
+
+        pci_read_config_byte(sc->pdev, PCI_CACHE_LINE_SIZE, (u8 *)&u8tmp);
+        *csz = (int)u8tmp;
+
+        /*
+         * This check was put in to avoid "unplesant" consequences if
+         * the bootrom has not fully initialized all PCI devices.
+         * Sometimes the cache line size register is not set
+         */
+
+        if (*csz == 0)
+                *csz = DEFAULT_CACHELINE >> 2;   /* Use the default size */
+}
+
+/*
+ *  Set current operating mode
+ *
+ *  This function initializes and fills the rate table in the ATH object based
+ *  on the operating mode.  The blink rates are also set up here, although
+ *  they have been superceeded by the ath_led module.
+*/
+
+static void ath_setcurmode(struct ath_softc *sc, enum wireless_mode mode)
+{
+        const struct ath9k_rate_table *rt;
+        int i;
+
+        memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
+        rt = ath9k_hw_getratetable(sc->sc_ah, mode);
+        BUG_ON(!rt);
+
+        for (i = 0; i < rt->rateCount; i++)
+                sc->sc_rixmap[rt->info[i].rateCode] = (u8) i;
+
+        memzero(sc->sc_hwmap, sizeof(sc->sc_hwmap));
+        for (i = 0; i < 256; i++) {
+                u8 ix = rt->rateCodeToIndex[i];
+
+                if (ix == 0xff)
+                        continue;
+
+                sc->sc_hwmap[i].ieeerate =
+                    rt->info[ix].dot11Rate & IEEE80211_RATE_VAL;
+                sc->sc_hwmap[i].rateKbps = rt->info[ix].rateKbps;
+
+                if (rt->info[ix].shortPreamble ||
+                    rt->info[ix].phy == PHY_OFDM) {
+                        /* XXX: Handle this */
+                }
+
+                /* NB: this uses the last entry if the rate isn't found */
+                /* XXX beware of overlow */
+        }
+        sc->sc_currates = rt;
+        sc->sc_curmode = mode;
+        /*
+         * All protection frames are transmited at 2Mb/s for
+         * 11g, otherwise at 1Mb/s.
+         * XXX select protection rate index from rate table.
+         */
+        sc->sc_protrix = (mode == ATH9K_MODE_11G ? 1 : 0);
+}
+
+/*
+ * Set up rate table (legacy rates)
+ */
+static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        const struct ath9k_rate_table *rt = NULL;
+        struct ieee80211_supported_band *sband;
+        struct ieee80211_rate *rate;
+        int i, maxrates;
+
+        switch (band) {
+        case IEEE80211_BAND_2GHZ:
+                rt = ath9k_hw_getratetable(ah, ATH9K_MODE_11G);
+                break;
+        case IEEE80211_BAND_5GHZ:
+                rt = ath9k_hw_getratetable(ah, ATH9K_MODE_11A);
+                break;
+        default:
+                break;
+        }
+
+        if (rt == NULL)
+                return;
+
+        sband = &sc->sbands[band];
+        rate = sc->rates[band];
+
+        if (rt->rateCount > ATH_RATE_MAX)
+                maxrates = ATH_RATE_MAX;
+        else
+                maxrates = rt->rateCount;
+
+        for (i = 0; i < maxrates; i++) {
+                rate[i].bitrate = rt->info[i].rateKbps / 100;
+                rate[i].hw_value = rt->info[i].rateCode;
+                sband->n_bitrates++;
+                DPRINTF(sc, ATH_DBG_CONFIG,
+                        "%s: Rate: %2dMbps, ratecode: %2d\n",
+                        __func__,
+                        rate[i].bitrate / 10,
+                        rate[i].hw_value);
+        }
+}
+
+/*
+ *  Set up channel list
+ */
+static int ath_setup_channels(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        int nchan, i, a = 0, b = 0;
+        u8 regclassids[ATH_REGCLASSIDS_MAX];
+        u32 nregclass = 0;
+        struct ieee80211_supported_band *band_2ghz;
+        struct ieee80211_supported_band *band_5ghz;
+        struct ieee80211_channel *chan_2ghz;
+        struct ieee80211_channel *chan_5ghz;
+        struct ath9k_channel *c;
+
+        /* Fill in ah->ah_channels */
+        if (!ath9k_regd_init_channels(ah,
+                                      ATH_CHAN_MAX,
+                                      (u32 *)&nchan,
+                                      regclassids,
+                                      ATH_REGCLASSIDS_MAX,
+                                      &nregclass,
+                                      CTRY_DEFAULT,
+                                      false,
+                                      1)) {
+                u32 rd = ah->ah_currentRD;
+
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to collect channel list; "
+                        "regdomain likely %u country code %u\n",
+                        __func__, rd, CTRY_DEFAULT);
+                return -EINVAL;
+        }
+
+        band_2ghz = &sc->sbands[IEEE80211_BAND_2GHZ];
+        band_5ghz = &sc->sbands[IEEE80211_BAND_5GHZ];
+        chan_2ghz = sc->channels[IEEE80211_BAND_2GHZ];
+        chan_5ghz = sc->channels[IEEE80211_BAND_5GHZ];
+
+        for (i = 0; i < nchan; i++) {
+                c = &ah->ah_channels[i];
+                if (IS_CHAN_2GHZ(c)) {
+                        chan_2ghz[a].band = IEEE80211_BAND_2GHZ;
+                        chan_2ghz[a].center_freq = c->channel;
+                        chan_2ghz[a].max_power = c->maxTxPower;
+
+                        if (c->privFlags & CHANNEL_DISALLOW_ADHOC)
+                                chan_2ghz[a].flags |=
+                                        IEEE80211_CHAN_NO_IBSS;
+                        if (c->channelFlags & CHANNEL_PASSIVE)
+                                chan_2ghz[a].flags |=
+                                        IEEE80211_CHAN_PASSIVE_SCAN;
+
+                        band_2ghz->n_channels = ++a;
+
+                        DPRINTF(sc, ATH_DBG_CONFIG,
+                                "%s: 2MHz channel: %d, "
+                                "channelFlags: 0x%x\n",
+                                __func__,
+                                c->channel,
+                                c->channelFlags);
+                } else if (IS_CHAN_5GHZ(c)) {
+                        chan_5ghz[b].band = IEEE80211_BAND_5GHZ;
+                        chan_5ghz[b].center_freq = c->channel;
+                        chan_5ghz[b].max_power = c->maxTxPower;
+
+                        if (c->privFlags & CHANNEL_DISALLOW_ADHOC)
+                                chan_5ghz[b].flags |=
+                                        IEEE80211_CHAN_NO_IBSS;
+                        if (c->channelFlags & CHANNEL_PASSIVE)
+                                chan_5ghz[b].flags |=
+                                        IEEE80211_CHAN_PASSIVE_SCAN;
+
+                        band_5ghz->n_channels = ++b;
+
+                        DPRINTF(sc, ATH_DBG_CONFIG,
+                                "%s: 5MHz channel: %d, "
+                                "channelFlags: 0x%x\n",
+                                __func__,
+                                c->channel,
+                                c->channelFlags);
+                }
+        }
+
+        return 0;
+}
+
+/*
+ *  Determine mode from channel flags
+ *
+ *  This routine will provide the enumerated WIRELESSS_MODE value based
+ *  on the settings of the channel flags.  If ho valid set of flags
+ *  exist, the lowest mode (11b) is selected.
+*/
+
+static enum wireless_mode ath_chan2mode(struct ath9k_channel *chan)
+{
+        if (chan->chanmode == CHANNEL_A)
+                return ATH9K_MODE_11A;
+        else if (chan->chanmode == CHANNEL_G)
+                return ATH9K_MODE_11G;
+        else if (chan->chanmode == CHANNEL_B)
+                return ATH9K_MODE_11B;
+        else if (chan->chanmode == CHANNEL_A_HT20)
+                return ATH9K_MODE_11NA_HT20;
+        else if (chan->chanmode == CHANNEL_G_HT20)
+                return ATH9K_MODE_11NG_HT20;
+        else if (chan->chanmode == CHANNEL_A_HT40PLUS)
+                return ATH9K_MODE_11NA_HT40PLUS;
+        else if (chan->chanmode == CHANNEL_A_HT40MINUS)
+                return ATH9K_MODE_11NA_HT40MINUS;
+        else if (chan->chanmode == CHANNEL_G_HT40PLUS)
+                return ATH9K_MODE_11NG_HT40PLUS;
+        else if (chan->chanmode == CHANNEL_G_HT40MINUS)
+                return ATH9K_MODE_11NG_HT40MINUS;
+
+        /* NB: should not get here */
+        return ATH9K_MODE_11B;
+}
+
+/*
+ * Stop the device, grabbing the top-level lock to protect
+ * against concurrent entry through ath_init (which can happen
+ * if another thread does a system call and the thread doing the
+ * stop is preempted).
+ */
+
+static int ath_stop(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: invalid %u\n",
+                __func__, sc->sc_invalid);
+
+        /*
+         * Shutdown the hardware and driver:
+         *    stop output from above
+         *    reset 802.11 state machine
+         *      (sends station deassoc/deauth frames)
+         *    turn off timers
+         *    disable interrupts
+         *    clear transmit machinery
+         *    clear receive machinery
+         *    turn off the radio
+         *    reclaim beacon resources
+         *
+         * Note that some of this work is not possible if the
+         * hardware is gone (invalid).
+         */
+
+        if (!sc->sc_invalid)
+                ath9k_hw_set_interrupts(ah, 0);
+        ath_draintxq(sc, false);
+        if (!sc->sc_invalid) {
+                ath_stoprecv(sc);
+                ath9k_hw_phy_disable(ah);
+        } else
+                sc->sc_rxlink = NULL;
+
+        return 0;
+}
+
+/*
+ *  Start Scan
+ *
+ *  This function is called when starting a channel scan.  It will perform
+ *  power save wakeup processing, set the filter for the scan, and get the
+ *  chip ready to send broadcast packets out during the scan.
+*/
+
+void ath_scan_start(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        u32 rfilt;
+        u32 now = (u32) jiffies_to_msecs(get_timestamp());
+
+        sc->sc_scanning = 1;
+        rfilt = ath_calcrxfilter(sc);
+        ath9k_hw_setrxfilter(ah, rfilt);
+        ath9k_hw_write_associd(ah, ath_bcast_mac, 0);
+
+        /* Restore previous power management state. */
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%d.%03d | %s: RX filter 0x%x aid 0\n",
+                now / 1000, now % 1000, __func__, rfilt);
+}
+
+/*
+ *  Scan End
+ *
+ *  This routine is called by the upper layer when the scan is completed.  This
+ *  will set the filters back to normal operating mode, set the BSSID to the
+ *  correct value, and restore the power save state.
+*/
+
+void ath_scan_end(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        u32 rfilt;
+        u32 now = (u32) jiffies_to_msecs(get_timestamp());
+
+        sc->sc_scanning = 0;
+        /* Request for a full reset due to rx packet filter changes */
+        sc->sc_full_reset = 1;
+        rfilt = ath_calcrxfilter(sc);
+        ath9k_hw_setrxfilter(ah, rfilt);
+        ath9k_hw_write_associd(ah, sc->sc_curbssid, sc->sc_curaid);
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%d.%03d | %s: RX filter 0x%x aid 0x%x\n",
+                now / 1000, now % 1000, __func__, rfilt, sc->sc_curaid);
+}
+
+/*
+ * Set the current channel
+ *
+ * Set/change channels.  If the channel is really being changed, it's done
+ * by reseting the chip.  To accomplish this we must first cleanup any pending
+ * DMA, then restart stuff after a la ath_init.
+*/
+int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        bool fastcc = true, stopped;
+        enum ath9k_ht_macmode ht_macmode;
+
+        if (sc->sc_invalid)     /* if the device is invalid or removed */
+                return -EIO;
+
+        DPRINTF(sc, ATH_DBG_CONFIG,
+                "%s: %u (%u MHz) -> %u (%u MHz), cflags:%x\n",
+                __func__,
+                ath9k_hw_mhz2ieee(ah, sc->sc_curchan.channel,
+                                  sc->sc_curchan.channelFlags),
+                sc->sc_curchan.channel,
+                ath9k_hw_mhz2ieee(ah, hchan->channel, hchan->channelFlags),
+                hchan->channel, hchan->channelFlags);
+
+        ht_macmode = ath_cwm_macmode(sc);
+
+        if (hchan->channel != sc->sc_curchan.channel ||
+            hchan->channelFlags != sc->sc_curchan.channelFlags ||
+            sc->sc_update_chainmask || sc->sc_full_reset) {
+                int status;
+                /*
+                 * This is only performed if the channel settings have
+                 * actually changed.
+                 *
+                 * To switch channels clear any pending DMA operations;
+                 * wait long enough for the RX fifo to drain, reset the
+                 * hardware at the new frequency, and then re-enable
+                 * the relevant bits of the h/w.
+                 */
+                ath9k_hw_set_interrupts(ah, 0); /* disable interrupts */
+                ath_draintxq(sc, false);        /* clear pending tx frames */
+                stopped = ath_stoprecv(sc);     /* turn off frame recv */
+
+                /* XXX: do not flush receive queue here. We don't want
+                 * to flush data frames already in queue because of
+                 * changing channel. */
+
+                if (!stopped || sc->sc_full_reset)
+                        fastcc = false;
+
+                spin_lock_bh(&sc->sc_resetlock);
+                if (!ath9k_hw_reset(ah, sc->sc_opmode, hchan,
+                                        ht_macmode, sc->sc_tx_chainmask,
+                                        sc->sc_rx_chainmask,
+                                        sc->sc_ht_extprotspacing,
+                                        fastcc, &status)) {
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: unable to reset channel %u (%uMhz) "
+                                "flags 0x%x hal status %u\n", __func__,
+                                ath9k_hw_mhz2ieee(ah, hchan->channel,
+                                                  hchan->channelFlags),
+                                hchan->channel, hchan->channelFlags, status);
+                        spin_unlock_bh(&sc->sc_resetlock);
+                        return -EIO;
+                }
+                spin_unlock_bh(&sc->sc_resetlock);
+
+                sc->sc_curchan = *hchan;
+                sc->sc_update_chainmask = 0;
+                sc->sc_full_reset = 0;
+
+                /* Re-enable rx framework */
+                if (ath_startrecv(sc) != 0) {
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: unable to restart recv logic\n", __func__);
+                        return -EIO;
+                }
+                /*
+                 * Change channels and update the h/w rate map
+                 * if we're switching; e.g. 11a to 11b/g.
+                 */
+                ath_setcurmode(sc, ath_chan2mode(hchan));
+
+                ath_update_txpow(sc);   /* update tx power state */
+                /*
+                 * Re-enable interrupts.
+                 */
+                ath9k_hw_set_interrupts(ah, sc->sc_imask);
+        }
+        return 0;
+}
+
+/**********************/
+/* Chainmask Handling */
+/**********************/
+
+static void ath_chainmask_sel_timertimeout(unsigned long data)
+{
+        struct ath_chainmask_sel *cm = (struct ath_chainmask_sel *)data;
+        cm->switch_allowed = 1;
+}
+
+/* Start chainmask select timer */
+static void ath_chainmask_sel_timerstart(struct ath_chainmask_sel *cm)
+{
+        cm->switch_allowed = 0;
+        mod_timer(&cm->timer, ath_chainmask_sel_period);
+}
+
+/* Stop chainmask select timer */
+static void ath_chainmask_sel_timerstop(struct ath_chainmask_sel *cm)
+{
+        cm->switch_allowed = 0;
+        del_timer_sync(&cm->timer);
+}
+
+static void ath_chainmask_sel_init(struct ath_softc *sc, struct ath_node *an)
+{
+        struct ath_chainmask_sel *cm = &an->an_chainmask_sel;
+
+        memzero(cm, sizeof(struct ath_chainmask_sel));
+
+        cm->cur_tx_mask = sc->sc_tx_chainmask;
+        cm->cur_rx_mask = sc->sc_rx_chainmask;
+        cm->tx_avgrssi = ATH_RSSI_DUMMY_MARKER;
+        setup_timer(&cm->timer,
+                ath_chainmask_sel_timertimeout, (unsigned long) cm);
+}
+
+int ath_chainmask_sel_logic(struct ath_softc *sc, struct ath_node *an)
+{
+        struct ath_chainmask_sel *cm = &an->an_chainmask_sel;
+
+        /*
+         * Disable auto-swtiching in one of the following if conditions.
+         * sc_chainmask_auto_sel is used for internal global auto-switching
+         * enabled/disabled setting
+         */
+        if (sc->sc_ah->ah_caps.tx_chainmask != ATH_CHAINMASK_SEL_3X3) {
+                cm->cur_tx_mask = sc->sc_tx_chainmask;
+                return cm->cur_tx_mask;
+        }
+
+        if (cm->tx_avgrssi == ATH_RSSI_DUMMY_MARKER)
+                return cm->cur_tx_mask;
+
+        if (cm->switch_allowed) {
+                /* Switch down from tx 3 to tx 2. */
+                if (cm->cur_tx_mask == ATH_CHAINMASK_SEL_3X3 &&
+                    ATH_RSSI_OUT(cm->tx_avgrssi) >=
+                    ath_chainmask_sel_down_rssi_thres) {
+                        cm->cur_tx_mask = sc->sc_tx_chainmask;
+
+                        /* Don't let another switch happen until
+                         * this timer expires */
+                        ath_chainmask_sel_timerstart(cm);
+                }
+                /* Switch up from tx 2 to 3. */
+                else if (cm->cur_tx_mask == sc->sc_tx_chainmask &&
+                         ATH_RSSI_OUT(cm->tx_avgrssi) <=
+                         ath_chainmask_sel_up_rssi_thres) {
+                        cm->cur_tx_mask = ATH_CHAINMASK_SEL_3X3;
+
+                        /* Don't let another switch happen
+                         * until this timer expires */
+                        ath_chainmask_sel_timerstart(cm);
+                }
+        }
+
+        return cm->cur_tx_mask;
+}
+
+/*
+ * Update tx/rx chainmask. For legacy association,
+ * hard code chainmask to 1x1, for 11n association, use
+ * the chainmask configuration.
+ */
+
+void ath_update_chainmask(struct ath_softc *sc, int is_ht)
+{
+        sc->sc_update_chainmask = 1;
+        if (is_ht) {
+                sc->sc_tx_chainmask = sc->sc_ah->ah_caps.tx_chainmask;
+                sc->sc_rx_chainmask = sc->sc_ah->ah_caps.rx_chainmask;
+        } else {
+                sc->sc_tx_chainmask = 1;
+                sc->sc_rx_chainmask = 1;
+        }
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: tx chmask: %d, rx chmask: %d\n",
+                __func__, sc->sc_tx_chainmask, sc->sc_rx_chainmask);
+}
+
+/******************/
+/* VAP management */
+/******************/
+
+/*
+ *  VAP in Listen mode
+ *
+ *  This routine brings the VAP out of the down state into a "listen" state
+ *  where it waits for association requests.  This is used in AP and AdHoc
+ *  modes.
+*/
+
+int ath_vap_listen(struct ath_softc *sc, int if_id)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_vap *avp;
+        u32 rfilt = 0;
+        DECLARE_MAC_BUF(mac);
+
+        avp = sc->sc_vaps[if_id];
+        if (avp == NULL) {
+                DPRINTF(sc, ATH_DBG_FATAL, "%s: invalid interface id %u\n",
+                        __func__, if_id);
+                return -EINVAL;
+        }
+
+#ifdef CONFIG_SLOW_ANT_DIV
+        ath_slow_ant_div_stop(&sc->sc_antdiv);
+#endif
+
+        /* update ratectrl about the new state */
+        ath_rate_newstate(sc, avp);
+
+        rfilt = ath_calcrxfilter(sc);
+        ath9k_hw_setrxfilter(ah, rfilt);
+
+        if (sc->sc_opmode == ATH9K_M_STA || sc->sc_opmode == ATH9K_M_IBSS) {
+                memcpy(sc->sc_curbssid, ath_bcast_mac, ETH_ALEN);
+                ath9k_hw_write_associd(ah, sc->sc_curbssid, sc->sc_curaid);
+        } else
+                sc->sc_curaid = 0;
+
+        DPRINTF(sc, ATH_DBG_CONFIG,
+                "%s: RX filter 0x%x bssid %s aid 0x%x\n",
+                __func__, rfilt, print_mac(mac,
+                        sc->sc_curbssid), sc->sc_curaid);
+
+        /*
+         * XXXX
+         * Disable BMISS interrupt when we're not associated
+         */
+        ath9k_hw_set_interrupts(ah,
+                sc->sc_imask & ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
+        sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
+        /* need to reconfigure the beacons when it moves to RUN */
+        sc->sc_beacons = 0;
+
+        return 0;
+}
+
+int ath_vap_attach(struct ath_softc *sc,
+                   int if_id,
+                   struct ieee80211_vif *if_data,
+                   enum ath9k_opmode opmode)
+{
+        struct ath_vap *avp;
+
+        if (if_id >= ATH_BCBUF || sc->sc_vaps[if_id] != NULL) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: Invalid interface id = %u\n", __func__, if_id);
+                return -EINVAL;
+        }
+
+        switch (opmode) {
+        case ATH9K_M_STA:
+        case ATH9K_M_IBSS:
+        case ATH9K_M_MONITOR:
+                break;
+        case ATH9K_M_HOSTAP:
+                /* XXX not right, beacon buffer is allocated on RUN trans */
+                if (list_empty(&sc->sc_bbuf))
+                        return -ENOMEM;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        /* create ath_vap */
+        avp = kmalloc(sizeof(struct ath_vap), GFP_KERNEL);
+        if (avp == NULL)
+                return -ENOMEM;
+
+        memzero(avp, sizeof(struct ath_vap));
+        avp->av_if_data = if_data;
+        /* Set the VAP opmode */
+        avp->av_opmode = opmode;
+        avp->av_bslot = -1;
+        INIT_LIST_HEAD(&avp->av_mcastq.axq_q);
+        INIT_LIST_HEAD(&avp->av_mcastq.axq_acq);
+        spin_lock_init(&avp->av_mcastq.axq_lock);
+
+        ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
+
+        sc->sc_vaps[if_id] = avp;
+        sc->sc_nvaps++;
+        /* Set the device opmode */
+        sc->sc_opmode = opmode;
+
+        /* default VAP configuration */
+        avp->av_config.av_fixed_rateset = IEEE80211_FIXED_RATE_NONE;
+        avp->av_config.av_fixed_retryset = 0x03030303;
+
+        return 0;
+}
+
+int ath_vap_detach(struct ath_softc *sc, int if_id)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_vap *avp;
+
+        avp = sc->sc_vaps[if_id];
+        if (avp == NULL) {
+                DPRINTF(sc, ATH_DBG_FATAL, "%s: invalid interface id %u\n",
+                        __func__, if_id);
+                return -EINVAL;
+        }
+
+        /*
+         * Quiesce the hardware while we remove the vap.  In
+         * particular we need to reclaim all references to the
+         * vap state by any frames pending on the tx queues.
+         *
+         * XXX can we do this w/o affecting other vap's?
+         */
+        ath9k_hw_set_interrupts(ah, 0); /* disable interrupts */
+        ath_draintxq(sc, false);        /* stop xmit side */
+        ath_stoprecv(sc);       /* stop recv side */
+        ath_flushrecv(sc);      /* flush recv queue */
+
+        /* Reclaim any pending mcast bufs on the vap. */
+        ath_tx_draintxq(sc, &avp->av_mcastq, false);
+
+        kfree(avp);
+        sc->sc_vaps[if_id] = NULL;
+        sc->sc_nvaps--;
+
+        return 0;
+}
+
+int ath_vap_config(struct ath_softc *sc,
+        int if_id, struct ath_vap_config *if_config)
+{
+        struct ath_vap *avp;
+
+        if (if_id >= ATH_BCBUF) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: Invalid interface id = %u\n", __func__, if_id);
+                return -EINVAL;
+        }
+
+        avp = sc->sc_vaps[if_id];
+        ASSERT(avp != NULL);
+
+        if (avp)
+                memcpy(&avp->av_config, if_config, sizeof(avp->av_config));
+
+        return 0;
+}
+
+/********/
+/* Core */
+/********/
+
+int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        int status;
+        int error = 0;
+        enum ath9k_ht_macmode ht_macmode = ath_cwm_macmode(sc);
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: mode %d\n", __func__, sc->sc_opmode);
+
+        /*
+         * Stop anything previously setup.  This is safe
+         * whether this is the first time through or not.
+         */
+        ath_stop(sc);
+
+        /* Initialize chanmask selection */
+        sc->sc_tx_chainmask = ah->ah_caps.tx_chainmask;
+        sc->sc_rx_chainmask = ah->ah_caps.rx_chainmask;
+
+        /* Reset SERDES registers */
+        ath9k_hw_configpcipowersave(ah, 0);
+
+        /*
+         * The basic interface to setting the hardware in a good
+         * state is ``reset''.  On return the hardware is known to
+         * be powered up and with interrupts disabled.  This must
+         * be followed by initialization of the appropriate bits
+         * and then setup of the interrupt mask.
+         */
+        sc->sc_curchan = *initial_chan;
+
+        spin_lock_bh(&sc->sc_resetlock);
+        if (!ath9k_hw_reset(ah, sc->sc_opmode, &sc->sc_curchan, ht_macmode,
+                           sc->sc_tx_chainmask, sc->sc_rx_chainmask,
+                           sc->sc_ht_extprotspacing, false, &status)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to reset hardware; hal status %u "
+                        "(freq %u flags 0x%x)\n", __func__, status,
+                        sc->sc_curchan.channel, sc->sc_curchan.channelFlags);
+                error = -EIO;
+                spin_unlock_bh(&sc->sc_resetlock);
+                goto done;
+        }
+        spin_unlock_bh(&sc->sc_resetlock);
+        /*
+         * This is needed only to setup initial state
+         * but it's best done after a reset.
+         */
+        ath_update_txpow(sc);
+
+        /*
+         * Setup the hardware after reset:
+         * The receive engine is set going.
+         * Frame transmit is handled entirely
+         * in the frame output path; there's nothing to do
+         * here except setup the interrupt mask.
+         */
+        if (ath_startrecv(sc) != 0) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to start recv logic\n", __func__);
+                error = -EIO;
+                goto done;
+        }
+        /* Setup our intr mask. */
+        sc->sc_imask = ATH9K_INT_RX | ATH9K_INT_TX
+                | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
+                | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
+
+        if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_GTT)
+                sc->sc_imask |= ATH9K_INT_GTT;
+
+        if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
+                sc->sc_imask |= ATH9K_INT_CST;
+
+        /*
+         * Enable MIB interrupts when there are hardware phy counters.
+         * Note we only do this (at the moment) for station mode.
+         */
+        if (ath9k_hw_phycounters(ah) &&
+            ((sc->sc_opmode == ATH9K_M_STA) || (sc->sc_opmode == ATH9K_M_IBSS)))
+                sc->sc_imask |= ATH9K_INT_MIB;
+        /*
+         * Some hardware processes the TIM IE and fires an
+         * interrupt when the TIM bit is set.  For hardware
+         * that does, if not overridden by configuration,
+         * enable the TIM interrupt when operating as station.
+         */
+        if ((ah->ah_caps.hw_caps & ATH9K_HW_CAP_ENHANCEDPM) &&
+            (sc->sc_opmode == ATH9K_M_STA) &&
+            !sc->sc_config.swBeaconProcess)
+                sc->sc_imask |= ATH9K_INT_TIM;
+        /*
+         *  Don't enable interrupts here as we've not yet built our
+         *  vap and node data structures, which will be needed as soon
+         *  as we start receiving.
+         */
+        ath_setcurmode(sc, ath_chan2mode(initial_chan));
+
+        /* XXX: we must make sure h/w is ready and clear invalid flag
+         * before turning on interrupt. */
+        sc->sc_invalid = 0;
+done:
+        return error;
+}
+
+/*
+ * Reset the hardware w/o losing operational state.  This is
+ * basically a more efficient way of doing ath_stop, ath_init,
+ * followed by state transitions to the current 802.11
+ * operational state.  Used to recover from errors rx overrun
+ * and to reset the hardware when rf gain settings must be reset.
+ */
+
+static int ath_reset_start(struct ath_softc *sc, u32 flag)
+{
+        struct ath_hal *ah = sc->sc_ah;
+
+        ath9k_hw_set_interrupts(ah, 0); /* disable interrupts */
+        ath_draintxq(sc, flag & RESET_RETRY_TXQ);       /* stop xmit side */
+        ath_stoprecv(sc);       /* stop recv side */
+        ath_flushrecv(sc);      /* flush recv queue */
+
+        return 0;
+}
+
+static int ath_reset_end(struct ath_softc *sc, u32 flag)
+{
+        struct ath_hal *ah = sc->sc_ah;
+
+        if (ath_startrecv(sc) != 0)     /* restart recv */
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to start recv logic\n", __func__);
+
+        /*
+         * We may be doing a reset in response to a request
+         * that changes the channel so update any state that
+         * might change as a result.
+         */
+        ath_setcurmode(sc, ath_chan2mode(&sc->sc_curchan));
+
+        ath_update_txpow(sc);   /* update tx power state */
+
+        if (sc->sc_beacons)
+                ath_beacon_config(sc, ATH_IF_ID_ANY);   /* restart beacons */
+        ath9k_hw_set_interrupts(ah, sc->sc_imask);
+
+        /* Restart the txq */
+        if (flag & RESET_RETRY_TXQ) {
+                int i;
+                for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+                        if (ATH_TXQ_SETUP(sc, i)) {
+                                spin_lock_bh(&sc->sc_txq[i].axq_lock);
+                                ath_txq_schedule(sc, &sc->sc_txq[i]);
+                                spin_unlock_bh(&sc->sc_txq[i].axq_lock);
+                        }
+                }
+        }
+        return 0;
+}
+
+int ath_reset(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        int status;
+        int error = 0;
+        enum ath9k_ht_macmode ht_macmode = ath_cwm_macmode(sc);
+
+        /* NB: indicate channel change so we do a full reset */
+        spin_lock_bh(&sc->sc_resetlock);
+        if (!ath9k_hw_reset(ah, sc->sc_opmode, &sc->sc_curchan,
+                           ht_macmode,
+                           sc->sc_tx_chainmask, sc->sc_rx_chainmask,
+                           sc->sc_ht_extprotspacing, false, &status)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to reset hardware; hal status %u\n",
+                        __func__, status);
+                error = -EIO;
+        }
+        spin_unlock_bh(&sc->sc_resetlock);
+
+        return error;
+}
+
+int ath_suspend(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+
+        /* No I/O if device has been surprise removed */
+        if (sc->sc_invalid)
+                return -EIO;
+
+        /* Shut off the interrupt before setting sc->sc_invalid to '1' */
+        ath9k_hw_set_interrupts(ah, 0);
+
+        /* XXX: we must make sure h/w will not generate any interrupt
+         * before setting the invalid flag. */
+        sc->sc_invalid = 1;
+
+        /* disable HAL and put h/w to sleep */
+        ath9k_hw_disable(sc->sc_ah);
+
+        ath9k_hw_configpcipowersave(sc->sc_ah, 1);
+
+        return 0;
+}
+
+/* Interrupt handler.  Most of the actual processing is deferred.
+ * It's the caller's responsibility to ensure the chip is awake. */
+
+irqreturn_t ath_isr(int irq, void *dev)
+{
+        struct ath_softc *sc = dev;
+        struct ath_hal *ah = sc->sc_ah;
+        enum ath9k_int status;
+        bool sched = false;
+
+        do {
+                if (sc->sc_invalid) {
+                        /*
+                         * The hardware is not ready/present, don't
+                         * touch anything. Note this can happen early
+                         * on if the IRQ is shared.
+                         */
+                        return IRQ_NONE;
+                }
+                if (!ath9k_hw_intrpend(ah)) {   /* shared irq, not for us */
+                        return IRQ_NONE;
+                }
+
+                /*
+                 * Figure out the reason(s) for the interrupt.  Note
+                 * that the hal returns a pseudo-ISR that may include
+                 * bits we haven't explicitly enabled so we mask the
+                 * value to insure we only process bits we requested.
+                 */
+                ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
+
+                status &= sc->sc_imask; /* discard unasked-for bits */
+
+                /*
+                 * If there are no status bits set, then this interrupt was not
+                 * for me (should have been caught above).
+                 */
+
+                if (!status)
+                        return IRQ_NONE;
+
+                sc->sc_intrstatus = status;
+
+                if (status & ATH9K_INT_FATAL) {
+                        /* need a chip reset */
+                        sched = true;
+                } else if (status & ATH9K_INT_RXORN) {
+                        /* need a chip reset */
+                        sched = true;
+                } else {
+                        if (status & ATH9K_INT_SWBA) {
+                                /* schedule a tasklet for beacon handling */
+                                tasklet_schedule(&sc->bcon_tasklet);
+                        }
+                        if (status & ATH9K_INT_RXEOL) {
+                                /*
+                                 * NB: the hardware should re-read the link when
+                                 *     RXE bit is written, but it doesn't work
+                                 *     at least on older hardware revs.
+                                 */
+                                sched = true;
+                        }
+
+                        if (status & ATH9K_INT_TXURN)
+                                /* bump tx trigger level */
+                                ath9k_hw_updatetxtriglevel(ah, true);
+                        /* XXX: optimize this */
+                        if (status & ATH9K_INT_RX)
+                                sched = true;
+                        if (status & ATH9K_INT_TX)
+                                sched = true;
+                        if (status & ATH9K_INT_BMISS)
+                                sched = true;
+                        /* carrier sense timeout */
+                        if (status & ATH9K_INT_CST)
+                                sched = true;
+                        if (status & ATH9K_INT_MIB) {
+                                /*
+                                 * Disable interrupts until we service the MIB
+                                 * interrupt; otherwise it will continue to
+                                 * fire.
+                                 */
+                                ath9k_hw_set_interrupts(ah, 0);
+                                /*
+                                 * Let the hal handle the event. We assume
+                                 * it will clear whatever condition caused
+                                 * the interrupt.
+                                 */
+                                ath9k_hw_procmibevent(ah, &sc->sc_halstats);
+                                ath9k_hw_set_interrupts(ah, sc->sc_imask);
+                        }
+                        if (status & ATH9K_INT_TIM_TIMER) {
+                                if (!(ah->ah_caps.hw_caps &
+                                      ATH9K_HW_CAP_AUTOSLEEP)) {
+                                        /* Clear RxAbort bit so that we can
+                                         * receive frames */
+                                        ath9k_hw_setrxabort(ah, 0);
+                                        sched = true;
+                                }
+                        }
+                }
+        } while (0);
+
+        if (sched) {
+                /* turn off every interrupt except SWBA */
+                ath9k_hw_set_interrupts(ah, (sc->sc_imask & ATH9K_INT_SWBA));
+                tasklet_schedule(&sc->intr_tq);
+        }
+
+        return IRQ_HANDLED;
+}
+
+/* Deferred interrupt processing  */
+
+static void ath9k_tasklet(unsigned long data)
+{
+        struct ath_softc *sc = (struct ath_softc *)data;
+        u32 status = sc->sc_intrstatus;
+
+        if (status & ATH9K_INT_FATAL) {
+                /* need a chip reset */
+                ath_internal_reset(sc);
+                return;
+        } else {
+
+                if (status &
+                    (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
+                        /* XXX: fill me in */
+                        /*
+                        if (status & ATH9K_INT_RXORN) {
+                        }
+                        if (status & ATH9K_INT_RXEOL) {
+                        }
+                        */
+                        spin_lock_bh(&sc->sc_rxflushlock);
+                        ath_rx_tasklet(sc, 0);
+                        spin_unlock_bh(&sc->sc_rxflushlock);
+                }
+                /* XXX: optimize this */
+                if (status & ATH9K_INT_TX)
+                        ath_tx_tasklet(sc);
+                /* XXX: fill me in */
+                /*
+                if (status & ATH9K_INT_BMISS) {
+                }
+                if (status & (ATH9K_INT_TIM | ATH9K_INT_DTIMSYNC)) {
+                        if (status & ATH9K_INT_TIM) {
+                        }
+                        if (status & ATH9K_INT_DTIMSYNC) {
+                        }
+                }
+                */
+        }
+
+        /* re-enable hardware interrupt */
+        ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask);
+}
+
+int ath_init(u16 devid, struct ath_softc *sc)
+{
+        struct ath_hal *ah = NULL;
+        int status;
+        int error = 0, i;
+        int csz = 0;
+        u32 rd;
+
+        /* XXX: hardware will not be ready until ath_open() being called */
+        sc->sc_invalid = 1;
+
+        sc->sc_debug = DBG_DEFAULT;
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: devid 0x%x\n", __func__, devid);
+
+        /* Initialize tasklet */
+        tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
+        tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
+                     (unsigned long)sc);
+
+        /*
+         * Cache line size is used to size and align various
+         * structures used to communicate with the hardware.
+         */
+        bus_read_cachesize(sc, &csz);
+        /* XXX assert csz is non-zero */
+        sc->sc_cachelsz = csz << 2;     /* convert to bytes */
+
+        spin_lock_init(&sc->sc_resetlock);
+
+        ah = ath9k_hw_attach(devid, sc, sc->mem, &status);
+        if (ah == NULL) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to attach hardware; HAL status %u\n",
+                        __func__, status);
+                error = -ENXIO;
+                goto bad;
+        }
+        sc->sc_ah = ah;
+
+        /* Get the chipset-specific aggr limit. */
+        sc->sc_rtsaggrlimit = ah->ah_caps.rts_aggr_limit;
+
+        /* Get the hardware key cache size. */
+        sc->sc_keymax = ah->ah_caps.keycache_size;
+        if (sc->sc_keymax > ATH_KEYMAX) {
+                DPRINTF(sc, ATH_DBG_KEYCACHE,
+                        "%s: Warning, using only %u entries in %u key cache\n",
+                        __func__, ATH_KEYMAX, sc->sc_keymax);
+                sc->sc_keymax = ATH_KEYMAX;
+        }
+
+        /*
+         * Reset the key cache since some parts do not
+         * reset the contents on initial power up.
+         */
+        for (i = 0; i < sc->sc_keymax; i++)
+                ath9k_hw_keyreset(ah, (u16) i);
+        /*
+         * Mark key cache slots associated with global keys
+         * as in use.  If we knew TKIP was not to be used we
+         * could leave the +32, +64, and +32+64 slots free.
+         * XXX only for splitmic.
+         */
+        for (i = 0; i < IEEE80211_WEP_NKID; i++) {
+                set_bit(i, sc->sc_keymap);
+                set_bit(i + 32, sc->sc_keymap);
+                set_bit(i + 64, sc->sc_keymap);
+                set_bit(i + 32 + 64, sc->sc_keymap);
+        }
+        /*
+         * Collect the channel list using the default country
+         * code and including outdoor channels.  The 802.11 layer
+         * is resposible for filtering this list based on settings
+         * like the phy mode.
+         */
+        rd = ah->ah_currentRD;
+
+        error = ath_setup_channels(sc);
+        if (error)
+                goto bad;
+
+        /* default to STA mode */
+        sc->sc_opmode = ATH9K_M_MONITOR;
+
+        /* Setup rate tables */
+
+        ath_setup_rates(sc, IEEE80211_BAND_2GHZ);
+        ath_setup_rates(sc, IEEE80211_BAND_5GHZ);
+
+        /* NB: setup here so ath_rate_update is happy */
+        ath_setcurmode(sc, ATH9K_MODE_11A);
+
+        /*
+         * Allocate hardware transmit queues: one queue for
+         * beacon frames and one data queue for each QoS
+         * priority.  Note that the hal handles reseting
+         * these queues at the needed time.
+         */
+        sc->sc_bhalq = ath_beaconq_setup(ah);
+        if (sc->sc_bhalq == -1) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to setup a beacon xmit queue\n", __func__);
+                error = -EIO;
+                goto bad2;
+        }
+        sc->sc_cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
+        if (sc->sc_cabq == NULL) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to setup CAB xmit queue\n", __func__);
+                error = -EIO;
+                goto bad2;
+        }
+
+        sc->sc_config.cabqReadytime = ATH_CABQ_READY_TIME;
+        ath_cabq_update(sc);
+
+        for (i = 0; i < ARRAY_SIZE(sc->sc_haltype2q); i++)
+                sc->sc_haltype2q[i] = -1;
+
+        /* Setup data queues */
+        /* NB: ensure BK queue is the lowest priority h/w queue */
+        if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to setup xmit queue for BK traffic\n",
+                        __func__);
+                error = -EIO;
+                goto bad2;
+        }
+
+        if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to setup xmit queue for BE traffic\n",
+                        __func__);
+                error = -EIO;
+                goto bad2;
+        }
+        if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to setup xmit queue for VI traffic\n",
+                        __func__);
+                error = -EIO;
+                goto bad2;
+        }
+        if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to setup xmit queue for VO traffic\n",
+                        __func__);
+                error = -EIO;
+                goto bad2;
+        }
+
+        sc->sc_rc = ath_rate_attach(ah);
+        if (sc->sc_rc == NULL) {
+                error = EIO;
+                goto bad2;
+        }
+
+        if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
+                                   ATH9K_CIPHER_TKIP, NULL)) {
+                /*
+                 * Whether we should enable h/w TKIP MIC.
+                 * XXX: if we don't support WME TKIP MIC, then we wouldn't
+                 * report WMM capable, so it's always safe to turn on
+                 * TKIP MIC in this case.
+                 */
+                ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC,
+                                       0, 1, NULL);
+        }
+
+        /*
+         * Check whether the separate key cache entries
+         * are required to handle both tx+rx MIC keys.
+         * With split mic keys the number of stations is limited
+         * to 27 otherwise 59.
+         */
+        if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
+                                   ATH9K_CIPHER_TKIP, NULL)
+            && ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
+                                      ATH9K_CIPHER_MIC, NULL)
+            && ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT,
+                                      0, NULL))
+                sc->sc_splitmic = 1;
+
+        /* turn on mcast key search if possible */
+        if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
+                (void)ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1,
+                                             1, NULL);
+
+        sc->sc_config.txpowlimit = ATH_TXPOWER_MAX;
+        sc->sc_config.txpowlimit_override = 0;
+
+        /* 11n Capabilities */
+        if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
+                sc->sc_txaggr = 1;
+                sc->sc_rxaggr = 1;
+        }
+
+        sc->sc_tx_chainmask = ah->ah_caps.tx_chainmask;
+        sc->sc_rx_chainmask = ah->ah_caps.rx_chainmask;
+
+        /* Configuration for rx chain detection */
+        sc->sc_rxchaindetect_ref = 0;
+        sc->sc_rxchaindetect_thresh5GHz = 35;
+        sc->sc_rxchaindetect_thresh2GHz = 35;
+        sc->sc_rxchaindetect_delta5GHz = 30;
+        sc->sc_rxchaindetect_delta2GHz = 30;
+
+        ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, true, NULL);
+        sc->sc_defant = ath9k_hw_getdefantenna(ah);
+
+        ath9k_hw_getmac(ah, sc->sc_myaddr);
+        if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) {
+                ath9k_hw_getbssidmask(ah, sc->sc_bssidmask);
+                ATH_SET_VAP_BSSID_MASK(sc->sc_bssidmask);
+                ath9k_hw_setbssidmask(ah, sc->sc_bssidmask);
+        }
+        sc->sc_slottime = ATH9K_SLOT_TIME_9;    /* default to short slot time */
+
+        /* initialize beacon slots */
+        for (i = 0; i < ARRAY_SIZE(sc->sc_bslot); i++)
+                sc->sc_bslot[i] = ATH_IF_ID_ANY;
+
+        /* save MISC configurations */
+        sc->sc_config.swBeaconProcess = 1;
+
+#ifdef CONFIG_SLOW_ANT_DIV
+        /* range is 40 - 255, we use something in the middle */
+        ath_slow_ant_div_init(&sc->sc_antdiv, sc, 0x127);
+#endif
+
+        return 0;
+bad2:
+        /* cleanup tx queues */
+        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
+                if (ATH_TXQ_SETUP(sc, i))
+                        ath_tx_cleanupq(sc, &sc->sc_txq[i]);
+bad:
+        if (ah)
+                ath9k_hw_detach(ah);
+        return error;
+}
+
+void ath_deinit(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        int i;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s\n", __func__);
+
+        ath_stop(sc);
+        if (!sc->sc_invalid)
+                ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
+        ath_rate_detach(sc->sc_rc);
+        /* cleanup tx queues */
+        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
+                if (ATH_TXQ_SETUP(sc, i))
+                        ath_tx_cleanupq(sc, &sc->sc_txq[i]);
+        ath9k_hw_detach(ah);
+}
+
+/*******************/
+/* Node Management */
+/*******************/
+
+struct ath_node *ath_node_attach(struct ath_softc *sc, u8 *addr, int if_id)
+{
+        struct ath_vap *avp;
+        struct ath_node *an;
+        DECLARE_MAC_BUF(mac);
+
+        avp = sc->sc_vaps[if_id];
+        ASSERT(avp != NULL);
+
+        /* mac80211 sta_notify callback is from an IRQ context, so no sleep */
+        an = kmalloc(sizeof(struct ath_node), GFP_ATOMIC);
+        if (an == NULL)
+                return NULL;
+        memzero(an, sizeof(*an));
+
+        an->an_sc = sc;
+        memcpy(an->an_addr, addr, ETH_ALEN);
+        atomic_set(&an->an_refcnt, 1);
+
+        /* set up per-node tx/rx state */
+        ath_tx_node_init(sc, an);
+        ath_rx_node_init(sc, an);
+
+        ath_chainmask_sel_init(sc, an);
+        ath_chainmask_sel_timerstart(&an->an_chainmask_sel);
+        list_add(&an->list, &sc->node_list);
+
+        return an;
+}
+
+void ath_node_detach(struct ath_softc *sc, struct ath_node *an, bool bh_flag)
+{
+        unsigned long flags;
+
+        DECLARE_MAC_BUF(mac);
+
+        ath_chainmask_sel_timerstop(&an->an_chainmask_sel);
+        an->an_flags |= ATH_NODE_CLEAN;
+        ath_tx_node_cleanup(sc, an, bh_flag);
+        ath_rx_node_cleanup(sc, an);
+
+        ath_tx_node_free(sc, an);
+        ath_rx_node_free(sc, an);
+
+        spin_lock_irqsave(&sc->node_lock, flags);
+
+        list_del(&an->list);
+
+        spin_unlock_irqrestore(&sc->node_lock, flags);
+
+        kfree(an);
+}
+
+/* Finds a node and increases the refcnt if found */
+
+struct ath_node *ath_node_get(struct ath_softc *sc, u8 *addr)
+{
+        struct ath_node *an = NULL, *an_found = NULL;
+
+        if (list_empty(&sc->node_list)) /* FIXME */
+                goto out;
+        list_for_each_entry(an, &sc->node_list, list) {
+                if (!compare_ether_addr(an->an_addr, addr)) {
+                        atomic_inc(&an->an_refcnt);
+                        an_found = an;
+                        break;
+                }
+        }
+out:
+        return an_found;
+}
+
+/* Decrements the refcnt and if it drops to zero, detach the node */
+
+void ath_node_put(struct ath_softc *sc, struct ath_node *an, bool bh_flag)
+{
+        if (atomic_dec_and_test(&an->an_refcnt))
+                ath_node_detach(sc, an, bh_flag);
+}
+
+/* Finds a node, doesn't increment refcnt. Caller must hold sc->node_lock */
+struct ath_node *ath_node_find(struct ath_softc *sc, u8 *addr)
+{
+        struct ath_node *an = NULL, *an_found = NULL;
+
+        if (list_empty(&sc->node_list))
+                return NULL;
+
+        list_for_each_entry(an, &sc->node_list, list)
+                if (!compare_ether_addr(an->an_addr, addr)) {
+                        an_found = an;
+                        break;
+                }
+
+        return an_found;
+}
+
+/*
+ * Set up New Node
+ *
+ * Setup driver-specific state for a newly associated node.  This routine
+ * really only applies if compression or XR are enabled, there is no code
+ * covering any other cases.
+*/
+
+void ath_newassoc(struct ath_softc *sc,
+        struct ath_node *an, int isnew, int isuapsd)
+{
+        int tidno;
+
+        /* if station reassociates, tear down the aggregation state. */
+        if (!isnew) {
+                for (tidno = 0; tidno < WME_NUM_TID; tidno++) {
+                        if (sc->sc_txaggr)
+                                ath_tx_aggr_teardown(sc, an, tidno);
+                        if (sc->sc_rxaggr)
+                                ath_rx_aggr_teardown(sc, an, tidno);
+                }
+        }
+        an->an_flags = 0;
+}
+
+/**************/
+/* Encryption */
+/**************/
+
+void ath_key_reset(struct ath_softc *sc, u16 keyix, int freeslot)
+{
+        ath9k_hw_keyreset(sc->sc_ah, keyix);
+        if (freeslot)
+                clear_bit(keyix, sc->sc_keymap);
+}
+
+int ath_keyset(struct ath_softc *sc,
+               u16 keyix,
+               struct ath9k_keyval *hk,
+               const u8 mac[ETH_ALEN])
+{
+        bool status;
+
+        status = ath9k_hw_set_keycache_entry(sc->sc_ah,
+                keyix, hk, mac, false);
+
+        return status != false;
+}
+
+/***********************/
+/* TX Power/Regulatory */
+/***********************/
+
+/*
+ *  Set Transmit power in HAL
+ *
+ *  This routine makes the actual HAL calls to set the new transmit power
+ *  limit.
+*/
+
+void ath_update_txpow(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        u32 txpow;
+
+        if (sc->sc_curtxpow != sc->sc_config.txpowlimit) {
+                ath9k_hw_set_txpowerlimit(ah, sc->sc_config.txpowlimit);
+                /* read back in case value is clamped */
+                ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
+                sc->sc_curtxpow = txpow;
+        }
+}
+
+/* Return the current country and domain information */
+void ath_get_currentCountry(struct ath_softc *sc,
+        struct ath9k_country_entry *ctry)
+{
+        ath9k_regd_get_current_country(sc->sc_ah, ctry);
+
+        /* If HAL not specific yet, since it is band dependent,
+         * use the one we passed in. */
+        if (ctry->countryCode == CTRY_DEFAULT) {
+                ctry->iso[0] = 0;
+                ctry->iso[1] = 0;
+        } else if (ctry->iso[0] && ctry->iso[1]) {
+                if (!ctry->iso[2]) {
+                        if (ath_outdoor)
+                                ctry->iso[2] = 'O';
+                        else
+                                ctry->iso[2] = 'I';
+                }
+        }
+}
+
+/**************************/
+/* Slow Antenna Diversity */
+/**************************/
+
+void ath_slow_ant_div_init(struct ath_antdiv *antdiv,
+                           struct ath_softc *sc,
+                           int32_t rssitrig)
+{
+        int trig;
+
+        /* antdivf_rssitrig can range from 40 - 0xff */
+        trig = (rssitrig > 0xff) ? 0xff : rssitrig;
+        trig = (rssitrig < 40) ? 40 : rssitrig;
+
+        antdiv->antdiv_sc = sc;
+        antdiv->antdivf_rssitrig = trig;
+}
+
+void ath_slow_ant_div_start(struct ath_antdiv *antdiv,
+                            u8 num_antcfg,
+                            const u8 *bssid)
+{
+        antdiv->antdiv_num_antcfg =
+                num_antcfg < ATH_ANT_DIV_MAX_CFG ?
+                num_antcfg : ATH_ANT_DIV_MAX_CFG;
+        antdiv->antdiv_state = ATH_ANT_DIV_IDLE;
+        antdiv->antdiv_curcfg = 0;
+        antdiv->antdiv_bestcfg = 0;
+        antdiv->antdiv_laststatetsf = 0;
+
+        memcpy(antdiv->antdiv_bssid, bssid, sizeof(antdiv->antdiv_bssid));
+
+        antdiv->antdiv_start = 1;
+}
+
+void ath_slow_ant_div_stop(struct ath_antdiv *antdiv)
+{
+        antdiv->antdiv_start = 0;
+}
+
+static int32_t ath_find_max_val(int32_t *val,
+        u8 num_val, u8 *max_index)
+{
+        u32 MaxVal = *val++;
+        u32 cur_index = 0;
+
+        *max_index = 0;
+        while (++cur_index < num_val) {
+                if (*val > MaxVal) {
+                        MaxVal = *val;
+                        *max_index = cur_index;
+                }
+
+                val++;
+        }
+
+        return MaxVal;
+}
+
+void ath_slow_ant_div(struct ath_antdiv *antdiv,
+                      struct ieee80211_hdr *hdr,
+                      struct ath_rx_status *rx_stats)
+{
+        struct ath_softc *sc = antdiv->antdiv_sc;
+        struct ath_hal *ah = sc->sc_ah;
+        u64 curtsf = 0;
+        u8 bestcfg, curcfg = antdiv->antdiv_curcfg;
+        __le16 fc = hdr->frame_control;
+
+        if (antdiv->antdiv_start && ieee80211_is_beacon(fc)
+            && !compare_ether_addr(hdr->addr3, antdiv->antdiv_bssid)) {
+                antdiv->antdiv_lastbrssi[curcfg] = rx_stats->rs_rssi;
+                antdiv->antdiv_lastbtsf[curcfg] = ath9k_hw_gettsf64(sc->sc_ah);
+                curtsf = antdiv->antdiv_lastbtsf[curcfg];
+        } else {
+                return;
+        }
+
+        switch (antdiv->antdiv_state) {
+        case ATH_ANT_DIV_IDLE:
+                if ((antdiv->antdiv_lastbrssi[curcfg] <
+                     antdiv->antdivf_rssitrig)
+                    && ((curtsf - antdiv->antdiv_laststatetsf) >
+                        ATH_ANT_DIV_MIN_IDLE_US)) {
+
+                        curcfg++;
+                        if (curcfg == antdiv->antdiv_num_antcfg)
+                                curcfg = 0;
+
+                        if (!ath9k_hw_select_antconfig(ah, curcfg)) {
+                                antdiv->antdiv_bestcfg = antdiv->antdiv_curcfg;
+                                antdiv->antdiv_curcfg = curcfg;
+                                antdiv->antdiv_laststatetsf = curtsf;
+                                antdiv->antdiv_state = ATH_ANT_DIV_SCAN;
+                        }
+                }
+                break;
+
+        case ATH_ANT_DIV_SCAN:
+                if ((curtsf - antdiv->antdiv_laststatetsf) <
+                    ATH_ANT_DIV_MIN_SCAN_US)
+                        break;
+
+                curcfg++;
+                if (curcfg == antdiv->antdiv_num_antcfg)
+                        curcfg = 0;
+
+                if (curcfg == antdiv->antdiv_bestcfg) {
+                        ath_find_max_val(antdiv->antdiv_lastbrssi,
+                                   antdiv->antdiv_num_antcfg, &bestcfg);
+                        if (!ath9k_hw_select_antconfig(ah, bestcfg)) {
+                                antdiv->antdiv_bestcfg = bestcfg;
+                                antdiv->antdiv_curcfg = bestcfg;
+                                antdiv->antdiv_laststatetsf = curtsf;
+                                antdiv->antdiv_state = ATH_ANT_DIV_IDLE;
+                        }
+                } else {
+                        if (!ath9k_hw_select_antconfig(ah, curcfg)) {
+                                antdiv->antdiv_curcfg = curcfg;
+                                antdiv->antdiv_laststatetsf = curtsf;
+                                antdiv->antdiv_state = ATH_ANT_DIV_SCAN;
+                        }
+                }
+
+                break;
+        }
+}
+
+/***********************/
+/* Descriptor Handling */
+/***********************/
+
+/*
+ *  Set up DMA descriptors
+ *
+ *  This function will allocate both the DMA descriptor structure, and the
+ *  buffers it contains.  These are used to contain the descriptors used
+ *  by the system.
+*/
+
+int ath_descdma_setup(struct ath_softc *sc,
+                      struct ath_descdma *dd,
+                      struct list_head *head,
+                      const char *name,
+                      int nbuf,
+                      int ndesc)
+{
+#define DS2PHYS(_dd, _ds)                                               \
+        ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
+#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
+#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
+
+        struct ath_desc *ds;
+        struct ath_buf *bf;
+        int i, bsize, error;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: %s DMA: %u buffers %u desc/buf\n",
+                __func__, name, nbuf, ndesc);
+
+        /* ath_desc must be a multiple of DWORDs */
+        if ((sizeof(struct ath_desc) % 4) != 0) {
+                DPRINTF(sc, ATH_DBG_FATAL, "%s: ath_desc not DWORD aligned\n",
+                        __func__);
+                ASSERT((sizeof(struct ath_desc) % 4) == 0);
+                error = -ENOMEM;
+                goto fail;
+        }
+
+        dd->dd_name = name;
+        dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
+
+        /*
+         * Need additional DMA memory because we can't use
+         * descriptors that cross the 4K page boundary. Assume
+         * one skipped descriptor per 4K page.
+         */
+        if (!(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) {
+                u32 ndesc_skipped =
+                        ATH_DESC_4KB_BOUND_NUM_SKIPPED(dd->dd_desc_len);
+                u32 dma_len;
+
+                while (ndesc_skipped) {
+                        dma_len = ndesc_skipped * sizeof(struct ath_desc);
+                        dd->dd_desc_len += dma_len;
+
+                        ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len);
+                };
+        }
+
+        /* allocate descriptors */
+        dd->dd_desc = pci_alloc_consistent(sc->pdev,
+                              dd->dd_desc_len,
+                              &dd->dd_desc_paddr);
+        if (dd->dd_desc == NULL) {
+                error = -ENOMEM;
+                goto fail;
+        }
+        ds = dd->dd_desc;
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: %s DMA map: %p (%u) -> %llx (%u)\n",
+                __func__, dd->dd_name, ds, (u32) dd->dd_desc_len,
+                ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
+
+        /* allocate buffers */
+        bsize = sizeof(struct ath_buf) * nbuf;
+        bf = kmalloc(bsize, GFP_KERNEL);
+        if (bf == NULL) {
+                error = -ENOMEM;
+                goto fail2;
+        }
+        memzero(bf, bsize);
+        dd->dd_bufptr = bf;
+
+        INIT_LIST_HEAD(head);
+        for (i = 0; i < nbuf; i++, bf++, ds += ndesc) {
+                bf->bf_desc = ds;
+                bf->bf_daddr = DS2PHYS(dd, ds);
+
+                if (!(sc->sc_ah->ah_caps.hw_caps &
+                      ATH9K_HW_CAP_4KB_SPLITTRANS)) {
+                        /*
+                         * Skip descriptor addresses which can cause 4KB
+                         * boundary crossing (addr + length) with a 32 dword
+                         * descriptor fetch.
+                         */
+                        while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
+                                ASSERT((caddr_t) bf->bf_desc <
+                                       ((caddr_t) dd->dd_desc +
+                                        dd->dd_desc_len));
+
+                                ds += ndesc;
+                                bf->bf_desc = ds;
+                                bf->bf_daddr = DS2PHYS(dd, ds);
+                        }
+                }
+                list_add_tail(&bf->list, head);
+        }
+        return 0;
+fail2:
+        pci_free_consistent(sc->pdev,
+                dd->dd_desc_len, dd->dd_desc, dd->dd_desc_paddr);
+fail:
+        memzero(dd, sizeof(*dd));
+        return error;
+#undef ATH_DESC_4KB_BOUND_CHECK
+#undef ATH_DESC_4KB_BOUND_NUM_SKIPPED
+#undef DS2PHYS
+}
+
+/*
+ *  Cleanup DMA descriptors
+ *
+ *  This function will free the DMA block that was allocated for the descriptor
+ *  pool.  Since this was allocated as one "chunk", it is freed in the same
+ *  manner.
+*/
+
+void ath_descdma_cleanup(struct ath_softc *sc,
+                         struct ath_descdma *dd,
+                         struct list_head *head)
+{
+        /* Free memory associated with descriptors */
+        pci_free_consistent(sc->pdev,
+                dd->dd_desc_len, dd->dd_desc, dd->dd_desc_paddr);
+
+        INIT_LIST_HEAD(head);
+        kfree(dd->dd_bufptr);
+        memzero(dd, sizeof(*dd));
+}
+
+/*************/
+/* Utilities */
+/*************/
+
+void ath_internal_reset(struct ath_softc *sc)
+{
+        ath_reset_start(sc, 0);
+        ath_reset(sc);
+        ath_reset_end(sc, 0);
+}
+
+int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
+{
+        int qnum;
+
+        switch (queue) {
+        case 0:
+                qnum = sc->sc_haltype2q[ATH9K_WME_AC_VO];
+                break;
+        case 1:
+                qnum = sc->sc_haltype2q[ATH9K_WME_AC_VI];
+                break;
+        case 2:
+                qnum = sc->sc_haltype2q[ATH9K_WME_AC_BE];
+                break;
+        case 3:
+                qnum = sc->sc_haltype2q[ATH9K_WME_AC_BK];
+                break;
+        default:
+                qnum = sc->sc_haltype2q[ATH9K_WME_AC_BE];
+                break;
+        }
+
+        return qnum;
+}
+
+int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
+{
+        int qnum;
+
+        switch (queue) {
+        case ATH9K_WME_AC_VO:
+                qnum = 0;
+                break;
+        case ATH9K_WME_AC_VI:
+                qnum = 1;
+                break;
+        case ATH9K_WME_AC_BE:
+                qnum = 2;
+                break;
+        case ATH9K_WME_AC_BK:
+                qnum = 3;
+                break;
+        default:
+                qnum = -1;
+                break;
+        }
+
+        return qnum;
+}
+
+
+/*
+ *  Expand time stamp to TSF
+ *
+ *  Extend 15-bit time stamp from rx descriptor to
+ *  a full 64-bit TSF using the current h/w TSF.
+*/
+
+u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp)
+{
+        u64 tsf;
+
+        tsf = ath9k_hw_gettsf64(sc->sc_ah);
+        if ((tsf & 0x7fff) < rstamp)
+                tsf -= 0x8000;
+        return (tsf & ~0x7fff) | rstamp;
+}
+
+/*
+ *  Set Default Antenna
+ *
+ *  Call into the HAL to set the default antenna to use.  Not really valid for
+ *  MIMO technology.
+*/
+
+void ath_setdefantenna(void *context, u32 antenna)
+{
+        struct ath_softc *sc = (struct ath_softc *)context;
+        struct ath_hal *ah = sc->sc_ah;
+
+        /* XXX block beacon interrupts */
+        ath9k_hw_setantenna(ah, antenna);
+        sc->sc_defant = antenna;
+        sc->sc_rxotherant = 0;
+}
+
+/*
+ * Set Slot Time
+ *
+ * This will wake up the chip if required, and set the slot time for the
+ * frame (maximum transmit time).  Slot time is assumed to be already set
+ * in the ATH object member sc_slottime
+*/
+
+void ath_setslottime(struct ath_softc *sc)
+{
+        ath9k_hw_setslottime(sc->sc_ah, sc->sc_slottime);
+        sc->sc_updateslot = OK;
+}
diff --git a/drivers/net/wireless/ath9k/core.h b/drivers/net/wireless/ath9k/core.h
new file mode 100644
index 000000000000..673b3d81133a
--- /dev/null
+++ b/drivers/net/wireless/ath9k/core.h
@@ -0,0 +1,1072 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef CORE_H
+#define CORE_H
+
+#include <linux/version.h>
+#include <linux/autoconf.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/errno.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ip.h>
+#include <linux/tcp.h>
+#include <linux/in.h>
+#include <linux/delay.h>
+#include <linux/wait.h>
+#include <linux/pci.h>
+#include <linux/interrupt.h>
+#include <linux/sched.h>
+#include <linux/list.h>
+#include <asm/byteorder.h>
+#include <linux/scatterlist.h>
+#include <asm/page.h>
+#include <net/mac80211.h>
+
+#include "ath9k.h"
+#include "rc.h"
+
+struct ath_node;
+
+/******************/
+/* Utility macros */
+/******************/
+
+/* Macro to expand scalars to 64-bit objects */
+
+#define ito64(x) (sizeof(x) == 8) ?                     \
+        (((unsigned long long int)(x)) & (0xff)) :      \
+        (sizeof(x) == 16) ?                             \
+        (((unsigned long long int)(x)) & 0xffff) :      \
+        ((sizeof(x) == 32) ?                            \
+         (((unsigned long long int)(x)) & 0xffffffff) : \
+         (unsigned long long int)(x))
+
+/* increment with wrap-around */
+#define INCR(_l, _sz)   do {                    \
+                (_l)++;                         \
+                (_l) &= ((_sz) - 1);            \
+        } while (0)
+
+/* decrement with wrap-around */
+#define DECR(_l,  _sz)  do {                    \
+                (_l)--;                         \
+                (_l) &= ((_sz) - 1);            \
+        } while (0)
+
+#define A_MAX(a, b) ((a) > (b) ? (a) : (b))
+
+#define ASSERT(exp) do {                        \
+                if (unlikely(!(exp))) {         \
+                        BUG();                  \
+                }                               \
+        } while (0)
+
+/* XXX: remove */
+#define memzero(_buf, _len) memset(_buf, 0, _len)
+
+#define get_dma_mem_context(var, field) (&((var)->field))
+#define copy_dma_mem_context(dst, src)  (*dst = *src)
+
+#define ATH9K_BH_STATUS_INTACT          0
+#define ATH9K_BH_STATUS_CHANGE          1
+
+#define ATH_TXQ_SETUP(sc, i)        ((sc)->sc_txqsetup & (1<<i))
+
+static inline unsigned long get_timestamp(void)
+{
+        return ((jiffies / HZ) * 1000) + (jiffies % HZ) * (1000 / HZ);
+}
+
+/*************/
+/* Debugging */
+/*************/
+
+enum ATH_DEBUG {
+        ATH_DBG_RESET           = 0x00000001,
+        ATH_DBG_PHY_IO          = 0x00000002,
+        ATH_DBG_REG_IO          = 0x00000004,
+        ATH_DBG_QUEUE           = 0x00000008,
+        ATH_DBG_EEPROM          = 0x00000010,
+        ATH_DBG_NF_CAL          = 0x00000020,
+        ATH_DBG_CALIBRATE       = 0x00000040,
+        ATH_DBG_CHANNEL         = 0x00000080,
+        ATH_DBG_INTERRUPT       = 0x00000100,
+        ATH_DBG_REGULATORY      = 0x00000200,
+        ATH_DBG_ANI             = 0x00000400,
+        ATH_DBG_POWER_MGMT      = 0x00000800,
+        ATH_DBG_XMIT            = 0x00001000,
+        ATH_DBG_BEACON          = 0x00002000,
+        ATH_DBG_RATE            = 0x00004000,
+        ATH_DBG_CONFIG          = 0x00008000,
+        ATH_DBG_KEYCACHE        = 0x00010000,
+        ATH_DBG_AGGR            = 0x00020000,
+        ATH_DBG_FATAL           = 0x00040000,
+        ATH_DBG_ANY             = 0xffffffff
+};
+
+#define DBG_DEFAULT (ATH_DBG_FATAL)
+
+#define DPRINTF(sc, _m, _fmt, ...) do {                 \
+                if (sc->sc_debug & (_m))                \
+                        printk(_fmt , ##__VA_ARGS__);   \
+        } while (0)
+
+/***************************/
+/* Load-time Configuration */
+/***************************/
+
+/* Per-instance load-time (note: NOT run-time) configurations
+ * for Atheros Device */
+struct ath_config {
+        u32 ath_aggr_prot;
+        u16 txpowlimit;
+        u16 txpowlimit_override;
+        u8 cabqReadytime; /* Cabq Readytime % */
+        u8 swBeaconProcess; /* Process received beacons in SW (vs HW) */
+};
+
+/***********************/
+/* Chainmask Selection */
+/***********************/
+
+#define ATH_CHAINMASK_SEL_TIMEOUT          6000
+/* Default - Number of last RSSI values that is used for
+ * chainmask selection */
+#define ATH_CHAINMASK_SEL_RSSI_CNT         10
+/* Means use 3x3 chainmask instead of configured chainmask */
+#define ATH_CHAINMASK_SEL_3X3              7
+/* Default - Rssi threshold below which we have to switch to 3x3 */
+#define ATH_CHAINMASK_SEL_UP_RSSI_THRES    20
+/* Default - Rssi threshold above which we have to switch to
+ * user configured values */
+#define ATH_CHAINMASK_SEL_DOWN_RSSI_THRES  35
+/* Struct to store the chainmask select related info */
+struct ath_chainmask_sel {
+        struct timer_list timer;
+        int cur_tx_mask;        /* user configured or 3x3 */
+        int cur_rx_mask;        /* user configured or 3x3 */
+        int tx_avgrssi;
+        u8 switch_allowed:1,    /* timer will set this */
+           cm_sel_enabled : 1;
+};
+
+int ath_chainmask_sel_logic(struct ath_softc *sc, struct ath_node *an);
+void ath_update_chainmask(struct ath_softc *sc, int is_ht);
+
+/*************************/
+/* Descriptor Management */
+/*************************/
+
+/* Number of descriptors per buffer. The only case where we see skbuff
+chains is due to FF aggregation in the driver. */
+#define ATH_TXDESC          1
+/* if there's more fragment for this MSDU */
+#define ATH_BF_MORE_MPDU    1
+#define ATH_TXBUF_RESET(_bf) do {                               \
+                (_bf)->bf_status = 0;                           \
+                (_bf)->bf_lastbf = NULL;                        \
+                (_bf)->bf_lastfrm = NULL;                       \
+                (_bf)->bf_next = NULL;                          \
+                memzero(&((_bf)->bf_state),                     \
+                            sizeof(struct ath_buf_state));      \
+        } while (0)
+
+struct ath_buf_state {
+        int bfs_nframes;        /* # frames in aggregate */
+        u16 bfs_al;             /* length of aggregate */
+        u16 bfs_frmlen;         /* length of frame */
+        int bfs_seqno;          /* sequence number */
+        int bfs_tidno;          /* tid of this frame */
+        int bfs_retries;        /* current retries */
+        struct ath_rc_series bfs_rcs[4];        /* rate series */
+        u8 bfs_isdata:1;        /* is a data frame/aggregate */
+        u8 bfs_isaggr:1;        /* is an aggregate */
+        u8 bfs_isampdu:1;       /* is an a-mpdu, aggregate or not */
+        u8 bfs_ht:1;            /* is an HT frame */
+        u8 bfs_isretried:1;     /* is retried */
+        u8 bfs_isxretried:1;    /* is excessive retried */
+        u8 bfs_shpreamble:1;    /* is short preamble */
+        u8 bfs_isbar:1;         /* is a BAR */
+        u8 bfs_ispspoll:1;      /* is a PS-Poll */
+        u8 bfs_aggrburst:1;     /* is a aggr burst */
+        u8 bfs_calcairtime:1;   /* requests airtime be calculated
+                                when set for tx frame */
+        int bfs_rifsburst_elem; /* RIFS burst/bar */
+        int bfs_nrifsubframes;  /* # of elements in burst */
+        /* key type use to encrypt this frame */
+        enum ath9k_key_type bfs_keytype;
+};
+
+#define bf_nframes              bf_state.bfs_nframes
+#define bf_al                   bf_state.bfs_al
+#define bf_frmlen               bf_state.bfs_frmlen
+#define bf_retries              bf_state.bfs_retries
+#define bf_seqno                bf_state.bfs_seqno
+#define bf_tidno                bf_state.bfs_tidno
+#define bf_rcs                  bf_state.bfs_rcs
+#define bf_isdata               bf_state.bfs_isdata
+#define bf_isaggr               bf_state.bfs_isaggr
+#define bf_isampdu              bf_state.bfs_isampdu
+#define bf_ht                   bf_state.bfs_ht
+#define bf_isretried            bf_state.bfs_isretried
+#define bf_isxretried           bf_state.bfs_isxretried
+#define bf_shpreamble           bf_state.bfs_shpreamble
+#define bf_rifsburst_elem       bf_state.bfs_rifsburst_elem
+#define bf_nrifsubframes        bf_state.bfs_nrifsubframes
+#define bf_keytype              bf_state.bfs_keytype
+#define bf_isbar                bf_state.bfs_isbar
+#define bf_ispspoll             bf_state.bfs_ispspoll
+#define bf_aggrburst            bf_state.bfs_aggrburst
+#define bf_calcairtime          bf_state.bfs_calcairtime
+
+/*
+ * Abstraction of a contiguous buffer to transmit/receive.  There is only
+ * a single hw descriptor encapsulated here.
+ */
+
+struct ath_buf {
+        struct list_head list;
+        struct list_head *last;
+        struct ath_buf *bf_lastbf;      /* last buf of this unit (a frame or
+                                           an aggregate) */
+        struct ath_buf *bf_lastfrm;     /* last buf of this frame */
+        struct ath_buf *bf_next;        /* next subframe in the aggregate */
+        struct ath_buf *bf_rifslast;    /* last buf for RIFS burst */
+        void *bf_mpdu;                  /* enclosing frame structure */
+        void *bf_node;                  /* pointer to the node */
+        struct ath_desc *bf_desc;       /* virtual addr of desc */
+        dma_addr_t bf_daddr;            /* physical addr of desc */
+        dma_addr_t bf_buf_addr;         /* physical addr of data buffer */
+        u32 bf_status;
+        u16 bf_flags;                   /* tx descriptor flags */
+        struct ath_buf_state bf_state;  /* buffer state */
+        dma_addr_t bf_dmacontext;
+};
+
+/*
+ * reset the rx buffer.
+ * any new fields added to the athbuf and require
+ * reset need to be added to this macro.
+ * currently bf_status is the only one requires that
+ * requires reset.
+ */
+#define ATH_RXBUF_RESET(_bf)    ((_bf)->bf_status = 0)
+
+/* hw processing complete, desc processed by hal */
+#define ATH_BUFSTATUS_DONE      0x00000001
+/* hw processing complete, desc hold for hw */
+#define ATH_BUFSTATUS_STALE     0x00000002
+/* Rx-only: OS is done with this packet and it's ok to queued it to hw */
+#define ATH_BUFSTATUS_FREE      0x00000004
+
+/* DMA state for tx/rx descriptors */
+
+struct ath_descdma {
+        const char *dd_name;
+        struct ath_desc *dd_desc;       /* descriptors  */
+        dma_addr_t dd_desc_paddr;       /* physical addr of dd_desc  */
+        u32 dd_desc_len;                /* size of dd_desc  */
+        struct ath_buf *dd_bufptr;      /* associated buffers */
+        dma_addr_t dd_dmacontext;
+};
+
+/* Abstraction of a received RX MPDU/MMPDU, or a RX fragment */
+
+struct ath_rx_context {
+        struct ath_buf *ctx_rxbuf;      /* associated ath_buf for rx */
+};
+#define ATH_RX_CONTEXT(skb) ((struct ath_rx_context *)skb->cb)
+
+int ath_descdma_setup(struct ath_softc *sc,
+                      struct ath_descdma *dd,
+                      struct list_head *head,
+                      const char *name,
+                      int nbuf,
+                      int ndesc);
+int ath_desc_alloc(struct ath_softc *sc);
+void ath_desc_free(struct ath_softc *sc);
+void ath_descdma_cleanup(struct ath_softc *sc,
+                         struct ath_descdma *dd,
+                         struct list_head *head);
+
+/******/
+/* RX */
+/******/
+
+#define ATH_MAX_ANTENNA          3
+#define ATH_RXBUF                512
+#define ATH_RX_TIMEOUT           40      /* 40 milliseconds */
+#define WME_NUM_TID              16
+#define IEEE80211_BAR_CTL_TID_M  0xF000  /* tid mask */
+#define IEEE80211_BAR_CTL_TID_S  2       /* tid shift */
+
+enum ATH_RX_TYPE {
+        ATH_RX_NON_CONSUMED = 0,
+        ATH_RX_CONSUMED
+};
+
+/* per frame rx status block */
+struct ath_recv_status {
+        u64 tsf;                /* mac tsf */
+        int8_t rssi;            /* RSSI (noise floor ajusted) */
+        int8_t rssictl[ATH_MAX_ANTENNA];        /* RSSI (noise floor ajusted) */
+        int8_t rssiextn[ATH_MAX_ANTENNA];       /* RSSI (noise floor ajusted) */
+        int8_t abs_rssi;        /* absolute RSSI */
+        u8 rateieee;            /* data rate received (IEEE rate code) */
+        u8 ratecode;            /* phy rate code */
+        int rateKbps;           /* data rate received (Kbps) */
+        int antenna;            /* rx antenna */
+        int flags;              /* status of associated skb */
+#define ATH_RX_FCS_ERROR        0x01
+#define ATH_RX_MIC_ERROR        0x02
+#define ATH_RX_DECRYPT_ERROR    0x04
+#define ATH_RX_RSSI_VALID       0x08
+/* if any of ctl,extn chainrssis are valid */
+#define ATH_RX_CHAIN_RSSI_VALID 0x10
+/* if extn chain rssis are valid */
+#define ATH_RX_RSSI_EXTN_VALID  0x20
+/* set if 40Mhz, clear if 20Mhz */
+#define ATH_RX_40MHZ            0x40
+/* set if short GI, clear if full GI */
+#define ATH_RX_SHORT_GI         0x80
+};
+
+struct ath_rxbuf {
+        struct sk_buff *rx_wbuf;
+        unsigned long rx_time;                  /* system time when received */
+        struct ath_recv_status rx_status;       /* cached rx status */
+};
+
+/* Per-TID aggregate receiver state for a node */
+struct ath_arx_tid {
+        struct ath_node *an;
+        struct ath_rxbuf *rxbuf;        /* re-ordering buffer */
+        struct timer_list timer;
+        spinlock_t tidlock;
+        int baw_head;                   /* seq_next at head */
+        int baw_tail;                   /* tail of block-ack window */
+        int seq_reset;                  /* need to reset start sequence */
+        int addba_exchangecomplete;
+        u16 seq_next;                   /* next expected sequence */
+        u16 baw_size;                   /* block-ack window size */
+};
+
+/* Per-node receiver aggregate state */
+struct ath_arx {
+        struct ath_arx_tid tid[WME_NUM_TID];
+};
+
+int ath_startrecv(struct ath_softc *sc);
+bool ath_stoprecv(struct ath_softc *sc);
+void ath_flushrecv(struct ath_softc *sc);
+u32 ath_calcrxfilter(struct ath_softc *sc);
+void ath_rx_node_init(struct ath_softc *sc, struct ath_node *an);
+void ath_rx_node_free(struct ath_softc *sc, struct ath_node *an);
+void ath_rx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
+void ath_handle_rx_intr(struct ath_softc *sc);
+int ath_rx_init(struct ath_softc *sc, int nbufs);
+void ath_rx_cleanup(struct ath_softc *sc);
+int ath_rx_tasklet(struct ath_softc *sc, int flush);
+int ath_rx_input(struct ath_softc *sc,
+                 struct ath_node *node,
+                 int is_ampdu,
+                 struct sk_buff *skb,
+                 struct ath_recv_status *rx_status,
+                 enum ATH_RX_TYPE *status);
+int ath__rx_indicate(struct ath_softc *sc,
+                    struct sk_buff *skb,
+                    struct ath_recv_status *status,
+                    u16 keyix);
+int ath_rx_subframe(struct ath_node *an, struct sk_buff *skb,
+                    struct ath_recv_status *status);
+
+/******/
+/* TX */
+/******/
+
+#define ATH_FRAG_PER_MSDU       1
+#define ATH_TXBUF               (512/ATH_FRAG_PER_MSDU)
+/* max number of transmit attempts (tries) */
+#define ATH_TXMAXTRY            13
+/* max number of 11n transmit attempts (tries) */
+#define ATH_11N_TXMAXTRY        10
+/* max number of tries for management and control frames */
+#define ATH_MGT_TXMAXTRY        4
+#define WME_BA_BMP_SIZE         64
+#define WME_MAX_BA              WME_BA_BMP_SIZE
+#define ATH_TID_MAX_BUFS        (2 * WME_MAX_BA)
+#define TID_TO_WME_AC(_tid)                             \
+        ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
+         (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
+         (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
+         WME_AC_VO)
+
+
+/* Wireless Multimedia Extension Defines */
+#define WME_AC_BE               0 /* best effort */
+#define WME_AC_BK               1 /* background */
+#define WME_AC_VI               2 /* video */
+#define WME_AC_VO               3 /* voice */
+#define WME_NUM_AC              4
+
+enum ATH_SM_PWRSAV{
+        ATH_SM_ENABLE,
+        ATH_SM_PWRSAV_STATIC,
+        ATH_SM_PWRSAV_DYNAMIC,
+};
+
+/*
+ * Data transmit queue state.  One of these exists for each
+ * hardware transmit queue.  Packets sent to us from above
+ * are assigned to queues based on their priority.  Not all
+ * devices support a complete set of hardware transmit queues.
+ * For those devices the array sc_ac2q will map multiple
+ * priorities to fewer hardware queues (typically all to one
+ * hardware queue).
+ */
+struct ath_txq {
+        u32 axq_qnum;                   /* hardware q number */
+        u32 *axq_link;                  /* link ptr in last TX desc */
+        struct list_head axq_q;         /* transmit queue */
+        spinlock_t axq_lock;
+        unsigned long axq_lockflags;    /* intr state when must cli */
+        u32 axq_depth;                  /* queue depth */
+        u8 axq_aggr_depth;              /* aggregates queued */
+        u32 axq_totalqueued;            /* total ever queued */
+
+        /* count to determine if descriptor should generate int on this txq. */
+        u32 axq_intrcnt;
+
+        bool stopped;                   /* Is mac80211 queue stopped ? */
+        struct ath_buf *axq_linkbuf;    /* virtual addr of last buffer*/
+
+        /* first desc of the last descriptor that contains CTS */
+        struct ath_desc *axq_lastdsWithCTS;
+
+        /* final desc of the gating desc that determines whether
+           lastdsWithCTS has been DMA'ed or not */
+        struct ath_desc *axq_gatingds;
+
+        struct list_head axq_acq;
+};
+
+/* per TID aggregate tx state for a destination */
+struct ath_atx_tid {
+        struct list_head list;          /* round-robin tid entry */
+        struct list_head buf_q;         /* pending buffers */
+        struct ath_node *an;
+        struct ath_atx_ac *ac;
+        struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; /* active tx frames */
+        u16 seq_start;
+        u16 seq_next;
+        u16 baw_size;
+        int tidno;
+        int baw_head;                   /* first un-acked tx buffer */
+        int baw_tail;                   /* next unused tx buffer slot */
+        int sched;
+        int paused;
+        int cleanup_inprogress;
+        u32 addba_exchangecomplete:1;
+        int32_t addba_exchangeinprogress;
+        int addba_exchangeattempts;
+};
+
+/* per access-category aggregate tx state for a destination */
+struct ath_atx_ac {
+        int sched;                      /* dest-ac is scheduled */
+        int qnum;                       /* H/W queue number associated
+                                           with this AC */
+        struct list_head list;          /* round-robin txq entry */
+        struct list_head tid_q;         /* queue of TIDs with buffers */
+};
+
+/* per dest tx state */
+struct ath_atx {
+        struct ath_atx_tid tid[WME_NUM_TID];
+        struct ath_atx_ac ac[WME_NUM_AC];
+};
+
+/* per-frame tx control block */
+struct ath_tx_control {
+        struct ath_node *an;
+        int if_id;
+        int qnum;
+        u32 ht:1;
+        u32 ps:1;
+        u32 use_minrate:1;
+        enum ath9k_pkt_type atype;
+        enum ath9k_key_type keytype;
+        u32 flags;
+        u16 seqno;
+        u16 tidno;
+        u16 txpower;
+        u16 frmlen;
+        u32 keyix;
+        int min_rate;
+        int mcast_rate;
+        u16 nextfraglen;
+        struct ath_softc *dev;
+        dma_addr_t dmacontext;
+};
+
+/* per frame tx status block */
+struct ath_xmit_status {
+        int retries;    /* number of retries to successufully
+                           transmit this frame */
+        int flags;      /* status of transmit */
+#define ATH_TX_ERROR        0x01
+#define ATH_TX_XRETRY       0x02
+#define ATH_TX_BAR          0x04
+};
+
+struct ath_tx_stat {
+        int rssi;               /* RSSI (noise floor ajusted) */
+        int rssictl[ATH_MAX_ANTENNA];   /* RSSI (noise floor ajusted) */
+        int rssiextn[ATH_MAX_ANTENNA];  /* RSSI (noise floor ajusted) */
+        int rateieee;           /* data rate xmitted (IEEE rate code) */
+        int rateKbps;           /* data rate xmitted (Kbps) */
+        int ratecode;           /* phy rate code */
+        int flags;              /* validity flags */
+/* if any of ctl,extn chain rssis are valid */
+#define ATH_TX_CHAIN_RSSI_VALID 0x01
+/* if extn chain rssis are valid */
+#define ATH_TX_RSSI_EXTN_VALID  0x02
+        u32 airtime;    /* time on air per final tx rate */
+};
+
+struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
+void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
+int ath_tx_setup(struct ath_softc *sc, int haltype);
+void ath_draintxq(struct ath_softc *sc, bool retry_tx);
+void ath_tx_draintxq(struct ath_softc *sc,
+        struct ath_txq *txq, bool retry_tx);
+void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
+void ath_tx_node_cleanup(struct ath_softc *sc,
+        struct ath_node *an, bool bh_flag);
+void ath_tx_node_free(struct ath_softc *sc, struct ath_node *an);
+void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
+int ath_tx_init(struct ath_softc *sc, int nbufs);
+int ath_tx_cleanup(struct ath_softc *sc);
+int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype);
+int ath_txq_update(struct ath_softc *sc, int qnum,
+                   struct ath9k_tx_queue_info *q);
+int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb);
+void ath_tx_tasklet(struct ath_softc *sc);
+u32 ath_txq_depth(struct ath_softc *sc, int qnum);
+u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum);
+void ath_notify_txq_status(struct ath_softc *sc, u16 queue_depth);
+void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
+                     struct ath_xmit_status *tx_status, struct ath_node *an);
+
+/**********************/
+/* Node / Aggregation */
+/**********************/
+
+/* indicates the node is clened up */
+#define ATH_NODE_CLEAN          0x1
+/* indicates the node is 80211 power save */
+#define ATH_NODE_PWRSAVE        0x2
+
+#define ADDBA_TIMEOUT              200 /* 200 milliseconds */
+#define ADDBA_EXCHANGE_ATTEMPTS    10
+#define ATH_AGGR_DELIM_SZ          4   /* delimiter size   */
+#define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */
+/* number of delimiters for encryption padding */
+#define ATH_AGGR_ENCRYPTDELIM      10
+/* minimum h/w qdepth to be sustained to maximize aggregation */
+#define ATH_AGGR_MIN_QDEPTH        2
+#define ATH_AMPDU_SUBFRAME_DEFAULT 32
+#define IEEE80211_SEQ_SEQ_SHIFT    4
+#define IEEE80211_SEQ_MAX          4096
+#define IEEE80211_MIN_AMPDU_BUF    0x8
+
+/* return whether a bit at index _n in bitmap _bm is set
+ * _sz is the size of the bitmap  */
+#define ATH_BA_ISSET(_bm, _n)  (((_n) < (WME_BA_BMP_SIZE)) &&           \
+                                ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
+
+/* return block-ack bitmap index given sequence and starting sequence */
+#define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
+
+/* returns delimiter padding required given the packet length */
+#define ATH_AGGR_GET_NDELIM(_len)                                       \
+        (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ?           \
+          (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
+
+#define BAW_WITHIN(_start, _bawsz, _seqno) \
+        ((((_seqno) - (_start)) & 4095) < (_bawsz))
+
+#define ATH_DS_BA_SEQ(_ds)               ((_ds)->ds_us.tx.ts_seqnum)
+#define ATH_DS_BA_BITMAP(_ds)            (&(_ds)->ds_us.tx.ba_low)
+#define ATH_DS_TX_BA(_ds)       ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA)
+#define ATH_AN_2_TID(_an, _tidno)        (&(_an)->an_aggr.tx.tid[(_tidno)])
+
+enum ATH_AGGR_STATUS {
+        ATH_AGGR_DONE,
+        ATH_AGGR_BAW_CLOSED,
+        ATH_AGGR_LIMITED,
+        ATH_AGGR_SHORTPKT,
+        ATH_AGGR_8K_LIMITED,
+};
+
+enum ATH_AGGR_CHECK {
+        AGGR_NOT_REQUIRED,
+        AGGR_REQUIRED,
+        AGGR_CLEANUP_PROGRESS,
+        AGGR_EXCHANGE_PROGRESS,
+        AGGR_EXCHANGE_DONE
+};
+
+struct aggr_rifs_param {
+        int param_max_frames;
+        int param_max_len;
+        int param_rl;
+        int param_al;
+        struct ath_rc_series *param_rcs;
+};
+
+/* Per-node aggregation state */
+struct ath_node_aggr {
+        struct ath_atx tx;      /* node transmit state */
+        struct ath_arx rx;      /* node receive state */
+};
+
+/* driver-specific node state */
+struct ath_node {
+        struct list_head list;
+        struct ath_softc *an_sc;
+        atomic_t an_refcnt;
+        struct ath_chainmask_sel an_chainmask_sel;
+        struct ath_node_aggr an_aggr;
+        u8 an_smmode; /* SM Power save mode */
+        u8 an_flags;
+        u8 an_addr[ETH_ALEN];
+};
+
+void ath_tx_resume_tid(struct ath_softc *sc,
+        struct ath_atx_tid *tid);
+enum ATH_AGGR_CHECK ath_tx_aggr_check(struct ath_softc *sc,
+        struct ath_node *an, u8 tidno);
+void ath_tx_aggr_teardown(struct ath_softc *sc,
+        struct ath_node *an, u8 tidno);
+void ath_rx_aggr_teardown(struct ath_softc *sc,
+        struct ath_node *an, u8 tidno);
+int ath_rx_aggr_start(struct ath_softc *sc,
+                      const u8 *addr,
+                      u16 tid,
+                      u16 *ssn);
+int ath_rx_aggr_stop(struct ath_softc *sc,
+                     const u8 *addr,
+                     u16 tid);
+int ath_tx_aggr_start(struct ath_softc *sc,
+                      const u8 *addr,
+                      u16 tid,
+                      u16 *ssn);
+int ath_tx_aggr_stop(struct ath_softc *sc,
+                     const u8 *addr,
+                     u16 tid);
+void ath_newassoc(struct ath_softc *sc,
+        struct ath_node *node, int isnew, int isuapsd);
+struct ath_node *ath_node_attach(struct ath_softc *sc,
+        u8 addr[ETH_ALEN], int if_id);
+void ath_node_detach(struct ath_softc *sc, struct ath_node *an, bool bh_flag);
+struct ath_node *ath_node_get(struct ath_softc *sc, u8 addr[ETH_ALEN]);
+void ath_node_put(struct ath_softc *sc, struct ath_node *an, bool bh_flag);
+struct ath_node *ath_node_find(struct ath_softc *sc, u8 *addr);
+
+/*******************/
+/* Beacon Handling */
+/*******************/
+
+/*
+ * Regardless of the number of beacons we stagger, (i.e. regardless of the
+ * number of BSSIDs) if a given beacon does not go out even after waiting this
+ * number of beacon intervals, the game's up.
+ */
+#define BSTUCK_THRESH                   (9 * ATH_BCBUF)
+#define ATH_BCBUF                       4   /* number of beacon buffers */
+#define ATH_DEFAULT_BINTVAL             100 /* default beacon interval in TU */
+#define ATH_DEFAULT_BMISS_LIMIT         10
+#define ATH_BEACON_AIFS_DEFAULT         0  /* Default aifs for ap beacon q */
+#define ATH_BEACON_CWMIN_DEFAULT        0  /* Default cwmin for ap beacon q */
+#define ATH_BEACON_CWMAX_DEFAULT        0  /* Default cwmax for ap beacon q */
+#define IEEE80211_MS_TO_TU(x)           (((x) * 1000) / 1024)
+
+/* beacon configuration */
+struct ath_beacon_config {
+        u16 beacon_interval;
+        u16 listen_interval;
+        u16 dtim_period;
+        u16 bmiss_timeout;
+        u8 dtim_count;
+        u8 tim_offset;
+        union {
+                u64 last_tsf;
+                u8 last_tstamp[8];
+        } u; /* last received beacon/probe response timestamp of this BSS. */
+};
+
+/* offsets in a beacon frame for
+ * quick acess of beacon content by low-level driver */
+struct ath_beacon_offset {
+        u8 *bo_tim;     /* start of atim/dtim */
+};
+
+void ath9k_beacon_tasklet(unsigned long data);
+void ath_beacon_config(struct ath_softc *sc, int if_id);
+int ath_beaconq_setup(struct ath_hal *ah);
+int ath_beacon_alloc(struct ath_softc *sc, int if_id);
+void ath_bstuck_process(struct ath_softc *sc);
+void ath_beacon_tasklet(struct ath_softc *sc, int *needmark);
+void ath_beacon_free(struct ath_softc *sc);
+void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp);
+void ath_beacon_sync(struct ath_softc *sc, int if_id);
+void ath_update_beacon_info(struct ath_softc *sc, int avgbrssi);
+void ath_get_beaconconfig(struct ath_softc *sc,
+                          int if_id,
+                          struct ath_beacon_config *conf);
+int ath_update_beacon(struct ath_softc *sc,
+                      int if_id,
+                      struct ath_beacon_offset *bo,
+                      struct sk_buff *skb,
+                      int mcast);
+/********/
+/* VAPs */
+/********/
+
+/*
+ * Define the scheme that we select MAC address for multiple
+ * BSS on the same radio. The very first VAP will just use the MAC
+ * address from the EEPROM. For the next 3 VAPs, we set the
+ * U/L bit (bit 1) in MAC address, and use the next two bits as the
+ * index of the VAP.
+ */
+
+#define ATH_SET_VAP_BSSID_MASK(bssid_mask) \
+        ((bssid_mask)[0] &= ~(((ATH_BCBUF-1)<<2)|0x02))
+
+/* VAP configuration (from protocol layer) */
+struct ath_vap_config {
+        u32 av_fixed_rateset;
+        u32 av_fixed_retryset;
+};
+
+/* driver-specific vap state */
+struct ath_vap {
+        struct ieee80211_vif *av_if_data;
+        enum ath9k_opmode av_opmode;    /* VAP operational mode */
+        struct ath_buf *av_bcbuf;       /* beacon buffer */
+        struct ath_beacon_offset av_boff; /* dynamic update state */
+        struct ath_tx_control av_btxctl;  /* txctl information for beacon */
+        int av_bslot;                   /* beacon slot index */
+        struct ath_txq av_mcastq;       /* multicast transmit queue */
+        struct ath_vap_config av_config;/* vap configuration parameters*/
+        struct ath_rate_node *rc_node;
+};
+
+int ath_vap_attach(struct ath_softc *sc,
+                   int if_id,
+                   struct ieee80211_vif *if_data,
+                   enum ath9k_opmode opmode);
+int ath_vap_detach(struct ath_softc *sc, int if_id);
+int ath_vap_config(struct ath_softc *sc,
+        int if_id, struct ath_vap_config *if_config);
+int ath_vap_listen(struct ath_softc *sc, int if_id);
+
+/*********************/
+/* Antenna diversity */
+/*********************/
+
+#define ATH_ANT_DIV_MAX_CFG      2
+#define ATH_ANT_DIV_MIN_IDLE_US  1000000  /* us */
+#define ATH_ANT_DIV_MIN_SCAN_US  50000    /* us */
+
+enum ATH_ANT_DIV_STATE{
+        ATH_ANT_DIV_IDLE,
+        ATH_ANT_DIV_SCAN,       /* evaluating antenna */
+};
+
+struct ath_antdiv {
+        struct ath_softc *antdiv_sc;
+        u8 antdiv_start;
+        enum ATH_ANT_DIV_STATE antdiv_state;
+        u8 antdiv_num_antcfg;
+        u8 antdiv_curcfg;
+        u8 antdiv_bestcfg;
+        int32_t antdivf_rssitrig;
+        int32_t antdiv_lastbrssi[ATH_ANT_DIV_MAX_CFG];
+        u64 antdiv_lastbtsf[ATH_ANT_DIV_MAX_CFG];
+        u64 antdiv_laststatetsf;
+        u8 antdiv_bssid[ETH_ALEN];
+};
+
+void ath_slow_ant_div_init(struct ath_antdiv *antdiv,
+        struct ath_softc *sc, int32_t rssitrig);
+void ath_slow_ant_div_start(struct ath_antdiv *antdiv,
+                            u8 num_antcfg,
+                            const u8 *bssid);
+void ath_slow_ant_div_stop(struct ath_antdiv *antdiv);
+void ath_slow_ant_div(struct ath_antdiv *antdiv,
+                      struct ieee80211_hdr *wh,
+                      struct ath_rx_status *rx_stats);
+void ath_setdefantenna(void *sc, u32 antenna);
+
+/********************/
+/* Main driver core */
+/********************/
+
+/*
+ * Default cache line size, in bytes.
+ * Used when PCI device not fully initialized by bootrom/BIOS
+*/
+#define DEFAULT_CACHELINE       32
+#define ATH_DEFAULT_NOISE_FLOOR -95
+#define ATH_REGCLASSIDS_MAX     10
+#define ATH_CABQ_READY_TIME     80  /* % of beacon interval */
+#define ATH_PREAMBLE_SHORT      (1<<0)
+#define ATH_PROTECT_ENABLE      (1<<1)
+#define ATH_MAX_SW_RETRIES      10
+/* Num farmes difference in tx to flip default recv */
+#define ATH_ANTENNA_DIFF        2
+#define ATH_CHAN_MAX            255
+#define IEEE80211_WEP_NKID      4       /* number of key ids */
+#define IEEE80211_RATE_VAL      0x7f
+/*
+ * The key cache is used for h/w cipher state and also for
+ * tracking station state such as the current tx antenna.
+ * We also setup a mapping table between key cache slot indices
+ * and station state to short-circuit node lookups on rx.
+ * Different parts have different size key caches.  We handle
+ * up to ATH_KEYMAX entries (could dynamically allocate state).
+ */
+#define ATH_KEYMAX              128        /* max key cache size we handle */
+
+#define RESET_RETRY_TXQ         0x00000001
+#define ATH_IF_ID_ANY           0xff
+
+#define ATH_TXPOWER_MAX         100     /* .5 dBm units */
+
+#define RSSI_LPF_THRESHOLD         -20
+#define ATH_RSSI_EP_MULTIPLIER     (1<<7)  /* pow2 to optimize out * and / */
+#define ATH_RATE_DUMMY_MARKER      0
+#define ATH_RSSI_LPF_LEN           10
+#define ATH_RSSI_DUMMY_MARKER      0x127
+
+#define ATH_EP_MUL(x, mul)         ((x) * (mul))
+#define ATH_EP_RND(x, mul)                                              \
+        ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
+#define ATH_RSSI_OUT(x)                                                 \
+        (((x) != ATH_RSSI_DUMMY_MARKER) ?                               \
+         (ATH_EP_RND((x), ATH_RSSI_EP_MULTIPLIER)) : ATH_RSSI_DUMMY_MARKER)
+#define ATH_RSSI_IN(x)                                  \
+        (ATH_EP_MUL((x), ATH_RSSI_EP_MULTIPLIER))
+#define ATH_LPF_RSSI(x, y, len)                                         \
+        ((x != ATH_RSSI_DUMMY_MARKER) ? \
+                (((x) * ((len) - 1) + (y)) / (len)) : (y))
+#define ATH_RSSI_LPF(x, y) do {                                         \
+                if ((y) >= RSSI_LPF_THRESHOLD)                          \
+                        x = ATH_LPF_RSSI((x), \
+                                ATH_RSSI_IN((y)), ATH_RSSI_LPF_LEN); \
+        } while (0)
+
+
+enum PROT_MODE {
+        PROT_M_NONE = 0,
+        PROT_M_RTSCTS,
+        PROT_M_CTSONLY
+};
+
+enum RATE_TYPE {
+        NORMAL_RATE = 0,
+        HALF_RATE,
+        QUARTER_RATE
+};
+
+struct ath_ht_info {
+        enum ath9k_ht_macmode tx_chan_width;
+        u16 maxampdu;
+        u8 mpdudensity;
+        u8 ext_chan_offset;
+};
+
+struct ath_softc {
+        struct ieee80211_hw *hw;
+        struct pci_dev *pdev;
+        void __iomem *mem;
+        struct tasklet_struct intr_tq;
+        struct tasklet_struct bcon_tasklet;
+        struct ath_config sc_config;    /* load-time parameters */
+        int sc_debug;
+        struct ath_hal *sc_ah;
+        struct ath_rate_softc *sc_rc;   /* tx rate control support */
+        u32 sc_intrstatus;
+        enum ath9k_opmode sc_opmode;    /* current operating mode */
+
+        u8 sc_invalid;                  /* being detached */
+        u8 sc_beacons;                  /* beacons running */
+        u8 sc_scanning;                 /* scanning active */
+        u8 sc_txaggr;                   /* enable 11n tx aggregation */
+        u8 sc_rxaggr;                   /* enable 11n rx aggregation */
+        u8 sc_update_chainmask;         /* change chain mask */
+        u8 sc_full_reset;               /* force full reset */
+        enum wireless_mode sc_curmode;  /* current phy mode */
+        u16 sc_curtxpow;
+        u16 sc_curaid;
+        u8 sc_curbssid[ETH_ALEN];
+        u8 sc_myaddr[ETH_ALEN];
+        enum PROT_MODE sc_protmode;
+        u8 sc_mcastantenna;
+        u8 sc_txantenna;                /* data tx antenna (fixed or auto) */
+        u8 sc_nbcnvaps;                 /* # of vaps sending beacons */
+        u16 sc_nvaps;                   /* # of active virtual ap's */
+        struct ath_vap *sc_vaps[ATH_BCBUF];
+        enum ath9k_int sc_imask;
+        u8 sc_bssidmask[ETH_ALEN];
+        u8 sc_defant;                   /* current default antenna */
+        u8 sc_rxotherant;               /* rx's on non-default antenna */
+        u16 sc_cachelsz;
+        int sc_slotupdate;              /* slot to next advance fsm */
+        int sc_slottime;
+        u8 sc_noreset;
+        int sc_bslot[ATH_BCBUF];
+        struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */
+        struct list_head node_list;
+        struct ath_ht_info sc_ht_info;
+        int16_t sc_noise_floor;         /* signal noise floor in dBm */
+        enum ath9k_ht_extprotspacing sc_ht_extprotspacing;
+        u8 sc_tx_chainmask;
+        u8 sc_rx_chainmask;
+        u8 sc_rxchaindetect_ref;
+        u8 sc_rxchaindetect_thresh5GHz;
+        u8 sc_rxchaindetect_thresh2GHz;
+        u8 sc_rxchaindetect_delta5GHz;
+        u8 sc_rxchaindetect_delta2GHz;
+        u32 sc_rtsaggrlimit;            /* Chipset specific aggr limit */
+        u32 sc_flags;
+#ifdef CONFIG_SLOW_ANT_DIV
+        struct ath_antdiv sc_antdiv;
+#endif
+        enum {
+                OK,             /* no change needed */
+                UPDATE,         /* update pending */
+                COMMIT          /* beacon sent, commit change */
+        } sc_updateslot;        /* slot time update fsm */
+
+        /* Crypto */
+        u32 sc_keymax;          /* size of key cache */
+        DECLARE_BITMAP(sc_keymap, ATH_KEYMAX);  /* key use bit map */
+        u8 sc_splitmic;         /* split TKIP MIC keys */
+        int sc_keytype;
+
+        /* RX */
+        struct list_head sc_rxbuf;
+        struct ath_descdma sc_rxdma;
+        int sc_rxbufsize;       /* rx size based on mtu */
+        u32 *sc_rxlink;         /* link ptr in last RX desc */
+        u32 sc_rxflush;         /* rx flush in progress */
+        u64 sc_lastrx;          /* tsf of last rx'd frame */
+
+        /* TX */
+        struct list_head sc_txbuf;
+        struct ath_txq sc_txq[ATH9K_NUM_TX_QUEUES];
+        struct ath_descdma sc_txdma;
+        u32 sc_txqsetup;
+        u32 sc_txintrperiod;    /* tx interrupt batching */
+        int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */
+        u32 sc_ant_tx[8];       /* recent tx frames/antenna */
+
+        /* Beacon */
+        struct ath9k_tx_queue_info sc_beacon_qi;
+        struct ath_descdma sc_bdma;
+        struct ath_txq *sc_cabq;
+        struct list_head sc_bbuf;
+        u32 sc_bhalq;
+        u32 sc_bmisscount;
+        u32 ast_be_xmit;        /* beacons transmitted */
+
+        /* Rate */
+        struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
+        const struct ath9k_rate_table *sc_currates;
+        u8 sc_rixmap[256];      /* IEEE to h/w rate table ix */
+        u8 sc_protrix;          /* protection rate index */
+        struct {
+                u32 rateKbps;   /* transfer rate in kbs */
+                u8 ieeerate;    /* IEEE rate */
+        } sc_hwmap[256];        /* h/w rate ix mappings */
+
+        /* Channel, Band */
+        struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX];
+        struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
+        struct ath9k_channel sc_curchan;
+
+        /* Locks */
+        spinlock_t sc_rxflushlock;
+        spinlock_t sc_rxbuflock;
+        spinlock_t sc_txbuflock;
+        spinlock_t sc_resetlock;
+        spinlock_t node_lock;
+};
+
+int ath_init(u16 devid, struct ath_softc *sc);
+void ath_deinit(struct ath_softc *sc);
+int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan);
+int ath_suspend(struct ath_softc *sc);
+irqreturn_t ath_isr(int irq, void *dev);
+int ath_reset(struct ath_softc *sc);
+void ath_scan_start(struct ath_softc *sc);
+void ath_scan_end(struct ath_softc *sc);
+int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan);
+void ath_setup_rate(struct ath_softc *sc,
+                    enum wireless_mode wMode,
+                    enum RATE_TYPE type,
+                    const struct ath9k_rate_table *rt);
+
+/*********************/
+/* Utility Functions */
+/*********************/
+
+void ath_key_reset(struct ath_softc *sc, u16 keyix, int freeslot);
+int ath_keyset(struct ath_softc *sc,
+               u16 keyix,
+               struct ath9k_keyval *hk,
+               const u8 mac[ETH_ALEN]);
+int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
+int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
+void ath_setslottime(struct ath_softc *sc);
+void ath_update_txpow(struct ath_softc *sc);
+int ath_cabq_update(struct ath_softc *);
+void ath_get_currentCountry(struct ath_softc *sc,
+        struct ath9k_country_entry *ctry);
+u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp);
+void ath_internal_reset(struct ath_softc *sc);
+u32 ath_chan2flags(struct ieee80211_channel *chan, struct ath_softc *sc);
+dma_addr_t ath_skb_map_single(struct ath_softc *sc,
+                              struct sk_buff *skb,
+                              int direction,
+                              dma_addr_t *pa);
+void ath_skb_unmap_single(struct ath_softc *sc,
+                          struct sk_buff *skb,
+                          int direction,
+                          dma_addr_t *pa);
+void ath_mcast_merge(struct ath_softc *sc, u32 mfilt[2]);
+enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc);
+
+#endif /* CORE_H */
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
new file mode 100644
index 000000000000..a17eb130f574
--- /dev/null
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -0,0 +1,8575 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/io.h>
+#include <asm/unaligned.h>
+
+#include "core.h"
+#include "hw.h"
+#include "reg.h"
+#include "phy.h"
+#include "initvals.h"
+
+static void ath9k_hw_iqcal_collect(struct ath_hal *ah);
+static void ath9k_hw_iqcalibrate(struct ath_hal *ah, u8 numChains);
+static void ath9k_hw_adc_gaincal_collect(struct ath_hal *ah);
+static void ath9k_hw_adc_gaincal_calibrate(struct ath_hal *ah,
+                                           u8 numChains);
+static void ath9k_hw_adc_dccal_collect(struct ath_hal *ah);
+static void ath9k_hw_adc_dccal_calibrate(struct ath_hal *ah,
+                                         u8 numChains);
+
+static const u8 CLOCK_RATE[] = { 40, 80, 22, 44, 88, 40 };
+static const int16_t NOISE_FLOOR[] = { -96, -93, -98, -96, -93, -96 };
+
+static const struct hal_percal_data iq_cal_multi_sample = {
+        IQ_MISMATCH_CAL,
+        MAX_CAL_SAMPLES,
+        PER_MIN_LOG_COUNT,
+        ath9k_hw_iqcal_collect,
+        ath9k_hw_iqcalibrate
+};
+static const struct hal_percal_data iq_cal_single_sample = {
+        IQ_MISMATCH_CAL,
+        MIN_CAL_SAMPLES,
+        PER_MAX_LOG_COUNT,
+        ath9k_hw_iqcal_collect,
+        ath9k_hw_iqcalibrate
+};
+static const struct hal_percal_data adc_gain_cal_multi_sample = {
+        ADC_GAIN_CAL,
+        MAX_CAL_SAMPLES,
+        PER_MIN_LOG_COUNT,
+        ath9k_hw_adc_gaincal_collect,
+        ath9k_hw_adc_gaincal_calibrate
+};
+static const struct hal_percal_data adc_gain_cal_single_sample = {
+        ADC_GAIN_CAL,
+        MIN_CAL_SAMPLES,
+        PER_MAX_LOG_COUNT,
+        ath9k_hw_adc_gaincal_collect,
+        ath9k_hw_adc_gaincal_calibrate
+};
+static const struct hal_percal_data adc_dc_cal_multi_sample = {
+        ADC_DC_CAL,
+        MAX_CAL_SAMPLES,
+        PER_MIN_LOG_COUNT,
+        ath9k_hw_adc_dccal_collect,
+        ath9k_hw_adc_dccal_calibrate
+};
+static const struct hal_percal_data adc_dc_cal_single_sample = {
+        ADC_DC_CAL,
+        MIN_CAL_SAMPLES,
+        PER_MAX_LOG_COUNT,
+        ath9k_hw_adc_dccal_collect,
+        ath9k_hw_adc_dccal_calibrate
+};
+static const struct hal_percal_data adc_init_dc_cal = {
+        ADC_DC_INIT_CAL,
+        MIN_CAL_SAMPLES,
+        INIT_LOG_COUNT,
+        ath9k_hw_adc_dccal_collect,
+        ath9k_hw_adc_dccal_calibrate
+};
+
+static const struct ath_hal ar5416hal = {
+        AR5416_MAGIC,
+        0,
+        0,
+        NULL,
+        NULL,
+        CTRY_DEFAULT,
+        0,
+        0,
+        0,
+        0,
+        0,
+        {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        },
+};
+
+static struct ath9k_rate_table ar5416_11a_table = {
+        8,
+        {0},
+        {
+                {true, PHY_OFDM, 6000, 0x0b, 0x00, (0x80 | 12), 0},
+                {true, PHY_OFDM, 9000, 0x0f, 0x00, 18, 0},
+                {true, PHY_OFDM, 12000, 0x0a, 0x00, (0x80 | 24), 2},
+                {true, PHY_OFDM, 18000, 0x0e, 0x00, 36, 2},
+                {true, PHY_OFDM, 24000, 0x09, 0x00, (0x80 | 48), 4},
+                {true, PHY_OFDM, 36000, 0x0d, 0x00, 72, 4},
+                {true, PHY_OFDM, 48000, 0x08, 0x00, 96, 4},
+                {true, PHY_OFDM, 54000, 0x0c, 0x00, 108, 4}
+        },
+};
+
+static struct ath9k_rate_table ar5416_11b_table = {
+        4,
+        {0},
+        {
+                {true, PHY_CCK, 1000, 0x1b, 0x00, (0x80 | 2), 0},
+                {true, PHY_CCK, 2000, 0x1a, 0x04, (0x80 | 4), 1},
+                {true, PHY_CCK, 5500, 0x19, 0x04, (0x80 | 11), 1},
+                {true, PHY_CCK, 11000, 0x18, 0x04, (0x80 | 22), 1}
+        },
+};
+
+static struct ath9k_rate_table ar5416_11g_table = {
+        12,
+        {0},
+        {
+                {true, PHY_CCK, 1000, 0x1b, 0x00, (0x80 | 2), 0},
+                {true, PHY_CCK, 2000, 0x1a, 0x04, (0x80 | 4), 1},
+                {true, PHY_CCK, 5500, 0x19, 0x04, (0x80 | 11), 2},
+                {true, PHY_CCK, 11000, 0x18, 0x04, (0x80 | 22), 3},
+
+                {false, PHY_OFDM, 6000, 0x0b, 0x00, 12, 4},
+                {false, PHY_OFDM, 9000, 0x0f, 0x00, 18, 4},
+                {true, PHY_OFDM, 12000, 0x0a, 0x00, 24, 6},
+                {true, PHY_OFDM, 18000, 0x0e, 0x00, 36, 6},
+                {true, PHY_OFDM, 24000, 0x09, 0x00, 48, 8},
+                {true, PHY_OFDM, 36000, 0x0d, 0x00, 72, 8},
+                {true, PHY_OFDM, 48000, 0x08, 0x00, 96, 8},
+                {true, PHY_OFDM, 54000, 0x0c, 0x00, 108, 8}
+        },
+};
+
+static struct ath9k_rate_table ar5416_11ng_table = {
+        28,
+        {0},
+        {
+                {true, PHY_CCK, 1000, 0x1b, 0x00, (0x80 | 2), 0},
+                {true, PHY_CCK, 2000, 0x1a, 0x04, (0x80 | 4), 1},
+                {true, PHY_CCK, 5500, 0x19, 0x04, (0x80 | 11), 2},
+                {true, PHY_CCK, 11000, 0x18, 0x04, (0x80 | 22), 3},
+
+                {false, PHY_OFDM, 6000, 0x0b, 0x00, 12, 4},
+                {false, PHY_OFDM, 9000, 0x0f, 0x00, 18, 4},
+                {true, PHY_OFDM, 12000, 0x0a, 0x00, 24, 6},
+                {true, PHY_OFDM, 18000, 0x0e, 0x00, 36, 6},
+                {true, PHY_OFDM, 24000, 0x09, 0x00, 48, 8},
+                {true, PHY_OFDM, 36000, 0x0d, 0x00, 72, 8},
+                {true, PHY_OFDM, 48000, 0x08, 0x00, 96, 8},
+                {true, PHY_OFDM, 54000, 0x0c, 0x00, 108, 8},
+                {true, PHY_HT, 6500, 0x80, 0x00, 0, 4},
+                {true, PHY_HT, 13000, 0x81, 0x00, 1, 6},
+                {true, PHY_HT, 19500, 0x82, 0x00, 2, 6},
+                {true, PHY_HT, 26000, 0x83, 0x00, 3, 8},
+                {true, PHY_HT, 39000, 0x84, 0x00, 4, 8},
+                {true, PHY_HT, 52000, 0x85, 0x00, 5, 8},
+                {true, PHY_HT, 58500, 0x86, 0x00, 6, 8},
+                {true, PHY_HT, 65000, 0x87, 0x00, 7, 8},
+                {true, PHY_HT, 13000, 0x88, 0x00, 8, 4},
+                {true, PHY_HT, 26000, 0x89, 0x00, 9, 6},
+                {true, PHY_HT, 39000, 0x8a, 0x00, 10, 6},
+                {true, PHY_HT, 52000, 0x8b, 0x00, 11, 8},
+                {true, PHY_HT, 78000, 0x8c, 0x00, 12, 8},
+                {true, PHY_HT, 104000, 0x8d, 0x00, 13, 8},
+                {true, PHY_HT, 117000, 0x8e, 0x00, 14, 8},
+                {true, PHY_HT, 130000, 0x8f, 0x00, 15, 8},
+        },
+};
+
+static struct ath9k_rate_table ar5416_11na_table = {
+        24,
+        {0},
+        {
+                {true, PHY_OFDM, 6000, 0x0b, 0x00, (0x80 | 12), 0},
+                {true, PHY_OFDM, 9000, 0x0f, 0x00, 18, 0},
+                {true, PHY_OFDM, 12000, 0x0a, 0x00, (0x80 | 24), 2},
+                {true, PHY_OFDM, 18000, 0x0e, 0x00, 36, 2},
+                {true, PHY_OFDM, 24000, 0x09, 0x00, (0x80 | 48), 4},
+                {true, PHY_OFDM, 36000, 0x0d, 0x00, 72, 4},
+                {true, PHY_OFDM, 48000, 0x08, 0x00, 96, 4},
+                {true, PHY_OFDM, 54000, 0x0c, 0x00, 108, 4},
+                {true, PHY_HT, 6500, 0x80, 0x00, 0, 0},
+                {true, PHY_HT, 13000, 0x81, 0x00, 1, 2},
+                {true, PHY_HT, 19500, 0x82, 0x00, 2, 2},
+                {true, PHY_HT, 26000, 0x83, 0x00, 3, 4},
+                {true, PHY_HT, 39000, 0x84, 0x00, 4, 4},
+                {true, PHY_HT, 52000, 0x85, 0x00, 5, 4},
+                {true, PHY_HT, 58500, 0x86, 0x00, 6, 4},
+                {true, PHY_HT, 65000, 0x87, 0x00, 7, 4},
+                {true, PHY_HT, 13000, 0x88, 0x00, 8, 0},
+                {true, PHY_HT, 26000, 0x89, 0x00, 9, 2},
+                {true, PHY_HT, 39000, 0x8a, 0x00, 10, 2},
+                {true, PHY_HT, 52000, 0x8b, 0x00, 11, 4},
+                {true, PHY_HT, 78000, 0x8c, 0x00, 12, 4},
+                {true, PHY_HT, 104000, 0x8d, 0x00, 13, 4},
+                {true, PHY_HT, 117000, 0x8e, 0x00, 14, 4},
+                {true, PHY_HT, 130000, 0x8f, 0x00, 15, 4},
+        },
+};
+
+static enum wireless_mode ath9k_hw_chan2wmode(struct ath_hal *ah,
+                                       const struct ath9k_channel *chan)
+{
+        if (IS_CHAN_CCK(chan))
+                return ATH9K_MODE_11A;
+        if (IS_CHAN_G(chan))
+                return ATH9K_MODE_11G;
+        return ATH9K_MODE_11A;
+}
+
+static bool ath9k_hw_wait(struct ath_hal *ah,
+                          u32 reg,
+                          u32 mask,
+                          u32 val)
+{
+        int i;
+
+        for (i = 0; i < (AH_TIMEOUT / AH_TIME_QUANTUM); i++) {
+                if ((REG_READ(ah, reg) & mask) == val)
+                        return true;
+
+                udelay(AH_TIME_QUANTUM);
+        }
+        DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
+                 "%s: timeout on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
+                 __func__, reg, REG_READ(ah, reg), mask, val);
+        return false;
+}
+
+static bool ath9k_hw_eeprom_read(struct ath_hal *ah, u32 off,
+                                 u16 *data)
+{
+        (void) REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
+
+        if (!ath9k_hw_wait(ah,
+                           AR_EEPROM_STATUS_DATA,
+                           AR_EEPROM_STATUS_DATA_BUSY |
+                           AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0)) {
+                return false;
+        }
+
+        *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
+                   AR_EEPROM_STATUS_DATA_VAL);
+
+        return true;
+}
+
+static int ath9k_hw_flash_map(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        ahp->ah_cal_mem = ioremap(AR5416_EEPROM_START_ADDR, AR5416_EEPROM_MAX);
+
+        if (!ahp->ah_cal_mem) {
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                         "%s: cannot remap eeprom region \n", __func__);
+                return -EIO;
+        }
+
+        return 0;
+}
+
+static bool ath9k_hw_flash_read(struct ath_hal *ah, u32 off,
+                                u16 *data)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        *data = ioread16(ahp->ah_cal_mem + off);
+        return true;
+}
+
+static void ath9k_hw_read_revisions(struct ath_hal *ah)
+{
+        u32 val;
+
+        val = REG_READ(ah, AR_SREV) & AR_SREV_ID;
+
+        if (val == 0xFF) {
+                val = REG_READ(ah, AR_SREV);
+
+                ah->ah_macVersion =
+                        (val & AR_SREV_VERSION2) >> AR_SREV_TYPE2_S;
+
+                ah->ah_macRev = MS(val, AR_SREV_REVISION2);
+                ah->ah_isPciExpress =
+                        (val & AR_SREV_TYPE2_HOST_MODE) ? 0 : 1;
+
+        } else {
+                if (!AR_SREV_9100(ah))
+                        ah->ah_macVersion = MS(val, AR_SREV_VERSION);
+
+                ah->ah_macRev = val & AR_SREV_REVISION;
+
+                if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCIE)
+                        ah->ah_isPciExpress = true;
+        }
+}
+
+u32 ath9k_hw_reverse_bits(u32 val, u32 n)
+{
+        u32 retval;
+        int i;
+
+        for (i = 0, retval = 0; i < n; i++) {
+                retval = (retval << 1) | (val & 1);
+                val >>= 1;
+        }
+        return retval;
+}
+
+static void ath9k_hw_set_defaults(struct ath_hal *ah)
+{
+        int i;
+
+        ah->ah_config.dma_beacon_response_time = 2;
+        ah->ah_config.sw_beacon_response_time = 10;
+        ah->ah_config.additional_swba_backoff = 0;
+        ah->ah_config.ack_6mb = 0x0;
+        ah->ah_config.cwm_ignore_extcca = 0;
+        ah->ah_config.pcie_powersave_enable = 0;
+        ah->ah_config.pcie_l1skp_enable = 0;
+        ah->ah_config.pcie_clock_req = 0;
+        ah->ah_config.pcie_power_reset = 0x100;
+        ah->ah_config.pcie_restore = 0;
+        ah->ah_config.pcie_waen = 0;
+        ah->ah_config.analog_shiftreg = 1;
+        ah->ah_config.ht_enable = 1;
+        ah->ah_config.ofdm_trig_low = 200;
+        ah->ah_config.ofdm_trig_high = 500;
+        ah->ah_config.cck_trig_high = 200;
+        ah->ah_config.cck_trig_low = 100;
+        ah->ah_config.enable_ani = 0;
+        ah->ah_config.noise_immunity_level = 4;
+        ah->ah_config.ofdm_weaksignal_det = 1;
+        ah->ah_config.cck_weaksignal_thr = 0;
+        ah->ah_config.spur_immunity_level = 2;
+        ah->ah_config.firstep_level = 0;
+        ah->ah_config.rssi_thr_high = 40;
+        ah->ah_config.rssi_thr_low = 7;
+        ah->ah_config.diversity_control = 0;
+        ah->ah_config.antenna_switch_swap = 0;
+
+        for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+                ah->ah_config.spurchans[i][0] = AR_NO_SPUR;
+                ah->ah_config.spurchans[i][1] = AR_NO_SPUR;
+        }
+
+        ah->ah_config.intr_mitigation = 0;
+}
+
+static inline void ath9k_hw_override_ini(struct ath_hal *ah,
+                                         struct ath9k_channel *chan)
+{
+        if (!AR_SREV_5416_V20_OR_LATER(ah)
+            || AR_SREV_9280_10_OR_LATER(ah))
+                return;
+
+        REG_WRITE(ah, 0x9800 + (651 << 2), 0x11);
+}
+
+static inline void ath9k_hw_init_bb(struct ath_hal *ah,
+                                    struct ath9k_channel *chan)
+{
+        u32 synthDelay;
+
+        synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
+        if (IS_CHAN_CCK(chan))
+                synthDelay = (4 * synthDelay) / 22;
+        else
+                synthDelay /= 10;
+
+        REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
+
+        udelay(synthDelay + BASE_ACTIVATE_DELAY);
+}
+
+static inline void ath9k_hw_init_interrupt_masks(struct ath_hal *ah,
+                                                 enum ath9k_opmode opmode)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        ahp->ah_maskReg = AR_IMR_TXERR |
+                AR_IMR_TXURN |
+                AR_IMR_RXERR |
+                AR_IMR_RXORN |
+                AR_IMR_BCNMISC;
+
+        if (ahp->ah_intrMitigation)
+                ahp->ah_maskReg |= AR_IMR_RXINTM | AR_IMR_RXMINTR;
+        else
+                ahp->ah_maskReg |= AR_IMR_RXOK;
+
+        ahp->ah_maskReg |= AR_IMR_TXOK;
+
+        if (opmode == ATH9K_M_HOSTAP)
+                ahp->ah_maskReg |= AR_IMR_MIB;
+
+        REG_WRITE(ah, AR_IMR, ahp->ah_maskReg);
+        REG_WRITE(ah, AR_IMR_S2, REG_READ(ah, AR_IMR_S2) | AR_IMR_S2_GTT);
+
+        if (!AR_SREV_9100(ah)) {
+                REG_WRITE(ah, AR_INTR_SYNC_CAUSE, 0xFFFFFFFF);
+                REG_WRITE(ah, AR_INTR_SYNC_ENABLE, AR_INTR_SYNC_DEFAULT);
+                REG_WRITE(ah, AR_INTR_SYNC_MASK, 0);
+        }
+}
+
+static inline void ath9k_hw_init_qos(struct ath_hal *ah)
+{
+        REG_WRITE(ah, AR_MIC_QOS_CONTROL, 0x100aa);
+        REG_WRITE(ah, AR_MIC_QOS_SELECT, 0x3210);
+
+        REG_WRITE(ah, AR_QOS_NO_ACK,
+                  SM(2, AR_QOS_NO_ACK_TWO_BIT) |
+                  SM(5, AR_QOS_NO_ACK_BIT_OFF) |
+                  SM(0, AR_QOS_NO_ACK_BYTE_OFF));
+
+        REG_WRITE(ah, AR_TXOP_X, AR_TXOP_X_VAL);
+        REG_WRITE(ah, AR_TXOP_0_3, 0xFFFFFFFF);
+        REG_WRITE(ah, AR_TXOP_4_7, 0xFFFFFFFF);
+        REG_WRITE(ah, AR_TXOP_8_11, 0xFFFFFFFF);
+        REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF);
+}
+
+static void ath9k_hw_analog_shift_rmw(struct ath_hal *ah,
+                                      u32 reg,
+                                      u32 mask,
+                                      u32 shift,
+                                      u32 val)
+{
+        u32 regVal;
+
+        regVal = REG_READ(ah, reg) & ~mask;
+        regVal |= (val << shift) & mask;
+
+        REG_WRITE(ah, reg, regVal);
+
+        if (ah->ah_config.analog_shiftreg)
+                udelay(100);
+
+        return;
+}
+
+static u8 ath9k_hw_get_num_ant_config(struct ath_hal_5416 *ahp,
+                                      enum ieee80211_band freq_band)
+{
+        struct ar5416_eeprom *eep = &ahp->ah_eeprom;
+        struct modal_eep_header *pModal =
+                &(eep->modalHeader[IEEE80211_BAND_5GHZ == freq_band]);
+        struct base_eep_header *pBase = &eep->baseEepHeader;
+        u8 num_ant_config;
+
+        num_ant_config = 1;
+
+        if (pBase->version >= 0x0E0D)
+                if (pModal->useAnt1)
+                        num_ant_config += 1;
+
+        return num_ant_config;
+}
+
+static int
+ath9k_hw_get_eeprom_antenna_cfg(struct ath_hal_5416 *ahp,
+                                struct ath9k_channel *chan,
+                                u8 index,
+                                u16 *config)
+{
+        struct ar5416_eeprom *eep = &ahp->ah_eeprom;
+        struct modal_eep_header *pModal =
+                &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
+        struct base_eep_header *pBase = &eep->baseEepHeader;
+
+        switch (index) {
+        case 0:
+                *config = pModal->antCtrlCommon & 0xFFFF;
+                return 0;
+        case 1:
+                if (pBase->version >= 0x0E0D) {
+                        if (pModal->useAnt1) {
+                                *config =
+                                ((pModal->antCtrlCommon & 0xFFFF0000) >> 16);
+                                return 0;
+                        }
+                }
+                break;
+        default:
+                break;
+        }
+
+        return -EINVAL;
+}
+
+static inline bool ath9k_hw_nvram_read(struct ath_hal *ah,
+                                       u32 off,
+                                       u16 *data)
+{
+        if (ath9k_hw_use_flash(ah))
+                return ath9k_hw_flash_read(ah, off, data);
+        else
+                return ath9k_hw_eeprom_read(ah, off, data);
+}
+
+static inline bool ath9k_hw_fill_eeprom(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416_eeprom *eep = &ahp->ah_eeprom;
+        u16 *eep_data;
+        int addr, ar5416_eep_start_loc = 0;
+
+        if (!ath9k_hw_use_flash(ah)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                         "%s: Reading from EEPROM, not flash\n", __func__);
+                ar5416_eep_start_loc = 256;
+        }
+        if (AR_SREV_9100(ah))
+                ar5416_eep_start_loc = 256;
+
+        eep_data = (u16 *) eep;
+        for (addr = 0;
+             addr < sizeof(struct ar5416_eeprom) / sizeof(u16);
+             addr++) {
+                if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc,
+                                         eep_data)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                                 "%s: Unable to read eeprom region \n",
+                                 __func__);
+                        return false;
+                }
+                eep_data++;
+        }
+        return true;
+}
+
+/* XXX: Clean me up, make me more legible */
+static bool
+ath9k_hw_eeprom_set_board_values(struct ath_hal *ah,
+                                 struct ath9k_channel *chan)
+{
+        struct modal_eep_header *pModal;
+        int i, regChainOffset;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416_eeprom *eep = &ahp->ah_eeprom;
+        u8 txRxAttenLocal;
+        u16 ant_config;
+
+        pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
+
+        txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44;
+
+        ath9k_hw_get_eeprom_antenna_cfg(ahp, chan, 1, &ant_config);
+        REG_WRITE(ah, AR_PHY_SWITCH_COM, ant_config);
+
+        for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+                if (AR_SREV_9280(ah)) {
+                        if (i >= 2)
+                                break;
+                }
+
+                if (AR_SREV_5416_V20_OR_LATER(ah) &&
+                    (ahp->ah_rxchainmask == 5 || ahp->ah_txchainmask == 5)
+                    && (i != 0))
+                        regChainOffset = (i == 1) ? 0x2000 : 0x1000;
+                else
+                        regChainOffset = i * 0x1000;
+
+                REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
+                          pModal->antCtrlChain[i]);
+
+                REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
+                          (REG_READ(ah,
+                                    AR_PHY_TIMING_CTRL4(0) +
+                                    regChainOffset) &
+                           ~(AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF |
+                             AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF)) |
+                          SM(pModal->iqCalICh[i],
+                             AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
+                          SM(pModal->iqCalQCh[i],
+                             AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
+
+                if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {
+                        if ((eep->baseEepHeader.version &
+                             AR5416_EEP_VER_MINOR_MASK) >=
+                            AR5416_EEP_MINOR_VER_3) {
+                                txRxAttenLocal = pModal->txRxAttenCh[i];
+                                if (AR_SREV_9280_10_OR_LATER(ah)) {
+                                        REG_RMW_FIELD(ah,
+                                                AR_PHY_GAIN_2GHZ +
+                                                regChainOffset,
+                                                AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN,
+                                                pModal->
+                                                bswMargin[i]);
+                                        REG_RMW_FIELD(ah,
+                                                AR_PHY_GAIN_2GHZ +
+                                                regChainOffset,
+                                                AR_PHY_GAIN_2GHZ_XATTEN1_DB,
+                                                pModal->
+                                                bswAtten[i]);
+                                        REG_RMW_FIELD(ah,
+                                                AR_PHY_GAIN_2GHZ +
+                                                regChainOffset,
+                                                AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN,
+                                                pModal->
+                                                xatten2Margin[i]);
+                                        REG_RMW_FIELD(ah,
+                                                AR_PHY_GAIN_2GHZ +
+                                                regChainOffset,
+                                                AR_PHY_GAIN_2GHZ_XATTEN2_DB,
+                                                pModal->
+                                                xatten2Db[i]);
+                                } else {
+                                        REG_WRITE(ah,
+                                                  AR_PHY_GAIN_2GHZ +
+                                                  regChainOffset,
+                                                  (REG_READ(ah,
+                                                            AR_PHY_GAIN_2GHZ +
+                                                            regChainOffset) &
+                                                   ~AR_PHY_GAIN_2GHZ_BSW_MARGIN)
+                                                  | SM(pModal->
+                                                  bswMargin[i],
+                                                  AR_PHY_GAIN_2GHZ_BSW_MARGIN));
+                                        REG_WRITE(ah,
+                                                  AR_PHY_GAIN_2GHZ +
+                                                  regChainOffset,
+                                                  (REG_READ(ah,
+                                                            AR_PHY_GAIN_2GHZ +
+                                                            regChainOffset) &
+                                                   ~AR_PHY_GAIN_2GHZ_BSW_ATTEN)
+                                                  | SM(pModal->bswAtten[i],
+                                                  AR_PHY_GAIN_2GHZ_BSW_ATTEN));
+                                }
+                        }
+                        if (AR_SREV_9280_10_OR_LATER(ah)) {
+                                REG_RMW_FIELD(ah,
+                                              AR_PHY_RXGAIN +
+                                              regChainOffset,
+                                              AR9280_PHY_RXGAIN_TXRX_ATTEN,
+                                              txRxAttenLocal);
+                                REG_RMW_FIELD(ah,
+                                              AR_PHY_RXGAIN +
+                                              regChainOffset,
+                                              AR9280_PHY_RXGAIN_TXRX_MARGIN,
+                                              pModal->rxTxMarginCh[i]);
+                        } else {
+                                REG_WRITE(ah,
+                                          AR_PHY_RXGAIN + regChainOffset,
+                                          (REG_READ(ah,
+                                                    AR_PHY_RXGAIN +
+                                                    regChainOffset) &
+                                           ~AR_PHY_RXGAIN_TXRX_ATTEN) |
+                                          SM(txRxAttenLocal,
+                                             AR_PHY_RXGAIN_TXRX_ATTEN));
+                                REG_WRITE(ah,
+                                          AR_PHY_GAIN_2GHZ +
+                                          regChainOffset,
+                                          (REG_READ(ah,
+                                                    AR_PHY_GAIN_2GHZ +
+                                                    regChainOffset) &
+                                           ~AR_PHY_GAIN_2GHZ_RXTX_MARGIN) |
+                                          SM(pModal->rxTxMarginCh[i],
+                                             AR_PHY_GAIN_2GHZ_RXTX_MARGIN));
+                        }
+                }
+        }
+
+        if (AR_SREV_9280_10_OR_LATER(ah)) {
+                if (IS_CHAN_2GHZ(chan)) {
+                        ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH0,
+                                                  AR_AN_RF2G1_CH0_OB,
+                                                  AR_AN_RF2G1_CH0_OB_S,
+                                                  pModal->ob);
+                        ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH0,
+                                                  AR_AN_RF2G1_CH0_DB,
+                                                  AR_AN_RF2G1_CH0_DB_S,
+                                                  pModal->db);
+                        ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH1,
+                                                  AR_AN_RF2G1_CH1_OB,
+                                                  AR_AN_RF2G1_CH1_OB_S,
+                                                  pModal->ob_ch1);
+                        ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH1,
+                                                  AR_AN_RF2G1_CH1_DB,
+                                                  AR_AN_RF2G1_CH1_DB_S,
+                                                  pModal->db_ch1);
+                } else {
+                        ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH0,
+                                                  AR_AN_RF5G1_CH0_OB5,
+                                                  AR_AN_RF5G1_CH0_OB5_S,
+                                                  pModal->ob);
+                        ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH0,
+                                                  AR_AN_RF5G1_CH0_DB5,
+                                                  AR_AN_RF5G1_CH0_DB5_S,
+                                                  pModal->db);
+                        ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH1,
+                                                  AR_AN_RF5G1_CH1_OB5,
+                                                  AR_AN_RF5G1_CH1_OB5_S,
+                                                  pModal->ob_ch1);
+                        ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH1,
+                                                  AR_AN_RF5G1_CH1_DB5,
+                                                  AR_AN_RF5G1_CH1_DB5_S,
+                                                  pModal->db_ch1);
+                }
+                ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2,
+                                          AR_AN_TOP2_XPABIAS_LVL,
+                                          AR_AN_TOP2_XPABIAS_LVL_S,
+                                          pModal->xpaBiasLvl);
+                ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2,
+                                          AR_AN_TOP2_LOCALBIAS,
+                                          AR_AN_TOP2_LOCALBIAS_S,
+                                          pModal->local_bias);
+                DPRINTF(ah->ah_sc, ATH_DBG_ANY, "ForceXPAon: %d\n",
+                        pModal->force_xpaon);
+                REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG,
+                              pModal->force_xpaon);
+        }
+
+        REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,
+                      pModal->switchSettling);
+        REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC,
+                      pModal->adcDesiredSize);
+
+        if (!AR_SREV_9280_10_OR_LATER(ah))
+                REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
+                              AR_PHY_DESIRED_SZ_PGA,
+                              pModal->pgaDesiredSize);
+
+        REG_WRITE(ah, AR_PHY_RF_CTL4,
+                  SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF)
+                  | SM(pModal->txEndToXpaOff,
+                       AR_PHY_RF_CTL4_TX_END_XPAB_OFF)
+                  | SM(pModal->txFrameToXpaOn,
+                       AR_PHY_RF_CTL4_FRAME_XPAA_ON)
+                  | SM(pModal->txFrameToXpaOn,
+                       AR_PHY_RF_CTL4_FRAME_XPAB_ON));
+
+        REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
+                      pModal->txEndToRxOn);
+        if (AR_SREV_9280_10_OR_LATER(ah)) {
+                REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
+                              pModal->thresh62);
+                REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0,
+                              AR_PHY_EXT_CCA0_THRESH62,
+                              pModal->thresh62);
+        } else {
+                REG_RMW_FIELD(ah, AR_PHY_CCA, AR_PHY_CCA_THRESH62,
+                              pModal->thresh62);
+                REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
+                              AR_PHY_EXT_CCA_THRESH62,
+                              pModal->thresh62);
+        }
+
+        if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
+            AR5416_EEP_MINOR_VER_2) {
+                REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,
+                              AR_PHY_TX_END_DATA_START,
+                              pModal->txFrameToDataStart);
+                REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON,
+                              pModal->txFrameToPaOn);
+        }
+
+        if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
+            AR5416_EEP_MINOR_VER_3) {
+                if (IS_CHAN_HT40(chan))
+                        REG_RMW_FIELD(ah, AR_PHY_SETTLING,
+                                      AR_PHY_SETTLING_SWITCH,
+                                      pModal->swSettleHt40);
+        }
+
+        return true;
+}
+
+static inline int ath9k_hw_check_eeprom(struct ath_hal *ah)
+{
+        u32 sum = 0, el;
+        u16 *eepdata;
+        int i;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        bool need_swap = false;
+        struct ar5416_eeprom *eep =
+                (struct ar5416_eeprom *) &ahp->ah_eeprom;
+
+        if (!ath9k_hw_use_flash(ah)) {
+                u16 magic, magic2;
+                int addr;
+
+                if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,
+                                        &magic)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                                 "%s: Reading Magic # failed\n", __func__);
+                        return false;
+                }
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "%s: Read Magic = 0x%04X\n",
+                         __func__, magic);
+
+                if (magic != AR5416_EEPROM_MAGIC) {
+                        magic2 = swab16(magic);
+
+                        if (magic2 == AR5416_EEPROM_MAGIC) {
+                                need_swap = true;
+                                eepdata = (u16 *) (&ahp->ah_eeprom);
+
+                                for (addr = 0;
+                                     addr <
+                                             sizeof(struct ar5416_eeprom) /
+                                             sizeof(u16); addr++) {
+                                        u16 temp;
+
+                                        temp = swab16(*eepdata);
+                                        *eepdata = temp;
+                                        eepdata++;
+
+                                        DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                                                 "0x%04X  ", *eepdata);
+                                        if (((addr + 1) % 6) == 0)
+                                                DPRINTF(ah->ah_sc,
+                                                         ATH_DBG_EEPROM,
+                                                         "\n");
+                                }
+                        } else {
+                                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                                         "Invalid EEPROM Magic. "
+                                        "endianness missmatch.\n");
+                                return -EINVAL;
+                        }
+                }
+        }
+        DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "need_swap = %s.\n",
+                 need_swap ? "True" : "False");
+
+        if (need_swap)
+                el = swab16(ahp->ah_eeprom.baseEepHeader.length);
+        else
+                el = ahp->ah_eeprom.baseEepHeader.length;
+
+        if (el > sizeof(struct ar5416_eeprom))
+                el = sizeof(struct ar5416_eeprom) / sizeof(u16);
+        else
+                el = el / sizeof(u16);
+
+        eepdata = (u16 *) (&ahp->ah_eeprom);
+
+        for (i = 0; i < el; i++)
+                sum ^= *eepdata++;
+
+        if (need_swap) {
+                u32 integer, j;
+                u16 word;
+
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                         "EEPROM Endianness is not native.. Changing \n");
+
+                word = swab16(eep->baseEepHeader.length);
+                eep->baseEepHeader.length = word;
+
+                word = swab16(eep->baseEepHeader.checksum);
+                eep->baseEepHeader.checksum = word;
+
+                word = swab16(eep->baseEepHeader.version);
+                eep->baseEepHeader.version = word;
+
+                word = swab16(eep->baseEepHeader.regDmn[0]);
+                eep->baseEepHeader.regDmn[0] = word;
+
+                word = swab16(eep->baseEepHeader.regDmn[1]);
+                eep->baseEepHeader.regDmn[1] = word;
+
+                word = swab16(eep->baseEepHeader.rfSilent);
+                eep->baseEepHeader.rfSilent = word;
+
+                word = swab16(eep->baseEepHeader.blueToothOptions);
+                eep->baseEepHeader.blueToothOptions = word;
+
+                word = swab16(eep->baseEepHeader.deviceCap);
+                eep->baseEepHeader.deviceCap = word;
+
+                for (j = 0; j < ARRAY_SIZE(eep->modalHeader); j++) {
+                        struct modal_eep_header *pModal =
+                                &eep->modalHeader[j];
+                        integer = swab32(pModal->antCtrlCommon);
+                        pModal->antCtrlCommon = integer;
+
+                        for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+                                integer = swab32(pModal->antCtrlChain[i]);
+                                pModal->antCtrlChain[i] = integer;
+                        }
+
+                        for (i = 0; i < AR5416_EEPROM_MODAL_SPURS; i++) {
+                                word = swab16(pModal->spurChans[i].spurChan);
+                                pModal->spurChans[i].spurChan = word;
+                        }
+                }
+        }
+
+        if (sum != 0xffff || ar5416_get_eep_ver(ahp) != AR5416_EEP_VER ||
+            ar5416_get_eep_rev(ahp) < AR5416_EEP_NO_BACK_VER) {
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                         "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
+                         sum, ar5416_get_eep_ver(ahp));
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static bool ath9k_hw_chip_test(struct ath_hal *ah)
+{
+        u32 regAddr[2] = { AR_STA_ID0, AR_PHY_BASE + (8 << 2) };
+        u32 regHold[2];
+        u32 patternData[4] = { 0x55555555,
+                                     0xaaaaaaaa,
+                                     0x66666666,
+                                     0x99999999 };
+        int i, j;
+
+        for (i = 0; i < 2; i++) {
+                u32 addr = regAddr[i];
+                u32 wrData, rdData;
+
+                regHold[i] = REG_READ(ah, addr);
+                for (j = 0; j < 0x100; j++) {
+                        wrData = (j << 16) | j;
+                        REG_WRITE(ah, addr, wrData);
+                        rdData = REG_READ(ah, addr);
+                        if (rdData != wrData) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                                 "%s: address test failed "
+                                "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
+                                 __func__, addr, wrData, rdData);
+                                return false;
+                        }
+                }
+                for (j = 0; j < 4; j++) {
+                        wrData = patternData[j];
+                        REG_WRITE(ah, addr, wrData);
+                        rdData = REG_READ(ah, addr);
+                        if (wrData != rdData) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                                 "%s: address test failed "
+                                "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
+                                 __func__, addr, wrData, rdData);
+                                return false;
+                        }
+                }
+                REG_WRITE(ah, regAddr[i], regHold[i]);
+        }
+        udelay(100);
+        return true;
+}
+
+u32 ath9k_hw_getrxfilter(struct ath_hal *ah)
+{
+        u32 bits = REG_READ(ah, AR_RX_FILTER);
+        u32 phybits = REG_READ(ah, AR_PHY_ERR);
+
+        if (phybits & AR_PHY_ERR_RADAR)
+                bits |= ATH9K_RX_FILTER_PHYRADAR;
+        if (phybits & (AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING))
+                bits |= ATH9K_RX_FILTER_PHYERR;
+        return bits;
+}
+
+void ath9k_hw_setrxfilter(struct ath_hal *ah, u32 bits)
+{
+        u32 phybits;
+
+        REG_WRITE(ah, AR_RX_FILTER, (bits & 0xffff) | AR_RX_COMPR_BAR);
+        phybits = 0;
+        if (bits & ATH9K_RX_FILTER_PHYRADAR)
+                phybits |= AR_PHY_ERR_RADAR;
+        if (bits & ATH9K_RX_FILTER_PHYERR)
+                phybits |= AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING;
+        REG_WRITE(ah, AR_PHY_ERR, phybits);
+
+        if (phybits)
+                REG_WRITE(ah, AR_RXCFG,
+                          REG_READ(ah, AR_RXCFG) | AR_RXCFG_ZLFDMA);
+        else
+                REG_WRITE(ah, AR_RXCFG,
+                          REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_ZLFDMA);
+}
+
+bool ath9k_hw_setcapability(struct ath_hal *ah,
+                            enum ath9k_capability_type type,
+                            u32 capability,
+                            u32 setting,
+                            int *status)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 v;
+
+        switch (type) {
+        case ATH9K_CAP_TKIP_MIC:
+                if (setting)
+                        ahp->ah_staId1Defaults |=
+                                AR_STA_ID1_CRPT_MIC_ENABLE;
+                else
+                        ahp->ah_staId1Defaults &=
+                                ~AR_STA_ID1_CRPT_MIC_ENABLE;
+                return true;
+        case ATH9K_CAP_DIVERSITY:
+                v = REG_READ(ah, AR_PHY_CCK_DETECT);
+                if (setting)
+                        v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
+                else
+                        v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
+                REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
+                return true;
+        case ATH9K_CAP_MCAST_KEYSRCH:
+                if (setting)
+                        ahp->ah_staId1Defaults |= AR_STA_ID1_MCAST_KSRCH;
+                else
+                        ahp->ah_staId1Defaults &= ~AR_STA_ID1_MCAST_KSRCH;
+                return true;
+        case ATH9K_CAP_TSF_ADJUST:
+                if (setting)
+                        ahp->ah_miscMode |= AR_PCU_TX_ADD_TSF;
+                else
+                        ahp->ah_miscMode &= ~AR_PCU_TX_ADD_TSF;
+                return true;
+        default:
+                return false;
+        }
+}
+
+void ath9k_hw_dmaRegDump(struct ath_hal *ah)
+{
+        u32 val[ATH9K_NUM_DMA_DEBUG_REGS];
+        int qcuOffset = 0, dcuOffset = 0;
+        u32 *qcuBase = &val[0], *dcuBase = &val[4];
+        int i;
+
+        REG_WRITE(ah, AR_MACMISC,
+                  ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
+                   (AR_MACMISC_MISC_OBS_BUS_1 <<
+                    AR_MACMISC_MISC_OBS_BUS_MSB_S)));
+
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "Raw DMA Debug values:\n");
+        for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) {
+                if (i % 4 == 0)
+                        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n");
+
+                val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32)));
+                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "%d: %08x ", i, val[i]);
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n\n");
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                 "Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
+
+        for (i = 0; i < ATH9K_NUM_QUEUES;
+             i++, qcuOffset += 4, dcuOffset += 5) {
+                if (i == 8) {
+                        qcuOffset = 0;
+                        qcuBase++;
+                }
+
+                if (i == 6) {
+                        dcuOffset = 0;
+                        dcuBase++;
+                }
+
+                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                         "%2d          %2x      %1x     %2x           %2x\n",
+                         i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
+                         (*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset +
+                                                             3),
+                         val[2] & (0x7 << (i * 3)) >> (i * 3),
+                         (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n");
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                 "qcu_stitch state:   %2x    qcu_fetch state:        %2x\n",
+                 (val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22);
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                 "qcu_complete state: %2x    dcu_complete state:     %2x\n",
+                 (val[3] & 0x1c000000) >> 26, (val[6] & 0x3));
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                 "dcu_arb state:      %2x    dcu_fp state:           %2x\n",
+                 (val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27);
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                 "chan_idle_dur:     %3d    chan_idle_dur_valid:     %1d\n",
+                 (val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10);
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                 "txfifo_valid_0:      %1d    txfifo_valid_1:          %1d\n",
+                 (val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12);
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                 "txfifo_dcu_num_0:   %2d    txfifo_dcu_num_1:       %2d\n",
+                 (val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17);
+
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "pcu observe 0x%x \n",
+                REG_READ(ah, AR_OBS_BUS_1));
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                "AR_CR 0x%x \n", REG_READ(ah, AR_CR));
+}
+
+u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hal *ah,
+                                        u32 *rxc_pcnt,
+                                        u32 *rxf_pcnt,
+                                        u32 *txf_pcnt)
+{
+        static u32 cycles, rx_clear, rx_frame, tx_frame;
+        u32 good = 1;
+
+        u32 rc = REG_READ(ah, AR_RCCNT);
+        u32 rf = REG_READ(ah, AR_RFCNT);
+        u32 tf = REG_READ(ah, AR_TFCNT);
+        u32 cc = REG_READ(ah, AR_CCCNT);
+
+        if (cycles == 0 || cycles > cc) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                         "%s: cycle counter wrap. ExtBusy = 0\n",
+                         __func__);
+                good = 0;
+        } else {
+                u32 cc_d = cc - cycles;
+                u32 rc_d = rc - rx_clear;
+                u32 rf_d = rf - rx_frame;
+                u32 tf_d = tf - tx_frame;
+
+                if (cc_d != 0) {
+                        *rxc_pcnt = rc_d * 100 / cc_d;
+                        *rxf_pcnt = rf_d * 100 / cc_d;
+                        *txf_pcnt = tf_d * 100 / cc_d;
+                } else {
+                        good = 0;
+                }
+        }
+
+        cycles = cc;
+        rx_frame = rf;
+        rx_clear = rc;
+        tx_frame = tf;
+
+        return good;
+}
+
+void ath9k_hw_set11nmac2040(struct ath_hal *ah, enum ath9k_ht_macmode mode)
+{
+        u32 macmode;
+
+        if (mode == ATH9K_HT_MACMODE_2040 &&
+            !ah->ah_config.cwm_ignore_extcca)
+                macmode = AR_2040_JOINED_RX_CLEAR;
+        else
+                macmode = 0;
+
+        REG_WRITE(ah, AR_2040_MODE, macmode);
+}
+
+static void ath9k_hw_mark_phy_inactive(struct ath_hal *ah)
+{
+        REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
+}
+
+
+static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid,
+                                              struct ath_softc *sc,
+                                              void __iomem *mem,
+                                              int *status)
+{
+        static const u8 defbssidmask[ETH_ALEN] =
+                { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+        struct ath_hal_5416 *ahp;
+        struct ath_hal *ah;
+
+        ahp = kzalloc(sizeof(struct ath_hal_5416), GFP_KERNEL);
+        if (ahp == NULL) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                         "%s: cannot allocate memory for state block\n",
+                         __func__);
+                *status = -ENOMEM;
+                return NULL;
+        }
+
+        ah = &ahp->ah;
+
+        memcpy(&ahp->ah, &ar5416hal, sizeof(struct ath_hal));
+
+        ah->ah_sc = sc;
+        ah->ah_sh = mem;
+
+        ah->ah_devid = devid;
+        ah->ah_subvendorid = 0;
+
+        ah->ah_flags = 0;
+        if ((devid == AR5416_AR9100_DEVID))
+                ah->ah_macVersion = AR_SREV_VERSION_9100;
+        if (!AR_SREV_9100(ah))
+                ah->ah_flags = AH_USE_EEPROM;
+
+        ah->ah_powerLimit = MAX_RATE_POWER;
+        ah->ah_tpScale = ATH9K_TP_SCALE_MAX;
+
+        ahp->ah_atimWindow = 0;
+        ahp->ah_diversityControl = ah->ah_config.diversity_control;
+        ahp->ah_antennaSwitchSwap =
+                ah->ah_config.antenna_switch_swap;
+
+        ahp->ah_staId1Defaults = AR_STA_ID1_CRPT_MIC_ENABLE;
+        ahp->ah_beaconInterval = 100;
+        ahp->ah_enable32kHzClock = DONT_USE_32KHZ;
+        ahp->ah_slottime = (u32) -1;
+        ahp->ah_acktimeout = (u32) -1;
+        ahp->ah_ctstimeout = (u32) -1;
+        ahp->ah_globaltxtimeout = (u32) -1;
+        memcpy(&ahp->ah_bssidmask, defbssidmask, ETH_ALEN);
+
+        ahp->ah_gBeaconRate = 0;
+
+        return ahp;
+}
+
+static int ath9k_hw_eeprom_attach(struct ath_hal *ah)
+{
+        int status;
+
+        if (ath9k_hw_use_flash(ah))
+                ath9k_hw_flash_map(ah);
+
+        if (!ath9k_hw_fill_eeprom(ah))
+                return -EIO;
+
+        status = ath9k_hw_check_eeprom(ah);
+
+        return status;
+}
+
+u32 ath9k_hw_get_eeprom(struct ath_hal_5416 *ahp,
+                              enum eeprom_param param)
+{
+        struct ar5416_eeprom *eep = &ahp->ah_eeprom;
+        struct modal_eep_header *pModal = eep->modalHeader;
+        struct base_eep_header *pBase = &eep->baseEepHeader;
+
+        switch (param) {
+        case EEP_NFTHRESH_5:
+                return -pModal[0].noiseFloorThreshCh[0];
+        case EEP_NFTHRESH_2:
+                return -pModal[1].noiseFloorThreshCh[0];
+        case AR_EEPROM_MAC(0):
+                return pBase->macAddr[0] << 8 | pBase->macAddr[1];
+        case AR_EEPROM_MAC(1):
+                return pBase->macAddr[2] << 8 | pBase->macAddr[3];
+        case AR_EEPROM_MAC(2):
+                return pBase->macAddr[4] << 8 | pBase->macAddr[5];
+        case EEP_REG_0:
+                return pBase->regDmn[0];
+        case EEP_REG_1:
+                return pBase->regDmn[1];
+        case EEP_OP_CAP:
+                return pBase->deviceCap;
+        case EEP_OP_MODE:
+                return pBase->opCapFlags;
+        case EEP_RF_SILENT:
+                return pBase->rfSilent;
+        case EEP_OB_5:
+                return pModal[0].ob;
+        case EEP_DB_5:
+                return pModal[0].db;
+        case EEP_OB_2:
+                return pModal[1].ob;
+        case EEP_DB_2:
+                return pModal[1].db;
+        case EEP_MINOR_REV:
+                return pBase->version & AR5416_EEP_VER_MINOR_MASK;
+        case EEP_TX_MASK:
+                return pBase->txMask;
+        case EEP_RX_MASK:
+                return pBase->rxMask;
+        default:
+                return 0;
+        }
+}
+
+static inline int ath9k_hw_get_radiorev(struct ath_hal *ah)
+{
+        u32 val;
+        int i;
+
+        REG_WRITE(ah, AR_PHY(0x36), 0x00007058);
+        for (i = 0; i < 8; i++)
+                REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
+        val = (REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
+        val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
+        return ath9k_hw_reverse_bits(val, 8);
+}
+
+static inline int ath9k_hw_init_macaddr(struct ath_hal *ah)
+{
+        u32 sum;
+        int i;
+        u16 eeval;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        DECLARE_MAC_BUF(mac);
+
+        sum = 0;
+        for (i = 0; i < 3; i++) {
+                eeval = ath9k_hw_get_eeprom(ahp, AR_EEPROM_MAC(i));
+                sum += eeval;
+                ahp->ah_macaddr[2 * i] = eeval >> 8;
+                ahp->ah_macaddr[2 * i + 1] = eeval & 0xff;
+        }
+        if (sum == 0 || sum == 0xffff * 3) {
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                         "%s: mac address read failed: %s\n", __func__,
+                         print_mac(mac, ahp->ah_macaddr));
+                return -EADDRNOTAVAIL;
+        }
+
+        return 0;
+}
+
+static inline int16_t ath9k_hw_interpolate(u16 target,
+                                           u16 srcLeft,
+                                           u16 srcRight,
+                                           int16_t targetLeft,
+                                           int16_t targetRight)
+{
+        int16_t rv;
+
+        if (srcRight == srcLeft) {
+                rv = targetLeft;
+        } else {
+                rv = (int16_t) (((target - srcLeft) * targetRight +
+                                 (srcRight - target) * targetLeft) /
+                                (srcRight - srcLeft));
+        }
+        return rv;
+}
+
+static inline u16 ath9k_hw_fbin2freq(u8 fbin,
+                                           bool is2GHz)
+{
+
+        if (fbin == AR5416_BCHAN_UNUSED)
+                return fbin;
+
+        return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
+}
+
+static u16 ath9k_hw_eeprom_get_spur_chan(struct ath_hal *ah,
+                                               u16 i,
+                                               bool is2GHz)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416_eeprom *eep =
+                (struct ar5416_eeprom *) &ahp->ah_eeprom;
+        u16 spur_val = AR_NO_SPUR;
+
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                 "Getting spur idx %d is2Ghz. %d val %x\n",
+                 i, is2GHz, ah->ah_config.spurchans[i][is2GHz]);
+
+        switch (ah->ah_config.spurmode) {
+        case SPUR_DISABLE:
+                break;
+        case SPUR_ENABLE_IOCTL:
+                spur_val = ah->ah_config.spurchans[i][is2GHz];
+                DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                         "Getting spur val from new loc. %d\n", spur_val);
+                break;
+        case SPUR_ENABLE_EEPROM:
+                spur_val = eep->modalHeader[is2GHz].spurChans[i].spurChan;
+                break;
+
+        }
+        return spur_val;
+}
+
+static inline int ath9k_hw_rfattach(struct ath_hal *ah)
+{
+        bool rfStatus = false;
+        int ecode = 0;
+
+        rfStatus = ath9k_hw_init_rf(ah, &ecode);
+        if (!rfStatus) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                         "%s: RF setup failed, status %u\n", __func__,
+                         ecode);
+                return ecode;
+        }
+
+        return 0;
+}
+
+static int ath9k_hw_rf_claim(struct ath_hal *ah)
+{
+        u32 val;
+
+        REG_WRITE(ah, AR_PHY(0), 0x00000007);
+
+        val = ath9k_hw_get_radiorev(ah);
+        switch (val & AR_RADIO_SREV_MAJOR) {
+        case 0:
+                val = AR_RAD5133_SREV_MAJOR;
+                break;
+        case AR_RAD5133_SREV_MAJOR:
+        case AR_RAD5122_SREV_MAJOR:
+        case AR_RAD2133_SREV_MAJOR:
+        case AR_RAD2122_SREV_MAJOR:
+                break;
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                         "%s: 5G Radio Chip Rev 0x%02X is not "
+                        "supported by this driver\n",
+                         __func__, ah->ah_analog5GhzRev);
+                return -EOPNOTSUPP;
+        }
+
+        ah->ah_analog5GhzRev = val;
+
+        return 0;
+}
+
+static inline void ath9k_hw_init_pll(struct ath_hal *ah,
+                                     struct ath9k_channel *chan)
+{
+        u32 pll;
+
+        if (AR_SREV_9100(ah)) {
+                if (chan && IS_CHAN_5GHZ(chan))
+                        pll = 0x1450;
+                else
+                        pll = 0x1458;
+        } else {
+                if (AR_SREV_9280_10_OR_LATER(ah)) {
+                        pll = SM(0x5, AR_RTC_9160_PLL_REFDIV);
+
+                        if (chan && IS_CHAN_HALF_RATE(chan))
+                                pll |= SM(0x1, AR_RTC_9160_PLL_CLKSEL);
+                        else if (chan && IS_CHAN_QUARTER_RATE(chan))
+                                pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL);
+
+                        if (chan && IS_CHAN_5GHZ(chan)) {
+                                pll |= SM(0x28, AR_RTC_9160_PLL_DIV);
+
+
+                                if (AR_SREV_9280_20(ah)) {
+                                        if (((chan->channel % 20) == 0)
+                                            || ((chan->channel % 10) == 0))
+                                                pll = 0x2850;
+                                        else
+                                                pll = 0x142c;
+                                }
+                        } else {
+                                pll |= SM(0x2c, AR_RTC_9160_PLL_DIV);
+                        }
+
+                } else if (AR_SREV_9160_10_OR_LATER(ah)) {
+
+                        pll = SM(0x5, AR_RTC_9160_PLL_REFDIV);
+
+                        if (chan && IS_CHAN_HALF_RATE(chan))
+                                pll |= SM(0x1, AR_RTC_9160_PLL_CLKSEL);
+                        else if (chan && IS_CHAN_QUARTER_RATE(chan))
+                                pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL);
+
+                        if (chan && IS_CHAN_5GHZ(chan))
+                                pll |= SM(0x50, AR_RTC_9160_PLL_DIV);
+                        else
+                                pll |= SM(0x58, AR_RTC_9160_PLL_DIV);
+                } else {
+                        pll = AR_RTC_PLL_REFDIV_5 | AR_RTC_PLL_DIV2;
+
+                        if (chan && IS_CHAN_HALF_RATE(chan))
+                                pll |= SM(0x1, AR_RTC_PLL_CLKSEL);
+                        else if (chan && IS_CHAN_QUARTER_RATE(chan))
+                                pll |= SM(0x2, AR_RTC_PLL_CLKSEL);
+
+                        if (chan && IS_CHAN_5GHZ(chan))
+                                pll |= SM(0xa, AR_RTC_PLL_DIV);
+                        else
+                                pll |= SM(0xb, AR_RTC_PLL_DIV);
+                }
+        }
+        REG_WRITE(ah, (u16) (AR_RTC_PLL_CONTROL), pll);
+
+        udelay(RTC_PLL_SETTLE_DELAY);
+
+        REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK);
+}
+
+static void ath9k_hw_set_regs(struct ath_hal *ah, struct ath9k_channel *chan,
+                              enum ath9k_ht_macmode macmode)
+{
+        u32 phymode;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        phymode = AR_PHY_FC_HT_EN | AR_PHY_FC_SHORT_GI_40
+                | AR_PHY_FC_SINGLE_HT_LTF1 | AR_PHY_FC_WALSH;
+
+        if (IS_CHAN_HT40(chan)) {
+                phymode |= AR_PHY_FC_DYN2040_EN;
+
+                if ((chan->chanmode == CHANNEL_A_HT40PLUS) ||
+                    (chan->chanmode == CHANNEL_G_HT40PLUS))
+                        phymode |= AR_PHY_FC_DYN2040_PRI_CH;
+
+                if (ahp->ah_extprotspacing == ATH9K_HT_EXTPROTSPACING_25)
+                        phymode |= AR_PHY_FC_DYN2040_EXT_CH;
+        }
+        REG_WRITE(ah, AR_PHY_TURBO, phymode);
+
+        ath9k_hw_set11nmac2040(ah, macmode);
+
+        REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S);
+        REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);
+}
+
+static void ath9k_hw_set_operating_mode(struct ath_hal *ah, int opmode)
+{
+        u32 val;
+
+        val = REG_READ(ah, AR_STA_ID1);
+        val &= ~(AR_STA_ID1_STA_AP | AR_STA_ID1_ADHOC);
+        switch (opmode) {
+        case ATH9K_M_HOSTAP:
+                REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_STA_AP
+                          | AR_STA_ID1_KSRCH_MODE);
+                REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
+                break;
+        case ATH9K_M_IBSS:
+                REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_ADHOC
+                          | AR_STA_ID1_KSRCH_MODE);
+                REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
+                break;
+        case ATH9K_M_STA:
+        case ATH9K_M_MONITOR:
+                REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_KSRCH_MODE);
+                break;
+        }
+}
+
+static inline void
+ath9k_hw_set_rfmode(struct ath_hal *ah, struct ath9k_channel *chan)
+{
+        u32 rfMode = 0;
+
+        if (chan == NULL)
+                return;
+
+        rfMode |= (IS_CHAN_B(chan) || IS_CHAN_G(chan))
+                ? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM;
+
+        if (!AR_SREV_9280_10_OR_LATER(ah))
+                rfMode |= (IS_CHAN_5GHZ(chan)) ? AR_PHY_MODE_RF5GHZ :
+                        AR_PHY_MODE_RF2GHZ;
+
+        if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan))
+                rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE);
+
+        REG_WRITE(ah, AR_PHY_MODE, rfMode);
+}
+
+static bool ath9k_hw_set_reset(struct ath_hal *ah, int type)
+{
+        u32 rst_flags;
+        u32 tmpReg;
+
+        REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
+                  AR_RTC_FORCE_WAKE_ON_INT);
+
+        if (AR_SREV_9100(ah)) {
+                rst_flags = AR_RTC_RC_MAC_WARM | AR_RTC_RC_MAC_COLD |
+                        AR_RTC_RC_COLD_RESET | AR_RTC_RC_WARM_RESET;
+        } else {
+                tmpReg = REG_READ(ah, AR_INTR_SYNC_CAUSE);
+                if (tmpReg &
+                    (AR_INTR_SYNC_LOCAL_TIMEOUT |
+                     AR_INTR_SYNC_RADM_CPL_TIMEOUT)) {
+                        REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);
+                        REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
+                } else {
+                        REG_WRITE(ah, AR_RC, AR_RC_AHB);
+                }
+
+                rst_flags = AR_RTC_RC_MAC_WARM;
+                if (type == ATH9K_RESET_COLD)
+                        rst_flags |= AR_RTC_RC_MAC_COLD;
+        }
+
+        REG_WRITE(ah, (u16) (AR_RTC_RC), rst_flags);
+        udelay(50);
+
+        REG_WRITE(ah, (u16) (AR_RTC_RC), 0);
+        if (!ath9k_hw_wait(ah, (u16) (AR_RTC_RC), AR_RTC_RC_M, 0)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                        "%s: RTC stuck in MAC reset\n",
+                        __func__);
+                return false;
+        }
+
+        if (!AR_SREV_9100(ah))
+                REG_WRITE(ah, AR_RC, 0);
+
+        ath9k_hw_init_pll(ah, NULL);
+
+        if (AR_SREV_9100(ah))
+                udelay(50);
+
+        return true;
+}
+
+static inline bool ath9k_hw_set_reset_power_on(struct ath_hal *ah)
+{
+        REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
+                  AR_RTC_FORCE_WAKE_ON_INT);
+
+        REG_WRITE(ah, (u16) (AR_RTC_RESET), 0);
+        REG_WRITE(ah, (u16) (AR_RTC_RESET), 1);
+
+        if (!ath9k_hw_wait(ah,
+                           AR_RTC_STATUS,
+                           AR_RTC_STATUS_M,
+                           AR_RTC_STATUS_ON)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: RTC not waking up\n",
+                         __func__);
+                return false;
+        }
+
+        ath9k_hw_read_revisions(ah);
+
+        return ath9k_hw_set_reset(ah, ATH9K_RESET_WARM);
+}
+
+static bool ath9k_hw_set_reset_reg(struct ath_hal *ah,
+                                   u32 type)
+{
+        REG_WRITE(ah, AR_RTC_FORCE_WAKE,
+                  AR_RTC_FORCE_WAKE_EN | AR_RTC_FORCE_WAKE_ON_INT);
+
+        switch (type) {
+        case ATH9K_RESET_POWER_ON:
+                return ath9k_hw_set_reset_power_on(ah);
+                break;
+        case ATH9K_RESET_WARM:
+        case ATH9K_RESET_COLD:
+                return ath9k_hw_set_reset(ah, type);
+                break;
+        default:
+                return false;
+        }
+}
+
+static inline
+struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
+                                          struct ath9k_channel *chan)
+{
+        if (!(IS_CHAN_2GHZ(chan) ^ IS_CHAN_5GHZ(chan))) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                         "%s: invalid channel %u/0x%x; not marked as "
+                         "2GHz or 5GHz\n", __func__, chan->channel,
+                         chan->channelFlags);
+                return NULL;
+        }
+
+        if (!IS_CHAN_OFDM(chan) &&
+              !IS_CHAN_CCK(chan) &&
+              !IS_CHAN_HT20(chan) &&
+              !IS_CHAN_HT40(chan)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                        "%s: invalid channel %u/0x%x; not marked as "
+                        "OFDM or CCK or HT20 or HT40PLUS or HT40MINUS\n",
+                        __func__, chan->channel, chan->channelFlags);
+                return NULL;
+        }
+
+        return ath9k_regd_check_channel(ah, chan);
+}
+
+static inline bool
+ath9k_hw_get_lower_upper_index(u8 target,
+                               u8 *pList,
+                               u16 listSize,
+                               u16 *indexL,
+                               u16 *indexR)
+{
+        u16 i;
+
+        if (target <= pList[0]) {
+                *indexL = *indexR = 0;
+                return true;
+        }
+        if (target >= pList[listSize - 1]) {
+                *indexL = *indexR = (u16) (listSize - 1);
+                return true;
+        }
+
+        for (i = 0; i < listSize - 1; i++) {
+                if (pList[i] == target) {
+                        *indexL = *indexR = i;
+                        return true;
+                }
+                if (target < pList[i + 1]) {
+                        *indexL = i;
+                        *indexR = (u16) (i + 1);
+                        return false;
+                }
+        }
+        return false;
+}
+
+static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer)
+{
+        int16_t nfval;
+        int16_t sort[ATH9K_NF_CAL_HIST_MAX];
+        int i, j;
+
+        for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++)
+                sort[i] = nfCalBuffer[i];
+
+        for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) {
+                for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) {
+                        if (sort[j] > sort[j - 1]) {
+                                nfval = sort[j];
+                                sort[j] = sort[j - 1];
+                                sort[j - 1] = nfval;
+                        }
+                }
+        }
+        nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1];
+
+        return nfval;
+}
+
+static void ath9k_hw_update_nfcal_hist_buffer(struct ath9k_nfcal_hist *h,
+                                              int16_t *nfarray)
+{
+        int i;
+
+        for (i = 0; i < NUM_NF_READINGS; i++) {
+                h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
+
+                if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
+                        h[i].currIndex = 0;
+
+                if (h[i].invalidNFcount > 0) {
+                        if (nfarray[i] < AR_PHY_CCA_MIN_BAD_VALUE
+                            || nfarray[i] > AR_PHY_CCA_MAX_HIGH_VALUE) {
+                                h[i].invalidNFcount = ATH9K_NF_CAL_HIST_MAX;
+                        } else {
+                                h[i].invalidNFcount--;
+                                h[i].privNF = nfarray[i];
+                        }
+                } else {
+                        h[i].privNF =
+                                ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer);
+                }
+        }
+        return;
+}
+
+static void ar5416GetNoiseFloor(struct ath_hal *ah,
+                                int16_t nfarray[NUM_NF_READINGS])
+{
+        int16_t nf;
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                nf = MS(REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);
+        else
+                nf = MS(REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);
+
+        if (nf & 0x100)
+                nf = 0 - ((nf ^ 0x1ff) + 1);
+        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                 "NF calibrated [ctl] [chain 0] is %d\n", nf);
+        nfarray[0] = nf;
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
+                        AR9280_PHY_CH1_MINCCA_PWR);
+        else
+                nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
+                        AR_PHY_CH1_MINCCA_PWR);
+
+        if (nf & 0x100)
+                nf = 0 - ((nf ^ 0x1ff) + 1);
+        DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
+                 "NF calibrated [ctl] [chain 1] is %d\n", nf);
+        nfarray[1] = nf;
+
+        if (!AR_SREV_9280(ah)) {
+                nf = MS(REG_READ(ah, AR_PHY_CH2_CCA),
+                        AR_PHY_CH2_MINCCA_PWR);
+                if (nf & 0x100)
+                        nf = 0 - ((nf ^ 0x1ff) + 1);
+                DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
+                         "NF calibrated [ctl] [chain 2] is %d\n", nf);
+                nfarray[2] = nf;
+        }
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                nf = MS(REG_READ(ah, AR_PHY_EXT_CCA),
+                        AR9280_PHY_EXT_MINCCA_PWR);
+        else
+                nf = MS(REG_READ(ah, AR_PHY_EXT_CCA),
+                        AR_PHY_EXT_MINCCA_PWR);
+
+        if (nf & 0x100)
+                nf = 0 - ((nf ^ 0x1ff) + 1);
+        DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
+                 "NF calibrated [ext] [chain 0] is %d\n", nf);
+        nfarray[3] = nf;
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
+                        AR9280_PHY_CH1_EXT_MINCCA_PWR);
+        else
+                nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
+                        AR_PHY_CH1_EXT_MINCCA_PWR);
+
+        if (nf & 0x100)
+                nf = 0 - ((nf ^ 0x1ff) + 1);
+        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                 "NF calibrated [ext] [chain 1] is %d\n", nf);
+        nfarray[4] = nf;
+
+        if (!AR_SREV_9280(ah)) {
+                nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA),
+                        AR_PHY_CH2_EXT_MINCCA_PWR);
+                if (nf & 0x100)
+                        nf = 0 - ((nf ^ 0x1ff) + 1);
+                DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
+                         "NF calibrated [ext] [chain 2] is %d\n", nf);
+                nfarray[5] = nf;
+        }
+}
+
+static bool
+getNoiseFloorThresh(struct ath_hal *ah,
+                    const struct ath9k_channel *chan,
+                    int16_t *nft)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        switch (chan->chanmode) {
+        case CHANNEL_A:
+        case CHANNEL_A_HT20:
+        case CHANNEL_A_HT40PLUS:
+        case CHANNEL_A_HT40MINUS:
+                *nft = (int16_t) ath9k_hw_get_eeprom(ahp, EEP_NFTHRESH_5);
+                break;
+        case CHANNEL_B:
+        case CHANNEL_G:
+        case CHANNEL_G_HT20:
+        case CHANNEL_G_HT40PLUS:
+        case CHANNEL_G_HT40MINUS:
+                *nft = (int16_t) ath9k_hw_get_eeprom(ahp, EEP_NFTHRESH_2);
+                break;
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                         "%s: invalid channel flags 0x%x\n", __func__,
+                         chan->channelFlags);
+                return false;
+        }
+        return true;
+}
+
+static void ath9k_hw_start_nfcal(struct ath_hal *ah)
+{
+        REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
+                    AR_PHY_AGC_CONTROL_ENABLE_NF);
+        REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
+                    AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
+        REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
+}
+
+static void
+ath9k_hw_loadnf(struct ath_hal *ah, struct ath9k_channel *chan)
+{
+        struct ath9k_nfcal_hist *h;
+        int i, j;
+        int32_t val;
+        const u32 ar5416_cca_regs[6] = {
+                AR_PHY_CCA,
+                AR_PHY_CH1_CCA,
+                AR_PHY_CH2_CCA,
+                AR_PHY_EXT_CCA,
+                AR_PHY_CH1_EXT_CCA,
+                AR_PHY_CH2_EXT_CCA
+        };
+        u8 chainmask;
+
+        if (AR_SREV_9280(ah))
+                chainmask = 0x1B;
+        else
+                chainmask = 0x3F;
+
+#ifdef ATH_NF_PER_CHAN
+        h = chan->nfCalHist;
+#else
+        h = ah->nfCalHist;
+#endif
+
+        for (i = 0; i < NUM_NF_READINGS; i++) {
+                if (chainmask & (1 << i)) {
+                        val = REG_READ(ah, ar5416_cca_regs[i]);
+                        val &= 0xFFFFFE00;
+                        val |= (((u32) (h[i].privNF) << 1) & 0x1ff);
+                        REG_WRITE(ah, ar5416_cca_regs[i], val);
+                }
+        }
+
+        REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
+                    AR_PHY_AGC_CONTROL_ENABLE_NF);
+        REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
+                    AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
+        REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
+
+        for (j = 0; j < 1000; j++) {
+                if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
+                     AR_PHY_AGC_CONTROL_NF) == 0)
+                        break;
+                udelay(10);
+        }
+
+        for (i = 0; i < NUM_NF_READINGS; i++) {
+                if (chainmask & (1 << i)) {
+                        val = REG_READ(ah, ar5416_cca_regs[i]);
+                        val &= 0xFFFFFE00;
+                        val |= (((u32) (-50) << 1) & 0x1ff);
+                        REG_WRITE(ah, ar5416_cca_regs[i], val);
+                }
+        }
+}
+
+static int16_t ath9k_hw_getnf(struct ath_hal *ah,
+                              struct ath9k_channel *chan)
+{
+        int16_t nf, nfThresh;
+        int16_t nfarray[NUM_NF_READINGS] = { 0 };
+        struct ath9k_nfcal_hist *h;
+        u8 chainmask;
+
+        if (AR_SREV_9280(ah))
+                chainmask = 0x1B;
+        else
+                chainmask = 0x3F;
+
+        chan->channelFlags &= (~CHANNEL_CW_INT);
+        if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%s: NF did not complete in calibration window\n",
+                         __func__);
+                nf = 0;
+                chan->rawNoiseFloor = nf;
+                return chan->rawNoiseFloor;
+        } else {
+                ar5416GetNoiseFloor(ah, nfarray);
+                nf = nfarray[0];
+                if (getNoiseFloorThresh(ah, chan, &nfThresh)
+                    && nf > nfThresh) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "%s: noise floor failed detected; "
+                                 "detected %d, threshold %d\n", __func__,
+                                 nf, nfThresh);
+                        chan->channelFlags |= CHANNEL_CW_INT;
+                }
+        }
+
+#ifdef ATH_NF_PER_CHAN
+        h = chan->nfCalHist;
+#else
+        h = ah->nfCalHist;
+#endif
+
+        ath9k_hw_update_nfcal_hist_buffer(h, nfarray);
+        chan->rawNoiseFloor = h[0].privNF;
+
+        return chan->rawNoiseFloor;
+}
+
+static void ath9k_hw_update_mibstats(struct ath_hal *ah,
+                              struct ath9k_mib_stats *stats)
+{
+        stats->ackrcv_bad += REG_READ(ah, AR_ACK_FAIL);
+        stats->rts_bad += REG_READ(ah, AR_RTS_FAIL);
+        stats->fcs_bad += REG_READ(ah, AR_FCS_FAIL);
+        stats->rts_good += REG_READ(ah, AR_RTS_OK);
+        stats->beacons += REG_READ(ah, AR_BEACON_CNT);
+}
+
+static void ath9k_enable_mib_counters(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Enable mib counters\n");
+
+        ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);
+
+        REG_WRITE(ah, AR_FILT_OFDM, 0);
+        REG_WRITE(ah, AR_FILT_CCK, 0);
+        REG_WRITE(ah, AR_MIBC,
+                  ~(AR_MIBC_COW | AR_MIBC_FMC | AR_MIBC_CMC | AR_MIBC_MCS)
+                  & 0x0f);
+        REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
+        REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
+}
+
+static void ath9k_hw_disable_mib_counters(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Disabling MIB counters\n");
+
+        REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC | AR_MIBC_CMC);
+
+        ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);
+
+        REG_WRITE(ah, AR_FILT_OFDM, 0);
+        REG_WRITE(ah, AR_FILT_CCK, 0);
+}
+
+static int ath9k_hw_get_ani_channel_idx(struct ath_hal *ah,
+                                        struct ath9k_channel *chan)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(ahp->ah_ani); i++) {
+                if (ahp->ah_ani[i].c.channel == chan->channel)
+                        return i;
+                if (ahp->ah_ani[i].c.channel == 0) {
+                        ahp->ah_ani[i].c.channel = chan->channel;
+                        ahp->ah_ani[i].c.channelFlags = chan->channelFlags;
+                        return i;
+                }
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                 "No more channel states left. Using channel 0\n");
+        return 0;
+}
+
+static void ath9k_hw_ani_attach(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int i;
+
+        ahp->ah_hasHwPhyCounters = 1;
+
+        memset(ahp->ah_ani, 0, sizeof(ahp->ah_ani));
+        for (i = 0; i < ARRAY_SIZE(ahp->ah_ani); i++) {
+                ahp->ah_ani[i].ofdmTrigHigh = ATH9K_ANI_OFDM_TRIG_HIGH;
+                ahp->ah_ani[i].ofdmTrigLow = ATH9K_ANI_OFDM_TRIG_LOW;
+                ahp->ah_ani[i].cckTrigHigh = ATH9K_ANI_CCK_TRIG_HIGH;
+                ahp->ah_ani[i].cckTrigLow = ATH9K_ANI_CCK_TRIG_LOW;
+                ahp->ah_ani[i].rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH;
+                ahp->ah_ani[i].rssiThrLow = ATH9K_ANI_RSSI_THR_LOW;
+                ahp->ah_ani[i].ofdmWeakSigDetectOff =
+                        !ATH9K_ANI_USE_OFDM_WEAK_SIG;
+                ahp->ah_ani[i].cckWeakSigThreshold =
+                        ATH9K_ANI_CCK_WEAK_SIG_THR;
+                ahp->ah_ani[i].spurImmunityLevel = ATH9K_ANI_SPUR_IMMUNE_LVL;
+                ahp->ah_ani[i].firstepLevel = ATH9K_ANI_FIRSTEP_LVL;
+                if (ahp->ah_hasHwPhyCounters) {
+                        ahp->ah_ani[i].ofdmPhyErrBase =
+                                AR_PHY_COUNTMAX - ATH9K_ANI_OFDM_TRIG_HIGH;
+                        ahp->ah_ani[i].cckPhyErrBase =
+                                AR_PHY_COUNTMAX - ATH9K_ANI_CCK_TRIG_HIGH;
+                }
+        }
+        if (ahp->ah_hasHwPhyCounters) {
+                DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                        "Setting OfdmErrBase = 0x%08x\n",
+                        ahp->ah_ani[0].ofdmPhyErrBase);
+                DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Setting cckErrBase = 0x%08x\n",
+                        ahp->ah_ani[0].cckPhyErrBase);
+
+                REG_WRITE(ah, AR_PHY_ERR_1, ahp->ah_ani[0].ofdmPhyErrBase);
+                REG_WRITE(ah, AR_PHY_ERR_2, ahp->ah_ani[0].cckPhyErrBase);
+                ath9k_enable_mib_counters(ah);
+        }
+        ahp->ah_aniPeriod = ATH9K_ANI_PERIOD;
+        if (ah->ah_config.enable_ani)
+                ahp->ah_procPhyErr |= HAL_PROCESS_ANI;
+}
+
+static inline void ath9k_hw_ani_setup(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int i;
+
+        const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
+        const int coarseHigh[] = { -14, -14, -14, -14, -12 };
+        const int coarseLow[] = { -64, -64, -64, -64, -70 };
+        const int firpwr[] = { -78, -78, -78, -78, -80 };
+
+        for (i = 0; i < 5; i++) {
+                ahp->ah_totalSizeDesired[i] = totalSizeDesired[i];
+                ahp->ah_coarseHigh[i] = coarseHigh[i];
+                ahp->ah_coarseLow[i] = coarseLow[i];
+                ahp->ah_firpwr[i] = firpwr[i];
+        }
+}
+
+static void ath9k_hw_ani_detach(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Detaching Ani\n");
+        if (ahp->ah_hasHwPhyCounters) {
+                ath9k_hw_disable_mib_counters(ah);
+                REG_WRITE(ah, AR_PHY_ERR_1, 0);
+                REG_WRITE(ah, AR_PHY_ERR_2, 0);
+        }
+}
+
+
+static bool ath9k_hw_ani_control(struct ath_hal *ah,
+                                 enum ath9k_ani_cmd cmd, int param)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416AniState *aniState = ahp->ah_curani;
+
+        switch (cmd & ahp->ah_ani_function) {
+        case ATH9K_ANI_NOISE_IMMUNITY_LEVEL:{
+                u32 level = param;
+
+                if (level >= ARRAY_SIZE(ahp->ah_totalSizeDesired)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                                 "%s: level out of range (%u > %u)\n",
+                                 __func__, level,
+                                 (unsigned) ARRAY_SIZE(ahp->
+                                                       ah_totalSizeDesired));
+                        return false;
+                }
+
+                REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
+                              AR_PHY_DESIRED_SZ_TOT_DES,
+                              ahp->ah_totalSizeDesired[level]);
+                REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
+                              AR_PHY_AGC_CTL1_COARSE_LOW,
+                              ahp->ah_coarseLow[level]);
+                REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
+                              AR_PHY_AGC_CTL1_COARSE_HIGH,
+                              ahp->ah_coarseHigh[level]);
+                REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
+                              AR_PHY_FIND_SIG_FIRPWR,
+                              ahp->ah_firpwr[level]);
+
+                if (level > aniState->noiseImmunityLevel)
+                        ahp->ah_stats.ast_ani_niup++;
+                else if (level < aniState->noiseImmunityLevel)
+                        ahp->ah_stats.ast_ani_nidown++;
+                aniState->noiseImmunityLevel = level;
+                break;
+        }
+        case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{
+                const int m1ThreshLow[] = { 127, 50 };
+                const int m2ThreshLow[] = { 127, 40 };
+                const int m1Thresh[] = { 127, 0x4d };
+                const int m2Thresh[] = { 127, 0x40 };
+                const int m2CountThr[] = { 31, 16 };
+                const int m2CountThrLow[] = { 63, 48 };
+                u32 on = param ? 1 : 0;
+
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+                              AR_PHY_SFCORR_LOW_M1_THRESH_LOW,
+                              m1ThreshLow[on]);
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+                              AR_PHY_SFCORR_LOW_M2_THRESH_LOW,
+                              m2ThreshLow[on]);
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+                              AR_PHY_SFCORR_M1_THRESH,
+                              m1Thresh[on]);
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+                              AR_PHY_SFCORR_M2_THRESH,
+                              m2Thresh[on]);
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR,
+                              AR_PHY_SFCORR_M2COUNT_THR,
+                              m2CountThr[on]);
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
+                              AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,
+                              m2CountThrLow[on]);
+
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+                              AR_PHY_SFCORR_EXT_M1_THRESH_LOW,
+                              m1ThreshLow[on]);
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+                              AR_PHY_SFCORR_EXT_M2_THRESH_LOW,
+                              m2ThreshLow[on]);
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+                              AR_PHY_SFCORR_EXT_M1_THRESH,
+                              m1Thresh[on]);
+                REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
+                              AR_PHY_SFCORR_EXT_M2_THRESH,
+                              m2Thresh[on]);
+
+                if (on)
+                        REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
+                                    AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
+                else
+                        REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
+                                    AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
+
+                if (!on != aniState->ofdmWeakSigDetectOff) {
+                        if (on)
+                                ahp->ah_stats.ast_ani_ofdmon++;
+                        else
+                                ahp->ah_stats.ast_ani_ofdmoff++;
+                        aniState->ofdmWeakSigDetectOff = !on;
+                }
+                break;
+        }
+        case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{
+                const int weakSigThrCck[] = { 8, 6 };
+                u32 high = param ? 1 : 0;
+
+                REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
+                              AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK,
+                              weakSigThrCck[high]);
+                if (high != aniState->cckWeakSigThreshold) {
+                        if (high)
+                                ahp->ah_stats.ast_ani_cckhigh++;
+                        else
+                                ahp->ah_stats.ast_ani_ccklow++;
+                        aniState->cckWeakSigThreshold = high;
+                }
+                break;
+        }
+        case ATH9K_ANI_FIRSTEP_LEVEL:{
+                const int firstep[] = { 0, 4, 8 };
+                u32 level = param;
+
+                if (level >= ARRAY_SIZE(firstep)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                                 "%s: level out of range (%u > %u)\n",
+                                 __func__, level,
+                                (unsigned) ARRAY_SIZE(firstep));
+                        return false;
+                }
+                REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
+                              AR_PHY_FIND_SIG_FIRSTEP,
+                              firstep[level]);
+                if (level > aniState->firstepLevel)
+                        ahp->ah_stats.ast_ani_stepup++;
+                else if (level < aniState->firstepLevel)
+                        ahp->ah_stats.ast_ani_stepdown++;
+                aniState->firstepLevel = level;
+                break;
+        }
+        case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{
+                const int cycpwrThr1[] =
+                        { 2, 4, 6, 8, 10, 12, 14, 16 };
+                u32 level = param;
+
+                if (level >= ARRAY_SIZE(cycpwrThr1)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                                 "%s: level out of range (%u > %u)\n",
+                                 __func__, level,
+                                 (unsigned)
+                                ARRAY_SIZE(cycpwrThr1));
+                        return false;
+                }
+                REG_RMW_FIELD(ah, AR_PHY_TIMING5,
+                              AR_PHY_TIMING5_CYCPWR_THR1,
+                              cycpwrThr1[level]);
+                if (level > aniState->spurImmunityLevel)
+                        ahp->ah_stats.ast_ani_spurup++;
+                else if (level < aniState->spurImmunityLevel)
+                        ahp->ah_stats.ast_ani_spurdown++;
+                aniState->spurImmunityLevel = level;
+                break;
+        }
+        case ATH9K_ANI_PRESENT:
+                break;
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                        "%s: invalid cmd %u\n", __func__, cmd);
+                return false;
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI, "%s: ANI parameters:\n", __func__);
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                "noiseImmunityLevel=%d, spurImmunityLevel=%d, "
+                "ofdmWeakSigDetectOff=%d\n",
+                 aniState->noiseImmunityLevel, aniState->spurImmunityLevel,
+                 !aniState->ofdmWeakSigDetectOff);
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                "cckWeakSigThreshold=%d, "
+                "firstepLevel=%d, listenTime=%d\n",
+                 aniState->cckWeakSigThreshold, aniState->firstepLevel,
+                 aniState->listenTime);
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                 "cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
+                 aniState->cycleCount, aniState->ofdmPhyErrCount,
+                 aniState->cckPhyErrCount);
+        return true;
+}
+
+static void ath9k_ani_restart(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416AniState *aniState;
+
+        if (!DO_ANI(ah))
+                return;
+
+        aniState = ahp->ah_curani;
+
+        aniState->listenTime = 0;
+        if (ahp->ah_hasHwPhyCounters) {
+                if (aniState->ofdmTrigHigh > AR_PHY_COUNTMAX) {
+                        aniState->ofdmPhyErrBase = 0;
+                        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                                 "OFDM Trigger is too high for hw counters\n");
+                } else {
+                        aniState->ofdmPhyErrBase =
+                                AR_PHY_COUNTMAX - aniState->ofdmTrigHigh;
+                }
+                if (aniState->cckTrigHigh > AR_PHY_COUNTMAX) {
+                        aniState->cckPhyErrBase = 0;
+                        DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                                 "CCK Trigger is too high for hw counters\n");
+                } else {
+                        aniState->cckPhyErrBase =
+                                AR_PHY_COUNTMAX - aniState->cckTrigHigh;
+                }
+                DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                         "%s: Writing ofdmbase=%u   cckbase=%u\n",
+                         __func__, aniState->ofdmPhyErrBase,
+                         aniState->cckPhyErrBase);
+                REG_WRITE(ah, AR_PHY_ERR_1, aniState->ofdmPhyErrBase);
+                REG_WRITE(ah, AR_PHY_ERR_2, aniState->cckPhyErrBase);
+                REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
+                REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
+
+                ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);
+        }
+        aniState->ofdmPhyErrCount = 0;
+        aniState->cckPhyErrCount = 0;
+}
+
+static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_channel *chan = ah->ah_curchan;
+        struct ar5416AniState *aniState;
+        enum wireless_mode mode;
+        int32_t rssi;
+
+        if (!DO_ANI(ah))
+                return;
+
+        aniState = ahp->ah_curani;
+
+        if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) {
+                if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,
+                                         aniState->noiseImmunityLevel + 1)) {
+                        return;
+                }
+        }
+
+        if (aniState->spurImmunityLevel < HAL_SPUR_IMMUNE_MAX) {
+                if (ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL,
+                                         aniState->spurImmunityLevel + 1)) {
+                        return;
+                }
+        }
+
+        if (ah->ah_opmode == ATH9K_M_HOSTAP) {
+                if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) {
+                        ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                             aniState->firstepLevel + 1);
+                }
+                return;
+        }
+        rssi = BEACON_RSSI(ahp);
+        if (rssi > aniState->rssiThrHigh) {
+                if (!aniState->ofdmWeakSigDetectOff) {
+                        if (ath9k_hw_ani_control(ah,
+                                         ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
+                                         false)) {
+                                ath9k_hw_ani_control(ah,
+                                        ATH9K_ANI_SPUR_IMMUNITY_LEVEL,
+                                        0);
+                                return;
+                        }
+                }
+                if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) {
+                        ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                             aniState->firstepLevel + 1);
+                        return;
+                }
+        } else if (rssi > aniState->rssiThrLow) {
+                if (aniState->ofdmWeakSigDetectOff)
+                        ath9k_hw_ani_control(ah,
+                                     ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
+                                     true);
+                if (aniState->firstepLevel < HAL_FIRST_STEP_MAX)
+                        ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                             aniState->firstepLevel + 1);
+                return;
+        } else {
+                mode = ath9k_hw_chan2wmode(ah, chan);
+                if (mode == ATH9K_MODE_11G || mode == ATH9K_MODE_11B) {
+                        if (!aniState->ofdmWeakSigDetectOff)
+                                ath9k_hw_ani_control(ah,
+                                     ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
+                                     false);
+                        if (aniState->firstepLevel > 0)
+                                ath9k_hw_ani_control(ah,
+                                                     ATH9K_ANI_FIRSTEP_LEVEL,
+                                                     0);
+                        return;
+                }
+        }
+}
+
+static void ath9k_hw_ani_cck_err_trigger(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_channel *chan = ah->ah_curchan;
+        struct ar5416AniState *aniState;
+        enum wireless_mode mode;
+        int32_t rssi;
+
+        if (!DO_ANI(ah))
+                return;
+
+        aniState = ahp->ah_curani;
+        if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) {
+                if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,
+                                         aniState->noiseImmunityLevel + 1)) {
+                        return;
+                }
+        }
+        if (ah->ah_opmode == ATH9K_M_HOSTAP) {
+                if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) {
+                        ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                             aniState->firstepLevel + 1);
+                }
+                return;
+        }
+        rssi = BEACON_RSSI(ahp);
+        if (rssi > aniState->rssiThrLow) {
+                if (aniState->firstepLevel < HAL_FIRST_STEP_MAX)
+                        ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                             aniState->firstepLevel + 1);
+        } else {
+                mode = ath9k_hw_chan2wmode(ah, chan);
+                if (mode == ATH9K_MODE_11G || mode == ATH9K_MODE_11B) {
+                        if (aniState->firstepLevel > 0)
+                                ath9k_hw_ani_control(ah,
+                                                     ATH9K_ANI_FIRSTEP_LEVEL,
+                                                     0);
+                }
+        }
+}
+
+static void ath9k_ani_reset(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416AniState *aniState;
+        struct ath9k_channel *chan = ah->ah_curchan;
+        int index;
+
+        if (!DO_ANI(ah))
+                return;
+
+        index = ath9k_hw_get_ani_channel_idx(ah, chan);
+        aniState = &ahp->ah_ani[index];
+        ahp->ah_curani = aniState;
+
+        if (DO_ANI(ah) && ah->ah_opmode != ATH9K_M_STA
+            && ah->ah_opmode != ATH9K_M_IBSS) {
+                DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                         "%s: Reset ANI state opmode %u\n", __func__,
+                         ah->ah_opmode);
+                ahp->ah_stats.ast_ani_reset++;
+                ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 0);
+                ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL, 0);
+                ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, 0);
+                ath9k_hw_ani_control(ah,
+                                     ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
+                                     !ATH9K_ANI_USE_OFDM_WEAK_SIG);
+                ath9k_hw_ani_control(ah, ATH9K_ANI_CCK_WEAK_SIGNAL_THR,
+                                     ATH9K_ANI_CCK_WEAK_SIG_THR);
+                ath9k_hw_setrxfilter(ah,
+                                     ath9k_hw_getrxfilter(ah) |
+                                     ATH9K_RX_FILTER_PHYERR);
+                if (ah->ah_opmode == ATH9K_M_HOSTAP) {
+                        ahp->ah_curani->ofdmTrigHigh =
+                                ah->ah_config.ofdm_trig_high;
+                        ahp->ah_curani->ofdmTrigLow =
+                                ah->ah_config.ofdm_trig_low;
+                        ahp->ah_curani->cckTrigHigh =
+                                ah->ah_config.cck_trig_high;
+                        ahp->ah_curani->cckTrigLow =
+                                ah->ah_config.cck_trig_low;
+                }
+                ath9k_ani_restart(ah);
+                return;
+        }
+
+        if (aniState->noiseImmunityLevel != 0)
+                ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,
+                                     aniState->noiseImmunityLevel);
+        if (aniState->spurImmunityLevel != 0)
+                ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL,
+                                     aniState->spurImmunityLevel);
+        if (aniState->ofdmWeakSigDetectOff)
+                ath9k_hw_ani_control(ah,
+                                     ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
+                                     !aniState->ofdmWeakSigDetectOff);
+        if (aniState->cckWeakSigThreshold)
+                ath9k_hw_ani_control(ah, ATH9K_ANI_CCK_WEAK_SIGNAL_THR,
+                                     aniState->cckWeakSigThreshold);
+        if (aniState->firstepLevel != 0)
+                ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                     aniState->firstepLevel);
+        if (ahp->ah_hasHwPhyCounters) {
+                ath9k_hw_setrxfilter(ah,
+                                     ath9k_hw_getrxfilter(ah) &
+                                     ~ATH9K_RX_FILTER_PHYERR);
+                ath9k_ani_restart(ah);
+                REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
+                REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
+
+        } else {
+                ath9k_ani_restart(ah);
+                ath9k_hw_setrxfilter(ah,
+                                     ath9k_hw_getrxfilter(ah) |
+                                     ATH9K_RX_FILTER_PHYERR);
+        }
+}
+
+void ath9k_hw_procmibevent(struct ath_hal *ah,
+                           const struct ath9k_node_stats *stats)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 phyCnt1, phyCnt2;
+
+        DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Processing Mib Intr\n");
+
+        REG_WRITE(ah, AR_FILT_OFDM, 0);
+        REG_WRITE(ah, AR_FILT_CCK, 0);
+        if (!(REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING))
+                REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR);
+
+        ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);
+        ahp->ah_stats.ast_nodestats = *stats;
+
+        if (!DO_ANI(ah))
+                return;
+
+        phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);
+        phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
+        if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
+            ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {
+                struct ar5416AniState *aniState = ahp->ah_curani;
+                u32 ofdmPhyErrCnt, cckPhyErrCnt;
+
+                ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase;
+                ahp->ah_stats.ast_ani_ofdmerrs +=
+                        ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
+                aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
+
+                cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase;
+                ahp->ah_stats.ast_ani_cckerrs +=
+                        cckPhyErrCnt - aniState->cckPhyErrCount;
+                aniState->cckPhyErrCount = cckPhyErrCnt;
+
+                if (aniState->ofdmPhyErrCount > aniState->ofdmTrigHigh)
+                        ath9k_hw_ani_ofdm_err_trigger(ah);
+                if (aniState->cckPhyErrCount > aniState->cckTrigHigh)
+                        ath9k_hw_ani_cck_err_trigger(ah);
+
+                ath9k_ani_restart(ah);
+        }
+}
+
+static void ath9k_hw_ani_lower_immunity(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416AniState *aniState;
+        int32_t rssi;
+
+        aniState = ahp->ah_curani;
+
+        if (ah->ah_opmode == ATH9K_M_HOSTAP) {
+                if (aniState->firstepLevel > 0) {
+                        if (ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                                 aniState->firstepLevel - 1)) {
+                                return;
+                        }
+                }
+        } else {
+                rssi = BEACON_RSSI(ahp);
+                if (rssi > aniState->rssiThrHigh) {
+                        /* XXX: Handle me */
+                } else if (rssi > aniState->rssiThrLow) {
+                        if (aniState->ofdmWeakSigDetectOff) {
+                                if (ath9k_hw_ani_control(ah,
+                                         ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
+                                         true) ==
+                                    true) {
+                                        return;
+                                }
+                        }
+                        if (aniState->firstepLevel > 0) {
+                                if (ath9k_hw_ani_control
+                                    (ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                     aniState->firstepLevel - 1) ==
+                                    true) {
+                                        return;
+                                }
+                        }
+                } else {
+                        if (aniState->firstepLevel > 0) {
+                                if (ath9k_hw_ani_control
+                                    (ah, ATH9K_ANI_FIRSTEP_LEVEL,
+                                     aniState->firstepLevel - 1) ==
+                                    true) {
+                                        return;
+                                }
+                        }
+                }
+        }
+
+        if (aniState->spurImmunityLevel > 0) {
+                if (ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL,
+                                         aniState->spurImmunityLevel - 1)) {
+                        return;
+                }
+        }
+
+        if (aniState->noiseImmunityLevel > 0) {
+                ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,
+                                     aniState->noiseImmunityLevel - 1);
+                return;
+        }
+}
+
+static int32_t ath9k_hw_ani_get_listen_time(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416AniState *aniState;
+        u32 txFrameCount, rxFrameCount, cycleCount;
+        int32_t listenTime;
+
+        txFrameCount = REG_READ(ah, AR_TFCNT);
+        rxFrameCount = REG_READ(ah, AR_RFCNT);
+        cycleCount = REG_READ(ah, AR_CCCNT);
+
+        aniState = ahp->ah_curani;
+        if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) {
+
+                listenTime = 0;
+                ahp->ah_stats.ast_ani_lzero++;
+        } else {
+                int32_t ccdelta = cycleCount - aniState->cycleCount;
+                int32_t rfdelta = rxFrameCount - aniState->rxFrameCount;
+                int32_t tfdelta = txFrameCount - aniState->txFrameCount;
+                listenTime = (ccdelta - rfdelta - tfdelta) / 44000;
+        }
+        aniState->cycleCount = cycleCount;
+        aniState->txFrameCount = txFrameCount;
+        aniState->rxFrameCount = rxFrameCount;
+
+        return listenTime;
+}
+
+void ath9k_hw_ani_monitor(struct ath_hal *ah,
+                          const struct ath9k_node_stats *stats,
+                          struct ath9k_channel *chan)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416AniState *aniState;
+        int32_t listenTime;
+
+        aniState = ahp->ah_curani;
+        ahp->ah_stats.ast_nodestats = *stats;
+
+        listenTime = ath9k_hw_ani_get_listen_time(ah);
+        if (listenTime < 0) {
+                ahp->ah_stats.ast_ani_lneg++;
+                ath9k_ani_restart(ah);
+                return;
+        }
+
+        aniState->listenTime += listenTime;
+
+        if (ahp->ah_hasHwPhyCounters) {
+                u32 phyCnt1, phyCnt2;
+                u32 ofdmPhyErrCnt, cckPhyErrCnt;
+
+                ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);
+
+                phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);
+                phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
+
+                if (phyCnt1 < aniState->ofdmPhyErrBase ||
+                    phyCnt2 < aniState->cckPhyErrBase) {
+                        if (phyCnt1 < aniState->ofdmPhyErrBase) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                                         "%s: phyCnt1 0x%x, resetting "
+                                         "counter value to 0x%x\n",
+                                         __func__, phyCnt1,
+                                         aniState->ofdmPhyErrBase);
+                                REG_WRITE(ah, AR_PHY_ERR_1,
+                                          aniState->ofdmPhyErrBase);
+                                REG_WRITE(ah, AR_PHY_ERR_MASK_1,
+                                          AR_PHY_ERR_OFDM_TIMING);
+                        }
+                        if (phyCnt2 < aniState->cckPhyErrBase) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_ANI,
+                                         "%s: phyCnt2 0x%x, resetting "
+                                         "counter value to 0x%x\n",
+                                         __func__, phyCnt2,
+                                         aniState->cckPhyErrBase);
+                                REG_WRITE(ah, AR_PHY_ERR_2,
+                                          aniState->cckPhyErrBase);
+                                REG_WRITE(ah, AR_PHY_ERR_MASK_2,
+                                          AR_PHY_ERR_CCK_TIMING);
+                        }
+                        return;
+                }
+
+                ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase;
+                ahp->ah_stats.ast_ani_ofdmerrs +=
+                        ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
+                aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
+
+                cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase;
+                ahp->ah_stats.ast_ani_cckerrs +=
+                        cckPhyErrCnt - aniState->cckPhyErrCount;
+                aniState->cckPhyErrCount = cckPhyErrCnt;
+        }
+
+        if (!DO_ANI(ah))
+                return;
+
+        if (aniState->listenTime > 5 * ahp->ah_aniPeriod) {
+                if (aniState->ofdmPhyErrCount <= aniState->listenTime *
+                    aniState->ofdmTrigLow / 1000 &&
+                    aniState->cckPhyErrCount <= aniState->listenTime *
+                    aniState->cckTrigLow / 1000)
+                        ath9k_hw_ani_lower_immunity(ah);
+                ath9k_ani_restart(ah);
+        } else if (aniState->listenTime > ahp->ah_aniPeriod) {
+                if (aniState->ofdmPhyErrCount > aniState->listenTime *
+                    aniState->ofdmTrigHigh / 1000) {
+                        ath9k_hw_ani_ofdm_err_trigger(ah);
+                        ath9k_ani_restart(ah);
+                } else if (aniState->cckPhyErrCount >
+                           aniState->listenTime * aniState->cckTrigHigh /
+                           1000) {
+                        ath9k_hw_ani_cck_err_trigger(ah);
+                        ath9k_ani_restart(ah);
+                }
+        }
+}
+
+#ifndef ATH_NF_PER_CHAN
+static void ath9k_init_nfcal_hist_buffer(struct ath_hal *ah)
+{
+        int i, j;
+
+        for (i = 0; i < NUM_NF_READINGS; i++) {
+                ah->nfCalHist[i].currIndex = 0;
+                ah->nfCalHist[i].privNF = AR_PHY_CCA_MAX_GOOD_VALUE;
+                ah->nfCalHist[i].invalidNFcount =
+                        AR_PHY_CCA_FILTERWINDOW_LENGTH;
+                for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
+                        ah->nfCalHist[i].nfCalBuffer[j] =
+                                AR_PHY_CCA_MAX_GOOD_VALUE;
+                }
+        }
+        return;
+}
+#endif
+
+static void ath9k_hw_gpio_cfg_output_mux(struct ath_hal *ah,
+                                         u32 gpio, u32 type)
+{
+        int addr;
+        u32 gpio_shift, tmp;
+
+        if (gpio > 11)
+                addr = AR_GPIO_OUTPUT_MUX3;
+        else if (gpio > 5)
+                addr = AR_GPIO_OUTPUT_MUX2;
+        else
+                addr = AR_GPIO_OUTPUT_MUX1;
+
+        gpio_shift = (gpio % 6) * 5;
+
+        if (AR_SREV_9280_20_OR_LATER(ah)
+            || (addr != AR_GPIO_OUTPUT_MUX1)) {
+                REG_RMW(ah, addr, (type << gpio_shift),
+                        (0x1f << gpio_shift));
+        } else {
+                tmp = REG_READ(ah, addr);
+                tmp = ((tmp & 0x1F0) << 1) | (tmp & ~0x1F0);
+                tmp &= ~(0x1f << gpio_shift);
+                tmp |= (type << gpio_shift);
+                REG_WRITE(ah, addr, tmp);
+        }
+}
+
+static bool ath9k_hw_cfg_output(struct ath_hal *ah, u32 gpio,
+                                enum ath9k_gpio_output_mux_type
+                                halSignalType)
+{
+        u32 ah_signal_type;
+        u32 gpio_shift;
+
+        static u32 MuxSignalConversionTable[] = {
+
+                AR_GPIO_OUTPUT_MUX_AS_OUTPUT,
+
+                AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED,
+
+                AR_GPIO_OUTPUT_MUX_AS_PCIE_POWER_LED,
+
+                AR_GPIO_OUTPUT_MUX_AS_MAC_NETWORK_LED,
+
+                AR_GPIO_OUTPUT_MUX_AS_MAC_POWER_LED,
+        };
+
+        if ((halSignalType >= 0)
+            && (halSignalType < ARRAY_SIZE(MuxSignalConversionTable)))
+                ah_signal_type = MuxSignalConversionTable[halSignalType];
+        else
+                return false;
+
+        ath9k_hw_gpio_cfg_output_mux(ah, gpio, ah_signal_type);
+
+        gpio_shift = 2 * gpio;
+
+        REG_RMW(ah,
+                AR_GPIO_OE_OUT,
+                (AR_GPIO_OE_OUT_DRV_ALL << gpio_shift),
+                (AR_GPIO_OE_OUT_DRV << gpio_shift));
+
+        return true;
+}
+
+static bool ath9k_hw_set_gpio(struct ath_hal *ah, u32 gpio,
+                              u32 val)
+{
+        REG_RMW(ah, AR_GPIO_IN_OUT, ((val & 1) << gpio),
+                AR_GPIO_BIT(gpio));
+        return true;
+}
+
+static u32 ath9k_hw_gpio_get(struct ath_hal *ah, u32 gpio)
+{
+        if (gpio >= ah->ah_caps.num_gpio_pins)
+                return 0xffffffff;
+
+        if (AR_SREV_9280_10_OR_LATER(ah)) {
+                return (MS
+                        (REG_READ(ah, AR_GPIO_IN_OUT),
+                         AR928X_GPIO_IN_VAL) & AR_GPIO_BIT(gpio)) != 0;
+        } else {
+                return (MS(REG_READ(ah, AR_GPIO_IN_OUT), AR_GPIO_IN_VAL) &
+                        AR_GPIO_BIT(gpio)) != 0;
+        }
+}
+
+static inline int ath9k_hw_post_attach(struct ath_hal *ah)
+{
+        int ecode;
+
+        if (!ath9k_hw_chip_test(ah)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                         "%s: hardware self-test failed\n", __func__);
+                return -ENODEV;
+        }
+
+        ecode = ath9k_hw_rf_claim(ah);
+        if (ecode != 0)
+                return ecode;
+
+        ecode = ath9k_hw_eeprom_attach(ah);
+        if (ecode != 0)
+                return ecode;
+        ecode = ath9k_hw_rfattach(ah);
+        if (ecode != 0)
+                return ecode;
+
+        if (!AR_SREV_9100(ah)) {
+                ath9k_hw_ani_setup(ah);
+                ath9k_hw_ani_attach(ah);
+        }
+        return 0;
+}
+
+static u32 ath9k_hw_ini_fixup(struct ath_hal *ah,
+                                    struct ar5416_eeprom *pEepData,
+                                    u32 reg, u32 value)
+{
+        struct base_eep_header *pBase = &(pEepData->baseEepHeader);
+
+        switch (ah->ah_devid) {
+        case AR9280_DEVID_PCI:
+                if (reg == 0x7894) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_ANY,
+                                 "ini VAL: %x  EEPROM: %x\n", value,
+                                 (pBase->version & 0xff));
+
+                        if ((pBase->version & 0xff) > 0x0a) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_ANY,
+                                         "PWDCLKIND: %d\n",
+                                         pBase->pwdclkind);
+                                value &= ~AR_AN_TOP2_PWDCLKIND;
+                                value |= AR_AN_TOP2_PWDCLKIND & (pBase->
+                                         pwdclkind << AR_AN_TOP2_PWDCLKIND_S);
+                        } else {
+                                DPRINTF(ah->ah_sc, ATH_DBG_ANY,
+                                         "PWDCLKIND Earlier Rev\n");
+                        }
+
+                        DPRINTF(ah->ah_sc, ATH_DBG_ANY,
+                                 "final ini VAL: %x\n", value);
+                }
+                break;
+        }
+        return value;
+}
+
+static bool ath9k_hw_fill_cap_info(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        u16 capField = 0, eeval;
+
+        eeval = ath9k_hw_get_eeprom(ahp, EEP_REG_0);
+
+        ah->ah_currentRD = eeval;
+
+        eeval = ath9k_hw_get_eeprom(ahp, EEP_REG_1);
+        ah->ah_currentRDExt = eeval;
+
+        capField = ath9k_hw_get_eeprom(ahp, EEP_OP_CAP);
+
+        if (ah->ah_opmode != ATH9K_M_HOSTAP &&
+            ah->ah_subvendorid == AR_SUBVENDOR_ID_NEW_A) {
+                if (ah->ah_currentRD == 0x64 || ah->ah_currentRD == 0x65)
+                        ah->ah_currentRD += 5;
+                else if (ah->ah_currentRD == 0x41)
+                        ah->ah_currentRD = 0x43;
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                         "%s: regdomain mapped to 0x%x\n", __func__,
+                         ah->ah_currentRD);
+        }
+
+        eeval = ath9k_hw_get_eeprom(ahp, EEP_OP_MODE);
+        bitmap_zero(pCap->wireless_modes, ATH9K_MODE_MAX);
+
+        if (eeval & AR5416_OPFLAGS_11A) {
+                set_bit(ATH9K_MODE_11A, pCap->wireless_modes);
+                if (ah->ah_config.ht_enable) {
+                        if (!(eeval & AR5416_OPFLAGS_N_5G_HT20))
+                                set_bit(ATH9K_MODE_11NA_HT20,
+                                        pCap->wireless_modes);
+                        if (!(eeval & AR5416_OPFLAGS_N_5G_HT40)) {
+                                set_bit(ATH9K_MODE_11NA_HT40PLUS,
+                                        pCap->wireless_modes);
+                                set_bit(ATH9K_MODE_11NA_HT40MINUS,
+                                        pCap->wireless_modes);
+                        }
+                }
+        }
+
+        if (eeval & AR5416_OPFLAGS_11G) {
+                set_bit(ATH9K_MODE_11B, pCap->wireless_modes);
+                set_bit(ATH9K_MODE_11G, pCap->wireless_modes);
+                if (ah->ah_config.ht_enable) {
+                        if (!(eeval & AR5416_OPFLAGS_N_2G_HT20))
+                                set_bit(ATH9K_MODE_11NG_HT20,
+                                        pCap->wireless_modes);
+                        if (!(eeval & AR5416_OPFLAGS_N_2G_HT40)) {
+                                set_bit(ATH9K_MODE_11NG_HT40PLUS,
+                                        pCap->wireless_modes);
+                                set_bit(ATH9K_MODE_11NG_HT40MINUS,
+                                        pCap->wireless_modes);
+                        }
+                }
+        }
+
+        pCap->tx_chainmask = ath9k_hw_get_eeprom(ahp, EEP_TX_MASK);
+        if ((ah->ah_isPciExpress)
+            || (eeval & AR5416_OPFLAGS_11A)) {
+                pCap->rx_chainmask =
+                        ath9k_hw_get_eeprom(ahp, EEP_RX_MASK);
+        } else {
+                pCap->rx_chainmask =
+                        (ath9k_hw_gpio_get(ah, 0)) ? 0x5 : 0x7;
+        }
+
+        if (!(AR_SREV_9280(ah) && (ah->ah_macRev == 0)))
+                ahp->ah_miscMode |= AR_PCU_MIC_NEW_LOC_ENA;
+
+        pCap->low_2ghz_chan = 2312;
+        pCap->high_2ghz_chan = 2732;
+
+        pCap->low_5ghz_chan = 4920;
+        pCap->high_5ghz_chan = 6100;
+
+        pCap->hw_caps &= ~ATH9K_HW_CAP_CIPHER_CKIP;
+        pCap->hw_caps |= ATH9K_HW_CAP_CIPHER_TKIP;
+        pCap->hw_caps |= ATH9K_HW_CAP_CIPHER_AESCCM;
+
+        pCap->hw_caps &= ~ATH9K_HW_CAP_MIC_CKIP;
+        pCap->hw_caps |= ATH9K_HW_CAP_MIC_TKIP;
+        pCap->hw_caps |= ATH9K_HW_CAP_MIC_AESCCM;
+
+        pCap->hw_caps |= ATH9K_HW_CAP_CHAN_SPREAD;
+
+        if (ah->ah_config.ht_enable)
+                pCap->hw_caps |= ATH9K_HW_CAP_HT;
+        else
+                pCap->hw_caps &= ~ATH9K_HW_CAP_HT;
+
+        pCap->hw_caps |= ATH9K_HW_CAP_GTT;
+        pCap->hw_caps |= ATH9K_HW_CAP_VEOL;
+        pCap->hw_caps |= ATH9K_HW_CAP_BSSIDMASK;
+        pCap->hw_caps &= ~ATH9K_HW_CAP_MCAST_KEYSEARCH;
+
+        if (capField & AR_EEPROM_EEPCAP_MAXQCU)
+                pCap->total_queues =
+                        MS(capField, AR_EEPROM_EEPCAP_MAXQCU);
+        else
+                pCap->total_queues = ATH9K_NUM_TX_QUEUES;
+
+        if (capField & AR_EEPROM_EEPCAP_KC_ENTRIES)
+                pCap->keycache_size =
+                        1 << MS(capField, AR_EEPROM_EEPCAP_KC_ENTRIES);
+        else
+                pCap->keycache_size = AR_KEYTABLE_SIZE;
+
+        pCap->hw_caps |= ATH9K_HW_CAP_FASTCC;
+        pCap->num_mr_retries = 4;
+        pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD;
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                pCap->num_gpio_pins = AR928X_NUM_GPIO;
+        else
+                pCap->num_gpio_pins = AR_NUM_GPIO;
+
+        if (AR_SREV_9280_10_OR_LATER(ah)) {
+                pCap->hw_caps |= ATH9K_HW_CAP_WOW;
+                pCap->hw_caps |= ATH9K_HW_CAP_WOW_MATCHPATTERN_EXACT;
+        } else {
+                pCap->hw_caps &= ~ATH9K_HW_CAP_WOW;
+                pCap->hw_caps &= ~ATH9K_HW_CAP_WOW_MATCHPATTERN_EXACT;
+        }
+
+        if (AR_SREV_9160_10_OR_LATER(ah) || AR_SREV_9100(ah)) {
+                pCap->hw_caps |= ATH9K_HW_CAP_CST;
+                pCap->rts_aggr_limit = ATH_AMPDU_LIMIT_MAX;
+        } else {
+                pCap->rts_aggr_limit = (8 * 1024);
+        }
+
+        pCap->hw_caps |= ATH9K_HW_CAP_ENHANCEDPM;
+
+        ah->ah_rfsilent = ath9k_hw_get_eeprom(ahp, EEP_RF_SILENT);
+        if (ah->ah_rfsilent & EEP_RFSILENT_ENABLED) {
+                ahp->ah_gpioSelect =
+                        MS(ah->ah_rfsilent, EEP_RFSILENT_GPIO_SEL);
+                ahp->ah_polarity =
+                        MS(ah->ah_rfsilent, EEP_RFSILENT_POLARITY);
+
+                ath9k_hw_setcapability(ah, ATH9K_CAP_RFSILENT, 1, true,
+                                       NULL);
+                pCap->hw_caps |= ATH9K_HW_CAP_RFSILENT;
+        }
+
+        if ((ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) ||
+            (ah->ah_macVersion == AR_SREV_VERSION_5416_PCIE) ||
+            (ah->ah_macVersion == AR_SREV_VERSION_9160) ||
+            (ah->ah_macVersion == AR_SREV_VERSION_9100) ||
+            (ah->ah_macVersion == AR_SREV_VERSION_9280))
+                pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP;
+        else
+                pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP;
+
+        if (AR_SREV_9280(ah))
+                pCap->hw_caps &= ~ATH9K_HW_CAP_4KB_SPLITTRANS;
+        else
+                pCap->hw_caps |= ATH9K_HW_CAP_4KB_SPLITTRANS;
+
+        if (ah->ah_currentRDExt & (1 << REG_EXT_JAPAN_MIDBAND)) {
+                pCap->reg_cap =
+                        AR_EEPROM_EEREGCAP_EN_KK_NEW_11A |
+                        AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN |
+                        AR_EEPROM_EEREGCAP_EN_KK_U2 |
+                        AR_EEPROM_EEREGCAP_EN_KK_MIDBAND;
+        } else {
+                pCap->reg_cap =
+                        AR_EEPROM_EEREGCAP_EN_KK_NEW_11A |
+                        AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN;
+        }
+
+        pCap->reg_cap |= AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND;
+
+        pCap->num_antcfg_5ghz =
+                ath9k_hw_get_num_ant_config(ahp, IEEE80211_BAND_5GHZ);
+        pCap->num_antcfg_2ghz =
+                ath9k_hw_get_num_ant_config(ahp, IEEE80211_BAND_2GHZ);
+
+        return true;
+}
+
+static void ar5416DisablePciePhy(struct ath_hal *ah)
+{
+        if (!AR_SREV_9100(ah))
+                return;
+
+        REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
+        REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
+        REG_WRITE(ah, AR_PCIE_SERDES, 0x28000029);
+        REG_WRITE(ah, AR_PCIE_SERDES, 0x57160824);
+        REG_WRITE(ah, AR_PCIE_SERDES, 0x25980579);
+        REG_WRITE(ah, AR_PCIE_SERDES, 0x00000000);
+        REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
+        REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
+        REG_WRITE(ah, AR_PCIE_SERDES, 0x000e1007);
+
+        REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
+}
+
+static void ath9k_set_power_sleep(struct ath_hal *ah, int setChip)
+{
+        REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
+        if (setChip) {
+                REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,
+                            AR_RTC_FORCE_WAKE_EN);
+                if (!AR_SREV_9100(ah))
+                        REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
+
+                REG_CLR_BIT(ah, (u16) (AR_RTC_RESET),
+                            AR_RTC_RESET_EN);
+        }
+}
+
+static void ath9k_set_power_network_sleep(struct ath_hal *ah, int setChip)
+{
+        REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
+        if (setChip) {
+                struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+
+                if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
+                        REG_WRITE(ah, AR_RTC_FORCE_WAKE,
+                                  AR_RTC_FORCE_WAKE_ON_INT);
+                } else {
+                        REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,
+                                    AR_RTC_FORCE_WAKE_EN);
+                }
+        }
+}
+
+static bool ath9k_hw_set_power_awake(struct ath_hal *ah,
+                                     int setChip)
+{
+        u32 val;
+        int i;
+
+        if (setChip) {
+                if ((REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M) ==
+                    AR_RTC_STATUS_SHUTDOWN) {
+                        if (ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)
+                            != true) {
+                                return false;
+                        }
+                }
+                if (AR_SREV_9100(ah))
+                        REG_SET_BIT(ah, AR_RTC_RESET,
+                                       AR_RTC_RESET_EN);
+
+                REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,
+                            AR_RTC_FORCE_WAKE_EN);
+                udelay(50);
+
+                for (i = POWER_UP_TIME / 50; i > 0; i--) {
+                        val = REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M;
+                        if (val == AR_RTC_STATUS_ON)
+                                break;
+                        udelay(50);
+                        REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,
+                                       AR_RTC_FORCE_WAKE_EN);
+                }
+                if (i == 0) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
+                                 "%s: Failed to wakeup in %uus\n",
+                                 __func__, POWER_UP_TIME / 20);
+                        return false;
+                }
+        }
+
+        REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
+        return true;
+}
+
+bool ath9k_hw_setpower(struct ath_hal *ah,
+                       enum ath9k_power_mode mode)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        static const char *modes[] = {
+                "AWAKE",
+                "FULL-SLEEP",
+                "NETWORK SLEEP",
+                "UNDEFINED"
+        };
+        int status = true, setChip = true;
+
+        DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, "%s: %s -> %s (%s)\n", __func__,
+                 modes[ahp->ah_powerMode], modes[mode],
+                 setChip ? "set chip " : "");
+
+        switch (mode) {
+        case ATH9K_PM_AWAKE:
+                status = ath9k_hw_set_power_awake(ah, setChip);
+                break;
+        case ATH9K_PM_FULL_SLEEP:
+                ath9k_set_power_sleep(ah, setChip);
+                ahp->ah_chipFullSleep = true;
+                break;
+        case ATH9K_PM_NETWORK_SLEEP:
+                ath9k_set_power_network_sleep(ah, setChip);
+                break;
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
+                         "%s: unknown power mode %u\n", __func__, mode);
+                return false;
+        }
+        ahp->ah_powerMode = mode;
+        return status;
+}
+
+static struct ath_hal *ath9k_hw_do_attach(u16 devid,
+                                          struct ath_softc *sc,
+                                          void __iomem *mem,
+                                          int *status)
+{
+        struct ath_hal_5416 *ahp;
+        struct ath_hal *ah;
+        int ecode;
+#ifndef CONFIG_SLOW_ANT_DIV
+        u32 i;
+        u32 j;
+#endif
+
+        ahp = ath9k_hw_newstate(devid, sc, mem, status);
+        if (ahp == NULL)
+                return NULL;
+
+        ah = &ahp->ah;
+
+        ath9k_hw_set_defaults(ah);
+
+        if (ah->ah_config.intr_mitigation != 0)
+                ahp->ah_intrMitigation = true;
+
+        if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: couldn't reset chip\n",
+                         __func__);
+                ecode = -EIO;
+                goto bad;
+        }
+
+        if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: couldn't wakeup chip\n",
+                         __func__);
+                ecode = -EIO;
+                goto bad;
+        }
+
+        if (ah->ah_config.serialize_regmode == SER_REG_MODE_AUTO) {
+                if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) {
+                        ah->ah_config.serialize_regmode =
+                                SER_REG_MODE_ON;
+                } else {
+                        ah->ah_config.serialize_regmode =
+                                SER_REG_MODE_OFF;
+                }
+        }
+        DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                "%s: serialize_regmode is %d\n",
+                __func__, ah->ah_config.serialize_regmode);
+
+        if ((ah->ah_macVersion != AR_SREV_VERSION_5416_PCI) &&
+            (ah->ah_macVersion != AR_SREV_VERSION_5416_PCIE) &&
+            (ah->ah_macVersion != AR_SREV_VERSION_9160) &&
+            (!AR_SREV_9100(ah)) && (!AR_SREV_9280(ah))) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                         "%s: Mac Chip Rev 0x%02x.%x is not supported by "
+                         "this driver\n", __func__,
+                         ah->ah_macVersion, ah->ah_macRev);
+                ecode = -EOPNOTSUPP;
+                goto bad;
+        }
+
+        if (AR_SREV_9100(ah)) {
+                ahp->ah_iqCalData.calData = &iq_cal_multi_sample;
+                ahp->ah_suppCals = IQ_MISMATCH_CAL;
+                ah->ah_isPciExpress = false;
+        }
+        ah->ah_phyRev = REG_READ(ah, AR_PHY_CHIP_ID);
+
+        if (AR_SREV_9160_10_OR_LATER(ah)) {
+                if (AR_SREV_9280_10_OR_LATER(ah)) {
+                        ahp->ah_iqCalData.calData = &iq_cal_single_sample;
+                        ahp->ah_adcGainCalData.calData =
+                                &adc_gain_cal_single_sample;
+                        ahp->ah_adcDcCalData.calData =
+                                &adc_dc_cal_single_sample;
+                        ahp->ah_adcDcCalInitData.calData =
+                                &adc_init_dc_cal;
+                } else {
+                        ahp->ah_iqCalData.calData = &iq_cal_multi_sample;
+                        ahp->ah_adcGainCalData.calData =
+                                &adc_gain_cal_multi_sample;
+                        ahp->ah_adcDcCalData.calData =
+                                &adc_dc_cal_multi_sample;
+                        ahp->ah_adcDcCalInitData.calData =
+                                &adc_init_dc_cal;
+                }
+                ahp->ah_suppCals =
+                        ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL;
+        }
+
+        if (AR_SREV_9160(ah)) {
+                ah->ah_config.enable_ani = 1;
+                ahp->ah_ani_function = (ATH9K_ANI_SPUR_IMMUNITY_LEVEL |
+                                        ATH9K_ANI_FIRSTEP_LEVEL);
+        } else {
+                ahp->ah_ani_function = ATH9K_ANI_ALL;
+                if (AR_SREV_9280_10_OR_LATER(ah)) {
+                        ahp->ah_ani_function &=
+                                ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL;
+                }
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                 "%s: This Mac Chip Rev 0x%02x.%x is \n", __func__,
+                 ah->ah_macVersion, ah->ah_macRev);
+
+        if (AR_SREV_9280_20_OR_LATER(ah)) {
+                INIT_INI_ARRAY(&ahp->ah_iniModes, ar9280Modes_9280_2,
+                               ARRAY_SIZE(ar9280Modes_9280_2), 6);
+                INIT_INI_ARRAY(&ahp->ah_iniCommon, ar9280Common_9280_2,
+                               ARRAY_SIZE(ar9280Common_9280_2), 2);
+
+                if (ah->ah_config.pcie_clock_req) {
+                        INIT_INI_ARRAY(&ahp->ah_iniPcieSerdes,
+                                       ar9280PciePhy_clkreq_off_L1_9280,
+                                       ARRAY_SIZE
+                                       (ar9280PciePhy_clkreq_off_L1_9280),
+                                       2);
+                } else {
+                        INIT_INI_ARRAY(&ahp->ah_iniPcieSerdes,
+                                       ar9280PciePhy_clkreq_always_on_L1_9280,
+                                       ARRAY_SIZE
+                                       (ar9280PciePhy_clkreq_always_on_L1_9280),
+                                       2);
+                }
+                INIT_INI_ARRAY(&ahp->ah_iniModesAdditional,
+                               ar9280Modes_fast_clock_9280_2,
+                               ARRAY_SIZE(ar9280Modes_fast_clock_9280_2),
+                               3);
+        } else if (AR_SREV_9280_10_OR_LATER(ah)) {
+                INIT_INI_ARRAY(&ahp->ah_iniModes, ar9280Modes_9280,
+                               ARRAY_SIZE(ar9280Modes_9280), 6);
+                INIT_INI_ARRAY(&ahp->ah_iniCommon, ar9280Common_9280,
+                               ARRAY_SIZE(ar9280Common_9280), 2);
+        } else if (AR_SREV_9160_10_OR_LATER(ah)) {
+                INIT_INI_ARRAY(&ahp->ah_iniModes, ar5416Modes_9160,
+                               ARRAY_SIZE(ar5416Modes_9160), 6);
+                INIT_INI_ARRAY(&ahp->ah_iniCommon, ar5416Common_9160,
+                               ARRAY_SIZE(ar5416Common_9160), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank0, ar5416Bank0_9160,
+                               ARRAY_SIZE(ar5416Bank0_9160), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBB_RfGain, ar5416BB_RfGain_9160,
+                               ARRAY_SIZE(ar5416BB_RfGain_9160), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank1, ar5416Bank1_9160,
+                               ARRAY_SIZE(ar5416Bank1_9160), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank2, ar5416Bank2_9160,
+                               ARRAY_SIZE(ar5416Bank2_9160), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank3, ar5416Bank3_9160,
+                               ARRAY_SIZE(ar5416Bank3_9160), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank6, ar5416Bank6_9160,
+                               ARRAY_SIZE(ar5416Bank6_9160), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank6TPC, ar5416Bank6TPC_9160,
+                               ARRAY_SIZE(ar5416Bank6TPC_9160), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank7, ar5416Bank7_9160,
+                               ARRAY_SIZE(ar5416Bank7_9160), 2);
+                if (AR_SREV_9160_11(ah)) {
+                        INIT_INI_ARRAY(&ahp->ah_iniAddac,
+                                       ar5416Addac_91601_1,
+                                       ARRAY_SIZE(ar5416Addac_91601_1), 2);
+                } else {
+                        INIT_INI_ARRAY(&ahp->ah_iniAddac, ar5416Addac_9160,
+                                       ARRAY_SIZE(ar5416Addac_9160), 2);
+                }
+        } else if (AR_SREV_9100_OR_LATER(ah)) {
+                INIT_INI_ARRAY(&ahp->ah_iniModes, ar5416Modes_9100,
+                               ARRAY_SIZE(ar5416Modes_9100), 6);
+                INIT_INI_ARRAY(&ahp->ah_iniCommon, ar5416Common_9100,
+                               ARRAY_SIZE(ar5416Common_9100), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank0, ar5416Bank0_9100,
+                               ARRAY_SIZE(ar5416Bank0_9100), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBB_RfGain, ar5416BB_RfGain_9100,
+                               ARRAY_SIZE(ar5416BB_RfGain_9100), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank1, ar5416Bank1_9100,
+                               ARRAY_SIZE(ar5416Bank1_9100), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank2, ar5416Bank2_9100,
+                               ARRAY_SIZE(ar5416Bank2_9100), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank3, ar5416Bank3_9100,
+                               ARRAY_SIZE(ar5416Bank3_9100), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank6, ar5416Bank6_9100,
+                               ARRAY_SIZE(ar5416Bank6_9100), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank6TPC, ar5416Bank6TPC_9100,
+                               ARRAY_SIZE(ar5416Bank6TPC_9100), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank7, ar5416Bank7_9100,
+                               ARRAY_SIZE(ar5416Bank7_9100), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniAddac, ar5416Addac_9100,
+                               ARRAY_SIZE(ar5416Addac_9100), 2);
+        } else {
+                INIT_INI_ARRAY(&ahp->ah_iniModes, ar5416Modes,
+                               ARRAY_SIZE(ar5416Modes), 6);
+                INIT_INI_ARRAY(&ahp->ah_iniCommon, ar5416Common,
+                               ARRAY_SIZE(ar5416Common), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank0, ar5416Bank0,
+                               ARRAY_SIZE(ar5416Bank0), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBB_RfGain, ar5416BB_RfGain,
+                               ARRAY_SIZE(ar5416BB_RfGain), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank1, ar5416Bank1,
+                               ARRAY_SIZE(ar5416Bank1), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank2, ar5416Bank2,
+                               ARRAY_SIZE(ar5416Bank2), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniBank3, ar5416Bank3,
+                               ARRAY_SIZE(ar5416Bank3), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank6, ar5416Bank6,
+                               ARRAY_SIZE(ar5416Bank6), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank6TPC, ar5416Bank6TPC,
+                               ARRAY_SIZE(ar5416Bank6TPC), 3);
+                INIT_INI_ARRAY(&ahp->ah_iniBank7, ar5416Bank7,
+                               ARRAY_SIZE(ar5416Bank7), 2);
+                INIT_INI_ARRAY(&ahp->ah_iniAddac, ar5416Addac,
+                               ARRAY_SIZE(ar5416Addac), 2);
+        }
+
+        if (ah->ah_isPciExpress)
+                ath9k_hw_configpcipowersave(ah, 0);
+        else
+                ar5416DisablePciePhy(ah);
+
+        ecode = ath9k_hw_post_attach(ah);
+        if (ecode != 0)
+                goto bad;
+
+#ifndef CONFIG_SLOW_ANT_DIV
+        if (ah->ah_devid == AR9280_DEVID_PCI) {
+                for (i = 0; i < ahp->ah_iniModes.ia_rows; i++) {
+                        u32 reg = INI_RA(&ahp->ah_iniModes, i, 0);
+
+                        for (j = 1; j < ahp->ah_iniModes.ia_columns; j++) {
+                                u32 val = INI_RA(&ahp->ah_iniModes, i, j);
+
+                                INI_RA(&ahp->ah_iniModes, i, j) =
+                                        ath9k_hw_ini_fixup(ah, &ahp->ah_eeprom,
+                                                           reg, val);
+                        }
+                }
+        }
+#endif
+
+        if (!ath9k_hw_fill_cap_info(ah)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                         "%s:failed ath9k_hw_fill_cap_info\n", __func__);
+                ecode = -EINVAL;
+                goto bad;
+        }
+
+        ecode = ath9k_hw_init_macaddr(ah);
+        if (ecode != 0) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                         "%s: failed initializing mac address\n",
+                         __func__);
+                goto bad;
+        }
+
+        if (AR_SREV_9285(ah))
+                ah->ah_txTrigLevel = (AR_FTRIG_256B >> AR_FTRIG_S);
+        else
+                ah->ah_txTrigLevel = (AR_FTRIG_512B >> AR_FTRIG_S);
+
+#ifndef ATH_NF_PER_CHAN
+
+        ath9k_init_nfcal_hist_buffer(ah);
+#endif
+
+        return ah;
+
+bad:
+        if (ahp)
+                ath9k_hw_detach((struct ath_hal *) ahp);
+        if (status)
+                *status = ecode;
+        return NULL;
+}
+
+void ath9k_hw_detach(struct ath_hal *ah)
+{
+        if (!AR_SREV_9100(ah))
+                ath9k_hw_ani_detach(ah);
+        ath9k_hw_rfdetach(ah);
+
+        ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
+        kfree(ah);
+}
+
+bool ath9k_get_channel_edges(struct ath_hal *ah,
+                             u16 flags, u16 *low,
+                             u16 *high)
+{
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+
+        if (flags & CHANNEL_5GHZ) {
+                *low = pCap->low_5ghz_chan;
+                *high = pCap->high_5ghz_chan;
+                return true;
+        }
+        if ((flags & CHANNEL_2GHZ)) {
+                *low = pCap->low_2ghz_chan;
+                *high = pCap->high_2ghz_chan;
+
+                return true;
+        }
+        return false;
+}
+
+static inline bool ath9k_hw_fill_vpd_table(u8 pwrMin,
+                                           u8 pwrMax,
+                                           u8 *pPwrList,
+                                           u8 *pVpdList,
+                                           u16
+                                           numIntercepts,
+                                           u8 *pRetVpdList)
+{
+        u16 i, k;
+        u8 currPwr = pwrMin;
+        u16 idxL = 0, idxR = 0;
+
+        for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) {
+                ath9k_hw_get_lower_upper_index(currPwr, pPwrList,
+                                               numIntercepts, &(idxL),
+                                               &(idxR));
+                if (idxR < 1)
+                        idxR = 1;
+                if (idxL == numIntercepts - 1)
+                        idxL = (u16) (numIntercepts - 2);
+                if (pPwrList[idxL] == pPwrList[idxR])
+                        k = pVpdList[idxL];
+                else
+                        k = (u16) (((currPwr -
+                                           pPwrList[idxL]) *
+                                          pVpdList[idxR] +
+                                          (pPwrList[idxR] -
+                                           currPwr) * pVpdList[idxL]) /
+                                         (pPwrList[idxR] -
+                                          pPwrList[idxL]));
+                pRetVpdList[i] = (u8) k;
+                currPwr += 2;
+        }
+
+        return true;
+}
+
+static inline void
+ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hal *ah,
+                                    struct ath9k_channel *chan,
+                                    struct cal_data_per_freq *pRawDataSet,
+                                    u8 *bChans,
+                                    u16 availPiers,
+                                    u16 tPdGainOverlap,
+                                    int16_t *pMinCalPower,
+                                    u16 *pPdGainBoundaries,
+                                    u8 *pPDADCValues,
+                                    u16 numXpdGains)
+{
+        int i, j, k;
+        int16_t ss;
+        u16 idxL = 0, idxR = 0, numPiers;
+        static u8 vpdTableL[AR5416_NUM_PD_GAINS]
+                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
+        static u8 vpdTableR[AR5416_NUM_PD_GAINS]
+                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
+        static u8 vpdTableI[AR5416_NUM_PD_GAINS]
+                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
+
+        u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
+        u8 minPwrT4[AR5416_NUM_PD_GAINS];
+        u8 maxPwrT4[AR5416_NUM_PD_GAINS];
+        int16_t vpdStep;
+        int16_t tmpVal;
+        u16 sizeCurrVpdTable, maxIndex, tgtIndex;
+        bool match;
+        int16_t minDelta = 0;
+        struct chan_centers centers;
+
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+
+        for (numPiers = 0; numPiers < availPiers; numPiers++) {
+                if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
+                        break;
+        }
+
+        match = ath9k_hw_get_lower_upper_index((u8)
+                                               FREQ2FBIN(centers.
+                                                         synth_center,
+                                                         IS_CHAN_2GHZ
+                                                         (chan)), bChans,
+                                               numPiers, &idxL, &idxR);
+
+        if (match) {
+                for (i = 0; i < numXpdGains; i++) {
+                        minPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][0];
+                        maxPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][4];
+                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
+                                                pRawDataSet[idxL].
+                                                pwrPdg[i],
+                                                pRawDataSet[idxL].
+                                                vpdPdg[i],
+                                                AR5416_PD_GAIN_ICEPTS,
+                                                vpdTableI[i]);
+                }
+        } else {
+                for (i = 0; i < numXpdGains; i++) {
+                        pVpdL = pRawDataSet[idxL].vpdPdg[i];
+                        pPwrL = pRawDataSet[idxL].pwrPdg[i];
+                        pVpdR = pRawDataSet[idxR].vpdPdg[i];
+                        pPwrR = pRawDataSet[idxR].pwrPdg[i];
+
+                        minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
+
+                        maxPwrT4[i] =
+                                min(pPwrL[AR5416_PD_GAIN_ICEPTS - 1],
+                                    pPwrR[AR5416_PD_GAIN_ICEPTS - 1]);
+
+
+                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
+                                                pPwrL, pVpdL,
+                                                AR5416_PD_GAIN_ICEPTS,
+                                                vpdTableL[i]);
+                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
+                                                pPwrR, pVpdR,
+                                                AR5416_PD_GAIN_ICEPTS,
+                                                vpdTableR[i]);
+
+                        for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
+                                vpdTableI[i][j] =
+                                        (u8) (ath9k_hw_interpolate
+                                                    ((u16)
+                                                     FREQ2FBIN(centers.
+                                                               synth_center,
+                                                               IS_CHAN_2GHZ
+                                                               (chan)),
+                                                     bChans[idxL],
+                                                     bChans[idxR], vpdTableL[i]
+                                                     [j], vpdTableR[i]
+                                                     [j]));
+                        }
+                }
+        }
+
+        *pMinCalPower = (int16_t) (minPwrT4[0] / 2);
+
+        k = 0;
+        for (i = 0; i < numXpdGains; i++) {
+                if (i == (numXpdGains - 1))
+                        pPdGainBoundaries[i] =
+                                (u16) (maxPwrT4[i] / 2);
+                else
+                        pPdGainBoundaries[i] =
+                                (u16) ((maxPwrT4[i] +
+                                              minPwrT4[i + 1]) / 4);
+
+                pPdGainBoundaries[i] =
+                        min((u16) AR5416_MAX_RATE_POWER,
+                            pPdGainBoundaries[i]);
+
+                if ((i == 0) && !AR_SREV_5416_V20_OR_LATER(ah)) {
+                        minDelta = pPdGainBoundaries[0] - 23;
+                        pPdGainBoundaries[0] = 23;
+                } else {
+                        minDelta = 0;
+                }
+
+                if (i == 0) {
+                        if (AR_SREV_9280_10_OR_LATER(ah))
+                                ss = (int16_t) (0 - (minPwrT4[i] / 2));
+                        else
+                                ss = 0;
+                } else {
+                        ss = (int16_t) ((pPdGainBoundaries[i - 1] -
+                                         (minPwrT4[i] / 2)) -
+                                        tPdGainOverlap + 1 + minDelta);
+                }
+                vpdStep = (int16_t) (vpdTableI[i][1] - vpdTableI[i][0]);
+                vpdStep = (int16_t) ((vpdStep < 1) ? 1 : vpdStep);
+
+                while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
+                        tmpVal = (int16_t) (vpdTableI[i][0] + ss * vpdStep);
+                        pPDADCValues[k++] =
+                                (u8) ((tmpVal < 0) ? 0 : tmpVal);
+                        ss++;
+                }
+
+                sizeCurrVpdTable =
+                        (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
+                tgtIndex = (u8) (pPdGainBoundaries[i] + tPdGainOverlap -
+                                       (minPwrT4[i] / 2));
+                maxIndex = (tgtIndex <
+                            sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
+
+                while ((ss < maxIndex)
+                       && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
+                        pPDADCValues[k++] = vpdTableI[i][ss++];
+                }
+
+                vpdStep = (int16_t) (vpdTableI[i][sizeCurrVpdTable - 1] -
+                                     vpdTableI[i][sizeCurrVpdTable - 2]);
+                vpdStep = (int16_t) ((vpdStep < 1) ? 1 : vpdStep);
+
+                if (tgtIndex > maxIndex) {
+                        while ((ss <= tgtIndex)
+                               && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
+                                tmpVal = (int16_t) ((vpdTableI[i]
+                                                     [sizeCurrVpdTable -
+                                                      1] + (ss - maxIndex +
+                                                            1) * vpdStep));
+                                pPDADCValues[k++] = (u8) ((tmpVal >
+                                                 255) ? 255 : tmpVal);
+                                ss++;
+                        }
+                }
+        }
+
+        while (i < AR5416_PD_GAINS_IN_MASK) {
+                pPdGainBoundaries[i] = pPdGainBoundaries[i - 1];
+                i++;
+        }
+
+        while (k < AR5416_NUM_PDADC_VALUES) {
+                pPDADCValues[k] = pPDADCValues[k - 1];
+                k++;
+        }
+        return;
+}
+
+static inline bool
+ath9k_hw_set_power_cal_table(struct ath_hal *ah,
+                             struct ar5416_eeprom *pEepData,
+                             struct ath9k_channel *chan,
+                             int16_t *pTxPowerIndexOffset)
+{
+        struct cal_data_per_freq *pRawDataset;
+        u8 *pCalBChans = NULL;
+        u16 pdGainOverlap_t2;
+        static u8 pdadcValues[AR5416_NUM_PDADC_VALUES];
+        u16 gainBoundaries[AR5416_PD_GAINS_IN_MASK];
+        u16 numPiers, i, j;
+        int16_t tMinCalPower;
+        u16 numXpdGain, xpdMask;
+        u16 xpdGainValues[AR5416_NUM_PD_GAINS] = { 0, 0, 0, 0 };
+        u32 reg32, regOffset, regChainOffset;
+        int16_t modalIdx;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        modalIdx = IS_CHAN_2GHZ(chan) ? 1 : 0;
+        xpdMask = pEepData->modalHeader[modalIdx].xpdGain;
+
+        if ((pEepData->baseEepHeader.
+             version & AR5416_EEP_VER_MINOR_MASK) >=
+            AR5416_EEP_MINOR_VER_2) {
+                pdGainOverlap_t2 =
+                        pEepData->modalHeader[modalIdx].pdGainOverlap;
+        } else {
+                pdGainOverlap_t2 =
+                        (u16) (MS
+                                     (REG_READ(ah, AR_PHY_TPCRG5),
+                                      AR_PHY_TPCRG5_PD_GAIN_OVERLAP));
+        }
+
+        if (IS_CHAN_2GHZ(chan)) {
+                pCalBChans = pEepData->calFreqPier2G;
+                numPiers = AR5416_NUM_2G_CAL_PIERS;
+        } else {
+                pCalBChans = pEepData->calFreqPier5G;
+                numPiers = AR5416_NUM_5G_CAL_PIERS;
+        }
+
+        numXpdGain = 0;
+
+        for (i = 1; i <= AR5416_PD_GAINS_IN_MASK; i++) {
+                if ((xpdMask >> (AR5416_PD_GAINS_IN_MASK - i)) & 1) {
+                        if (numXpdGain >= AR5416_NUM_PD_GAINS)
+                                break;
+                        xpdGainValues[numXpdGain] =
+                                (u16) (AR5416_PD_GAINS_IN_MASK - i);
+                        numXpdGain++;
+                }
+        }
+
+        REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
+                      (numXpdGain - 1) & 0x3);
+        REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1,
+                      xpdGainValues[0]);
+        REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2,
+                      xpdGainValues[1]);
+        REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3,
+                      xpdGainValues[2]);
+
+        for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+                if (AR_SREV_5416_V20_OR_LATER(ah) &&
+                    (ahp->ah_rxchainmask == 5 || ahp->ah_txchainmask == 5)
+                    && (i != 0)) {
+                        regChainOffset = (i == 1) ? 0x2000 : 0x1000;
+                } else
+                        regChainOffset = i * 0x1000;
+                if (pEepData->baseEepHeader.txMask & (1 << i)) {
+                        if (IS_CHAN_2GHZ(chan))
+                                pRawDataset = pEepData->calPierData2G[i];
+                        else
+                                pRawDataset = pEepData->calPierData5G[i];
+
+                        ath9k_hw_get_gain_boundaries_pdadcs(ah, chan,
+                                                            pRawDataset,
+                                                            pCalBChans,
+                                                            numPiers,
+                                                            pdGainOverlap_t2,
+                                                            &tMinCalPower,
+                                                            gainBoundaries,
+                                                            pdadcValues,
+                                                            numXpdGain);
+
+                        if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {
+
+                                REG_WRITE(ah,
+                                          AR_PHY_TPCRG5 + regChainOffset,
+                                          SM(pdGainOverlap_t2,
+                                             AR_PHY_TPCRG5_PD_GAIN_OVERLAP)
+                                          | SM(gainBoundaries[0],
+                                               AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1)
+                                          | SM(gainBoundaries[1],
+                                               AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2)
+                                          | SM(gainBoundaries[2],
+                                               AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3)
+                                          | SM(gainBoundaries[3],
+                                       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
+                        }
+
+                        regOffset =
+                                AR_PHY_BASE + (672 << 2) + regChainOffset;
+                        for (j = 0; j < 32; j++) {
+                                reg32 =
+                                        ((pdadcValues[4 * j + 0] & 0xFF) << 0)
+                                        | ((pdadcValues[4 * j + 1] & 0xFF) <<
+                                           8) | ((pdadcValues[4 * j + 2] &
+                                                  0xFF) << 16) |
+                                        ((pdadcValues[4 * j + 3] & 0xFF) <<
+                                         24);
+                                REG_WRITE(ah, regOffset, reg32);
+
+                                DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
+                                         "PDADC (%d,%4x): %4.4x %8.8x\n",
+                                         i, regChainOffset, regOffset,
+                                         reg32);
+                                DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
+                                "PDADC: Chain %d | PDADC %3d Value %3d | "
+                                "PDADC %3d Value %3d | PDADC %3d Value %3d | "
+                                "PDADC %3d Value %3d |\n",
+                                         i, 4 * j, pdadcValues[4 * j],
+                                         4 * j + 1, pdadcValues[4 * j + 1],
+                                         4 * j + 2, pdadcValues[4 * j + 2],
+                                         4 * j + 3,
+                                         pdadcValues[4 * j + 3]);
+
+                                regOffset += 4;
+                        }
+                }
+        }
+        *pTxPowerIndexOffset = 0;
+
+        return true;
+}
+
+void ath9k_hw_configpcipowersave(struct ath_hal *ah, int restore)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u8 i;
+
+        if (ah->ah_isPciExpress != true)
+                return;
+
+        if (ah->ah_config.pcie_powersave_enable == 2)
+                return;
+
+        if (restore)
+                return;
+
+        if (AR_SREV_9280_20_OR_LATER(ah)) {
+                for (i = 0; i < ahp->ah_iniPcieSerdes.ia_rows; i++) {
+                        REG_WRITE(ah, INI_RA(&ahp->ah_iniPcieSerdes, i, 0),
+                                  INI_RA(&ahp->ah_iniPcieSerdes, i, 1));
+                }
+                udelay(1000);
+        } else if (AR_SREV_9280(ah)
+                   && (ah->ah_macRev == AR_SREV_REVISION_9280_10)) {
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
+
+                REG_WRITE(ah, AR_PCIE_SERDES, 0xa8000019);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x13160820);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980560);
+
+                if (ah->ah_config.pcie_clock_req)
+                        REG_WRITE(ah, AR_PCIE_SERDES, 0x401deffc);
+                else
+                        REG_WRITE(ah, AR_PCIE_SERDES, 0x401deffd);
+
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x00043007);
+
+                REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
+
+                udelay(1000);
+        } else {
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
+                REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007);
+                REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
+        }
+
+        REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
+
+        if (ah->ah_config.pcie_waen) {
+                REG_WRITE(ah, AR_WA, ah->ah_config.pcie_waen);
+        } else {
+                if (AR_SREV_9280(ah))
+                        REG_WRITE(ah, AR_WA, 0x0040073f);
+                else
+                        REG_WRITE(ah, AR_WA, 0x0000073f);
+        }
+}
+
+static inline void
+ath9k_hw_get_legacy_target_powers(struct ath_hal *ah,
+                                  struct ath9k_channel *chan,
+                                  struct cal_target_power_leg *powInfo,
+                                  u16 numChannels,
+                                  struct cal_target_power_leg *pNewPower,
+                                  u16 numRates,
+                                  bool isExtTarget)
+{
+        u16 clo, chi;
+        int i;
+        int matchIndex = -1, lowIndex = -1;
+        u16 freq;
+        struct chan_centers centers;
+
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+        freq = (isExtTarget) ? centers.ext_center : centers.ctl_center;
+
+        if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel,
+                IS_CHAN_2GHZ(chan))) {
+                matchIndex = 0;
+        } else {
+                for (i = 0; (i < numChannels)
+                     && (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
+                        if (freq ==
+                            ath9k_hw_fbin2freq(powInfo[i].bChannel,
+                                               IS_CHAN_2GHZ(chan))) {
+                                matchIndex = i;
+                                break;
+                        } else if ((freq <
+                                    ath9k_hw_fbin2freq(powInfo[i].bChannel,
+                                                       IS_CHAN_2GHZ(chan)))
+                                   && (freq >
+                                       ath9k_hw_fbin2freq(powInfo[i - 1].
+                                                          bChannel,
+                                                          IS_CHAN_2GHZ
+                                                          (chan)))) {
+                                lowIndex = i - 1;
+                                break;
+                        }
+                }
+                if ((matchIndex == -1) && (lowIndex == -1))
+                        matchIndex = i - 1;
+        }
+
+        if (matchIndex != -1) {
+                *pNewPower = powInfo[matchIndex];
+        } else {
+                clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
+                                         IS_CHAN_2GHZ(chan));
+                chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
+                                         IS_CHAN_2GHZ(chan));
+
+                for (i = 0; i < numRates; i++) {
+                        pNewPower->tPow2x[i] =
+                                (u8) ath9k_hw_interpolate(freq, clo, chi,
+                                                                powInfo
+                                                                [lowIndex].
+                                                                tPow2x[i],
+                                                                powInfo
+                                                                [lowIndex +
+                                                                 1].tPow2x[i]);
+                }
+        }
+}
+
+static inline void
+ath9k_hw_get_target_powers(struct ath_hal *ah,
+                           struct ath9k_channel *chan,
+                           struct cal_target_power_ht *powInfo,
+                           u16 numChannels,
+                           struct cal_target_power_ht *pNewPower,
+                           u16 numRates,
+                           bool isHt40Target)
+{
+        u16 clo, chi;
+        int i;
+        int matchIndex = -1, lowIndex = -1;
+        u16 freq;
+        struct chan_centers centers;
+
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+        freq = isHt40Target ? centers.synth_center : centers.ctl_center;
+
+        if (freq <=
+                ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {
+                matchIndex = 0;
+        } else {
+                for (i = 0; (i < numChannels)
+                     && (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
+                        if (freq ==
+                            ath9k_hw_fbin2freq(powInfo[i].bChannel,
+                                               IS_CHAN_2GHZ(chan))) {
+                                matchIndex = i;
+                                break;
+                        } else
+                                if ((freq <
+                                     ath9k_hw_fbin2freq(powInfo[i].bChannel,
+                                                        IS_CHAN_2GHZ(chan)))
+                                    && (freq >
+                                        ath9k_hw_fbin2freq(powInfo[i - 1].
+                                                           bChannel,
+                                                           IS_CHAN_2GHZ
+                                                           (chan)))) {
+                                        lowIndex = i - 1;
+                                        break;
+                                }
+                }
+                if ((matchIndex == -1) && (lowIndex == -1))
+                        matchIndex = i - 1;
+        }
+
+        if (matchIndex != -1) {
+                *pNewPower = powInfo[matchIndex];
+        } else {
+                clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
+                                         IS_CHAN_2GHZ(chan));
+                chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
+                                         IS_CHAN_2GHZ(chan));
+
+                for (i = 0; i < numRates; i++) {
+                        pNewPower->tPow2x[i] =
+                                (u8) ath9k_hw_interpolate(freq, clo, chi,
+                                                                powInfo
+                                                                [lowIndex].
+                                                                tPow2x[i],
+                                                                powInfo
+                                                                [lowIndex +
+                                                                 1].tPow2x[i]);
+                }
+        }
+}
+
+static inline u16
+ath9k_hw_get_max_edge_power(u16 freq,
+                            struct cal_ctl_edges *pRdEdgesPower,
+                            bool is2GHz)
+{
+        u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+        int i;
+
+        for (i = 0; (i < AR5416_NUM_BAND_EDGES)
+             && (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
+                if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
+                                               is2GHz)) {
+                        twiceMaxEdgePower = pRdEdgesPower[i].tPower;
+                        break;
+                } else if ((i > 0)
+                           && (freq <
+                               ath9k_hw_fbin2freq(pRdEdgesPower[i].
+                                                  bChannel, is2GHz))) {
+                        if (ath9k_hw_fbin2freq
+                            (pRdEdgesPower[i - 1].bChannel, is2GHz) < freq
+                            && pRdEdgesPower[i - 1].flag) {
+                                twiceMaxEdgePower =
+                                        pRdEdgesPower[i - 1].tPower;
+                        }
+                        break;
+                }
+        }
+        return twiceMaxEdgePower;
+}
+
+static inline bool
+ath9k_hw_set_power_per_rate_table(struct ath_hal *ah,
+                                  struct ar5416_eeprom *pEepData,
+                                  struct ath9k_channel *chan,
+                                  int16_t *ratesArray,
+                                  u16 cfgCtl,
+                                  u8 AntennaReduction,
+                                  u8 twiceMaxRegulatoryPower,
+                                  u8 powerLimit)
+{
+        u8 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+        static const u16 tpScaleReductionTable[5] =
+                { 0, 3, 6, 9, AR5416_MAX_RATE_POWER };
+
+        int i;
+        int8_t twiceLargestAntenna;
+        struct cal_ctl_data *rep;
+        struct cal_target_power_leg targetPowerOfdm, targetPowerCck = {
+                0, { 0, 0, 0, 0}
+        };
+        struct cal_target_power_leg targetPowerOfdmExt = {
+                0, { 0, 0, 0, 0} }, targetPowerCckExt = {
+                0, { 0, 0, 0, 0 }
+        };
+        struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = {
+                0, {0, 0, 0, 0}
+        };
+        u8 scaledPower = 0, minCtlPower, maxRegAllowedPower;
+        u16 ctlModesFor11a[] =
+                { CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40 };
+        u16 ctlModesFor11g[] =
+                { CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT,
+                  CTL_2GHT40
+                };
+        u16 numCtlModes, *pCtlMode, ctlMode, freq;
+        struct chan_centers centers;
+        int tx_chainmask;
+        u8 twiceMinEdgePower;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        tx_chainmask = ahp->ah_txchainmask;
+
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+
+        twiceLargestAntenna = max(
+                pEepData->modalHeader
+                        [IS_CHAN_2GHZ(chan)].antennaGainCh[0],
+                pEepData->modalHeader
+                        [IS_CHAN_2GHZ(chan)].antennaGainCh[1]);
+
+        twiceLargestAntenna = max((u8) twiceLargestAntenna,
+                pEepData->modalHeader
+                        [IS_CHAN_2GHZ(chan)].antennaGainCh[2]);
+
+        twiceLargestAntenna =
+                (int8_t) min(AntennaReduction - twiceLargestAntenna, 0);
+
+        maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
+
+        if (ah->ah_tpScale != ATH9K_TP_SCALE_MAX) {
+                maxRegAllowedPower -=
+                        (tpScaleReductionTable[(ah->ah_tpScale)] * 2);
+        }
+
+        scaledPower = min(powerLimit, maxRegAllowedPower);
+
+        switch (ar5416_get_ntxchains(tx_chainmask)) {
+        case 1:
+                break;
+        case 2:
+                scaledPower -=
+                        pEepData->modalHeader[IS_CHAN_2GHZ(chan)].
+                        pwrDecreaseFor2Chain;
+                break;
+        case 3:
+                scaledPower -=
+                        pEepData->modalHeader[IS_CHAN_2GHZ(chan)].
+                        pwrDecreaseFor3Chain;
+                break;
+        }
+
+        scaledPower = max(0, (int32_t) scaledPower);
+
+        if (IS_CHAN_2GHZ(chan)) {
+                numCtlModes =
+                        ARRAY_SIZE(ctlModesFor11g) -
+                        SUB_NUM_CTL_MODES_AT_2G_40;
+                pCtlMode = ctlModesFor11g;
+
+                ath9k_hw_get_legacy_target_powers(ah, chan,
+                        pEepData->
+                        calTargetPowerCck,
+                        AR5416_NUM_2G_CCK_TARGET_POWERS,
+                        &targetPowerCck, 4,
+                        false);
+                ath9k_hw_get_legacy_target_powers(ah, chan,
+                        pEepData->
+                        calTargetPower2G,
+                        AR5416_NUM_2G_20_TARGET_POWERS,
+                        &targetPowerOfdm, 4,
+                        false);
+                ath9k_hw_get_target_powers(ah, chan,
+                        pEepData->calTargetPower2GHT20,
+                        AR5416_NUM_2G_20_TARGET_POWERS,
+                        &targetPowerHt20, 8, false);
+
+                if (IS_CHAN_HT40(chan)) {
+                        numCtlModes = ARRAY_SIZE(ctlModesFor11g);
+                        ath9k_hw_get_target_powers(ah, chan,
+                                pEepData->
+                                calTargetPower2GHT40,
+                                AR5416_NUM_2G_40_TARGET_POWERS,
+                                &targetPowerHt40, 8,
+                                true);
+                        ath9k_hw_get_legacy_target_powers(ah, chan,
+                                pEepData->
+                                calTargetPowerCck,
+                                AR5416_NUM_2G_CCK_TARGET_POWERS,
+                                &targetPowerCckExt,
+                                4, true);
+                        ath9k_hw_get_legacy_target_powers(ah, chan,
+                                pEepData->
+                                calTargetPower2G,
+                                AR5416_NUM_2G_20_TARGET_POWERS,
+                                &targetPowerOfdmExt,
+                                4, true);
+                }
+        } else {
+
+                numCtlModes =
+                        ARRAY_SIZE(ctlModesFor11a) -
+                        SUB_NUM_CTL_MODES_AT_5G_40;
+                pCtlMode = ctlModesFor11a;
+
+                ath9k_hw_get_legacy_target_powers(ah, chan,
+                        pEepData->
+                        calTargetPower5G,
+                        AR5416_NUM_5G_20_TARGET_POWERS,
+                        &targetPowerOfdm, 4,
+                        false);
+                ath9k_hw_get_target_powers(ah, chan,
+                        pEepData->calTargetPower5GHT20,
+                        AR5416_NUM_5G_20_TARGET_POWERS,
+                        &targetPowerHt20, 8, false);
+
+                if (IS_CHAN_HT40(chan)) {
+                        numCtlModes = ARRAY_SIZE(ctlModesFor11a);
+                        ath9k_hw_get_target_powers(ah, chan,
+                                pEepData->
+                                calTargetPower5GHT40,
+                                AR5416_NUM_5G_40_TARGET_POWERS,
+                                &targetPowerHt40, 8,
+                                true);
+                        ath9k_hw_get_legacy_target_powers(ah, chan,
+                                pEepData->
+                                calTargetPower5G,
+                                AR5416_NUM_5G_20_TARGET_POWERS,
+                                &targetPowerOfdmExt,
+                                4, true);
+                }
+        }
+
+        for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) {
+                bool isHt40CtlMode =
+                        (pCtlMode[ctlMode] == CTL_5GHT40)
+                        || (pCtlMode[ctlMode] == CTL_2GHT40);
+                if (isHt40CtlMode)
+                        freq = centers.synth_center;
+                else if (pCtlMode[ctlMode] & EXT_ADDITIVE)
+                        freq = centers.ext_center;
+                else
+                        freq = centers.ctl_center;
+
+                if (ar5416_get_eep_ver(ahp) == 14
+                    && ar5416_get_eep_rev(ahp) <= 2)
+                        twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
+
+                DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
+                        "LOOP-Mode ctlMode %d < %d, isHt40CtlMode %d, "
+                        "EXT_ADDITIVE %d\n",
+                         ctlMode, numCtlModes, isHt40CtlMode,
+                         (pCtlMode[ctlMode] & EXT_ADDITIVE));
+
+                for (i = 0; (i < AR5416_NUM_CTLS) && pEepData->ctlIndex[i];
+                     i++) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
+                                "  LOOP-Ctlidx %d: cfgCtl 0x%2.2x "
+                                "pCtlMode 0x%2.2x ctlIndex 0x%2.2x "
+                                "chan %d\n",
+                                i, cfgCtl, pCtlMode[ctlMode],
+                                pEepData->ctlIndex[i], chan->channel);
+
+                        if ((((cfgCtl & ~CTL_MODE_M) |
+                              (pCtlMode[ctlMode] & CTL_MODE_M)) ==
+                             pEepData->ctlIndex[i])
+                            ||
+                            (((cfgCtl & ~CTL_MODE_M) |
+                              (pCtlMode[ctlMode] & CTL_MODE_M)) ==
+                             ((pEepData->
+                               ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL))) {
+                                rep = &(pEepData->ctlData[i]);
+
+                                twiceMinEdgePower =
+                                        ath9k_hw_get_max_edge_power(freq,
+                                                rep->
+                                                ctlEdges
+                                                [ar5416_get_ntxchains
+                                                (tx_chainmask)
+                                                - 1],
+                                                IS_CHAN_2GHZ
+                                                (chan));
+
+                                DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
+                                        "    MATCH-EE_IDX %d: ch %d is2 %d "
+                                        "2xMinEdge %d chainmask %d chains %d\n",
+                                         i, freq, IS_CHAN_2GHZ(chan),
+                                         twiceMinEdgePower, tx_chainmask,
+                                         ar5416_get_ntxchains
+                                         (tx_chainmask));
+                                if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) {
+                                        twiceMaxEdgePower =
+                                                min(twiceMaxEdgePower,
+                                                    twiceMinEdgePower);
+                                } else {
+                                        twiceMaxEdgePower =
+                                                twiceMinEdgePower;
+                                        break;
+                                }
+                        }
+                }
+
+                minCtlPower = min(twiceMaxEdgePower, scaledPower);
+
+                DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
+                                "    SEL-Min ctlMode %d pCtlMode %d "
+                                "2xMaxEdge %d sP %d minCtlPwr %d\n",
+                         ctlMode, pCtlMode[ctlMode], twiceMaxEdgePower,
+                         scaledPower, minCtlPower);
+
+                switch (pCtlMode[ctlMode]) {
+                case CTL_11B:
+                        for (i = 0; i < ARRAY_SIZE(targetPowerCck.tPow2x);
+                             i++) {
+                                targetPowerCck.tPow2x[i] =
+                                        min(targetPowerCck.tPow2x[i],
+                                            minCtlPower);
+                        }
+                        break;
+                case CTL_11A:
+                case CTL_11G:
+                        for (i = 0; i < ARRAY_SIZE(targetPowerOfdm.tPow2x);
+                             i++) {
+                                targetPowerOfdm.tPow2x[i] =
+                                        min(targetPowerOfdm.tPow2x[i],
+                                            minCtlPower);
+                        }
+                        break;
+                case CTL_5GHT20:
+                case CTL_2GHT20:
+                        for (i = 0; i < ARRAY_SIZE(targetPowerHt20.tPow2x);
+                             i++) {
+                                targetPowerHt20.tPow2x[i] =
+                                        min(targetPowerHt20.tPow2x[i],
+                                            minCtlPower);
+                        }
+                        break;
+                case CTL_11B_EXT:
+                        targetPowerCckExt.tPow2x[0] =
+                                min(targetPowerCckExt.tPow2x[0], minCtlPower);
+                        break;
+                case CTL_11A_EXT:
+                case CTL_11G_EXT:
+                        targetPowerOfdmExt.tPow2x[0] =
+                                min(targetPowerOfdmExt.tPow2x[0], minCtlPower);
+                        break;
+                case CTL_5GHT40:
+                case CTL_2GHT40:
+                        for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x);
+                             i++) {
+                                targetPowerHt40.tPow2x[i] =
+                                        min(targetPowerHt40.tPow2x[i],
+                                            minCtlPower);
+                        }
+                        break;
+                default:
+                        break;
+                }
+        }
+
+        ratesArray[rate6mb] = ratesArray[rate9mb] = ratesArray[rate12mb] =
+                ratesArray[rate18mb] = ratesArray[rate24mb] =
+                targetPowerOfdm.tPow2x[0];
+        ratesArray[rate36mb] = targetPowerOfdm.tPow2x[1];
+        ratesArray[rate48mb] = targetPowerOfdm.tPow2x[2];
+        ratesArray[rate54mb] = targetPowerOfdm.tPow2x[3];
+        ratesArray[rateXr] = targetPowerOfdm.tPow2x[0];
+
+        for (i = 0; i < ARRAY_SIZE(targetPowerHt20.tPow2x); i++)
+                ratesArray[rateHt20_0 + i] = targetPowerHt20.tPow2x[i];
+
+        if (IS_CHAN_2GHZ(chan)) {
+                ratesArray[rate1l] = targetPowerCck.tPow2x[0];
+                ratesArray[rate2s] = ratesArray[rate2l] =
+                        targetPowerCck.tPow2x[1];
+                ratesArray[rate5_5s] = ratesArray[rate5_5l] =
+                        targetPowerCck.tPow2x[2];
+                ;
+                ratesArray[rate11s] = ratesArray[rate11l] =
+                        targetPowerCck.tPow2x[3];
+                ;
+        }
+        if (IS_CHAN_HT40(chan)) {
+                for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x); i++) {
+                        ratesArray[rateHt40_0 + i] =
+                                targetPowerHt40.tPow2x[i];
+                }
+                ratesArray[rateDupOfdm] = targetPowerHt40.tPow2x[0];
+                ratesArray[rateDupCck] = targetPowerHt40.tPow2x[0];
+                ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0];
+                if (IS_CHAN_2GHZ(chan)) {
+                        ratesArray[rateExtCck] =
+                                targetPowerCckExt.tPow2x[0];
+                }
+        }
+        return true;
+}
+
+static int
+ath9k_hw_set_txpower(struct ath_hal *ah,
+                     struct ar5416_eeprom *pEepData,
+                     struct ath9k_channel *chan,
+                     u16 cfgCtl,
+                     u8 twiceAntennaReduction,
+                     u8 twiceMaxRegulatoryPower,
+                     u8 powerLimit)
+{
+        struct modal_eep_header *pModal =
+                &(pEepData->modalHeader[IS_CHAN_2GHZ(chan)]);
+        int16_t ratesArray[Ar5416RateSize];
+        int16_t txPowerIndexOffset = 0;
+        u8 ht40PowerIncForPdadc = 2;
+        int i;
+
+        memset(ratesArray, 0, sizeof(ratesArray));
+
+        if ((pEepData->baseEepHeader.
+             version & AR5416_EEP_VER_MINOR_MASK) >=
+            AR5416_EEP_MINOR_VER_2) {
+                ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
+        }
+
+        if (!ath9k_hw_set_power_per_rate_table(ah, pEepData, chan,
+                                               &ratesArray[0], cfgCtl,
+                                               twiceAntennaReduction,
+                                               twiceMaxRegulatoryPower,
+                                               powerLimit)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                        "ath9k_hw_set_txpower: unable to set "
+                        "tx power per rate table\n");
+                return -EIO;
+        }
+
+        if (!ath9k_hw_set_power_cal_table
+            (ah, pEepData, chan, &txPowerIndexOffset)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                         "ath9k_hw_set_txpower: unable to set power table\n");
+                return -EIO;
+        }
+
+        for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
+                ratesArray[i] =
+                        (int16_t) (txPowerIndexOffset + ratesArray[i]);
+                if (ratesArray[i] > AR5416_MAX_RATE_POWER)
+                        ratesArray[i] = AR5416_MAX_RATE_POWER;
+        }
+
+        if (AR_SREV_9280_10_OR_LATER(ah)) {
+                for (i = 0; i < Ar5416RateSize; i++)
+                        ratesArray[i] -= AR5416_PWR_TABLE_OFFSET * 2;
+        }
+
+        REG_WRITE(ah, AR_PHY_POWER_TX_RATE1,
+                  ATH9K_POW_SM(ratesArray[rate18mb], 24)
+                  | ATH9K_POW_SM(ratesArray[rate12mb], 16)
+                  | ATH9K_POW_SM(ratesArray[rate9mb], 8)
+                  | ATH9K_POW_SM(ratesArray[rate6mb], 0)
+                );
+        REG_WRITE(ah, AR_PHY_POWER_TX_RATE2,
+                  ATH9K_POW_SM(ratesArray[rate54mb], 24)
+                  | ATH9K_POW_SM(ratesArray[rate48mb], 16)
+                  | ATH9K_POW_SM(ratesArray[rate36mb], 8)
+                  | ATH9K_POW_SM(ratesArray[rate24mb], 0)
+                );
+
+        if (IS_CHAN_2GHZ(chan)) {
+                REG_WRITE(ah, AR_PHY_POWER_TX_RATE3,
+                          ATH9K_POW_SM(ratesArray[rate2s], 24)
+                          | ATH9K_POW_SM(ratesArray[rate2l], 16)
+                          | ATH9K_POW_SM(ratesArray[rateXr], 8)
+                          | ATH9K_POW_SM(ratesArray[rate1l], 0)
+                        );
+                REG_WRITE(ah, AR_PHY_POWER_TX_RATE4,
+                          ATH9K_POW_SM(ratesArray[rate11s], 24)
+                          | ATH9K_POW_SM(ratesArray[rate11l], 16)
+                          | ATH9K_POW_SM(ratesArray[rate5_5s], 8)
+                          | ATH9K_POW_SM(ratesArray[rate5_5l], 0)
+                        );
+        }
+
+        REG_WRITE(ah, AR_PHY_POWER_TX_RATE5,
+                  ATH9K_POW_SM(ratesArray[rateHt20_3], 24)
+                  | ATH9K_POW_SM(ratesArray[rateHt20_2], 16)
+                  | ATH9K_POW_SM(ratesArray[rateHt20_1], 8)
+                  | ATH9K_POW_SM(ratesArray[rateHt20_0], 0)
+                );
+        REG_WRITE(ah, AR_PHY_POWER_TX_RATE6,
+                  ATH9K_POW_SM(ratesArray[rateHt20_7], 24)
+                  | ATH9K_POW_SM(ratesArray[rateHt20_6], 16)
+                  | ATH9K_POW_SM(ratesArray[rateHt20_5], 8)
+                  | ATH9K_POW_SM(ratesArray[rateHt20_4], 0)
+                );
+
+        if (IS_CHAN_HT40(chan)) {
+                REG_WRITE(ah, AR_PHY_POWER_TX_RATE7,
+                          ATH9K_POW_SM(ratesArray[rateHt40_3] +
+                                       ht40PowerIncForPdadc, 24)
+                          | ATH9K_POW_SM(ratesArray[rateHt40_2] +
+                                         ht40PowerIncForPdadc, 16)
+                          | ATH9K_POW_SM(ratesArray[rateHt40_1] +
+                                         ht40PowerIncForPdadc, 8)
+                          | ATH9K_POW_SM(ratesArray[rateHt40_0] +
+                                         ht40PowerIncForPdadc, 0)
+                        );
+                REG_WRITE(ah, AR_PHY_POWER_TX_RATE8,
+                          ATH9K_POW_SM(ratesArray[rateHt40_7] +
+                                       ht40PowerIncForPdadc, 24)
+                          | ATH9K_POW_SM(ratesArray[rateHt40_6] +
+                                         ht40PowerIncForPdadc, 16)
+                          | ATH9K_POW_SM(ratesArray[rateHt40_5] +
+                                         ht40PowerIncForPdadc, 8)
+                          | ATH9K_POW_SM(ratesArray[rateHt40_4] +
+                                         ht40PowerIncForPdadc, 0)
+                        );
+
+                REG_WRITE(ah, AR_PHY_POWER_TX_RATE9,
+                          ATH9K_POW_SM(ratesArray[rateExtOfdm], 24)
+                          | ATH9K_POW_SM(ratesArray[rateExtCck], 16)
+                          | ATH9K_POW_SM(ratesArray[rateDupOfdm], 8)
+                          | ATH9K_POW_SM(ratesArray[rateDupCck], 0)
+                        );
+        }
+
+        REG_WRITE(ah, AR_PHY_POWER_TX_SUB,
+                  ATH9K_POW_SM(pModal->pwrDecreaseFor3Chain, 6)
+                  | ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0)
+                );
+
+        i = rate6mb;
+        if (IS_CHAN_HT40(chan))
+                i = rateHt40_0;
+        else if (IS_CHAN_HT20(chan))
+                i = rateHt20_0;
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                ah->ah_maxPowerLevel =
+                        ratesArray[i] + AR5416_PWR_TABLE_OFFSET * 2;
+        else
+                ah->ah_maxPowerLevel = ratesArray[i];
+
+        return 0;
+}
+
+static inline void ath9k_hw_get_delta_slope_vals(struct ath_hal *ah,
+                                                 u32 coef_scaled,
+                                                 u32 *coef_mantissa,
+                                                 u32 *coef_exponent)
+{
+        u32 coef_exp, coef_man;
+
+        for (coef_exp = 31; coef_exp > 0; coef_exp--)
+                if ((coef_scaled >> coef_exp) & 0x1)
+                        break;
+
+        coef_exp = 14 - (coef_exp - COEF_SCALE_S);
+
+        coef_man = coef_scaled + (1 << (COEF_SCALE_S - coef_exp - 1));
+
+        *coef_mantissa = coef_man >> (COEF_SCALE_S - coef_exp);
+        *coef_exponent = coef_exp - 16;
+}
+
+static void
+ath9k_hw_set_delta_slope(struct ath_hal *ah,
+                         struct ath9k_channel *chan)
+{
+        u32 coef_scaled, ds_coef_exp, ds_coef_man;
+        u32 clockMhzScaled = 0x64000000;
+        struct chan_centers centers;
+
+        if (IS_CHAN_HALF_RATE(chan))
+                clockMhzScaled = clockMhzScaled >> 1;
+        else if (IS_CHAN_QUARTER_RATE(chan))
+                clockMhzScaled = clockMhzScaled >> 2;
+
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+        coef_scaled = clockMhzScaled / centers.synth_center;
+
+        ath9k_hw_get_delta_slope_vals(ah, coef_scaled, &ds_coef_man,
+                                      &ds_coef_exp);
+
+        REG_RMW_FIELD(ah, AR_PHY_TIMING3,
+                      AR_PHY_TIMING3_DSC_MAN, ds_coef_man);
+        REG_RMW_FIELD(ah, AR_PHY_TIMING3,
+                      AR_PHY_TIMING3_DSC_EXP, ds_coef_exp);
+
+        coef_scaled = (9 * coef_scaled) / 10;
+
+        ath9k_hw_get_delta_slope_vals(ah, coef_scaled, &ds_coef_man,
+                                      &ds_coef_exp);
+
+        REG_RMW_FIELD(ah, AR_PHY_HALFGI,
+                      AR_PHY_HALFGI_DSC_MAN, ds_coef_man);
+        REG_RMW_FIELD(ah, AR_PHY_HALFGI,
+                      AR_PHY_HALFGI_DSC_EXP, ds_coef_exp);
+}
+
+static void ath9k_hw_9280_spur_mitigate(struct ath_hal *ah,
+                                        struct ath9k_channel *chan)
+{
+        int bb_spur = AR_NO_SPUR;
+        int freq;
+        int bin, cur_bin;
+        int bb_spur_off, spur_subchannel_sd;
+        int spur_freq_sd;
+        int spur_delta_phase;
+        int denominator;
+        int upper, lower, cur_vit_mask;
+        int tmp, newVal;
+        int i;
+        int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
+                          AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
+        };
+        int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
+                         AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
+        };
+        int inc[4] = { 0, 100, 0, 0 };
+        struct chan_centers centers;
+
+        int8_t mask_m[123];
+        int8_t mask_p[123];
+        int8_t mask_amt;
+        int tmp_mask;
+        int cur_bb_spur;
+        bool is2GHz = IS_CHAN_2GHZ(chan);
+
+        memset(&mask_m, 0, sizeof(int8_t) * 123);
+        memset(&mask_p, 0, sizeof(int8_t) * 123);
+
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+        freq = centers.synth_center;
+
+        ah->ah_config.spurmode = SPUR_ENABLE_EEPROM;
+        for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+                cur_bb_spur = ath9k_hw_eeprom_get_spur_chan(ah, i, is2GHz);
+
+                if (is2GHz)
+                        cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_2GHZ;
+                else
+                        cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_5GHZ;
+
+                if (AR_NO_SPUR == cur_bb_spur)
+                        break;
+                cur_bb_spur = cur_bb_spur - freq;
+
+                if (IS_CHAN_HT40(chan)) {
+                        if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT40) &&
+                            (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT40)) {
+                                bb_spur = cur_bb_spur;
+                                break;
+                        }
+                } else if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT20) &&
+                           (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT20)) {
+                        bb_spur = cur_bb_spur;
+                        break;
+                }
+        }
+
+        if (AR_NO_SPUR == bb_spur) {
+                REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
+                            AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
+                return;
+        } else {
+                REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
+                            AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
+        }
+
+        bin = bb_spur * 320;
+
+        tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
+
+        newVal = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
+                        AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
+                        AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
+                        AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
+        REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), newVal);
+
+        newVal = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
+                  AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
+                  AR_PHY_SPUR_REG_MASK_RATE_SELECT |
+                  AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
+                  SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
+        REG_WRITE(ah, AR_PHY_SPUR_REG, newVal);
+
+        if (IS_CHAN_HT40(chan)) {
+                if (bb_spur < 0) {
+                        spur_subchannel_sd = 1;
+                        bb_spur_off = bb_spur + 10;
+                } else {
+                        spur_subchannel_sd = 0;
+                        bb_spur_off = bb_spur - 10;
+                }
+        } else {
+                spur_subchannel_sd = 0;
+                bb_spur_off = bb_spur;
+        }
+
+        if (IS_CHAN_HT40(chan))
+                spur_delta_phase =
+                        ((bb_spur * 262144) /
+                         10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
+        else
+                spur_delta_phase =
+                        ((bb_spur * 524288) /
+                         10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
+
+        denominator = IS_CHAN_2GHZ(chan) ? 44 : 40;
+        spur_freq_sd = ((bb_spur_off * 2048) / denominator) & 0x3ff;
+
+        newVal = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
+                  SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
+                  SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
+        REG_WRITE(ah, AR_PHY_TIMING11, newVal);
+
+        newVal = spur_subchannel_sd << AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S;
+        REG_WRITE(ah, AR_PHY_SFCORR_EXT, newVal);
+
+        cur_bin = -6000;
+        upper = bin + 100;
+        lower = bin - 100;
+
+        for (i = 0; i < 4; i++) {
+                int pilot_mask = 0;
+                int chan_mask = 0;
+                int bp = 0;
+                for (bp = 0; bp < 30; bp++) {
+                        if ((cur_bin > lower) && (cur_bin < upper)) {
+                                pilot_mask = pilot_mask | 0x1 << bp;
+                                chan_mask = chan_mask | 0x1 << bp;
+                        }
+                        cur_bin += 100;
+                }
+                cur_bin += inc[i];
+                REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
+                REG_WRITE(ah, chan_mask_reg[i], chan_mask);
+        }
+
+        cur_vit_mask = 6100;
+        upper = bin + 120;
+        lower = bin - 120;
+
+        for (i = 0; i < 123; i++) {
+                if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
+
+                        /* workaround for gcc bug #37014 */
+                        volatile int tmp = abs(cur_vit_mask - bin);
+
+                        if (tmp < 75)
+                                mask_amt = 1;
+                        else
+                                mask_amt = 0;
+                        if (cur_vit_mask < 0)
+                                mask_m[abs(cur_vit_mask / 100)] = mask_amt;
+                        else
+                                mask_p[cur_vit_mask / 100] = mask_amt;
+                }
+                cur_vit_mask -= 100;
+        }
+
+        tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
+                | (mask_m[48] << 26) | (mask_m[49] << 24)
+                | (mask_m[50] << 22) | (mask_m[51] << 20)
+                | (mask_m[52] << 18) | (mask_m[53] << 16)
+                | (mask_m[54] << 14) | (mask_m[55] << 12)
+                | (mask_m[56] << 10) | (mask_m[57] << 8)
+                | (mask_m[58] << 6) | (mask_m[59] << 4)
+                | (mask_m[60] << 2) | (mask_m[61] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
+        REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
+
+        tmp_mask = (mask_m[31] << 28)
+                | (mask_m[32] << 26) | (mask_m[33] << 24)
+                | (mask_m[34] << 22) | (mask_m[35] << 20)
+                | (mask_m[36] << 18) | (mask_m[37] << 16)
+                | (mask_m[48] << 14) | (mask_m[39] << 12)
+                | (mask_m[40] << 10) | (mask_m[41] << 8)
+                | (mask_m[42] << 6) | (mask_m[43] << 4)
+                | (mask_m[44] << 2) | (mask_m[45] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
+
+        tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
+                | (mask_m[18] << 26) | (mask_m[18] << 24)
+                | (mask_m[20] << 22) | (mask_m[20] << 20)
+                | (mask_m[22] << 18) | (mask_m[22] << 16)
+                | (mask_m[24] << 14) | (mask_m[24] << 12)
+                | (mask_m[25] << 10) | (mask_m[26] << 8)
+                | (mask_m[27] << 6) | (mask_m[28] << 4)
+                | (mask_m[29] << 2) | (mask_m[30] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
+
+        tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
+                | (mask_m[2] << 26) | (mask_m[3] << 24)
+                | (mask_m[4] << 22) | (mask_m[5] << 20)
+                | (mask_m[6] << 18) | (mask_m[7] << 16)
+                | (mask_m[8] << 14) | (mask_m[9] << 12)
+                | (mask_m[10] << 10) | (mask_m[11] << 8)
+                | (mask_m[12] << 6) | (mask_m[13] << 4)
+                | (mask_m[14] << 2) | (mask_m[15] << 0);
+        REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
+
+        tmp_mask = (mask_p[15] << 28)
+                | (mask_p[14] << 26) | (mask_p[13] << 24)
+                | (mask_p[12] << 22) | (mask_p[11] << 20)
+                | (mask_p[10] << 18) | (mask_p[9] << 16)
+                | (mask_p[8] << 14) | (mask_p[7] << 12)
+                | (mask_p[6] << 10) | (mask_p[5] << 8)
+                | (mask_p[4] << 6) | (mask_p[3] << 4)
+                | (mask_p[2] << 2) | (mask_p[1] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
+
+        tmp_mask = (mask_p[30] << 28)
+                | (mask_p[29] << 26) | (mask_p[28] << 24)
+                | (mask_p[27] << 22) | (mask_p[26] << 20)
+                | (mask_p[25] << 18) | (mask_p[24] << 16)
+                | (mask_p[23] << 14) | (mask_p[22] << 12)
+                | (mask_p[21] << 10) | (mask_p[20] << 8)
+                | (mask_p[19] << 6) | (mask_p[18] << 4)
+                | (mask_p[17] << 2) | (mask_p[16] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
+
+        tmp_mask = (mask_p[45] << 28)
+                | (mask_p[44] << 26) | (mask_p[43] << 24)
+                | (mask_p[42] << 22) | (mask_p[41] << 20)
+                | (mask_p[40] << 18) | (mask_p[39] << 16)
+                | (mask_p[38] << 14) | (mask_p[37] << 12)
+                | (mask_p[36] << 10) | (mask_p[35] << 8)
+                | (mask_p[34] << 6) | (mask_p[33] << 4)
+                | (mask_p[32] << 2) | (mask_p[31] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
+
+        tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
+                | (mask_p[59] << 26) | (mask_p[58] << 24)
+                | (mask_p[57] << 22) | (mask_p[56] << 20)
+                | (mask_p[55] << 18) | (mask_p[54] << 16)
+                | (mask_p[53] << 14) | (mask_p[52] << 12)
+                | (mask_p[51] << 10) | (mask_p[50] << 8)
+                | (mask_p[49] << 6) | (mask_p[48] << 4)
+                | (mask_p[47] << 2) | (mask_p[46] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
+}
+
+static void ath9k_hw_spur_mitigate(struct ath_hal *ah,
+                                   struct ath9k_channel *chan)
+{
+        int bb_spur = AR_NO_SPUR;
+        int bin, cur_bin;
+        int spur_freq_sd;
+        int spur_delta_phase;
+        int denominator;
+        int upper, lower, cur_vit_mask;
+        int tmp, new;
+        int i;
+        int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
+                          AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
+        };
+        int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
+                         AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
+        };
+        int inc[4] = { 0, 100, 0, 0 };
+
+        int8_t mask_m[123];
+        int8_t mask_p[123];
+        int8_t mask_amt;
+        int tmp_mask;
+        int cur_bb_spur;
+        bool is2GHz = IS_CHAN_2GHZ(chan);
+
+        memset(&mask_m, 0, sizeof(int8_t) * 123);
+        memset(&mask_p, 0, sizeof(int8_t) * 123);
+
+        for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+                cur_bb_spur = ath9k_hw_eeprom_get_spur_chan(ah, i, is2GHz);
+                if (AR_NO_SPUR == cur_bb_spur)
+                        break;
+                cur_bb_spur = cur_bb_spur - (chan->channel * 10);
+                if ((cur_bb_spur > -95) && (cur_bb_spur < 95)) {
+                        bb_spur = cur_bb_spur;
+                        break;
+                }
+        }
+
+        if (AR_NO_SPUR == bb_spur)
+                return;
+
+        bin = bb_spur * 32;
+
+        tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
+        new = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
+                     AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
+                     AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
+                     AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
+
+        REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new);
+
+        new = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
+               AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
+               AR_PHY_SPUR_REG_MASK_RATE_SELECT |
+               AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
+               SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
+        REG_WRITE(ah, AR_PHY_SPUR_REG, new);
+
+        spur_delta_phase = ((bb_spur * 524288) / 100) &
+                AR_PHY_TIMING11_SPUR_DELTA_PHASE;
+
+        denominator = IS_CHAN_2GHZ(chan) ? 440 : 400;
+        spur_freq_sd = ((bb_spur * 2048) / denominator) & 0x3ff;
+
+        new = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
+               SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
+               SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
+        REG_WRITE(ah, AR_PHY_TIMING11, new);
+
+        cur_bin = -6000;
+        upper = bin + 100;
+        lower = bin - 100;
+
+        for (i = 0; i < 4; i++) {
+                int pilot_mask = 0;
+                int chan_mask = 0;
+                int bp = 0;
+                for (bp = 0; bp < 30; bp++) {
+                        if ((cur_bin > lower) && (cur_bin < upper)) {
+                                pilot_mask = pilot_mask | 0x1 << bp;
+                                chan_mask = chan_mask | 0x1 << bp;
+                        }
+                        cur_bin += 100;
+                }
+                cur_bin += inc[i];
+                REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
+                REG_WRITE(ah, chan_mask_reg[i], chan_mask);
+        }
+
+        cur_vit_mask = 6100;
+        upper = bin + 120;
+        lower = bin - 120;
+
+        for (i = 0; i < 123; i++) {
+                if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
+
+                        /* workaround for gcc bug #37014 */
+                        volatile int tmp = abs(cur_vit_mask - bin);
+
+                        if (tmp < 75)
+                                mask_amt = 1;
+                        else
+                                mask_amt = 0;
+                        if (cur_vit_mask < 0)
+                                mask_m[abs(cur_vit_mask / 100)] = mask_amt;
+                        else
+                                mask_p[cur_vit_mask / 100] = mask_amt;
+                }
+                cur_vit_mask -= 100;
+        }
+
+        tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
+                | (mask_m[48] << 26) | (mask_m[49] << 24)
+                | (mask_m[50] << 22) | (mask_m[51] << 20)
+                | (mask_m[52] << 18) | (mask_m[53] << 16)
+                | (mask_m[54] << 14) | (mask_m[55] << 12)
+                | (mask_m[56] << 10) | (mask_m[57] << 8)
+                | (mask_m[58] << 6) | (mask_m[59] << 4)
+                | (mask_m[60] << 2) | (mask_m[61] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
+        REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
+
+        tmp_mask = (mask_m[31] << 28)
+                | (mask_m[32] << 26) | (mask_m[33] << 24)
+                | (mask_m[34] << 22) | (mask_m[35] << 20)
+                | (mask_m[36] << 18) | (mask_m[37] << 16)
+                | (mask_m[48] << 14) | (mask_m[39] << 12)
+                | (mask_m[40] << 10) | (mask_m[41] << 8)
+                | (mask_m[42] << 6) | (mask_m[43] << 4)
+                | (mask_m[44] << 2) | (mask_m[45] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
+
+        tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
+                | (mask_m[18] << 26) | (mask_m[18] << 24)
+                | (mask_m[20] << 22) | (mask_m[20] << 20)
+                | (mask_m[22] << 18) | (mask_m[22] << 16)
+                | (mask_m[24] << 14) | (mask_m[24] << 12)
+                | (mask_m[25] << 10) | (mask_m[26] << 8)
+                | (mask_m[27] << 6) | (mask_m[28] << 4)
+                | (mask_m[29] << 2) | (mask_m[30] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
+
+        tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
+                | (mask_m[2] << 26) | (mask_m[3] << 24)
+                | (mask_m[4] << 22) | (mask_m[5] << 20)
+                | (mask_m[6] << 18) | (mask_m[7] << 16)
+                | (mask_m[8] << 14) | (mask_m[9] << 12)
+                | (mask_m[10] << 10) | (mask_m[11] << 8)
+                | (mask_m[12] << 6) | (mask_m[13] << 4)
+                | (mask_m[14] << 2) | (mask_m[15] << 0);
+        REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
+
+        tmp_mask = (mask_p[15] << 28)
+                | (mask_p[14] << 26) | (mask_p[13] << 24)
+                | (mask_p[12] << 22) | (mask_p[11] << 20)
+                | (mask_p[10] << 18) | (mask_p[9] << 16)
+                | (mask_p[8] << 14) | (mask_p[7] << 12)
+                | (mask_p[6] << 10) | (mask_p[5] << 8)
+                | (mask_p[4] << 6) | (mask_p[3] << 4)
+                | (mask_p[2] << 2) | (mask_p[1] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
+
+        tmp_mask = (mask_p[30] << 28)
+                | (mask_p[29] << 26) | (mask_p[28] << 24)
+                | (mask_p[27] << 22) | (mask_p[26] << 20)
+                | (mask_p[25] << 18) | (mask_p[24] << 16)
+                | (mask_p[23] << 14) | (mask_p[22] << 12)
+                | (mask_p[21] << 10) | (mask_p[20] << 8)
+                | (mask_p[19] << 6) | (mask_p[18] << 4)
+                | (mask_p[17] << 2) | (mask_p[16] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
+
+        tmp_mask = (mask_p[45] << 28)
+                | (mask_p[44] << 26) | (mask_p[43] << 24)
+                | (mask_p[42] << 22) | (mask_p[41] << 20)
+                | (mask_p[40] << 18) | (mask_p[39] << 16)
+                | (mask_p[38] << 14) | (mask_p[37] << 12)
+                | (mask_p[36] << 10) | (mask_p[35] << 8)
+                | (mask_p[34] << 6) | (mask_p[33] << 4)
+                | (mask_p[32] << 2) | (mask_p[31] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
+
+        tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
+                | (mask_p[59] << 26) | (mask_p[58] << 24)
+                | (mask_p[57] << 22) | (mask_p[56] << 20)
+                | (mask_p[55] << 18) | (mask_p[54] << 16)
+                | (mask_p[53] << 14) | (mask_p[52] << 12)
+                | (mask_p[51] << 10) | (mask_p[50] << 8)
+                | (mask_p[49] << 6) | (mask_p[48] << 4)
+                | (mask_p[47] << 2) | (mask_p[46] << 0);
+        REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
+        REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
+}
+
+static inline void ath9k_hw_init_chain_masks(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int rx_chainmask, tx_chainmask;
+
+        rx_chainmask = ahp->ah_rxchainmask;
+        tx_chainmask = ahp->ah_txchainmask;
+
+        switch (rx_chainmask) {
+        case 0x5:
+                REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
+                            AR_PHY_SWAP_ALT_CHAIN);
+        case 0x3:
+                if (((ah)->ah_macVersion <= AR_SREV_VERSION_9160)) {
+                        REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7);
+                        REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7);
+                        break;
+                }
+        case 0x1:
+        case 0x2:
+                if (!AR_SREV_9280(ah))
+                        break;
+        case 0x7:
+                REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);
+                REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);
+                break;
+        default:
+                break;
+        }
+
+        REG_WRITE(ah, AR_SELFGEN_MASK, tx_chainmask);
+        if (tx_chainmask == 0x5) {
+                REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
+                            AR_PHY_SWAP_ALT_CHAIN);
+        }
+        if (AR_SREV_9100(ah))
+                REG_WRITE(ah, AR_PHY_ANALOG_SWAP,
+                          REG_READ(ah, AR_PHY_ANALOG_SWAP) | 0x00000001);
+}
+
+static void ath9k_hw_set_addac(struct ath_hal *ah,
+                               struct ath9k_channel *chan)
+{
+        struct modal_eep_header *pModal;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ar5416_eeprom *eep = &ahp->ah_eeprom;
+        u8 biaslevel;
+
+        if (ah->ah_macVersion != AR_SREV_VERSION_9160)
+                return;
+
+        if (ar5416_get_eep_rev(ahp) < AR5416_EEP_MINOR_VER_7)
+                return;
+
+        pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
+
+        if (pModal->xpaBiasLvl != 0xff) {
+                biaslevel = pModal->xpaBiasLvl;
+        } else {
+
+                u16 resetFreqBin, freqBin, freqCount = 0;
+                struct chan_centers centers;
+
+                ath9k_hw_get_channel_centers(ah, chan, &centers);
+
+                resetFreqBin =
+                        FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan));
+                freqBin = pModal->xpaBiasLvlFreq[0] & 0xff;
+                biaslevel = (u8) (pModal->xpaBiasLvlFreq[0] >> 14);
+
+                freqCount++;
+
+                while (freqCount < 3) {
+                        if (pModal->xpaBiasLvlFreq[freqCount] == 0x0)
+                                break;
+
+                        freqBin = pModal->xpaBiasLvlFreq[freqCount] & 0xff;
+                        if (resetFreqBin >= freqBin) {
+                                biaslevel =
+                                        (u8) (pModal->
+                                                    xpaBiasLvlFreq[freqCount]
+                                                    >> 14);
+                        } else {
+                                break;
+                        }
+                        freqCount++;
+                }
+        }
+
+        if (IS_CHAN_2GHZ(chan)) {
+                INI_RA(&ahp->ah_iniAddac, 7, 1) =
+                        (INI_RA(&ahp->ah_iniAddac, 7, 1) & (~0x18)) | biaslevel
+                        << 3;
+        } else {
+                INI_RA(&ahp->ah_iniAddac, 6, 1) =
+                        (INI_RA(&ahp->ah_iniAddac, 6, 1) & (~0xc0)) | biaslevel
+                        << 6;
+        }
+}
+
+static u32 ath9k_hw_mac_usec(struct ath_hal *ah, u32 clks)
+{
+        if (ah->ah_curchan != NULL)
+                return clks /
+                CLOCK_RATE[ath9k_hw_chan2wmode(ah, ah->ah_curchan)];
+        else
+                return clks / CLOCK_RATE[ATH9K_MODE_11B];
+}
+
+static u32 ath9k_hw_mac_to_usec(struct ath_hal *ah, u32 clks)
+{
+        struct ath9k_channel *chan = ah->ah_curchan;
+
+        if (chan && IS_CHAN_HT40(chan))
+                return ath9k_hw_mac_usec(ah, clks) / 2;
+        else
+                return ath9k_hw_mac_usec(ah, clks);
+}
+
+static u32 ath9k_hw_mac_clks(struct ath_hal *ah, u32 usecs)
+{
+        if (ah->ah_curchan != NULL)
+                return usecs * CLOCK_RATE[ath9k_hw_chan2wmode(ah,
+                        ah->ah_curchan)];
+        else
+                return usecs * CLOCK_RATE[ATH9K_MODE_11B];
+}
+
+static u32 ath9k_hw_mac_to_clks(struct ath_hal *ah, u32 usecs)
+{
+        struct ath9k_channel *chan = ah->ah_curchan;
+
+        if (chan && IS_CHAN_HT40(chan))
+                return ath9k_hw_mac_clks(ah, usecs) * 2;
+        else
+                return ath9k_hw_mac_clks(ah, usecs);
+}
+
+static bool ath9k_hw_set_ack_timeout(struct ath_hal *ah, u32 us)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_ACK))) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad ack timeout %u\n",
+                         __func__, us);
+                ahp->ah_acktimeout = (u32) -1;
+                return false;
+        } else {
+                REG_RMW_FIELD(ah, AR_TIME_OUT,
+                              AR_TIME_OUT_ACK, ath9k_hw_mac_to_clks(ah, us));
+                ahp->ah_acktimeout = us;
+                return true;
+        }
+}
+
+static bool ath9k_hw_set_cts_timeout(struct ath_hal *ah, u32 us)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_CTS))) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad cts timeout %u\n",
+                         __func__, us);
+                ahp->ah_ctstimeout = (u32) -1;
+                return false;
+        } else {
+                REG_RMW_FIELD(ah, AR_TIME_OUT,
+                              AR_TIME_OUT_CTS, ath9k_hw_mac_to_clks(ah, us));
+                ahp->ah_ctstimeout = us;
+                return true;
+        }
+}
+static bool ath9k_hw_set_global_txtimeout(struct ath_hal *ah,
+                                          u32 tu)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (tu > 0xFFFF) {
+                DPRINTF(ah->ah_sc, ATH_DBG_XMIT,
+                        "%s: bad global tx timeout %u\n", __func__, tu);
+                ahp->ah_globaltxtimeout = (u32) -1;
+                return false;
+        } else {
+                REG_RMW_FIELD(ah, AR_GTXTO, AR_GTXTO_TIMEOUT_LIMIT, tu);
+                ahp->ah_globaltxtimeout = tu;
+                return true;
+        }
+}
+
+bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (us < ATH9K_SLOT_TIME_9 || us > ath9k_hw_mac_to_usec(ah, 0xffff)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad slot time %u\n",
+                         __func__, us);
+                ahp->ah_slottime = (u32) -1;
+                return false;
+        } else {
+                REG_WRITE(ah, AR_D_GBL_IFS_SLOT, ath9k_hw_mac_to_clks(ah, us));
+                ahp->ah_slottime = us;
+                return true;
+        }
+}
+
+static inline void ath9k_hw_init_user_settings(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        DPRINTF(ah->ah_sc, ATH_DBG_RESET, "--AP %s ahp->ah_miscMode 0x%x\n",
+                 __func__, ahp->ah_miscMode);
+        if (ahp->ah_miscMode != 0)
+                REG_WRITE(ah, AR_PCU_MISC,
+                          REG_READ(ah, AR_PCU_MISC) | ahp->ah_miscMode);
+        if (ahp->ah_slottime != (u32) -1)
+                ath9k_hw_setslottime(ah, ahp->ah_slottime);
+        if (ahp->ah_acktimeout != (u32) -1)
+                ath9k_hw_set_ack_timeout(ah, ahp->ah_acktimeout);
+        if (ahp->ah_ctstimeout != (u32) -1)
+                ath9k_hw_set_cts_timeout(ah, ahp->ah_ctstimeout);
+        if (ahp->ah_globaltxtimeout != (u32) -1)
+                ath9k_hw_set_global_txtimeout(ah, ahp->ah_globaltxtimeout);
+}
+
+static inline int
+ath9k_hw_process_ini(struct ath_hal *ah,
+                     struct ath9k_channel *chan,
+                     enum ath9k_ht_macmode macmode)
+{
+        int i, regWrites = 0;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 modesIndex, freqIndex;
+        int status;
+
+        switch (chan->chanmode) {
+        case CHANNEL_A:
+        case CHANNEL_A_HT20:
+                modesIndex = 1;
+                freqIndex = 1;
+                break;
+        case CHANNEL_A_HT40PLUS:
+        case CHANNEL_A_HT40MINUS:
+                modesIndex = 2;
+                freqIndex = 1;
+                break;
+        case CHANNEL_G:
+        case CHANNEL_G_HT20:
+        case CHANNEL_B:
+                modesIndex = 4;
+                freqIndex = 2;
+                break;
+        case CHANNEL_G_HT40PLUS:
+        case CHANNEL_G_HT40MINUS:
+                modesIndex = 3;
+                freqIndex = 2;
+                break;
+
+        default:
+                return -EINVAL;
+        }
+
+        REG_WRITE(ah, AR_PHY(0), 0x00000007);
+
+        REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO);
+
+        ath9k_hw_set_addac(ah, chan);
+
+        if (AR_SREV_5416_V22_OR_LATER(ah)) {
+                REG_WRITE_ARRAY(&ahp->ah_iniAddac, 1, regWrites);
+        } else {
+                struct ar5416IniArray temp;
+                u32 addacSize =
+                        sizeof(u32) * ahp->ah_iniAddac.ia_rows *
+                        ahp->ah_iniAddac.ia_columns;
+
+                memcpy(ahp->ah_addac5416_21,
+                       ahp->ah_iniAddac.ia_array, addacSize);
+
+                (ahp->ah_addac5416_21)[31 *
+                                       ahp->ah_iniAddac.ia_columns + 1] = 0;
+
+                temp.ia_array = ahp->ah_addac5416_21;
+                temp.ia_columns = ahp->ah_iniAddac.ia_columns;
+                temp.ia_rows = ahp->ah_iniAddac.ia_rows;
+                REG_WRITE_ARRAY(&temp, 1, regWrites);
+        }
+        REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC);
+
+        for (i = 0; i < ahp->ah_iniModes.ia_rows; i++) {
+                u32 reg = INI_RA(&ahp->ah_iniModes, i, 0);
+                u32 val = INI_RA(&ahp->ah_iniModes, i, modesIndex);
+
+#ifdef CONFIG_SLOW_ANT_DIV
+                if (ah->ah_devid == AR9280_DEVID_PCI)
+                        val = ath9k_hw_ini_fixup(ah, &ahp->ah_eeprom, reg,
+                                                 val);
+#endif
+
+                REG_WRITE(ah, reg, val);
+
+                if (reg >= 0x7800 && reg < 0x78a0
+                    && ah->ah_config.analog_shiftreg) {
+                        udelay(100);
+                }
+
+                DO_DELAY(regWrites);
+        }
+
+        for (i = 0; i < ahp->ah_iniCommon.ia_rows; i++) {
+                u32 reg = INI_RA(&ahp->ah_iniCommon, i, 0);
+                u32 val = INI_RA(&ahp->ah_iniCommon, i, 1);
+
+                REG_WRITE(ah, reg, val);
+
+                if (reg >= 0x7800 && reg < 0x78a0
+                    && ah->ah_config.analog_shiftreg) {
+                        udelay(100);
+                }
+
+                DO_DELAY(regWrites);
+        }
+
+        ath9k_hw_write_regs(ah, modesIndex, freqIndex, regWrites);
+
+        if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {
+                REG_WRITE_ARRAY(&ahp->ah_iniModesAdditional, modesIndex,
+                                regWrites);
+        }
+
+        ath9k_hw_override_ini(ah, chan);
+        ath9k_hw_set_regs(ah, chan, macmode);
+        ath9k_hw_init_chain_masks(ah);
+
+        status = ath9k_hw_set_txpower(ah, &ahp->ah_eeprom, chan,
+                                      ath9k_regd_get_ctl(ah, chan),
+                                      ath9k_regd_get_antenna_allowed(ah,
+                                                                     chan),
+                                      chan->maxRegTxPower * 2,
+                                      min((u32) MAX_RATE_POWER,
+                                          (u32) ah->ah_powerLimit));
+        if (status != 0) {
+                DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
+                         "%s: error init'ing transmit power\n", __func__);
+                return -EIO;
+        }
+
+        if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                         "%s: ar5416SetRfRegs failed\n", __func__);
+                return -EIO;
+        }
+
+        return 0;
+}
+
+static inline void ath9k_hw_setup_calibration(struct ath_hal *ah,
+                                              struct hal_cal_list *currCal)
+{
+        REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
+                      AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX,
+                      currCal->calData->calCountMax);
+
+        switch (currCal->calData->calType) {
+        case IQ_MISMATCH_CAL:
+                REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%s: starting IQ Mismatch Calibration\n",
+                         __func__);
+                break;
+        case ADC_GAIN_CAL:
+                REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%s: starting ADC Gain Calibration\n", __func__);
+                break;
+        case ADC_DC_CAL:
+                REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%s: starting ADC DC Calibration\n", __func__);
+                break;
+        case ADC_DC_INIT_CAL:
+                REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%s: starting Init ADC DC Calibration\n",
+                         __func__);
+                break;
+        }
+
+        REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
+                    AR_PHY_TIMING_CTRL4_DO_CAL);
+}
+
+static inline void ath9k_hw_reset_calibration(struct ath_hal *ah,
+                                              struct hal_cal_list *currCal)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int i;
+
+        ath9k_hw_setup_calibration(ah, currCal);
+
+        currCal->calState = CAL_RUNNING;
+
+        for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+                ahp->ah_Meas0.sign[i] = 0;
+                ahp->ah_Meas1.sign[i] = 0;
+                ahp->ah_Meas2.sign[i] = 0;
+                ahp->ah_Meas3.sign[i] = 0;
+        }
+
+        ahp->ah_CalSamples = 0;
+}
+
+static inline void
+ath9k_hw_per_calibration(struct ath_hal *ah,
+                         struct ath9k_channel *ichan,
+                         u8 rxchainmask,
+                         struct hal_cal_list *currCal,
+                         bool *isCalDone)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        *isCalDone = false;
+
+        if (currCal->calState == CAL_RUNNING) {
+                if (!(REG_READ(ah,
+                               AR_PHY_TIMING_CTRL4(0)) &
+                      AR_PHY_TIMING_CTRL4_DO_CAL)) {
+
+                        currCal->calData->calCollect(ah);
+
+                        ahp->ah_CalSamples++;
+
+                        if (ahp->ah_CalSamples >=
+                            currCal->calData->calNumSamples) {
+                                int i, numChains = 0;
+                                for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+                                        if (rxchainmask & (1 << i))
+                                                numChains++;
+                                }
+
+                                currCal->calData->calPostProc(ah,
+                                                              numChains);
+
+                                ichan->CalValid |=
+                                        currCal->calData->calType;
+                                currCal->calState = CAL_DONE;
+                                *isCalDone = true;
+                        } else {
+                                ath9k_hw_setup_calibration(ah, currCal);
+                        }
+                }
+        } else if (!(ichan->CalValid & currCal->calData->calType)) {
+                ath9k_hw_reset_calibration(ah, currCal);
+        }
+}
+
+static inline bool ath9k_hw_run_init_cals(struct ath_hal *ah,
+                                          int init_cal_count)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_channel ichan;
+        bool isCalDone;
+        struct hal_cal_list *currCal = ahp->ah_cal_list_curr;
+        const struct hal_percal_data *calData = currCal->calData;
+        int i;
+
+        if (currCal == NULL)
+                return false;
+
+        ichan.CalValid = 0;
+
+        for (i = 0; i < init_cal_count; i++) {
+                ath9k_hw_reset_calibration(ah, currCal);
+
+                if (!ath9k_hw_wait(ah, AR_PHY_TIMING_CTRL4(0),
+                                   AR_PHY_TIMING_CTRL4_DO_CAL, 0)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "%s: Cal %d failed to complete in 100ms.\n",
+                                 __func__, calData->calType);
+
+                        ahp->ah_cal_list = ahp->ah_cal_list_last =
+                                ahp->ah_cal_list_curr = NULL;
+                        return false;
+                }
+
+                ath9k_hw_per_calibration(ah, &ichan, ahp->ah_rxchainmask,
+                                         currCal, &isCalDone);
+                if (!isCalDone) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "%s: Not able to run Init Cal %d.\n",
+                                 __func__, calData->calType);
+                }
+                if (currCal->calNext) {
+                        currCal = currCal->calNext;
+                        calData = currCal->calData;
+                }
+        }
+
+        ahp->ah_cal_list = ahp->ah_cal_list_last = ahp->ah_cal_list_curr = NULL;
+        return true;
+}
+
+static inline bool
+ath9k_hw_channel_change(struct ath_hal *ah,
+                        struct ath9k_channel *chan,
+                        enum ath9k_ht_macmode macmode)
+{
+        u32 synthDelay, qnum;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
+                if (ath9k_hw_numtxpending(ah, qnum)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
+                                 "%s: Transmit frames pending on queue %d\n",
+                                 __func__, qnum);
+                        return false;
+                }
+        }
+
+        REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);
+        if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
+                           AR_PHY_RFBUS_GRANT_EN)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
+                         "%s: Could not kill baseband RX\n", __func__);
+                return false;
+        }
+
+        ath9k_hw_set_regs(ah, chan, macmode);
+
+        if (AR_SREV_9280_10_OR_LATER(ah)) {
+                if (!(ath9k_hw_ar9280_set_channel(ah, chan))) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                                 "%s: failed to set channel\n", __func__);
+                        return false;
+                }
+        } else {
+                if (!(ath9k_hw_set_channel(ah, chan))) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                                 "%s: failed to set channel\n", __func__);
+                        return false;
+                }
+        }
+
+        if (ath9k_hw_set_txpower(ah, &ahp->ah_eeprom, chan,
+                                 ath9k_regd_get_ctl(ah, chan),
+                                 ath9k_regd_get_antenna_allowed(ah, chan),
+                                 chan->maxRegTxPower * 2,
+                                 min((u32) MAX_RATE_POWER,
+                                     (u32) ah->ah_powerLimit)) != 0) {
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                         "%s: error init'ing transmit power\n", __func__);
+                return false;
+        }
+
+        synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
+        if (IS_CHAN_CCK(chan))
+                synthDelay = (4 * synthDelay) / 22;
+        else
+                synthDelay /= 10;
+
+        udelay(synthDelay + BASE_ACTIVATE_DELAY);
+
+        REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
+
+        if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
+                ath9k_hw_set_delta_slope(ah, chan);
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                ath9k_hw_9280_spur_mitigate(ah, chan);
+        else
+                ath9k_hw_spur_mitigate(ah, chan);
+
+        if (!chan->oneTimeCalsDone)
+                chan->oneTimeCalsDone = true;
+
+        return true;
+}
+
+static bool ath9k_hw_chip_reset(struct ath_hal *ah,
+                                struct ath9k_channel *chan)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM))
+                return false;
+
+        if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
+                return false;
+
+        ahp->ah_chipFullSleep = false;
+
+        ath9k_hw_init_pll(ah, chan);
+
+        ath9k_hw_set_rfmode(ah, chan);
+
+        return true;
+}
+
+static inline void ath9k_hw_set_dma(struct ath_hal *ah)
+{
+        u32 regval;
+
+        regval = REG_READ(ah, AR_AHB_MODE);
+        REG_WRITE(ah, AR_AHB_MODE, regval | AR_AHB_PREFETCH_RD_EN);
+
+        regval = REG_READ(ah, AR_TXCFG) & ~AR_TXCFG_DMASZ_MASK;
+        REG_WRITE(ah, AR_TXCFG, regval | AR_TXCFG_DMASZ_128B);
+
+        REG_RMW_FIELD(ah, AR_TXCFG, AR_FTRIG, ah->ah_txTrigLevel);
+
+        regval = REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_DMASZ_MASK;
+        REG_WRITE(ah, AR_RXCFG, regval | AR_RXCFG_DMASZ_128B);
+
+        REG_WRITE(ah, AR_RXFIFO_CFG, 0x200);
+
+        if (AR_SREV_9285(ah)) {
+                REG_WRITE(ah, AR_PCU_TXBUF_CTRL,
+                          AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE);
+        } else {
+                REG_WRITE(ah, AR_PCU_TXBUF_CTRL,
+                          AR_PCU_TXBUF_CTRL_USABLE_SIZE);
+        }
+}
+
+bool ath9k_hw_stopdmarecv(struct ath_hal *ah)
+{
+        REG_WRITE(ah, AR_CR, AR_CR_RXD);
+        if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
+                        "%s: dma failed to stop in 10ms\n"
+                        "AR_CR=0x%08x\nAR_DIAG_SW=0x%08x\n",
+                        __func__,
+                        REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
+                return false;
+        } else {
+                return true;
+        }
+}
+
+void ath9k_hw_startpcureceive(struct ath_hal *ah)
+{
+        REG_CLR_BIT(ah, AR_DIAG_SW,
+                    (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
+
+        ath9k_enable_mib_counters(ah);
+
+        ath9k_ani_reset(ah);
+}
+
+void ath9k_hw_stoppcurecv(struct ath_hal *ah)
+{
+        REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
+
+        ath9k_hw_disable_mib_counters(ah);
+}
+
+static bool ath9k_hw_iscal_supported(struct ath_hal *ah,
+                                     struct ath9k_channel *chan,
+                                     enum hal_cal_types calType)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        bool retval = false;
+
+        switch (calType & ahp->ah_suppCals) {
+        case IQ_MISMATCH_CAL:
+                if (!IS_CHAN_B(chan))
+                        retval = true;
+                break;
+        case ADC_GAIN_CAL:
+        case ADC_DC_CAL:
+                if (!IS_CHAN_B(chan)
+                    && !(IS_CHAN_2GHZ(chan) && IS_CHAN_HT20(chan)))
+                        retval = true;
+                break;
+        }
+
+        return retval;
+}
+
+static inline bool ath9k_hw_init_cal(struct ath_hal *ah,
+                                     struct ath9k_channel *chan)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_channel *ichan =
+                ath9k_regd_check_channel(ah, chan);
+
+        REG_WRITE(ah, AR_PHY_AGC_CONTROL,
+                  REG_READ(ah, AR_PHY_AGC_CONTROL) |
+                  AR_PHY_AGC_CONTROL_CAL);
+
+        if (!ath9k_hw_wait
+            (ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%s: offset calibration failed to complete in 1ms; "
+                         "noisy environment?\n", __func__);
+                return false;
+        }
+
+        REG_WRITE(ah, AR_PHY_AGC_CONTROL,
+                  REG_READ(ah, AR_PHY_AGC_CONTROL) |
+                  AR_PHY_AGC_CONTROL_NF);
+
+        ahp->ah_cal_list = ahp->ah_cal_list_last = ahp->ah_cal_list_curr =
+                NULL;
+
+        if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah)) {
+                if (ath9k_hw_iscal_supported(ah, chan, ADC_GAIN_CAL)) {
+                        INIT_CAL(&ahp->ah_adcGainCalData);
+                        INSERT_CAL(ahp, &ahp->ah_adcGainCalData);
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "%s: enabling ADC Gain Calibration.\n",
+                                 __func__);
+                }
+                if (ath9k_hw_iscal_supported(ah, chan, ADC_DC_CAL)) {
+                        INIT_CAL(&ahp->ah_adcDcCalData);
+                        INSERT_CAL(ahp, &ahp->ah_adcDcCalData);
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "%s: enabling ADC DC Calibration.\n",
+                                 __func__);
+                }
+                if (ath9k_hw_iscal_supported(ah, chan, IQ_MISMATCH_CAL)) {
+                        INIT_CAL(&ahp->ah_iqCalData);
+                        INSERT_CAL(ahp, &ahp->ah_iqCalData);
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "%s: enabling IQ Calibration.\n",
+                                 __func__);
+                }
+
+                ahp->ah_cal_list_curr = ahp->ah_cal_list;
+
+                if (ahp->ah_cal_list_curr)
+                        ath9k_hw_reset_calibration(ah,
+                                                   ahp->ah_cal_list_curr);
+        }
+
+        ichan->CalValid = 0;
+
+        return true;
+}
+
+
+bool ath9k_hw_reset(struct ath_hal *ah, enum ath9k_opmode opmode,
+                    struct ath9k_channel *chan,
+                    enum ath9k_ht_macmode macmode,
+                    u8 txchainmask, u8 rxchainmask,
+                    enum ath9k_ht_extprotspacing extprotspacing,
+                    bool bChannelChange,
+                    int *status)
+{
+#define FAIL(_code)     do { ecode = _code; goto bad; } while (0)
+        u32 saveLedState;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_channel *curchan = ah->ah_curchan;
+        u32 saveDefAntenna;
+        u32 macStaId1;
+        int ecode;
+        int i, rx_chainmask;
+
+        ahp->ah_extprotspacing = extprotspacing;
+        ahp->ah_txchainmask = txchainmask;
+        ahp->ah_rxchainmask = rxchainmask;
+
+        if (AR_SREV_9280(ah)) {
+                ahp->ah_txchainmask &= 0x3;
+                ahp->ah_rxchainmask &= 0x3;
+        }
+
+        if (ath9k_hw_check_chan(ah, chan) == NULL) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                         "%s: invalid channel %u/0x%x; no mapping\n",
+                         __func__, chan->channel, chan->channelFlags);
+                FAIL(-EINVAL);
+        }
+
+        if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
+                return false;
+
+        if (curchan)
+                ath9k_hw_getnf(ah, curchan);
+
+        if (bChannelChange &&
+            (ahp->ah_chipFullSleep != true) &&
+            (ah->ah_curchan != NULL) &&
+            (chan->channel != ah->ah_curchan->channel) &&
+            ((chan->channelFlags & CHANNEL_ALL) ==
+             (ah->ah_curchan->channelFlags & CHANNEL_ALL)) &&
+            (!AR_SREV_9280(ah) || (!IS_CHAN_A_5MHZ_SPACED(chan) &&
+                                   !IS_CHAN_A_5MHZ_SPACED(ah->
+                                                          ah_curchan)))) {
+
+                if (ath9k_hw_channel_change(ah, chan, macmode)) {
+                        ath9k_hw_loadnf(ah, ah->ah_curchan);
+                        ath9k_hw_start_nfcal(ah);
+                        return true;
+                }
+        }
+
+        saveDefAntenna = REG_READ(ah, AR_DEF_ANTENNA);
+        if (saveDefAntenna == 0)
+                saveDefAntenna = 1;
+
+        macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
+
+        saveLedState = REG_READ(ah, AR_CFG_LED) &
+                (AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL |
+                 AR_CFG_LED_BLINK_THRESH_SEL | AR_CFG_LED_BLINK_SLOW);
+
+        ath9k_hw_mark_phy_inactive(ah);
+
+        if (!ath9k_hw_chip_reset(ah, chan)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: chip reset failed\n",
+                         __func__);
+                FAIL(-EIO);
+        }
+
+        if (AR_SREV_9280(ah)) {
+                REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
+                            AR_GPIO_JTAG_DISABLE);
+
+                if (test_bit(ATH9K_MODE_11A, ah->ah_caps.wireless_modes)) {
+                        if (IS_CHAN_5GHZ(chan))
+                                ath9k_hw_set_gpio(ah, 9, 0);
+                        else
+                                ath9k_hw_set_gpio(ah, 9, 1);
+                }
+                ath9k_hw_cfg_output(ah, 9, ATH9K_GPIO_OUTPUT_MUX_AS_OUTPUT);
+        }
+
+        ecode = ath9k_hw_process_ini(ah, chan, macmode);
+        if (ecode != 0)
+                goto bad;
+
+        if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
+                ath9k_hw_set_delta_slope(ah, chan);
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                ath9k_hw_9280_spur_mitigate(ah, chan);
+        else
+                ath9k_hw_spur_mitigate(ah, chan);
+
+        if (!ath9k_hw_eeprom_set_board_values(ah, chan)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
+                         "%s: error setting board options\n", __func__);
+                FAIL(-EIO);
+        }
+
+        ath9k_hw_decrease_chain_power(ah, chan);
+
+        REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(ahp->ah_macaddr));
+        REG_WRITE(ah, AR_STA_ID1, get_unaligned_le16(ahp->ah_macaddr + 4)
+                  | macStaId1
+                  | AR_STA_ID1_RTS_USE_DEF
+                  | (ah->ah_config.
+                     ack_6mb ? AR_STA_ID1_ACKCTS_6MB : 0)
+                  | ahp->ah_staId1Defaults);
+        ath9k_hw_set_operating_mode(ah, opmode);
+
+        REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(ahp->ah_bssidmask));
+        REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(ahp->ah_bssidmask + 4));
+
+        REG_WRITE(ah, AR_DEF_ANTENNA, saveDefAntenna);
+
+        REG_WRITE(ah, AR_BSS_ID0, get_unaligned_le32(ahp->ah_bssid));
+        REG_WRITE(ah, AR_BSS_ID1, get_unaligned_le16(ahp->ah_bssid + 4) |
+                  ((ahp->ah_assocId & 0x3fff) << AR_BSS_ID1_AID_S));
+
+        REG_WRITE(ah, AR_ISR, ~0);
+
+        REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
+
+        if (AR_SREV_9280_10_OR_LATER(ah)) {
+                if (!(ath9k_hw_ar9280_set_channel(ah, chan)))
+                        FAIL(-EIO);
+        } else {
+                if (!(ath9k_hw_set_channel(ah, chan)))
+                        FAIL(-EIO);
+        }
+
+        for (i = 0; i < AR_NUM_DCU; i++)
+                REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
+
+        ahp->ah_intrTxqs = 0;
+        for (i = 0; i < ah->ah_caps.total_queues; i++)
+                ath9k_hw_resettxqueue(ah, i);
+
+        ath9k_hw_init_interrupt_masks(ah, opmode);
+        ath9k_hw_init_qos(ah);
+
+        ath9k_hw_init_user_settings(ah);
+
+        ah->ah_opmode = opmode;
+
+        REG_WRITE(ah, AR_STA_ID1,
+                  REG_READ(ah, AR_STA_ID1) | AR_STA_ID1_PRESERVE_SEQNUM);
+
+        ath9k_hw_set_dma(ah);
+
+        REG_WRITE(ah, AR_OBS, 8);
+
+        if (ahp->ah_intrMitigation) {
+
+                REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500);
+                REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000);
+        }
+
+        ath9k_hw_init_bb(ah, chan);
+
+        if (!ath9k_hw_init_cal(ah, chan))
+                FAIL(-ENODEV);
+
+        rx_chainmask = ahp->ah_rxchainmask;
+        if ((rx_chainmask == 0x5) || (rx_chainmask == 0x3)) {
+                REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);
+                REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);
+        }
+
+        REG_WRITE(ah, AR_CFG_LED, saveLedState | AR_CFG_SCLK_32KHZ);
+
+        if (AR_SREV_9100(ah)) {
+                u32 mask;
+                mask = REG_READ(ah, AR_CFG);
+                if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                                 "%s CFG Byte Swap Set 0x%x\n", __func__,
+                                 mask);
+                } else {
+                        mask =
+                                INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB;
+                        REG_WRITE(ah, AR_CFG, mask);
+                        DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                                 "%s Setting CFG 0x%x\n", __func__,
+                                 REG_READ(ah, AR_CFG));
+                }
+        } else {
+#ifdef __BIG_ENDIAN
+                REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD);
+#endif
+        }
+
+        return true;
+bad:
+        if (status)
+                *status = ecode;
+        return false;
+#undef FAIL
+}
+
+bool ath9k_hw_phy_disable(struct ath_hal *ah)
+{
+        return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM);
+}
+
+bool ath9k_hw_disable(struct ath_hal *ah)
+{
+        if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
+                return false;
+
+        return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD);
+}
+
+bool
+ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan,
+                   u8 rxchainmask, bool longcal,
+                   bool *isCalDone)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct hal_cal_list *currCal = ahp->ah_cal_list_curr;
+        struct ath9k_channel *ichan =
+                ath9k_regd_check_channel(ah, chan);
+
+        *isCalDone = true;
+
+        if (ichan == NULL) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                         "%s: invalid channel %u/0x%x; no mapping\n",
+                         __func__, chan->channel, chan->channelFlags);
+                return false;
+        }
+
+        if (currCal &&
+            (currCal->calState == CAL_RUNNING ||
+             currCal->calState == CAL_WAITING)) {
+                ath9k_hw_per_calibration(ah, ichan, rxchainmask, currCal,
+                                         isCalDone);
+                if (*isCalDone) {
+                        ahp->ah_cal_list_curr = currCal = currCal->calNext;
+
+                        if (currCal->calState == CAL_WAITING) {
+                                *isCalDone = false;
+                                ath9k_hw_reset_calibration(ah, currCal);
+                        }
+                }
+        }
+
+        if (longcal) {
+                ath9k_hw_getnf(ah, ichan);
+                ath9k_hw_loadnf(ah, ah->ah_curchan);
+                ath9k_hw_start_nfcal(ah);
+
+                if ((ichan->channelFlags & CHANNEL_CW_INT) != 0) {
+
+                        chan->channelFlags |= CHANNEL_CW_INT;
+                        ichan->channelFlags &= ~CHANNEL_CW_INT;
+                }
+        }
+
+        return true;
+}
+
+static void ath9k_hw_iqcal_collect(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int i;
+
+        for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+                ahp->ah_totalPowerMeasI[i] +=
+                        REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
+                ahp->ah_totalPowerMeasQ[i] +=
+                        REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
+                ahp->ah_totalIqCorrMeas[i] +=
+                        (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
+                         ahp->ah_CalSamples, i, ahp->ah_totalPowerMeasI[i],
+                         ahp->ah_totalPowerMeasQ[i],
+                         ahp->ah_totalIqCorrMeas[i]);
+        }
+}
+
+static void ath9k_hw_adc_gaincal_collect(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int i;
+
+        for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+                ahp->ah_totalAdcIOddPhase[i] +=
+                        REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
+                ahp->ah_totalAdcIEvenPhase[i] +=
+                        REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
+                ahp->ah_totalAdcQOddPhase[i] +=
+                        REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
+                ahp->ah_totalAdcQEvenPhase[i] +=
+                        REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                        "%d: Chn %d oddi=0x%08x; eveni=0x%08x; "
+                        "oddq=0x%08x; evenq=0x%08x;\n",
+                         ahp->ah_CalSamples, i,
+                         ahp->ah_totalAdcIOddPhase[i],
+                         ahp->ah_totalAdcIEvenPhase[i],
+                         ahp->ah_totalAdcQOddPhase[i],
+                         ahp->ah_totalAdcQEvenPhase[i]);
+        }
+}
+
+static void ath9k_hw_adc_dccal_collect(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int i;
+
+        for (i = 0; i < AR5416_MAX_CHAINS; i++) {
+                ahp->ah_totalAdcDcOffsetIOddPhase[i] +=
+                        (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
+                ahp->ah_totalAdcDcOffsetIEvenPhase[i] +=
+                        (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
+                ahp->ah_totalAdcDcOffsetQOddPhase[i] +=
+                        (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
+                ahp->ah_totalAdcDcOffsetQEvenPhase[i] +=
+                        (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                        "%d: Chn %d oddi=0x%08x; eveni=0x%08x; "
+                        "oddq=0x%08x; evenq=0x%08x;\n",
+                         ahp->ah_CalSamples, i,
+                         ahp->ah_totalAdcDcOffsetIOddPhase[i],
+                         ahp->ah_totalAdcDcOffsetIEvenPhase[i],
+                         ahp->ah_totalAdcDcOffsetQOddPhase[i],
+                         ahp->ah_totalAdcDcOffsetQEvenPhase[i]);
+        }
+}
+
+static void ath9k_hw_iqcalibrate(struct ath_hal *ah, u8 numChains)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 powerMeasQ, powerMeasI, iqCorrMeas;
+        u32 qCoffDenom, iCoffDenom;
+        int32_t qCoff, iCoff;
+        int iqCorrNeg, i;
+
+        for (i = 0; i < numChains; i++) {
+                powerMeasI = ahp->ah_totalPowerMeasI[i];
+                powerMeasQ = ahp->ah_totalPowerMeasQ[i];
+                iqCorrMeas = ahp->ah_totalIqCorrMeas[i];
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Starting IQ Cal and Correction for Chain %d\n",
+                         i);
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Orignal: Chn %diq_corr_meas = 0x%08x\n",
+                         i, ahp->ah_totalIqCorrMeas[i]);
+
+                iqCorrNeg = 0;
+
+
+                if (iqCorrMeas > 0x80000000) {
+                        iqCorrMeas = (0xffffffff - iqCorrMeas) + 1;
+                        iqCorrNeg = 1;
+                }
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n",
+                         iqCorrNeg);
+
+                iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 128;
+                qCoffDenom = powerMeasQ / 64;
+
+                if (powerMeasQ != 0) {
+
+                        iCoff = iqCorrMeas / iCoffDenom;
+                        qCoff = powerMeasI / qCoffDenom - 64;
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "Chn %d iCoff = 0x%08x\n", i, iCoff);
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "Chn %d qCoff = 0x%08x\n", i, qCoff);
+
+
+                        iCoff = iCoff & 0x3f;
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "New: Chn %d iCoff = 0x%08x\n", i, iCoff);
+                        if (iqCorrNeg == 0x0)
+                                iCoff = 0x40 - iCoff;
+
+                        if (qCoff > 15)
+                                qCoff = 15;
+                        else if (qCoff <= -16)
+                                qCoff = 16;
+
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "Chn %d : iCoff = 0x%x  qCoff = 0x%x\n",
+                                i, iCoff, qCoff);
+
+                        REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
+                                      AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,
+                                      iCoff);
+                        REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
+                                      AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,
+                                      qCoff);
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                "IQ Cal and Correction done for Chain %d\n",
+                                i);
+                }
+        }
+
+        REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
+                    AR_PHY_TIMING_CTRL4_IQCORR_ENABLE);
+}
+
+static void
+ath9k_hw_adc_gaincal_calibrate(struct ath_hal *ah, u8 numChains)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 iOddMeasOffset, iEvenMeasOffset, qOddMeasOffset,
+                qEvenMeasOffset;
+        u32 qGainMismatch, iGainMismatch, val, i;
+
+        for (i = 0; i < numChains; i++) {
+                iOddMeasOffset = ahp->ah_totalAdcIOddPhase[i];
+                iEvenMeasOffset = ahp->ah_totalAdcIEvenPhase[i];
+                qOddMeasOffset = ahp->ah_totalAdcQOddPhase[i];
+                qEvenMeasOffset = ahp->ah_totalAdcQEvenPhase[i];
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Starting ADC Gain Cal for Chain %d\n", i);
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_odd_i = 0x%08x\n", i,
+                         iOddMeasOffset);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_even_i = 0x%08x\n", i,
+                         iEvenMeasOffset);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_odd_q = 0x%08x\n", i,
+                         qOddMeasOffset);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_even_q = 0x%08x\n", i,
+                         qEvenMeasOffset);
+
+                if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) {
+                        iGainMismatch =
+                                ((iEvenMeasOffset * 32) /
+                                 iOddMeasOffset) & 0x3f;
+                        qGainMismatch =
+                                ((qOddMeasOffset * 32) /
+                                 qEvenMeasOffset) & 0x3f;
+
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "Chn %d gain_mismatch_i = 0x%08x\n", i,
+                                 iGainMismatch);
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "Chn %d gain_mismatch_q = 0x%08x\n", i,
+                                 qGainMismatch);
+
+                        val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
+                        val &= 0xfffff000;
+                        val |= (qGainMismatch) | (iGainMismatch << 6);
+                        REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
+
+                        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                                 "ADC Gain Cal done for Chain %d\n", i);
+                }
+        }
+
+        REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),
+                  REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0)) |
+                  AR_PHY_NEW_ADC_GAIN_CORR_ENABLE);
+}
+
+static void
+ath9k_hw_adc_dccal_calibrate(struct ath_hal *ah, u8 numChains)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 iOddMeasOffset, iEvenMeasOffset, val, i;
+        int32_t qOddMeasOffset, qEvenMeasOffset, qDcMismatch, iDcMismatch;
+        const struct hal_percal_data *calData =
+                ahp->ah_cal_list_curr->calData;
+        u32 numSamples =
+                (1 << (calData->calCountMax + 5)) * calData->calNumSamples;
+
+        for (i = 0; i < numChains; i++) {
+                iOddMeasOffset = ahp->ah_totalAdcDcOffsetIOddPhase[i];
+                iEvenMeasOffset = ahp->ah_totalAdcDcOffsetIEvenPhase[i];
+                qOddMeasOffset = ahp->ah_totalAdcDcOffsetQOddPhase[i];
+                qEvenMeasOffset = ahp->ah_totalAdcDcOffsetQEvenPhase[i];
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Starting ADC DC Offset Cal for Chain %d\n", i);
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_odd_i = %d\n", i,
+                         iOddMeasOffset);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_even_i = %d\n", i,
+                         iEvenMeasOffset);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_odd_q = %d\n", i,
+                         qOddMeasOffset);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d pwr_meas_even_q = %d\n", i,
+                         qEvenMeasOffset);
+
+                iDcMismatch = (((iEvenMeasOffset - iOddMeasOffset) * 2) /
+                               numSamples) & 0x1ff;
+                qDcMismatch = (((qOddMeasOffset - qEvenMeasOffset) * 2) /
+                               numSamples) & 0x1ff;
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d dc_offset_mismatch_i = 0x%08x\n", i,
+                         iDcMismatch);
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "Chn %d dc_offset_mismatch_q = 0x%08x\n", i,
+                         qDcMismatch);
+
+                val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
+                val &= 0xc0000fff;
+                val |= (qDcMismatch << 12) | (iDcMismatch << 21);
+                REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
+
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "ADC DC Offset Cal done for Chain %d\n", i);
+        }
+
+        REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),
+                  REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0)) |
+                  AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE);
+}
+
+bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_channel *chan = ah->ah_curchan;
+
+        ah->ah_powerLimit = min(limit, (u32) MAX_RATE_POWER);
+
+        if (ath9k_hw_set_txpower(ah, &ahp->ah_eeprom, chan,
+                                 ath9k_regd_get_ctl(ah, chan),
+                                 ath9k_regd_get_antenna_allowed(ah,
+                                                                chan),
+                                 chan->maxRegTxPower * 2,
+                                 min((u32) MAX_RATE_POWER,
+                                     (u32) ah->ah_powerLimit)) != 0)
+                return false;
+
+        return true;
+}
+
+void
+ath9k_hw_get_channel_centers(struct ath_hal *ah,
+                             struct ath9k_channel *chan,
+                             struct chan_centers *centers)
+{
+        int8_t extoff;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (!IS_CHAN_HT40(chan)) {
+                centers->ctl_center = centers->ext_center =
+                        centers->synth_center = chan->channel;
+                return;
+        }
+
+        if ((chan->chanmode == CHANNEL_A_HT40PLUS) ||
+            (chan->chanmode == CHANNEL_G_HT40PLUS)) {
+                centers->synth_center =
+                        chan->channel + HT40_CHANNEL_CENTER_SHIFT;
+                extoff = 1;
+        } else {
+                centers->synth_center =
+                        chan->channel - HT40_CHANNEL_CENTER_SHIFT;
+                extoff = -1;
+        }
+
+        centers->ctl_center = centers->synth_center - (extoff *
+                HT40_CHANNEL_CENTER_SHIFT);
+        centers->ext_center = centers->synth_center + (extoff *
+                ((ahp->
+                ah_extprotspacing
+                ==
+                ATH9K_HT_EXTPROTSPACING_20)
+                ?
+                HT40_CHANNEL_CENTER_SHIFT
+                : 15));
+
+}
+
+void
+ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan,
+                        bool *isCalDone)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_channel *ichan =
+                ath9k_regd_check_channel(ah, chan);
+        struct hal_cal_list *currCal = ahp->ah_cal_list_curr;
+
+        *isCalDone = true;
+
+        if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
+                return;
+
+        if (currCal == NULL)
+                return;
+
+        if (ichan == NULL) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%s: invalid channel %u/0x%x; no mapping\n",
+                         __func__, chan->channel, chan->channelFlags);
+                return;
+        }
+
+
+        if (currCal->calState != CAL_DONE) {
+                DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                         "%s: Calibration state incorrect, %d\n",
+                         __func__, currCal->calState);
+                return;
+        }
+
+
+        if (!ath9k_hw_iscal_supported(ah, chan, currCal->calData->calType))
+                return;
+
+        DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
+                 "%s: Resetting Cal %d state for channel %u/0x%x\n",
+                 __func__, currCal->calData->calType, chan->channel,
+                 chan->channelFlags);
+
+        ichan->CalValid &= ~currCal->calData->calType;
+        currCal->calState = CAL_WAITING;
+
+        *isCalDone = false;
+}
+
+void ath9k_hw_getmac(struct ath_hal *ah, u8 *mac)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        memcpy(mac, ahp->ah_macaddr, ETH_ALEN);
+}
+
+bool ath9k_hw_setmac(struct ath_hal *ah, const u8 *mac)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        memcpy(ahp->ah_macaddr, mac, ETH_ALEN);
+        return true;
+}
+
+void ath9k_hw_getbssidmask(struct ath_hal *ah, u8 *mask)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        memcpy(mask, ahp->ah_bssidmask, ETH_ALEN);
+}
+
+bool
+ath9k_hw_setbssidmask(struct ath_hal *ah, const u8 *mask)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        memcpy(ahp->ah_bssidmask, mask, ETH_ALEN);
+
+        REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(ahp->ah_bssidmask));
+        REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(ahp->ah_bssidmask + 4));
+
+        return true;
+}
+
+#ifdef CONFIG_ATH9K_RFKILL
+static void ath9k_enable_rfkill(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
+                    AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
+
+        REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
+                    AR_GPIO_INPUT_MUX2_RFSILENT);
+
+        ath9k_hw_cfg_gpio_input(ah, ahp->ah_gpioSelect);
+        REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
+
+        if (ahp->ah_gpioBit == ath9k_hw_gpio_get(ah, ahp->ah_gpioSelect)) {
+
+                ath9k_hw_set_gpio_intr(ah, ahp->ah_gpioSelect,
+                                       !ahp->ah_gpioBit);
+        } else {
+                ath9k_hw_set_gpio_intr(ah, ahp->ah_gpioSelect,
+                                       ahp->ah_gpioBit);
+        }
+}
+#endif
+
+void
+ath9k_hw_write_associd(struct ath_hal *ah, const u8 *bssid,
+                       u16 assocId)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        memcpy(ahp->ah_bssid, bssid, ETH_ALEN);
+        ahp->ah_assocId = assocId;
+
+        REG_WRITE(ah, AR_BSS_ID0, get_unaligned_le32(ahp->ah_bssid));
+        REG_WRITE(ah, AR_BSS_ID1, get_unaligned_le16(ahp->ah_bssid + 4) |
+                  ((assocId & 0x3fff) << AR_BSS_ID1_AID_S));
+}
+
+u64 ath9k_hw_gettsf64(struct ath_hal *ah)
+{
+        u64 tsf;
+
+        tsf = REG_READ(ah, AR_TSF_U32);
+        tsf = (tsf << 32) | REG_READ(ah, AR_TSF_L32);
+        return tsf;
+}
+
+void ath9k_hw_reset_tsf(struct ath_hal *ah)
+{
+        int count;
+
+        count = 0;
+        while (REG_READ(ah, AR_SLP32_MODE) & AR_SLP32_TSF_WRITE_STATUS) {
+                count++;
+                if (count > 10) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+                         "%s: AR_SLP32_TSF_WRITE_STATUS limit exceeded\n",
+                                 __func__);
+                        break;
+                }
+                udelay(10);
+        }
+        REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE);
+}
+
+u32 ath9k_hw_getdefantenna(struct ath_hal *ah)
+{
+        return REG_READ(ah, AR_DEF_ANTENNA) & 0x7;
+}
+
+void ath9k_hw_setantenna(struct ath_hal *ah, u32 antenna)
+{
+        REG_WRITE(ah, AR_DEF_ANTENNA, (antenna & 0x7));
+}
+
+bool
+ath9k_hw_setantennaswitch(struct ath_hal *ah,
+                          enum ath9k_ant_setting settings,
+                          struct ath9k_channel *chan,
+                          u8 *tx_chainmask,
+                          u8 *rx_chainmask,
+                          u8 *antenna_cfgd)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        static u8 tx_chainmask_cfg, rx_chainmask_cfg;
+
+        if (AR_SREV_9280(ah)) {
+                if (!tx_chainmask_cfg) {
+
+                        tx_chainmask_cfg = *tx_chainmask;
+                        rx_chainmask_cfg = *rx_chainmask;
+                }
+
+                switch (settings) {
+                case ATH9K_ANT_FIXED_A:
+                        *tx_chainmask = ATH9K_ANTENNA0_CHAINMASK;
+                        *rx_chainmask = ATH9K_ANTENNA0_CHAINMASK;
+                        *antenna_cfgd = true;
+                        break;
+                case ATH9K_ANT_FIXED_B:
+                        if (ah->ah_caps.tx_chainmask >
+                            ATH9K_ANTENNA1_CHAINMASK) {
+                                *tx_chainmask = ATH9K_ANTENNA1_CHAINMASK;
+                        }
+                        *rx_chainmask = ATH9K_ANTENNA1_CHAINMASK;
+                        *antenna_cfgd = true;
+                        break;
+                case ATH9K_ANT_VARIABLE:
+                        *tx_chainmask = tx_chainmask_cfg;
+                        *rx_chainmask = rx_chainmask_cfg;
+                        *antenna_cfgd = true;
+                        break;
+                default:
+                        break;
+                }
+        } else {
+                ahp->ah_diversityControl = settings;
+        }
+
+        return true;
+}
+
+void ath9k_hw_setopmode(struct ath_hal *ah)
+{
+        ath9k_hw_set_operating_mode(ah, ah->ah_opmode);
+}
+
+bool
+ath9k_hw_getcapability(struct ath_hal *ah, enum ath9k_capability_type type,
+                       u32 capability, u32 *result)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        const struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+
+        switch (type) {
+        case ATH9K_CAP_CIPHER:
+                switch (capability) {
+                case ATH9K_CIPHER_AES_CCM:
+                case ATH9K_CIPHER_AES_OCB:
+                case ATH9K_CIPHER_TKIP:
+                case ATH9K_CIPHER_WEP:
+                case ATH9K_CIPHER_MIC:
+                case ATH9K_CIPHER_CLR:
+                        return true;
+                default:
+                        return false;
+                }
+        case ATH9K_CAP_TKIP_MIC:
+                switch (capability) {
+                case 0:
+                        return true;
+                case 1:
+                        return (ahp->ah_staId1Defaults &
+                                AR_STA_ID1_CRPT_MIC_ENABLE) ? true :
+                        false;
+                }
+        case ATH9K_CAP_TKIP_SPLIT:
+                return (ahp->ah_miscMode & AR_PCU_MIC_NEW_LOC_ENA) ?
+                        false : true;
+        case ATH9K_CAP_WME_TKIPMIC:
+                return 0;
+        case ATH9K_CAP_PHYCOUNTERS:
+                return ahp->ah_hasHwPhyCounters ? 0 : -ENXIO;
+        case ATH9K_CAP_DIVERSITY:
+                return (REG_READ(ah, AR_PHY_CCK_DETECT) &
+                        AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV) ?
+                        true : false;
+        case ATH9K_CAP_PHYDIAG:
+                return true;
+        case ATH9K_CAP_MCAST_KEYSRCH:
+                switch (capability) {
+                case 0:
+                        return true;
+                case 1:
+                        if (REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_ADHOC) {
+                                return false;
+                        } else {
+                                return (ahp->ah_staId1Defaults &
+                                        AR_STA_ID1_MCAST_KSRCH) ? true :
+                                        false;
+                        }
+                }
+                return false;
+        case ATH9K_CAP_TSF_ADJUST:
+                return (ahp->ah_miscMode & AR_PCU_TX_ADD_TSF) ?
+                        true : false;
+        case ATH9K_CAP_RFSILENT:
+                if (capability == 3)
+                        return false;
+        case ATH9K_CAP_ANT_CFG_2GHZ:
+                *result = pCap->num_antcfg_2ghz;
+                return true;
+        case ATH9K_CAP_ANT_CFG_5GHZ:
+                *result = pCap->num_antcfg_5ghz;
+                return true;
+        case ATH9K_CAP_TXPOW:
+                switch (capability) {
+                case 0:
+                        return 0;
+                case 1:
+                        *result = ah->ah_powerLimit;
+                        return 0;
+                case 2:
+                        *result = ah->ah_maxPowerLevel;
+                        return 0;
+                case 3:
+                        *result = ah->ah_tpScale;
+                        return 0;
+                }
+                return false;
+        default:
+                return false;
+        }
+}
+
+int
+ath9k_hw_select_antconfig(struct ath_hal *ah, u32 cfg)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_channel *chan = ah->ah_curchan;
+        const struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        u16 ant_config;
+        u32 halNumAntConfig;
+
+        halNumAntConfig =
+                IS_CHAN_2GHZ(chan) ? pCap->num_antcfg_2ghz : pCap->
+                num_antcfg_5ghz;
+
+        if (cfg < halNumAntConfig) {
+                if (!ath9k_hw_get_eeprom_antenna_cfg(ahp, chan,
+                                                     cfg, &ant_config)) {
+                        REG_WRITE(ah, AR_PHY_SWITCH_COM, ant_config);
+                        return 0;
+                }
+        }
+
+        return -EINVAL;
+}
+
+bool ath9k_hw_intrpend(struct ath_hal *ah)
+{
+        u32 host_isr;
+
+        if (AR_SREV_9100(ah))
+                return true;
+
+        host_isr = REG_READ(ah, AR_INTR_ASYNC_CAUSE);
+        if ((host_isr & AR_INTR_MAC_IRQ) && (host_isr != AR_INTR_SPURIOUS))
+                return true;
+
+        host_isr = REG_READ(ah, AR_INTR_SYNC_CAUSE);
+        if ((host_isr & AR_INTR_SYNC_DEFAULT)
+            && (host_isr != AR_INTR_SPURIOUS))
+                return true;
+
+        return false;
+}
+
+bool ath9k_hw_getisr(struct ath_hal *ah, enum ath9k_int *masked)
+{
+        u32 isr = 0;
+        u32 mask2 = 0;
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        u32 sync_cause = 0;
+        bool fatal_int = false;
+
+        if (!AR_SREV_9100(ah)) {
+                if (REG_READ(ah, AR_INTR_ASYNC_CAUSE) & AR_INTR_MAC_IRQ) {
+                        if ((REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M)
+                            == AR_RTC_STATUS_ON) {
+                                isr = REG_READ(ah, AR_ISR);
+                        }
+                }
+
+                sync_cause =
+                        REG_READ(ah,
+                                 AR_INTR_SYNC_CAUSE) & AR_INTR_SYNC_DEFAULT;
+
+                *masked = 0;
+
+                if (!isr && !sync_cause)
+                        return false;
+        } else {
+                *masked = 0;
+                isr = REG_READ(ah, AR_ISR);
+        }
+
+        if (isr) {
+                struct ath_hal_5416 *ahp = AH5416(ah);
+
+                if (isr & AR_ISR_BCNMISC) {
+                        u32 isr2;
+                        isr2 = REG_READ(ah, AR_ISR_S2);
+                        if (isr2 & AR_ISR_S2_TIM)
+                                mask2 |= ATH9K_INT_TIM;
+                        if (isr2 & AR_ISR_S2_DTIM)
+                                mask2 |= ATH9K_INT_DTIM;
+                        if (isr2 & AR_ISR_S2_DTIMSYNC)
+                                mask2 |= ATH9K_INT_DTIMSYNC;
+                        if (isr2 & (AR_ISR_S2_CABEND))
+                                mask2 |= ATH9K_INT_CABEND;
+                        if (isr2 & AR_ISR_S2_GTT)
+                                mask2 |= ATH9K_INT_GTT;
+                        if (isr2 & AR_ISR_S2_CST)
+                                mask2 |= ATH9K_INT_CST;
+                }
+
+                isr = REG_READ(ah, AR_ISR_RAC);
+                if (isr == 0xffffffff) {
+                        *masked = 0;
+                        return false;
+                }
+
+                *masked = isr & ATH9K_INT_COMMON;
+
+                if (ahp->ah_intrMitigation) {
+
+                        if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM))
+                                *masked |= ATH9K_INT_RX;
+                }
+
+                if (isr & (AR_ISR_RXOK | AR_ISR_RXERR))
+                        *masked |= ATH9K_INT_RX;
+                if (isr &
+                    (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR |
+                     AR_ISR_TXEOL)) {
+                        u32 s0_s, s1_s;
+
+                        *masked |= ATH9K_INT_TX;
+
+                        s0_s = REG_READ(ah, AR_ISR_S0_S);
+                        ahp->ah_intrTxqs |= MS(s0_s, AR_ISR_S0_QCU_TXOK);
+                        ahp->ah_intrTxqs |= MS(s0_s, AR_ISR_S0_QCU_TXDESC);
+
+                        s1_s = REG_READ(ah, AR_ISR_S1_S);
+                        ahp->ah_intrTxqs |= MS(s1_s, AR_ISR_S1_QCU_TXERR);
+                        ahp->ah_intrTxqs |= MS(s1_s, AR_ISR_S1_QCU_TXEOL);
+                }
+
+                if (isr & AR_ISR_RXORN) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
+                                 "%s: receive FIFO overrun interrupt\n",
+                                 __func__);
+                }
+
+                if (!AR_SREV_9100(ah)) {
+                        if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
+                                u32 isr5 = REG_READ(ah, AR_ISR_S5_S);
+                                if (isr5 & AR_ISR_S5_TIM_TIMER)
+                                        *masked |= ATH9K_INT_TIM_TIMER;
+                        }
+                }
+
+                *masked |= mask2;
+        }
+        if (AR_SREV_9100(ah))
+                return true;
+        if (sync_cause) {
+                fatal_int =
+                        (sync_cause &
+                         (AR_INTR_SYNC_HOST1_FATAL | AR_INTR_SYNC_HOST1_PERR))
+                        ? true : false;
+
+                if (fatal_int) {
+                        if (sync_cause & AR_INTR_SYNC_HOST1_FATAL) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_ANY,
+                                         "%s: received PCI FATAL interrupt\n",
+                                         __func__);
+                        }
+                        if (sync_cause & AR_INTR_SYNC_HOST1_PERR) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_ANY,
+                                         "%s: received PCI PERR interrupt\n",
+                                         __func__);
+                        }
+                }
+                if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
+                                 "%s: AR_INTR_SYNC_RADM_CPL_TIMEOUT\n",
+                                 __func__);
+                        REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);
+                        REG_WRITE(ah, AR_RC, 0);
+                        *masked |= ATH9K_INT_FATAL;
+                }
+                if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
+                                 "%s: AR_INTR_SYNC_LOCAL_TIMEOUT\n",
+                                 __func__);
+                }
+
+                REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);
+                (void) REG_READ(ah, AR_INTR_SYNC_CAUSE_CLR);
+        }
+        return true;
+}
+
+enum ath9k_int ath9k_hw_intrget(struct ath_hal *ah)
+{
+        return AH5416(ah)->ah_maskReg;
+}
+
+enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 omask = ahp->ah_maskReg;
+        u32 mask, mask2;
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+
+        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: 0x%x => 0x%x\n", __func__,
+                 omask, ints);
+
+        if (omask & ATH9K_INT_GLOBAL) {
+                DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: disable IER\n",
+                         __func__);
+                REG_WRITE(ah, AR_IER, AR_IER_DISABLE);
+                (void) REG_READ(ah, AR_IER);
+                if (!AR_SREV_9100(ah)) {
+                        REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, 0);
+                        (void) REG_READ(ah, AR_INTR_ASYNC_ENABLE);
+
+                        REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);
+                        (void) REG_READ(ah, AR_INTR_SYNC_ENABLE);
+                }
+        }
+
+        mask = ints & ATH9K_INT_COMMON;
+        mask2 = 0;
+
+        if (ints & ATH9K_INT_TX) {
+                if (ahp->ah_txOkInterruptMask)
+                        mask |= AR_IMR_TXOK;
+                if (ahp->ah_txDescInterruptMask)
+                        mask |= AR_IMR_TXDESC;
+                if (ahp->ah_txErrInterruptMask)
+                        mask |= AR_IMR_TXERR;
+                if (ahp->ah_txEolInterruptMask)
+                        mask |= AR_IMR_TXEOL;
+        }
+        if (ints & ATH9K_INT_RX) {
+                mask |= AR_IMR_RXERR;
+                if (ahp->ah_intrMitigation)
+                        mask |= AR_IMR_RXMINTR | AR_IMR_RXINTM;
+                else
+                        mask |= AR_IMR_RXOK | AR_IMR_RXDESC;
+                if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
+                        mask |= AR_IMR_GENTMR;
+        }
+
+        if (ints & (ATH9K_INT_BMISC)) {
+                mask |= AR_IMR_BCNMISC;
+                if (ints & ATH9K_INT_TIM)
+                        mask2 |= AR_IMR_S2_TIM;
+                if (ints & ATH9K_INT_DTIM)
+                        mask2 |= AR_IMR_S2_DTIM;
+                if (ints & ATH9K_INT_DTIMSYNC)
+                        mask2 |= AR_IMR_S2_DTIMSYNC;
+                if (ints & ATH9K_INT_CABEND)
+                        mask2 |= (AR_IMR_S2_CABEND);
+        }
+
+        if (ints & (ATH9K_INT_GTT | ATH9K_INT_CST)) {
+                mask |= AR_IMR_BCNMISC;
+                if (ints & ATH9K_INT_GTT)
+                        mask2 |= AR_IMR_S2_GTT;
+                if (ints & ATH9K_INT_CST)
+                        mask2 |= AR_IMR_S2_CST;
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: new IMR 0x%x\n", __func__,
+                 mask);
+        REG_WRITE(ah, AR_IMR, mask);
+        mask = REG_READ(ah, AR_IMR_S2) & ~(AR_IMR_S2_TIM |
+                                           AR_IMR_S2_DTIM |
+                                           AR_IMR_S2_DTIMSYNC |
+                                           AR_IMR_S2_CABEND |
+                                           AR_IMR_S2_CABTO |
+                                           AR_IMR_S2_TSFOOR |
+                                           AR_IMR_S2_GTT | AR_IMR_S2_CST);
+        REG_WRITE(ah, AR_IMR_S2, mask | mask2);
+        ahp->ah_maskReg = ints;
+
+        if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
+                if (ints & ATH9K_INT_TIM_TIMER)
+                        REG_SET_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER);
+                else
+                        REG_CLR_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER);
+        }
+
+        if (ints & ATH9K_INT_GLOBAL) {
+                DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: enable IER\n",
+                         __func__);
+                REG_WRITE(ah, AR_IER, AR_IER_ENABLE);
+                if (!AR_SREV_9100(ah)) {
+                        REG_WRITE(ah, AR_INTR_ASYNC_ENABLE,
+                                  AR_INTR_MAC_IRQ);
+                        REG_WRITE(ah, AR_INTR_ASYNC_MASK, AR_INTR_MAC_IRQ);
+
+
+                        REG_WRITE(ah, AR_INTR_SYNC_ENABLE,
+                                  AR_INTR_SYNC_DEFAULT);
+                        REG_WRITE(ah, AR_INTR_SYNC_MASK,
+                                  AR_INTR_SYNC_DEFAULT);
+                }
+                DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "AR_IMR 0x%x IER 0x%x\n",
+                         REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER));
+        }
+
+        return omask;
+}
+
+void
+ath9k_hw_beaconinit(struct ath_hal *ah,
+                    u32 next_beacon, u32 beacon_period)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        int flags = 0;
+
+        ahp->ah_beaconInterval = beacon_period;
+
+        switch (ah->ah_opmode) {
+        case ATH9K_M_STA:
+        case ATH9K_M_MONITOR:
+                REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon));
+                REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff);
+                REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff);
+                flags |= AR_TBTT_TIMER_EN;
+                break;
+        case ATH9K_M_IBSS:
+                REG_SET_BIT(ah, AR_TXCFG,
+                            AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY);
+                REG_WRITE(ah, AR_NEXT_NDP_TIMER,
+                          TU_TO_USEC(next_beacon +
+                                     (ahp->ah_atimWindow ? ahp->
+                                      ah_atimWindow : 1)));
+                flags |= AR_NDP_TIMER_EN;
+        case ATH9K_M_HOSTAP:
+                REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon));
+                REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT,
+                          TU_TO_USEC(next_beacon -
+                                     ah->ah_config.
+                                     dma_beacon_response_time));
+                REG_WRITE(ah, AR_NEXT_SWBA,
+                          TU_TO_USEC(next_beacon -
+                                     ah->ah_config.
+                                     sw_beacon_response_time));
+                flags |=
+                        AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN;
+                break;
+        }
+
+        REG_WRITE(ah, AR_BEACON_PERIOD, TU_TO_USEC(beacon_period));
+        REG_WRITE(ah, AR_DMA_BEACON_PERIOD, TU_TO_USEC(beacon_period));
+        REG_WRITE(ah, AR_SWBA_PERIOD, TU_TO_USEC(beacon_period));
+        REG_WRITE(ah, AR_NDP_PERIOD, TU_TO_USEC(beacon_period));
+
+        beacon_period &= ~ATH9K_BEACON_ENA;
+        if (beacon_period & ATH9K_BEACON_RESET_TSF) {
+                beacon_period &= ~ATH9K_BEACON_RESET_TSF;
+                ath9k_hw_reset_tsf(ah);
+        }
+
+        REG_SET_BIT(ah, AR_TIMER_MODE, flags);
+}
+
+void
+ath9k_hw_set_sta_beacon_timers(struct ath_hal *ah,
+                               const struct ath9k_beacon_state *bs)
+{
+        u32 nextTbtt, beaconintval, dtimperiod, beacontimeout;
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+
+        REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(bs->bs_nexttbtt));
+
+        REG_WRITE(ah, AR_BEACON_PERIOD,
+                  TU_TO_USEC(bs->bs_intval & ATH9K_BEACON_PERIOD));
+        REG_WRITE(ah, AR_DMA_BEACON_PERIOD,
+                  TU_TO_USEC(bs->bs_intval & ATH9K_BEACON_PERIOD));
+
+        REG_RMW_FIELD(ah, AR_RSSI_THR,
+                      AR_RSSI_THR_BM_THR, bs->bs_bmissthreshold);
+
+        beaconintval = bs->bs_intval & ATH9K_BEACON_PERIOD;
+
+        if (bs->bs_sleepduration > beaconintval)
+                beaconintval = bs->bs_sleepduration;
+
+        dtimperiod = bs->bs_dtimperiod;
+        if (bs->bs_sleepduration > dtimperiod)
+                dtimperiod = bs->bs_sleepduration;
+
+        if (beaconintval == dtimperiod)
+                nextTbtt = bs->bs_nextdtim;
+        else
+                nextTbtt = bs->bs_nexttbtt;
+
+        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: next DTIM %d\n", __func__,
+                 bs->bs_nextdtim);
+        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: next beacon %d\n", __func__,
+                 nextTbtt);
+        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: beacon period %d\n", __func__,
+                 beaconintval);
+        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: DTIM period %d\n", __func__,
+                 dtimperiod);
+
+        REG_WRITE(ah, AR_NEXT_DTIM,
+                  TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
+        REG_WRITE(ah, AR_NEXT_TIM, TU_TO_USEC(nextTbtt - SLEEP_SLOP));
+
+        REG_WRITE(ah, AR_SLEEP1,
+                  SM((CAB_TIMEOUT_VAL << 3), AR_SLEEP1_CAB_TIMEOUT)
+                  | AR_SLEEP1_ASSUME_DTIM);
+
+        if (pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)
+                beacontimeout = (BEACON_TIMEOUT_VAL << 3);
+        else
+                beacontimeout = MIN_BEACON_TIMEOUT_VAL;
+
+        REG_WRITE(ah, AR_SLEEP2,
+                  SM(beacontimeout, AR_SLEEP2_BEACON_TIMEOUT));
+
+        REG_WRITE(ah, AR_TIM_PERIOD, TU_TO_USEC(beaconintval));
+        REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));
+
+        REG_SET_BIT(ah, AR_TIMER_MODE,
+                    AR_TBTT_TIMER_EN | AR_TIM_TIMER_EN |
+                    AR_DTIM_TIMER_EN);
+
+}
+
+bool ath9k_hw_keyisvalid(struct ath_hal *ah, u16 entry)
+{
+        if (entry < ah->ah_caps.keycache_size) {
+                u32 val = REG_READ(ah, AR_KEYTABLE_MAC1(entry));
+                if (val & AR_KEYTABLE_VALID)
+                        return true;
+        }
+        return false;
+}
+
+bool ath9k_hw_keyreset(struct ath_hal *ah, u16 entry)
+{
+        u32 keyType;
+
+        if (entry >= ah->ah_caps.keycache_size) {
+                DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
+                         "%s: entry %u out of range\n", __func__, entry);
+                return false;
+        }
+        keyType = REG_READ(ah, AR_KEYTABLE_TYPE(entry));
+
+        REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0);
+        REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0);
+        REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0);
+        REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0);
+        REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0);
+        REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), AR_KEYTABLE_TYPE_CLR);
+        REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0);
+        REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0);
+
+        if (keyType == AR_KEYTABLE_TYPE_TKIP && ATH9K_IS_MIC_ENABLED(ah)) {
+                u16 micentry = entry + 64;
+
+                REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0);
+                REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
+                REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), 0);
+                REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
+
+        }
+
+        if (ah->ah_curchan == NULL)
+                return true;
+
+        return true;
+}
+
+bool
+ath9k_hw_keysetmac(struct ath_hal *ah, u16 entry,
+                   const u8 *mac)
+{
+        u32 macHi, macLo;
+
+        if (entry >= ah->ah_caps.keycache_size) {
+                DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
+                         "%s: entry %u out of range\n", __func__, entry);
+                return false;
+        }
+
+        if (mac != NULL) {
+                macHi = (mac[5] << 8) | mac[4];
+                macLo = (mac[3] << 24) | (mac[2] << 16)
+                        | (mac[1] << 8) | mac[0];
+                macLo >>= 1;
+                macLo |= (macHi & 1) << 31;
+                macHi >>= 1;
+        } else {
+                macLo = macHi = 0;
+        }
+        REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo);
+        REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | AR_KEYTABLE_VALID);
+
+        return true;
+}
+
+bool
+ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
+                            const struct ath9k_keyval *k,
+                            const u8 *mac, int xorKey)
+{
+        const struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        u32 key0, key1, key2, key3, key4;
+        u32 keyType;
+        u32 xorMask = xorKey ?
+                (ATH9K_KEY_XOR << 24 | ATH9K_KEY_XOR << 16 | ATH9K_KEY_XOR << 8
+                 | ATH9K_KEY_XOR) : 0;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (entry >= pCap->keycache_size) {
+                DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
+                         "%s: entry %u out of range\n", __func__, entry);
+                return false;
+        }
+        switch (k->kv_type) {
+        case ATH9K_CIPHER_AES_OCB:
+                keyType = AR_KEYTABLE_TYPE_AES;
+                break;
+        case ATH9K_CIPHER_AES_CCM:
+                if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
+                                 "%s: AES-CCM not supported by "
+                                 "mac rev 0x%x\n", __func__,
+                                 ah->ah_macRev);
+                        return false;
+                }
+                keyType = AR_KEYTABLE_TYPE_CCM;
+                break;
+        case ATH9K_CIPHER_TKIP:
+                keyType = AR_KEYTABLE_TYPE_TKIP;
+                if (ATH9K_IS_MIC_ENABLED(ah)
+                    && entry + 64 >= pCap->keycache_size) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
+                                 "%s: entry %u inappropriate for TKIP\n",
+                                 __func__, entry);
+                        return false;
+                }
+                break;
+        case ATH9K_CIPHER_WEP:
+                if (k->kv_len < 40 / NBBY) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
+                                 "%s: WEP key length %u too small\n",
+                                 __func__, k->kv_len);
+                        return false;
+                }
+                if (k->kv_len <= 40 / NBBY)
+                        keyType = AR_KEYTABLE_TYPE_40;
+                else if (k->kv_len <= 104 / NBBY)
+                        keyType = AR_KEYTABLE_TYPE_104;
+                else
+                        keyType = AR_KEYTABLE_TYPE_128;
+                break;
+        case ATH9K_CIPHER_CLR:
+                keyType = AR_KEYTABLE_TYPE_CLR;
+                break;
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
+                         "%s: cipher %u not supported\n", __func__,
+                         k->kv_type);
+                return false;
+        }
+
+        key0 = get_unaligned_le32(k->kv_val + 0) ^ xorMask;
+        key1 = (get_unaligned_le16(k->kv_val + 4) ^ xorMask) & 0xffff;
+        key2 = get_unaligned_le32(k->kv_val + 6) ^ xorMask;
+        key3 = (get_unaligned_le16(k->kv_val + 10) ^ xorMask) & 0xffff;
+        key4 = get_unaligned_le32(k->kv_val + 12) ^ xorMask;
+        if (k->kv_len <= 104 / NBBY)
+                key4 &= 0xff;
+
+        if (keyType == AR_KEYTABLE_TYPE_TKIP && ATH9K_IS_MIC_ENABLED(ah)) {
+                u16 micentry = entry + 64;
+
+                REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), ~key0);
+                REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), ~key1);
+                REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
+                REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
+                REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
+                REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);
+                (void) ath9k_hw_keysetmac(ah, entry, mac);
+
+                if (ahp->ah_miscMode & AR_PCU_MIC_NEW_LOC_ENA) {
+                        u32 mic0, mic1, mic2, mic3, mic4;
+
+                        mic0 = get_unaligned_le32(k->kv_mic + 0);
+                        mic2 = get_unaligned_le32(k->kv_mic + 4);
+                        mic1 = get_unaligned_le16(k->kv_txmic + 2) & 0xffff;
+                        mic3 = get_unaligned_le16(k->kv_txmic + 0) & 0xffff;
+                        mic4 = get_unaligned_le32(k->kv_txmic + 4);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), mic1);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), mic3);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), mic4);
+                        REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
+                                  AR_KEYTABLE_TYPE_CLR);
+
+                } else {
+                        u32 mic0, mic2;
+
+                        mic0 = get_unaligned_le32(k->kv_mic + 0);
+                        mic2 = get_unaligned_le32(k->kv_mic + 4);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
+                        REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0);
+                        REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
+                                  AR_KEYTABLE_TYPE_CLR);
+                }
+                REG_WRITE(ah, AR_KEYTABLE_MAC0(micentry), 0);
+                REG_WRITE(ah, AR_KEYTABLE_MAC1(micentry), 0);
+                REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
+                REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
+        } else {
+                REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
+                REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
+                REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
+                REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
+                REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
+                REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);
+
+                (void) ath9k_hw_keysetmac(ah, entry, mac);
+        }
+
+        if (ah->ah_curchan == NULL)
+                return true;
+
+        return true;
+}
+
+bool
+ath9k_hw_updatetxtriglevel(struct ath_hal *ah, bool bIncTrigLevel)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 txcfg, curLevel, newLevel;
+        enum ath9k_int omask;
+
+        if (ah->ah_txTrigLevel >= MAX_TX_FIFO_THRESHOLD)
+                return false;
+
+        omask = ath9k_hw_set_interrupts(ah,
+                                        ahp->ah_maskReg & ~ATH9K_INT_GLOBAL);
+
+        txcfg = REG_READ(ah, AR_TXCFG);
+        curLevel = MS(txcfg, AR_FTRIG);
+        newLevel = curLevel;
+        if (bIncTrigLevel) {
+                if (curLevel < MAX_TX_FIFO_THRESHOLD)
+                        newLevel++;
+        } else if (curLevel > MIN_TX_FIFO_THRESHOLD)
+                newLevel--;
+        if (newLevel != curLevel)
+                REG_WRITE(ah, AR_TXCFG,
+                          (txcfg & ~AR_FTRIG) | SM(newLevel, AR_FTRIG));
+
+        ath9k_hw_set_interrupts(ah, omask);
+
+        ah->ah_txTrigLevel = newLevel;
+
+        return newLevel != curLevel;
+}
+
+bool ath9k_hw_set_txq_props(struct ath_hal *ah, int q,
+                            const struct ath9k_tx_queue_info *qinfo)
+{
+        u32 cw;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        struct ath9k_tx_queue_info *qi;
+
+        if (q >= pCap->total_queues) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n",
+                         __func__, q);
+                return false;
+        }
+
+        qi = &ahp->ah_txq[q];
+        if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n",
+                         __func__);
+                return false;
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %p\n", __func__, qi);
+
+        qi->tqi_ver = qinfo->tqi_ver;
+        qi->tqi_subtype = qinfo->tqi_subtype;
+        qi->tqi_qflags = qinfo->tqi_qflags;
+        qi->tqi_priority = qinfo->tqi_priority;
+        if (qinfo->tqi_aifs != ATH9K_TXQ_USEDEFAULT)
+                qi->tqi_aifs = min(qinfo->tqi_aifs, 255U);
+        else
+                qi->tqi_aifs = INIT_AIFS;
+        if (qinfo->tqi_cwmin != ATH9K_TXQ_USEDEFAULT) {
+                cw = min(qinfo->tqi_cwmin, 1024U);
+                qi->tqi_cwmin = 1;
+                while (qi->tqi_cwmin < cw)
+                        qi->tqi_cwmin = (qi->tqi_cwmin << 1) | 1;
+        } else
+                qi->tqi_cwmin = qinfo->tqi_cwmin;
+        if (qinfo->tqi_cwmax != ATH9K_TXQ_USEDEFAULT) {
+                cw = min(qinfo->tqi_cwmax, 1024U);
+                qi->tqi_cwmax = 1;
+                while (qi->tqi_cwmax < cw)
+                        qi->tqi_cwmax = (qi->tqi_cwmax << 1) | 1;
+        } else
+                qi->tqi_cwmax = INIT_CWMAX;
+
+        if (qinfo->tqi_shretry != 0)
+                qi->tqi_shretry = min((u32) qinfo->tqi_shretry, 15U);
+        else
+                qi->tqi_shretry = INIT_SH_RETRY;
+        if (qinfo->tqi_lgretry != 0)
+                qi->tqi_lgretry = min((u32) qinfo->tqi_lgretry, 15U);
+        else
+                qi->tqi_lgretry = INIT_LG_RETRY;
+        qi->tqi_cbrPeriod = qinfo->tqi_cbrPeriod;
+        qi->tqi_cbrOverflowLimit = qinfo->tqi_cbrOverflowLimit;
+        qi->tqi_burstTime = qinfo->tqi_burstTime;
+        qi->tqi_readyTime = qinfo->tqi_readyTime;
+
+        switch (qinfo->tqi_subtype) {
+        case ATH9K_WME_UPSD:
+                if (qi->tqi_type == ATH9K_TX_QUEUE_DATA)
+                        qi->tqi_intFlags = ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS;
+                break;
+        default:
+                break;
+        }
+        return true;
+}
+
+bool ath9k_hw_get_txq_props(struct ath_hal *ah, int q,
+                            struct ath9k_tx_queue_info *qinfo)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        struct ath9k_tx_queue_info *qi;
+
+        if (q >= pCap->total_queues) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n",
+                         __func__, q);
+                return false;
+        }
+
+        qi = &ahp->ah_txq[q];
+        if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n",
+                         __func__);
+                return false;
+        }
+
+        qinfo->tqi_qflags = qi->tqi_qflags;
+        qinfo->tqi_ver = qi->tqi_ver;
+        qinfo->tqi_subtype = qi->tqi_subtype;
+        qinfo->tqi_qflags = qi->tqi_qflags;
+        qinfo->tqi_priority = qi->tqi_priority;
+        qinfo->tqi_aifs = qi->tqi_aifs;
+        qinfo->tqi_cwmin = qi->tqi_cwmin;
+        qinfo->tqi_cwmax = qi->tqi_cwmax;
+        qinfo->tqi_shretry = qi->tqi_shretry;
+        qinfo->tqi_lgretry = qi->tqi_lgretry;
+        qinfo->tqi_cbrPeriod = qi->tqi_cbrPeriod;
+        qinfo->tqi_cbrOverflowLimit = qi->tqi_cbrOverflowLimit;
+        qinfo->tqi_burstTime = qi->tqi_burstTime;
+        qinfo->tqi_readyTime = qi->tqi_readyTime;
+
+        return true;
+}
+
+int
+ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type,
+                      const struct ath9k_tx_queue_info *qinfo)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_tx_queue_info *qi;
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        int q;
+
+        switch (type) {
+        case ATH9K_TX_QUEUE_BEACON:
+                q = pCap->total_queues - 1;
+                break;
+        case ATH9K_TX_QUEUE_CAB:
+                q = pCap->total_queues - 2;
+                break;
+        case ATH9K_TX_QUEUE_PSPOLL:
+                q = 1;
+                break;
+        case ATH9K_TX_QUEUE_UAPSD:
+                q = pCap->total_queues - 3;
+                break;
+        case ATH9K_TX_QUEUE_DATA:
+                for (q = 0; q < pCap->total_queues; q++)
+                        if (ahp->ah_txq[q].tqi_type ==
+                            ATH9K_TX_QUEUE_INACTIVE)
+                                break;
+                if (q == pCap->total_queues) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
+                                 "%s: no available tx queue\n", __func__);
+                        return -1;
+                }
+                break;
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: bad tx queue type %u\n",
+                         __func__, type);
+                return -1;
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %u\n", __func__, q);
+
+        qi = &ahp->ah_txq[q];
+        if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
+                         "%s: tx queue %u already active\n", __func__, q);
+                return -1;
+        }
+        memset(qi, 0, sizeof(struct ath9k_tx_queue_info));
+        qi->tqi_type = type;
+        if (qinfo == NULL) {
+                qi->tqi_qflags =
+                        TXQ_FLAG_TXOKINT_ENABLE
+                        | TXQ_FLAG_TXERRINT_ENABLE
+                        | TXQ_FLAG_TXDESCINT_ENABLE | TXQ_FLAG_TXURNINT_ENABLE;
+                qi->tqi_aifs = INIT_AIFS;
+                qi->tqi_cwmin = ATH9K_TXQ_USEDEFAULT;
+                qi->tqi_cwmax = INIT_CWMAX;
+                qi->tqi_shretry = INIT_SH_RETRY;
+                qi->tqi_lgretry = INIT_LG_RETRY;
+                qi->tqi_physCompBuf = 0;
+        } else {
+                qi->tqi_physCompBuf = qinfo->tqi_physCompBuf;
+                (void) ath9k_hw_set_txq_props(ah, q, qinfo);
+        }
+
+        return q;
+}
+
+static void
+ath9k_hw_set_txq_interrupts(struct ath_hal *ah,
+                            struct ath9k_tx_queue_info *qi)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
+                 "%s: tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n",
+                 __func__, ahp->ah_txOkInterruptMask,
+                 ahp->ah_txErrInterruptMask, ahp->ah_txDescInterruptMask,
+                 ahp->ah_txEolInterruptMask, ahp->ah_txUrnInterruptMask);
+
+        REG_WRITE(ah, AR_IMR_S0,
+                  SM(ahp->ah_txOkInterruptMask, AR_IMR_S0_QCU_TXOK)
+                  | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC));
+        REG_WRITE(ah, AR_IMR_S1,
+                  SM(ahp->ah_txErrInterruptMask, AR_IMR_S1_QCU_TXERR)
+                  | SM(ahp->ah_txEolInterruptMask, AR_IMR_S1_QCU_TXEOL));
+        REG_RMW_FIELD(ah, AR_IMR_S2,
+                      AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask);
+}
+
+bool ath9k_hw_releasetxqueue(struct ath_hal *ah, u32 q)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        struct ath9k_tx_queue_info *qi;
+
+        if (q >= pCap->total_queues) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n",
+                         __func__, q);
+                return false;
+        }
+        qi = &ahp->ah_txq[q];
+        if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue %u\n",
+                         __func__, q);
+                return false;
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: release queue %u\n",
+                __func__, q);
+
+        qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE;
+        ahp->ah_txOkInterruptMask &= ~(1 << q);
+        ahp->ah_txErrInterruptMask &= ~(1 << q);
+        ahp->ah_txDescInterruptMask &= ~(1 << q);
+        ahp->ah_txEolInterruptMask &= ~(1 << q);
+        ahp->ah_txUrnInterruptMask &= ~(1 << q);
+        ath9k_hw_set_txq_interrupts(ah, qi);
+
+        return true;
+}
+
+bool ath9k_hw_resettxqueue(struct ath_hal *ah, u32 q)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+        struct ath9k_channel *chan = ah->ah_curchan;
+        struct ath9k_tx_queue_info *qi;
+        u32 cwMin, chanCwMin, value;
+
+        if (q >= pCap->total_queues) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n",
+                         __func__, q);
+                return false;
+        }
+        qi = &ahp->ah_txq[q];
+        if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue %u\n",
+                         __func__, q);
+                return true;
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: reset queue %u\n", __func__, q);
+
+        if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) {
+                if (chan && IS_CHAN_B(chan))
+                        chanCwMin = INIT_CWMIN_11B;
+                else
+                        chanCwMin = INIT_CWMIN;
+
+                for (cwMin = 1; cwMin < chanCwMin; cwMin = (cwMin << 1) | 1);
+        } else
+                cwMin = qi->tqi_cwmin;
+
+        REG_WRITE(ah, AR_DLCL_IFS(q), SM(cwMin, AR_D_LCL_IFS_CWMIN)
+                  | SM(qi->tqi_cwmax, AR_D_LCL_IFS_CWMAX)
+                  | SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS));
+
+        REG_WRITE(ah, AR_DRETRY_LIMIT(q),
+                  SM(INIT_SSH_RETRY, AR_D_RETRY_LIMIT_STA_SH)
+                  | SM(INIT_SLG_RETRY, AR_D_RETRY_LIMIT_STA_LG)
+                  | SM(qi->tqi_shretry, AR_D_RETRY_LIMIT_FR_SH)
+                );
+
+        REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ);
+        REG_WRITE(ah, AR_DMISC(q),
+                  AR_D_MISC_CW_BKOFF_EN | AR_D_MISC_FRAG_WAIT_EN | 0x2);
+
+        if (qi->tqi_cbrPeriod) {
+                REG_WRITE(ah, AR_QCBRCFG(q),
+                          SM(qi->tqi_cbrPeriod, AR_Q_CBRCFG_INTERVAL)
+                          | SM(qi->tqi_cbrOverflowLimit,
+                               AR_Q_CBRCFG_OVF_THRESH));
+                REG_WRITE(ah, AR_QMISC(q),
+                          REG_READ(ah,
+                                   AR_QMISC(q)) | AR_Q_MISC_FSP_CBR | (qi->
+                                        tqi_cbrOverflowLimit
+                                        ?
+                                        AR_Q_MISC_CBR_EXP_CNTR_LIMIT_EN
+                                        :
+                                        0));
+        }
+        if (qi->tqi_readyTime && (qi->tqi_type != ATH9K_TX_QUEUE_CAB)) {
+                REG_WRITE(ah, AR_QRDYTIMECFG(q),
+                          SM(qi->tqi_readyTime, AR_Q_RDYTIMECFG_DURATION) |
+                          AR_Q_RDYTIMECFG_EN);
+        }
+
+        REG_WRITE(ah, AR_DCHNTIME(q),
+                  SM(qi->tqi_burstTime, AR_D_CHNTIME_DUR) |
+                  (qi->tqi_burstTime ? AR_D_CHNTIME_EN : 0));
+
+        if (qi->tqi_burstTime
+            && (qi->tqi_qflags & TXQ_FLAG_RDYTIME_EXP_POLICY_ENABLE)) {
+                REG_WRITE(ah, AR_QMISC(q),
+                          REG_READ(ah,
+                                   AR_QMISC(q)) |
+                          AR_Q_MISC_RDYTIME_EXP_POLICY);
+
+        }
+
+        if (qi->tqi_qflags & TXQ_FLAG_BACKOFF_DISABLE) {
+                REG_WRITE(ah, AR_DMISC(q),
+                          REG_READ(ah, AR_DMISC(q)) |
+                          AR_D_MISC_POST_FR_BKOFF_DIS);
+        }
+        if (qi->tqi_qflags & TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE) {
+                REG_WRITE(ah, AR_DMISC(q),
+                          REG_READ(ah, AR_DMISC(q)) |
+                          AR_D_MISC_FRAG_BKOFF_EN);
+        }
+        switch (qi->tqi_type) {
+        case ATH9K_TX_QUEUE_BEACON:
+                REG_WRITE(ah, AR_QMISC(q), REG_READ(ah, AR_QMISC(q))
+                          | AR_Q_MISC_FSP_DBA_GATED
+                          | AR_Q_MISC_BEACON_USE
+                          | AR_Q_MISC_CBR_INCR_DIS1);
+
+                REG_WRITE(ah, AR_DMISC(q), REG_READ(ah, AR_DMISC(q))
+                          | (AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL <<
+                             AR_D_MISC_ARB_LOCKOUT_CNTRL_S)
+                          | AR_D_MISC_BEACON_USE
+                          | AR_D_MISC_POST_FR_BKOFF_DIS);
+                break;
+        case ATH9K_TX_QUEUE_CAB:
+                REG_WRITE(ah, AR_QMISC(q), REG_READ(ah, AR_QMISC(q))
+                          | AR_Q_MISC_FSP_DBA_GATED
+                          | AR_Q_MISC_CBR_INCR_DIS1
+                          | AR_Q_MISC_CBR_INCR_DIS0);
+                value = (qi->tqi_readyTime
+                         - (ah->ah_config.sw_beacon_response_time -
+                            ah->ah_config.dma_beacon_response_time)
+                         -
+                         ah->ah_config.additional_swba_backoff) *
+                        1024;
+                REG_WRITE(ah, AR_QRDYTIMECFG(q),
+                          value | AR_Q_RDYTIMECFG_EN);
+                REG_WRITE(ah, AR_DMISC(q), REG_READ(ah, AR_DMISC(q))
+                          | (AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL <<
+                             AR_D_MISC_ARB_LOCKOUT_CNTRL_S));
+                break;
+        case ATH9K_TX_QUEUE_PSPOLL:
+                REG_WRITE(ah, AR_QMISC(q),
+                          REG_READ(ah,
+                                   AR_QMISC(q)) | AR_Q_MISC_CBR_INCR_DIS1);
+                break;
+        case ATH9K_TX_QUEUE_UAPSD:
+                REG_WRITE(ah, AR_DMISC(q), REG_READ(ah, AR_DMISC(q))
+                          | AR_D_MISC_POST_FR_BKOFF_DIS);
+                break;
+        default:
+                break;
+        }
+
+        if (qi->tqi_intFlags & ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS) {
+                REG_WRITE(ah, AR_DMISC(q),
+                          REG_READ(ah, AR_DMISC(q)) |
+                          SM(AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL,
+                             AR_D_MISC_ARB_LOCKOUT_CNTRL) |
+                          AR_D_MISC_POST_FR_BKOFF_DIS);
+        }
+
+        if (qi->tqi_qflags & TXQ_FLAG_TXOKINT_ENABLE)
+                ahp->ah_txOkInterruptMask |= 1 << q;
+        else
+                ahp->ah_txOkInterruptMask &= ~(1 << q);
+        if (qi->tqi_qflags & TXQ_FLAG_TXERRINT_ENABLE)
+                ahp->ah_txErrInterruptMask |= 1 << q;
+        else
+                ahp->ah_txErrInterruptMask &= ~(1 << q);
+        if (qi->tqi_qflags & TXQ_FLAG_TXDESCINT_ENABLE)
+                ahp->ah_txDescInterruptMask |= 1 << q;
+        else
+                ahp->ah_txDescInterruptMask &= ~(1 << q);
+        if (qi->tqi_qflags & TXQ_FLAG_TXEOLINT_ENABLE)
+                ahp->ah_txEolInterruptMask |= 1 << q;
+        else
+                ahp->ah_txEolInterruptMask &= ~(1 << q);
+        if (qi->tqi_qflags & TXQ_FLAG_TXURNINT_ENABLE)
+                ahp->ah_txUrnInterruptMask |= 1 << q;
+        else
+                ahp->ah_txUrnInterruptMask &= ~(1 << q);
+        ath9k_hw_set_txq_interrupts(ah, qi);
+
+        return true;
+}
+
+void ath9k_hw_gettxintrtxqs(struct ath_hal *ah, u32 *txqs)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        *txqs &= ahp->ah_intrTxqs;
+        ahp->ah_intrTxqs &= ~(*txqs);
+}
+
+bool
+ath9k_hw_filltxdesc(struct ath_hal *ah, struct ath_desc *ds,
+                    u32 segLen, bool firstSeg,
+                    bool lastSeg, const struct ath_desc *ds0)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+
+        if (firstSeg) {
+                ads->ds_ctl1 |= segLen | (lastSeg ? 0 : AR_TxMore);
+        } else if (lastSeg) {
+                ads->ds_ctl0 = 0;
+                ads->ds_ctl1 = segLen;
+                ads->ds_ctl2 = AR5416DESC_CONST(ds0)->ds_ctl2;
+                ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3;
+        } else {
+                ads->ds_ctl0 = 0;
+                ads->ds_ctl1 = segLen | AR_TxMore;
+                ads->ds_ctl2 = 0;
+                ads->ds_ctl3 = 0;
+        }
+        ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
+        ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
+        ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
+        ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
+        ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
+        return true;
+}
+
+void ath9k_hw_cleartxdesc(struct ath_hal *ah, struct ath_desc *ds)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+
+        ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
+        ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
+        ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
+        ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
+        ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
+}
+
+int
+ath9k_hw_txprocdesc(struct ath_hal *ah, struct ath_desc *ds)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+
+        if ((ads->ds_txstatus9 & AR_TxDone) == 0)
+                return -EINPROGRESS;
+
+        ds->ds_txstat.ts_seqnum = MS(ads->ds_txstatus9, AR_SeqNum);
+        ds->ds_txstat.ts_tstamp = ads->AR_SendTimestamp;
+        ds->ds_txstat.ts_status = 0;
+        ds->ds_txstat.ts_flags = 0;
+
+        if (ads->ds_txstatus1 & AR_ExcessiveRetries)
+                ds->ds_txstat.ts_status |= ATH9K_TXERR_XRETRY;
+        if (ads->ds_txstatus1 & AR_Filtered)
+                ds->ds_txstat.ts_status |= ATH9K_TXERR_FILT;
+        if (ads->ds_txstatus1 & AR_FIFOUnderrun)
+                ds->ds_txstat.ts_status |= ATH9K_TXERR_FIFO;
+        if (ads->ds_txstatus9 & AR_TxOpExceeded)
+                ds->ds_txstat.ts_status |= ATH9K_TXERR_XTXOP;
+        if (ads->ds_txstatus1 & AR_TxTimerExpired)
+                ds->ds_txstat.ts_status |= ATH9K_TXERR_TIMER_EXPIRED;
+
+        if (ads->ds_txstatus1 & AR_DescCfgErr)
+                ds->ds_txstat.ts_flags |= ATH9K_TX_DESC_CFG_ERR;
+        if (ads->ds_txstatus1 & AR_TxDataUnderrun) {
+                ds->ds_txstat.ts_flags |= ATH9K_TX_DATA_UNDERRUN;
+                ath9k_hw_updatetxtriglevel(ah, true);
+        }
+        if (ads->ds_txstatus1 & AR_TxDelimUnderrun) {
+                ds->ds_txstat.ts_flags |= ATH9K_TX_DELIM_UNDERRUN;
+                ath9k_hw_updatetxtriglevel(ah, true);
+        }
+        if (ads->ds_txstatus0 & AR_TxBaStatus) {
+                ds->ds_txstat.ts_flags |= ATH9K_TX_BA;
+                ds->ds_txstat.ba_low = ads->AR_BaBitmapLow;
+                ds->ds_txstat.ba_high = ads->AR_BaBitmapHigh;
+        }
+
+        ds->ds_txstat.ts_rateindex = MS(ads->ds_txstatus9, AR_FinalTxIdx);
+        switch (ds->ds_txstat.ts_rateindex) {
+        case 0:
+                ds->ds_txstat.ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate0);
+                break;
+        case 1:
+                ds->ds_txstat.ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate1);
+                break;
+        case 2:
+                ds->ds_txstat.ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate2);
+                break;
+        case 3:
+                ds->ds_txstat.ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate3);
+                break;
+        }
+
+        ds->ds_txstat.ts_rssi = MS(ads->ds_txstatus5, AR_TxRSSICombined);
+        ds->ds_txstat.ts_rssi_ctl0 = MS(ads->ds_txstatus0, AR_TxRSSIAnt00);
+        ds->ds_txstat.ts_rssi_ctl1 = MS(ads->ds_txstatus0, AR_TxRSSIAnt01);
+        ds->ds_txstat.ts_rssi_ctl2 = MS(ads->ds_txstatus0, AR_TxRSSIAnt02);
+        ds->ds_txstat.ts_rssi_ext0 = MS(ads->ds_txstatus5, AR_TxRSSIAnt10);
+        ds->ds_txstat.ts_rssi_ext1 = MS(ads->ds_txstatus5, AR_TxRSSIAnt11);
+        ds->ds_txstat.ts_rssi_ext2 = MS(ads->ds_txstatus5, AR_TxRSSIAnt12);
+        ds->ds_txstat.evm0 = ads->AR_TxEVM0;
+        ds->ds_txstat.evm1 = ads->AR_TxEVM1;
+        ds->ds_txstat.evm2 = ads->AR_TxEVM2;
+        ds->ds_txstat.ts_shortretry = MS(ads->ds_txstatus1, AR_RTSFailCnt);
+        ds->ds_txstat.ts_longretry = MS(ads->ds_txstatus1, AR_DataFailCnt);
+        ds->ds_txstat.ts_virtcol = MS(ads->ds_txstatus1, AR_VirtRetryCnt);
+        ds->ds_txstat.ts_antenna = 1;
+
+        return 0;
+}
+
+void
+ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds,
+                       u32 pktLen, enum ath9k_pkt_type type, u32 txPower,
+                       u32 keyIx, enum ath9k_key_type keyType, u32 flags)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        txPower += ahp->ah_txPowerIndexOffset;
+        if (txPower > 63)
+                txPower = 63;
+
+        ads->ds_ctl0 = (pktLen & AR_FrameLen)
+                | (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
+                | SM(txPower, AR_XmitPower)
+                | (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
+                | (flags & ATH9K_TXDESC_CLRDMASK ? AR_ClrDestMask : 0)
+                | (flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
+                | (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0);
+
+        ads->ds_ctl1 =
+                (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
+                | SM(type, AR_FrameType)
+                | (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
+                | (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
+                | (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
+
+        ads->ds_ctl6 = SM(keyType, AR_EncrType);
+
+        if (AR_SREV_9285(ah)) {
+
+                ads->ds_ctl8 = 0;
+                ads->ds_ctl9 = 0;
+                ads->ds_ctl10 = 0;
+                ads->ds_ctl11 = 0;
+        }
+}
+
+void
+ath9k_hw_set11n_ratescenario(struct ath_hal *ah, struct ath_desc *ds,
+                             struct ath_desc *lastds,
+                             u32 durUpdateEn, u32 rtsctsRate,
+                             u32 rtsctsDuration,
+                             struct ath9k_11n_rate_series series[],
+                             u32 nseries, u32 flags)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+        struct ar5416_desc *last_ads = AR5416DESC(lastds);
+        u32 ds_ctl0;
+
+        (void) nseries;
+        (void) rtsctsDuration;
+
+        if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
+                ds_ctl0 = ads->ds_ctl0;
+
+                if (flags & ATH9K_TXDESC_RTSENA) {
+                        ds_ctl0 &= ~AR_CTSEnable;
+                        ds_ctl0 |= AR_RTSEnable;
+                } else {
+                        ds_ctl0 &= ~AR_RTSEnable;
+                        ds_ctl0 |= AR_CTSEnable;
+                }
+
+                ads->ds_ctl0 = ds_ctl0;
+        } else {
+                ads->ds_ctl0 =
+                        (ads->ds_ctl0 & ~(AR_RTSEnable | AR_CTSEnable));
+        }
+
+        ads->ds_ctl2 = set11nTries(series, 0)
+                | set11nTries(series, 1)
+                | set11nTries(series, 2)
+                | set11nTries(series, 3)
+                | (durUpdateEn ? AR_DurUpdateEna : 0)
+                | SM(0, AR_BurstDur);
+
+        ads->ds_ctl3 = set11nRate(series, 0)
+                | set11nRate(series, 1)
+                | set11nRate(series, 2)
+                | set11nRate(series, 3);
+
+        ads->ds_ctl4 = set11nPktDurRTSCTS(series, 0)
+                | set11nPktDurRTSCTS(series, 1);
+
+        ads->ds_ctl5 = set11nPktDurRTSCTS(series, 2)
+                | set11nPktDurRTSCTS(series, 3);
+
+        ads->ds_ctl7 = set11nRateFlags(series, 0)
+                | set11nRateFlags(series, 1)
+                | set11nRateFlags(series, 2)
+                | set11nRateFlags(series, 3)
+                | SM(rtsctsRate, AR_RTSCTSRate);
+        last_ads->ds_ctl2 = ads->ds_ctl2;
+        last_ads->ds_ctl3 = ads->ds_ctl3;
+}
+
+void
+ath9k_hw_set11n_aggr_first(struct ath_hal *ah, struct ath_desc *ds,
+                           u32 aggrLen)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+
+        ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
+
+        ads->ds_ctl6 &= ~AR_AggrLen;
+        ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen);
+}
+
+void
+ath9k_hw_set11n_aggr_middle(struct ath_hal *ah, struct ath_desc *ds,
+                            u32 numDelims)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+        unsigned int ctl6;
+
+        ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
+
+        ctl6 = ads->ds_ctl6;
+        ctl6 &= ~AR_PadDelim;
+        ctl6 |= SM(numDelims, AR_PadDelim);
+        ads->ds_ctl6 = ctl6;
+}
+
+void ath9k_hw_set11n_aggr_last(struct ath_hal *ah, struct ath_desc *ds)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+
+        ads->ds_ctl1 |= AR_IsAggr;
+        ads->ds_ctl1 &= ~AR_MoreAggr;
+        ads->ds_ctl6 &= ~AR_PadDelim;
+}
+
+void ath9k_hw_clr11n_aggr(struct ath_hal *ah, struct ath_desc *ds)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+
+        ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
+}
+
+void
+ath9k_hw_set11n_burstduration(struct ath_hal *ah, struct ath_desc *ds,
+                              u32 burstDuration)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+
+        ads->ds_ctl2 &= ~AR_BurstDur;
+        ads->ds_ctl2 |= SM(burstDuration, AR_BurstDur);
+}
+
+void
+ath9k_hw_set11n_virtualmorefrag(struct ath_hal *ah, struct ath_desc *ds,
+                                u32 vmf)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+
+        if (vmf)
+                ads->ds_ctl0 |= AR_VirtMoreFrag;
+        else
+                ads->ds_ctl0 &= ~AR_VirtMoreFrag;
+}
+
+void ath9k_hw_putrxbuf(struct ath_hal *ah, u32 rxdp)
+{
+        REG_WRITE(ah, AR_RXDP, rxdp);
+}
+
+void ath9k_hw_rxena(struct ath_hal *ah)
+{
+        REG_WRITE(ah, AR_CR, AR_CR_RXE);
+}
+
+bool ath9k_hw_setrxabort(struct ath_hal *ah, bool set)
+{
+        if (set) {
+
+                REG_SET_BIT(ah, AR_DIAG_SW,
+                            (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
+
+                if (!ath9k_hw_wait
+                    (ah, AR_OBS_BUS_1, AR_OBS_BUS_1_RX_STATE, 0)) {
+                        u32 reg;
+
+                        REG_CLR_BIT(ah, AR_DIAG_SW,
+                                    (AR_DIAG_RX_DIS |
+                                     AR_DIAG_RX_ABORT));
+
+                        reg = REG_READ(ah, AR_OBS_BUS_1);
+                        DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
+                                "%s: rx failed to go idle in 10 ms RXSM=0x%x\n",
+                                __func__, reg);
+
+                        return false;
+                }
+        } else {
+                REG_CLR_BIT(ah, AR_DIAG_SW,
+                            (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
+        }
+
+        return true;
+}
+
+void
+ath9k_hw_setmcastfilter(struct ath_hal *ah, u32 filter0,
+                        u32 filter1)
+{
+        REG_WRITE(ah, AR_MCAST_FIL0, filter0);
+        REG_WRITE(ah, AR_MCAST_FIL1, filter1);
+}
+
+bool
+ath9k_hw_setuprxdesc(struct ath_hal *ah, struct ath_desc *ds,
+                     u32 size, u32 flags)
+{
+        struct ar5416_desc *ads = AR5416DESC(ds);
+        struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
+
+        ads->ds_ctl1 = size & AR_BufLen;
+        if (flags & ATH9K_RXDESC_INTREQ)
+                ads->ds_ctl1 |= AR_RxIntrReq;
+
+        ads->ds_rxstatus8 &= ~AR_RxDone;
+        if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
+                memset(&(ads->u), 0, sizeof(ads->u));
+        return true;
+}
+
+int
+ath9k_hw_rxprocdesc(struct ath_hal *ah, struct ath_desc *ds,
+                    u32 pa, struct ath_desc *nds, u64 tsf)
+{
+        struct ar5416_desc ads;
+        struct ar5416_desc *adsp = AR5416DESC(ds);
+
+        if ((adsp->ds_rxstatus8 & AR_RxDone) == 0)
+                return -EINPROGRESS;
+
+        ads.u.rx = adsp->u.rx;
+
+        ds->ds_rxstat.rs_status = 0;
+        ds->ds_rxstat.rs_flags = 0;
+
+        ds->ds_rxstat.rs_datalen = ads.ds_rxstatus1 & AR_DataLen;
+        ds->ds_rxstat.rs_tstamp = ads.AR_RcvTimestamp;
+
+        ds->ds_rxstat.rs_rssi = MS(ads.ds_rxstatus4, AR_RxRSSICombined);
+        ds->ds_rxstat.rs_rssi_ctl0 = MS(ads.ds_rxstatus0, AR_RxRSSIAnt00);
+        ds->ds_rxstat.rs_rssi_ctl1 = MS(ads.ds_rxstatus0, AR_RxRSSIAnt01);
+        ds->ds_rxstat.rs_rssi_ctl2 = MS(ads.ds_rxstatus0, AR_RxRSSIAnt02);
+        ds->ds_rxstat.rs_rssi_ext0 = MS(ads.ds_rxstatus4, AR_RxRSSIAnt10);
+        ds->ds_rxstat.rs_rssi_ext1 = MS(ads.ds_rxstatus4, AR_RxRSSIAnt11);
+        ds->ds_rxstat.rs_rssi_ext2 = MS(ads.ds_rxstatus4, AR_RxRSSIAnt12);
+        if (ads.ds_rxstatus8 & AR_RxKeyIdxValid)
+                ds->ds_rxstat.rs_keyix = MS(ads.ds_rxstatus8, AR_KeyIdx);
+        else
+                ds->ds_rxstat.rs_keyix = ATH9K_RXKEYIX_INVALID;
+
+        ds->ds_rxstat.rs_rate = RXSTATUS_RATE(ah, (&ads));
+        ds->ds_rxstat.rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0;
+
+        ds->ds_rxstat.rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0;
+        ds->ds_rxstat.rs_moreaggr =
+                (ads.ds_rxstatus8 & AR_RxMoreAggr) ? 1 : 0;
+        ds->ds_rxstat.rs_antenna = MS(ads.ds_rxstatus3, AR_RxAntenna);
+        ds->ds_rxstat.rs_flags =
+                (ads.ds_rxstatus3 & AR_GI) ? ATH9K_RX_GI : 0;
+        ds->ds_rxstat.rs_flags |=
+                (ads.ds_rxstatus3 & AR_2040) ? ATH9K_RX_2040 : 0;
+
+        if (ads.ds_rxstatus8 & AR_PreDelimCRCErr)
+                ds->ds_rxstat.rs_flags |= ATH9K_RX_DELIM_CRC_PRE;
+        if (ads.ds_rxstatus8 & AR_PostDelimCRCErr)
+                ds->ds_rxstat.rs_flags |= ATH9K_RX_DELIM_CRC_POST;
+        if (ads.ds_rxstatus8 & AR_DecryptBusyErr)
+                ds->ds_rxstat.rs_flags |= ATH9K_RX_DECRYPT_BUSY;
+
+        if ((ads.ds_rxstatus8 & AR_RxFrameOK) == 0) {
+
+                if (ads.ds_rxstatus8 & AR_CRCErr)
+                        ds->ds_rxstat.rs_status |= ATH9K_RXERR_CRC;
+                else if (ads.ds_rxstatus8 & AR_PHYErr) {
+                        u32 phyerr;
+
+                        ds->ds_rxstat.rs_status |= ATH9K_RXERR_PHY;
+                        phyerr = MS(ads.ds_rxstatus8, AR_PHYErrCode);
+                        ds->ds_rxstat.rs_phyerr = phyerr;
+                } else if (ads.ds_rxstatus8 & AR_DecryptCRCErr)
+                        ds->ds_rxstat.rs_status |= ATH9K_RXERR_DECRYPT;
+                else if (ads.ds_rxstatus8 & AR_MichaelErr)
+                        ds->ds_rxstat.rs_status |= ATH9K_RXERR_MIC;
+        }
+
+        return 0;
+}
+
+static void ath9k_hw_setup_rate_table(struct ath_hal *ah,
+                                      struct ath9k_rate_table *rt)
+{
+        int i;
+
+        if (rt->rateCodeToIndex[0] != 0)
+                return;
+        for (i = 0; i < 256; i++)
+                rt->rateCodeToIndex[i] = (u8) -1;
+        for (i = 0; i < rt->rateCount; i++) {
+                u8 code = rt->info[i].rateCode;
+                u8 cix = rt->info[i].controlRate;
+
+                rt->rateCodeToIndex[code] = i;
+                rt->rateCodeToIndex[code | rt->info[i].shortPreamble] = i;
+
+                rt->info[i].lpAckDuration =
+                        ath9k_hw_computetxtime(ah, rt,
+                                               WLAN_CTRL_FRAME_SIZE,
+                                               cix,
+                                               false);
+                rt->info[i].spAckDuration =
+                        ath9k_hw_computetxtime(ah, rt,
+                                               WLAN_CTRL_FRAME_SIZE,
+                                               cix,
+                                               true);
+        }
+}
+
+const struct ath9k_rate_table *ath9k_hw_getratetable(struct ath_hal *ah,
+                                                   u32 mode)
+{
+        struct ath9k_rate_table *rt;
+        switch (mode) {
+        case ATH9K_MODE_11A:
+                rt = &ar5416_11a_table;
+                break;
+        case ATH9K_MODE_11B:
+                rt = &ar5416_11b_table;
+                break;
+        case ATH9K_MODE_11G:
+                rt = &ar5416_11g_table;
+                break;
+        case ATH9K_MODE_11NG_HT20:
+        case ATH9K_MODE_11NG_HT40PLUS:
+        case ATH9K_MODE_11NG_HT40MINUS:
+                rt = &ar5416_11ng_table;
+                break;
+        case ATH9K_MODE_11NA_HT20:
+        case ATH9K_MODE_11NA_HT40PLUS:
+        case ATH9K_MODE_11NA_HT40MINUS:
+                rt = &ar5416_11na_table;
+                break;
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, "%s: invalid mode 0x%x\n",
+                         __func__, mode);
+                return NULL;
+        }
+        ath9k_hw_setup_rate_table(ah, rt);
+        return rt;
+}
+
+static const char *ath9k_hw_devname(u16 devid)
+{
+        switch (devid) {
+        case AR5416_DEVID_PCI:
+        case AR5416_DEVID_PCIE:
+                return "Atheros 5416";
+        case AR9160_DEVID_PCI:
+                return "Atheros 9160";
+        case AR9280_DEVID_PCI:
+        case AR9280_DEVID_PCIE:
+                return "Atheros 9280";
+        }
+        return NULL;
+}
+
+const char *ath9k_hw_probe(u16 vendorid, u16 devid)
+{
+        return vendorid == ATHEROS_VENDOR_ID ?
+                ath9k_hw_devname(devid) : NULL;
+}
+
+struct ath_hal *ath9k_hw_attach(u16 devid,
+                                struct ath_softc *sc,
+                                void __iomem *mem,
+                                int *error)
+{
+        struct ath_hal *ah = NULL;
+
+        switch (devid) {
+        case AR5416_DEVID_PCI:
+        case AR5416_DEVID_PCIE:
+        case AR9160_DEVID_PCI:
+        case AR9280_DEVID_PCI:
+        case AR9280_DEVID_PCIE:
+                ah = ath9k_hw_do_attach(devid, sc, mem, error);
+                break;
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_ANY,
+                         "devid=0x%x not supported.\n", devid);
+                ah = NULL;
+                *error = -ENXIO;
+                break;
+        }
+        if (ah != NULL) {
+                ah->ah_devid = ah->ah_devid;
+                ah->ah_subvendorid = ah->ah_subvendorid;
+                ah->ah_macVersion = ah->ah_macVersion;
+                ah->ah_macRev = ah->ah_macRev;
+                ah->ah_phyRev = ah->ah_phyRev;
+                ah->ah_analog5GhzRev = ah->ah_analog5GhzRev;
+                ah->ah_analog2GhzRev = ah->ah_analog2GhzRev;
+        }
+        return ah;
+}
+
+u16
+ath9k_hw_computetxtime(struct ath_hal *ah,
+                       const struct ath9k_rate_table *rates,
+                       u32 frameLen, u16 rateix,
+                       bool shortPreamble)
+{
+        u32 bitsPerSymbol, numBits, numSymbols, phyTime, txTime;
+        u32 kbps;
+
+        kbps = rates->info[rateix].rateKbps;
+
+        if (kbps == 0)
+                return 0;
+        switch (rates->info[rateix].phy) {
+
+        case PHY_CCK:
+                phyTime = CCK_PREAMBLE_BITS + CCK_PLCP_BITS;
+                if (shortPreamble && rates->info[rateix].shortPreamble)
+                        phyTime >>= 1;
+                numBits = frameLen << 3;
+                txTime = CCK_SIFS_TIME + phyTime
+                        + ((numBits * 1000) / kbps);
+                break;
+        case PHY_OFDM:
+                if (ah->ah_curchan && IS_CHAN_QUARTER_RATE(ah->ah_curchan)) {
+                        bitsPerSymbol =
+                                (kbps * OFDM_SYMBOL_TIME_QUARTER) / 1000;
+
+                        numBits = OFDM_PLCP_BITS + (frameLen << 3);
+                        numSymbols = DIV_ROUND_UP(numBits, bitsPerSymbol);
+                        txTime = OFDM_SIFS_TIME_QUARTER
+                                + OFDM_PREAMBLE_TIME_QUARTER
+                                + (numSymbols * OFDM_SYMBOL_TIME_QUARTER);
+                } else if (ah->ah_curchan &&
+                           IS_CHAN_HALF_RATE(ah->ah_curchan)) {
+                        bitsPerSymbol =
+                                (kbps * OFDM_SYMBOL_TIME_HALF) / 1000;
+
+                        numBits = OFDM_PLCP_BITS + (frameLen << 3);
+                        numSymbols = DIV_ROUND_UP(numBits, bitsPerSymbol);
+                        txTime = OFDM_SIFS_TIME_HALF +
+                                OFDM_PREAMBLE_TIME_HALF
+                                + (numSymbols * OFDM_SYMBOL_TIME_HALF);
+                } else {
+                        bitsPerSymbol = (kbps * OFDM_SYMBOL_TIME) / 1000;
+
+                        numBits = OFDM_PLCP_BITS + (frameLen << 3);
+                        numSymbols = DIV_ROUND_UP(numBits, bitsPerSymbol);
+                        txTime = OFDM_SIFS_TIME + OFDM_PREAMBLE_TIME
+                                + (numSymbols * OFDM_SYMBOL_TIME);
+                }
+                break;
+
+        default:
+                DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
+                         "%s: unknown phy %u (rate ix %u)\n", __func__,
+                         rates->info[rateix].phy, rateix);
+                txTime = 0;
+                break;
+        }
+        return txTime;
+}
+
+u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags)
+{
+        if (flags & CHANNEL_2GHZ) {
+                if (freq == 2484)
+                        return 14;
+                if (freq < 2484)
+                        return (freq - 2407) / 5;
+                else
+                        return 15 + ((freq - 2512) / 20);
+        } else if (flags & CHANNEL_5GHZ) {
+                if (ath9k_regd_is_public_safety_sku(ah) &&
+                    IS_CHAN_IN_PUBLIC_SAFETY_BAND(freq)) {
+                        return ((freq * 10) +
+                                (((freq % 5) == 2) ? 5 : 0) - 49400) / 5;
+                } else if ((flags & CHANNEL_A) && (freq <= 5000)) {
+                        return (freq - 4000) / 5;
+                } else {
+                        return (freq - 5000) / 5;
+                }
+        } else {
+                if (freq == 2484)
+                        return 14;
+                if (freq < 2484)
+                        return (freq - 2407) / 5;
+                if (freq < 5000) {
+                        if (ath9k_regd_is_public_safety_sku(ah)
+                            && IS_CHAN_IN_PUBLIC_SAFETY_BAND(freq)) {
+                                return ((freq * 10) +
+                                        (((freq % 5) ==
+                                          2) ? 5 : 0) - 49400) / 5;
+                        } else if (freq > 4900) {
+                                return (freq - 4000) / 5;
+                        } else {
+                                return 15 + ((freq - 2512) / 20);
+                        }
+                }
+                return (freq - 5000) / 5;
+        }
+}
+
+int16_t
+ath9k_hw_getchan_noise(struct ath_hal *ah, struct ath9k_channel *chan)
+{
+        struct ath9k_channel *ichan;
+
+        ichan = ath9k_regd_check_channel(ah, chan);
+        if (ichan == NULL) {
+                DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
+                         "%s: invalid channel %u/0x%x; no mapping\n",
+                         __func__, chan->channel, chan->channelFlags);
+                return 0;
+        }
+        if (ichan->rawNoiseFloor == 0) {
+                enum wireless_mode mode = ath9k_hw_chan2wmode(ah, chan);
+                return NOISE_FLOOR[mode];
+        } else
+                return ichan->rawNoiseFloor;
+}
+
+bool ath9k_hw_set_tsfadjust(struct ath_hal *ah, u32 setting)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (setting)
+                ahp->ah_miscMode |= AR_PCU_TX_ADD_TSF;
+        else
+                ahp->ah_miscMode &= ~AR_PCU_TX_ADD_TSF;
+        return true;
+}
+
+bool ath9k_hw_phycounters(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        return ahp->ah_hasHwPhyCounters ? true : false;
+}
+
+u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q)
+{
+        return REG_READ(ah, AR_QTXDP(q));
+}
+
+bool ath9k_hw_puttxbuf(struct ath_hal *ah, u32 q,
+                       u32 txdp)
+{
+        REG_WRITE(ah, AR_QTXDP(q), txdp);
+
+        return true;
+}
+
+bool ath9k_hw_txstart(struct ath_hal *ah, u32 q)
+{
+        DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %u\n", __func__, q);
+
+        REG_WRITE(ah, AR_Q_TXE, 1 << q);
+
+        return true;
+}
+
+u32 ath9k_hw_numtxpending(struct ath_hal *ah, u32 q)
+{
+        u32 npend;
+
+        npend = REG_READ(ah, AR_QSTS(q)) & AR_Q_STS_PEND_FR_CNT;
+        if (npend == 0) {
+
+                if (REG_READ(ah, AR_Q_TXE) & (1 << q))
+                        npend = 1;
+        }
+        return npend;
+}
+
+bool ath9k_hw_stoptxdma(struct ath_hal *ah, u32 q)
+{
+        u32 wait;
+
+        REG_WRITE(ah, AR_Q_TXD, 1 << q);
+
+        for (wait = 1000; wait != 0; wait--) {
+                if (ath9k_hw_numtxpending(ah, q) == 0)
+                        break;
+                udelay(100);
+        }
+
+        if (ath9k_hw_numtxpending(ah, q)) {
+                u32 tsfLow, j;
+
+                DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
+                         "%s: Num of pending TX Frames %d on Q %d\n",
+                         __func__, ath9k_hw_numtxpending(ah, q), q);
+
+                for (j = 0; j < 2; j++) {
+                        tsfLow = REG_READ(ah, AR_TSF_L32);
+                        REG_WRITE(ah, AR_QUIET2,
+                                  SM(10, AR_QUIET2_QUIET_DUR));
+                        REG_WRITE(ah, AR_QUIET_PERIOD, 100);
+                        REG_WRITE(ah, AR_NEXT_QUIET_TIMER, tsfLow >> 10);
+                        REG_SET_BIT(ah, AR_TIMER_MODE,
+                                       AR_QUIET_TIMER_EN);
+
+                        if ((REG_READ(ah, AR_TSF_L32) >> 10) ==
+                            (tsfLow >> 10)) {
+                                break;
+                        }
+                        DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
+                                "%s: TSF have moved while trying to set "
+                                "quiet time TSF: 0x%08x\n",
+                                __func__, tsfLow);
+                }
+
+                REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
+
+                udelay(200);
+                REG_CLR_BIT(ah, AR_TIMER_MODE, AR_QUIET_TIMER_EN);
+
+                wait = 1000;
+
+                while (ath9k_hw_numtxpending(ah, q)) {
+                        if ((--wait) == 0) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_XMIT,
+                                        "%s: Failed to stop Tx DMA in 100 "
+                                        "msec after killing last frame\n",
+                                        __func__);
+                                break;
+                        }
+                        udelay(100);
+                }
+
+                REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
+        }
+
+        REG_WRITE(ah, AR_Q_TXD, 0);
+        return wait != 0;
+}
diff --git a/drivers/net/wireless/ath9k/hw.h b/drivers/net/wireless/ath9k/hw.h
new file mode 100644
index 000000000000..ae680f21ba7e
--- /dev/null
+++ b/drivers/net/wireless/ath9k/hw.h
@@ -0,0 +1,969 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef HW_H
+#define HW_H
+
+#include <linux/if_ether.h>
+#include <linux/delay.h>
+
+struct ar5416_desc {
+        u32 ds_link;
+        u32 ds_data;
+        u32 ds_ctl0;
+        u32 ds_ctl1;
+        union {
+                struct {
+                        u32 ctl2;
+                        u32 ctl3;
+                        u32 ctl4;
+                        u32 ctl5;
+                        u32 ctl6;
+                        u32 ctl7;
+                        u32 ctl8;
+                        u32 ctl9;
+                        u32 ctl10;
+                        u32 ctl11;
+                        u32 status0;
+                        u32 status1;
+                        u32 status2;
+                        u32 status3;
+                        u32 status4;
+                        u32 status5;
+                        u32 status6;
+                        u32 status7;
+                        u32 status8;
+                        u32 status9;
+                } tx;
+                struct {
+                        u32 status0;
+                        u32 status1;
+                        u32 status2;
+                        u32 status3;
+                        u32 status4;
+                        u32 status5;
+                        u32 status6;
+                        u32 status7;
+                        u32 status8;
+                } rx;
+        } u;
+} __packed;
+
+#define AR5416DESC(_ds)         ((struct ar5416_desc *)(_ds))
+#define AR5416DESC_CONST(_ds)   ((const struct ar5416_desc *)(_ds))
+
+#define ds_ctl2     u.tx.ctl2
+#define ds_ctl3     u.tx.ctl3
+#define ds_ctl4     u.tx.ctl4
+#define ds_ctl5     u.tx.ctl5
+#define ds_ctl6     u.tx.ctl6
+#define ds_ctl7     u.tx.ctl7
+#define ds_ctl8     u.tx.ctl8
+#define ds_ctl9     u.tx.ctl9
+#define ds_ctl10    u.tx.ctl10
+#define ds_ctl11    u.tx.ctl11
+
+#define ds_txstatus0    u.tx.status0
+#define ds_txstatus1    u.tx.status1
+#define ds_txstatus2    u.tx.status2
+#define ds_txstatus3    u.tx.status3
+#define ds_txstatus4    u.tx.status4
+#define ds_txstatus5    u.tx.status5
+#define ds_txstatus6    u.tx.status6
+#define ds_txstatus7    u.tx.status7
+#define ds_txstatus8    u.tx.status8
+#define ds_txstatus9    u.tx.status9
+
+#define ds_rxstatus0    u.rx.status0
+#define ds_rxstatus1    u.rx.status1
+#define ds_rxstatus2    u.rx.status2
+#define ds_rxstatus3    u.rx.status3
+#define ds_rxstatus4    u.rx.status4
+#define ds_rxstatus5    u.rx.status5
+#define ds_rxstatus6    u.rx.status6
+#define ds_rxstatus7    u.rx.status7
+#define ds_rxstatus8    u.rx.status8
+
+#define AR_FrameLen         0x00000fff
+#define AR_VirtMoreFrag     0x00001000
+#define AR_TxCtlRsvd00      0x0000e000
+#define AR_XmitPower        0x003f0000
+#define AR_XmitPower_S      16
+#define AR_RTSEnable        0x00400000
+#define AR_VEOL             0x00800000
+#define AR_ClrDestMask      0x01000000
+#define AR_TxCtlRsvd01      0x1e000000
+#define AR_TxIntrReq        0x20000000
+#define AR_DestIdxValid     0x40000000
+#define AR_CTSEnable        0x80000000
+
+#define AR_BufLen           0x00000fff
+#define AR_TxMore           0x00001000
+#define AR_DestIdx          0x000fe000
+#define AR_DestIdx_S        13
+#define AR_FrameType        0x00f00000
+#define AR_FrameType_S      20
+#define AR_NoAck            0x01000000
+#define AR_InsertTS         0x02000000
+#define AR_CorruptFCS       0x04000000
+#define AR_ExtOnly          0x08000000
+#define AR_ExtAndCtl        0x10000000
+#define AR_MoreAggr         0x20000000
+#define AR_IsAggr           0x40000000
+
+#define AR_BurstDur         0x00007fff
+#define AR_BurstDur_S       0
+#define AR_DurUpdateEna     0x00008000
+#define AR_XmitDataTries0   0x000f0000
+#define AR_XmitDataTries0_S 16
+#define AR_XmitDataTries1   0x00f00000
+#define AR_XmitDataTries1_S 20
+#define AR_XmitDataTries2   0x0f000000
+#define AR_XmitDataTries2_S 24
+#define AR_XmitDataTries3   0xf0000000
+#define AR_XmitDataTries3_S 28
+
+#define AR_XmitRate0        0x000000ff
+#define AR_XmitRate0_S      0
+#define AR_XmitRate1        0x0000ff00
+#define AR_XmitRate1_S      8
+#define AR_XmitRate2        0x00ff0000
+#define AR_XmitRate2_S      16
+#define AR_XmitRate3        0xff000000
+#define AR_XmitRate3_S      24
+
+#define AR_PacketDur0       0x00007fff
+#define AR_PacketDur0_S     0
+#define AR_RTSCTSQual0      0x00008000
+#define AR_PacketDur1       0x7fff0000
+#define AR_PacketDur1_S     16
+#define AR_RTSCTSQual1      0x80000000
+
+#define AR_PacketDur2       0x00007fff
+#define AR_PacketDur2_S     0
+#define AR_RTSCTSQual2      0x00008000
+#define AR_PacketDur3       0x7fff0000
+#define AR_PacketDur3_S     16
+#define AR_RTSCTSQual3      0x80000000
+
+#define AR_AggrLen          0x0000ffff
+#define AR_AggrLen_S        0
+#define AR_TxCtlRsvd60      0x00030000
+#define AR_PadDelim         0x03fc0000
+#define AR_PadDelim_S       18
+#define AR_EncrType         0x0c000000
+#define AR_EncrType_S       26
+#define AR_TxCtlRsvd61      0xf0000000
+
+#define AR_2040_0           0x00000001
+#define AR_GI0              0x00000002
+#define AR_ChainSel0        0x0000001c
+#define AR_ChainSel0_S      2
+#define AR_2040_1           0x00000020
+#define AR_GI1              0x00000040
+#define AR_ChainSel1        0x00000380
+#define AR_ChainSel1_S      7
+#define AR_2040_2           0x00000400
+#define AR_GI2              0x00000800
+#define AR_ChainSel2        0x00007000
+#define AR_ChainSel2_S      12
+#define AR_2040_3           0x00008000
+#define AR_GI3              0x00010000
+#define AR_ChainSel3        0x000e0000
+#define AR_ChainSel3_S      17
+#define AR_RTSCTSRate       0x0ff00000
+#define AR_RTSCTSRate_S     20
+#define AR_TxCtlRsvd70      0xf0000000
+
+#define AR_TxRSSIAnt00      0x000000ff
+#define AR_TxRSSIAnt00_S    0
+#define AR_TxRSSIAnt01      0x0000ff00
+#define AR_TxRSSIAnt01_S    8
+#define AR_TxRSSIAnt02      0x00ff0000
+#define AR_TxRSSIAnt02_S    16
+#define AR_TxStatusRsvd00   0x3f000000
+#define AR_TxBaStatus       0x40000000
+#define AR_TxStatusRsvd01   0x80000000
+
+#define AR_FrmXmitOK            0x00000001
+#define AR_ExcessiveRetries     0x00000002
+#define AR_FIFOUnderrun         0x00000004
+#define AR_Filtered             0x00000008
+#define AR_RTSFailCnt           0x000000f0
+#define AR_RTSFailCnt_S         4
+#define AR_DataFailCnt          0x00000f00
+#define AR_DataFailCnt_S        8
+#define AR_VirtRetryCnt         0x0000f000
+#define AR_VirtRetryCnt_S       12
+#define AR_TxDelimUnderrun      0x00010000
+#define AR_TxDataUnderrun       0x00020000
+#define AR_DescCfgErr           0x00040000
+#define AR_TxTimerExpired       0x00080000
+#define AR_TxStatusRsvd10       0xfff00000
+
+#define AR_SendTimestamp    ds_txstatus2
+#define AR_BaBitmapLow      ds_txstatus3
+#define AR_BaBitmapHigh     ds_txstatus4
+
+#define AR_TxRSSIAnt10      0x000000ff
+#define AR_TxRSSIAnt10_S    0
+#define AR_TxRSSIAnt11      0x0000ff00
+#define AR_TxRSSIAnt11_S    8
+#define AR_TxRSSIAnt12      0x00ff0000
+#define AR_TxRSSIAnt12_S    16
+#define AR_TxRSSICombined   0xff000000
+#define AR_TxRSSICombined_S 24
+
+#define AR_TxEVM0           ds_txstatus5
+#define AR_TxEVM1           ds_txstatus6
+#define AR_TxEVM2           ds_txstatus7
+
+#define AR_TxDone           0x00000001
+#define AR_SeqNum           0x00001ffe
+#define AR_SeqNum_S         1
+#define AR_TxStatusRsvd80   0x0001e000
+#define AR_TxOpExceeded     0x00020000
+#define AR_TxStatusRsvd81   0x001c0000
+#define AR_FinalTxIdx       0x00600000
+#define AR_FinalTxIdx_S     21
+#define AR_TxStatusRsvd82   0x01800000
+#define AR_PowerMgmt        0x02000000
+#define AR_TxStatusRsvd83   0xfc000000
+
+#define AR_RxCTLRsvd00  0xffffffff
+
+#define AR_BufLen       0x00000fff
+#define AR_RxCtlRsvd00  0x00001000
+#define AR_RxIntrReq    0x00002000
+#define AR_RxCtlRsvd01  0xffffc000
+
+#define AR_RxRSSIAnt00      0x000000ff
+#define AR_RxRSSIAnt00_S    0
+#define AR_RxRSSIAnt01      0x0000ff00
+#define AR_RxRSSIAnt01_S    8
+#define AR_RxRSSIAnt02      0x00ff0000
+#define AR_RxRSSIAnt02_S    16
+#define AR_RxRate           0xff000000
+#define AR_RxRate_S         24
+#define AR_RxStatusRsvd00   0xff000000
+
+#define AR_DataLen          0x00000fff
+#define AR_RxMore           0x00001000
+#define AR_NumDelim         0x003fc000
+#define AR_NumDelim_S       14
+#define AR_RxStatusRsvd10   0xff800000
+
+#define AR_RcvTimestamp     ds_rxstatus2
+
+#define AR_GI               0x00000001
+#define AR_2040             0x00000002
+#define AR_Parallel40       0x00000004
+#define AR_Parallel40_S     2
+#define AR_RxStatusRsvd30   0x000000f8
+#define AR_RxAntenna        0xffffff00
+#define AR_RxAntenna_S      8
+
+#define AR_RxRSSIAnt10            0x000000ff
+#define AR_RxRSSIAnt10_S          0
+#define AR_RxRSSIAnt11            0x0000ff00
+#define AR_RxRSSIAnt11_S          8
+#define AR_RxRSSIAnt12            0x00ff0000
+#define AR_RxRSSIAnt12_S          16
+#define AR_RxRSSICombined         0xff000000
+#define AR_RxRSSICombined_S       24
+
+#define AR_RxEVM0           ds_rxstatus4
+#define AR_RxEVM1           ds_rxstatus5
+#define AR_RxEVM2           ds_rxstatus6
+
+#define AR_RxDone           0x00000001
+#define AR_RxFrameOK        0x00000002
+#define AR_CRCErr           0x00000004
+#define AR_DecryptCRCErr    0x00000008
+#define AR_PHYErr           0x00000010
+#define AR_MichaelErr       0x00000020
+#define AR_PreDelimCRCErr   0x00000040
+#define AR_RxStatusRsvd70   0x00000080
+#define AR_RxKeyIdxValid    0x00000100
+#define AR_KeyIdx           0x0000fe00
+#define AR_KeyIdx_S         9
+#define AR_PHYErrCode       0x0000ff00
+#define AR_PHYErrCode_S     8
+#define AR_RxMoreAggr       0x00010000
+#define AR_RxAggr           0x00020000
+#define AR_PostDelimCRCErr  0x00040000
+#define AR_RxStatusRsvd71   0x3ff80000
+#define AR_DecryptBusyErr   0x40000000
+#define AR_KeyMiss          0x80000000
+
+#define AR5416_MAGIC        0x19641014
+
+#define RXSTATUS_RATE(ah, ads)  (AR_SREV_5416_V20_OR_LATER(ah) ?        \
+                                 MS(ads->ds_rxstatus0, AR_RxRate) :     \
+                                 (ads->ds_rxstatus3 >> 2) & 0xFF)
+#define RXSTATUS_DUPLICATE(ah, ads)  (AR_SREV_5416_V20_OR_LATER(ah) ?   \
+                                      MS(ads->ds_rxstatus3, AR_Parallel40) : \
+                                      (ads->ds_rxstatus3 >> 10) & 0x1)
+
+#define set11nTries(_series, _index)                            \
+        (SM((_series)[_index].Tries, AR_XmitDataTries##_index))
+
+#define set11nRate(_series, _index)                             \
+        (SM((_series)[_index].Rate, AR_XmitRate##_index))
+
+#define set11nPktDurRTSCTS(_series, _index)                             \
+        (SM((_series)[_index].PktDuration, AR_PacketDur##_index) |      \
+        ((_series)[_index].RateFlags & ATH9K_RATESERIES_RTS_CTS   ?     \
+                AR_RTSCTSQual##_index : 0))
+
+#define set11nRateFlags(_series, _index)                                \
+        (((_series)[_index].RateFlags & ATH9K_RATESERIES_2040 ? \
+                AR_2040_##_index : 0) \
+        |((_series)[_index].RateFlags & ATH9K_RATESERIES_HALFGI ? \
+                AR_GI##_index : 0) \
+        |SM((_series)[_index].ChSel, AR_ChainSel##_index))
+
+#define AR_SREV_9100(ah) ((ah->ah_macVersion) == AR_SREV_VERSION_9100)
+
+#define INIT_CONFIG_STATUS  0x00000000
+#define INIT_RSSI_THR       0x00000700
+#define INIT_BCON_CNTRL_REG 0x00000000
+
+#define MIN_TX_FIFO_THRESHOLD   0x1
+#define MAX_TX_FIFO_THRESHOLD   ((4096 / 64) - 1)
+#define INIT_TX_FIFO_THRESHOLD  MIN_TX_FIFO_THRESHOLD
+
+#define NUM_CORNER_FIX_BITS_2133    7
+#define CCK_OFDM_GAIN_DELTA         15
+
+struct ar5416AniState {
+        struct ath9k_channel c;
+        u8 noiseImmunityLevel;
+        u8 spurImmunityLevel;
+        u8 firstepLevel;
+        u8 ofdmWeakSigDetectOff;
+        u8 cckWeakSigThreshold;
+        u32 listenTime;
+        u32 ofdmTrigHigh;
+        u32 ofdmTrigLow;
+        int32_t cckTrigHigh;
+        int32_t cckTrigLow;
+        int32_t rssiThrLow;
+        int32_t rssiThrHigh;
+        u32 noiseFloor;
+        u32 txFrameCount;
+        u32 rxFrameCount;
+        u32 cycleCount;
+        u32 ofdmPhyErrCount;
+        u32 cckPhyErrCount;
+        u32 ofdmPhyErrBase;
+        u32 cckPhyErrBase;
+        int16_t pktRssi[2];
+        int16_t ofdmErrRssi[2];
+        int16_t cckErrRssi[2];
+};
+
+#define HAL_PROCESS_ANI     0x00000001
+#define HAL_RADAR_EN        0x80000000
+#define HAL_AR_EN           0x40000000
+
+#define DO_ANI(ah) \
+    ((AH5416(ah)->ah_procPhyErr & HAL_PROCESS_ANI))
+
+struct ar5416Stats {
+        u32 ast_ani_niup;
+        u32 ast_ani_nidown;
+        u32 ast_ani_spurup;
+        u32 ast_ani_spurdown;
+        u32 ast_ani_ofdmon;
+        u32 ast_ani_ofdmoff;
+        u32 ast_ani_cckhigh;
+        u32 ast_ani_ccklow;
+        u32 ast_ani_stepup;
+        u32 ast_ani_stepdown;
+        u32 ast_ani_ofdmerrs;
+        u32 ast_ani_cckerrs;
+        u32 ast_ani_reset;
+        u32 ast_ani_lzero;
+        u32 ast_ani_lneg;
+        struct ath9k_mib_stats ast_mibstats;
+        struct ath9k_node_stats ast_nodestats;
+};
+
+#define AR5416_OPFLAGS_11A           0x01
+#define AR5416_OPFLAGS_11G           0x02
+#define AR5416_OPFLAGS_N_5G_HT40     0x04
+#define AR5416_OPFLAGS_N_2G_HT40     0x08
+#define AR5416_OPFLAGS_N_5G_HT20     0x10
+#define AR5416_OPFLAGS_N_2G_HT20     0x20
+
+#define EEP_RFSILENT_ENABLED        0x0001
+#define EEP_RFSILENT_ENABLED_S      0
+#define EEP_RFSILENT_POLARITY       0x0002
+#define EEP_RFSILENT_POLARITY_S     1
+#define EEP_RFSILENT_GPIO_SEL       0x001c
+#define EEP_RFSILENT_GPIO_SEL_S     2
+
+#define AR5416_EEP_NO_BACK_VER       0x1
+#define AR5416_EEP_VER               0xE
+#define AR5416_EEP_VER_MINOR_MASK    0x0FFF
+#define AR5416_EEP_MINOR_VER_2       0x2
+#define AR5416_EEP_MINOR_VER_3       0x3
+#define AR5416_EEP_MINOR_VER_7       0x7
+#define AR5416_EEP_MINOR_VER_9       0x9
+
+#define AR5416_EEP_START_LOC            256
+#define AR5416_NUM_5G_CAL_PIERS         8
+#define AR5416_NUM_2G_CAL_PIERS         4
+#define AR5416_NUM_5G_20_TARGET_POWERS  8
+#define AR5416_NUM_5G_40_TARGET_POWERS  8
+#define AR5416_NUM_2G_CCK_TARGET_POWERS 3
+#define AR5416_NUM_2G_20_TARGET_POWERS  4
+#define AR5416_NUM_2G_40_TARGET_POWERS  4
+#define AR5416_NUM_CTLS                 24
+#define AR5416_NUM_BAND_EDGES           8
+#define AR5416_NUM_PD_GAINS             4
+#define AR5416_PD_GAINS_IN_MASK         4
+#define AR5416_PD_GAIN_ICEPTS           5
+#define AR5416_EEPROM_MODAL_SPURS       5
+#define AR5416_MAX_RATE_POWER           63
+#define AR5416_NUM_PDADC_VALUES         128
+#define AR5416_NUM_RATES                16
+#define AR5416_BCHAN_UNUSED             0xFF
+#define AR5416_MAX_PWR_RANGE_IN_HALF_DB 64
+#define AR5416_EEPMISC_BIG_ENDIAN       0x01
+#define AR5416_MAX_CHAINS               3
+#define AR5416_ANT_16S                  25
+
+#define AR5416_NUM_ANT_CHAIN_FIELDS     7
+#define AR5416_NUM_ANT_COMMON_FIELDS    4
+#define AR5416_SIZE_ANT_CHAIN_FIELD     3
+#define AR5416_SIZE_ANT_COMMON_FIELD    4
+#define AR5416_ANT_CHAIN_MASK           0x7
+#define AR5416_ANT_COMMON_MASK          0xf
+#define AR5416_CHAIN_0_IDX              0
+#define AR5416_CHAIN_1_IDX              1
+#define AR5416_CHAIN_2_IDX              2
+
+#define AR5416_PWR_TABLE_OFFSET         -5
+#define AR5416_LEGACY_CHAINMASK         1
+
+enum eeprom_param {
+        EEP_NFTHRESH_5,
+        EEP_NFTHRESH_2,
+        EEP_MAC_MSW,
+        EEP_MAC_MID,
+        EEP_MAC_LSW,
+        EEP_REG_0,
+        EEP_REG_1,
+        EEP_OP_CAP,
+        EEP_OP_MODE,
+        EEP_RF_SILENT,
+        EEP_OB_5,
+        EEP_DB_5,
+        EEP_OB_2,
+        EEP_DB_2,
+        EEP_MINOR_REV,
+        EEP_TX_MASK,
+        EEP_RX_MASK,
+};
+
+enum ar5416_rates {
+        rate6mb, rate9mb, rate12mb, rate18mb,
+        rate24mb, rate36mb, rate48mb, rate54mb,
+        rate1l, rate2l, rate2s, rate5_5l,
+        rate5_5s, rate11l, rate11s, rateXr,
+        rateHt20_0, rateHt20_1, rateHt20_2, rateHt20_3,
+        rateHt20_4, rateHt20_5, rateHt20_6, rateHt20_7,
+        rateHt40_0, rateHt40_1, rateHt40_2, rateHt40_3,
+        rateHt40_4, rateHt40_5, rateHt40_6, rateHt40_7,
+        rateDupCck, rateDupOfdm, rateExtCck, rateExtOfdm,
+        Ar5416RateSize
+};
+
+struct base_eep_header {
+        u16 length;
+        u16 checksum;
+        u16 version;
+        u8 opCapFlags;
+        u8 eepMisc;
+        u16 regDmn[2];
+        u8 macAddr[6];
+        u8 rxMask;
+        u8 txMask;
+        u16 rfSilent;
+        u16 blueToothOptions;
+        u16 deviceCap;
+        u32 binBuildNumber;
+        u8 deviceType;
+        u8 pwdclkind;
+        u8 futureBase[32];
+} __packed;
+
+struct spur_chan {
+        u16 spurChan;
+        u8 spurRangeLow;
+        u8 spurRangeHigh;
+} __packed;
+
+struct modal_eep_header {
+        u32 antCtrlChain[AR5416_MAX_CHAINS];
+        u32 antCtrlCommon;
+        u8 antennaGainCh[AR5416_MAX_CHAINS];
+        u8 switchSettling;
+        u8 txRxAttenCh[AR5416_MAX_CHAINS];
+        u8 rxTxMarginCh[AR5416_MAX_CHAINS];
+        u8 adcDesiredSize;
+        u8 pgaDesiredSize;
+        u8 xlnaGainCh[AR5416_MAX_CHAINS];
+        u8 txEndToXpaOff;
+        u8 txEndToRxOn;
+        u8 txFrameToXpaOn;
+        u8 thresh62;
+        u8 noiseFloorThreshCh[AR5416_MAX_CHAINS];
+        u8 xpdGain;
+        u8 xpd;
+        u8 iqCalICh[AR5416_MAX_CHAINS];
+        u8 iqCalQCh[AR5416_MAX_CHAINS];
+        u8 pdGainOverlap;
+        u8 ob;
+        u8 db;
+        u8 xpaBiasLvl;
+        u8 pwrDecreaseFor2Chain;
+        u8 pwrDecreaseFor3Chain;
+        u8 txFrameToDataStart;
+        u8 txFrameToPaOn;
+        u8 ht40PowerIncForPdadc;
+        u8 bswAtten[AR5416_MAX_CHAINS];
+        u8 bswMargin[AR5416_MAX_CHAINS];
+        u8 swSettleHt40;
+        u8 xatten2Db[AR5416_MAX_CHAINS];
+        u8 xatten2Margin[AR5416_MAX_CHAINS];
+        u8 ob_ch1;
+        u8 db_ch1;
+        u8 useAnt1:1,
+            force_xpaon:1,
+            local_bias:1,
+            femBandSelectUsed:1, xlnabufin:1, xlnaisel:2, xlnabufmode:1;
+        u8 futureModalar9280;
+        u16 xpaBiasLvlFreq[3];
+        u8 futureModal[6];
+
+        struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
+} __packed;
+
+struct cal_data_per_freq {
+        u8 pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
+        u8 vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
+} __packed;
+
+struct cal_target_power_leg {
+        u8 bChannel;
+        u8 tPow2x[4];
+} __packed;
+
+struct cal_target_power_ht {
+        u8 bChannel;
+        u8 tPow2x[8];
+} __packed;
+
+#ifdef __BIG_ENDIAN_BITFIELD
+struct cal_ctl_edges {
+        u8 bChannel;
+        u8 flag:2, tPower:6;
+} __packed;
+#else
+struct cal_ctl_edges {
+        u8 bChannel;
+        u8 tPower:6, flag:2;
+} __packed;
+#endif
+
+struct cal_ctl_data {
+        struct cal_ctl_edges
+         ctlEdges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES];
+} __packed;
+
+struct ar5416_eeprom {
+        struct base_eep_header baseEepHeader;
+        u8 custData[64];
+        struct modal_eep_header modalHeader[2];
+        u8 calFreqPier5G[AR5416_NUM_5G_CAL_PIERS];
+        u8 calFreqPier2G[AR5416_NUM_2G_CAL_PIERS];
+        struct cal_data_per_freq
+         calPierData5G[AR5416_MAX_CHAINS][AR5416_NUM_5G_CAL_PIERS];
+        struct cal_data_per_freq
+         calPierData2G[AR5416_MAX_CHAINS][AR5416_NUM_2G_CAL_PIERS];
+        struct cal_target_power_leg
+         calTargetPower5G[AR5416_NUM_5G_20_TARGET_POWERS];
+        struct cal_target_power_ht
+         calTargetPower5GHT20[AR5416_NUM_5G_20_TARGET_POWERS];
+        struct cal_target_power_ht
+         calTargetPower5GHT40[AR5416_NUM_5G_40_TARGET_POWERS];
+        struct cal_target_power_leg
+         calTargetPowerCck[AR5416_NUM_2G_CCK_TARGET_POWERS];
+        struct cal_target_power_leg
+         calTargetPower2G[AR5416_NUM_2G_20_TARGET_POWERS];
+        struct cal_target_power_ht
+         calTargetPower2GHT20[AR5416_NUM_2G_20_TARGET_POWERS];
+        struct cal_target_power_ht
+         calTargetPower2GHT40[AR5416_NUM_2G_40_TARGET_POWERS];
+        u8 ctlIndex[AR5416_NUM_CTLS];
+        struct cal_ctl_data ctlData[AR5416_NUM_CTLS];
+        u8 padding;
+} __packed;
+
+struct ar5416IniArray {
+        u32 *ia_array;
+        u32 ia_rows;
+        u32 ia_columns;
+};
+
+#define INIT_INI_ARRAY(iniarray, array, rows, columns) do {     \
+                (iniarray)->ia_array = (u32 *)(array);    \
+                (iniarray)->ia_rows = (rows);                   \
+                (iniarray)->ia_columns = (columns);             \
+        } while (0)
+
+#define INI_RA(iniarray, row, column) \
+        (((iniarray)->ia_array)[(row) * ((iniarray)->ia_columns) + (column)])
+
+#define INIT_CAL(_perCal) do { \
+                (_perCal)->calState = CAL_WAITING; \
+                (_perCal)->calNext = NULL; \
+        } while (0)
+
+#define INSERT_CAL(_ahp, _perCal)                                       \
+        do {                                                            \
+                if ((_ahp)->ah_cal_list_last == NULL) {                 \
+                        (_ahp)->ah_cal_list = \
+                                (_ahp)->ah_cal_list_last = (_perCal); \
+                        ((_ahp)->ah_cal_list_last)->calNext = (_perCal); \
+                } else {                                                \
+                        ((_ahp)->ah_cal_list_last)->calNext = (_perCal); \
+                        (_ahp)->ah_cal_list_last = (_perCal);           \
+                        (_perCal)->calNext = (_ahp)->ah_cal_list;       \
+                }                                                       \
+        } while (0)
+
+enum hal_cal_types {
+        ADC_DC_INIT_CAL = 0x1,
+        ADC_GAIN_CAL = 0x2,
+        ADC_DC_CAL = 0x4,
+        IQ_MISMATCH_CAL = 0x8
+};
+
+enum hal_cal_state {
+        CAL_INACTIVE,
+        CAL_WAITING,
+        CAL_RUNNING,
+        CAL_DONE
+};
+
+#define MIN_CAL_SAMPLES     1
+#define MAX_CAL_SAMPLES    64
+#define INIT_LOG_COUNT      5
+#define PER_MIN_LOG_COUNT   2
+#define PER_MAX_LOG_COUNT  10
+
+struct hal_percal_data {
+        enum hal_cal_types calType;
+        u32 calNumSamples;
+        u32 calCountMax;
+        void (*calCollect) (struct ath_hal *);
+        void (*calPostProc) (struct ath_hal *, u8);
+};
+
+struct hal_cal_list {
+        const struct hal_percal_data *calData;
+        enum hal_cal_state calState;
+        struct hal_cal_list *calNext;
+};
+
+struct ath_hal_5416 {
+        struct ath_hal ah;
+        struct ar5416_eeprom ah_eeprom;
+        u8 ah_macaddr[ETH_ALEN];
+        u8 ah_bssid[ETH_ALEN];
+        u8 ah_bssidmask[ETH_ALEN];
+        u16 ah_assocId;
+        int16_t ah_curchanRadIndex;
+        u32 ah_maskReg;
+        struct ar5416Stats ah_stats;
+        u32 ah_txDescMask;
+        u32 ah_txOkInterruptMask;
+        u32 ah_txErrInterruptMask;
+        u32 ah_txDescInterruptMask;
+        u32 ah_txEolInterruptMask;
+        u32 ah_txUrnInterruptMask;
+        struct ath9k_tx_queue_info ah_txq[ATH9K_NUM_TX_QUEUES];
+        enum ath9k_power_mode ah_powerMode;
+        bool ah_chipFullSleep;
+        u32 ah_atimWindow;
+        enum ath9k_ant_setting ah_diversityControl;
+        u16 ah_antennaSwitchSwap;
+        enum hal_cal_types ah_suppCals;
+        struct hal_cal_list ah_iqCalData;
+        struct hal_cal_list ah_adcGainCalData;
+        struct hal_cal_list ah_adcDcCalInitData;
+        struct hal_cal_list ah_adcDcCalData;
+        struct hal_cal_list *ah_cal_list;
+        struct hal_cal_list *ah_cal_list_last;
+        struct hal_cal_list *ah_cal_list_curr;
+#define ah_totalPowerMeasI ah_Meas0.unsign
+#define ah_totalPowerMeasQ ah_Meas1.unsign
+#define ah_totalIqCorrMeas ah_Meas2.sign
+#define ah_totalAdcIOddPhase  ah_Meas0.unsign
+#define ah_totalAdcIEvenPhase ah_Meas1.unsign
+#define ah_totalAdcQOddPhase  ah_Meas2.unsign
+#define ah_totalAdcQEvenPhase ah_Meas3.unsign
+#define ah_totalAdcDcOffsetIOddPhase  ah_Meas0.sign
+#define ah_totalAdcDcOffsetIEvenPhase ah_Meas1.sign
+#define ah_totalAdcDcOffsetQOddPhase  ah_Meas2.sign
+#define ah_totalAdcDcOffsetQEvenPhase ah_Meas3.sign
+        union {
+                u32 unsign[AR5416_MAX_CHAINS];
+                int32_t sign[AR5416_MAX_CHAINS];
+        } ah_Meas0;
+        union {
+                u32 unsign[AR5416_MAX_CHAINS];
+                int32_t sign[AR5416_MAX_CHAINS];
+        } ah_Meas1;
+        union {
+                u32 unsign[AR5416_MAX_CHAINS];
+                int32_t sign[AR5416_MAX_CHAINS];
+        } ah_Meas2;
+        union {
+                u32 unsign[AR5416_MAX_CHAINS];
+                int32_t sign[AR5416_MAX_CHAINS];
+        } ah_Meas3;
+        u16 ah_CalSamples;
+        u32 ah_tx6PowerInHalfDbm;
+        u32 ah_staId1Defaults;
+        u32 ah_miscMode;
+        bool ah_tpcEnabled;
+        u32 ah_beaconInterval;
+        enum {
+                AUTO_32KHZ,
+                USE_32KHZ,
+                DONT_USE_32KHZ,
+        } ah_enable32kHzClock;
+        u32 *ah_analogBank0Data;
+        u32 *ah_analogBank1Data;
+        u32 *ah_analogBank2Data;
+        u32 *ah_analogBank3Data;
+        u32 *ah_analogBank6Data;
+        u32 *ah_analogBank6TPCData;
+        u32 *ah_analogBank7Data;
+        u32 *ah_addac5416_21;
+        u32 *ah_bank6Temp;
+        u32 ah_ofdmTxPower;
+        int16_t ah_txPowerIndexOffset;
+        u32 ah_slottime;
+        u32 ah_acktimeout;
+        u32 ah_ctstimeout;
+        u32 ah_globaltxtimeout;
+        u8 ah_gBeaconRate;
+        u32 ah_gpioSelect;
+        u32 ah_polarity;
+        u32 ah_gpioBit;
+        bool ah_eepEnabled;
+        u32 ah_procPhyErr;
+        bool ah_hasHwPhyCounters;
+        u32 ah_aniPeriod;
+        struct ar5416AniState *ah_curani;
+        struct ar5416AniState ah_ani[255];
+        int ah_totalSizeDesired[5];
+        int ah_coarseHigh[5];
+        int ah_coarseLow[5];
+        int ah_firpwr[5];
+        u16 ah_ratesArray[16];
+        u32 ah_intrTxqs;
+        bool ah_intrMitigation;
+        u32 ah_cycleCount;
+        u32 ah_ctlBusy;
+        u32 ah_extBusy;
+        enum ath9k_ht_extprotspacing ah_extprotspacing;
+        u8 ah_txchainmask;
+        u8 ah_rxchainmask;
+        int ah_hwp;
+        void __iomem *ah_cal_mem;
+        enum ath9k_ani_cmd ah_ani_function;
+        struct ar5416IniArray ah_iniModes;
+        struct ar5416IniArray ah_iniCommon;
+        struct ar5416IniArray ah_iniBank0;
+        struct ar5416IniArray ah_iniBB_RfGain;
+        struct ar5416IniArray ah_iniBank1;
+        struct ar5416IniArray ah_iniBank2;
+        struct ar5416IniArray ah_iniBank3;
+        struct ar5416IniArray ah_iniBank6;
+        struct ar5416IniArray ah_iniBank6TPC;
+        struct ar5416IniArray ah_iniBank7;
+        struct ar5416IniArray ah_iniAddac;
+        struct ar5416IniArray ah_iniPcieSerdes;
+        struct ar5416IniArray ah_iniModesAdditional;
+};
+#define AH5416(_ah) ((struct ath_hal_5416 *)(_ah))
+
+#define FREQ2FBIN(x, y) ((y) ? ((x) - 2300) : (((x) - 4800) / 5))
+
+#define IS_5416_EMU(ah)                                 \
+        ((ah->ah_devid == AR5416_DEVID_EMU) ||          \
+         (ah->ah_devid == AR5416_DEVID_EMU_PCIE))
+
+#define ar5416RfDetach(ah) do {                                 \
+                if (AH5416(ah)->ah_rfHal.rfDetach != NULL)      \
+                        AH5416(ah)->ah_rfHal.rfDetach(ah);      \
+        } while (0)
+
+#define ath9k_hw_use_flash(_ah)                 \
+        (!(_ah->ah_flags & AH_USE_EEPROM))
+
+
+#define DO_DELAY(x) do {                        \
+                if ((++(x) % 64) == 0)          \
+                        udelay(1);              \
+        } while (0)
+
+#define REG_WRITE_ARRAY(iniarray, column, regWr) do {                   \
+                int r;                                                  \
+                for (r = 0; r < ((iniarray)->ia_rows); r++) {           \
+                        REG_WRITE(ah, INI_RA((iniarray), (r), 0), \
+                                INI_RA((iniarray), r, (column))); \
+                        DO_DELAY(regWr);                                \
+                }                                                       \
+        } while (0)
+
+#define BASE_ACTIVATE_DELAY         100
+#define RTC_PLL_SETTLE_DELAY        1000
+#define COEF_SCALE_S                24
+#define HT40_CHANNEL_CENTER_SHIFT   10
+
+#define ar5416CheckOpMode(_opmode)                                      \
+        ((_opmode == ATH9K_M_STA) || (_opmode == ATH9K_M_IBSS) ||       \
+         (_opmode == ATH9K_M_HOSTAP) || (_opmode == ATH9K_M_MONITOR))
+
+#define AR5416_EEPROM_MAGIC_OFFSET  0x0
+
+#define AR5416_EEPROM_S             2
+#define AR5416_EEPROM_OFFSET        0x2000
+#define AR5416_EEPROM_START_ADDR                        \
+        (AR_SREV_9100(ah)) ? 0x1fff1000 : 0x503f1200
+#define AR5416_EEPROM_MAX           0xae0
+#define ar5416_get_eep_ver(_ahp)                                \
+        (((_ahp)->ah_eeprom.baseEepHeader.version >> 12) & 0xF)
+#define ar5416_get_eep_rev(_ahp)                                \
+        (((_ahp)->ah_eeprom.baseEepHeader.version) & 0xFFF)
+#define ar5416_get_ntxchains(_txchainmask)                              \
+        (((_txchainmask >> 2) & 1) + \
+                ((_txchainmask >> 1) & 1) + (_txchainmask & 1))
+
+#define IS_EEP_MINOR_V3(_ahp) \
+        (ath9k_hw_get_eeprom((_ahp), EEP_MINOR_REV)  >= AR5416_EEP_MINOR_VER_3)
+
+#define FIXED_CCA_THRESHOLD 15
+
+#ifdef __BIG_ENDIAN
+#define AR5416_EEPROM_MAGIC 0x5aa5
+#else
+#define AR5416_EEPROM_MAGIC 0xa55a
+#endif
+
+#define ATH9K_POW_SM(_r, _s)     (((_r) & 0x3f) << (_s))
+
+#define ATH9K_ANTENNA0_CHAINMASK        0x1
+#define ATH9K_ANTENNA1_CHAINMASK        0x2
+
+#define ATH9K_NUM_DMA_DEBUG_REGS        8
+#define ATH9K_NUM_QUEUES                10
+
+#define HAL_NOISE_IMMUNE_MAX            4
+#define HAL_SPUR_IMMUNE_MAX             7
+#define HAL_FIRST_STEP_MAX              2
+
+#define ATH9K_ANI_OFDM_TRIG_HIGH          500
+#define ATH9K_ANI_OFDM_TRIG_LOW           200
+#define ATH9K_ANI_CCK_TRIG_HIGH           200
+#define ATH9K_ANI_CCK_TRIG_LOW            100
+#define ATH9K_ANI_NOISE_IMMUNE_LVL        4
+#define ATH9K_ANI_USE_OFDM_WEAK_SIG       true
+#define ATH9K_ANI_CCK_WEAK_SIG_THR        false
+#define ATH9K_ANI_SPUR_IMMUNE_LVL         7
+#define ATH9K_ANI_FIRSTEP_LVL             0
+#define ATH9K_ANI_RSSI_THR_HIGH           40
+#define ATH9K_ANI_RSSI_THR_LOW            7
+#define ATH9K_ANI_PERIOD                  100
+
+#define AR_GPIOD_MASK                   0x00001FFF
+#define AR_GPIO_BIT(_gpio)              (1 << (_gpio))
+
+#define MAX_ANALOG_START                319
+
+#define HAL_EP_RND(x, mul) \
+        ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
+#define BEACON_RSSI(ahp) \
+        HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \
+                ATH9K_RSSI_EP_MULTIPLIER)
+
+#define ah_mibStats     ah_stats.ast_mibstats
+
+#define AH_TIMEOUT         100000
+#define AH_TIME_QUANTUM        10
+
+#define IS(_c, _f)       (((_c)->channelFlags & _f) || 0)
+
+#define AR_KEYTABLE_SIZE 128
+#define POWER_UP_TIME    200000
+
+#define EXT_ADDITIVE (0x8000)
+#define CTL_11A_EXT (CTL_11A | EXT_ADDITIVE)
+#define CTL_11G_EXT (CTL_11G | EXT_ADDITIVE)
+#define CTL_11B_EXT (CTL_11B | EXT_ADDITIVE)
+
+#define SUB_NUM_CTL_MODES_AT_5G_40 2
+#define SUB_NUM_CTL_MODES_AT_2G_40 3
+#define SPUR_RSSI_THRESH 40
+
+#define TU_TO_USEC(_tu)         ((_tu) << 10)
+
+#define CAB_TIMEOUT_VAL         10
+#define BEACON_TIMEOUT_VAL      10
+#define MIN_BEACON_TIMEOUT_VAL   1
+#define SLEEP_SLOP               3
+
+#define CCK_SIFS_TIME        10
+#define CCK_PREAMBLE_BITS   144
+#define CCK_PLCP_BITS        48
+
+#define OFDM_SIFS_TIME        16
+#define OFDM_PREAMBLE_TIME    20
+#define OFDM_PLCP_BITS        22
+#define OFDM_SYMBOL_TIME      4
+
+#define OFDM_SIFS_TIME_HALF     32
+#define OFDM_PREAMBLE_TIME_HALF 40
+#define OFDM_PLCP_BITS_HALF     22
+#define OFDM_SYMBOL_TIME_HALF   8
+
+#define OFDM_SIFS_TIME_QUARTER      64
+#define OFDM_PREAMBLE_TIME_QUARTER  80
+#define OFDM_PLCP_BITS_QUARTER      22
+#define OFDM_SYMBOL_TIME_QUARTER    16
+
+u32 ath9k_hw_get_eeprom(struct ath_hal_5416 *ahp,
+                              enum eeprom_param param);
+
+#endif
diff --git a/drivers/net/wireless/ath9k/initvals.h b/drivers/net/wireless/ath9k/initvals.h
new file mode 100644
index 000000000000..3dd3815940a4
--- /dev/null
+++ b/drivers/net/wireless/ath9k/initvals.h
@@ -0,0 +1,3146 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+static const u32 ar5416Modes_9100[][6] = {
+    { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 },
+    { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 },
+    { 0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180 },
+    { 0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008 },
+    { 0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0 },
+    { 0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab, 0x098813cf },
+    { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
+    { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
+    { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
+    { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 },
+    { 0x00009844, 0x1372161e, 0x1372161e, 0x137216a0, 0x137216a0, 0x137216a0 },
+    { 0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x00009850, 0x6de8b4e0, 0x6de8b4e0, 0x6de8b0de, 0x6de8b0de, 0x6de8b0de },
+    { 0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e },
+    { 0x0000985c, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e },
+    { 0x00009860, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18 },
+    { 0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
+    { 0x00009868, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190 },
+    { 0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 },
+    { 0x00009914, 0x000007d0, 0x000007d0, 0x00000898, 0x00000898, 0x000007d0 },
+    { 0x00009918, 0x000001b8, 0x00000370, 0x00000268, 0x00000134, 0x00000134 },
+    { 0x00009924, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b },
+    { 0x00009944, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020 },
+    { 0x00009960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80 },
+    { 0x0000a960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80 },
+    { 0x0000b960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80 },
+    { 0x00009964, 0x00000000, 0x00000000, 0x00001120, 0x00001120, 0x00001120 },
+    { 0x0000c9bc, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00 },
+    { 0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be, 0x038919be },
+    { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 },
+    { 0x000099c8, 0x60f6532c, 0x60f6532c, 0x60f6532c, 0x60f6532c, 0x60f6532c },
+    { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 },
+    { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 },
+    { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880, 0x00000880 },
+    { 0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788, 0xd03e4788 },
+    { 0x0000a20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000b20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000c20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a },
+    { 0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000 },
+    { 0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa, 0x0a1a7caa },
+    { 0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000, 0x18010000 },
+    { 0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402, 0x2e032402 },
+    { 0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06, 0x4a0a3c06 },
+    { 0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b, 0x621a540b },
+    { 0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b, 0x764f6c1b },
+    { 0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a, 0x845b7a5a },
+    { 0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf, 0x950f8ccf },
+    { 0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f, 0xa5cf9b4f },
+    { 0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f, 0xbddfaf1f },
+    { 0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f, 0xd1ffc93f },
+    { 0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+};
+
+static const u32 ar5416Common_9100[][2] = {
+    { 0x0000000c, 0x00000000 },
+    { 0x00000030, 0x00020015 },
+    { 0x00000034, 0x00000005 },
+    { 0x00000040, 0x00000000 },
+    { 0x00000044, 0x00000008 },
+    { 0x00000048, 0x00000008 },
+    { 0x0000004c, 0x00000010 },
+    { 0x00000050, 0x00000000 },
+    { 0x00000054, 0x0000001f },
+    { 0x00000800, 0x00000000 },
+    { 0x00000804, 0x00000000 },
+    { 0x00000808, 0x00000000 },
+    { 0x0000080c, 0x00000000 },
+    { 0x00000810, 0x00000000 },
+    { 0x00000814, 0x00000000 },
+    { 0x00000818, 0x00000000 },
+    { 0x0000081c, 0x00000000 },
+    { 0x00000820, 0x00000000 },
+    { 0x00000824, 0x00000000 },
+    { 0x00001040, 0x002ffc0f },
+    { 0x00001044, 0x002ffc0f },
+    { 0x00001048, 0x002ffc0f },
+    { 0x0000104c, 0x002ffc0f },
+    { 0x00001050, 0x002ffc0f },
+    { 0x00001054, 0x002ffc0f },
+    { 0x00001058, 0x002ffc0f },
+    { 0x0000105c, 0x002ffc0f },
+    { 0x00001060, 0x002ffc0f },
+    { 0x00001064, 0x002ffc0f },
+    { 0x00001230, 0x00000000 },
+    { 0x00001270, 0x00000000 },
+    { 0x00001038, 0x00000000 },
+    { 0x00001078, 0x00000000 },
+    { 0x000010b8, 0x00000000 },
+    { 0x000010f8, 0x00000000 },
+    { 0x00001138, 0x00000000 },
+    { 0x00001178, 0x00000000 },
+    { 0x000011b8, 0x00000000 },
+    { 0x000011f8, 0x00000000 },
+    { 0x00001238, 0x00000000 },
+    { 0x00001278, 0x00000000 },
+    { 0x000012b8, 0x00000000 },
+    { 0x000012f8, 0x00000000 },
+    { 0x00001338, 0x00000000 },
+    { 0x00001378, 0x00000000 },
+    { 0x000013b8, 0x00000000 },
+    { 0x000013f8, 0x00000000 },
+    { 0x00001438, 0x00000000 },
+    { 0x00001478, 0x00000000 },
+    { 0x000014b8, 0x00000000 },
+    { 0x000014f8, 0x00000000 },
+    { 0x00001538, 0x00000000 },
+    { 0x00001578, 0x00000000 },
+    { 0x000015b8, 0x00000000 },
+    { 0x000015f8, 0x00000000 },
+    { 0x00001638, 0x00000000 },
+    { 0x00001678, 0x00000000 },
+    { 0x000016b8, 0x00000000 },
+    { 0x000016f8, 0x00000000 },
+    { 0x00001738, 0x00000000 },
+    { 0x00001778, 0x00000000 },
+    { 0x000017b8, 0x00000000 },
+    { 0x000017f8, 0x00000000 },
+    { 0x0000103c, 0x00000000 },
+    { 0x0000107c, 0x00000000 },
+    { 0x000010bc, 0x00000000 },
+    { 0x000010fc, 0x00000000 },
+    { 0x0000113c, 0x00000000 },
+    { 0x0000117c, 0x00000000 },
+    { 0x000011bc, 0x00000000 },
+    { 0x000011fc, 0x00000000 },
+    { 0x0000123c, 0x00000000 },
+    { 0x0000127c, 0x00000000 },
+    { 0x000012bc, 0x00000000 },
+    { 0x000012fc, 0x00000000 },
+    { 0x0000133c, 0x00000000 },
+    { 0x0000137c, 0x00000000 },
+    { 0x000013bc, 0x00000000 },
+    { 0x000013fc, 0x00000000 },
+    { 0x0000143c, 0x00000000 },
+    { 0x0000147c, 0x00000000 },
+    { 0x00004030, 0x00000002 },
+    { 0x0000403c, 0x00000002 },
+    { 0x00007010, 0x00000000 },
+    { 0x00007038, 0x000004c2 },
+    { 0x00008004, 0x00000000 },
+    { 0x00008008, 0x00000000 },
+    { 0x0000800c, 0x00000000 },
+    { 0x00008018, 0x00000700 },
+    { 0x00008020, 0x00000000 },
+    { 0x00008038, 0x00000000 },
+    { 0x0000803c, 0x00000000 },
+    { 0x00008048, 0x40000000 },
+    { 0x00008054, 0x00000000 },
+    { 0x00008058, 0x00000000 },
+    { 0x0000805c, 0x000fc78f },
+    { 0x00008060, 0x0000000f },
+    { 0x00008064, 0x00000000 },
+    { 0x000080c0, 0x2a82301a },
+    { 0x000080c4, 0x05dc01e0 },
+    { 0x000080c8, 0x1f402710 },
+    { 0x000080cc, 0x01f40000 },
+    { 0x000080d0, 0x00001e00 },
+    { 0x000080d4, 0x00000000 },
+    { 0x000080d8, 0x00400000 },
+    { 0x000080e0, 0xffffffff },
+    { 0x000080e4, 0x0000ffff },
+    { 0x000080e8, 0x003f3f3f },
+    { 0x000080ec, 0x00000000 },
+    { 0x000080f0, 0x00000000 },
+    { 0x000080f4, 0x00000000 },
+    { 0x000080f8, 0x00000000 },
+    { 0x000080fc, 0x00020000 },
+    { 0x00008100, 0x00020000 },
+    { 0x00008104, 0x00000001 },
+    { 0x00008108, 0x00000052 },
+    { 0x0000810c, 0x00000000 },
+    { 0x00008110, 0x00000168 },
+    { 0x00008118, 0x000100aa },
+    { 0x0000811c, 0x00003210 },
+    { 0x00008120, 0x08f04800 },
+    { 0x00008124, 0x00000000 },
+    { 0x00008128, 0x00000000 },
+    { 0x0000812c, 0x00000000 },
+    { 0x00008130, 0x00000000 },
+    { 0x00008134, 0x00000000 },
+    { 0x00008138, 0x00000000 },
+    { 0x0000813c, 0x00000000 },
+    { 0x00008144, 0x00000000 },
+    { 0x00008168, 0x00000000 },
+    { 0x0000816c, 0x00000000 },
+    { 0x00008170, 0x32143320 },
+    { 0x00008174, 0xfaa4fa50 },
+    { 0x00008178, 0x00000100 },
+    { 0x0000817c, 0x00000000 },
+    { 0x000081c4, 0x00000000 },
+    { 0x000081d0, 0x00003210 },
+    { 0x000081ec, 0x00000000 },
+    { 0x000081f0, 0x00000000 },
+    { 0x000081f4, 0x00000000 },
+    { 0x000081f8, 0x00000000 },
+    { 0x000081fc, 0x00000000 },
+    { 0x00008200, 0x00000000 },
+    { 0x00008204, 0x00000000 },
+    { 0x00008208, 0x00000000 },
+    { 0x0000820c, 0x00000000 },
+    { 0x00008210, 0x00000000 },
+    { 0x00008214, 0x00000000 },
+    { 0x00008218, 0x00000000 },
+    { 0x0000821c, 0x00000000 },
+    { 0x00008220, 0x00000000 },
+    { 0x00008224, 0x00000000 },
+    { 0x00008228, 0x00000000 },
+    { 0x0000822c, 0x00000000 },
+    { 0x00008230, 0x00000000 },
+    { 0x00008234, 0x00000000 },
+    { 0x00008238, 0x00000000 },
+    { 0x0000823c, 0x00000000 },
+    { 0x00008240, 0x00100000 },
+    { 0x00008244, 0x0010f400 },
+    { 0x00008248, 0x00000100 },
+    { 0x0000824c, 0x0001e800 },
+    { 0x00008250, 0x00000000 },
+    { 0x00008254, 0x00000000 },
+    { 0x00008258, 0x00000000 },
+    { 0x0000825c, 0x400000ff },
+    { 0x00008260, 0x00080922 },
+    { 0x00008270, 0x00000000 },
+    { 0x00008274, 0x40000000 },
+    { 0x00008278, 0x003e4180 },
+    { 0x0000827c, 0x00000000 },
+    { 0x00008284, 0x0000002c },
+    { 0x00008288, 0x0000002c },
+    { 0x0000828c, 0x00000000 },
+    { 0x00008294, 0x00000000 },
+    { 0x00008298, 0x00000000 },
+    { 0x00008300, 0x00000000 },
+    { 0x00008304, 0x00000000 },
+    { 0x00008308, 0x00000000 },
+    { 0x0000830c, 0x00000000 },
+    { 0x00008310, 0x00000000 },
+    { 0x00008314, 0x00000000 },
+    { 0x00008318, 0x00000000 },
+    { 0x00008328, 0x00000000 },
+    { 0x0000832c, 0x00000007 },
+    { 0x00008330, 0x00000302 },
+    { 0x00008334, 0x00000e00 },
+    { 0x00008338, 0x00000000 },
+    { 0x0000833c, 0x00000000 },
+    { 0x00008340, 0x000107ff },
+    { 0x00009808, 0x00000000 },
+    { 0x0000980c, 0xad848e19 },
+    { 0x00009810, 0x7d14e000 },
+    { 0x00009814, 0x9c0a9f6b },
+    { 0x0000981c, 0x00000000 },
+    { 0x0000982c, 0x0000a000 },
+    { 0x00009830, 0x00000000 },
+    { 0x0000983c, 0x00200400 },
+    { 0x00009840, 0x206a002e },
+    { 0x0000984c, 0x1284233c },
+    { 0x00009854, 0x00000859 },
+    { 0x00009900, 0x00000000 },
+    { 0x00009904, 0x00000000 },
+    { 0x00009908, 0x00000000 },
+    { 0x0000990c, 0x00000000 },
+    { 0x0000991c, 0x10000fff },
+    { 0x00009920, 0x05100000 },
+    { 0x0000a920, 0x05100000 },
+    { 0x0000b920, 0x05100000 },
+    { 0x00009928, 0x00000001 },
+    { 0x0000992c, 0x00000004 },
+    { 0x00009934, 0x1e1f2022 },
+    { 0x00009938, 0x0a0b0c0d },
+    { 0x0000993c, 0x00000000 },
+    { 0x00009948, 0x9280b212 },
+    { 0x0000994c, 0x00020028 },
+    { 0x00009954, 0x5d50e188 },
+    { 0x00009958, 0x00081fff },
+    { 0x0000c95c, 0x004b6a8e },
+    { 0x0000c968, 0x000003ce },
+    { 0x00009970, 0x190fb515 },
+    { 0x00009974, 0x00000000 },
+    { 0x00009978, 0x00000001 },
+    { 0x0000997c, 0x00000000 },
+    { 0x00009980, 0x00000000 },
+    { 0x00009984, 0x00000000 },
+    { 0x00009988, 0x00000000 },
+    { 0x0000998c, 0x00000000 },
+    { 0x00009990, 0x00000000 },
+    { 0x00009994, 0x00000000 },
+    { 0x00009998, 0x00000000 },
+    { 0x0000999c, 0x00000000 },
+    { 0x000099a0, 0x00000000 },
+    { 0x000099a4, 0x00000001 },
+    { 0x000099a8, 0x001fff00 },
+    { 0x000099ac, 0x00000000 },
+    { 0x000099b0, 0x03051000 },
+    { 0x000099dc, 0x00000000 },
+    { 0x000099e0, 0x00000200 },
+    { 0x000099e4, 0xaaaaaaaa },
+    { 0x000099e8, 0x3c466478 },
+    { 0x000099ec, 0x000000aa },
+    { 0x000099fc, 0x00001042 },
+    { 0x00009b00, 0x00000000 },
+    { 0x00009b04, 0x00000001 },
+    { 0x00009b08, 0x00000002 },
+    { 0x00009b0c, 0x00000003 },
+    { 0x00009b10, 0x00000004 },
+    { 0x00009b14, 0x00000005 },
+    { 0x00009b18, 0x00000008 },
+    { 0x00009b1c, 0x00000009 },
+    { 0x00009b20, 0x0000000a },
+    { 0x00009b24, 0x0000000b },
+    { 0x00009b28, 0x0000000c },
+    { 0x00009b2c, 0x0000000d },
+    { 0x00009b30, 0x00000010 },
+    { 0x00009b34, 0x00000011 },
+    { 0x00009b38, 0x00000012 },
+    { 0x00009b3c, 0x00000013 },
+    { 0x00009b40, 0x00000014 },
+    { 0x00009b44, 0x00000015 },
+    { 0x00009b48, 0x00000018 },
+    { 0x00009b4c, 0x00000019 },
+    { 0x00009b50, 0x0000001a },
+    { 0x00009b54, 0x0000001b },
+    { 0x00009b58, 0x0000001c },
+    { 0x00009b5c, 0x0000001d },
+    { 0x00009b60, 0x00000020 },
+    { 0x00009b64, 0x00000021 },
+    { 0x00009b68, 0x00000022 },
+    { 0x00009b6c, 0x00000023 },
+    { 0x00009b70, 0x00000024 },
+    { 0x00009b74, 0x00000025 },
+    { 0x00009b78, 0x00000028 },
+    { 0x00009b7c, 0x00000029 },
+    { 0x00009b80, 0x0000002a },
+    { 0x00009b84, 0x0000002b },
+    { 0x00009b88, 0x0000002c },
+    { 0x00009b8c, 0x0000002d },
+    { 0x00009b90, 0x00000030 },
+    { 0x00009b94, 0x00000031 },
+    { 0x00009b98, 0x00000032 },
+    { 0x00009b9c, 0x00000033 },
+    { 0x00009ba0, 0x00000034 },
+    { 0x00009ba4, 0x00000035 },
+    { 0x00009ba8, 0x00000035 },
+    { 0x00009bac, 0x00000035 },
+    { 0x00009bb0, 0x00000035 },
+    { 0x00009bb4, 0x00000035 },
+    { 0x00009bb8, 0x00000035 },
+    { 0x00009bbc, 0x00000035 },
+    { 0x00009bc0, 0x00000035 },
+    { 0x00009bc4, 0x00000035 },
+    { 0x00009bc8, 0x00000035 },
+    { 0x00009bcc, 0x00000035 },
+    { 0x00009bd0, 0x00000035 },
+    { 0x00009bd4, 0x00000035 },
+    { 0x00009bd8, 0x00000035 },
+    { 0x00009bdc, 0x00000035 },
+    { 0x00009be0, 0x00000035 },
+    { 0x00009be4, 0x00000035 },
+    { 0x00009be8, 0x00000035 },
+    { 0x00009bec, 0x00000035 },
+    { 0x00009bf0, 0x00000035 },
+    { 0x00009bf4, 0x00000035 },
+    { 0x00009bf8, 0x00000010 },
+    { 0x00009bfc, 0x0000001a },
+    { 0x0000a210, 0x40806333 },
+    { 0x0000a214, 0x00106c10 },
+    { 0x0000a218, 0x009c4060 },
+    { 0x0000a220, 0x018830c6 },
+    { 0x0000a224, 0x00000400 },
+    { 0x0000a228, 0x00000bb5 },
+    { 0x0000a22c, 0x00000011 },
+    { 0x0000a234, 0x20202020 },
+    { 0x0000a238, 0x20202020 },
+    { 0x0000a23c, 0x13c889af },
+    { 0x0000a240, 0x38490a20 },
+    { 0x0000a244, 0x00007bb6 },
+    { 0x0000a248, 0x0fff3ffc },
+    { 0x0000a24c, 0x00000001 },
+    { 0x0000a250, 0x0000a000 },
+    { 0x0000a254, 0x00000000 },
+    { 0x0000a258, 0x0cc75380 },
+    { 0x0000a25c, 0x0f0f0f01 },
+    { 0x0000a260, 0xdfa91f01 },
+    { 0x0000a268, 0x00000000 },
+    { 0x0000a26c, 0x0ebae9c6 },
+    { 0x0000b26c, 0x0ebae9c6 },
+    { 0x0000c26c, 0x0ebae9c6 },
+    { 0x0000d270, 0x00820820 },
+    { 0x0000a278, 0x1ce739ce },
+    { 0x0000a27c, 0x051701ce },
+    { 0x0000a338, 0x00000000 },
+    { 0x0000a33c, 0x00000000 },
+    { 0x0000a340, 0x00000000 },
+    { 0x0000a344, 0x00000000 },
+    { 0x0000a348, 0x3fffffff },
+    { 0x0000a34c, 0x3fffffff },
+    { 0x0000a350, 0x3fffffff },
+    { 0x0000a354, 0x0003ffff },
+    { 0x0000a358, 0x79a8aa1f },
+    { 0x0000d35c, 0x07ffffef },
+    { 0x0000d360, 0x0fffffe7 },
+    { 0x0000d364, 0x17ffffe5 },
+    { 0x0000d368, 0x1fffffe4 },
+    { 0x0000d36c, 0x37ffffe3 },
+    { 0x0000d370, 0x3fffffe3 },
+    { 0x0000d374, 0x57ffffe3 },
+    { 0x0000d378, 0x5fffffe2 },
+    { 0x0000d37c, 0x7fffffe2 },
+    { 0x0000d380, 0x7f3c7bba },
+    { 0x0000d384, 0xf3307ff0 },
+    { 0x0000a388, 0x08000000 },
+    { 0x0000a38c, 0x20202020 },
+    { 0x0000a390, 0x20202020 },
+    { 0x0000a394, 0x1ce739ce },
+    { 0x0000a398, 0x000001ce },
+    { 0x0000a39c, 0x00000001 },
+    { 0x0000a3a0, 0x00000000 },
+    { 0x0000a3a4, 0x00000000 },
+    { 0x0000a3a8, 0x00000000 },
+    { 0x0000a3ac, 0x00000000 },
+    { 0x0000a3b0, 0x00000000 },
+    { 0x0000a3b4, 0x00000000 },
+    { 0x0000a3b8, 0x00000000 },
+    { 0x0000a3bc, 0x00000000 },
+    { 0x0000a3c0, 0x00000000 },
+    { 0x0000a3c4, 0x00000000 },
+    { 0x0000a3c8, 0x00000246 },
+    { 0x0000a3cc, 0x20202020 },
+    { 0x0000a3d0, 0x20202020 },
+    { 0x0000a3d4, 0x20202020 },
+    { 0x0000a3dc, 0x1ce739ce },
+    { 0x0000a3e0, 0x000001ce },
+};
+
+static const u32 ar5416Bank0_9100[][2] = {
+    { 0x000098b0, 0x1e5795e5 },
+    { 0x000098e0, 0x02008020 },
+};
+
+static const u32 ar5416BB_RfGain_9100[][3] = {
+    { 0x00009a00, 0x00000000, 0x00000000 },
+    { 0x00009a04, 0x00000040, 0x00000040 },
+    { 0x00009a08, 0x00000080, 0x00000080 },
+    { 0x00009a0c, 0x000001a1, 0x00000141 },
+    { 0x00009a10, 0x000001e1, 0x00000181 },
+    { 0x00009a14, 0x00000021, 0x000001c1 },
+    { 0x00009a18, 0x00000061, 0x00000001 },
+    { 0x00009a1c, 0x00000168, 0x00000041 },
+    { 0x00009a20, 0x000001a8, 0x000001a8 },
+    { 0x00009a24, 0x000001e8, 0x000001e8 },
+    { 0x00009a28, 0x00000028, 0x00000028 },
+    { 0x00009a2c, 0x00000068, 0x00000068 },
+    { 0x00009a30, 0x00000189, 0x000000a8 },
+    { 0x00009a34, 0x000001c9, 0x00000169 },
+    { 0x00009a38, 0x00000009, 0x000001a9 },
+    { 0x00009a3c, 0x00000049, 0x000001e9 },
+    { 0x00009a40, 0x00000089, 0x00000029 },
+    { 0x00009a44, 0x00000170, 0x00000069 },
+    { 0x00009a48, 0x000001b0, 0x00000190 },
+    { 0x00009a4c, 0x000001f0, 0x000001d0 },
+    { 0x00009a50, 0x00000030, 0x00000010 },
+    { 0x00009a54, 0x00000070, 0x00000050 },
+    { 0x00009a58, 0x00000191, 0x00000090 },
+    { 0x00009a5c, 0x000001d1, 0x00000151 },
+    { 0x00009a60, 0x00000011, 0x00000191 },
+    { 0x00009a64, 0x00000051, 0x000001d1 },
+    { 0x00009a68, 0x00000091, 0x00000011 },
+    { 0x00009a6c, 0x000001b8, 0x00000051 },
+    { 0x00009a70, 0x000001f8, 0x00000198 },
+    { 0x00009a74, 0x00000038, 0x000001d8 },
+    { 0x00009a78, 0x00000078, 0x00000018 },
+    { 0x00009a7c, 0x00000199, 0x00000058 },
+    { 0x00009a80, 0x000001d9, 0x00000098 },
+    { 0x00009a84, 0x00000019, 0x00000159 },
+    { 0x00009a88, 0x00000059, 0x00000199 },
+    { 0x00009a8c, 0x00000099, 0x000001d9 },
+    { 0x00009a90, 0x000000d9, 0x00000019 },
+    { 0x00009a94, 0x000000f9, 0x00000059 },
+    { 0x00009a98, 0x000000f9, 0x00000099 },
+    { 0x00009a9c, 0x000000f9, 0x000000d9 },
+    { 0x00009aa0, 0x000000f9, 0x000000f9 },
+    { 0x00009aa4, 0x000000f9, 0x000000f9 },
+    { 0x00009aa8, 0x000000f9, 0x000000f9 },
+    { 0x00009aac, 0x000000f9, 0x000000f9 },
+    { 0x00009ab0, 0x000000f9, 0x000000f9 },
+    { 0x00009ab4, 0x000000f9, 0x000000f9 },
+    { 0x00009ab8, 0x000000f9, 0x000000f9 },
+    { 0x00009abc, 0x000000f9, 0x000000f9 },
+    { 0x00009ac0, 0x000000f9, 0x000000f9 },
+    { 0x00009ac4, 0x000000f9, 0x000000f9 },
+    { 0x00009ac8, 0x000000f9, 0x000000f9 },
+    { 0x00009acc, 0x000000f9, 0x000000f9 },
+    { 0x00009ad0, 0x000000f9, 0x000000f9 },
+    { 0x00009ad4, 0x000000f9, 0x000000f9 },
+    { 0x00009ad8, 0x000000f9, 0x000000f9 },
+    { 0x00009adc, 0x000000f9, 0x000000f9 },
+    { 0x00009ae0, 0x000000f9, 0x000000f9 },
+    { 0x00009ae4, 0x000000f9, 0x000000f9 },
+    { 0x00009ae8, 0x000000f9, 0x000000f9 },
+    { 0x00009aec, 0x000000f9, 0x000000f9 },
+    { 0x00009af0, 0x000000f9, 0x000000f9 },
+    { 0x00009af4, 0x000000f9, 0x000000f9 },
+    { 0x00009af8, 0x000000f9, 0x000000f9 },
+    { 0x00009afc, 0x000000f9, 0x000000f9 },
+};
+
+static const u32 ar5416Bank1_9100[][2] = {
+    { 0x000098b0, 0x02108421 },
+    { 0x000098ec, 0x00000008 },
+};
+
+static const u32 ar5416Bank2_9100[][2] = {
+    { 0x000098b0, 0x0e73ff17 },
+    { 0x000098e0, 0x00000420 },
+};
+
+static const u32 ar5416Bank3_9100[][3] = {
+    { 0x000098f0, 0x01400018, 0x01c00018 },
+};
+
+static const u32 ar5416Bank6_9100[][3] = {
+
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00e00000, 0x00e00000 },
+    { 0x0000989c, 0x005e0000, 0x005e0000 },
+    { 0x0000989c, 0x00120000, 0x00120000 },
+    { 0x0000989c, 0x00620000, 0x00620000 },
+    { 0x0000989c, 0x00020000, 0x00020000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x40ff0000, 0x40ff0000 },
+    { 0x0000989c, 0x005f0000, 0x005f0000 },
+    { 0x0000989c, 0x00870000, 0x00870000 },
+    { 0x0000989c, 0x00f90000, 0x00f90000 },
+    { 0x0000989c, 0x007b0000, 0x007b0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00f50000, 0x00f50000 },
+    { 0x0000989c, 0x00dc0000, 0x00dc0000 },
+    { 0x0000989c, 0x00110000, 0x00110000 },
+    { 0x0000989c, 0x006100a8, 0x006100a8 },
+    { 0x0000989c, 0x004210a2, 0x004210a2 },
+    { 0x0000989c, 0x0014008f, 0x0014008f },
+    { 0x0000989c, 0x00c40003, 0x00c40003 },
+    { 0x0000989c, 0x003000f2, 0x003000f2 },
+    { 0x0000989c, 0x00440016, 0x00440016 },
+    { 0x0000989c, 0x00410040, 0x00410040 },
+    { 0x0000989c, 0x0001805e, 0x0001805e },
+    { 0x0000989c, 0x0000c0ab, 0x0000c0ab },
+    { 0x0000989c, 0x000000f1, 0x000000f1 },
+    { 0x0000989c, 0x00002081, 0x00002081 },
+    { 0x0000989c, 0x000000d4, 0x000000d4 },
+    { 0x000098d0, 0x0000000f, 0x0010000f },
+};
+
+static const u32 ar5416Bank6TPC_9100[][3] = {
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00e00000, 0x00e00000 },
+    { 0x0000989c, 0x005e0000, 0x005e0000 },
+    { 0x0000989c, 0x00120000, 0x00120000 },
+    { 0x0000989c, 0x00620000, 0x00620000 },
+    { 0x0000989c, 0x00020000, 0x00020000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x40ff0000, 0x40ff0000 },
+    { 0x0000989c, 0x005f0000, 0x005f0000 },
+    { 0x0000989c, 0x00870000, 0x00870000 },
+    { 0x0000989c, 0x00f90000, 0x00f90000 },
+    { 0x0000989c, 0x007b0000, 0x007b0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00f50000, 0x00f50000 },
+    { 0x0000989c, 0x00dc0000, 0x00dc0000 },
+    { 0x0000989c, 0x00110000, 0x00110000 },
+    { 0x0000989c, 0x006100a8, 0x006100a8 },
+    { 0x0000989c, 0x00423022, 0x00423022 },
+    { 0x0000989c, 0x201400df, 0x201400df },
+    { 0x0000989c, 0x00c40002, 0x00c40002 },
+    { 0x0000989c, 0x003000f2, 0x003000f2 },
+    { 0x0000989c, 0x00440016, 0x00440016 },
+    { 0x0000989c, 0x00410040, 0x00410040 },
+    { 0x0000989c, 0x0001805e, 0x0001805e },
+    { 0x0000989c, 0x0000c0ab, 0x0000c0ab },
+    { 0x0000989c, 0x000000e1, 0x000000e1 },
+    { 0x0000989c, 0x00007081, 0x00007081 },
+    { 0x0000989c, 0x000000d4, 0x000000d4 },
+    { 0x000098d0, 0x0000000f, 0x0010000f },
+};
+
+static const u32 ar5416Bank7_9100[][2] = {
+    { 0x0000989c, 0x00000500 },
+    { 0x0000989c, 0x00000800 },
+    { 0x000098cc, 0x0000000e },
+};
+
+static const u32 ar5416Addac_9100[][2] = {
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000003 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x0000000c },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000030 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000060 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000058 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x000098c4,  0x00000000 },
+};
+
+static const u32 ar5416Modes[][6] = {
+    { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 },
+    { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 },
+    { 0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180 },
+    { 0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008 },
+    { 0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0 },
+    { 0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab, 0x098813cf },
+    { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
+    { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
+    { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
+    { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 },
+    { 0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0, 0x037216a0 },
+    { 0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x00009850, 0x6d48b4e2, 0x6d48b4e2, 0x6d48b0e2, 0x6d48b0e2, 0x6d48b0e2 },
+    { 0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec86d2e, 0x7ec84d2e, 0x7ec82d2e },
+    { 0x0000985c, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e },
+    { 0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20, 0x00048d18 },
+    { 0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
+    { 0x00009868, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0 },
+    { 0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 },
+    { 0x00009914, 0x000007d0, 0x000007d0, 0x00000898, 0x00000898, 0x000007d0 },
+    { 0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016 },
+    { 0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a11, 0xd00a8a0d, 0xd00a8a0d },
+    { 0x00009940, 0x00754604, 0x00754604, 0xfff81204, 0xfff81204, 0xfff81204 },
+    { 0x00009944, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020 },
+    { 0x00009954, 0x5f3ca3de, 0x5f3ca3de, 0xe250a51e, 0xe250a51e, 0xe250a51e },
+    { 0x00009958, 0x2108ecff, 0x2108ecff, 0x3388ffff, 0x3388ffff, 0x3388ffff },
+#ifdef TB243
+    { 0x00009960, 0x00000900, 0x00000900, 0x00009b40, 0x00009b40, 0x00012d80 },
+    { 0x0000a960, 0x00000900, 0x00000900, 0x00009b40, 0x00009b40, 0x00012d80 },
+    { 0x0000b960, 0x00000900, 0x00000900, 0x00009b40, 0x00009b40, 0x00012d80 },
+    { 0x00009964, 0x00000000, 0x00000000, 0x00002210, 0x00002210, 0x00001120 },
+#else
+    { 0x00009960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0 },
+    { 0x0000a960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0 },
+    { 0x0000b960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0 },
+    { 0x00009964, 0x00001120, 0x00001120, 0x00001120, 0x00001120, 0x00001120 },
+#endif
+    { 0x0000c9bc, 0x001a0600, 0x001a0600, 0x001a1000, 0x001a0c00, 0x001a0c00 },
+    { 0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be, 0x038919be },
+    { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 },
+    { 0x000099c8, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329 },
+    { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 },
+    { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 },
+    { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880, 0x00000880 },
+    { 0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788, 0xd03e4788 },
+    { 0x0000a20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000b20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000c20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a },
+    { 0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000 },
+    { 0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa, 0x0a1a7caa },
+    { 0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000, 0x18010000 },
+    { 0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402, 0x2e032402 },
+    { 0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06, 0x4a0a3c06 },
+    { 0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b, 0x621a540b },
+    { 0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b, 0x764f6c1b },
+    { 0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a, 0x845b7a5a },
+    { 0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf, 0x950f8ccf },
+    { 0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f, 0xa5cf9b4f },
+    { 0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f, 0xbddfaf1f },
+    { 0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f, 0xd1ffc93f },
+    { 0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+};
+
+static const u32 ar5416Common[][2] = {
+    { 0x0000000c, 0x00000000 },
+    { 0x00000030, 0x00020015 },
+    { 0x00000034, 0x00000005 },
+    { 0x00000040, 0x00000000 },
+    { 0x00000044, 0x00000008 },
+    { 0x00000048, 0x00000008 },
+    { 0x0000004c, 0x00000010 },
+    { 0x00000050, 0x00000000 },
+    { 0x00000054, 0x0000001f },
+    { 0x00000800, 0x00000000 },
+    { 0x00000804, 0x00000000 },
+    { 0x00000808, 0x00000000 },
+    { 0x0000080c, 0x00000000 },
+    { 0x00000810, 0x00000000 },
+    { 0x00000814, 0x00000000 },
+    { 0x00000818, 0x00000000 },
+    { 0x0000081c, 0x00000000 },
+    { 0x00000820, 0x00000000 },
+    { 0x00000824, 0x00000000 },
+    { 0x00001040, 0x002ffc0f },
+    { 0x00001044, 0x002ffc0f },
+    { 0x00001048, 0x002ffc0f },
+    { 0x0000104c, 0x002ffc0f },
+    { 0x00001050, 0x002ffc0f },
+    { 0x00001054, 0x002ffc0f },
+    { 0x00001058, 0x002ffc0f },
+    { 0x0000105c, 0x002ffc0f },
+    { 0x00001060, 0x002ffc0f },
+    { 0x00001064, 0x002ffc0f },
+    { 0x00001230, 0x00000000 },
+    { 0x00001270, 0x00000000 },
+    { 0x00001038, 0x00000000 },
+    { 0x00001078, 0x00000000 },
+    { 0x000010b8, 0x00000000 },
+    { 0x000010f8, 0x00000000 },
+    { 0x00001138, 0x00000000 },
+    { 0x00001178, 0x00000000 },
+    { 0x000011b8, 0x00000000 },
+    { 0x000011f8, 0x00000000 },
+    { 0x00001238, 0x00000000 },
+    { 0x00001278, 0x00000000 },
+    { 0x000012b8, 0x00000000 },
+    { 0x000012f8, 0x00000000 },
+    { 0x00001338, 0x00000000 },
+    { 0x00001378, 0x00000000 },
+    { 0x000013b8, 0x00000000 },
+    { 0x000013f8, 0x00000000 },
+    { 0x00001438, 0x00000000 },
+    { 0x00001478, 0x00000000 },
+    { 0x000014b8, 0x00000000 },
+    { 0x000014f8, 0x00000000 },
+    { 0x00001538, 0x00000000 },
+    { 0x00001578, 0x00000000 },
+    { 0x000015b8, 0x00000000 },
+    { 0x000015f8, 0x00000000 },
+    { 0x00001638, 0x00000000 },
+    { 0x00001678, 0x00000000 },
+    { 0x000016b8, 0x00000000 },
+    { 0x000016f8, 0x00000000 },
+    { 0x00001738, 0x00000000 },
+    { 0x00001778, 0x00000000 },
+    { 0x000017b8, 0x00000000 },
+    { 0x000017f8, 0x00000000 },
+    { 0x0000103c, 0x00000000 },
+    { 0x0000107c, 0x00000000 },
+    { 0x000010bc, 0x00000000 },
+    { 0x000010fc, 0x00000000 },
+    { 0x0000113c, 0x00000000 },
+    { 0x0000117c, 0x00000000 },
+    { 0x000011bc, 0x00000000 },
+    { 0x000011fc, 0x00000000 },
+    { 0x0000123c, 0x00000000 },
+    { 0x0000127c, 0x00000000 },
+    { 0x000012bc, 0x00000000 },
+    { 0x000012fc, 0x00000000 },
+    { 0x0000133c, 0x00000000 },
+    { 0x0000137c, 0x00000000 },
+    { 0x000013bc, 0x00000000 },
+    { 0x000013fc, 0x00000000 },
+    { 0x0000143c, 0x00000000 },
+    { 0x0000147c, 0x00000000 },
+    { 0x00020010, 0x00000003 },
+    { 0x00020038, 0x000004c2 },
+    { 0x00008004, 0x00000000 },
+    { 0x00008008, 0x00000000 },
+    { 0x0000800c, 0x00000000 },
+    { 0x00008018, 0x00000700 },
+    { 0x00008020, 0x00000000 },
+    { 0x00008038, 0x00000000 },
+    { 0x0000803c, 0x00000000 },
+    { 0x00008048, 0x40000000 },
+    { 0x00008054, 0x00004000 },
+    { 0x00008058, 0x00000000 },
+    { 0x0000805c, 0x000fc78f },
+    { 0x00008060, 0x0000000f },
+    { 0x00008064, 0x00000000 },
+    { 0x000080c0, 0x2a82301a },
+    { 0x000080c4, 0x05dc01e0 },
+    { 0x000080c8, 0x1f402710 },
+    { 0x000080cc, 0x01f40000 },
+    { 0x000080d0, 0x00001e00 },
+    { 0x000080d4, 0x00000000 },
+    { 0x000080d8, 0x00400000 },
+    { 0x000080e0, 0xffffffff },
+    { 0x000080e4, 0x0000ffff },
+    { 0x000080e8, 0x003f3f3f },
+    { 0x000080ec, 0x00000000 },
+    { 0x000080f0, 0x00000000 },
+    { 0x000080f4, 0x00000000 },
+    { 0x000080f8, 0x00000000 },
+    { 0x000080fc, 0x00020000 },
+    { 0x00008100, 0x00020000 },
+    { 0x00008104, 0x00000001 },
+    { 0x00008108, 0x00000052 },
+    { 0x0000810c, 0x00000000 },
+    { 0x00008110, 0x00000168 },
+    { 0x00008118, 0x000100aa },
+    { 0x0000811c, 0x00003210 },
+    { 0x00008120, 0x08f04800 },
+    { 0x00008124, 0x00000000 },
+    { 0x00008128, 0x00000000 },
+    { 0x0000812c, 0x00000000 },
+    { 0x00008130, 0x00000000 },
+    { 0x00008134, 0x00000000 },
+    { 0x00008138, 0x00000000 },
+    { 0x0000813c, 0x00000000 },
+    { 0x00008144, 0x00000000 },
+    { 0x00008168, 0x00000000 },
+    { 0x0000816c, 0x00000000 },
+    { 0x00008170, 0x32143320 },
+    { 0x00008174, 0xfaa4fa50 },
+    { 0x00008178, 0x00000100 },
+    { 0x0000817c, 0x00000000 },
+    { 0x000081c4, 0x00000000 },
+    { 0x000081d0, 0x00003210 },
+    { 0x000081ec, 0x00000000 },
+    { 0x000081f0, 0x00000000 },
+    { 0x000081f4, 0x00000000 },
+    { 0x000081f8, 0x00000000 },
+    { 0x000081fc, 0x00000000 },
+    { 0x00008200, 0x00000000 },
+    { 0x00008204, 0x00000000 },
+    { 0x00008208, 0x00000000 },
+    { 0x0000820c, 0x00000000 },
+    { 0x00008210, 0x00000000 },
+    { 0x00008214, 0x00000000 },
+    { 0x00008218, 0x00000000 },
+    { 0x0000821c, 0x00000000 },
+    { 0x00008220, 0x00000000 },
+    { 0x00008224, 0x00000000 },
+    { 0x00008228, 0x00000000 },
+    { 0x0000822c, 0x00000000 },
+    { 0x00008230, 0x00000000 },
+    { 0x00008234, 0x00000000 },
+    { 0x00008238, 0x00000000 },
+    { 0x0000823c, 0x00000000 },
+    { 0x00008240, 0x00100000 },
+    { 0x00008244, 0x0010f400 },
+    { 0x00008248, 0x00000100 },
+    { 0x0000824c, 0x0001e800 },
+    { 0x00008250, 0x00000000 },
+    { 0x00008254, 0x00000000 },
+    { 0x00008258, 0x00000000 },
+    { 0x0000825c, 0x400000ff },
+    { 0x00008260, 0x00080922 },
+    { 0x00008270, 0x00000000 },
+    { 0x00008274, 0x40000000 },
+    { 0x00008278, 0x003e4180 },
+    { 0x0000827c, 0x00000000 },
+    { 0x00008284, 0x0000002c },
+    { 0x00008288, 0x0000002c },
+    { 0x0000828c, 0x00000000 },
+    { 0x00008294, 0x00000000 },
+    { 0x00008298, 0x00000000 },
+    { 0x00008300, 0x00000000 },
+    { 0x00008304, 0x00000000 },
+    { 0x00008308, 0x00000000 },
+    { 0x0000830c, 0x00000000 },
+    { 0x00008310, 0x00000000 },
+    { 0x00008314, 0x00000000 },
+    { 0x00008318, 0x00000000 },
+    { 0x00008328, 0x00000000 },
+    { 0x0000832c, 0x00000007 },
+    { 0x00008330, 0x00000302 },
+    { 0x00008334, 0x00000e00 },
+    { 0x00008338, 0x00000000 },
+    { 0x0000833c, 0x00000000 },
+    { 0x00008340, 0x000107ff },
+    { 0x00009808, 0x00000000 },
+    { 0x0000980c, 0xad848e19 },
+    { 0x00009810, 0x7d14e000 },
+    { 0x00009814, 0x9c0a9f6b },
+    { 0x0000981c, 0x00000000 },
+    { 0x0000982c, 0x0000a000 },
+    { 0x00009830, 0x00000000 },
+    { 0x0000983c, 0x00200400 },
+    { 0x00009840, 0x206a01ae },
+    { 0x0000984c, 0x1284233c },
+    { 0x00009854, 0x00000859 },
+    { 0x00009900, 0x00000000 },
+    { 0x00009904, 0x00000000 },
+    { 0x00009908, 0x00000000 },
+    { 0x0000990c, 0x00000000 },
+    { 0x0000991c, 0x10000fff },
+    { 0x00009920, 0x05100000 },
+    { 0x0000a920, 0x05100000 },
+    { 0x0000b920, 0x05100000 },
+    { 0x00009928, 0x00000001 },
+    { 0x0000992c, 0x00000004 },
+    { 0x00009934, 0x1e1f2022 },
+    { 0x00009938, 0x0a0b0c0d },
+    { 0x0000993c, 0x00000000 },
+    { 0x00009948, 0x9280b212 },
+    { 0x0000994c, 0x00020028 },
+    { 0x0000c95c, 0x004b6a8e },
+    { 0x0000c968, 0x000003ce },
+    { 0x00009970, 0x190fb514 },
+    { 0x00009974, 0x00000000 },
+    { 0x00009978, 0x00000001 },
+    { 0x0000997c, 0x00000000 },
+    { 0x00009980, 0x00000000 },
+    { 0x00009984, 0x00000000 },
+    { 0x00009988, 0x00000000 },
+    { 0x0000998c, 0x00000000 },
+    { 0x00009990, 0x00000000 },
+    { 0x00009994, 0x00000000 },
+    { 0x00009998, 0x00000000 },
+    { 0x0000999c, 0x00000000 },
+    { 0x000099a0, 0x00000000 },
+    { 0x000099a4, 0x00000001 },
+    { 0x000099a8, 0x201fff00 },
+    { 0x000099ac, 0x006f0000 },
+    { 0x000099b0, 0x03051000 },
+    { 0x000099dc, 0x00000000 },
+    { 0x000099e0, 0x00000200 },
+    { 0x000099e4, 0xaaaaaaaa },
+    { 0x000099e8, 0x3c466478 },
+    { 0x000099ec, 0x0cc80caa },
+    { 0x000099fc, 0x00001042 },
+    { 0x00009b00, 0x00000000 },
+    { 0x00009b04, 0x00000001 },
+    { 0x00009b08, 0x00000002 },
+    { 0x00009b0c, 0x00000003 },
+    { 0x00009b10, 0x00000004 },
+    { 0x00009b14, 0x00000005 },
+    { 0x00009b18, 0x00000008 },
+    { 0x00009b1c, 0x00000009 },
+    { 0x00009b20, 0x0000000a },
+    { 0x00009b24, 0x0000000b },
+    { 0x00009b28, 0x0000000c },
+    { 0x00009b2c, 0x0000000d },
+    { 0x00009b30, 0x00000010 },
+    { 0x00009b34, 0x00000011 },
+    { 0x00009b38, 0x00000012 },
+    { 0x00009b3c, 0x00000013 },
+    { 0x00009b40, 0x00000014 },
+    { 0x00009b44, 0x00000015 },
+    { 0x00009b48, 0x00000018 },
+    { 0x00009b4c, 0x00000019 },
+    { 0x00009b50, 0x0000001a },
+    { 0x00009b54, 0x0000001b },
+    { 0x00009b58, 0x0000001c },
+    { 0x00009b5c, 0x0000001d },
+    { 0x00009b60, 0x00000020 },
+    { 0x00009b64, 0x00000021 },
+    { 0x00009b68, 0x00000022 },
+    { 0x00009b6c, 0x00000023 },
+    { 0x00009b70, 0x00000024 },
+    { 0x00009b74, 0x00000025 },
+    { 0x00009b78, 0x00000028 },
+    { 0x00009b7c, 0x00000029 },
+    { 0x00009b80, 0x0000002a },
+    { 0x00009b84, 0x0000002b },
+    { 0x00009b88, 0x0000002c },
+    { 0x00009b8c, 0x0000002d },
+    { 0x00009b90, 0x00000030 },
+    { 0x00009b94, 0x00000031 },
+    { 0x00009b98, 0x00000032 },
+    { 0x00009b9c, 0x00000033 },
+    { 0x00009ba0, 0x00000034 },
+    { 0x00009ba4, 0x00000035 },
+    { 0x00009ba8, 0x00000035 },
+    { 0x00009bac, 0x00000035 },
+    { 0x00009bb0, 0x00000035 },
+    { 0x00009bb4, 0x00000035 },
+    { 0x00009bb8, 0x00000035 },
+    { 0x00009bbc, 0x00000035 },
+    { 0x00009bc0, 0x00000035 },
+    { 0x00009bc4, 0x00000035 },
+    { 0x00009bc8, 0x00000035 },
+    { 0x00009bcc, 0x00000035 },
+    { 0x00009bd0, 0x00000035 },
+    { 0x00009bd4, 0x00000035 },
+    { 0x00009bd8, 0x00000035 },
+    { 0x00009bdc, 0x00000035 },
+    { 0x00009be0, 0x00000035 },
+    { 0x00009be4, 0x00000035 },
+    { 0x00009be8, 0x00000035 },
+    { 0x00009bec, 0x00000035 },
+    { 0x00009bf0, 0x00000035 },
+    { 0x00009bf4, 0x00000035 },
+    { 0x00009bf8, 0x00000010 },
+    { 0x00009bfc, 0x0000001a },
+    { 0x0000a210, 0x40806333 },
+    { 0x0000a214, 0x00106c10 },
+    { 0x0000a218, 0x009c4060 },
+    { 0x0000a220, 0x018830c6 },
+    { 0x0000a224, 0x00000400 },
+    { 0x0000a228, 0x001a0bb5 },
+    { 0x0000a22c, 0x00000000 },
+    { 0x0000a234, 0x20202020 },
+    { 0x0000a238, 0x20202020 },
+    { 0x0000a23c, 0x13c889ae },
+    { 0x0000a240, 0x38490a20 },
+    { 0x0000a244, 0x00007bb6 },
+    { 0x0000a248, 0x0fff3ffc },
+    { 0x0000a24c, 0x00000001 },
+    { 0x0000a250, 0x0000a000 },
+    { 0x0000a254, 0x00000000 },
+    { 0x0000a258, 0x0cc75380 },
+    { 0x0000a25c, 0x0f0f0f01 },
+    { 0x0000a260, 0xdfa91f01 },
+    { 0x0000a268, 0x00000001 },
+    { 0x0000a26c, 0x0ebae9c6 },
+    { 0x0000b26c, 0x0ebae9c6 },
+    { 0x0000c26c, 0x0ebae9c6 },
+    { 0x0000d270, 0x00820820 },
+    { 0x0000a278, 0x1ce739ce },
+    { 0x0000a27c, 0x050701ce },
+    { 0x0000a338, 0x00000000 },
+    { 0x0000a33c, 0x00000000 },
+    { 0x0000a340, 0x00000000 },
+    { 0x0000a344, 0x00000000 },
+    { 0x0000a348, 0x3fffffff },
+    { 0x0000a34c, 0x3fffffff },
+    { 0x0000a350, 0x3fffffff },
+    { 0x0000a354, 0x0003ffff },
+    { 0x0000a358, 0x79a8aa33 },
+    { 0x0000d35c, 0x07ffffef },
+    { 0x0000d360, 0x0fffffe7 },
+    { 0x0000d364, 0x17ffffe5 },
+    { 0x0000d368, 0x1fffffe4 },
+    { 0x0000d36c, 0x37ffffe3 },
+    { 0x0000d370, 0x3fffffe3 },
+    { 0x0000d374, 0x57ffffe3 },
+    { 0x0000d378, 0x5fffffe2 },
+    { 0x0000d37c, 0x7fffffe2 },
+    { 0x0000d380, 0x7f3c7bba },
+    { 0x0000d384, 0xf3307ff0 },
+    { 0x0000a388, 0x0c000000 },
+    { 0x0000a38c, 0x20202020 },
+    { 0x0000a390, 0x20202020 },
+    { 0x0000a394, 0x1ce739ce },
+    { 0x0000a398, 0x000001ce },
+    { 0x0000a39c, 0x00000001 },
+    { 0x0000a3a0, 0x00000000 },
+    { 0x0000a3a4, 0x00000000 },
+    { 0x0000a3a8, 0x00000000 },
+    { 0x0000a3ac, 0x00000000 },
+    { 0x0000a3b0, 0x00000000 },
+    { 0x0000a3b4, 0x00000000 },
+    { 0x0000a3b8, 0x00000000 },
+    { 0x0000a3bc, 0x00000000 },
+    { 0x0000a3c0, 0x00000000 },
+    { 0x0000a3c4, 0x00000000 },
+    { 0x0000a3c8, 0x00000246 },
+    { 0x0000a3cc, 0x20202020 },
+    { 0x0000a3d0, 0x20202020 },
+    { 0x0000a3d4, 0x20202020 },
+    { 0x0000a3dc, 0x1ce739ce },
+    { 0x0000a3e0, 0x000001ce },
+};
+
+static const u32 ar5416Bank0[][2] = {
+    { 0x000098b0, 0x1e5795e5 },
+    { 0x000098e0, 0x02008020 },
+};
+
+static const u32 ar5416BB_RfGain[][3] = {
+    { 0x00009a00, 0x00000000, 0x00000000 },
+    { 0x00009a04, 0x00000040, 0x00000040 },
+    { 0x00009a08, 0x00000080, 0x00000080 },
+    { 0x00009a0c, 0x000001a1, 0x00000141 },
+    { 0x00009a10, 0x000001e1, 0x00000181 },
+    { 0x00009a14, 0x00000021, 0x000001c1 },
+    { 0x00009a18, 0x00000061, 0x00000001 },
+    { 0x00009a1c, 0x00000168, 0x00000041 },
+    { 0x00009a20, 0x000001a8, 0x000001a8 },
+    { 0x00009a24, 0x000001e8, 0x000001e8 },
+    { 0x00009a28, 0x00000028, 0x00000028 },
+    { 0x00009a2c, 0x00000068, 0x00000068 },
+    { 0x00009a30, 0x00000189, 0x000000a8 },
+    { 0x00009a34, 0x000001c9, 0x00000169 },
+    { 0x00009a38, 0x00000009, 0x000001a9 },
+    { 0x00009a3c, 0x00000049, 0x000001e9 },
+    { 0x00009a40, 0x00000089, 0x00000029 },
+    { 0x00009a44, 0x00000170, 0x00000069 },
+    { 0x00009a48, 0x000001b0, 0x00000190 },
+    { 0x00009a4c, 0x000001f0, 0x000001d0 },
+    { 0x00009a50, 0x00000030, 0x00000010 },
+    { 0x00009a54, 0x00000070, 0x00000050 },
+    { 0x00009a58, 0x00000191, 0x00000090 },
+    { 0x00009a5c, 0x000001d1, 0x00000151 },
+    { 0x00009a60, 0x00000011, 0x00000191 },
+    { 0x00009a64, 0x00000051, 0x000001d1 },
+    { 0x00009a68, 0x00000091, 0x00000011 },
+    { 0x00009a6c, 0x000001b8, 0x00000051 },
+    { 0x00009a70, 0x000001f8, 0x00000198 },
+    { 0x00009a74, 0x00000038, 0x000001d8 },
+    { 0x00009a78, 0x00000078, 0x00000018 },
+    { 0x00009a7c, 0x00000199, 0x00000058 },
+    { 0x00009a80, 0x000001d9, 0x00000098 },
+    { 0x00009a84, 0x00000019, 0x00000159 },
+    { 0x00009a88, 0x00000059, 0x00000199 },
+    { 0x00009a8c, 0x00000099, 0x000001d9 },
+    { 0x00009a90, 0x000000d9, 0x00000019 },
+    { 0x00009a94, 0x000000f9, 0x00000059 },
+    { 0x00009a98, 0x000000f9, 0x00000099 },
+    { 0x00009a9c, 0x000000f9, 0x000000d9 },
+    { 0x00009aa0, 0x000000f9, 0x000000f9 },
+    { 0x00009aa4, 0x000000f9, 0x000000f9 },
+    { 0x00009aa8, 0x000000f9, 0x000000f9 },
+    { 0x00009aac, 0x000000f9, 0x000000f9 },
+    { 0x00009ab0, 0x000000f9, 0x000000f9 },
+    { 0x00009ab4, 0x000000f9, 0x000000f9 },
+    { 0x00009ab8, 0x000000f9, 0x000000f9 },
+    { 0x00009abc, 0x000000f9, 0x000000f9 },
+    { 0x00009ac0, 0x000000f9, 0x000000f9 },
+    { 0x00009ac4, 0x000000f9, 0x000000f9 },
+    { 0x00009ac8, 0x000000f9, 0x000000f9 },
+    { 0x00009acc, 0x000000f9, 0x000000f9 },
+    { 0x00009ad0, 0x000000f9, 0x000000f9 },
+    { 0x00009ad4, 0x000000f9, 0x000000f9 },
+    { 0x00009ad8, 0x000000f9, 0x000000f9 },
+    { 0x00009adc, 0x000000f9, 0x000000f9 },
+    { 0x00009ae0, 0x000000f9, 0x000000f9 },
+    { 0x00009ae4, 0x000000f9, 0x000000f9 },
+    { 0x00009ae8, 0x000000f9, 0x000000f9 },
+    { 0x00009aec, 0x000000f9, 0x000000f9 },
+    { 0x00009af0, 0x000000f9, 0x000000f9 },
+    { 0x00009af4, 0x000000f9, 0x000000f9 },
+    { 0x00009af8, 0x000000f9, 0x000000f9 },
+    { 0x00009afc, 0x000000f9, 0x000000f9 },
+};
+
+static const u32 ar5416Bank1[][2] = {
+    { 0x000098b0, 0x02108421},
+    { 0x000098ec, 0x00000008},
+};
+
+static const u32 ar5416Bank2[][2] = {
+    { 0x000098b0, 0x0e73ff17},
+    { 0x000098e0, 0x00000420},
+};
+
+static const u32 ar5416Bank3[][3] = {
+    { 0x000098f0, 0x01400018, 0x01c00018 },
+};
+
+static const u32 ar5416Bank6[][3] = {
+
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00e00000, 0x00e00000 },
+    { 0x0000989c, 0x005e0000, 0x005e0000 },
+    { 0x0000989c, 0x00120000, 0x00120000 },
+    { 0x0000989c, 0x00620000, 0x00620000 },
+    { 0x0000989c, 0x00020000, 0x00020000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x005f0000, 0x005f0000 },
+    { 0x0000989c, 0x00870000, 0x00870000 },
+    { 0x0000989c, 0x00f90000, 0x00f90000 },
+    { 0x0000989c, 0x007b0000, 0x007b0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00f50000, 0x00f50000 },
+    { 0x0000989c, 0x00dc0000, 0x00dc0000 },
+    { 0x0000989c, 0x00110000, 0x00110000 },
+    { 0x0000989c, 0x006100a8, 0x006100a8 },
+    { 0x0000989c, 0x004210a2, 0x004210a2 },
+    { 0x0000989c, 0x0014000f, 0x0014000f },
+    { 0x0000989c, 0x00c40002, 0x00c40002 },
+    { 0x0000989c, 0x003000f2, 0x003000f2 },
+    { 0x0000989c, 0x00440016, 0x00440016 },
+    { 0x0000989c, 0x00410040, 0x00410040 },
+    { 0x0000989c, 0x000180d6, 0x000180d6 },
+    { 0x0000989c, 0x0000c0aa, 0x0000c0aa },
+    { 0x0000989c, 0x000000b1, 0x000000b1 },
+    { 0x0000989c, 0x00002000, 0x00002000 },
+    { 0x0000989c, 0x000000d4, 0x000000d4 },
+    { 0x000098d0, 0x0000000f, 0x0010000f },
+};
+
+
+static const u32 ar5416Bank6TPC[][3] = {
+
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00e00000, 0x00e00000 },
+    { 0x0000989c, 0x005e0000, 0x005e0000 },
+    { 0x0000989c, 0x00120000, 0x00120000 },
+    { 0x0000989c, 0x00620000, 0x00620000 },
+    { 0x0000989c, 0x00020000, 0x00020000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x40ff0000, 0x40ff0000 },
+    { 0x0000989c, 0x005f0000, 0x005f0000 },
+    { 0x0000989c, 0x00870000, 0x00870000 },
+    { 0x0000989c, 0x00f90000, 0x00f90000 },
+    { 0x0000989c, 0x007b0000, 0x007b0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00f50000, 0x00f50000 },
+    { 0x0000989c, 0x00dc0000, 0x00dc0000 },
+    { 0x0000989c, 0x00110000, 0x00110000 },
+    { 0x0000989c, 0x006100a8, 0x006100a8 },
+    { 0x0000989c, 0x00423022, 0x00423022 },
+    { 0x0000989c, 0x2014008f, 0x2014008f },
+    { 0x0000989c, 0x00c40002, 0x00c40002 },
+    { 0x0000989c, 0x003000f2, 0x003000f2 },
+    { 0x0000989c, 0x00440016, 0x00440016 },
+    { 0x0000989c, 0x00410040, 0x00410040 },
+    { 0x0000989c, 0x0001805e, 0x0001805e },
+    { 0x0000989c, 0x0000c0ab, 0x0000c0ab },
+    { 0x0000989c, 0x000000e1, 0x000000e1 },
+    { 0x0000989c, 0x00007080, 0x00007080 },
+    { 0x0000989c, 0x000000d4, 0x000000d4 },
+    { 0x000098d0, 0x0000000f, 0x0010000f },
+};
+
+static const u32 ar5416Bank7[][2] = {
+    { 0x0000989c, 0x00000500 },
+    { 0x0000989c, 0x00000800 },
+    { 0x000098cc, 0x0000000e },
+};
+
+static const u32 ar5416Addac[][2] = {
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000010 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x000000c0 },
+    {0x0000989c, 0x00000015 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x0000989c, 0x00000000 },
+    {0x000098cc, 0x00000000 },
+};
+
+
+static const u32 ar5416Modes_9160[][6] = {
+    { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 },
+    { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 },
+    { 0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180 },
+    { 0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008 },
+    { 0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0 },
+    { 0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab, 0x098813cf },
+    { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
+    { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
+    { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
+    { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 },
+    { 0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0, 0x037216a0 },
+    { 0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
+    { 0x00009850, 0x6d48b4e2, 0x6d48b4e2, 0x6d48b0e2, 0x6d48b0e2, 0x6d48b0e2 },
+    { 0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e },
+    { 0x0000985c, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e },
+    { 0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20, 0x00048d18 },
+    { 0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
+    { 0x00009868, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0 },
+    { 0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 },
+    { 0x00009914, 0x000007d0, 0x000007d0, 0x00000898, 0x00000898, 0x000007d0 },
+    { 0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016 },
+    { 0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d },
+    { 0x00009944, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020 },
+    { 0x00009960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40 },
+    { 0x0000a960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40 },
+    { 0x0000b960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40 },
+    { 0x00009964, 0x00001120, 0x00001120, 0x00001120, 0x00001120, 0x00001120 },
+    { 0x0000c9bc, 0x001a0600, 0x001a0600, 0x001a0c00, 0x001a0c00, 0x001a0c00 },
+    { 0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be, 0x038919be },
+    { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 },
+    { 0x000099c8, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329 },
+    { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 },
+    { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 },
+    { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880, 0x00000880 },
+    { 0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788, 0xd03e4788 },
+    { 0x0000a20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000b20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000c20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120 },
+    { 0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a },
+    { 0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000 },
+    { 0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa, 0x0a1a7caa },
+    { 0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000, 0x18010000 },
+    { 0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402, 0x2e032402 },
+    { 0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06, 0x4a0a3c06 },
+    { 0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b, 0x621a540b },
+    { 0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b, 0x764f6c1b },
+    { 0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a, 0x845b7a5a },
+    { 0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf, 0x950f8ccf },
+    { 0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f, 0xa5cf9b4f },
+    { 0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f, 0xbddfaf1f },
+    { 0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f, 0xd1ffc93f },
+    { 0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+};
+
+static const u32 ar5416Common_9160[][2] = {
+    { 0x0000000c, 0x00000000 },
+    { 0x00000030, 0x00020015 },
+    { 0x00000034, 0x00000005 },
+    { 0x00000040, 0x00000000 },
+    { 0x00000044, 0x00000008 },
+    { 0x00000048, 0x00000008 },
+    { 0x0000004c, 0x00000010 },
+    { 0x00000050, 0x00000000 },
+    { 0x00000054, 0x0000001f },
+    { 0x00000800, 0x00000000 },
+    { 0x00000804, 0x00000000 },
+    { 0x00000808, 0x00000000 },
+    { 0x0000080c, 0x00000000 },
+    { 0x00000810, 0x00000000 },
+    { 0x00000814, 0x00000000 },
+    { 0x00000818, 0x00000000 },
+    { 0x0000081c, 0x00000000 },
+    { 0x00000820, 0x00000000 },
+    { 0x00000824, 0x00000000 },
+    { 0x00001040, 0x002ffc0f },
+    { 0x00001044, 0x002ffc0f },
+    { 0x00001048, 0x002ffc0f },
+    { 0x0000104c, 0x002ffc0f },
+    { 0x00001050, 0x002ffc0f },
+    { 0x00001054, 0x002ffc0f },
+    { 0x00001058, 0x002ffc0f },
+    { 0x0000105c, 0x002ffc0f },
+    { 0x00001060, 0x002ffc0f },
+    { 0x00001064, 0x002ffc0f },
+    { 0x00001230, 0x00000000 },
+    { 0x00001270, 0x00000000 },
+    { 0x00001038, 0x00000000 },
+    { 0x00001078, 0x00000000 },
+    { 0x000010b8, 0x00000000 },
+    { 0x000010f8, 0x00000000 },
+    { 0x00001138, 0x00000000 },
+    { 0x00001178, 0x00000000 },
+    { 0x000011b8, 0x00000000 },
+    { 0x000011f8, 0x00000000 },
+    { 0x00001238, 0x00000000 },
+    { 0x00001278, 0x00000000 },
+    { 0x000012b8, 0x00000000 },
+    { 0x000012f8, 0x00000000 },
+    { 0x00001338, 0x00000000 },
+    { 0x00001378, 0x00000000 },
+    { 0x000013b8, 0x00000000 },
+    { 0x000013f8, 0x00000000 },
+    { 0x00001438, 0x00000000 },
+    { 0x00001478, 0x00000000 },
+    { 0x000014b8, 0x00000000 },
+    { 0x000014f8, 0x00000000 },
+    { 0x00001538, 0x00000000 },
+    { 0x00001578, 0x00000000 },
+    { 0x000015b8, 0x00000000 },
+    { 0x000015f8, 0x00000000 },
+    { 0x00001638, 0x00000000 },
+    { 0x00001678, 0x00000000 },
+    { 0x000016b8, 0x00000000 },
+    { 0x000016f8, 0x00000000 },
+    { 0x00001738, 0x00000000 },
+    { 0x00001778, 0x00000000 },
+    { 0x000017b8, 0x00000000 },
+    { 0x000017f8, 0x00000000 },
+    { 0x0000103c, 0x00000000 },
+    { 0x0000107c, 0x00000000 },
+    { 0x000010bc, 0x00000000 },
+    { 0x000010fc, 0x00000000 },
+    { 0x0000113c, 0x00000000 },
+    { 0x0000117c, 0x00000000 },
+    { 0x000011bc, 0x00000000 },
+    { 0x000011fc, 0x00000000 },
+    { 0x0000123c, 0x00000000 },
+    { 0x0000127c, 0x00000000 },
+    { 0x000012bc, 0x00000000 },
+    { 0x000012fc, 0x00000000 },
+    { 0x0000133c, 0x00000000 },
+    { 0x0000137c, 0x00000000 },
+    { 0x000013bc, 0x00000000 },
+    { 0x000013fc, 0x00000000 },
+    { 0x0000143c, 0x00000000 },
+    { 0x0000147c, 0x00000000 },
+    { 0x00004030, 0x00000002 },
+    { 0x0000403c, 0x00000002 },
+    { 0x00007010, 0x00000020 },
+    { 0x00007038, 0x000004c2 },
+    { 0x00008004, 0x00000000 },
+    { 0x00008008, 0x00000000 },
+    { 0x0000800c, 0x00000000 },
+    { 0x00008018, 0x00000700 },
+    { 0x00008020, 0x00000000 },
+    { 0x00008038, 0x00000000 },
+    { 0x0000803c, 0x00000000 },
+    { 0x00008048, 0x40000000 },
+    { 0x00008054, 0x00000000 },
+    { 0x00008058, 0x00000000 },
+    { 0x0000805c, 0x000fc78f },
+    { 0x00008060, 0x0000000f },
+    { 0x00008064, 0x00000000 },
+    { 0x000080c0, 0x2a82301a },
+    { 0x000080c4, 0x05dc01e0 },
+    { 0x000080c8, 0x1f402710 },
+    { 0x000080cc, 0x01f40000 },
+    { 0x000080d0, 0x00001e00 },
+    { 0x000080d4, 0x00000000 },
+    { 0x000080d8, 0x00400000 },
+    { 0x000080e0, 0xffffffff },
+    { 0x000080e4, 0x0000ffff },
+    { 0x000080e8, 0x003f3f3f },
+    { 0x000080ec, 0x00000000 },
+    { 0x000080f0, 0x00000000 },
+    { 0x000080f4, 0x00000000 },
+    { 0x000080f8, 0x00000000 },
+    { 0x000080fc, 0x00020000 },
+    { 0x00008100, 0x00020000 },
+    { 0x00008104, 0x00000001 },
+    { 0x00008108, 0x00000052 },
+    { 0x0000810c, 0x00000000 },
+    { 0x00008110, 0x00000168 },
+    { 0x00008118, 0x000100aa },
+    { 0x0000811c, 0x00003210 },
+    { 0x00008120, 0x08f04800 },
+    { 0x00008124, 0x00000000 },
+    { 0x00008128, 0x00000000 },
+    { 0x0000812c, 0x00000000 },
+    { 0x00008130, 0x00000000 },
+    { 0x00008134, 0x00000000 },
+    { 0x00008138, 0x00000000 },
+    { 0x0000813c, 0x00000000 },
+    { 0x00008144, 0x00000000 },
+    { 0x00008168, 0x00000000 },
+    { 0x0000816c, 0x00000000 },
+    { 0x00008170, 0x32143320 },
+    { 0x00008174, 0xfaa4fa50 },
+    { 0x00008178, 0x00000100 },
+    { 0x0000817c, 0x00000000 },
+    { 0x000081c4, 0x00000000 },
+    { 0x000081d0, 0x00003210 },
+    { 0x000081ec, 0x00000000 },
+    { 0x000081f0, 0x00000000 },
+    { 0x000081f4, 0x00000000 },
+    { 0x000081f8, 0x00000000 },
+    { 0x000081fc, 0x00000000 },
+    { 0x00008200, 0x00000000 },
+    { 0x00008204, 0x00000000 },
+    { 0x00008208, 0x00000000 },
+    { 0x0000820c, 0x00000000 },
+    { 0x00008210, 0x00000000 },
+    { 0x00008214, 0x00000000 },
+    { 0x00008218, 0x00000000 },
+    { 0x0000821c, 0x00000000 },
+    { 0x00008220, 0x00000000 },
+    { 0x00008224, 0x00000000 },
+    { 0x00008228, 0x00000000 },
+    { 0x0000822c, 0x00000000 },
+    { 0x00008230, 0x00000000 },
+    { 0x00008234, 0x00000000 },
+    { 0x00008238, 0x00000000 },
+    { 0x0000823c, 0x00000000 },
+    { 0x00008240, 0x00100000 },
+    { 0x00008244, 0x0010f400 },
+    { 0x00008248, 0x00000100 },
+    { 0x0000824c, 0x0001e800 },
+    { 0x00008250, 0x00000000 },
+    { 0x00008254, 0x00000000 },
+    { 0x00008258, 0x00000000 },
+    { 0x0000825c, 0x400000ff },
+    { 0x00008260, 0x00080922 },
+    { 0x00008270, 0x00000000 },
+    { 0x00008274, 0x40000000 },
+    { 0x00008278, 0x003e4180 },
+    { 0x0000827c, 0x00000000 },
+    { 0x00008284, 0x0000002c },
+    { 0x00008288, 0x0000002c },
+    { 0x0000828c, 0x00000000 },
+    { 0x00008294, 0x00000000 },
+    { 0x00008298, 0x00000000 },
+    { 0x00008300, 0x00000000 },
+    { 0x00008304, 0x00000000 },
+    { 0x00008308, 0x00000000 },
+    { 0x0000830c, 0x00000000 },
+    { 0x00008310, 0x00000000 },
+    { 0x00008314, 0x00000000 },
+    { 0x00008318, 0x00000000 },
+    { 0x00008328, 0x00000000 },
+    { 0x0000832c, 0x00000007 },
+    { 0x00008330, 0x00000302 },
+    { 0x00008334, 0x00000e00 },
+    { 0x00008338, 0x00000000 },
+    { 0x0000833c, 0x00000000 },
+    { 0x00008340, 0x000107ff },
+    { 0x00009808, 0x00000000 },
+    { 0x0000980c, 0xad848e19 },
+    { 0x00009810, 0x7d14e000 },
+    { 0x00009814, 0x9c0a9f6b },
+    { 0x0000981c, 0x00000000 },
+    { 0x0000982c, 0x0000a000 },
+    { 0x00009830, 0x00000000 },
+    { 0x0000983c, 0x00200400 },
+    { 0x00009840, 0x206a01ae },
+    { 0x0000984c, 0x1284233c },
+    { 0x00009854, 0x00000859 },
+    { 0x00009900, 0x00000000 },
+    { 0x00009904, 0x00000000 },
+    { 0x00009908, 0x00000000 },
+    { 0x0000990c, 0x00000000 },
+    { 0x0000991c, 0x10000fff },
+    { 0x00009920, 0x05100000 },
+    { 0x0000a920, 0x05100000 },
+    { 0x0000b920, 0x05100000 },
+    { 0x00009928, 0x00000001 },
+    { 0x0000992c, 0x00000004 },
+    { 0x00009934, 0x1e1f2022 },
+    { 0x00009938, 0x0a0b0c0d },
+    { 0x0000993c, 0x00000000 },
+    { 0x00009948, 0x9280b212 },
+    { 0x0000994c, 0x00020028 },
+    { 0x00009954, 0x5f3ca3de },
+    { 0x00009958, 0x2108ecff },
+    { 0x00009940, 0x00750604 },
+    { 0x0000c95c, 0x004b6a8e },
+    { 0x0000c968, 0x000003ce },
+    { 0x00009970, 0x190fb515 },
+    { 0x00009974, 0x00000000 },
+    { 0x00009978, 0x00000001 },
+    { 0x0000997c, 0x00000000 },
+    { 0x00009980, 0x00000000 },
+    { 0x00009984, 0x00000000 },
+    { 0x00009988, 0x00000000 },
+    { 0x0000998c, 0x00000000 },
+    { 0x00009990, 0x00000000 },
+    { 0x00009994, 0x00000000 },
+    { 0x00009998, 0x00000000 },
+    { 0x0000999c, 0x00000000 },
+    { 0x000099a0, 0x00000000 },
+    { 0x000099a4, 0x00000001 },
+    { 0x000099a8, 0x201fff00 },
+    { 0x000099ac, 0x006f0000 },
+    { 0x000099b0, 0x03051000 },
+    { 0x000099dc, 0x00000000 },
+    { 0x000099e0, 0x00000200 },
+    { 0x000099e4, 0xaaaaaaaa },
+    { 0x000099e8, 0x3c466478 },
+    { 0x000099ec, 0x0cc80caa },
+    { 0x000099fc, 0x00001042 },
+    { 0x00009b00, 0x00000000 },
+    { 0x00009b04, 0x00000001 },
+    { 0x00009b08, 0x00000002 },
+    { 0x00009b0c, 0x00000003 },
+    { 0x00009b10, 0x00000004 },
+    { 0x00009b14, 0x00000005 },
+    { 0x00009b18, 0x00000008 },
+    { 0x00009b1c, 0x00000009 },
+    { 0x00009b20, 0x0000000a },
+    { 0x00009b24, 0x0000000b },
+    { 0x00009b28, 0x0000000c },
+    { 0x00009b2c, 0x0000000d },
+    { 0x00009b30, 0x00000010 },
+    { 0x00009b34, 0x00000011 },
+    { 0x00009b38, 0x00000012 },
+    { 0x00009b3c, 0x00000013 },
+    { 0x00009b40, 0x00000014 },
+    { 0x00009b44, 0x00000015 },
+    { 0x00009b48, 0x00000018 },
+    { 0x00009b4c, 0x00000019 },
+    { 0x00009b50, 0x0000001a },
+    { 0x00009b54, 0x0000001b },
+    { 0x00009b58, 0x0000001c },
+    { 0x00009b5c, 0x0000001d },
+    { 0x00009b60, 0x00000020 },
+    { 0x00009b64, 0x00000021 },
+    { 0x00009b68, 0x00000022 },
+    { 0x00009b6c, 0x00000023 },
+    { 0x00009b70, 0x00000024 },
+    { 0x00009b74, 0x00000025 },
+    { 0x00009b78, 0x00000028 },
+    { 0x00009b7c, 0x00000029 },
+    { 0x00009b80, 0x0000002a },
+    { 0x00009b84, 0x0000002b },
+    { 0x00009b88, 0x0000002c },
+    { 0x00009b8c, 0x0000002d },
+    { 0x00009b90, 0x00000030 },
+    { 0x00009b94, 0x00000031 },
+    { 0x00009b98, 0x00000032 },
+    { 0x00009b9c, 0x00000033 },
+    { 0x00009ba0, 0x00000034 },
+    { 0x00009ba4, 0x00000035 },
+    { 0x00009ba8, 0x00000035 },
+    { 0x00009bac, 0x00000035 },
+    { 0x00009bb0, 0x00000035 },
+    { 0x00009bb4, 0x00000035 },
+    { 0x00009bb8, 0x00000035 },
+    { 0x00009bbc, 0x00000035 },
+    { 0x00009bc0, 0x00000035 },
+    { 0x00009bc4, 0x00000035 },
+    { 0x00009bc8, 0x00000035 },
+    { 0x00009bcc, 0x00000035 },
+    { 0x00009bd0, 0x00000035 },
+    { 0x00009bd4, 0x00000035 },
+    { 0x00009bd8, 0x00000035 },
+    { 0x00009bdc, 0x00000035 },
+    { 0x00009be0, 0x00000035 },
+    { 0x00009be4, 0x00000035 },
+    { 0x00009be8, 0x00000035 },
+    { 0x00009bec, 0x00000035 },
+    { 0x00009bf0, 0x00000035 },
+    { 0x00009bf4, 0x00000035 },
+    { 0x00009bf8, 0x00000010 },
+    { 0x00009bfc, 0x0000001a },
+    { 0x0000a210, 0x40806333 },
+    { 0x0000a214, 0x00106c10 },
+    { 0x0000a218, 0x009c4060 },
+    { 0x0000a220, 0x018830c6 },
+    { 0x0000a224, 0x00000400 },
+    { 0x0000a228, 0x001a0bb5 },
+    { 0x0000a22c, 0x00000000 },
+    { 0x0000a234, 0x20202020 },
+    { 0x0000a238, 0x20202020 },
+    { 0x0000a23c, 0x13c889af },
+    { 0x0000a240, 0x38490a20 },
+    { 0x0000a244, 0x00007bb6 },
+    { 0x0000a248, 0x0fff3ffc },
+    { 0x0000a24c, 0x00000001 },
+    { 0x0000a250, 0x0000a000 },
+    { 0x0000a254, 0x00000000 },
+    { 0x0000a258, 0x0cc75380 },
+    { 0x0000a25c, 0x0f0f0f01 },
+    { 0x0000a260, 0xdfa91f01 },
+    { 0x0000a268, 0x00000001 },
+    { 0x0000a26c, 0x0ebae9c6 },
+    { 0x0000b26c, 0x0ebae9c6 },
+    { 0x0000c26c, 0x0ebae9c6 },
+    { 0x0000d270, 0x00820820 },
+    { 0x0000a278, 0x1ce739ce },
+    { 0x0000a27c, 0x050701ce },
+    { 0x0000a338, 0x00000000 },
+    { 0x0000a33c, 0x00000000 },
+    { 0x0000a340, 0x00000000 },
+    { 0x0000a344, 0x00000000 },
+    { 0x0000a348, 0x3fffffff },
+    { 0x0000a34c, 0x3fffffff },
+    { 0x0000a350, 0x3fffffff },
+    { 0x0000a354, 0x0003ffff },
+    { 0x0000a358, 0x79a8aa33 },
+    { 0x0000d35c, 0x07ffffef },
+    { 0x0000d360, 0x0fffffe7 },
+    { 0x0000d364, 0x17ffffe5 },
+    { 0x0000d368, 0x1fffffe4 },
+    { 0x0000d36c, 0x37ffffe3 },
+    { 0x0000d370, 0x3fffffe3 },
+    { 0x0000d374, 0x57ffffe3 },
+    { 0x0000d378, 0x5fffffe2 },
+    { 0x0000d37c, 0x7fffffe2 },
+    { 0x0000d380, 0x7f3c7bba },
+    { 0x0000d384, 0xf3307ff0 },
+    { 0x0000a388, 0x0c000000 },
+    { 0x0000a38c, 0x20202020 },
+    { 0x0000a390, 0x20202020 },
+    { 0x0000a394, 0x1ce739ce },
+    { 0x0000a398, 0x000001ce },
+    { 0x0000a39c, 0x00000001 },
+    { 0x0000a3a0, 0x00000000 },
+    { 0x0000a3a4, 0x00000000 },
+    { 0x0000a3a8, 0x00000000 },
+    { 0x0000a3ac, 0x00000000 },
+    { 0x0000a3b0, 0x00000000 },
+    { 0x0000a3b4, 0x00000000 },
+    { 0x0000a3b8, 0x00000000 },
+    { 0x0000a3bc, 0x00000000 },
+    { 0x0000a3c0, 0x00000000 },
+    { 0x0000a3c4, 0x00000000 },
+    { 0x0000a3c8, 0x00000246 },
+    { 0x0000a3cc, 0x20202020 },
+    { 0x0000a3d0, 0x20202020 },
+    { 0x0000a3d4, 0x20202020 },
+    { 0x0000a3dc, 0x1ce739ce },
+    { 0x0000a3e0, 0x000001ce },
+};
+
+static const u32 ar5416Bank0_9160[][2] = {
+    { 0x000098b0, 0x1e5795e5 },
+    { 0x000098e0, 0x02008020 },
+};
+
+static const u32 ar5416BB_RfGain_9160[][3] = {
+    { 0x00009a00, 0x00000000, 0x00000000 },
+    { 0x00009a04, 0x00000040, 0x00000040 },
+    { 0x00009a08, 0x00000080, 0x00000080 },
+    { 0x00009a0c, 0x000001a1, 0x00000141 },
+    { 0x00009a10, 0x000001e1, 0x00000181 },
+    { 0x00009a14, 0x00000021, 0x000001c1 },
+    { 0x00009a18, 0x00000061, 0x00000001 },
+    { 0x00009a1c, 0x00000168, 0x00000041 },
+    { 0x00009a20, 0x000001a8, 0x000001a8 },
+    { 0x00009a24, 0x000001e8, 0x000001e8 },
+    { 0x00009a28, 0x00000028, 0x00000028 },
+    { 0x00009a2c, 0x00000068, 0x00000068 },
+    { 0x00009a30, 0x00000189, 0x000000a8 },
+    { 0x00009a34, 0x000001c9, 0x00000169 },
+    { 0x00009a38, 0x00000009, 0x000001a9 },
+    { 0x00009a3c, 0x00000049, 0x000001e9 },
+    { 0x00009a40, 0x00000089, 0x00000029 },
+    { 0x00009a44, 0x00000170, 0x00000069 },
+    { 0x00009a48, 0x000001b0, 0x00000190 },
+    { 0x00009a4c, 0x000001f0, 0x000001d0 },
+    { 0x00009a50, 0x00000030, 0x00000010 },
+    { 0x00009a54, 0x00000070, 0x00000050 },
+    { 0x00009a58, 0x00000191, 0x00000090 },
+    { 0x00009a5c, 0x000001d1, 0x00000151 },
+    { 0x00009a60, 0x00000011, 0x00000191 },
+    { 0x00009a64, 0x00000051, 0x000001d1 },
+    { 0x00009a68, 0x00000091, 0x00000011 },
+    { 0x00009a6c, 0x000001b8, 0x00000051 },
+    { 0x00009a70, 0x000001f8, 0x00000198 },
+    { 0x00009a74, 0x00000038, 0x000001d8 },
+    { 0x00009a78, 0x00000078, 0x00000018 },
+    { 0x00009a7c, 0x00000199, 0x00000058 },
+    { 0x00009a80, 0x000001d9, 0x00000098 },
+    { 0x00009a84, 0x00000019, 0x00000159 },
+    { 0x00009a88, 0x00000059, 0x00000199 },
+    { 0x00009a8c, 0x00000099, 0x000001d9 },
+    { 0x00009a90, 0x000000d9, 0x00000019 },
+    { 0x00009a94, 0x000000f9, 0x00000059 },
+    { 0x00009a98, 0x000000f9, 0x00000099 },
+    { 0x00009a9c, 0x000000f9, 0x000000d9 },
+    { 0x00009aa0, 0x000000f9, 0x000000f9 },
+    { 0x00009aa4, 0x000000f9, 0x000000f9 },
+    { 0x00009aa8, 0x000000f9, 0x000000f9 },
+    { 0x00009aac, 0x000000f9, 0x000000f9 },
+    { 0x00009ab0, 0x000000f9, 0x000000f9 },
+    { 0x00009ab4, 0x000000f9, 0x000000f9 },
+    { 0x00009ab8, 0x000000f9, 0x000000f9 },
+    { 0x00009abc, 0x000000f9, 0x000000f9 },
+    { 0x00009ac0, 0x000000f9, 0x000000f9 },
+    { 0x00009ac4, 0x000000f9, 0x000000f9 },
+    { 0x00009ac8, 0x000000f9, 0x000000f9 },
+    { 0x00009acc, 0x000000f9, 0x000000f9 },
+    { 0x00009ad0, 0x000000f9, 0x000000f9 },
+    { 0x00009ad4, 0x000000f9, 0x000000f9 },
+    { 0x00009ad8, 0x000000f9, 0x000000f9 },
+    { 0x00009adc, 0x000000f9, 0x000000f9 },
+    { 0x00009ae0, 0x000000f9, 0x000000f9 },
+    { 0x00009ae4, 0x000000f9, 0x000000f9 },
+    { 0x00009ae8, 0x000000f9, 0x000000f9 },
+    { 0x00009aec, 0x000000f9, 0x000000f9 },
+    { 0x00009af0, 0x000000f9, 0x000000f9 },
+    { 0x00009af4, 0x000000f9, 0x000000f9 },
+    { 0x00009af8, 0x000000f9, 0x000000f9 },
+    { 0x00009afc, 0x000000f9, 0x000000f9 },
+};
+
+static const u32 ar5416Bank1_9160[][2] = {
+    { 0x000098b0, 0x02108421 },
+    { 0x000098ec, 0x00000008 },
+};
+
+static const u32 ar5416Bank2_9160[][2] = {
+    { 0x000098b0, 0x0e73ff17 },
+    { 0x000098e0, 0x00000420 },
+};
+
+static const u32 ar5416Bank3_9160[][3] = {
+    { 0x000098f0, 0x01400018, 0x01c00018 },
+};
+
+static const u32 ar5416Bank6_9160[][3] = {
+
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00e00000, 0x00e00000 },
+    { 0x0000989c, 0x005e0000, 0x005e0000 },
+    { 0x0000989c, 0x00120000, 0x00120000 },
+    { 0x0000989c, 0x00620000, 0x00620000 },
+    { 0x0000989c, 0x00020000, 0x00020000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x40ff0000, 0x40ff0000 },
+    { 0x0000989c, 0x005f0000, 0x005f0000 },
+    { 0x0000989c, 0x00870000, 0x00870000 },
+    { 0x0000989c, 0x00f90000, 0x00f90000 },
+    { 0x0000989c, 0x007b0000, 0x007b0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00f50000, 0x00f50000 },
+    { 0x0000989c, 0x00dc0000, 0x00dc0000 },
+    { 0x0000989c, 0x00110000, 0x00110000 },
+    { 0x0000989c, 0x006100a8, 0x006100a8 },
+    { 0x0000989c, 0x004210a2, 0x004210a2 },
+    { 0x0000989c, 0x0014008f, 0x0014008f },
+    { 0x0000989c, 0x00c40003, 0x00c40003 },
+    { 0x0000989c, 0x003000f2, 0x003000f2 },
+    { 0x0000989c, 0x00440016, 0x00440016 },
+    { 0x0000989c, 0x00410040, 0x00410040 },
+    { 0x0000989c, 0x0001805e, 0x0001805e },
+    { 0x0000989c, 0x0000c0ab, 0x0000c0ab },
+    { 0x0000989c, 0x000000f1, 0x000000f1 },
+    { 0x0000989c, 0x00002081, 0x00002081 },
+    { 0x0000989c, 0x000000d4, 0x000000d4 },
+    { 0x000098d0, 0x0000000f, 0x0010000f },
+};
+
+static const u32 ar5416Bank6TPC_9160[][3] = {
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00000000, 0x00000000 },
+    { 0x0000989c, 0x00e00000, 0x00e00000 },
+    { 0x0000989c, 0x005e0000, 0x005e0000 },
+    { 0x0000989c, 0x00120000, 0x00120000 },
+    { 0x0000989c, 0x00620000, 0x00620000 },
+    { 0x0000989c, 0x00020000, 0x00020000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x40ff0000, 0x40ff0000 },
+    { 0x0000989c, 0x005f0000, 0x005f0000 },
+    { 0x0000989c, 0x00870000, 0x00870000 },
+    { 0x0000989c, 0x00f90000, 0x00f90000 },
+    { 0x0000989c, 0x007b0000, 0x007b0000 },
+    { 0x0000989c, 0x00ff0000, 0x00ff0000 },
+    { 0x0000989c, 0x00f50000, 0x00f50000 },
+    { 0x0000989c, 0x00dc0000, 0x00dc0000 },
+    { 0x0000989c, 0x00110000, 0x00110000 },
+    { 0x0000989c, 0x006100a8, 0x006100a8 },
+    { 0x0000989c, 0x00423022, 0x00423022 },
+    { 0x0000989c, 0x2014008f, 0x2014008f },
+    { 0x0000989c, 0x00c40002, 0x00c40002 },
+    { 0x0000989c, 0x003000f2, 0x003000f2 },
+    { 0x0000989c, 0x00440016, 0x00440016 },
+    { 0x0000989c, 0x00410040, 0x00410040 },
+    { 0x0000989c, 0x0001805e, 0x0001805e },
+    { 0x0000989c, 0x0000c0ab, 0x0000c0ab },
+    { 0x0000989c, 0x000000e1, 0x000000e1 },
+    { 0x0000989c, 0x00007080, 0x00007080 },
+    { 0x0000989c, 0x000000d4, 0x000000d4 },
+    { 0x000098d0, 0x0000000f, 0x0010000f },
+};
+
+static const u32 ar5416Bank7_9160[][2] = {
+    { 0x0000989c, 0x00000500 },
+    { 0x0000989c, 0x00000800 },
+    { 0x000098cc, 0x0000000e },
+};
+
+
+static u32 ar5416Addac_9160[][2] = {
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x000000c0 },
+    {0x0000989c,  0x00000018 },
+    {0x0000989c,  0x00000004 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x000000c0 },
+    {0x0000989c,  0x00000019 },
+    {0x0000989c,  0x00000004 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000004 },
+    {0x0000989c,  0x00000003 },
+    {0x0000989c,  0x00000008 },
+    {0x0000989c,  0x00000000 },
+    {0x000098cc,  0x00000000 },
+};
+
+
+static u32 ar5416Addac_91601_1[][2] = {
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x000000c0 },
+    {0x0000989c,  0x00000018 },
+    {0x0000989c,  0x00000004 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x000000c0 },
+    {0x0000989c,  0x00000019 },
+    {0x0000989c,  0x00000004 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x0000989c,  0x00000000 },
+    {0x000098cc,  0x00000000 },
+};
+
+
+
+static const u32 ar9280Modes_9280[][6] = {
+    { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 },
+    { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 },
+    { 0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180 },
+    { 0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008 },
+    { 0x00008014, 0x03e803e8, 0x07d007d0, 0x10801080, 0x08400840, 0x06e006e0 },
+    { 0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b, 0x0988004f },
+    { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
+    { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
+    { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
+    { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 },
+    { 0x00009844, 0x1372161e, 0x1372161e, 0x137216a0, 0x137216a0, 0x137216a0 },
+    { 0x00009848, 0x00028566, 0x00028566, 0x00028563, 0x00028563, 0x00028563 },
+    { 0x0000a848, 0x00028566, 0x00028566, 0x00028563, 0x00028563, 0x00028563 },
+    { 0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2 },
+    { 0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e },
+    { 0x0000985c, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e },
+    { 0x00009860, 0x00049d18, 0x00049d18, 0x00049d20, 0x00049d20, 0x00049d18 },
+    { 0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
+    { 0x00009868, 0x5ac64190, 0x5ac64190, 0x5ac64190, 0x5ac64190, 0x5ac64190 },
+    { 0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881 },
+    { 0x00009914, 0x000007d0, 0x000007d0, 0x00000898, 0x00000898, 0x000007d0 },
+    { 0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016 },
+    { 0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d },
+    { 0x00009944, 0xdfbc1010, 0xdfbc1010, 0xdfbc1010, 0xdfbc1010, 0xdfbc1010 },
+    { 0x00009960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 },
+    { 0x0000a960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 },
+    { 0x00009964, 0x00000210, 0x00000210, 0x00000210, 0x00000210, 0x00000210 },
+    { 0x0000c9b8, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a },
+    { 0x0000c9bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00, 0x00000c00 },
+    { 0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4 },
+    { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 },
+    { 0x000099c8, 0x60f6532c, 0x60f6532c, 0x60f6532c, 0x60f6532c, 0x60f6532c },
+    { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 },
+    { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 },
+    { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x00009a00, 0x00008184, 0x00008184, 0x00000214, 0x00000214, 0x00000214 },
+    { 0x00009a04, 0x00008188, 0x00008188, 0x00000218, 0x00000218, 0x00000218 },
+    { 0x00009a08, 0x0000818c, 0x0000818c, 0x00000224, 0x00000224, 0x00000224 },
+    { 0x00009a0c, 0x00008190, 0x00008190, 0x00000228, 0x00000228, 0x00000228 },
+    { 0x00009a10, 0x00008194, 0x00008194, 0x0000022c, 0x0000022c, 0x0000022c },
+    { 0x00009a14, 0x00008200, 0x00008200, 0x00000230, 0x00000230, 0x00000230 },
+    { 0x00009a18, 0x00008204, 0x00008204, 0x000002a4, 0x000002a4, 0x000002a4 },
+    { 0x00009a1c, 0x00008208, 0x00008208, 0x000002a8, 0x000002a8, 0x000002a8 },
+    { 0x00009a20, 0x0000820c, 0x0000820c, 0x000002ac, 0x000002ac, 0x000002ac },
+    { 0x00009a24, 0x00008210, 0x00008210, 0x000002b0, 0x000002b0, 0x000002b0 },
+    { 0x00009a28, 0x00008214, 0x00008214, 0x000002b4, 0x000002b4, 0x000002b4 },
+    { 0x00009a2c, 0x00008280, 0x00008280, 0x000002b8, 0x000002b8, 0x000002b8 },
+    { 0x00009a30, 0x00008284, 0x00008284, 0x00000390, 0x00000390, 0x00000390 },
+    { 0x00009a34, 0x00008288, 0x00008288, 0x00000394, 0x00000394, 0x00000394 },
+    { 0x00009a38, 0x0000828c, 0x0000828c, 0x00000398, 0x00000398, 0x00000398 },
+    { 0x00009a3c, 0x00008290, 0x00008290, 0x00000334, 0x00000334, 0x00000334 },
+    { 0x00009a40, 0x00008300, 0x00008300, 0x00000338, 0x00000338, 0x00000338 },
+    { 0x00009a44, 0x00008304, 0x00008304, 0x000003ac, 0x000003ac, 0x000003ac },
+    { 0x00009a48, 0x00008308, 0x00008308, 0x000003b0, 0x000003b0, 0x000003b0 },
+    { 0x00009a4c, 0x0000830c, 0x0000830c, 0x000003b4, 0x000003b4, 0x000003b4 },
+    { 0x00009a50, 0x00008310, 0x00008310, 0x000003b8, 0x000003b8, 0x000003b8 },
+    { 0x00009a54, 0x00008314, 0x00008314, 0x000003a5, 0x000003a5, 0x000003a5 },
+    { 0x00009a58, 0x00008380, 0x00008380, 0x000003a9, 0x000003a9, 0x000003a9 },
+    { 0x00009a5c, 0x00008384, 0x00008384, 0x000003ad, 0x000003ad, 0x000003ad },
+    { 0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194, 0x00008194 },
+    { 0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0, 0x000081a0 },
+    { 0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c, 0x0000820c },
+    { 0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8, 0x000081a8 },
+    { 0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284, 0x00008284 },
+    { 0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288, 0x00008288 },
+    { 0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224, 0x00008224 },
+    { 0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290, 0x00008290 },
+    { 0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300, 0x00008300 },
+    { 0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304, 0x00008304 },
+    { 0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308, 0x00008308 },
+    { 0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c, 0x0000830c },
+    { 0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380, 0x00008380 },
+    { 0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384, 0x00008384 },
+    { 0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700, 0x00008700 },
+    { 0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704, 0x00008704 },
+    { 0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708, 0x00008708 },
+    { 0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c, 0x0000870c },
+    { 0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780, 0x00008780 },
+    { 0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784, 0x00008784 },
+    { 0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00, 0x00008b00 },
+    { 0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04, 0x00008b04 },
+    { 0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08, 0x00008b08 },
+    { 0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c, 0x00008b0c },
+    { 0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80, 0x00008b80 },
+    { 0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84, 0x00008b84 },
+    { 0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88, 0x00008b88 },
+    { 0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c, 0x00008b8c },
+    { 0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90, 0x00008b90 },
+    { 0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80, 0x00008f80 },
+    { 0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84, 0x00008f84 },
+    { 0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88, 0x00008f88 },
+    { 0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c, 0x00008f8c },
+    { 0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90, 0x00008f90 },
+    { 0x00009ae8, 0x0000b780, 0x0000b780, 0x0000930c, 0x0000930c, 0x0000930c },
+    { 0x00009aec, 0x0000b784, 0x0000b784, 0x00009310, 0x00009310, 0x00009310 },
+    { 0x00009af0, 0x0000b788, 0x0000b788, 0x00009384, 0x00009384, 0x00009384 },
+    { 0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009388, 0x00009388, 0x00009388 },
+    { 0x00009af8, 0x0000b790, 0x0000b790, 0x00009324, 0x00009324, 0x00009324 },
+    { 0x00009afc, 0x0000b794, 0x0000b794, 0x00009704, 0x00009704, 0x00009704 },
+    { 0x00009b00, 0x0000b798, 0x0000b798, 0x000096a4, 0x000096a4, 0x000096a4 },
+    { 0x00009b04, 0x0000d784, 0x0000d784, 0x000096a8, 0x000096a8, 0x000096a8 },
+    { 0x00009b08, 0x0000d788, 0x0000d788, 0x00009710, 0x00009710, 0x00009710 },
+    { 0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009714, 0x00009714, 0x00009714 },
+    { 0x00009b10, 0x0000d790, 0x0000d790, 0x00009720, 0x00009720, 0x00009720 },
+    { 0x00009b14, 0x0000f780, 0x0000f780, 0x00009724, 0x00009724, 0x00009724 },
+    { 0x00009b18, 0x0000f784, 0x0000f784, 0x00009728, 0x00009728, 0x00009728 },
+    { 0x00009b1c, 0x0000f788, 0x0000f788, 0x0000972c, 0x0000972c, 0x0000972c },
+    { 0x00009b20, 0x0000f78c, 0x0000f78c, 0x000097a0, 0x000097a0, 0x000097a0 },
+    { 0x00009b24, 0x0000f790, 0x0000f790, 0x000097a4, 0x000097a4, 0x000097a4 },
+    { 0x00009b28, 0x0000f794, 0x0000f794, 0x000097a8, 0x000097a8, 0x000097a8 },
+    { 0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x000097b0, 0x000097b0, 0x000097b0 },
+    { 0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x000097b4, 0x000097b4, 0x000097b4 },
+    { 0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x000097b8, 0x000097b8, 0x000097b8 },
+    { 0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x000097a5, 0x000097a5, 0x000097a5 },
+    { 0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x000097a9, 0x000097a9, 0x000097a9 },
+    { 0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x000097ad, 0x000097ad, 0x000097ad },
+    { 0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x000097b1, 0x000097b1, 0x000097b1 },
+    { 0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x000097b5, 0x000097b5, 0x000097b5 },
+    { 0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x000097b9, 0x000097b9, 0x000097b9 },
+    { 0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x000097c5, 0x000097c5, 0x000097c5 },
+    { 0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x000097c9, 0x000097c9, 0x000097c9 },
+    { 0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x000097d1, 0x000097d1, 0x000097d1 },
+    { 0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x000097d5, 0x000097d5, 0x000097d5 },
+    { 0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x000097d9, 0x000097d9, 0x000097d9 },
+    { 0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x000097c6, 0x000097c6, 0x000097c6 },
+    { 0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x000097ca, 0x000097ca, 0x000097ca },
+    { 0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x000097ce, 0x000097ce, 0x000097ce },
+    { 0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x000097d2, 0x000097d2, 0x000097d2 },
+    { 0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x000097d6, 0x000097d6, 0x000097d6 },
+    { 0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x000097c3, 0x000097c3, 0x000097c3 },
+    { 0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x000097c7, 0x000097c7, 0x000097c7 },
+    { 0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x000097cb, 0x000097cb, 0x000097cb },
+    { 0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x000097cf, 0x000097cf, 0x000097cf },
+    { 0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x000097d7, 0x000097d7, 0x000097d7 },
+    { 0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009b98, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009b9c, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009ba0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009ba4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009ba8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bac, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bb0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bb4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bb8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bbc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bc0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bc4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bc8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bcc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bd0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bd4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bd8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bdc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009be0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009be4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009be8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bec, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bf0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bf4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bf8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bfc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x0000a204, 0x00000444, 0x00000444, 0x00000444, 0x00000444, 0x00000444 },
+    { 0x0000a208, 0x803e4788, 0x803e4788, 0x803e4788, 0x803e4788, 0x803e4788 },
+    { 0x0000a20c, 0x000c6019, 0x000c6019, 0x000c6019, 0x000c6019, 0x000c6019 },
+    { 0x0000b20c, 0x000c6019, 0x000c6019, 0x000c6019, 0x000c6019, 0x000c6019 },
+    { 0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a },
+    { 0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000 },
+    { 0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652 },
+    { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002, 0x00003002 },
+    { 0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009, 0x00008009 },
+    { 0x0000a30c, 0x0000a006, 0x0000a006, 0x0000b00b, 0x0000b00b, 0x0000b00b },
+    { 0x0000a310, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012 },
+    { 0x0000a314, 0x00011014, 0x00011014, 0x00012048, 0x00012048, 0x00012048 },
+    { 0x0000a318, 0x0001504a, 0x0001504a, 0x0001604a, 0x0001604a, 0x0001604a },
+    { 0x0000a31c, 0x0001904c, 0x0001904c, 0x0001a211, 0x0001a211, 0x0001a211 },
+    { 0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213, 0x0001e213 },
+    { 0x0000a324, 0x00020092, 0x00020092, 0x0002121b, 0x0002121b, 0x0002121b },
+    { 0x0000a328, 0x0002410a, 0x0002410a, 0x00024412, 0x00024412, 0x00024412 },
+    { 0x0000a32c, 0x0002710c, 0x0002710c, 0x00028414, 0x00028414, 0x00028414 },
+    { 0x0000a330, 0x0002b18b, 0x0002b18b, 0x0002b44a, 0x0002b44a, 0x0002b44a },
+    { 0x0000a334, 0x0002e1cc, 0x0002e1cc, 0x00030649, 0x00030649, 0x00030649 },
+    { 0x0000a338, 0x000321ec, 0x000321ec, 0x0003364b, 0x0003364b, 0x0003364b },
+    { 0x0000a33c, 0x000321ec, 0x000321ec, 0x00038a49, 0x00038a49, 0x00038a49 },
+    { 0x0000a340, 0x000321ec, 0x000321ec, 0x0003be48, 0x0003be48, 0x0003be48 },
+    { 0x0000a344, 0x000321ec, 0x000321ec, 0x0003ee4a, 0x0003ee4a, 0x0003ee4a },
+    { 0x0000a348, 0x000321ec, 0x000321ec, 0x00042e88, 0x00042e88, 0x00042e88 },
+    { 0x0000a34c, 0x000321ec, 0x000321ec, 0x00046e8a, 0x00046e8a, 0x00046e8a },
+    { 0x0000a350, 0x000321ec, 0x000321ec, 0x00049ec9, 0x00049ec9, 0x00049ec9 },
+    { 0x0000a354, 0x000321ec, 0x000321ec, 0x0004bf42, 0x0004bf42, 0x0004bf42 },
+    { 0x0000784c, 0x0e4f048c, 0x0e4f048c, 0x0e4d048c, 0x0e4d048c, 0x0e4d048c },
+    { 0x00007854, 0x12031828, 0x12031828, 0x12035828, 0x12035828, 0x12035828 },
+    { 0x00007870, 0x807ec400, 0x807ec400, 0x807ec000, 0x807ec000, 0x807ec000 },
+    { 0x0000788c, 0x00010000, 0x00010000, 0x00110000, 0x00110000, 0x00110000 },
+};
+
+static const u32 ar9280Common_9280[][2] = {
+    { 0x0000000c, 0x00000000 },
+    { 0x00000030, 0x00020015 },
+    { 0x00000034, 0x00000005 },
+    { 0x00000040, 0x00000000 },
+    { 0x00000044, 0x00000008 },
+    { 0x00000048, 0x00000008 },
+    { 0x0000004c, 0x00000010 },
+    { 0x00000050, 0x00000000 },
+    { 0x00000054, 0x0000001f },
+    { 0x00000800, 0x00000000 },
+    { 0x00000804, 0x00000000 },
+    { 0x00000808, 0x00000000 },
+    { 0x0000080c, 0x00000000 },
+    { 0x00000810, 0x00000000 },
+    { 0x00000814, 0x00000000 },
+    { 0x00000818, 0x00000000 },
+    { 0x0000081c, 0x00000000 },
+    { 0x00000820, 0x00000000 },
+    { 0x00000824, 0x00000000 },
+    { 0x00001040, 0x002ffc0f },
+    { 0x00001044, 0x002ffc0f },
+    { 0x00001048, 0x002ffc0f },
+    { 0x0000104c, 0x002ffc0f },
+    { 0x00001050, 0x002ffc0f },
+    { 0x00001054, 0x002ffc0f },
+    { 0x00001058, 0x002ffc0f },
+    { 0x0000105c, 0x002ffc0f },
+    { 0x00001060, 0x002ffc0f },
+    { 0x00001064, 0x002ffc0f },
+    { 0x00001230, 0x00000000 },
+    { 0x00001270, 0x00000000 },
+    { 0x00001038, 0x00000000 },
+    { 0x00001078, 0x00000000 },
+    { 0x000010b8, 0x00000000 },
+    { 0x000010f8, 0x00000000 },
+    { 0x00001138, 0x00000000 },
+    { 0x00001178, 0x00000000 },
+    { 0x000011b8, 0x00000000 },
+    { 0x000011f8, 0x00000000 },
+    { 0x00001238, 0x00000000 },
+    { 0x00001278, 0x00000000 },
+    { 0x000012b8, 0x00000000 },
+    { 0x000012f8, 0x00000000 },
+    { 0x00001338, 0x00000000 },
+    { 0x00001378, 0x00000000 },
+    { 0x000013b8, 0x00000000 },
+    { 0x000013f8, 0x00000000 },
+    { 0x00001438, 0x00000000 },
+    { 0x00001478, 0x00000000 },
+    { 0x000014b8, 0x00000000 },
+    { 0x000014f8, 0x00000000 },
+    { 0x00001538, 0x00000000 },
+    { 0x00001578, 0x00000000 },
+    { 0x000015b8, 0x00000000 },
+    { 0x000015f8, 0x00000000 },
+    { 0x00001638, 0x00000000 },
+    { 0x00001678, 0x00000000 },
+    { 0x000016b8, 0x00000000 },
+    { 0x000016f8, 0x00000000 },
+    { 0x00001738, 0x00000000 },
+    { 0x00001778, 0x00000000 },
+    { 0x000017b8, 0x00000000 },
+    { 0x000017f8, 0x00000000 },
+    { 0x0000103c, 0x00000000 },
+    { 0x0000107c, 0x00000000 },
+    { 0x000010bc, 0x00000000 },
+    { 0x000010fc, 0x00000000 },
+    { 0x0000113c, 0x00000000 },
+    { 0x0000117c, 0x00000000 },
+    { 0x000011bc, 0x00000000 },
+    { 0x000011fc, 0x00000000 },
+    { 0x0000123c, 0x00000000 },
+    { 0x0000127c, 0x00000000 },
+    { 0x000012bc, 0x00000000 },
+    { 0x000012fc, 0x00000000 },
+    { 0x0000133c, 0x00000000 },
+    { 0x0000137c, 0x00000000 },
+    { 0x000013bc, 0x00000000 },
+    { 0x000013fc, 0x00000000 },
+    { 0x0000143c, 0x00000000 },
+    { 0x0000147c, 0x00000000 },
+    { 0x00004030, 0x00000002 },
+    { 0x0000403c, 0x00000002 },
+    { 0x00004024, 0x0000001f },
+    { 0x00007010, 0x00000033 },
+    { 0x00007038, 0x000004c2 },
+    { 0x00008004, 0x00000000 },
+    { 0x00008008, 0x00000000 },
+    { 0x0000800c, 0x00000000 },
+    { 0x00008018, 0x00000700 },
+    { 0x00008020, 0x00000000 },
+    { 0x00008038, 0x00000000 },
+    { 0x0000803c, 0x00000000 },
+    { 0x00008048, 0x40000000 },
+    { 0x00008054, 0x00000000 },
+    { 0x00008058, 0x00000000 },
+    { 0x0000805c, 0x000fc78f },
+    { 0x00008060, 0x0000000f },
+    { 0x00008064, 0x00000000 },
+    { 0x00008070, 0x00000000 },
+    { 0x000080c0, 0x2a82301a },
+    { 0x000080c4, 0x05dc01e0 },
+    { 0x000080c8, 0x1f402710 },
+    { 0x000080cc, 0x01f40000 },
+    { 0x000080d0, 0x00001e00 },
+    { 0x000080d4, 0x00000000 },
+    { 0x000080d8, 0x00400000 },
+    { 0x000080e0, 0xffffffff },
+    { 0x000080e4, 0x0000ffff },
+    { 0x000080e8, 0x003f3f3f },
+    { 0x000080ec, 0x00000000 },
+    { 0x000080f0, 0x00000000 },
+    { 0x000080f4, 0x00000000 },
+    { 0x000080f8, 0x00000000 },
+    { 0x000080fc, 0x00020000 },
+    { 0x00008100, 0x00020000 },
+    { 0x00008104, 0x00000001 },
+    { 0x00008108, 0x00000052 },
+    { 0x0000810c, 0x00000000 },
+    { 0x00008110, 0x00000168 },
+    { 0x00008118, 0x000100aa },
+    { 0x0000811c, 0x00003210 },
+    { 0x00008120, 0x08f04800 },
+    { 0x00008124, 0x00000000 },
+    { 0x00008128, 0x00000000 },
+    { 0x0000812c, 0x00000000 },
+    { 0x00008130, 0x00000000 },
+    { 0x00008134, 0x00000000 },
+    { 0x00008138, 0x00000000 },
+    { 0x0000813c, 0x00000000 },
+    { 0x00008144, 0x00000000 },
+    { 0x00008168, 0x00000000 },
+    { 0x0000816c, 0x00000000 },
+    { 0x00008170, 0x32143320 },
+    { 0x00008174, 0xfaa4fa50 },
+    { 0x00008178, 0x00000100 },
+    { 0x0000817c, 0x00000000 },
+    { 0x000081c4, 0x00000000 },
+    { 0x000081d0, 0x00003210 },
+    { 0x000081ec, 0x00000000 },
+    { 0x000081f0, 0x00000000 },
+    { 0x000081f4, 0x00000000 },
+    { 0x000081f8, 0x00000000 },
+    { 0x000081fc, 0x00000000 },
+    { 0x00008200, 0x00000000 },
+    { 0x00008204, 0x00000000 },
+    { 0x00008208, 0x00000000 },
+    { 0x0000820c, 0x00000000 },
+    { 0x00008210, 0x00000000 },
+    { 0x00008214, 0x00000000 },
+    { 0x00008218, 0x00000000 },
+    { 0x0000821c, 0x00000000 },
+    { 0x00008220, 0x00000000 },
+    { 0x00008224, 0x00000000 },
+    { 0x00008228, 0x00000000 },
+    { 0x0000822c, 0x00000000 },
+    { 0x00008230, 0x00000000 },
+    { 0x00008234, 0x00000000 },
+    { 0x00008238, 0x00000000 },
+    { 0x0000823c, 0x00000000 },
+    { 0x00008240, 0x00100000 },
+    { 0x00008244, 0x0010f400 },
+    { 0x00008248, 0x00000100 },
+    { 0x0000824c, 0x0001e800 },
+    { 0x00008250, 0x00000000 },
+    { 0x00008254, 0x00000000 },
+    { 0x00008258, 0x00000000 },
+    { 0x0000825c, 0x400000ff },
+    { 0x00008260, 0x00080922 },
+    { 0x00008270, 0x00000000 },
+    { 0x00008274, 0x40000000 },
+    { 0x00008278, 0x003e4180 },
+    { 0x0000827c, 0x00000000 },
+    { 0x00008284, 0x0000002c },
+    { 0x00008288, 0x0000002c },
+    { 0x0000828c, 0x00000000 },
+    { 0x00008294, 0x00000000 },
+    { 0x00008298, 0x00000000 },
+    { 0x00008300, 0x00000000 },
+    { 0x00008304, 0x00000000 },
+    { 0x00008308, 0x00000000 },
+    { 0x0000830c, 0x00000000 },
+    { 0x00008310, 0x00000000 },
+    { 0x00008314, 0x00000000 },
+    { 0x00008318, 0x00000000 },
+    { 0x00008328, 0x00000000 },
+    { 0x0000832c, 0x00000007 },
+    { 0x00008330, 0x00000302 },
+    { 0x00008334, 0x00000e00 },
+    { 0x00008338, 0x00000000 },
+    { 0x0000833c, 0x00000000 },
+    { 0x00008340, 0x000107ff },
+    { 0x00008344, 0x00000000 },
+    { 0x00009808, 0x00000000 },
+    { 0x0000980c, 0xaf268e30 },
+    { 0x00009810, 0xfd14e000 },
+    { 0x00009814, 0x9c0a9f6b },
+    { 0x0000981c, 0x00000000 },
+    { 0x0000982c, 0x0000a000 },
+    { 0x00009830, 0x00000000 },
+    { 0x0000983c, 0x00200400 },
+    { 0x00009840, 0x206a01ae },
+    { 0x0000984c, 0x0040233c },
+    { 0x0000a84c, 0x0040233c },
+    { 0x00009854, 0x00000044 },
+    { 0x00009900, 0x00000000 },
+    { 0x00009904, 0x00000000 },
+    { 0x00009908, 0x00000000 },
+    { 0x0000990c, 0x00000000 },
+    { 0x0000991c, 0x10000fff },
+    { 0x00009920, 0x04900000 },
+    { 0x0000a920, 0x04900000 },
+    { 0x00009928, 0x00000001 },
+    { 0x0000992c, 0x00000004 },
+    { 0x00009934, 0x1e1f2022 },
+    { 0x00009938, 0x0a0b0c0d },
+    { 0x0000993c, 0x00000000 },
+    { 0x00009948, 0x9280c00a },
+    { 0x0000994c, 0x00020028 },
+    { 0x00009954, 0xe250a51e },
+    { 0x00009958, 0x3388ffff },
+    { 0x00009940, 0x00781204 },
+    { 0x0000c95c, 0x004b6a8e },
+    { 0x0000c968, 0x000003ce },
+    { 0x00009970, 0x190fb514 },
+    { 0x00009974, 0x00000000 },
+    { 0x00009978, 0x00000001 },
+    { 0x0000997c, 0x00000000 },
+    { 0x00009980, 0x00000000 },
+    { 0x00009984, 0x00000000 },
+    { 0x00009988, 0x00000000 },
+    { 0x0000998c, 0x00000000 },
+    { 0x00009990, 0x00000000 },
+    { 0x00009994, 0x00000000 },
+    { 0x00009998, 0x00000000 },
+    { 0x0000999c, 0x00000000 },
+    { 0x000099a0, 0x00000000 },
+    { 0x000099a4, 0x00000001 },
+    { 0x000099a8, 0x201fff00 },
+    { 0x000099ac, 0x006f00c4 },
+    { 0x000099b0, 0x03051000 },
+    { 0x000099b4, 0x00000820 },
+    { 0x000099dc, 0x00000000 },
+    { 0x000099e0, 0x00000000 },
+    { 0x000099e4, 0xaaaaaaaa },
+    { 0x000099e8, 0x3c466478 },
+    { 0x000099ec, 0x0cc80caa },
+    { 0x000099fc, 0x00001042 },
+    { 0x0000a210, 0x4080a333 },
+    { 0x0000a214, 0x40206c10 },
+    { 0x0000a218, 0x009c4060 },
+    { 0x0000a220, 0x01834061 },
+    { 0x0000a224, 0x00000400 },
+    { 0x0000a228, 0x000003b5 },
+    { 0x0000a22c, 0x23277200 },
+    { 0x0000a234, 0x20202020 },
+    { 0x0000a238, 0x20202020 },
+    { 0x0000a23c, 0x13c889af },
+    { 0x0000a240, 0x38490a20 },
+    { 0x0000a244, 0x00007bb6 },
+    { 0x0000a248, 0x0fff3ffc },
+    { 0x0000a24c, 0x00000001 },
+    { 0x0000a250, 0x001da000 },
+    { 0x0000a254, 0x00000000 },
+    { 0x0000a258, 0x0cdbd380 },
+    { 0x0000a25c, 0x0f0f0f01 },
+    { 0x0000a260, 0xdfa91f01 },
+    { 0x0000a268, 0x00000000 },
+    { 0x0000a26c, 0x0ebae9c6 },
+    { 0x0000b26c, 0x0ebae9c6 },
+    { 0x0000d270, 0x00820820 },
+    { 0x0000a278, 0x1ce739ce },
+    { 0x0000a27c, 0x050701ce },
+    { 0x0000a358, 0x7999aa0f },
+    { 0x0000d35c, 0x07ffffef },
+    { 0x0000d360, 0x0fffffe7 },
+    { 0x0000d364, 0x17ffffe5 },
+    { 0x0000d368, 0x1fffffe4 },
+    { 0x0000d36c, 0x37ffffe3 },
+    { 0x0000d370, 0x3fffffe3 },
+    { 0x0000d374, 0x57ffffe3 },
+    { 0x0000d378, 0x5fffffe2 },
+    { 0x0000d37c, 0x7fffffe2 },
+    { 0x0000d380, 0x7f3c7bba },
+    { 0x0000d384, 0xf3307ff0 },
+    { 0x0000a388, 0x0c000000 },
+    { 0x0000a38c, 0x20202020 },
+    { 0x0000a390, 0x20202020 },
+    { 0x0000a394, 0x1ce739ce },
+    { 0x0000a398, 0x000001ce },
+    { 0x0000a39c, 0x00000001 },
+    { 0x0000a3a0, 0x00000000 },
+    { 0x0000a3a4, 0x00000000 },
+    { 0x0000a3a8, 0x00000000 },
+    { 0x0000a3ac, 0x00000000 },
+    { 0x0000a3b0, 0x00000000 },
+    { 0x0000a3b4, 0x00000000 },
+    { 0x0000a3b8, 0x00000000 },
+    { 0x0000a3bc, 0x00000000 },
+    { 0x0000a3c0, 0x00000000 },
+    { 0x0000a3c4, 0x00000000 },
+    { 0x0000a3c8, 0x00000246 },
+    { 0x0000a3cc, 0x20202020 },
+    { 0x0000a3d0, 0x20202020 },
+    { 0x0000a3d4, 0x20202020 },
+    { 0x0000a3dc, 0x1ce739ce },
+    { 0x0000a3e0, 0x000001ce },
+    { 0x0000a3e4, 0x00000000 },
+    { 0x0000a3e8, 0x18c43433 },
+    { 0x0000a3ec, 0x00f38081 },
+    { 0x00007800, 0x00040000 },
+    { 0x00007804, 0xdb005012 },
+    { 0x00007808, 0x04924914 },
+    { 0x0000780c, 0x21084210 },
+    { 0x00007810, 0x6d801300 },
+    { 0x00007814, 0x0019beff },
+    { 0x00007818, 0x07e40000 },
+    { 0x0000781c, 0x00492000 },
+    { 0x00007820, 0x92492480 },
+    { 0x00007824, 0x00040000 },
+    { 0x00007828, 0xdb005012 },
+    { 0x0000782c, 0x04924914 },
+    { 0x00007830, 0x21084210 },
+    { 0x00007834, 0x6d801300 },
+    { 0x00007838, 0x0019beff },
+    { 0x0000783c, 0x07e40000 },
+    { 0x00007840, 0x00492000 },
+    { 0x00007844, 0x92492480 },
+    { 0x00007848, 0x00120000 },
+    { 0x00007850, 0x54214514 },
+    { 0x00007858, 0x92592692 },
+    { 0x00007860, 0x52802000 },
+    { 0x00007864, 0x0a8e370e },
+    { 0x00007868, 0xc0102850 },
+    { 0x0000786c, 0x812d4000 },
+    { 0x00007874, 0x001b6db0 },
+    { 0x00007878, 0x00376b63 },
+    { 0x0000787c, 0x06db6db6 },
+    { 0x00007880, 0x006d8000 },
+    { 0x00007884, 0xffeffffe },
+    { 0x00007888, 0xffeffffe },
+    { 0x00007890, 0x00060aeb },
+    { 0x00007894, 0x5a108000 },
+    { 0x00007898, 0x2a850160 },
+};
+
+
+
+
+static const u32 ar9280Modes_9280_2[][6] = {
+    { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 },
+    { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 },
+    { 0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180 },
+    { 0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008 },
+    { 0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0 },
+    { 0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b, 0x0988004f },
+    { 0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880 },
+    { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
+    { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
+    { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
+    { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
+    { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 },
+    { 0x00009840, 0x206a012e, 0x206a012e, 0x206a022e, 0x206a022e, 0x206a022e },
+    { 0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0, 0x037216a0 },
+    { 0x00009848, 0x00001066, 0x00001066, 0x00001063, 0x00001063, 0x00001063 },
+    { 0x0000a848, 0x00001066, 0x00001066, 0x00001063, 0x00001063, 0x00001063 },
+    { 0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2 },
+    { 0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec88d2e, 0x7ec88d2e, 0x7ec88d2e },
+    { 0x0000985c, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e },
+    { 0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20, 0x00048d18 },
+    { 0x0000c864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
+    { 0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0 },
+    { 0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881 },
+    { 0x00009914, 0x000007d0, 0x000007d0, 0x00000898, 0x00000898, 0x000007d0 },
+    { 0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016 },
+    { 0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d },
+    { 0x00009944, 0xdfbc1010, 0xdfbc1010, 0xdfbc1010, 0xdfbc1010, 0xdfbc1010 },
+    { 0x00009960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 },
+    { 0x0000a960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 },
+    { 0x00009964, 0x00000210, 0x00000210, 0x00000210, 0x00000210, 0x00000210 },
+    { 0x0000c9b8, 0x0000000f, 0x0000000f, 0x0000001c, 0x0000001c, 0x0000001c },
+    { 0x0000c9bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00, 0x00000c00 },
+    { 0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4 },
+    { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 },
+    { 0x000099c8, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329, 0x60f65329 },
+    { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 },
+    { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 },
+    { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290, 0x00000290 },
+    { 0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300, 0x00000300 },
+    { 0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304, 0x00000304 },
+    { 0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308, 0x00000308 },
+    { 0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c, 0x0000030c },
+    { 0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000, 0x00008000 },
+    { 0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004, 0x00008004 },
+    { 0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008, 0x00008008 },
+    { 0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c, 0x0000800c },
+    { 0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080, 0x00008080 },
+    { 0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084, 0x00008084 },
+    { 0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088, 0x00008088 },
+    { 0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c, 0x0000808c },
+    { 0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100, 0x00008100 },
+    { 0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104, 0x00008104 },
+    { 0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108, 0x00008108 },
+    { 0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c, 0x0000810c },
+    { 0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110, 0x00008110 },
+    { 0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114, 0x00008114 },
+    { 0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180, 0x00008180 },
+    { 0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184, 0x00008184 },
+    { 0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188, 0x00008188 },
+    { 0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c, 0x0000818c },
+    { 0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190, 0x00008190 },
+    { 0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194, 0x00008194 },
+    { 0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0, 0x000081a0 },
+    { 0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c, 0x0000820c },
+    { 0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8, 0x000081a8 },
+    { 0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284, 0x00008284 },
+    { 0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288, 0x00008288 },
+    { 0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224, 0x00008224 },
+    { 0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290, 0x00008290 },
+    { 0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300, 0x00008300 },
+    { 0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304, 0x00008304 },
+    { 0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308, 0x00008308 },
+    { 0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c, 0x0000830c },
+    { 0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380, 0x00008380 },
+    { 0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384, 0x00008384 },
+    { 0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700, 0x00008700 },
+    { 0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704, 0x00008704 },
+    { 0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708, 0x00008708 },
+    { 0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c, 0x0000870c },
+    { 0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780, 0x00008780 },
+    { 0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784, 0x00008784 },
+    { 0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00, 0x00008b00 },
+    { 0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04, 0x00008b04 },
+    { 0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08, 0x00008b08 },
+    { 0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c, 0x00008b0c },
+    { 0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80, 0x00008b80 },
+    { 0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84, 0x00008b84 },
+    { 0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88, 0x00008b88 },
+    { 0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c, 0x00008b8c },
+    { 0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90, 0x00008b90 },
+    { 0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80, 0x00008f80 },
+    { 0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84, 0x00008f84 },
+    { 0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88, 0x00008f88 },
+    { 0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c, 0x00008f8c },
+    { 0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90, 0x00008f90 },
+    { 0x00009ae8, 0x0000b780, 0x0000b780, 0x0000930c, 0x0000930c, 0x0000930c },
+    { 0x00009aec, 0x0000b784, 0x0000b784, 0x00009310, 0x00009310, 0x00009310 },
+    { 0x00009af0, 0x0000b788, 0x0000b788, 0x00009384, 0x00009384, 0x00009384 },
+    { 0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009388, 0x00009388, 0x00009388 },
+    { 0x00009af8, 0x0000b790, 0x0000b790, 0x00009324, 0x00009324, 0x00009324 },
+    { 0x00009afc, 0x0000b794, 0x0000b794, 0x00009704, 0x00009704, 0x00009704 },
+    { 0x00009b00, 0x0000b798, 0x0000b798, 0x000096a4, 0x000096a4, 0x000096a4 },
+    { 0x00009b04, 0x0000d784, 0x0000d784, 0x000096a8, 0x000096a8, 0x000096a8 },
+    { 0x00009b08, 0x0000d788, 0x0000d788, 0x00009710, 0x00009710, 0x00009710 },
+    { 0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009714, 0x00009714, 0x00009714 },
+    { 0x00009b10, 0x0000d790, 0x0000d790, 0x00009720, 0x00009720, 0x00009720 },
+    { 0x00009b14, 0x0000f780, 0x0000f780, 0x00009724, 0x00009724, 0x00009724 },
+    { 0x00009b18, 0x0000f784, 0x0000f784, 0x00009728, 0x00009728, 0x00009728 },
+    { 0x00009b1c, 0x0000f788, 0x0000f788, 0x0000972c, 0x0000972c, 0x0000972c },
+    { 0x00009b20, 0x0000f78c, 0x0000f78c, 0x000097a0, 0x000097a0, 0x000097a0 },
+    { 0x00009b24, 0x0000f790, 0x0000f790, 0x000097a4, 0x000097a4, 0x000097a4 },
+    { 0x00009b28, 0x0000f794, 0x0000f794, 0x000097a8, 0x000097a8, 0x000097a8 },
+    { 0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x000097b0, 0x000097b0, 0x000097b0 },
+    { 0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x000097b4, 0x000097b4, 0x000097b4 },
+    { 0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x000097b8, 0x000097b8, 0x000097b8 },
+    { 0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x000097a5, 0x000097a5, 0x000097a5 },
+    { 0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x000097a9, 0x000097a9, 0x000097a9 },
+    { 0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x000097ad, 0x000097ad, 0x000097ad },
+    { 0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x000097b1, 0x000097b1, 0x000097b1 },
+    { 0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x000097b5, 0x000097b5, 0x000097b5 },
+    { 0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x000097b9, 0x000097b9, 0x000097b9 },
+    { 0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x000097c5, 0x000097c5, 0x000097c5 },
+    { 0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x000097c9, 0x000097c9, 0x000097c9 },
+    { 0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x000097d1, 0x000097d1, 0x000097d1 },
+    { 0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x000097d5, 0x000097d5, 0x000097d5 },
+    { 0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x000097d9, 0x000097d9, 0x000097d9 },
+    { 0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x000097c6, 0x000097c6, 0x000097c6 },
+    { 0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x000097ca, 0x000097ca, 0x000097ca },
+    { 0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x000097ce, 0x000097ce, 0x000097ce },
+    { 0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x000097d2, 0x000097d2, 0x000097d2 },
+    { 0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x000097d6, 0x000097d6, 0x000097d6 },
+    { 0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x000097c3, 0x000097c3, 0x000097c3 },
+    { 0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x000097c7, 0x000097c7, 0x000097c7 },
+    { 0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x000097cb, 0x000097cb, 0x000097cb },
+    { 0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x000097cf, 0x000097cf, 0x000097cf },
+    { 0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x000097d7, 0x000097d7, 0x000097d7 },
+    { 0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009b98, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009b9c, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009ba0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009ba4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009ba8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bac, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bb0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bb4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bb8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bbc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bc0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bc4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bc8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bcc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bd0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bd4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bd8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bdc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009be0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009be4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009be8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bec, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bf0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bf4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bf8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x00009bfc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db },
+    { 0x0000a204, 0x00000444, 0x00000444, 0x00000444, 0x00000444, 0x00000444 },
+    { 0x0000a208, 0x803e4788, 0x803e4788, 0x803e4788, 0x803e4788, 0x803e4788 },
+    { 0x0000a20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019, 0x0001f019 },
+    { 0x0000b20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019, 0x0001f019 },
+    { 0x0000a21c, 0x1463800a, 0x1463800a, 0x1463800a, 0x1463800a, 0x1463800a },
+    { 0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000 },
+    { 0x0000a250, 0x001ff000, 0x001ff000, 0x001da000, 0x001da000, 0x001da000 },
+    { 0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652 },
+    { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002, 0x00003002 },
+    { 0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009, 0x00008009 },
+    { 0x0000a30c, 0x0000a006, 0x0000a006, 0x0000b00b, 0x0000b00b, 0x0000b00b },
+    { 0x0000a310, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012 },
+    { 0x0000a314, 0x00011014, 0x00011014, 0x00012048, 0x00012048, 0x00012048 },
+    { 0x0000a318, 0x0001504a, 0x0001504a, 0x0001604a, 0x0001604a, 0x0001604a },
+    { 0x0000a31c, 0x0001904c, 0x0001904c, 0x0001a211, 0x0001a211, 0x0001a211 },
+    { 0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213, 0x0001e213 },
+    { 0x0000a324, 0x00020092, 0x00020092, 0x0002121b, 0x0002121b, 0x0002121b },
+    { 0x0000a328, 0x0002410a, 0x0002410a, 0x00024412, 0x00024412, 0x00024412 },
+    { 0x0000a32c, 0x0002710c, 0x0002710c, 0x00028414, 0x00028414, 0x00028414 },
+    { 0x0000a330, 0x0002b18b, 0x0002b18b, 0x0002b44a, 0x0002b44a, 0x0002b44a },
+    { 0x0000a334, 0x0002e1cc, 0x0002e1cc, 0x00030649, 0x00030649, 0x00030649 },
+    { 0x0000a338, 0x000321ec, 0x000321ec, 0x0003364b, 0x0003364b, 0x0003364b },
+    { 0x0000a33c, 0x000321ec, 0x000321ec, 0x00038a49, 0x00038a49, 0x00038a49 },
+    { 0x0000a340, 0x000321ec, 0x000321ec, 0x0003be48, 0x0003be48, 0x0003be48 },
+    { 0x0000a344, 0x000321ec, 0x000321ec, 0x0003ee4a, 0x0003ee4a, 0x0003ee4a },
+    { 0x0000a348, 0x000321ec, 0x000321ec, 0x00042e88, 0x00042e88, 0x00042e88 },
+    { 0x0000a34c, 0x000321ec, 0x000321ec, 0x00046e8a, 0x00046e8a, 0x00046e8a },
+    { 0x0000a350, 0x000321ec, 0x000321ec, 0x00049ec9, 0x00049ec9, 0x00049ec9 },
+    { 0x0000a354, 0x000321ec, 0x000321ec, 0x0004bf42, 0x0004bf42, 0x0004bf42 },
+    { 0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e },
+    { 0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+    { 0x00007894, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000 },
+};
+
+static const u32 ar9280Common_9280_2[][2] = {
+    { 0x0000000c, 0x00000000 },
+    { 0x00000030, 0x00020015 },
+    { 0x00000034, 0x00000005 },
+    { 0x00000040, 0x00000000 },
+    { 0x00000044, 0x00000008 },
+    { 0x00000048, 0x00000008 },
+    { 0x0000004c, 0x00000010 },
+    { 0x00000050, 0x00000000 },
+    { 0x00000054, 0x0000001f },
+    { 0x00000800, 0x00000000 },
+    { 0x00000804, 0x00000000 },
+    { 0x00000808, 0x00000000 },
+    { 0x0000080c, 0x00000000 },
+    { 0x00000810, 0x00000000 },
+    { 0x00000814, 0x00000000 },
+    { 0x00000818, 0x00000000 },
+    { 0x0000081c, 0x00000000 },
+    { 0x00000820, 0x00000000 },
+    { 0x00000824, 0x00000000 },
+    { 0x00001040, 0x002ffc0f },
+    { 0x00001044, 0x002ffc0f },
+    { 0x00001048, 0x002ffc0f },
+    { 0x0000104c, 0x002ffc0f },
+    { 0x00001050, 0x002ffc0f },
+    { 0x00001054, 0x002ffc0f },
+    { 0x00001058, 0x002ffc0f },
+    { 0x0000105c, 0x002ffc0f },
+    { 0x00001060, 0x002ffc0f },
+    { 0x00001064, 0x002ffc0f },
+    { 0x00001230, 0x00000000 },
+    { 0x00001270, 0x00000000 },
+    { 0x00001038, 0x00000000 },
+    { 0x00001078, 0x00000000 },
+    { 0x000010b8, 0x00000000 },
+    { 0x000010f8, 0x00000000 },
+    { 0x00001138, 0x00000000 },
+    { 0x00001178, 0x00000000 },
+    { 0x000011b8, 0x00000000 },
+    { 0x000011f8, 0x00000000 },
+    { 0x00001238, 0x00000000 },
+    { 0x00001278, 0x00000000 },
+    { 0x000012b8, 0x00000000 },
+    { 0x000012f8, 0x00000000 },
+    { 0x00001338, 0x00000000 },
+    { 0x00001378, 0x00000000 },
+    { 0x000013b8, 0x00000000 },
+    { 0x000013f8, 0x00000000 },
+    { 0x00001438, 0x00000000 },
+    { 0x00001478, 0x00000000 },
+    { 0x000014b8, 0x00000000 },
+    { 0x000014f8, 0x00000000 },
+    { 0x00001538, 0x00000000 },
+    { 0x00001578, 0x00000000 },
+    { 0x000015b8, 0x00000000 },
+    { 0x000015f8, 0x00000000 },
+    { 0x00001638, 0x00000000 },
+    { 0x00001678, 0x00000000 },
+    { 0x000016b8, 0x00000000 },
+    { 0x000016f8, 0x00000000 },
+    { 0x00001738, 0x00000000 },
+    { 0x00001778, 0x00000000 },
+    { 0x000017b8, 0x00000000 },
+    { 0x000017f8, 0x00000000 },
+    { 0x0000103c, 0x00000000 },
+    { 0x0000107c, 0x00000000 },
+    { 0x000010bc, 0x00000000 },
+    { 0x000010fc, 0x00000000 },
+    { 0x0000113c, 0x00000000 },
+    { 0x0000117c, 0x00000000 },
+    { 0x000011bc, 0x00000000 },
+    { 0x000011fc, 0x00000000 },
+    { 0x0000123c, 0x00000000 },
+    { 0x0000127c, 0x00000000 },
+    { 0x000012bc, 0x00000000 },
+    { 0x000012fc, 0x00000000 },
+    { 0x0000133c, 0x00000000 },
+    { 0x0000137c, 0x00000000 },
+    { 0x000013bc, 0x00000000 },
+    { 0x000013fc, 0x00000000 },
+    { 0x0000143c, 0x00000000 },
+    { 0x0000147c, 0x00000000 },
+    { 0x00004030, 0x00000002 },
+    { 0x0000403c, 0x00000002 },
+    { 0x00004024, 0x0000001f },
+    { 0x00004060, 0x00000000 },
+    { 0x00004064, 0x00000000 },
+    { 0x00007010, 0x00000033 },
+    { 0x00007034, 0x00000002 },
+    { 0x00007038, 0x000004c2 },
+    { 0x00008004, 0x00000000 },
+    { 0x00008008, 0x00000000 },
+    { 0x0000800c, 0x00000000 },
+    { 0x00008018, 0x00000700 },
+    { 0x00008020, 0x00000000 },
+    { 0x00008038, 0x00000000 },
+    { 0x0000803c, 0x00000000 },
+    { 0x00008048, 0x40000000 },
+    { 0x00008054, 0x00000000 },
+    { 0x00008058, 0x00000000 },
+    { 0x0000805c, 0x000fc78f },
+    { 0x00008060, 0x0000000f },
+    { 0x00008064, 0x00000000 },
+    { 0x00008070, 0x00000000 },
+    { 0x000080c0, 0x2a80001a },
+    { 0x000080c4, 0x05dc01e0 },
+    { 0x000080c8, 0x1f402710 },
+    { 0x000080cc, 0x01f40000 },
+    { 0x000080d0, 0x00001e00 },
+    { 0x000080d4, 0x00000000 },
+    { 0x000080d8, 0x00400000 },
+    { 0x000080e0, 0xffffffff },
+    { 0x000080e4, 0x0000ffff },
+    { 0x000080e8, 0x003f3f3f },
+    { 0x000080ec, 0x00000000 },
+    { 0x000080f0, 0x00000000 },
+    { 0x000080f4, 0x00000000 },
+    { 0x000080f8, 0x00000000 },
+    { 0x000080fc, 0x00020000 },
+    { 0x00008100, 0x00020000 },
+    { 0x00008104, 0x00000001 },
+    { 0x00008108, 0x00000052 },
+    { 0x0000810c, 0x00000000 },
+    { 0x00008110, 0x00000168 },
+    { 0x00008118, 0x000100aa },
+    { 0x0000811c, 0x00003210 },
+    { 0x00008120, 0x08f04800 },
+    { 0x00008124, 0x00000000 },
+    { 0x00008128, 0x00000000 },
+    { 0x0000812c, 0x00000000 },
+    { 0x00008130, 0x00000000 },
+    { 0x00008134, 0x00000000 },
+    { 0x00008138, 0x00000000 },
+    { 0x0000813c, 0x00000000 },
+    { 0x00008144, 0x00000000 },
+    { 0x00008168, 0x00000000 },
+    { 0x0000816c, 0x00000000 },
+    { 0x00008170, 0x32143320 },
+    { 0x00008174, 0xfaa4fa50 },
+    { 0x00008178, 0x00000100 },
+    { 0x0000817c, 0x00000000 },
+    { 0x000081c0, 0x00000000 },
+    { 0x000081d0, 0x00003210 },
+    { 0x000081ec, 0x00000000 },
+    { 0x000081f0, 0x00000000 },
+    { 0x000081f4, 0x00000000 },
+    { 0x000081f8, 0x00000000 },
+    { 0x000081fc, 0x00000000 },
+    { 0x00008200, 0x00000000 },
+    { 0x00008204, 0x00000000 },
+    { 0x00008208, 0x00000000 },
+    { 0x0000820c, 0x00000000 },
+    { 0x00008210, 0x00000000 },
+    { 0x00008214, 0x00000000 },
+    { 0x00008218, 0x00000000 },
+    { 0x0000821c, 0x00000000 },
+    { 0x00008220, 0x00000000 },
+    { 0x00008224, 0x00000000 },
+    { 0x00008228, 0x00000000 },
+    { 0x0000822c, 0x00000000 },
+    { 0x00008230, 0x00000000 },
+    { 0x00008234, 0x00000000 },
+    { 0x00008238, 0x00000000 },
+    { 0x0000823c, 0x00000000 },
+    { 0x00008240, 0x00100000 },
+    { 0x00008244, 0x0010f400 },
+    { 0x00008248, 0x00000100 },
+    { 0x0000824c, 0x0001e800 },
+    { 0x00008250, 0x00000000 },
+    { 0x00008254, 0x00000000 },
+    { 0x00008258, 0x00000000 },
+    { 0x0000825c, 0x400000ff },
+    { 0x00008260, 0x00080922 },
+    { 0x00008270, 0x00000000 },
+    { 0x00008274, 0x40000000 },
+    { 0x00008278, 0x003e4180 },
+    { 0x0000827c, 0x00000000 },
+    { 0x00008284, 0x0000002c },
+    { 0x00008288, 0x0000002c },
+    { 0x0000828c, 0x00000000 },
+    { 0x00008294, 0x00000000 },
+    { 0x00008298, 0x00000000 },
+    { 0x0000829c, 0x00000000 },
+    { 0x00008300, 0x00000040 },
+    { 0x00008314, 0x00000000 },
+    { 0x00008328, 0x00000000 },
+    { 0x0000832c, 0x00000007 },
+    { 0x00008330, 0x00000302 },
+    { 0x00008334, 0x00000e00 },
+    { 0x00008338, 0x00000000 },
+    { 0x0000833c, 0x00000000 },
+    { 0x00008340, 0x000107ff },
+    { 0x00008344, 0x00581043 },
+    { 0x00009808, 0x00000000 },
+    { 0x0000980c, 0xafa68e30 },
+    { 0x00009810, 0xfd14e000 },
+    { 0x00009814, 0x9c0a9f6b },
+    { 0x0000981c, 0x00000000 },
+    { 0x0000982c, 0x0000a000 },
+    { 0x00009830, 0x00000000 },
+    { 0x0000983c, 0x00200400 },
+    { 0x0000984c, 0x0040233c },
+    { 0x0000a84c, 0x0040233c },
+    { 0x00009854, 0x00000044 },
+    { 0x00009900, 0x00000000 },
+    { 0x00009904, 0x00000000 },
+    { 0x00009908, 0x00000000 },
+    { 0x0000990c, 0x00000000 },
+    { 0x00009910, 0x01002310 },
+    { 0x0000991c, 0x10000fff },
+    { 0x00009920, 0x04900000 },
+    { 0x0000a920, 0x04900000 },
+    { 0x00009928, 0x00000001 },
+    { 0x0000992c, 0x00000004 },
+    { 0x00009934, 0x1e1f2022 },
+    { 0x00009938, 0x0a0b0c0d },
+    { 0x0000993c, 0x00000000 },
+    { 0x00009948, 0x9280c00a },
+    { 0x0000994c, 0x00020028 },
+    { 0x00009954, 0x5f3ca3de },
+    { 0x00009958, 0x2108ecff },
+    { 0x00009940, 0x14750604 },
+    { 0x0000c95c, 0x004b6a8e },
+    { 0x0000c968, 0x000003ce },
+    { 0x00009970, 0x190fb515 },
+    { 0x00009974, 0x00000000 },
+    { 0x00009978, 0x00000001 },
+    { 0x0000997c, 0x00000000 },
+    { 0x00009980, 0x00000000 },
+    { 0x00009984, 0x00000000 },
+    { 0x00009988, 0x00000000 },
+    { 0x0000998c, 0x00000000 },
+    { 0x00009990, 0x00000000 },
+    { 0x00009994, 0x00000000 },
+    { 0x00009998, 0x00000000 },
+    { 0x0000999c, 0x00000000 },
+    { 0x000099a0, 0x00000000 },
+    { 0x000099a4, 0x00000001 },
+    { 0x000099a8, 0x201fff00 },
+    { 0x000099ac, 0x006f0000 },
+    { 0x000099b0, 0x03051000 },
+    { 0x000099b4, 0x00000820 },
+    { 0x000099dc, 0x00000000 },
+    { 0x000099e0, 0x00000000 },
+    { 0x000099e4, 0xaaaaaaaa },
+    { 0x000099e8, 0x3c466478 },
+    { 0x000099ec, 0x0cc80caa },
+    { 0x000099f0, 0x00000000 },
+    { 0x000099fc, 0x00001042 },
+    { 0x0000a210, 0x4080a333 },
+    { 0x0000a214, 0x40206c10 },
+    { 0x0000a218, 0x009c4060 },
+    { 0x0000a220, 0x01834061 },
+    { 0x0000a224, 0x00000400 },
+    { 0x0000a228, 0x000003b5 },
+    { 0x0000a22c, 0x233f71c0 },
+    { 0x0000a234, 0x20202020 },
+    { 0x0000a238, 0x20202020 },
+    { 0x0000a23c, 0x13c88000 },
+    { 0x0000a240, 0x38490a20 },
+    { 0x0000a244, 0x00007bb6 },
+    { 0x0000a248, 0x0fff3ffc },
+    { 0x0000a24c, 0x00000000 },
+    { 0x0000a254, 0x00000000 },
+    { 0x0000a258, 0x0cdbd380 },
+    { 0x0000a25c, 0x0f0f0f01 },
+    { 0x0000a260, 0xdfa91f01 },
+    { 0x0000a268, 0x00000000 },
+    { 0x0000a26c, 0x0ebae9c6 },
+    { 0x0000b26c, 0x0ebae9c6 },
+    { 0x0000d270, 0x00820820 },
+    { 0x0000a278, 0x1ce739ce },
+    { 0x0000a27c, 0x050701ce },
+    { 0x0000d35c, 0x07ffffef },
+    { 0x0000d360, 0x0fffffe7 },
+    { 0x0000d364, 0x17ffffe5 },
+    { 0x0000d368, 0x1fffffe4 },
+    { 0x0000d36c, 0x37ffffe3 },
+    { 0x0000d370, 0x3fffffe3 },
+    { 0x0000d374, 0x57ffffe3 },
+    { 0x0000d378, 0x5fffffe2 },
+    { 0x0000d37c, 0x7fffffe2 },
+    { 0x0000d380, 0x7f3c7bba },
+    { 0x0000d384, 0xf3307ff0 },
+    { 0x0000a388, 0x0c000000 },
+    { 0x0000a38c, 0x20202020 },
+    { 0x0000a390, 0x20202020 },
+    { 0x0000a394, 0x1ce739ce },
+    { 0x0000a398, 0x000001ce },
+    { 0x0000a39c, 0x00000001 },
+    { 0x0000a3a0, 0x00000000 },
+    { 0x0000a3a4, 0x00000000 },
+    { 0x0000a3a8, 0x00000000 },
+    { 0x0000a3ac, 0x00000000 },
+    { 0x0000a3b0, 0x00000000 },
+    { 0x0000a3b4, 0x00000000 },
+    { 0x0000a3b8, 0x00000000 },
+    { 0x0000a3bc, 0x00000000 },
+    { 0x0000a3c0, 0x00000000 },
+    { 0x0000a3c4, 0x00000000 },
+    { 0x0000a3c8, 0x00000246 },
+    { 0x0000a3cc, 0x20202020 },
+    { 0x0000a3d0, 0x20202020 },
+    { 0x0000a3d4, 0x20202020 },
+    { 0x0000a3dc, 0x1ce739ce },
+    { 0x0000a3e0, 0x000001ce },
+    { 0x0000a3e4, 0x00000000 },
+    { 0x0000a3e8, 0x18c43433 },
+    { 0x0000a3ec, 0x00f70081 },
+    { 0x00007800, 0x00040000 },
+    { 0x00007804, 0xdb005012 },
+    { 0x00007808, 0x04924914 },
+    { 0x0000780c, 0x21084210 },
+    { 0x00007810, 0x6d801300 },
+    { 0x00007814, 0x0019beff },
+    { 0x00007818, 0x07e41000 },
+    { 0x0000781c, 0x00392000 },
+    { 0x00007820, 0x92592480 },
+    { 0x00007824, 0x00040000 },
+    { 0x00007828, 0xdb005012 },
+    { 0x0000782c, 0x04924914 },
+    { 0x00007830, 0x21084210 },
+    { 0x00007834, 0x6d801300 },
+    { 0x00007838, 0x0019beff },
+    { 0x0000783c, 0x07e40000 },
+    { 0x00007840, 0x00392000 },
+    { 0x00007844, 0x92592480 },
+    { 0x00007848, 0x00100000 },
+    { 0x0000784c, 0x773f0567 },
+    { 0x00007850, 0x54214514 },
+    { 0x00007854, 0x12035828 },
+    { 0x00007858, 0x9259269a },
+    { 0x00007860, 0x52802000 },
+    { 0x00007864, 0x0a8e370e },
+    { 0x00007868, 0xc0102850 },
+    { 0x0000786c, 0x812d4000 },
+    { 0x00007870, 0x807ec400 },
+    { 0x00007874, 0x001b6db0 },
+    { 0x00007878, 0x00376b63 },
+    { 0x0000787c, 0x06db6db6 },
+    { 0x00007880, 0x006d8000 },
+    { 0x00007884, 0xffeffffe },
+    { 0x00007888, 0xffeffffe },
+    { 0x0000788c, 0x00010000 },
+    { 0x00007890, 0x02060aeb },
+    { 0x00007898, 0x2a850160 },
+};
+
+static const u32 ar9280Modes_fast_clock_9280_2[][3] = {
+    { 0x00001030, 0x00000268, 0x000004d0 },
+    { 0x00001070, 0x0000018c, 0x00000318 },
+    { 0x000010b0, 0x00000fd0, 0x00001fa0 },
+    { 0x00008014, 0x044c044c, 0x08980898 },
+    { 0x0000801c, 0x148ec02b, 0x148ec057 },
+    { 0x00008318, 0x000044c0, 0x00008980 },
+    { 0x00009820, 0x02020200, 0x02020200 },
+    { 0x00009824, 0x00000f0f, 0x00000f0f },
+    { 0x00009828, 0x0b020001, 0x0b020001 },
+    { 0x00009834, 0x00000f0f, 0x00000f0f },
+    { 0x00009844, 0x03721821, 0x03721821 },
+    { 0x00009914, 0x00000898, 0x00000898 },
+    { 0x00009918, 0x0000000b, 0x00000016 },
+    { 0x00009944, 0xdfbc1210, 0xdfbc1210 },
+};
+
+
+
+static const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = {
+    {0x00004040,  0x9248fd00 },
+    {0x00004040,  0x24924924 },
+    {0x00004040,  0xa8000019 },
+    {0x00004040,  0x13160820 },
+    {0x00004040,  0xe5980560 },
+    {0x00004040,  0x401dcffc },
+    {0x00004040,  0x1aaabe40 },
+    {0x00004040,  0xbe105554 },
+    {0x00004040,  0x00043007 },
+    {0x00004044,  0x00000000 },
+};
+
+
+
+static const u32 ar9280PciePhy_clkreq_always_on_L1_9280[][2] = {
+    {0x00004040,  0x9248fd00 },
+    {0x00004040,  0x24924924 },
+    {0x00004040,  0xa8000019 },
+    {0x00004040,  0x13160820 },
+    {0x00004040,  0xe5980560 },
+    {0x00004040,  0x401dcffd },
+    {0x00004040,  0x1aaabe40 },
+    {0x00004040,  0xbe105554 },
+    {0x00004040,  0x00043007 },
+    {0x00004044,  0x00000000 },
+};
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c
new file mode 100644
index 000000000000..2888778040e4
--- /dev/null
+++ b/drivers/net/wireless/ath9k/main.c
@@ -0,0 +1,1470 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/* mac80211 and PCI callbacks */
+
+#include <linux/nl80211.h>
+#include "core.h"
+
+#define ATH_PCI_VERSION "0.1"
+
+#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR       13
+#define IEEE80211_ACTION_CAT_HT                 7
+#define IEEE80211_ACTION_HT_TXCHWIDTH           0
+
+static char *dev_info = "ath9k";
+
+MODULE_AUTHOR("Atheros Communications");
+MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
+MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
+MODULE_LICENSE("Dual BSD/GPL");
+
+static struct pci_device_id ath_pci_id_table[] __devinitdata = {
+        { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI   */
+        { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
+        { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI   */
+        { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI   */
+        { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
+        { 0 }
+};
+
+static int ath_get_channel(struct ath_softc *sc,
+                           struct ieee80211_channel *chan)
+{
+        int i;
+
+        for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
+                if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
+                        return i;
+        }
+
+        return -1;
+}
+
+static u32 ath_get_extchanmode(struct ath_softc *sc,
+                                     struct ieee80211_channel *chan)
+{
+        u32 chanmode = 0;
+        u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
+        enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
+
+        switch (chan->band) {
+        case IEEE80211_BAND_2GHZ:
+                if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
+                    (tx_chan_width == ATH9K_HT_MACMODE_20))
+                        chanmode = CHANNEL_G_HT20;
+                if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
+                    (tx_chan_width == ATH9K_HT_MACMODE_2040))
+                        chanmode = CHANNEL_G_HT40PLUS;
+                if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
+                    (tx_chan_width == ATH9K_HT_MACMODE_2040))
+                        chanmode = CHANNEL_G_HT40MINUS;
+                break;
+        case IEEE80211_BAND_5GHZ:
+                if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
+                    (tx_chan_width == ATH9K_HT_MACMODE_20))
+                        chanmode = CHANNEL_A_HT20;
+                if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
+                    (tx_chan_width == ATH9K_HT_MACMODE_2040))
+                        chanmode = CHANNEL_A_HT40PLUS;
+                if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
+                    (tx_chan_width == ATH9K_HT_MACMODE_2040))
+                        chanmode = CHANNEL_A_HT40MINUS;
+                break;
+        default:
+                break;
+        }
+
+        return chanmode;
+}
+
+
+static int ath_setkey_tkip(struct ath_softc *sc,
+                           struct ieee80211_key_conf *key,
+                           struct ath9k_keyval *hk,
+                           const u8 *addr)
+{
+        u8 *key_rxmic = NULL;
+        u8 *key_txmic = NULL;
+
+        key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
+        key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
+
+        if (addr == NULL) {
+                /* Group key installation */
+                memcpy(hk->kv_mic,  key_rxmic, sizeof(hk->kv_mic));
+                return ath_keyset(sc, key->keyidx, hk, addr);
+        }
+        if (!sc->sc_splitmic) {
+                /*
+                 * data key goes at first index,
+                 * the hal handles the MIC keys at index+64.
+                 */
+                memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
+                memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
+                return ath_keyset(sc, key->keyidx, hk, addr);
+        }
+        /*
+         * TX key goes at first index, RX key at +32.
+         * The hal handles the MIC keys at index+64.
+         */
+        memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
+        if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
+                /* Txmic entry failed. No need to proceed further */
+                DPRINTF(sc, ATH_DBG_KEYCACHE,
+                        "%s Setting TX MIC Key Failed\n", __func__);
+                return 0;
+        }
+
+        memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
+        /* XXX delete tx key on failure? */
+        return ath_keyset(sc, key->keyidx+32, hk, addr);
+}
+
+static int ath_key_config(struct ath_softc *sc,
+                          const u8 *addr,
+                          struct ieee80211_key_conf *key)
+{
+        struct ieee80211_vif *vif;
+        struct ath9k_keyval hk;
+        const u8 *mac = NULL;
+        int ret = 0;
+        enum ieee80211_if_types opmode;
+
+        memset(&hk, 0, sizeof(hk));
+
+        switch (key->alg) {
+        case ALG_WEP:
+                hk.kv_type = ATH9K_CIPHER_WEP;
+                break;
+        case ALG_TKIP:
+                hk.kv_type = ATH9K_CIPHER_TKIP;
+                break;
+        case ALG_CCMP:
+                hk.kv_type = ATH9K_CIPHER_AES_CCM;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        hk.kv_len  = key->keylen;
+        memcpy(hk.kv_val, key->key, key->keylen);
+
+        if (!sc->sc_vaps[0])
+                return -EIO;
+
+        vif = sc->sc_vaps[0]->av_if_data;
+        opmode = vif->type;
+
+        /*
+         *  Strategy:
+         *   For _M_STA mc tx, we will not setup a key at all since we never
+         *   tx mc.
+         *   _M_STA mc rx, we will use the keyID.
+         *   for _M_IBSS mc tx, we will use the keyID, and no macaddr.
+         *   for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
+         *   peer node. BUT we will plumb a cleartext key so that we can do
+         *   perSta default key table lookup in software.
+         */
+        if (is_broadcast_ether_addr(addr)) {
+                switch (opmode) {
+                case IEEE80211_IF_TYPE_STA:
+                        /* default key:  could be group WPA key
+                         * or could be static WEP key */
+                        mac = NULL;
+                        break;
+                case IEEE80211_IF_TYPE_IBSS:
+                        break;
+                case IEEE80211_IF_TYPE_AP:
+                        break;
+                default:
+                        ASSERT(0);
+                        break;
+                }
+        } else {
+                mac = addr;
+        }
+
+        if (key->alg == ALG_TKIP)
+                ret = ath_setkey_tkip(sc, key, &hk, mac);
+        else
+                ret = ath_keyset(sc, key->keyidx, &hk, mac);
+
+        if (!ret)
+                return -EIO;
+
+        sc->sc_keytype = hk.kv_type;
+        return 0;
+}
+
+static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
+{
+#define ATH_MAX_NUM_KEYS 4
+        int freeslot;
+
+        freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
+        ath_key_reset(sc, key->keyidx, freeslot);
+#undef ATH_MAX_NUM_KEYS
+}
+
+static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
+{
+/* Until mac80211 includes these fields */
+
+#define IEEE80211_HT_CAP_DSSSCCK40 0x1000
+#define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3   /* 2 ^ 16 */
+#define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6      /* 8 usec */
+
+        ht_info->ht_supported = 1;
+        ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
+                        |(u16)IEEE80211_HT_CAP_MIMO_PS
+                        |(u16)IEEE80211_HT_CAP_SGI_40
+                        |(u16)IEEE80211_HT_CAP_DSSSCCK40;
+
+        ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
+        ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
+        /* setup supported mcs set */
+        memset(ht_info->supp_mcs_set, 0, 16);
+        ht_info->supp_mcs_set[0] = 0xff;
+        ht_info->supp_mcs_set[1] = 0xff;
+        ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
+}
+
+static int ath_rate2idx(struct ath_softc *sc, int rate)
+{
+        int i = 0, cur_band, n_rates;
+        struct ieee80211_hw *hw = sc->hw;
+
+        cur_band = hw->conf.channel->band;
+        n_rates = sc->sbands[cur_band].n_bitrates;
+
+        for (i = 0; i < n_rates; i++) {
+                if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
+                        break;
+        }
+
+        /*
+         * NB:mac80211 validates rx rate index against the supported legacy rate
+         * index only (should be done against ht rates also), return the highest
+         * legacy rate index for rx rate which does not match any one of the
+         * supported basic and extended rates to make mac80211 happy.
+         * The following hack will be cleaned up once the issue with
+         * the rx rate index validation in mac80211 is fixed.
+         */
+        if (i == n_rates)
+                return n_rates - 1;
+        return i;
+}
+
+static void ath9k_rx_prepare(struct ath_softc *sc,
+                             struct sk_buff *skb,
+                             struct ath_recv_status *status,
+                             struct ieee80211_rx_status *rx_status)
+{
+        struct ieee80211_hw *hw = sc->hw;
+        struct ieee80211_channel *curchan = hw->conf.channel;
+
+        memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
+
+        rx_status->mactime = status->tsf;
+        rx_status->band = curchan->band;
+        rx_status->freq =  curchan->center_freq;
+        rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
+        rx_status->signal = rx_status->noise + status->rssi;
+        rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
+        rx_status->antenna = status->antenna;
+        rx_status->qual = status->rssi * 100 / 64;
+
+        if (status->flags & ATH_RX_MIC_ERROR)
+                rx_status->flag |= RX_FLAG_MMIC_ERROR;
+        if (status->flags & ATH_RX_FCS_ERROR)
+                rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
+
+        rx_status->flag |= RX_FLAG_TSFT;
+}
+
+static u8 parse_mpdudensity(u8 mpdudensity)
+{
+        /*
+         * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
+         *   0 for no restriction
+         *   1 for 1/4 us
+         *   2 for 1/2 us
+         *   3 for 1 us
+         *   4 for 2 us
+         *   5 for 4 us
+         *   6 for 8 us
+         *   7 for 16 us
+         */
+        switch (mpdudensity) {
+        case 0:
+                return 0;
+        case 1:
+        case 2:
+        case 3:
+                /* Our lower layer calculations limit our precision to
+                   1 microsecond */
+                return 1;
+        case 4:
+                return 2;
+        case 5:
+                return 4;
+        case 6:
+                return 8;
+        case 7:
+                return 16;
+        default:
+                return 0;
+        }
+}
+
+static int ath9k_start(struct ieee80211_hw *hw)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ieee80211_channel *curchan = hw->conf.channel;
+        int error = 0, pos;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
+                "initial channel: %d MHz\n", __func__, curchan->center_freq);
+
+        /* setup initial channel */
+
+        pos = ath_get_channel(sc, curchan);
+        if (pos == -1) {
+                DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
+                return -EINVAL;
+        }
+
+        sc->sc_ah->ah_channels[pos].chanmode =
+                (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
+
+        /* open ath_dev */
+        error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
+        if (error) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: Unable to complete ath_open\n", __func__);
+                return error;
+        }
+
+        ieee80211_wake_queues(hw);
+        return 0;
+}
+
+static int ath9k_tx(struct ieee80211_hw *hw,
+                    struct sk_buff *skb)
+{
+        struct ath_softc *sc = hw->priv;
+        int hdrlen, padsize;
+
+        /* Add the padding after the header if this is not already done */
+        hdrlen = ieee80211_get_hdrlen_from_skb(skb);
+        if (hdrlen & 3) {
+                padsize = hdrlen % 4;
+                if (skb_headroom(skb) < padsize)
+                        return -1;
+                skb_push(skb, padsize);
+                memmove(skb->data, skb->data + padsize, hdrlen);
+        }
+
+        DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
+                __func__,
+                skb);
+
+        if (ath_tx_start(sc, skb) != 0) {
+                DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
+                dev_kfree_skb_any(skb);
+                /* FIXME: Check for proper return value from ATH_DEV */
+                return 0;
+        }
+
+        return 0;
+}
+
+static void ath9k_stop(struct ieee80211_hw *hw)
+{
+        struct ath_softc *sc = hw->priv;
+        int error;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
+
+        error = ath_suspend(sc);
+        if (error)
+                DPRINTF(sc, ATH_DBG_CONFIG,
+                        "%s: Device is no longer present\n", __func__);
+
+        ieee80211_stop_queues(hw);
+}
+
+static int ath9k_add_interface(struct ieee80211_hw *hw,
+                               struct ieee80211_if_init_conf *conf)
+{
+        struct ath_softc *sc = hw->priv;
+        int error, ic_opmode = 0;
+
+        /* Support only vap for now */
+
+        if (sc->sc_nvaps)
+                return -ENOBUFS;
+
+        switch (conf->type) {
+        case IEEE80211_IF_TYPE_STA:
+                ic_opmode = ATH9K_M_STA;
+                break;
+        case IEEE80211_IF_TYPE_IBSS:
+                ic_opmode = ATH9K_M_IBSS;
+                break;
+        default:
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: Only STA and IBSS are supported currently\n",
+                        __func__);
+                return -EOPNOTSUPP;
+        }
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
+                __func__,
+                ic_opmode);
+
+        error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
+        if (error) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: Unable to attach vap, error: %d\n",
+                        __func__, error);
+                return error;
+        }
+
+        return 0;
+}
+
+static void ath9k_remove_interface(struct ieee80211_hw *hw,
+                                   struct ieee80211_if_init_conf *conf)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ath_vap *avp;
+        int error;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
+
+        avp = sc->sc_vaps[0];
+        if (avp == NULL) {
+                DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
+                        __func__);
+                return;
+        }
+
+#ifdef CONFIG_SLOW_ANT_DIV
+        ath_slow_ant_div_stop(&sc->sc_antdiv);
+#endif
+
+        /* Update ratectrl */
+        ath_rate_newstate(sc, avp);
+
+        /* Reclaim beacon resources */
+        if (sc->sc_opmode == ATH9K_M_HOSTAP || sc->sc_opmode == ATH9K_M_IBSS) {
+                ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
+                ath_beacon_return(sc, avp);
+        }
+
+        /* Set interrupt mask */
+        sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
+        ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
+        sc->sc_beacons = 0;
+
+        error = ath_vap_detach(sc, 0);
+        if (error)
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: Unable to detach vap, error: %d\n",
+                        __func__, error);
+}
+
+static int ath9k_config(struct ieee80211_hw *hw,
+                        struct ieee80211_conf *conf)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ieee80211_channel *curchan = hw->conf.channel;
+        int pos;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
+                __func__,
+                curchan->center_freq);
+
+        pos = ath_get_channel(sc, curchan);
+        if (pos == -1) {
+                DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
+                return -EINVAL;
+        }
+
+        sc->sc_ah->ah_channels[pos].chanmode =
+                (curchan->band == IEEE80211_BAND_2GHZ) ?
+                CHANNEL_G : CHANNEL_A;
+
+        if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
+                sc->sc_ah->ah_channels[pos].chanmode =
+                        ath_get_extchanmode(sc, curchan);
+
+        sc->sc_config.txpowlimit = 2 * conf->power_level;
+
+        /* set h/w channel */
+        if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
+                DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
+                        __func__);
+
+        return 0;
+}
+
+static int ath9k_config_interface(struct ieee80211_hw *hw,
+                                  struct ieee80211_vif *vif,
+                                  struct ieee80211_if_conf *conf)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ath_vap *avp;
+        u32 rfilt = 0;
+        int error, i;
+        DECLARE_MAC_BUF(mac);
+
+        avp = sc->sc_vaps[0];
+        if (avp == NULL) {
+                DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
+                        __func__);
+                return -EINVAL;
+        }
+
+        if ((conf->changed & IEEE80211_IFCC_BSSID) &&
+            !is_zero_ether_addr(conf->bssid)) {
+                switch (vif->type) {
+                case IEEE80211_IF_TYPE_STA:
+                case IEEE80211_IF_TYPE_IBSS:
+                        /* Update ratectrl about the new state */
+                        ath_rate_newstate(sc, avp);
+
+                        /* Set rx filter */
+                        rfilt = ath_calcrxfilter(sc);
+                        ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
+
+                        /* Set BSSID */
+                        memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
+                        sc->sc_curaid = 0;
+                        ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
+                                               sc->sc_curaid);
+
+                        /* Set aggregation protection mode parameters */
+                        sc->sc_config.ath_aggr_prot = 0;
+
+                        /*
+                         * Reset our TSF so that its value is lower than the
+                         * beacon that we are trying to catch.
+                         * Only then hw will update its TSF register with the
+                         * new beacon. Reset the TSF before setting the BSSID
+                         * to avoid allowing in any frames that would update
+                         * our TSF only to have us clear it
+                         * immediately thereafter.
+                         */
+                        ath9k_hw_reset_tsf(sc->sc_ah);
+
+                        /* Disable BMISS interrupt when we're not associated */
+                        ath9k_hw_set_interrupts(sc->sc_ah,
+                                        sc->sc_imask &
+                                        ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
+                        sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
+
+                        DPRINTF(sc, ATH_DBG_CONFIG,
+                                "%s: RX filter 0x%x bssid %s aid 0x%x\n",
+                                __func__, rfilt,
+                                print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
+
+                        /* need to reconfigure the beacon */
+                        sc->sc_beacons = 0;
+
+                        break;
+                default:
+                        break;
+                }
+        }
+
+        if ((conf->changed & IEEE80211_IFCC_BEACON) &&
+            (vif->type == IEEE80211_IF_TYPE_IBSS)) {
+                /*
+                 * Allocate and setup the beacon frame.
+                 *
+                 * Stop any previous beacon DMA.  This may be
+                 * necessary, for example, when an ibss merge
+                 * causes reconfiguration; we may be called
+                 * with beacon transmission active.
+                 */
+                ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
+
+                error = ath_beacon_alloc(sc, 0);
+                if (error != 0)
+                        return error;
+
+                ath_beacon_sync(sc, 0);
+        }
+
+        /* Check for WLAN_CAPABILITY_PRIVACY ? */
+        if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
+                for (i = 0; i < IEEE80211_WEP_NKID; i++)
+                        if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
+                                ath9k_hw_keysetmac(sc->sc_ah,
+                                                   (u16)i,
+                                                   sc->sc_curbssid);
+        }
+
+        /* Only legacy IBSS for now */
+        if (vif->type == IEEE80211_IF_TYPE_IBSS)
+                ath_update_chainmask(sc, 0);
+
+        return 0;
+}
+
+#define SUPPORTED_FILTERS                       \
+        (FIF_PROMISC_IN_BSS |                   \
+        FIF_ALLMULTI |                          \
+        FIF_CONTROL |                           \
+        FIF_OTHER_BSS |                         \
+        FIF_BCN_PRBRESP_PROMISC |               \
+        FIF_FCSFAIL)
+
+/* Accept unicast, bcast and mcast frames */
+
+static void ath9k_configure_filter(struct ieee80211_hw *hw,
+                                   unsigned int changed_flags,
+                                   unsigned int *total_flags,
+                                   int mc_count,
+                                   struct dev_mc_list *mclist)
+{
+        struct ath_softc *sc = hw->priv;
+
+        changed_flags &= SUPPORTED_FILTERS;
+        *total_flags &= SUPPORTED_FILTERS;
+
+        if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
+                if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
+                        ath_scan_start(sc);
+                else
+                        ath_scan_end(sc);
+        }
+}
+
+static void ath9k_sta_notify(struct ieee80211_hw *hw,
+                             struct ieee80211_vif *vif,
+                             enum sta_notify_cmd cmd,
+                             const u8 *addr)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ath_node *an;
+        unsigned long flags;
+        DECLARE_MAC_BUF(mac);
+
+        spin_lock_irqsave(&sc->node_lock, flags);
+        an = ath_node_find(sc, (u8 *) addr);
+        spin_unlock_irqrestore(&sc->node_lock, flags);
+
+        switch (cmd) {
+        case STA_NOTIFY_ADD:
+                spin_lock_irqsave(&sc->node_lock, flags);
+                if (!an) {
+                        ath_node_attach(sc, (u8 *)addr, 0);
+                        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
+                                __func__,
+                                print_mac(mac, addr));
+                } else {
+                        ath_node_get(sc, (u8 *)addr);
+                }
+                spin_unlock_irqrestore(&sc->node_lock, flags);
+                break;
+        case STA_NOTIFY_REMOVE:
+                if (!an)
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: Removal of a non-existent node\n",
+                                __func__);
+                else {
+                        ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
+                        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
+                                __func__,
+                                print_mac(mac, addr));
+                }
+                break;
+        default:
+                break;
+        }
+}
+
+static int ath9k_conf_tx(struct ieee80211_hw *hw,
+                         u16 queue,
+                         const struct ieee80211_tx_queue_params *params)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ath9k_tx_queue_info qi;
+        int ret = 0, qnum;
+
+        if (queue >= WME_NUM_AC)
+                return 0;
+
+        qi.tqi_aifs = params->aifs;
+        qi.tqi_cwmin = params->cw_min;
+        qi.tqi_cwmax = params->cw_max;
+        qi.tqi_burstTime = params->txop;
+        qnum = ath_get_hal_qnum(queue, sc);
+
+        DPRINTF(sc, ATH_DBG_CONFIG,
+                "%s: Configure tx [queue/halq] [%d/%d],  "
+                "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
+                __func__,
+                queue,
+                qnum,
+                params->aifs,
+                params->cw_min,
+                params->cw_max,
+                params->txop);
+
+        ret = ath_txq_update(sc, qnum, &qi);
+        if (ret)
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: TXQ Update failed\n", __func__);
+
+        return ret;
+}
+
+static int ath9k_set_key(struct ieee80211_hw *hw,
+                         enum set_key_cmd cmd,
+                         const u8 *local_addr,
+                         const u8 *addr,
+                         struct ieee80211_key_conf *key)
+{
+        struct ath_softc *sc = hw->priv;
+        int ret = 0;
+
+        DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
+
+        switch (cmd) {
+        case SET_KEY:
+                ret = ath_key_config(sc, addr, key);
+                if (!ret) {
+                        set_bit(key->keyidx, sc->sc_keymap);
+                        key->hw_key_idx = key->keyidx;
+                        /* push IV and Michael MIC generation to stack */
+                        key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
+                        key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
+                }
+                break;
+        case DISABLE_KEY:
+                ath_key_delete(sc, key);
+                clear_bit(key->keyidx, sc->sc_keymap);
+                sc->sc_keytype = ATH9K_CIPHER_CLR;
+                break;
+        default:
+                ret = -EINVAL;
+        }
+
+        return ret;
+}
+
+static void ath9k_ht_conf(struct ath_softc *sc,
+                          struct ieee80211_bss_conf *bss_conf)
+{
+#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
+        struct ath_ht_info *ht_info = &sc->sc_ht_info;
+
+        if (bss_conf->assoc_ht) {
+                ht_info->ext_chan_offset =
+                        bss_conf->ht_bss_conf->bss_cap &
+                                IEEE80211_HT_IE_CHA_SEC_OFFSET;
+
+                if (!(bss_conf->ht_conf->cap &
+                        IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
+                            (bss_conf->ht_bss_conf->bss_cap &
+                                IEEE80211_HT_IE_CHA_WIDTH))
+                        ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
+                else
+                        ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
+
+                ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
+                ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
+                                        bss_conf->ht_conf->ampdu_factor);
+                ht_info->mpdudensity =
+                        parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
+
+        }
+
+#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
+}
+
+static void ath9k_bss_assoc_info(struct ath_softc *sc,
+                                 struct ieee80211_bss_conf *bss_conf)
+{
+        struct ieee80211_hw *hw = sc->hw;
+        struct ieee80211_channel *curchan = hw->conf.channel;
+        struct ath_vap *avp;
+        int pos;
+        DECLARE_MAC_BUF(mac);
+
+        if (bss_conf->assoc) {
+                DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
+                        __func__,
+                        bss_conf->aid);
+
+                avp = sc->sc_vaps[0];
+                if (avp == NULL) {
+                        DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
+                                __func__);
+                        return;
+                }
+
+                /* New association, store aid */
+                if (avp->av_opmode == ATH9K_M_STA) {
+                        sc->sc_curaid = bss_conf->aid;
+                        ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
+                                               sc->sc_curaid);
+                }
+
+                /* Configure the beacon */
+                ath_beacon_config(sc, 0);
+                sc->sc_beacons = 1;
+
+                /* Reset rssi stats */
+                sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
+                sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
+                sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
+                sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
+
+                /* Update chainmask */
+                ath_update_chainmask(sc, bss_conf->assoc_ht);
+
+                DPRINTF(sc, ATH_DBG_CONFIG,
+                        "%s: bssid %s aid 0x%x\n",
+                        __func__,
+                        print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
+
+                DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
+                        __func__,
+                        curchan->center_freq);
+
+                pos = ath_get_channel(sc, curchan);
+                if (pos == -1) {
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: Invalid channel\n", __func__);
+                        return;
+                }
+
+                if (hw->conf.ht_conf.ht_supported)
+                        sc->sc_ah->ah_channels[pos].chanmode =
+                                ath_get_extchanmode(sc, curchan);
+                else
+                        sc->sc_ah->ah_channels[pos].chanmode =
+                                (curchan->band == IEEE80211_BAND_2GHZ) ?
+                                CHANNEL_G : CHANNEL_A;
+
+                /* set h/w channel */
+                if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: Unable to set channel\n",
+                                __func__);
+
+                ath_rate_newstate(sc, avp);
+                /* Update ratectrl about the new state */
+                ath_rc_node_update(hw, avp->rc_node);
+        } else {
+                DPRINTF(sc, ATH_DBG_CONFIG,
+                "%s: Bss Info DISSOC\n", __func__);
+                sc->sc_curaid = 0;
+        }
+}
+
+static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
+                                   struct ieee80211_vif *vif,
+                                   struct ieee80211_bss_conf *bss_conf,
+                                   u32 changed)
+{
+        struct ath_softc *sc = hw->priv;
+
+        if (changed & BSS_CHANGED_ERP_PREAMBLE) {
+                DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
+                        __func__,
+                        bss_conf->use_short_preamble);
+                if (bss_conf->use_short_preamble)
+                        sc->sc_flags |= ATH_PREAMBLE_SHORT;
+                else
+                        sc->sc_flags &= ~ATH_PREAMBLE_SHORT;
+        }
+
+        if (changed & BSS_CHANGED_ERP_CTS_PROT) {
+                DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
+                        __func__,
+                        bss_conf->use_cts_prot);
+                if (bss_conf->use_cts_prot &&
+                    hw->conf.channel->band != IEEE80211_BAND_5GHZ)
+                        sc->sc_flags |= ATH_PROTECT_ENABLE;
+                else
+                        sc->sc_flags &= ~ATH_PROTECT_ENABLE;
+        }
+
+        if (changed & BSS_CHANGED_HT) {
+                DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
+                        __func__,
+                        bss_conf->assoc_ht);
+                ath9k_ht_conf(sc, bss_conf);
+        }
+
+        if (changed & BSS_CHANGED_ASSOC) {
+                DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
+                        __func__,
+                        bss_conf->assoc);
+                ath9k_bss_assoc_info(sc, bss_conf);
+        }
+}
+
+static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
+{
+        u64 tsf;
+        struct ath_softc *sc = hw->priv;
+        struct ath_hal *ah = sc->sc_ah;
+
+        tsf = ath9k_hw_gettsf64(ah);
+
+        return tsf;
+}
+
+static void ath9k_reset_tsf(struct ieee80211_hw *hw)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ath_hal *ah = sc->sc_ah;
+
+        ath9k_hw_reset_tsf(ah);
+}
+
+static int ath9k_ampdu_action(struct ieee80211_hw *hw,
+                       enum ieee80211_ampdu_mlme_action action,
+                       const u8 *addr,
+                       u16 tid,
+                       u16 *ssn)
+{
+        struct ath_softc *sc = hw->priv;
+        int ret = 0;
+
+        switch (action) {
+        case IEEE80211_AMPDU_RX_START:
+                ret = ath_rx_aggr_start(sc, addr, tid, ssn);
+                if (ret < 0)
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: Unable to start RX aggregation\n",
+                                __func__);
+                break;
+        case IEEE80211_AMPDU_RX_STOP:
+                ret = ath_rx_aggr_stop(sc, addr, tid);
+                if (ret < 0)
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: Unable to stop RX aggregation\n",
+                                __func__);
+                break;
+        case IEEE80211_AMPDU_TX_START:
+                ret = ath_tx_aggr_start(sc, addr, tid, ssn);
+                if (ret < 0)
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: Unable to start TX aggregation\n",
+                                __func__);
+                else
+                        ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
+                break;
+        case IEEE80211_AMPDU_TX_STOP:
+                ret = ath_tx_aggr_stop(sc, addr, tid);
+                if (ret < 0)
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: Unable to stop TX aggregation\n",
+                                __func__);
+
+                ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
+                break;
+        default:
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: Unknown AMPDU action\n", __func__);
+        }
+
+        return ret;
+}
+
+static struct ieee80211_ops ath9k_ops = {
+        .tx                 = ath9k_tx,
+        .start              = ath9k_start,
+        .stop               = ath9k_stop,
+        .add_interface      = ath9k_add_interface,
+        .remove_interface   = ath9k_remove_interface,
+        .config             = ath9k_config,
+        .config_interface   = ath9k_config_interface,
+        .configure_filter   = ath9k_configure_filter,
+        .get_stats          = NULL,
+        .sta_notify         = ath9k_sta_notify,
+        .conf_tx            = ath9k_conf_tx,
+        .get_tx_stats       = NULL,
+        .bss_info_changed   = ath9k_bss_info_changed,
+        .set_tim            = NULL,
+        .set_key            = ath9k_set_key,
+        .hw_scan            = NULL,
+        .get_tkip_seq       = NULL,
+        .set_rts_threshold  = NULL,
+        .set_frag_threshold = NULL,
+        .set_retry_limit    = NULL,
+        .get_tsf            = ath9k_get_tsf,
+        .reset_tsf          = ath9k_reset_tsf,
+        .tx_last_beacon     = NULL,
+        .ampdu_action       = ath9k_ampdu_action
+};
+
+void ath_get_beaconconfig(struct ath_softc *sc,
+                          int if_id,
+                          struct ath_beacon_config *conf)
+{
+        struct ieee80211_hw *hw = sc->hw;
+
+        /* fill in beacon config data */
+
+        conf->beacon_interval = hw->conf.beacon_int;
+        conf->listen_interval = 100;
+        conf->dtim_count = 1;
+        conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
+}
+
+int ath_update_beacon(struct ath_softc *sc,
+                      int if_id,
+                      struct ath_beacon_offset *bo,
+                      struct sk_buff *skb,
+                      int mcast)
+{
+        return 0;
+}
+
+void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
+                     struct ath_xmit_status *tx_status, struct ath_node *an)
+{
+        struct ieee80211_hw *hw = sc->hw;
+        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+
+        DPRINTF(sc, ATH_DBG_XMIT,
+                "%s: TX complete: skb: %p\n", __func__, skb);
+
+        if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
+                tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
+                /* free driver's private data area of tx_info */
+                if (tx_info->driver_data[0] != NULL)
+                        kfree(tx_info->driver_data[0]);
+                        tx_info->driver_data[0] = NULL;
+        }
+
+        if (tx_status->flags & ATH_TX_BAR) {
+                tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
+                tx_status->flags &= ~ATH_TX_BAR;
+        }
+        if (tx_status->flags)
+                tx_info->status.excessive_retries = 1;
+
+        tx_info->status.retry_count = tx_status->retries;
+
+        ieee80211_tx_status(hw, skb);
+        if (an)
+                ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
+}
+
+int ath__rx_indicate(struct ath_softc *sc,
+                     struct sk_buff *skb,
+                     struct ath_recv_status *status,
+                     u16 keyix)
+{
+        struct ieee80211_hw *hw = sc->hw;
+        struct ath_node *an = NULL;
+        struct ieee80211_rx_status rx_status;
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+        int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
+        int padsize;
+        enum ATH_RX_TYPE st;
+
+        /* see if any padding is done by the hw and remove it */
+        if (hdrlen & 3) {
+                padsize = hdrlen % 4;
+                memmove(skb->data + padsize, skb->data, hdrlen);
+                skb_pull(skb, padsize);
+        }
+
+        /* remove FCS before passing up to protocol stack */
+        skb_trim(skb, (skb->len - FCS_LEN));
+
+        /* Prepare rx status */
+        ath9k_rx_prepare(sc, skb, status, &rx_status);
+
+        if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
+            !(status->flags & ATH_RX_DECRYPT_ERROR)) {
+                rx_status.flag |= RX_FLAG_DECRYPTED;
+        } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
+                   && !(status->flags & ATH_RX_DECRYPT_ERROR)
+                   && skb->len >= hdrlen + 4) {
+                keyix = skb->data[hdrlen + 3] >> 6;
+
+                if (test_bit(keyix, sc->sc_keymap))
+                        rx_status.flag |= RX_FLAG_DECRYPTED;
+        }
+
+        spin_lock_bh(&sc->node_lock);
+        an = ath_node_find(sc, hdr->addr2);
+        spin_unlock_bh(&sc->node_lock);
+
+        if (an) {
+                ath_rx_input(sc, an,
+                             hw->conf.ht_conf.ht_supported,
+                             skb, status, &st);
+        }
+        if (!an || (st != ATH_RX_CONSUMED))
+                __ieee80211_rx(hw, skb, &rx_status);
+
+        return 0;
+}
+
+int ath_rx_subframe(struct ath_node *an,
+                    struct sk_buff *skb,
+                    struct ath_recv_status *status)
+{
+        struct ath_softc *sc = an->an_sc;
+        struct ieee80211_hw *hw = sc->hw;
+        struct ieee80211_rx_status rx_status;
+
+        /* Prepare rx status */
+        ath9k_rx_prepare(sc, skb, status, &rx_status);
+        if (!(status->flags & ATH_RX_DECRYPT_ERROR))
+                rx_status.flag |= RX_FLAG_DECRYPTED;
+
+        __ieee80211_rx(hw, skb, &rx_status);
+
+        return 0;
+}
+
+enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
+{
+        return sc->sc_ht_info.tx_chan_width;
+}
+
+static int ath_detach(struct ath_softc *sc)
+{
+        struct ieee80211_hw *hw = sc->hw;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
+
+        /* Unregister hw */
+
+        ieee80211_unregister_hw(hw);
+
+        /* unregister Rate control */
+        ath_rate_control_unregister();
+
+        /* tx/rx cleanup */
+
+        ath_rx_cleanup(sc);
+        ath_tx_cleanup(sc);
+
+        /* Deinit */
+
+        ath_deinit(sc);
+
+        return 0;
+}
+
+static int ath_attach(u16 devid,
+                      struct ath_softc *sc)
+{
+        struct ieee80211_hw *hw = sc->hw;
+        int error = 0;
+
+        DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
+
+        error = ath_init(devid, sc);
+        if (error != 0)
+                return error;
+
+        /* Init nodes */
+
+        INIT_LIST_HEAD(&sc->node_list);
+        spin_lock_init(&sc->node_lock);
+
+        /* get mac address from hardware and set in mac80211 */
+
+        SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
+
+        /* setup channels and rates */
+
+        sc->sbands[IEEE80211_BAND_2GHZ].channels =
+                sc->channels[IEEE80211_BAND_2GHZ];
+        sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
+                sc->rates[IEEE80211_BAND_2GHZ];
+        sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
+
+        if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
+                /* Setup HT capabilities for 2.4Ghz*/
+                setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
+
+        hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
+                &sc->sbands[IEEE80211_BAND_2GHZ];
+
+        if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
+                sc->sbands[IEEE80211_BAND_5GHZ].channels =
+                        sc->channels[IEEE80211_BAND_5GHZ];
+                sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
+                        sc->rates[IEEE80211_BAND_5GHZ];
+                sc->sbands[IEEE80211_BAND_5GHZ].band =
+                        IEEE80211_BAND_5GHZ;
+
+                if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
+                        /* Setup HT capabilities for 5Ghz*/
+                        setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
+
+                hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
+                        &sc->sbands[IEEE80211_BAND_5GHZ];
+        }
+
+        /* FIXME: Have to figure out proper hw init values later */
+
+        hw->queues = 4;
+        hw->ampdu_queues = 1;
+
+        /* Register rate control */
+        hw->rate_control_algorithm = "ath9k_rate_control";
+        error = ath_rate_control_register();
+        if (error != 0) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: Unable to register rate control "
+                        "algorithm:%d\n", __func__, error);
+                ath_rate_control_unregister();
+                goto bad;
+        }
+
+        error = ieee80211_register_hw(hw);
+        if (error != 0) {
+                ath_rate_control_unregister();
+                goto bad;
+        }
+
+        /* initialize tx/rx engine */
+
+        error = ath_tx_init(sc, ATH_TXBUF);
+        if (error != 0)
+                goto bad1;
+
+        error = ath_rx_init(sc, ATH_RXBUF);
+        if (error != 0)
+                goto bad1;
+
+        return 0;
+bad1:
+        ath_detach(sc);
+bad:
+        return error;
+}
+
+static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+        void __iomem *mem;
+        struct ath_softc *sc;
+        struct ieee80211_hw *hw;
+        const char *athname;
+        u8 csz;
+        u32 val;
+        int ret = 0;
+
+        if (pci_enable_device(pdev))
+                return -EIO;
+
+        /* XXX 32-bit addressing only */
+        if (pci_set_dma_mask(pdev, 0xffffffff)) {
+                printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
+                ret = -ENODEV;
+                goto bad;
+        }
+
+        /*
+         * Cache line size is used to size and align various
+         * structures used to communicate with the hardware.
+         */
+        pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
+        if (csz == 0) {
+                /*
+                 * Linux 2.4.18 (at least) writes the cache line size
+                 * register as a 16-bit wide register which is wrong.
+                 * We must have this setup properly for rx buffer
+                 * DMA to work so force a reasonable value here if it
+                 * comes up zero.
+                 */
+                csz = L1_CACHE_BYTES / sizeof(u32);
+                pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
+        }
+        /*
+         * The default setting of latency timer yields poor results,
+         * set it to the value used by other systems. It may be worth
+         * tweaking this setting more.
+         */
+        pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
+
+        pci_set_master(pdev);
+
+        /*
+         * Disable the RETRY_TIMEOUT register (0x41) to keep
+         * PCI Tx retries from interfering with C3 CPU state.
+         */
+        pci_read_config_dword(pdev, 0x40, &val);
+        if ((val & 0x0000ff00) != 0)
+                pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
+
+        ret = pci_request_region(pdev, 0, "ath9k");
+        if (ret) {
+                dev_err(&pdev->dev, "PCI memory region reserve error\n");
+                ret = -ENODEV;
+                goto bad;
+        }
+
+        mem = pci_iomap(pdev, 0, 0);
+        if (!mem) {
+                printk(KERN_ERR "PCI memory map error\n") ;
+                ret = -EIO;
+                goto bad1;
+        }
+
+        hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
+        if (hw == NULL) {
+                printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
+                goto bad2;
+        }
+
+        hw->flags = IEEE80211_HW_SIGNAL_DBM |
+                IEEE80211_HW_NOISE_DBM;
+
+        SET_IEEE80211_DEV(hw, &pdev->dev);
+        pci_set_drvdata(pdev, hw);
+
+        sc = hw->priv;
+        sc->hw = hw;
+        sc->pdev = pdev;
+        sc->mem = mem;
+
+        if (ath_attach(id->device, sc) != 0) {
+                ret = -ENODEV;
+                goto bad3;
+        }
+
+        /* setup interrupt service routine */
+
+        if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
+                printk(KERN_ERR "%s: request_irq failed\n",
+                        wiphy_name(hw->wiphy));
+                ret = -EIO;
+                goto bad4;
+        }
+
+        athname = ath9k_hw_probe(id->vendor, id->device);
+
+        printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
+               wiphy_name(hw->wiphy),
+               athname ? athname : "Atheros ???",
+               (unsigned long)mem, pdev->irq);
+
+        return 0;
+bad4:
+        ath_detach(sc);
+bad3:
+        ieee80211_free_hw(hw);
+bad2:
+        pci_iounmap(pdev, mem);
+bad1:
+        pci_release_region(pdev, 0);
+bad:
+        pci_disable_device(pdev);
+        return ret;
+}
+
+static void ath_pci_remove(struct pci_dev *pdev)
+{
+        struct ieee80211_hw *hw = pci_get_drvdata(pdev);
+        struct ath_softc *sc = hw->priv;
+
+        if (pdev->irq)
+                free_irq(pdev->irq, sc);
+        ath_detach(sc);
+        pci_iounmap(pdev, sc->mem);
+        pci_release_region(pdev, 0);
+        pci_disable_device(pdev);
+        ieee80211_free_hw(hw);
+}
+
+#ifdef CONFIG_PM
+
+static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+        pci_save_state(pdev);
+        pci_disable_device(pdev);
+        pci_set_power_state(pdev, 3);
+
+        return 0;
+}
+
+static int ath_pci_resume(struct pci_dev *pdev)
+{
+        u32 val;
+        int err;
+
+        err = pci_enable_device(pdev);
+        if (err)
+                return err;
+        pci_restore_state(pdev);
+        /*
+         * Suspend/Resume resets the PCI configuration space, so we have to
+         * re-disable the RETRY_TIMEOUT register (0x41) to keep
+         * PCI Tx retries from interfering with C3 CPU state
+         */
+        pci_read_config_dword(pdev, 0x40, &val);
+        if ((val & 0x0000ff00) != 0)
+                pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
+
+        return 0;
+}
+
+#endif /* CONFIG_PM */
+
+MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
+
+static struct pci_driver ath_pci_driver = {
+        .name       = "ath9k",
+        .id_table   = ath_pci_id_table,
+        .probe      = ath_pci_probe,
+        .remove     = ath_pci_remove,
+#ifdef CONFIG_PM
+        .suspend    = ath_pci_suspend,
+        .resume     = ath_pci_resume,
+#endif /* CONFIG_PM */
+};
+
+static int __init init_ath_pci(void)
+{
+        printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
+
+        if (pci_register_driver(&ath_pci_driver) < 0) {
+                printk(KERN_ERR
+                        "ath_pci: No devices found, driver not installed.\n");
+                pci_unregister_driver(&ath_pci_driver);
+                return -ENODEV;
+        }
+
+        return 0;
+}
+module_init(init_ath_pci);
+
+static void __exit exit_ath_pci(void)
+{
+        pci_unregister_driver(&ath_pci_driver);
+        printk(KERN_INFO "%s: driver unloaded\n", dev_info);
+}
+module_exit(exit_ath_pci);
diff --git a/drivers/net/wireless/ath9k/phy.c b/drivers/net/wireless/ath9k/phy.c
new file mode 100644
index 000000000000..eb9121fdfd38
--- /dev/null
+++ b/drivers/net/wireless/ath9k/phy.c
@@ -0,0 +1,436 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "core.h"
+#include "hw.h"
+#include "reg.h"
+#include "phy.h"
+
+void
+ath9k_hw_write_regs(struct ath_hal *ah, u32 modesIndex, u32 freqIndex,
+                    int regWrites)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        REG_WRITE_ARRAY(&ahp->ah_iniBB_RfGain, freqIndex, regWrites);
+}
+
+bool
+ath9k_hw_set_channel(struct ath_hal *ah, struct ath9k_channel *chan)
+{
+        u32 channelSel = 0;
+        u32 bModeSynth = 0;
+        u32 aModeRefSel = 0;
+        u32 reg32 = 0;
+        u16 freq;
+        struct chan_centers centers;
+
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+        freq = centers.synth_center;
+
+        if (freq < 4800) {
+                u32 txctl;
+
+                if (((freq - 2192) % 5) == 0) {
+                        channelSel = ((freq - 672) * 2 - 3040) / 10;
+                        bModeSynth = 0;
+                } else if (((freq - 2224) % 5) == 0) {
+                        channelSel = ((freq - 704) * 2 - 3040) / 10;
+                        bModeSynth = 1;
+                } else {
+                        DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                                 "%s: invalid channel %u MHz\n", __func__,
+                                 freq);
+                        return false;
+                }
+
+                channelSel = (channelSel << 2) & 0xff;
+                channelSel = ath9k_hw_reverse_bits(channelSel, 8);
+
+                txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
+                if (freq == 2484) {
+
+                        REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
+                                  txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
+                } else {
+                        REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
+                                  txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN);
+                }
+
+        } else if ((freq % 20) == 0 && freq >= 5120) {
+                channelSel =
+                    ath9k_hw_reverse_bits(((freq - 4800) / 20 << 2), 8);
+                aModeRefSel = ath9k_hw_reverse_bits(1, 2);
+        } else if ((freq % 10) == 0) {
+                channelSel =
+                    ath9k_hw_reverse_bits(((freq - 4800) / 10 << 1), 8);
+                if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
+                        aModeRefSel = ath9k_hw_reverse_bits(2, 2);
+                else
+                        aModeRefSel = ath9k_hw_reverse_bits(1, 2);
+        } else if ((freq % 5) == 0) {
+                channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
+                aModeRefSel = ath9k_hw_reverse_bits(1, 2);
+        } else {
+                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
+                         "%s: invalid channel %u MHz\n", __func__, freq);
+                return false;
+        }
+
+        reg32 =
+            (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
+            (1 << 5) | 0x1;
+
+        REG_WRITE(ah, AR_PHY(0x37), reg32);
+
+        ah->ah_curchan = chan;
+
+        AH5416(ah)->ah_curchanRadIndex = -1;
+
+        return true;
+}
+
+bool
+ath9k_hw_ar9280_set_channel(struct ath_hal *ah,
+                            struct ath9k_channel *chan)
+{
+        u16 bMode, fracMode, aModeRefSel = 0;
+        u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
+        struct chan_centers centers;
+        u32 refDivA = 24;
+
+        ath9k_hw_get_channel_centers(ah, chan, &centers);
+        freq = centers.synth_center;
+
+        reg32 = REG_READ(ah, AR_PHY_SYNTH_CONTROL);
+        reg32 &= 0xc0000000;
+
+        if (freq < 4800) {
+                u32 txctl;
+
+                bMode = 1;
+                fracMode = 1;
+                aModeRefSel = 0;
+                channelSel = (freq * 0x10000) / 15;
+
+                txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
+                if (freq == 2484) {
+
+                        REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
+                                  txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
+                } else {
+                        REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
+                                  txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN);
+                }
+        } else {
+                bMode = 0;
+                fracMode = 0;
+
+                if ((freq % 20) == 0) {
+                        aModeRefSel = 3;
+                } else if ((freq % 10) == 0) {
+                        aModeRefSel = 2;
+                } else {
+                        aModeRefSel = 0;
+
+                        fracMode = 1;
+                        refDivA = 1;
+                        channelSel = (freq * 0x8000) / 15;
+
+                        REG_RMW_FIELD(ah, AR_AN_SYNTH9,
+                                      AR_AN_SYNTH9_REFDIVA, refDivA);
+                }
+                if (!fracMode) {
+                        ndiv = (freq * (refDivA >> aModeRefSel)) / 60;
+                        channelSel = ndiv & 0x1ff;
+                        channelFrac = (ndiv & 0xfffffe00) * 2;
+                        channelSel = (channelSel << 17) | channelFrac;
+                }
+        }
+
+        reg32 = reg32 |
+            (bMode << 29) |
+            (fracMode << 28) | (aModeRefSel << 26) | (channelSel);
+
+        REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
+
+        ah->ah_curchan = chan;
+
+        AH5416(ah)->ah_curchanRadIndex = -1;
+
+        return true;
+}
+
+static void
+ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
+                           u32 numBits, u32 firstBit,
+                           u32 column)
+{
+        u32 tmp32, mask, arrayEntry, lastBit;
+        int32_t bitPosition, bitsLeft;
+
+        tmp32 = ath9k_hw_reverse_bits(reg32, numBits);
+        arrayEntry = (firstBit - 1) / 8;
+        bitPosition = (firstBit - 1) % 8;
+        bitsLeft = numBits;
+        while (bitsLeft > 0) {
+                lastBit = (bitPosition + bitsLeft > 8) ?
+                    8 : bitPosition + bitsLeft;
+                mask = (((1 << lastBit) - 1) ^ ((1 << bitPosition) - 1)) <<
+                    (column * 8);
+                rfBuf[arrayEntry] &= ~mask;
+                rfBuf[arrayEntry] |= ((tmp32 << bitPosition) <<
+                                      (column * 8)) & mask;
+                bitsLeft -= 8 - bitPosition;
+                tmp32 = tmp32 >> (8 - bitPosition);
+                bitPosition = 0;
+                arrayEntry++;
+        }
+}
+
+bool
+ath9k_hw_set_rf_regs(struct ath_hal *ah, struct ath9k_channel *chan,
+                     u16 modesIndex)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        u32 eepMinorRev;
+        u32 ob5GHz = 0, db5GHz = 0;
+        u32 ob2GHz = 0, db2GHz = 0;
+        int regWrites = 0;
+
+        if (AR_SREV_9280_10_OR_LATER(ah))
+                return true;
+
+        eepMinorRev = ath9k_hw_get_eeprom(ahp, EEP_MINOR_REV);
+
+        RF_BANK_SETUP(ahp->ah_analogBank0Data, &ahp->ah_iniBank0, 1);
+
+        RF_BANK_SETUP(ahp->ah_analogBank1Data, &ahp->ah_iniBank1, 1);
+
+        RF_BANK_SETUP(ahp->ah_analogBank2Data, &ahp->ah_iniBank2, 1);
+
+        RF_BANK_SETUP(ahp->ah_analogBank3Data, &ahp->ah_iniBank3,
+                      modesIndex);
+        {
+                int i;
+                for (i = 0; i < ahp->ah_iniBank6TPC.ia_rows; i++) {
+                        ahp->ah_analogBank6Data[i] =
+                            INI_RA(&ahp->ah_iniBank6TPC, i, modesIndex);
+                }
+        }
+
+        if (eepMinorRev >= 2) {
+                if (IS_CHAN_2GHZ(chan)) {
+                        ob2GHz = ath9k_hw_get_eeprom(ahp, EEP_OB_2);
+                        db2GHz = ath9k_hw_get_eeprom(ahp, EEP_DB_2);
+                        ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data,
+                                                   ob2GHz, 3, 197, 0);
+                        ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data,
+                                                   db2GHz, 3, 194, 0);
+                } else {
+                        ob5GHz = ath9k_hw_get_eeprom(ahp, EEP_OB_5);
+                        db5GHz = ath9k_hw_get_eeprom(ahp, EEP_DB_5);
+                        ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data,
+                                                   ob5GHz, 3, 203, 0);
+                        ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data,
+                                                   db5GHz, 3, 200, 0);
+                }
+        }
+
+        RF_BANK_SETUP(ahp->ah_analogBank7Data, &ahp->ah_iniBank7, 1);
+
+        REG_WRITE_RF_ARRAY(&ahp->ah_iniBank0, ahp->ah_analogBank0Data,
+                           regWrites);
+        REG_WRITE_RF_ARRAY(&ahp->ah_iniBank1, ahp->ah_analogBank1Data,
+                           regWrites);
+        REG_WRITE_RF_ARRAY(&ahp->ah_iniBank2, ahp->ah_analogBank2Data,
+                           regWrites);
+        REG_WRITE_RF_ARRAY(&ahp->ah_iniBank3, ahp->ah_analogBank3Data,
+                           regWrites);
+        REG_WRITE_RF_ARRAY(&ahp->ah_iniBank6TPC, ahp->ah_analogBank6Data,
+                           regWrites);
+        REG_WRITE_RF_ARRAY(&ahp->ah_iniBank7, ahp->ah_analogBank7Data,
+                           regWrites);
+
+        return true;
+}
+
+void
+ath9k_hw_rfdetach(struct ath_hal *ah)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (ahp->ah_analogBank0Data != NULL) {
+                kfree(ahp->ah_analogBank0Data);
+                ahp->ah_analogBank0Data = NULL;
+        }
+        if (ahp->ah_analogBank1Data != NULL) {
+                kfree(ahp->ah_analogBank1Data);
+                ahp->ah_analogBank1Data = NULL;
+        }
+        if (ahp->ah_analogBank2Data != NULL) {
+                kfree(ahp->ah_analogBank2Data);
+                ahp->ah_analogBank2Data = NULL;
+        }
+        if (ahp->ah_analogBank3Data != NULL) {
+                kfree(ahp->ah_analogBank3Data);
+                ahp->ah_analogBank3Data = NULL;
+        }
+        if (ahp->ah_analogBank6Data != NULL) {
+                kfree(ahp->ah_analogBank6Data);
+                ahp->ah_analogBank6Data = NULL;
+        }
+        if (ahp->ah_analogBank6TPCData != NULL) {
+                kfree(ahp->ah_analogBank6TPCData);
+                ahp->ah_analogBank6TPCData = NULL;
+        }
+        if (ahp->ah_analogBank7Data != NULL) {
+                kfree(ahp->ah_analogBank7Data);
+                ahp->ah_analogBank7Data = NULL;
+        }
+        if (ahp->ah_addac5416_21 != NULL) {
+                kfree(ahp->ah_addac5416_21);
+                ahp->ah_addac5416_21 = NULL;
+        }
+        if (ahp->ah_bank6Temp != NULL) {
+                kfree(ahp->ah_bank6Temp);
+                ahp->ah_bank6Temp = NULL;
+        }
+}
+
+bool ath9k_hw_init_rf(struct ath_hal *ah, int *status)
+{
+        struct ath_hal_5416 *ahp = AH5416(ah);
+
+        if (!AR_SREV_9280_10_OR_LATER(ah)) {
+
+                ahp->ah_analogBank0Data =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniBank0.ia_rows), GFP_KERNEL);
+                ahp->ah_analogBank1Data =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniBank1.ia_rows), GFP_KERNEL);
+                ahp->ah_analogBank2Data =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniBank2.ia_rows), GFP_KERNEL);
+                ahp->ah_analogBank3Data =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniBank3.ia_rows), GFP_KERNEL);
+                ahp->ah_analogBank6Data =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniBank6.ia_rows), GFP_KERNEL);
+                ahp->ah_analogBank6TPCData =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniBank6TPC.ia_rows), GFP_KERNEL);
+                ahp->ah_analogBank7Data =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniBank7.ia_rows), GFP_KERNEL);
+
+                if (ahp->ah_analogBank0Data == NULL
+                    || ahp->ah_analogBank1Data == NULL
+                    || ahp->ah_analogBank2Data == NULL
+                    || ahp->ah_analogBank3Data == NULL
+                    || ahp->ah_analogBank6Data == NULL
+                    || ahp->ah_analogBank6TPCData == NULL
+                    || ahp->ah_analogBank7Data == NULL) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
+                                 "%s: cannot allocate RF banks\n",
+                                 __func__);
+                        *status = -ENOMEM;
+                        return false;
+                }
+
+                ahp->ah_addac5416_21 =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniAddac.ia_rows *
+                             ahp->ah_iniAddac.ia_columns), GFP_KERNEL);
+                if (ahp->ah_addac5416_21 == NULL) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
+                                 "%s: cannot allocate ah_addac5416_21\n",
+                                 __func__);
+                        *status = -ENOMEM;
+                        return false;
+                }
+
+                ahp->ah_bank6Temp =
+                    kzalloc((sizeof(u32) *
+                             ahp->ah_iniBank6.ia_rows), GFP_KERNEL);
+                if (ahp->ah_bank6Temp == NULL) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
+                                 "%s: cannot allocate ah_bank6Temp\n",
+                                 __func__);
+                        *status = -ENOMEM;
+                        return false;
+                }
+        }
+
+        return true;
+}
+
+void
+ath9k_hw_decrease_chain_power(struct ath_hal *ah, struct ath9k_channel *chan)
+{
+        int i, regWrites = 0;
+        struct ath_hal_5416 *ahp = AH5416(ah);
+        u32 bank6SelMask;
+        u32 *bank6Temp = ahp->ah_bank6Temp;
+
+        switch (ahp->ah_diversityControl) {
+        case ATH9K_ANT_FIXED_A:
+                bank6SelMask =
+                    (ahp->
+                     ah_antennaSwitchSwap & ANTSWAP_AB) ? REDUCE_CHAIN_0 :
+                    REDUCE_CHAIN_1;
+                break;
+        case ATH9K_ANT_FIXED_B:
+                bank6SelMask =
+                    (ahp->
+                     ah_antennaSwitchSwap & ANTSWAP_AB) ? REDUCE_CHAIN_1 :
+                    REDUCE_CHAIN_0;
+                break;
+        case ATH9K_ANT_VARIABLE:
+                return;
+                break;
+        default:
+                return;
+                break;
+        }
+
+        for (i = 0; i < ahp->ah_iniBank6.ia_rows; i++)
+                bank6Temp[i] = ahp->ah_analogBank6Data[i];
+
+        REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);
+
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 189, 0);
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 190, 0);
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 191, 0);
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 192, 0);
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 193, 0);
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 222, 0);
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 245, 0);
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 246, 0);
+        ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 247, 0);
+
+        REG_WRITE_RF_ARRAY(&ahp->ah_iniBank6, bank6Temp, regWrites);
+
+        REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);
+#ifdef ALTER_SWITCH
+        REG_WRITE(ah, PHY_SWITCH_CHAIN_0,
+                  (REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)
+                  | ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));
+#endif
+}
diff --git a/drivers/net/wireless/ath9k/phy.h b/drivers/net/wireless/ath9k/phy.h
new file mode 100644
index 000000000000..0cd399a5344a
--- /dev/null
+++ b/drivers/net/wireless/ath9k/phy.h
@@ -0,0 +1,543 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef PHY_H
+#define PHY_H
+
+bool ath9k_hw_ar9280_set_channel(struct ath_hal *ah,
+                                          struct ath9k_channel
+                                          *chan);
+bool ath9k_hw_set_channel(struct ath_hal *ah,
+                                   struct ath9k_channel *chan);
+void ath9k_hw_write_regs(struct ath_hal *ah, u32 modesIndex,
+                         u32 freqIndex, int regWrites);
+bool ath9k_hw_set_rf_regs(struct ath_hal *ah,
+                                   struct ath9k_channel *chan,
+                                   u16 modesIndex);
+void ath9k_hw_decrease_chain_power(struct ath_hal *ah,
+                                   struct ath9k_channel *chan);
+bool ath9k_hw_init_rf(struct ath_hal *ah,
+                               int *status);
+
+#define AR_PHY_BASE     0x9800
+#define AR_PHY(_n)      (AR_PHY_BASE + ((_n)<<2))
+
+#define AR_PHY_TEST             0x9800
+#define PHY_AGC_CLR             0x10000000
+#define RFSILENT_BB             0x00002000
+
+#define AR_PHY_TURBO                0x9804
+#define AR_PHY_FC_TURBO_MODE        0x00000001
+#define AR_PHY_FC_TURBO_SHORT       0x00000002
+#define AR_PHY_FC_DYN2040_EN        0x00000004
+#define AR_PHY_FC_DYN2040_PRI_ONLY  0x00000008
+#define AR_PHY_FC_DYN2040_PRI_CH    0x00000010
+#define AR_PHY_FC_DYN2040_EXT_CH    0x00000020
+#define AR_PHY_FC_HT_EN             0x00000040
+#define AR_PHY_FC_SHORT_GI_40       0x00000080
+#define AR_PHY_FC_WALSH             0x00000100
+#define AR_PHY_FC_SINGLE_HT_LTF1    0x00000200
+
+#define AR_PHY_TIMING2           0x9810
+#define AR_PHY_TIMING3           0x9814
+#define AR_PHY_TIMING3_DSC_MAN   0xFFFE0000
+#define AR_PHY_TIMING3_DSC_MAN_S 17
+#define AR_PHY_TIMING3_DSC_EXP   0x0001E000
+#define AR_PHY_TIMING3_DSC_EXP_S 13
+
+#define AR_PHY_CHIP_ID            0x9818
+#define AR_PHY_CHIP_ID_REV_0      0x80
+#define AR_PHY_CHIP_ID_REV_1      0x81
+#define AR_PHY_CHIP_ID_9160_REV_0 0xb0
+
+#define AR_PHY_ACTIVE       0x981C
+#define AR_PHY_ACTIVE_EN    0x00000001
+#define AR_PHY_ACTIVE_DIS   0x00000000
+
+#define AR_PHY_RF_CTL2             0x9824
+#define AR_PHY_TX_END_DATA_START   0x000000FF
+#define AR_PHY_TX_END_DATA_START_S 0
+#define AR_PHY_TX_END_PA_ON        0x0000FF00
+#define AR_PHY_TX_END_PA_ON_S      8
+
+#define AR_PHY_RF_CTL3                  0x9828
+#define AR_PHY_TX_END_TO_A2_RX_ON       0x00FF0000
+#define AR_PHY_TX_END_TO_A2_RX_ON_S     16
+
+#define AR_PHY_ADC_CTL                  0x982C
+#define AR_PHY_ADC_CTL_OFF_INBUFGAIN    0x00000003
+#define AR_PHY_ADC_CTL_OFF_INBUFGAIN_S  0
+#define AR_PHY_ADC_CTL_OFF_PWDDAC       0x00002000
+#define AR_PHY_ADC_CTL_OFF_PWDBANDGAP   0x00004000
+#define AR_PHY_ADC_CTL_OFF_PWDADC       0x00008000
+#define AR_PHY_ADC_CTL_ON_INBUFGAIN     0x00030000
+#define AR_PHY_ADC_CTL_ON_INBUFGAIN_S   16
+
+#define AR_PHY_ADC_SERIAL_CTL       0x9830
+#define AR_PHY_SEL_INTERNAL_ADDAC   0x00000000
+#define AR_PHY_SEL_EXTERNAL_RADIO   0x00000001
+
+#define AR_PHY_RF_CTL4                    0x9834
+#define AR_PHY_RF_CTL4_TX_END_XPAB_OFF    0xFF000000
+#define AR_PHY_RF_CTL4_TX_END_XPAB_OFF_S  24
+#define AR_PHY_RF_CTL4_TX_END_XPAA_OFF    0x00FF0000
+#define AR_PHY_RF_CTL4_TX_END_XPAA_OFF_S  16
+#define AR_PHY_RF_CTL4_FRAME_XPAB_ON      0x0000FF00
+#define AR_PHY_RF_CTL4_FRAME_XPAB_ON_S    8
+#define AR_PHY_RF_CTL4_FRAME_XPAA_ON      0x000000FF
+#define AR_PHY_RF_CTL4_FRAME_XPAA_ON_S    0
+
+#define AR_PHY_SETTLING          0x9844
+#define AR_PHY_SETTLING_SWITCH   0x00003F80
+#define AR_PHY_SETTLING_SWITCH_S 7
+
+#define AR_PHY_RXGAIN                   0x9848
+#define AR_PHY_RXGAIN_TXRX_ATTEN        0x0003F000
+#define AR_PHY_RXGAIN_TXRX_ATTEN_S      12
+#define AR_PHY_RXGAIN_TXRX_RF_MAX       0x007C0000
+#define AR_PHY_RXGAIN_TXRX_RF_MAX_S     18
+#define AR9280_PHY_RXGAIN_TXRX_ATTEN    0x00003F80
+#define AR9280_PHY_RXGAIN_TXRX_ATTEN_S  7
+#define AR9280_PHY_RXGAIN_TXRX_MARGIN   0x001FC000
+#define AR9280_PHY_RXGAIN_TXRX_MARGIN_S 14
+
+#define AR_PHY_DESIRED_SZ           0x9850
+#define AR_PHY_DESIRED_SZ_ADC       0x000000FF
+#define AR_PHY_DESIRED_SZ_ADC_S     0
+#define AR_PHY_DESIRED_SZ_PGA       0x0000FF00
+#define AR_PHY_DESIRED_SZ_PGA_S     8
+#define AR_PHY_DESIRED_SZ_TOT_DES   0x0FF00000
+#define AR_PHY_DESIRED_SZ_TOT_DES_S 20
+
+#define AR_PHY_FIND_SIG           0x9858
+#define AR_PHY_FIND_SIG_FIRSTEP   0x0003F000
+#define AR_PHY_FIND_SIG_FIRSTEP_S 12
+#define AR_PHY_FIND_SIG_FIRPWR    0x03FC0000
+#define AR_PHY_FIND_SIG_FIRPWR_S  18
+
+#define AR_PHY_AGC_CTL1                  0x985C
+#define AR_PHY_AGC_CTL1_COARSE_LOW       0x00007F80
+#define AR_PHY_AGC_CTL1_COARSE_LOW_S     7
+#define AR_PHY_AGC_CTL1_COARSE_HIGH      0x003F8000
+#define AR_PHY_AGC_CTL1_COARSE_HIGH_S    15
+
+#define AR_PHY_AGC_CONTROL               0x9860
+#define AR_PHY_AGC_CONTROL_CAL           0x00000001
+#define AR_PHY_AGC_CONTROL_NF            0x00000002
+#define AR_PHY_AGC_CONTROL_ENABLE_NF     0x00008000
+#define AR_PHY_AGC_CONTROL_FLTR_CAL      0x00010000
+#define AR_PHY_AGC_CONTROL_NO_UPDATE_NF  0x00020000
+
+#define AR_PHY_CCA                  0x9864
+#define AR_PHY_MINCCA_PWR           0x0FF80000
+#define AR_PHY_MINCCA_PWR_S         19
+#define AR_PHY_CCA_THRESH62         0x0007F000
+#define AR_PHY_CCA_THRESH62_S       12
+#define AR9280_PHY_MINCCA_PWR       0x1FF00000
+#define AR9280_PHY_MINCCA_PWR_S     20
+#define AR9280_PHY_CCA_THRESH62     0x000FF000
+#define AR9280_PHY_CCA_THRESH62_S   12
+
+#define AR_PHY_SFCORR_LOW                    0x986C
+#define AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW  0x00000001
+#define AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW    0x00003F00
+#define AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW_S  8
+#define AR_PHY_SFCORR_LOW_M1_THRESH_LOW      0x001FC000
+#define AR_PHY_SFCORR_LOW_M1_THRESH_LOW_S    14
+#define AR_PHY_SFCORR_LOW_M2_THRESH_LOW      0x0FE00000
+#define AR_PHY_SFCORR_LOW_M2_THRESH_LOW_S    21
+
+#define AR_PHY_SFCORR                0x9868
+#define AR_PHY_SFCORR_M2COUNT_THR    0x0000001F
+#define AR_PHY_SFCORR_M2COUNT_THR_S  0
+#define AR_PHY_SFCORR_M1_THRESH      0x00FE0000
+#define AR_PHY_SFCORR_M1_THRESH_S    17
+#define AR_PHY_SFCORR_M2_THRESH      0x7F000000
+#define AR_PHY_SFCORR_M2_THRESH_S    24
+
+#define AR_PHY_SLEEP_CTR_CONTROL    0x9870
+#define AR_PHY_SLEEP_CTR_LIMIT      0x9874
+#define AR_PHY_SYNTH_CONTROL        0x9874
+#define AR_PHY_SLEEP_SCAL           0x9878
+
+#define AR_PHY_PLL_CTL          0x987c
+#define AR_PHY_PLL_CTL_40       0xaa
+#define AR_PHY_PLL_CTL_40_5413  0x04
+#define AR_PHY_PLL_CTL_44       0xab
+#define AR_PHY_PLL_CTL_44_2133  0xeb
+#define AR_PHY_PLL_CTL_40_2133  0xea
+
+#define AR_PHY_RX_DELAY           0x9914
+#define AR_PHY_SEARCH_START_DELAY 0x9918
+#define AR_PHY_RX_DELAY_DELAY     0x00003FFF
+
+#define AR_PHY_TIMING_CTRL4(_i)     (0x9920 + ((_i) << 12))
+#define AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF 0x01F
+#define AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF_S   0
+#define AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF 0x7E0
+#define AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF_S   5
+#define AR_PHY_TIMING_CTRL4_IQCORR_ENABLE   0x800
+#define AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX 0xF000
+#define AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX_S   12
+#define AR_PHY_TIMING_CTRL4_DO_CAL    0x10000
+
+#define AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI    0x80000000
+#define AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER  0x40000000
+#define AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK    0x20000000
+#define AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK   0x10000000
+
+#define AR_PHY_TIMING5               0x9924
+#define AR_PHY_TIMING5_CYCPWR_THR1   0x000000FE
+#define AR_PHY_TIMING5_CYCPWR_THR1_S 1
+
+#define AR_PHY_POWER_TX_RATE1               0x9934
+#define AR_PHY_POWER_TX_RATE2               0x9938
+#define AR_PHY_POWER_TX_RATE_MAX            0x993c
+#define AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE 0x00000040
+
+#define AR_PHY_FRAME_CTL            0x9944
+#define AR_PHY_FRAME_CTL_TX_CLIP    0x00000038
+#define AR_PHY_FRAME_CTL_TX_CLIP_S  3
+
+#define AR_PHY_TXPWRADJ                   0x994C
+#define AR_PHY_TXPWRADJ_CCK_GAIN_DELTA    0x00000FC0
+#define AR_PHY_TXPWRADJ_CCK_GAIN_DELTA_S  6
+#define AR_PHY_TXPWRADJ_CCK_PCDAC_INDEX   0x00FC0000
+#define AR_PHY_TXPWRADJ_CCK_PCDAC_INDEX_S 18
+
+#define AR_PHY_RADAR_EXT      0x9940
+#define AR_PHY_RADAR_EXT_ENA  0x00004000
+
+#define AR_PHY_RADAR_0          0x9954
+#define AR_PHY_RADAR_0_ENA      0x00000001
+#define AR_PHY_RADAR_0_FFT_ENA  0x80000000
+#define AR_PHY_RADAR_0_INBAND   0x0000003e
+#define AR_PHY_RADAR_0_INBAND_S 1
+#define AR_PHY_RADAR_0_PRSSI    0x00000FC0
+#define AR_PHY_RADAR_0_PRSSI_S  6
+#define AR_PHY_RADAR_0_HEIGHT   0x0003F000
+#define AR_PHY_RADAR_0_HEIGHT_S 12
+#define AR_PHY_RADAR_0_RRSSI    0x00FC0000
+#define AR_PHY_RADAR_0_RRSSI_S  18
+#define AR_PHY_RADAR_0_FIRPWR   0x7F000000
+#define AR_PHY_RADAR_0_FIRPWR_S 24
+
+#define AR_PHY_RADAR_1                  0x9958
+#define AR_PHY_RADAR_1_RELPWR_ENA       0x00800000
+#define AR_PHY_RADAR_1_USE_FIR128       0x00400000
+#define AR_PHY_RADAR_1_RELPWR_THRESH    0x003F0000
+#define AR_PHY_RADAR_1_RELPWR_THRESH_S  16
+#define AR_PHY_RADAR_1_BLOCK_CHECK      0x00008000
+#define AR_PHY_RADAR_1_MAX_RRSSI        0x00004000
+#define AR_PHY_RADAR_1_RELSTEP_CHECK    0x00002000
+#define AR_PHY_RADAR_1_RELSTEP_THRESH   0x00001F00
+#define AR_PHY_RADAR_1_RELSTEP_THRESH_S 8
+#define AR_PHY_RADAR_1_MAXLEN           0x000000FF
+#define AR_PHY_RADAR_1_MAXLEN_S         0
+
+#define AR_PHY_SWITCH_CHAIN_0     0x9960
+#define AR_PHY_SWITCH_COM         0x9964
+
+#define AR_PHY_SIGMA_DELTA            0x996C
+#define AR_PHY_SIGMA_DELTA_ADC_SEL    0x00000003
+#define AR_PHY_SIGMA_DELTA_ADC_SEL_S  0
+#define AR_PHY_SIGMA_DELTA_FILT2      0x000000F8
+#define AR_PHY_SIGMA_DELTA_FILT2_S    3
+#define AR_PHY_SIGMA_DELTA_FILT1      0x00001F00
+#define AR_PHY_SIGMA_DELTA_FILT1_S    8
+#define AR_PHY_SIGMA_DELTA_ADC_CLIP   0x01FFE000
+#define AR_PHY_SIGMA_DELTA_ADC_CLIP_S 13
+
+#define AR_PHY_RESTART          0x9970
+#define AR_PHY_RESTART_DIV_GC   0x001C0000
+#define AR_PHY_RESTART_DIV_GC_S 18
+
+#define AR_PHY_RFBUS_REQ        0x997C
+#define AR_PHY_RFBUS_REQ_EN     0x00000001
+
+#define AR_PHY_TIMING7                  0x9980
+#define AR_PHY_TIMING8                  0x9984
+#define AR_PHY_TIMING8_PILOT_MASK_2     0x000FFFFF
+#define AR_PHY_TIMING8_PILOT_MASK_2_S   0
+
+#define AR_PHY_BIN_MASK2_1      0x9988
+#define AR_PHY_BIN_MASK2_2      0x998c
+#define AR_PHY_BIN_MASK2_3      0x9990
+#define AR_PHY_BIN_MASK2_4      0x9994
+
+#define AR_PHY_BIN_MASK_1       0x9900
+#define AR_PHY_BIN_MASK_2       0x9904
+#define AR_PHY_BIN_MASK_3       0x9908
+
+#define AR_PHY_MASK_CTL         0x990c
+
+#define AR_PHY_BIN_MASK2_4_MASK_4       0x00003FFF
+#define AR_PHY_BIN_MASK2_4_MASK_4_S     0
+
+#define AR_PHY_TIMING9                  0x9998
+#define AR_PHY_TIMING10                 0x999c
+#define AR_PHY_TIMING10_PILOT_MASK_2    0x000FFFFF
+#define AR_PHY_TIMING10_PILOT_MASK_2_S  0
+
+#define AR_PHY_TIMING11                         0x99a0
+#define AR_PHY_TIMING11_SPUR_DELTA_PHASE        0x000FFFFF
+#define AR_PHY_TIMING11_SPUR_DELTA_PHASE_S      0
+#define AR_PHY_TIMING11_SPUR_FREQ_SD            0x3FF00000
+#define AR_PHY_TIMING11_SPUR_FREQ_SD_S          20
+#define AR_PHY_TIMING11_USE_SPUR_IN_AGC         0x40000000
+#define AR_PHY_TIMING11_USE_SPUR_IN_SELFCOR     0x80000000
+
+#define AR_PHY_RX_CHAINMASK     0x99a4
+#define AR_PHY_NEW_ADC_DC_GAIN_CORR(_i) (0x99b4 + ((_i) << 12))
+#define AR_PHY_NEW_ADC_GAIN_CORR_ENABLE 0x40000000
+#define AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE 0x80000000
+#define AR_PHY_MULTICHAIN_GAIN_CTL  0x99ac
+
+#define AR_PHY_EXT_CCA0             0x99b8
+#define AR_PHY_EXT_CCA0_THRESH62    0x000000FF
+#define AR_PHY_EXT_CCA0_THRESH62_S  0
+
+#define AR_PHY_EXT_CCA                  0x99bc
+#define AR_PHY_EXT_CCA_CYCPWR_THR1      0x0000FE00
+#define AR_PHY_EXT_CCA_CYCPWR_THR1_S    9
+#define AR_PHY_EXT_CCA_THRESH62         0x007F0000
+#define AR_PHY_EXT_CCA_THRESH62_S       16
+#define AR_PHY_EXT_MINCCA_PWR           0xFF800000
+#define AR_PHY_EXT_MINCCA_PWR_S         23
+#define AR9280_PHY_EXT_MINCCA_PWR       0x01FF0000
+#define AR9280_PHY_EXT_MINCCA_PWR_S     16
+
+#define AR_PHY_SFCORR_EXT                 0x99c0
+#define AR_PHY_SFCORR_EXT_M1_THRESH       0x0000007F
+#define AR_PHY_SFCORR_EXT_M1_THRESH_S     0
+#define AR_PHY_SFCORR_EXT_M2_THRESH       0x00003F80
+#define AR_PHY_SFCORR_EXT_M2_THRESH_S     7
+#define AR_PHY_SFCORR_EXT_M1_THRESH_LOW   0x001FC000
+#define AR_PHY_SFCORR_EXT_M1_THRESH_LOW_S 14
+#define AR_PHY_SFCORR_EXT_M2_THRESH_LOW   0x0FE00000
+#define AR_PHY_SFCORR_EXT_M2_THRESH_LOW_S 21
+#define AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S   28
+
+#define AR_PHY_HALFGI           0x99D0
+#define AR_PHY_HALFGI_DSC_MAN   0x0007FFF0
+#define AR_PHY_HALFGI_DSC_MAN_S 4
+#define AR_PHY_HALFGI_DSC_EXP   0x0000000F
+#define AR_PHY_HALFGI_DSC_EXP_S 0
+
+#define AR_PHY_CHAN_INFO_MEMORY               0x99DC
+#define AR_PHY_CHAN_INFO_MEMORY_CAPTURE_MASK  0x0001
+
+#define AR_PHY_HEAVY_CLIP_ENABLE         0x99E0
+
+#define AR_PHY_M_SLEEP      0x99f0
+#define AR_PHY_REFCLKDLY    0x99f4
+#define AR_PHY_REFCLKPD     0x99f8
+
+#define AR_PHY_CALMODE      0x99f0
+
+#define AR_PHY_CALMODE_IQ           0x00000000
+#define AR_PHY_CALMODE_ADC_GAIN     0x00000001
+#define AR_PHY_CALMODE_ADC_DC_PER   0x00000002
+#define AR_PHY_CALMODE_ADC_DC_INIT  0x00000003
+
+#define AR_PHY_CAL_MEAS_0(_i)     (0x9c10 + ((_i) << 12))
+#define AR_PHY_CAL_MEAS_1(_i)     (0x9c14 + ((_i) << 12))
+#define AR_PHY_CAL_MEAS_2(_i)     (0x9c18 + ((_i) << 12))
+#define AR_PHY_CAL_MEAS_3(_i)     (0x9c1c + ((_i) << 12))
+
+#define AR_PHY_CURRENT_RSSI 0x9c1c
+#define AR9280_PHY_CURRENT_RSSI 0x9c3c
+
+#define AR_PHY_RFBUS_GRANT       0x9C20
+#define AR_PHY_RFBUS_GRANT_EN    0x00000001
+
+#define AR_PHY_CHAN_INFO_GAIN_DIFF             0x9CF4
+#define AR_PHY_CHAN_INFO_GAIN_DIFF_UPPER_LIMIT 320
+
+#define AR_PHY_CHAN_INFO_GAIN          0x9CFC
+
+#define AR_PHY_MODE         0xA200
+#define AR_PHY_MODE_AR2133  0x08
+#define AR_PHY_MODE_AR5111  0x00
+#define AR_PHY_MODE_AR5112  0x08
+#define AR_PHY_MODE_DYNAMIC 0x04
+#define AR_PHY_MODE_RF2GHZ  0x02
+#define AR_PHY_MODE_RF5GHZ  0x00
+#define AR_PHY_MODE_CCK     0x01
+#define AR_PHY_MODE_OFDM    0x00
+#define AR_PHY_MODE_DYN_CCK_DISABLE 0x100
+
+#define AR_PHY_CCK_TX_CTRL       0xA204
+#define AR_PHY_CCK_TX_CTRL_JAPAN 0x00000010
+
+#define AR_PHY_CCK_DETECT                           0xA208
+#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK          0x0000003F
+#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK_S        0
+/* [12:6] settling time for antenna switch */
+#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME           0x00001FC0
+#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME_S         6
+#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV    0x2000
+
+#define AR_PHY_GAIN_2GHZ                0xA20C
+#define AR_PHY_GAIN_2GHZ_RXTX_MARGIN    0x00FC0000
+#define AR_PHY_GAIN_2GHZ_RXTX_MARGIN_S  18
+#define AR_PHY_GAIN_2GHZ_BSW_MARGIN     0x00003C00
+#define AR_PHY_GAIN_2GHZ_BSW_MARGIN_S   10
+#define AR_PHY_GAIN_2GHZ_BSW_ATTEN      0x0000001F
+#define AR_PHY_GAIN_2GHZ_BSW_ATTEN_S    0
+
+#define AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN     0x003E0000
+#define AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN_S   17
+#define AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN     0x0001F000
+#define AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN_S   12
+#define AR_PHY_GAIN_2GHZ_XATTEN2_DB         0x00000FC0
+#define AR_PHY_GAIN_2GHZ_XATTEN2_DB_S       6
+#define AR_PHY_GAIN_2GHZ_XATTEN1_DB         0x0000003F
+#define AR_PHY_GAIN_2GHZ_XATTEN1_DB_S       0
+
+#define AR_PHY_CCK_RXCTRL4  0xA21C
+#define AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT   0x01F80000
+#define AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT_S 19
+
+#define AR_PHY_DAG_CTRLCCK  0xA228
+#define AR_PHY_DAG_CTRLCCK_EN_RSSI_THR  0x00000200
+#define AR_PHY_DAG_CTRLCCK_RSSI_THR     0x0001FC00
+#define AR_PHY_DAG_CTRLCCK_RSSI_THR_S   10
+
+#define AR_PHY_FORCE_CLKEN_CCK              0xA22C
+#define AR_PHY_FORCE_CLKEN_CCK_MRC_MUX      0x00000040
+
+#define AR_PHY_POWER_TX_RATE3   0xA234
+#define AR_PHY_POWER_TX_RATE4   0xA238
+
+#define AR_PHY_SCRM_SEQ_XR       0xA23C
+#define AR_PHY_HEADER_DETECT_XR  0xA240
+#define AR_PHY_CHIRP_DETECTED_XR 0xA244
+#define AR_PHY_BLUETOOTH         0xA254
+
+#define AR_PHY_TPCRG1   0xA258
+#define AR_PHY_TPCRG1_NUM_PD_GAIN   0x0000c000
+#define AR_PHY_TPCRG1_NUM_PD_GAIN_S 14
+
+#define AR_PHY_TPCRG1_PD_GAIN_1    0x00030000
+#define AR_PHY_TPCRG1_PD_GAIN_1_S  16
+#define AR_PHY_TPCRG1_PD_GAIN_2    0x000C0000
+#define AR_PHY_TPCRG1_PD_GAIN_2_S  18
+#define AR_PHY_TPCRG1_PD_GAIN_3    0x00300000
+#define AR_PHY_TPCRG1_PD_GAIN_3_S  20
+
+#define AR_PHY_VIT_MASK2_M_46_61 0xa3a0
+#define AR_PHY_MASK2_M_31_45     0xa3a4
+#define AR_PHY_MASK2_M_16_30     0xa3a8
+#define AR_PHY_MASK2_M_00_15     0xa3ac
+#define AR_PHY_MASK2_P_15_01     0xa3b8
+#define AR_PHY_MASK2_P_30_16     0xa3bc
+#define AR_PHY_MASK2_P_45_31     0xa3c0
+#define AR_PHY_MASK2_P_61_45     0xa3c4
+#define AR_PHY_SPUR_REG          0x994c
+
+#define AR_PHY_SPUR_REG_MASK_RATE_CNTL       (0xFF << 18)
+#define AR_PHY_SPUR_REG_MASK_RATE_CNTL_S     18
+
+#define AR_PHY_SPUR_REG_ENABLE_MASK_PPM      0x20000
+#define AR_PHY_SPUR_REG_MASK_RATE_SELECT     (0xFF << 9)
+#define AR_PHY_SPUR_REG_MASK_RATE_SELECT_S   9
+#define AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI 0x100
+#define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH     0x7F
+#define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH_S   0
+
+#define AR_PHY_PILOT_MASK_01_30   0xa3b0
+#define AR_PHY_PILOT_MASK_31_60   0xa3b4
+
+#define AR_PHY_CHANNEL_MASK_01_30 0x99d4
+#define AR_PHY_CHANNEL_MASK_31_60 0x99d8
+
+#define AR_PHY_ANALOG_SWAP      0xa268
+#define AR_PHY_SWAP_ALT_CHAIN   0x00000040
+
+#define AR_PHY_TPCRG5   0xA26C
+#define AR_PHY_TPCRG5_PD_GAIN_OVERLAP       0x0000000F
+#define AR_PHY_TPCRG5_PD_GAIN_OVERLAP_S     0
+#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1    0x000003F0
+#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1_S  4
+#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2    0x0000FC00
+#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2_S  10
+#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3    0x003F0000
+#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3_S  16
+#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4    0x0FC00000
+#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4_S  22
+
+#define AR_PHY_POWER_TX_RATE5   0xA38C
+#define AR_PHY_POWER_TX_RATE6   0xA390
+
+#define AR_PHY_CAL_CHAINMASK    0xA39C
+
+#define AR_PHY_POWER_TX_SUB     0xA3C8
+#define AR_PHY_POWER_TX_RATE7   0xA3CC
+#define AR_PHY_POWER_TX_RATE8   0xA3D0
+#define AR_PHY_POWER_TX_RATE9   0xA3D4
+
+#define AR_PHY_XPA_CFG          0xA3D8
+#define AR_PHY_FORCE_XPA_CFG    0x000000001
+#define AR_PHY_FORCE_XPA_CFG_S  0
+
+#define AR_PHY_CH1_CCA          0xa864
+#define AR_PHY_CH1_MINCCA_PWR   0x0FF80000
+#define AR_PHY_CH1_MINCCA_PWR_S 19
+#define AR9280_PHY_CH1_MINCCA_PWR   0x1FF00000
+#define AR9280_PHY_CH1_MINCCA_PWR_S 20
+
+#define AR_PHY_CH2_CCA          0xb864
+#define AR_PHY_CH2_MINCCA_PWR   0x0FF80000
+#define AR_PHY_CH2_MINCCA_PWR_S 19
+
+#define AR_PHY_CH1_EXT_CCA          0xa9bc
+#define AR_PHY_CH1_EXT_MINCCA_PWR   0xFF800000
+#define AR_PHY_CH1_EXT_MINCCA_PWR_S 23
+#define AR9280_PHY_CH1_EXT_MINCCA_PWR   0x01FF0000
+#define AR9280_PHY_CH1_EXT_MINCCA_PWR_S 16
+
+#define AR_PHY_CH2_EXT_CCA          0xb9bc
+#define AR_PHY_CH2_EXT_MINCCA_PWR   0xFF800000
+#define AR_PHY_CH2_EXT_MINCCA_PWR_S 23
+
+#define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) do {               \
+                int r;                                                  \
+                for (r = 0; r < ((iniarray)->ia_rows); r++) {           \
+                        REG_WRITE(ah, INI_RA((iniarray), r, 0), (regData)[r]); \
+                        DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, \
+                                "RF 0x%x V 0x%x\n", \
+                                INI_RA((iniarray), r, 0), (regData)[r]); \
+                        DO_DELAY(regWr);                                \
+                }                                                       \
+        } while (0)
+
+#define ATH9K_KEY_XOR                 0xaa
+
+#define ATH9K_IS_MIC_ENABLED(ah)                                        \
+        (AH5416(ah)->ah_staId1Defaults & AR_STA_ID1_CRPT_MIC_ENABLE)
+
+#define ANTSWAP_AB 0x0001
+#define REDUCE_CHAIN_0 0x00000050
+#define REDUCE_CHAIN_1 0x00000051
+
+#define RF_BANK_SETUP(_bank, _iniarray, _col) do {                      \
+                int i;                                                  \
+                for (i = 0; i < (_iniarray)->ia_rows; i++)              \
+                        (_bank)[i] = INI_RA((_iniarray), i, _col);;     \
+        } while (0)
+
+#endif
diff --git a/drivers/net/wireless/ath9k/rc.c b/drivers/net/wireless/ath9k/rc.c
new file mode 100644
index 000000000000..73c460ad355f
--- /dev/null
+++ b/drivers/net/wireless/ath9k/rc.c
@@ -0,0 +1,2126 @@
+/*
+ * Copyright (c) 2004 Video54 Technologies, Inc.
+ * Copyright (c) 2004-2008 Atheros Communications, Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Atheros rate control algorithm
+ */
+
+#include "core.h"
+#include "../net/mac80211/rate.h"
+
+static u32 tx_triglevel_max;
+
+static struct ath_rate_table ar5416_11na_ratetable = {
+        42,
+        {
+                { TRUE, TRUE, WLAN_PHY_OFDM, 6000, /* 6 Mb */
+                        5400, 0x0b, 0x00, 12,
+                        0, 2, 1, 0, 0, 0, 0, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 9000, /* 9 Mb */
+                        7800,  0x0f, 0x00, 18,
+                        0, 3, 1, 1, 1, 1, 1, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 12000, /* 12 Mb */
+                        10000, 0x0a, 0x00, 24,
+                        2, 4, 2, 2, 2, 2, 2, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 18000, /* 18 Mb */
+                        13900, 0x0e, 0x00, 36,
+                        2, 6,  2, 3, 3, 3, 3, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 24000, /* 24 Mb */
+                        17300, 0x09, 0x00, 48,
+                        4, 10, 3, 4, 4, 4, 4, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 36000, /* 36 Mb */
+                        23000, 0x0d, 0x00, 72,
+                        4, 14, 3, 5, 5, 5, 5, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 48000, /* 48 Mb */
+                        27400, 0x08, 0x00, 96,
+                        4, 20, 3, 6, 6, 6, 6, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 54000, /* 54 Mb */
+                        29300, 0x0c, 0x00, 108,
+                        4, 23, 3, 7, 7, 7, 7, 0 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 6500, /* 6.5 Mb */
+                        6400, 0x80, 0x00, 0,
+                        0, 2, 3, 8, 24, 8, 24, 3216 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 13000, /* 13 Mb */
+                        12700, 0x81, 0x00, 1,
+                        2, 4, 3, 9, 25, 9, 25, 6434 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 19500, /* 19.5 Mb */
+                        18800, 0x82, 0x00, 2,
+                        2, 6, 3, 10, 26, 10, 26, 9650 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 26000, /* 26 Mb */
+                        25000, 0x83, 0x00, 3,
+                        4, 10, 3, 11, 27, 11, 27, 12868 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 39000, /* 39 Mb */
+                        36700, 0x84, 0x00, 4,
+                        4, 14, 3, 12, 28, 12, 28, 19304 },
+                { FALSE, TRUE_20, WLAN_PHY_HT_20_SS, 52000, /* 52 Mb */
+                        48100, 0x85, 0x00, 5,
+                        4, 20, 3, 13, 29, 13, 29, 25740 },
+                { FALSE, TRUE_20, WLAN_PHY_HT_20_SS, 58500, /* 58.5 Mb */
+                        53500, 0x86, 0x00, 6,
+                        4, 23, 3, 14, 30, 14, 30,  28956 },
+                { FALSE, TRUE_20, WLAN_PHY_HT_20_SS, 65000, /* 65 Mb */
+                        59000, 0x87, 0x00, 7,
+                        4, 25, 3, 15, 31, 15, 32, 32180 },
+                { FALSE, FALSE, WLAN_PHY_HT_20_DS, 13000, /* 13 Mb */
+                        12700, 0x88, 0x00,
+                        8, 0, 2, 3, 16, 33, 16, 33, 6430 },
+                { FALSE, FALSE, WLAN_PHY_HT_20_DS, 26000, /* 26 Mb */
+                        24800, 0x89, 0x00, 9,
+                        2, 4, 3, 17, 34, 17, 34, 12860 },
+                { FALSE, FALSE, WLAN_PHY_HT_20_DS, 39000, /* 39 Mb */
+                        36600, 0x8a, 0x00, 10,
+                        2, 6, 3, 18, 35, 18, 35, 19300 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 52000, /* 52 Mb */
+                        48100, 0x8b, 0x00, 11,
+                        4, 10, 3, 19, 36, 19, 36, 25736 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 78000, /* 78 Mb */
+                        69500, 0x8c, 0x00, 12,
+                        4, 14, 3, 20, 37, 20, 37, 38600 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 104000, /* 104 Mb */
+                        89500, 0x8d, 0x00, 13,
+                        4, 20, 3, 21, 38, 21, 38, 51472 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 117000, /* 117 Mb */
+                        98900, 0x8e, 0x00, 14,
+                        4, 23, 3, 22, 39, 22, 39, 57890 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 130000, /* 130 Mb */
+                        108300, 0x8f, 0x00, 15,
+                        4, 25, 3, 23, 40, 23, 41, 64320 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 13500, /* 13.5 Mb */
+                        13200, 0x80, 0x00, 0,
+                        0, 2, 3, 8, 24, 24, 24, 6684 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 27500, /* 27.0 Mb */
+                        25900, 0x81, 0x00, 1,
+                        2, 4, 3, 9, 25, 25, 25, 13368 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 40500, /* 40.5 Mb */
+                        38600, 0x82, 0x00, 2,
+                        2, 6, 3, 10, 26, 26, 26, 20052 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 54000, /* 54 Mb */
+                        49800, 0x83, 0x00, 3,
+                        4, 10, 3, 11, 27, 27, 27, 26738 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 81500, /* 81 Mb */
+                        72200, 0x84, 0x00, 4,
+                        4, 14, 3, 12, 28, 28, 28, 40104 },
+                { FALSE, TRUE_40, WLAN_PHY_HT_40_SS, 108000, /* 108 Mb */
+                        92900, 0x85, 0x00, 5,
+                        4, 20, 3, 13, 29, 29, 29, 53476 },
+                { FALSE, TRUE_40, WLAN_PHY_HT_40_SS, 121500, /* 121.5 Mb */
+                        102700, 0x86, 0x00, 6,
+                        4, 23, 3, 14, 30, 30, 30, 60156 },
+                { FALSE, TRUE_40, WLAN_PHY_HT_40_SS, 135000, /* 135 Mb */
+                        112000, 0x87, 0x00, 7,
+                        4, 25, 3, 15, 31, 32, 32, 66840 },
+                { FALSE, TRUE_40, WLAN_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */
+                        122000, 0x87, 0x00, 7,
+                        4, 25, 3, 15, 31, 32, 32, 74200 },
+                { FALSE, FALSE, WLAN_PHY_HT_40_DS, 27000, /* 27 Mb */
+                        25800, 0x88, 0x00, 8,
+                        0, 2, 3, 16, 33, 33, 33, 13360 },
+                { FALSE, FALSE, WLAN_PHY_HT_40_DS, 54000, /* 54 Mb */
+                        49800, 0x89, 0x00, 9,
+                        2, 4, 3, 17, 34, 34, 34, 26720 },
+                { FALSE, FALSE, WLAN_PHY_HT_40_DS, 81000, /* 81 Mb */
+                        71900, 0x8a, 0x00, 10,
+                        2, 6, 3, 18, 35, 35, 35, 40080 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 108000, /* 108 Mb */
+                        92500, 0x8b, 0x00, 11,
+                        4, 10, 3, 19, 36, 36, 36, 53440 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 162000, /* 162 Mb */
+                        130300, 0x8c, 0x00, 12,
+                        4, 14, 3, 20, 37, 37, 37, 80160 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 216000, /* 216 Mb */
+                        162800, 0x8d, 0x00, 13,
+                        4, 20, 3, 21, 38, 38, 38, 106880 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 243000, /* 243 Mb */
+                        178200, 0x8e, 0x00, 14,
+                        4, 23, 3, 22, 39, 39, 39, 120240 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 270000, /* 270 Mb */
+                        192100, 0x8f, 0x00, 15,
+                        4, 25, 3, 23, 40, 41, 41, 133600 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */
+                        207000, 0x8f, 0x00, 15,
+                        4, 25, 3, 23, 40, 41, 41, 148400 },
+        },
+        50,  /* probe interval */
+        50,  /* rssi reduce interval */
+        WLAN_RC_HT_FLAG,  /* Phy rates allowed initially */
+};
+
+/* TRUE_ALL - valid for 20/40/Legacy,
+ * TRUE - Legacy only,
+ * TRUE_20 - HT 20 only,
+ * TRUE_40 - HT 40 only */
+
+/* 4ms frame limit not used for NG mode.  The values filled
+ * for HT are the 64K max aggregate limit */
+
+static struct ath_rate_table ar5416_11ng_ratetable = {
+        46,
+        {
+                { TRUE_ALL, TRUE_ALL, WLAN_PHY_CCK, 1000, /* 1 Mb */
+                        900, 0x1b, 0x00, 2,
+                        0, 0, 1, 0, 0, 0, 0, 0 },
+                { TRUE_ALL, TRUE_ALL, WLAN_PHY_CCK, 2000, /* 2 Mb */
+                        1900, 0x1a, 0x04, 4,
+                        1, 1, 1, 1, 1, 1, 1, 0 },
+                { TRUE_ALL, TRUE_ALL, WLAN_PHY_CCK, 5500, /* 5.5 Mb */
+                        4900, 0x19, 0x04, 11,
+                        2, 2, 2, 2, 2, 2, 2, 0 },
+                { TRUE_ALL, TRUE_ALL, WLAN_PHY_CCK, 11000, /* 11 Mb */
+                        8100, 0x18, 0x04, 22,
+                        3, 3, 2, 3, 3, 3, 3, 0 },
+                { FALSE, FALSE, WLAN_PHY_OFDM, 6000, /* 6 Mb */
+                        5400, 0x0b, 0x00, 12,
+                        4, 2, 1, 4, 4, 4, 4, 0 },
+                { FALSE, FALSE, WLAN_PHY_OFDM, 9000, /* 9 Mb */
+                        7800, 0x0f, 0x00, 18,
+                        4, 3, 1, 5, 5, 5, 5, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 12000, /* 12 Mb */
+                        10100, 0x0a, 0x00, 24,
+                        6, 4, 1, 6, 6, 6, 6, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 18000, /* 18 Mb */
+                        14100,  0x0e, 0x00, 36,
+                        6, 6, 2, 7, 7, 7, 7, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 24000, /* 24 Mb */
+                        17700, 0x09, 0x00, 48,
+                        8, 10, 3, 8, 8, 8, 8, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 36000, /* 36 Mb */
+                        23700, 0x0d, 0x00, 72,
+                        8, 14, 3, 9, 9, 9, 9, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 48000, /* 48 Mb */
+                        27400, 0x08, 0x00, 96,
+                        8, 20, 3, 10, 10, 10, 10, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 54000, /* 54 Mb */
+                        30900, 0x0c, 0x00, 108,
+                        8, 23, 3, 11, 11, 11, 11, 0 },
+                { FALSE, FALSE, WLAN_PHY_HT_20_SS, 6500, /* 6.5 Mb */
+                        6400, 0x80, 0x00, 0,
+                        4, 2, 3, 12, 28, 12, 28, 3216 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 13000, /* 13 Mb */
+                        12700, 0x81, 0x00, 1,
+                        6, 4, 3, 13, 29, 13, 29, 6434 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 19500, /* 19.5 Mb */
+                        18800, 0x82, 0x00, 2,
+                        6, 6, 3, 14, 30, 14, 30, 9650 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 26000, /* 26 Mb */
+                        25000, 0x83, 0x00, 3,
+                        8, 10, 3, 15, 31, 15, 31, 12868 },
+                { TRUE_20, TRUE_20, WLAN_PHY_HT_20_SS, 39000, /* 39 Mb */
+                        36700, 0x84, 0x00, 4,
+                        8, 14, 3, 16, 32, 16, 32, 19304 },
+                { FALSE, TRUE_20, WLAN_PHY_HT_20_SS, 52000, /* 52 Mb */
+                        48100, 0x85, 0x00, 5,
+                        8, 20, 3, 17, 33, 17, 33, 25740 },
+                { FALSE,  TRUE_20, WLAN_PHY_HT_20_SS, 58500, /* 58.5 Mb */
+                        53500, 0x86, 0x00, 6,
+                        8, 23, 3, 18, 34, 18, 34, 28956 },
+                { FALSE, TRUE_20, WLAN_PHY_HT_20_SS, 65000, /* 65 Mb */
+                        59000, 0x87, 0x00, 7,
+                        8, 25, 3, 19, 35, 19, 36, 32180 },
+                { FALSE, FALSE, WLAN_PHY_HT_20_DS, 13000, /* 13 Mb */
+                        12700, 0x88, 0x00, 8,
+                        4, 2, 3, 20, 37, 20, 37, 6430 },
+                { FALSE, FALSE, WLAN_PHY_HT_20_DS, 26000, /* 26 Mb */
+                        24800, 0x89, 0x00, 9,
+                        6, 4, 3, 21, 38, 21, 38, 12860 },
+                { FALSE, FALSE, WLAN_PHY_HT_20_DS, 39000, /* 39 Mb */
+                        36600, 0x8a, 0x00, 10,
+                        6, 6, 3, 22, 39, 22, 39, 19300 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 52000, /* 52 Mb */
+                        48100, 0x8b, 0x00, 11,
+                        8, 10, 3, 23, 40, 23, 40, 25736 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 78000, /* 78 Mb */
+                        69500, 0x8c, 0x00, 12,
+                        8, 14, 3, 24, 41, 24, 41, 38600 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 104000, /* 104 Mb */
+                        89500, 0x8d, 0x00, 13,
+                        8, 20, 3, 25, 42, 25, 42, 51472 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 117000, /* 117 Mb */
+                        98900, 0x8e, 0x00, 14,
+                        8, 23, 3, 26, 43, 26, 44, 57890 },
+                { TRUE_20, FALSE, WLAN_PHY_HT_20_DS, 130000, /* 130 Mb */
+                        108300, 0x8f, 0x00, 15,
+                        8, 25, 3, 27, 44, 27, 45, 64320 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 13500, /* 13.5 Mb */
+                        13200, 0x80, 0x00, 0,
+                        8, 2, 3, 12, 28, 28, 28, 6684 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 27500, /* 27.0 Mb */
+                        25900, 0x81, 0x00, 1,
+                        8, 4, 3, 13, 29, 29, 29, 13368 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 40500, /* 40.5 Mb */
+                        38600, 0x82, 0x00, 2,
+                        8, 6, 3, 14, 30, 30, 30, 20052 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 54000, /* 54 Mb */
+                        49800, 0x83, 0x00, 3,
+                        8, 10, 3, 15, 31, 31, 31, 26738 },
+                { TRUE_40, TRUE_40, WLAN_PHY_HT_40_SS, 81500, /* 81 Mb */
+                        72200, 0x84, 0x00, 4,
+                        8, 14, 3, 16, 32, 32, 32, 40104 },
+                { FALSE, TRUE_40, WLAN_PHY_HT_40_SS, 108000, /* 108 Mb */
+                        92900, 0x85, 0x00, 5,
+                        8, 20, 3, 17, 33, 33, 33, 53476 },
+                { FALSE,  TRUE_40, WLAN_PHY_HT_40_SS, 121500, /* 121.5 Mb */
+                        102700, 0x86, 0x00, 6,
+                        8, 23, 3, 18, 34, 34, 34, 60156 },
+                { FALSE, TRUE_40, WLAN_PHY_HT_40_SS, 135000, /* 135 Mb */
+                        112000, 0x87, 0x00, 7,
+                        8, 23, 3, 19, 35, 36, 36, 66840 },
+                { FALSE, TRUE_40, WLAN_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */
+                        122000, 0x87, 0x00, 7,
+                        8, 25, 3, 19, 35, 36, 36, 74200 },
+                { FALSE, FALSE, WLAN_PHY_HT_40_DS, 27000, /* 27 Mb */
+                        25800, 0x88, 0x00, 8,
+                        8, 2, 3, 20, 37, 37, 37, 13360 },
+                { FALSE, FALSE, WLAN_PHY_HT_40_DS, 54000, /* 54 Mb */
+                        49800, 0x89, 0x00, 9,
+                        8, 4, 3, 21, 38, 38, 38, 26720 },
+                { FALSE, FALSE, WLAN_PHY_HT_40_DS, 81000, /* 81 Mb */
+                        71900, 0x8a, 0x00, 10,
+                        8, 6, 3, 22, 39, 39, 39, 40080 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 108000, /* 108 Mb */
+                        92500, 0x8b, 0x00, 11,
+                        8, 10, 3, 23, 40, 40, 40, 53440 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 162000, /* 162 Mb */
+                        130300, 0x8c, 0x00, 12,
+                        8, 14, 3, 24, 41, 41, 41, 80160 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 216000, /* 216 Mb */
+                        162800, 0x8d, 0x00, 13,
+                        8, 20, 3, 25, 42, 42, 42, 106880 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 243000, /* 243 Mb */
+                        178200, 0x8e, 0x00, 14,
+                        8, 23, 3, 26, 43, 43, 43, 120240 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS, 270000, /* 270 Mb */
+                        192100, 0x8f, 0x00, 15,
+                        8, 23, 3, 27, 44, 45, 45, 133600 },
+                { TRUE_40, FALSE, WLAN_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */
+                        207000, 0x8f, 0x00, 15,
+                        8, 25, 3, 27, 44, 45, 45, 148400 },
+                },
+        50,  /* probe interval */
+        50,  /* rssi reduce interval */
+        WLAN_RC_HT_FLAG,  /* Phy rates allowed initially */
+};
+
+static struct ath_rate_table ar5416_11a_ratetable = {
+        8,
+        {
+                { TRUE, TRUE, WLAN_PHY_OFDM, 6000, /* 6 Mb */
+                        5400, 0x0b, 0x00, (0x80|12),
+                        0, 2, 1, 0, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 9000, /* 9 Mb */
+                        7800, 0x0f, 0x00, 18,
+                        0, 3, 1, 1, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 12000, /* 12 Mb */
+                        10000, 0x0a, 0x00, (0x80|24),
+                        2, 4, 2, 2, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 18000, /* 18 Mb */
+                        13900, 0x0e, 0x00, 36,
+                        2, 6, 2, 3, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 24000, /* 24 Mb */
+                        17300, 0x09, 0x00, (0x80|48),
+                        4, 10, 3, 4, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 36000, /* 36 Mb */
+                        23000, 0x0d, 0x00, 72,
+                        4, 14, 3, 5, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 48000, /* 48 Mb */
+                        27400, 0x08, 0x00, 96,
+                        4, 19, 3, 6, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 54000, /* 54 Mb */
+                        29300, 0x0c, 0x00, 108,
+                        4, 23, 3, 7, 0 },
+        },
+        50,  /* probe interval */
+        50,  /* rssi reduce interval */
+        0,   /* Phy rates allowed initially */
+};
+
+static struct ath_rate_table ar5416_11a_ratetable_Half = {
+        8,
+        {
+                { TRUE, TRUE, WLAN_PHY_OFDM, 3000, /* 6 Mb */
+                        2700, 0x0b, 0x00, (0x80|6),
+                        0, 2,  1, 0, 0},
+                { TRUE, TRUE,  WLAN_PHY_OFDM, 4500, /* 9 Mb */
+                        3900, 0x0f, 0x00, 9,
+                        0, 3, 1, 1, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 6000, /* 12 Mb */
+                        5000, 0x0a, 0x00, (0x80|12),
+                        2, 4, 2, 2, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 9000, /* 18 Mb */
+                        6950, 0x0e, 0x00, 18,
+                        2, 6, 2, 3, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 12000, /* 24 Mb */
+                        8650, 0x09, 0x00, (0x80|24),
+                        4, 10, 3, 4, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 18000, /* 36 Mb */
+                        11500, 0x0d, 0x00, 36,
+                        4, 14, 3, 5, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 24000, /* 48 Mb */
+                        13700, 0x08, 0x00, 48,
+                        4, 19, 3, 6, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 27000, /* 54 Mb */
+                        14650, 0x0c, 0x00, 54,
+                        4, 23, 3, 7, 0 },
+        },
+        50,  /* probe interval */
+        50,  /* rssi reduce interval */
+        0,   /* Phy rates allowed initially */
+};
+
+static struct ath_rate_table ar5416_11a_ratetable_Quarter = {
+        8,
+        {
+                { TRUE, TRUE, WLAN_PHY_OFDM, 1500, /* 6 Mb */
+                        1350, 0x0b, 0x00, (0x80|3),
+                        0, 2, 1, 0, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 2250, /* 9 Mb */
+                        1950, 0x0f, 0x00, 4,
+                        0, 3, 1, 1, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 3000, /* 12 Mb */
+                        2500, 0x0a, 0x00, (0x80|6),
+                        2, 4, 2, 2, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 4500, /* 18 Mb */
+                        3475, 0x0e, 0x00, 9,
+                        2, 6, 2, 3, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 6000, /* 25 Mb */
+                        4325, 0x09, 0x00, (0x80|12),
+                        4, 10, 3, 4, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 9000, /* 36 Mb */
+                        5750, 0x0d, 0x00, 18,
+                        4, 14, 3, 5, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 12000, /* 48 Mb */
+                        6850, 0x08, 0x00, 24,
+                        4, 19, 3, 6, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 13500, /* 54 Mb */
+                        7325, 0x0c, 0x00, 27,
+                        4, 23, 3, 7, 0 },
+        },
+        50,  /* probe interval */
+        50,  /* rssi reduce interval */
+        0,   /* Phy rates allowed initially */
+};
+
+static struct ath_rate_table ar5416_11g_ratetable = {
+        12,
+        {
+                { TRUE, TRUE, WLAN_PHY_CCK, 1000, /* 1 Mb */
+                        900, 0x1b, 0x00, 2,
+                        0, 0, 1, 0, 0 },
+                { TRUE, TRUE, WLAN_PHY_CCK, 2000, /* 2 Mb */
+                        1900, 0x1a, 0x04, 4,
+                        1, 1, 1, 1, 0 },
+                { TRUE, TRUE, WLAN_PHY_CCK, 5500, /* 5.5 Mb */
+                        4900, 0x19, 0x04, 11,
+                        2, 2, 2, 2, 0 },
+                { TRUE, TRUE, WLAN_PHY_CCK, 11000, /* 11 Mb */
+                        8100, 0x18, 0x04, 22,
+                        3, 3, 2, 3, 0 },
+                { FALSE, FALSE, WLAN_PHY_OFDM, 6000, /* 6 Mb */
+                        5400, 0x0b, 0x00, 12,
+                        4, 2, 1, 4, 0 },
+                { FALSE, FALSE, WLAN_PHY_OFDM, 9000, /* 9 Mb */
+                        7800, 0x0f, 0x00, 18,
+                        4, 3, 1, 5, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 12000, /* 12 Mb */
+                        10000, 0x0a, 0x00, 24,
+                        6, 4, 1, 6, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 18000, /* 18 Mb */
+                        13900, 0x0e, 0x00, 36,
+                        6, 6, 2, 7, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 24000, /* 24 Mb */
+                        17300, 0x09, 0x00, 48,
+                        8, 10, 3, 8, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 36000, /* 36 Mb */
+                        23000, 0x0d, 0x00, 72,
+                        8, 14, 3, 9, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 48000, /* 48 Mb */
+                        27400, 0x08, 0x00, 96,
+                        8, 19, 3, 10, 0 },
+                { TRUE, TRUE, WLAN_PHY_OFDM, 54000, /* 54 Mb */
+                        29300, 0x0c, 0x00, 108,
+                        8, 23, 3, 11, 0 },
+        },
+        50,  /* probe interval */
+        50,  /* rssi reduce interval */
+        0,   /* Phy rates allowed initially */
+};
+
+static struct ath_rate_table ar5416_11b_ratetable = {
+        4,
+        {
+                { TRUE, TRUE, WLAN_PHY_CCK, 1000, /* 1 Mb */
+                        900, 0x1b,  0x00, (0x80|2),
+                        0, 0, 1, 0, 0 },
+                { TRUE, TRUE, WLAN_PHY_CCK, 2000, /* 2 Mb */
+                        1800, 0x1a, 0x04, (0x80|4),
+                        1, 1, 1, 1, 0 },
+                { TRUE, TRUE, WLAN_PHY_CCK, 5500, /* 5.5 Mb */
+                        4300, 0x19, 0x04, (0x80|11),
+                        1, 2, 2, 2, 0 },
+                { TRUE, TRUE, WLAN_PHY_CCK, 11000, /* 11 Mb */
+                        7100, 0x18, 0x04, (0x80|22),
+                        1, 4, 100, 3, 0 },
+        },
+        100, /* probe interval */
+        100, /* rssi reduce interval */
+        0,   /* Phy rates allowed initially */
+};
+
+static void ar5416_attach_ratetables(struct ath_rate_softc *sc)
+{
+        /*
+         * Attach rate tables.
+         */
+        sc->hw_rate_table[ATH9K_MODE_11B] = &ar5416_11b_ratetable;
+        sc->hw_rate_table[ATH9K_MODE_11A] = &ar5416_11a_ratetable;
+        sc->hw_rate_table[ATH9K_MODE_11G] = &ar5416_11g_ratetable;
+
+        sc->hw_rate_table[ATH9K_MODE_11NA_HT20] = &ar5416_11na_ratetable;
+        sc->hw_rate_table[ATH9K_MODE_11NG_HT20] = &ar5416_11ng_ratetable;
+        sc->hw_rate_table[ATH9K_MODE_11NA_HT40PLUS] =
+                &ar5416_11na_ratetable;
+        sc->hw_rate_table[ATH9K_MODE_11NA_HT40MINUS] =
+                &ar5416_11na_ratetable;
+        sc->hw_rate_table[ATH9K_MODE_11NG_HT40PLUS] =
+                &ar5416_11ng_ratetable;
+        sc->hw_rate_table[ATH9K_MODE_11NG_HT40MINUS] =
+                &ar5416_11ng_ratetable;
+}
+
+static void ar5416_setquarter_ratetable(struct ath_rate_softc *sc)
+{
+        sc->hw_rate_table[ATH9K_MODE_11A] = &ar5416_11a_ratetable_Quarter;
+        return;
+}
+
+static void ar5416_sethalf_ratetable(struct ath_rate_softc *sc)
+{
+        sc->hw_rate_table[ATH9K_MODE_11A] = &ar5416_11a_ratetable_Half;
+        return;
+}
+
+static void ar5416_setfull_ratetable(struct ath_rate_softc *sc)
+{
+        sc->hw_rate_table[ATH9K_MODE_11A] = &ar5416_11a_ratetable;
+        return;
+}
+
+/*
+ * Return the median of three numbers
+ */
+static inline int8_t median(int8_t a, int8_t b, int8_t c)
+{
+        if (a >= b) {
+                if (b >= c)
+                        return b;
+                else if (a > c)
+                        return c;
+                else
+                        return a;
+        } else {
+                if (a >= c)
+                        return a;
+                else if (b >= c)
+                        return c;
+                else
+                        return b;
+        }
+}
+
+static void ath_rc_sort_validrates(const struct ath_rate_table *rate_table,
+                                   struct ath_tx_ratectrl *rate_ctrl)
+{
+        u8 i, j, idx, idx_next;
+
+        for (i = rate_ctrl->max_valid_rate - 1; i > 0; i--) {
+                for (j = 0; j <= i-1; j++) {
+                        idx = rate_ctrl->valid_rate_index[j];
+                        idx_next = rate_ctrl->valid_rate_index[j+1];
+
+                        if (rate_table->info[idx].ratekbps >
+                                rate_table->info[idx_next].ratekbps) {
+                                rate_ctrl->valid_rate_index[j] = idx_next;
+                                rate_ctrl->valid_rate_index[j+1] = idx;
+                        }
+                }
+        }
+}
+
+/* Access functions for valid_txrate_mask */
+
+static void ath_rc_init_valid_txmask(struct ath_tx_ratectrl *rate_ctrl)
+{
+        u8 i;
+
+        for (i = 0; i < rate_ctrl->rate_table_size; i++)
+                rate_ctrl->valid_rate_index[i] = FALSE;
+}
+
+static inline void ath_rc_set_valid_txmask(struct ath_tx_ratectrl *rate_ctrl,
+                                           u8 index, int valid_tx_rate)
+{
+        ASSERT(index <= rate_ctrl->rate_table_size);
+        rate_ctrl->valid_rate_index[index] = valid_tx_rate ? TRUE : FALSE;
+}
+
+static inline int ath_rc_isvalid_txmask(struct ath_tx_ratectrl *rate_ctrl,
+                                        u8 index)
+{
+        ASSERT(index <= rate_ctrl->rate_table_size);
+        return rate_ctrl->valid_rate_index[index];
+}
+
+/* Iterators for valid_txrate_mask */
+static inline int
+ath_rc_get_nextvalid_txrate(const struct ath_rate_table *rate_table,
+                            struct ath_tx_ratectrl *rate_ctrl,
+                            u8 cur_valid_txrate,
+                            u8 *next_idx)
+{
+        u8 i;
+
+        for (i = 0; i < rate_ctrl->max_valid_rate - 1; i++) {
+                if (rate_ctrl->valid_rate_index[i] == cur_valid_txrate) {
+                        *next_idx = rate_ctrl->valid_rate_index[i+1];
+                        return TRUE;
+                }
+        }
+
+        /* No more valid rates */
+        *next_idx = 0;
+        return FALSE;
+}
+
+/* Return true only for single stream */
+
+static int ath_rc_valid_phyrate(u32 phy, u32 capflag, int ignore_cw)
+{
+        if (WLAN_RC_PHY_HT(phy) & !(capflag & WLAN_RC_HT_FLAG))
+                return FALSE;
+        if (WLAN_RC_PHY_DS(phy) && !(capflag & WLAN_RC_DS_FLAG))
+                return FALSE;
+        if (WLAN_RC_PHY_SGI(phy) && !(capflag & WLAN_RC_SGI_FLAG))
+                return FALSE;
+        if (!ignore_cw && WLAN_RC_PHY_HT(phy))
+                if (WLAN_RC_PHY_40(phy) && !(capflag & WLAN_RC_40_FLAG))
+                        return FALSE;
+                if (!WLAN_RC_PHY_40(phy) && (capflag & WLAN_RC_40_FLAG))
+                        return FALSE;
+        return TRUE;
+}
+
+static inline int
+ath_rc_get_nextlowervalid_txrate(const struct ath_rate_table *rate_table,
+                                 struct ath_tx_ratectrl *rate_ctrl,
+                                 u8 cur_valid_txrate, u8 *next_idx)
+{
+        int8_t i;
+
+        for (i = 1; i < rate_ctrl->max_valid_rate ; i++) {
+                if (rate_ctrl->valid_rate_index[i] == cur_valid_txrate) {
+                        *next_idx = rate_ctrl->valid_rate_index[i-1];
+                        return TRUE;
+                }
+        }
+        return FALSE;
+}
+
+/*
+ * Initialize the Valid Rate Index from valid entries in Rate Table
+ */
+static u8
+ath_rc_sib_init_validrates(struct ath_rate_node *ath_rc_priv,
+                           const struct ath_rate_table *rate_table,
+                           u32 capflag)
+{
+        struct ath_tx_ratectrl *rate_ctrl;
+        u8 i, hi = 0;
+        u32 valid;
+
+        rate_ctrl = (struct ath_tx_ratectrl *)(ath_rc_priv);
+        for (i = 0; i < rate_table->rate_cnt; i++) {
+                valid = (ath_rc_priv->single_stream ?
+                                rate_table->info[i].valid_single_stream :
+                                rate_table->info[i].valid);
+                if (valid == TRUE) {
+                        u32 phy = rate_table->info[i].phy;
+                        u8 valid_rate_count = 0;
+
+                        if (!ath_rc_valid_phyrate(phy, capflag, FALSE))
+                                continue;
+
+                        valid_rate_count = rate_ctrl->valid_phy_ratecnt[phy];
+
+                        rate_ctrl->valid_phy_rateidx[phy][valid_rate_count] = i;
+                        rate_ctrl->valid_phy_ratecnt[phy] += 1;
+                        ath_rc_set_valid_txmask(rate_ctrl, i, TRUE);
+                        hi = A_MAX(hi, i);
+                }
+        }
+        return hi;
+}
+
+/*
+ * Initialize the Valid Rate Index from Rate Set
+ */
+static u8
+ath_rc_sib_setvalid_rates(struct ath_rate_node *ath_rc_priv,
+                          const struct ath_rate_table *rate_table,
+                          struct ath_rateset *rateset,
+                          u32 capflag)
+{
+        /* XXX: Clean me up and make identation friendly */
+        u8 i, j, hi = 0;
+        struct ath_tx_ratectrl *rate_ctrl =
+                (struct ath_tx_ratectrl *)(ath_rc_priv);
+
+        /* Use intersection of working rates and valid rates */
+        for (i = 0; i < rateset->rs_nrates; i++) {
+                for (j = 0; j < rate_table->rate_cnt; j++) {
+                        u32 phy = rate_table->info[j].phy;
+                        u32 valid = (ath_rc_priv->single_stream ?
+                                rate_table->info[j].valid_single_stream :
+                                rate_table->info[j].valid);
+
+                        /* We allow a rate only if its valid and the
+                         * capflag matches one of the validity
+                         * (TRUE/TRUE_20/TRUE_40) flags */
+
+                        /* XXX: catch the negative of this branch
+                         * first and then continue */
+                        if (((rateset->rs_rates[i] & 0x7F) ==
+                                (rate_table->info[j].dot11rate & 0x7F)) &&
+                                ((valid & WLAN_RC_CAP_MODE(capflag)) ==
+                                WLAN_RC_CAP_MODE(capflag)) &&
+                                !WLAN_RC_PHY_HT(phy)) {
+
+                                u8 valid_rate_count = 0;
+
+                                if (!ath_rc_valid_phyrate(phy, capflag, FALSE))
+                                        continue;
+
+                                valid_rate_count =
+                                        rate_ctrl->valid_phy_ratecnt[phy];
+
+                                rate_ctrl->valid_phy_rateidx[phy]
+                                        [valid_rate_count] = j;
+                                rate_ctrl->valid_phy_ratecnt[phy] += 1;
+                                ath_rc_set_valid_txmask(rate_ctrl, j, TRUE);
+                                hi = A_MAX(hi, j);
+                        }
+                }
+        }
+        return hi;
+}
+
+static u8
+ath_rc_sib_setvalid_htrates(struct ath_rate_node *ath_rc_priv,
+                            const struct ath_rate_table *rate_table,
+                            u8 *mcs_set, u32 capflag)
+{
+        u8 i, j, hi = 0;
+        struct ath_tx_ratectrl *rate_ctrl =
+                (struct ath_tx_ratectrl *)(ath_rc_priv);
+
+        /* Use intersection of working rates and valid rates */
+        for (i = 0; i <  ((struct ath_rateset *)mcs_set)->rs_nrates; i++) {
+                for (j = 0; j < rate_table->rate_cnt; j++) {
+                        u32 phy = rate_table->info[j].phy;
+                        u32 valid = (ath_rc_priv->single_stream ?
+                                rate_table->info[j].valid_single_stream :
+                                rate_table->info[j].valid);
+
+                        if (((((struct ath_rateset *)
+                                mcs_set)->rs_rates[i] & 0x7F) !=
+                                (rate_table->info[j].dot11rate & 0x7F)) ||
+                                        !WLAN_RC_PHY_HT(phy) ||
+                                        !WLAN_RC_PHY_HT_VALID(valid, capflag))
+                                continue;
+
+                        if (!ath_rc_valid_phyrate(phy, capflag, FALSE))
+                                continue;
+
+                        rate_ctrl->valid_phy_rateidx[phy]
+                                [rate_ctrl->valid_phy_ratecnt[phy]] = j;
+                        rate_ctrl->valid_phy_ratecnt[phy] += 1;
+                        ath_rc_set_valid_txmask(rate_ctrl, j, TRUE);
+                        hi = A_MAX(hi, j);
+                }
+        }
+        return hi;
+}
+
+/*
+ * Attach to a device instance.  Setup the public definition
+ * of how much per-node space we need and setup the private
+ * phy tables that have rate control parameters.
+ */
+struct ath_rate_softc *ath_rate_attach(struct ath_hal *ah)
+{
+        struct ath_rate_softc *asc;
+
+        /* we are only in user context so we can sleep for memory */
+        asc = kzalloc(sizeof(struct ath_rate_softc), GFP_KERNEL);
+        if (asc == NULL)
+                return NULL;
+
+        ar5416_attach_ratetables(asc);
+
+        /* Save Maximum TX Trigger Level (used for 11n) */
+        tx_triglevel_max = ah->ah_caps.tx_triglevel_max;
+        /*  return alias for ath_rate_softc * */
+        return asc;
+}
+
+static struct ath_rate_node *ath_rate_node_alloc(struct ath_vap *avp,
+                                                 struct ath_rate_softc *rsc,
+                                                 gfp_t gfp)
+{
+        struct ath_rate_node *anode;
+
+        anode = kzalloc(sizeof(struct ath_rate_node), gfp);
+        if (anode == NULL)
+                return NULL;
+
+        anode->avp = avp;
+        anode->asc = rsc;
+        avp->rc_node = anode;
+
+        return anode;
+}
+
+static void ath_rate_node_free(struct ath_rate_node *anode)
+{
+        if (anode != NULL)
+                kfree(anode);
+}
+
+void ath_rate_detach(struct ath_rate_softc *asc)
+{
+        if (asc != NULL)
+                kfree(asc);
+}
+
+u8 ath_rate_findrateix(struct ath_softc *sc,
+                             u8 dot11rate)
+{
+        const struct ath_rate_table *ratetable;
+        struct ath_rate_softc *rsc = sc->sc_rc;
+        int i;
+
+        ratetable = rsc->hw_rate_table[sc->sc_curmode];
+
+        if (WARN_ON(!ratetable))
+                return 0;
+
+        for (i = 0; i < ratetable->rate_cnt; i++) {
+                if ((ratetable->info[i].dot11rate & 0x7f) == (dot11rate & 0x7f))
+                        return i;
+        }
+
+        return 0;
+}
+
+/*
+ * Update rate-control state on a device state change.  When
+ * operating as a station this includes associate/reassociate
+ * with an AP.  Otherwise this gets called, for example, when
+ * the we transition to run state when operating as an AP.
+ */
+void ath_rate_newstate(struct ath_softc *sc, struct ath_vap *avp)
+{
+        struct ath_rate_softc *asc = sc->sc_rc;
+
+        /* For half and quarter rate channles use different
+         * rate tables
+         */
+        if (sc->sc_curchan.channelFlags & CHANNEL_HALF)
+                ar5416_sethalf_ratetable(asc);
+        else if (sc->sc_curchan.channelFlags & CHANNEL_QUARTER)
+                ar5416_setquarter_ratetable(asc);
+        else /* full rate */
+                ar5416_setfull_ratetable(asc);
+
+        if (avp->av_config.av_fixed_rateset != IEEE80211_FIXED_RATE_NONE) {
+                asc->fixedrix =
+                        sc->sc_rixmap[avp->av_config.av_fixed_rateset & 0xff];
+                /* NB: check the fixed rate exists */
+                if (asc->fixedrix == 0xff)
+                        asc->fixedrix = IEEE80211_FIXED_RATE_NONE;
+        } else {
+                asc->fixedrix = IEEE80211_FIXED_RATE_NONE;
+        }
+}
+
+static u8 ath_rc_ratefind_ht(struct ath_softc *sc,
+                                   struct ath_rate_node *ath_rc_priv,
+                                   const struct ath_rate_table *rate_table,
+                                   int probe_allowed, int *is_probing,
+                                   int is_retry)
+{
+        u32 dt, best_thruput, this_thruput, now_msec;
+        u8 rate, next_rate, best_rate, maxindex, minindex;
+        int8_t  rssi_last, rssi_reduce = 0, index = 0;
+        struct ath_tx_ratectrl  *rate_ctrl = NULL;
+
+        rate_ctrl = (struct ath_tx_ratectrl *)(ath_rc_priv ?
+                                               (ath_rc_priv) : NULL);
+
+        *is_probing = FALSE;
+
+        rssi_last = median(rate_ctrl->rssi_last,
+                           rate_ctrl->rssi_last_prev,
+                           rate_ctrl->rssi_last_prev2);
+
+        /*
+         * Age (reduce) last ack rssi based on how old it is.
+         * The bizarre numbers are so the delta is 160msec,
+         * meaning we divide by 16.
+         *   0msec   <= dt <= 25msec:   don't derate
+         *   25msec  <= dt <= 185msec:  derate linearly from 0 to 10dB
+         *   185msec <= dt:             derate by 10dB
+         */
+
+        now_msec = jiffies_to_msecs(jiffies);
+        dt = now_msec - rate_ctrl->rssi_time;
+
+        if (dt >= 185)
+                rssi_reduce = 10;
+        else if (dt >= 25)
+                rssi_reduce = (u8)((dt - 25) >> 4);
+
+        /* Now reduce rssi_last by rssi_reduce */
+        if (rssi_last < rssi_reduce)
+                rssi_last = 0;
+        else
+                rssi_last -= rssi_reduce;
+
+        /*
+         * Now look up the rate in the rssi table and return it.
+         * If no rates match then we return 0 (lowest rate)
+         */
+
+        best_thruput = 0;
+        maxindex = rate_ctrl->max_valid_rate-1;
+
+        minindex = 0;
+        best_rate = minindex;
+
+        /*
+         * Try the higher rate first. It will reduce memory moving time
+         * if we have very good channel characteristics.
+         */
+        for (index = maxindex; index >= minindex ; index--) {
+                u8 per_thres;
+
+                rate = rate_ctrl->valid_rate_index[index];
+                if (rate > rate_ctrl->rate_max_phy)
+                        continue;
+
+                /*
+                 * For TCP the average collision rate is around 11%,
+                 * so we ignore PERs less than this.  This is to
+                 * prevent the rate we are currently using (whose
+                 * PER might be in the 10-15 range because of TCP
+                 * collisions) looking worse than the next lower
+                 * rate whose PER has decayed close to 0.  If we
+                 * used to next lower rate, its PER would grow to
+                 * 10-15 and we would be worse off then staying
+                 * at the current rate.
+                 */
+                per_thres = rate_ctrl->state[rate].per;
+                if (per_thres < 12)
+                        per_thres = 12;
+
+                this_thruput = rate_table->info[rate].user_ratekbps *
+                        (100 - per_thres);
+
+                if (best_thruput <= this_thruput) {
+                        best_thruput = this_thruput;
+                        best_rate    = rate;
+                }
+        }
+
+        rate = best_rate;
+
+        /* if we are retrying for more than half the number
+         * of max retries, use the min rate for the next retry
+         */
+        if (is_retry)
+                rate = rate_ctrl->valid_rate_index[minindex];
+
+        rate_ctrl->rssi_last_lookup = rssi_last;
+
+        /*
+         * Must check the actual rate (ratekbps) to account for
+         * non-monoticity of 11g's rate table
+         */
+
+        if (rate >= rate_ctrl->rate_max_phy && probe_allowed) {
+                rate = rate_ctrl->rate_max_phy;
+
+                /* Probe the next allowed phy state */
+                /* FIXME:XXXX Check to make sure ratMax is checked properly */
+                if (ath_rc_get_nextvalid_txrate(rate_table,
+                                                rate_ctrl, rate, &next_rate) &&
+                    (now_msec - rate_ctrl->probe_time >
+                     rate_table->probe_interval) &&
+                    (rate_ctrl->hw_maxretry_pktcnt >= 1)) {
+                        rate = next_rate;
+                        rate_ctrl->probe_rate = rate;
+                        rate_ctrl->probe_time = now_msec;
+                        rate_ctrl->hw_maxretry_pktcnt = 0;
+                        *is_probing = TRUE;
+                }
+        }
+
+        /*
+         * Make sure rate is not higher than the allowed maximum.
+         * We should also enforce the min, but I suspect the min is
+         * normally 1 rather than 0 because of the rate 9 vs 6 issue
+         * in the old code.
+         */
+        if (rate > (rate_ctrl->rate_table_size - 1))
+                rate = rate_ctrl->rate_table_size - 1;
+
+        ASSERT((rate_table->info[rate].valid && !ath_rc_priv->single_stream) ||
+                (rate_table->info[rate].valid_single_stream &&
+                        ath_rc_priv->single_stream));
+
+        return rate;
+}
+
+static void ath_rc_rate_set_series(const struct ath_rate_table *rate_table ,
+                                   struct ath_rc_series *series,
+                                   u8 tries,
+                                   u8 rix,
+                                   int rtsctsenable)
+{
+        series->tries = tries;
+        series->flags = (rtsctsenable ? ATH_RC_RTSCTS_FLAG : 0) |
+                (WLAN_RC_PHY_DS(rate_table->info[rix].phy) ?
+                 ATH_RC_DS_FLAG : 0) |
+                (WLAN_RC_PHY_40(rate_table->info[rix].phy) ?
+                 ATH_RC_CW40_FLAG : 0) |
+                (WLAN_RC_PHY_SGI(rate_table->info[rix].phy) ?
+                 ATH_RC_SGI_FLAG : 0);
+
+        series->rix = rate_table->info[rix].base_index;
+        series->max_4ms_framelen = rate_table->info[rix].max_4ms_framelen;
+}
+
+static u8 ath_rc_rate_getidx(struct ath_softc *sc,
+                                   struct ath_rate_node *ath_rc_priv,
+                                   const struct ath_rate_table *rate_table,
+                                   u8 rix, u16 stepdown,
+                                   u16 min_rate)
+{
+        u32 j;
+        u8 nextindex;
+        struct ath_tx_ratectrl *rate_ctrl =
+                (struct ath_tx_ratectrl *)(ath_rc_priv);
+
+        if (min_rate) {
+                for (j = RATE_TABLE_SIZE; j > 0; j--) {
+                        if (ath_rc_get_nextlowervalid_txrate(rate_table,
+                                                rate_ctrl, rix, &nextindex))
+                                rix = nextindex;
+                        else
+                                break;
+                }
+        } else {
+                for (j = stepdown; j > 0; j--) {
+                        if (ath_rc_get_nextlowervalid_txrate(rate_table,
+                                                rate_ctrl, rix, &nextindex))
+                                rix = nextindex;
+                        else
+                                break;
+                }
+        }
+        return rix;
+}
+
+static void ath_rc_ratefind(struct ath_softc *sc,
+                            struct ath_rate_node *ath_rc_priv,
+                            int num_tries, int num_rates, unsigned int rcflag,
+                            struct ath_rc_series series[], int *is_probe,
+                            int is_retry)
+{
+        u8 try_per_rate = 0, i = 0, rix, nrix;
+        struct ath_rate_softc  *asc = (struct ath_rate_softc *)sc->sc_rc;
+        struct ath_rate_table *rate_table;
+
+        rate_table =
+                (struct ath_rate_table *)asc->hw_rate_table[sc->sc_curmode];
+        rix = ath_rc_ratefind_ht(sc, ath_rc_priv, rate_table,
+                                (rcflag & ATH_RC_PROBE_ALLOWED) ? 1 : 0,
+                                is_probe, is_retry);
+        nrix = rix;
+
+        if ((rcflag & ATH_RC_PROBE_ALLOWED) && (*is_probe)) {
+                /* set one try for probe rates. For the
+                 * probes don't enable rts */
+                ath_rc_rate_set_series(rate_table,
+                        &series[i++], 1, nrix, FALSE);
+
+                try_per_rate = (num_tries/num_rates);
+                /* Get the next tried/allowed rate. No RTS for the next series
+                 * after the probe rate
+                 */
+                nrix = ath_rc_rate_getidx(sc,
+                        ath_rc_priv, rate_table, nrix, 1, FALSE);
+                ath_rc_rate_set_series(rate_table,
+                        &series[i++], try_per_rate, nrix, 0);
+        } else {
+                try_per_rate = (num_tries/num_rates);
+                /* Set the choosen rate. No RTS for first series entry. */
+                ath_rc_rate_set_series(rate_table,
+                        &series[i++], try_per_rate, nrix, FALSE);
+        }
+
+        /* Fill in the other rates for multirate retry */
+        for ( ; i < num_rates; i++) {
+                u8 try_num;
+                u8 min_rate;
+
+                try_num = ((i + 1) == num_rates) ?
+                        num_tries - (try_per_rate * i) : try_per_rate ;
+                min_rate = (((i + 1) == num_rates) &&
+                        (rcflag & ATH_RC_MINRATE_LASTRATE)) ? 1 : 0;
+
+                nrix = ath_rc_rate_getidx(sc, ath_rc_priv,
+                        rate_table, nrix, 1, min_rate);
+                /* All other rates in the series have RTS enabled */
+                ath_rc_rate_set_series(rate_table,
+                        &series[i], try_num, nrix, TRUE);
+        }
+
+        /*
+         * NB:Change rate series to enable aggregation when operating
+         * at lower MCS rates. When first rate in series is MCS2
+         * in HT40 @ 2.4GHz, series should look like:
+         *
+         * {MCS2, MCS1, MCS0, MCS0}.
+         *
+         * When first rate in series is MCS3 in HT20 @ 2.4GHz, series should
+         * look like:
+         *
+         * {MCS3, MCS2, MCS1, MCS1}
+         *
+         * So, set fourth rate in series to be same as third one for
+         * above conditions.
+         */
+        if ((sc->sc_curmode == ATH9K_MODE_11NG_HT20) ||
+                        (sc->sc_curmode == ATH9K_MODE_11NG_HT40PLUS) ||
+                        (sc->sc_curmode == ATH9K_MODE_11NG_HT40MINUS)) {
+                u8  dot11rate = rate_table->info[rix].dot11rate;
+                u8 phy = rate_table->info[rix].phy;
+                if (i == 4 &&
+                    ((dot11rate == 2 && phy == WLAN_RC_PHY_HT_40_SS) ||
+                    (dot11rate == 3 && phy == WLAN_RC_PHY_HT_20_SS))) {
+                        series[3].rix = series[2].rix;
+                        series[3].flags = series[2].flags;
+                        series[3].max_4ms_framelen = series[2].max_4ms_framelen;
+                }
+        }
+}
+
+/*
+ * Return the Tx rate series.
+ */
+void ath_rate_findrate(struct ath_softc *sc,
+                       struct ath_rate_node *ath_rc_priv,
+                       int num_tries,
+                       int num_rates,
+                       unsigned int rcflag,
+                       struct ath_rc_series series[],
+                       int *is_probe,
+                       int is_retry)
+{
+        struct ath_vap *avp = ath_rc_priv->avp;
+
+        DPRINTF(sc, ATH_DBG_RATE, "%s", __func__);
+        if (!num_rates || !num_tries)
+                return;
+
+        if (avp->av_config.av_fixed_rateset == IEEE80211_FIXED_RATE_NONE) {
+                ath_rc_ratefind(sc, ath_rc_priv, num_tries, num_rates,
+                                rcflag, series, is_probe, is_retry);
+        } else {
+                /* Fixed rate */
+                int idx;
+                u8 flags;
+                u32 rix;
+                struct ath_rate_softc *asc = ath_rc_priv->asc;
+                struct ath_rate_table *rate_table;
+
+                rate_table = (struct ath_rate_table *)
+                        asc->hw_rate_table[sc->sc_curmode];
+
+                for (idx = 0; idx < 4; idx++) {
+                        unsigned int    mcs;
+                        u8 series_rix = 0;
+
+                        series[idx].tries =
+                                IEEE80211_RATE_IDX_ENTRY(
+                                        avp->av_config.av_fixed_retryset, idx);
+
+                        mcs = IEEE80211_RATE_IDX_ENTRY(
+                                avp->av_config.av_fixed_rateset, idx);
+
+                        if (idx == 3 && (mcs & 0xf0) == 0x70)
+                                mcs = (mcs & ~0xf0)|0x80;
+
+                        if (!(mcs & 0x80))
+                                flags = 0;
+                        else
+                                flags = ((ath_rc_priv->ht_cap &
+                                                WLAN_RC_DS_FLAG) ?
+                                                ATH_RC_DS_FLAG : 0) |
+                                        ((ath_rc_priv->ht_cap &
+                                                WLAN_RC_40_FLAG) ?
+                                                ATH_RC_CW40_FLAG : 0) |
+                                        ((ath_rc_priv->ht_cap &
+                                                WLAN_RC_SGI_FLAG) ?
+                                        ((ath_rc_priv->ht_cap &
+                                                WLAN_RC_40_FLAG) ?
+                                                ATH_RC_SGI_FLAG : 0) : 0);
+
+                        series[idx].rix = sc->sc_rixmap[mcs];
+                        series_rix  = series[idx].rix;
+
+                        /* XXX: Give me some cleanup love */
+                        if ((flags & ATH_RC_CW40_FLAG) &&
+                                (flags & ATH_RC_SGI_FLAG))
+                                rix = rate_table->info[series_rix].ht_index;
+                        else if (flags & ATH_RC_SGI_FLAG)
+                                rix = rate_table->info[series_rix].sgi_index;
+                        else if (flags & ATH_RC_CW40_FLAG)
+                                rix = rate_table->info[series_rix].cw40index;
+                        else
+                                rix = rate_table->info[series_rix].base_index;
+                        series[idx].max_4ms_framelen =
+                                rate_table->info[rix].max_4ms_framelen;
+                        series[idx].flags = flags;
+                }
+        }
+}
+
+static void ath_rc_update_ht(struct ath_softc *sc,
+                             struct ath_rate_node *ath_rc_priv,
+                             struct ath_tx_info_priv *info_priv,
+                             int tx_rate, int xretries, int retries)
+{
+        struct ath_tx_ratectrl *rate_ctrl;
+        u32 now_msec = jiffies_to_msecs(jiffies);
+        int state_change = FALSE, rate, count;
+        u8 last_per;
+        struct ath_rate_softc  *asc = (struct ath_rate_softc *)sc->sc_rc;
+        struct ath_rate_table *rate_table =
+                (struct ath_rate_table *)asc->hw_rate_table[sc->sc_curmode];
+
+        static u32 nretry_to_per_lookup[10] = {
+                100 * 0 / 1,
+                100 * 1 / 4,
+                100 * 1 / 2,
+                100 * 3 / 4,
+                100 * 4 / 5,
+                100 * 5 / 6,
+                100 * 6 / 7,
+                100 * 7 / 8,
+                100 * 8 / 9,
+                100 * 9 / 10
+        };
+
+        if (!ath_rc_priv)
+                return;
+
+        rate_ctrl = (struct ath_tx_ratectrl *)(ath_rc_priv);
+
+        ASSERT(tx_rate >= 0);
+        if (tx_rate < 0)
+                return;
+
+        /* To compensate for some imbalance between ctrl and ext. channel */
+
+        if (WLAN_RC_PHY_40(rate_table->info[tx_rate].phy))
+                info_priv->tx.ts_rssi =
+                        info_priv->tx.ts_rssi < 3 ? 0 :
+                        info_priv->tx.ts_rssi - 3;
+
+        last_per = rate_ctrl->state[tx_rate].per;
+
+        if (xretries) {
+                /* Update the PER. */
+                if (xretries == 1) {
+                        rate_ctrl->state[tx_rate].per += 30;
+                        if (rate_ctrl->state[tx_rate].per > 100)
+                                rate_ctrl->state[tx_rate].per = 100;
+                } else {
+                        /* xretries == 2 */
+                        count = sizeof(nretry_to_per_lookup) /
+                                        sizeof(nretry_to_per_lookup[0]);
+                        if (retries >= count)
+                                retries = count - 1;
+                        /* new_PER = 7/8*old_PER + 1/8*(currentPER) */
+                        rate_ctrl->state[tx_rate].per =
+                                (u8)(rate_ctrl->state[tx_rate].per -
+                                (rate_ctrl->state[tx_rate].per >> 3) +
+                                ((100) >> 3));
+                }
+
+                /* xretries == 1 or 2 */
+
+                if (rate_ctrl->probe_rate == tx_rate)
+                        rate_ctrl->probe_rate = 0;
+
+        } else {        /* xretries == 0 */
+                /* Update the PER. */
+                /* Make sure it doesn't index out of array's bounds. */
+                count = sizeof(nretry_to_per_lookup) /
+                        sizeof(nretry_to_per_lookup[0]);
+                if (retries >= count)
+                        retries = count - 1;
+                if (info_priv->n_bad_frames) {
+                        /* new_PER = 7/8*old_PER + 1/8*(currentPER)  */
+                        /*
+                         * Assuming that n_frames is not 0.  The current PER
+                         * from the retries is 100 * retries / (retries+1),
+                         * since the first retries attempts failed, and the
+                         * next one worked.  For the one that worked,
+                         * n_bad_frames subframes out of n_frames wored,
+                         * so the PER for that part is
+                         * 100 * n_bad_frames / n_frames, and it contributes
+                         * 100 * n_bad_frames / (n_frames * (retries+1)) to
+                         * the above PER.  The expression below is a
+                         * simplified version of the sum of these two terms.
+                         */
+                        if (info_priv->n_frames > 0)
+                                rate_ctrl->state[tx_rate].per
+                                      = (u8)
+                                        (rate_ctrl->state[tx_rate].per -
+                                        (rate_ctrl->state[tx_rate].per >> 3) +
+                                        ((100*(retries*info_priv->n_frames +
+                                        info_priv->n_bad_frames) /
+                                        (info_priv->n_frames *
+                                                (retries+1))) >> 3));
+                } else {
+                        /* new_PER = 7/8*old_PER + 1/8*(currentPER) */
+
+                        rate_ctrl->state[tx_rate].per = (u8)
+                                (rate_ctrl->state[tx_rate].per -
+                                (rate_ctrl->state[tx_rate].per >> 3) +
+                                (nretry_to_per_lookup[retries] >> 3));
+                }
+
+                rate_ctrl->rssi_last_prev2 = rate_ctrl->rssi_last_prev;
+                rate_ctrl->rssi_last_prev  = rate_ctrl->rssi_last;
+                rate_ctrl->rssi_last = info_priv->tx.ts_rssi;
+                rate_ctrl->rssi_time = now_msec;
+
+                /*
+                 * If we got at most one retry then increase the max rate if
+                 * this was a probe.  Otherwise, ignore the probe.
+                 */
+
+                if (rate_ctrl->probe_rate && rate_ctrl->probe_rate == tx_rate) {
+                        if (retries > 0 || 2 * info_priv->n_bad_frames >
+                                info_priv->n_frames) {
+                                /*
+                                 * Since we probed with just a single attempt,
+                                 * any retries means the probe failed.  Also,
+                                 * if the attempt worked, but more than half
+                                 * the subframes were bad then also consider
+                                 * the probe a failure.
+                                 */
+                                rate_ctrl->probe_rate = 0;
+                        } else {
+                                u8 probe_rate = 0;
+
+                                rate_ctrl->rate_max_phy = rate_ctrl->probe_rate;
+                                probe_rate = rate_ctrl->probe_rate;
+
+                                if (rate_ctrl->state[probe_rate].per > 30)
+                                        rate_ctrl->state[probe_rate].per = 20;
+
+                                rate_ctrl->probe_rate = 0;
+
+                                /*
+                                 * Since this probe succeeded, we allow the next
+                                 * probe twice as soon.  This allows the maxRate
+                                 * to move up faster if the probes are
+                                 * succesful.
+                                 */
+                                rate_ctrl->probe_time = now_msec -
+                                        rate_table->probe_interval / 2;
+                        }
+                }
+
+                if (retries > 0) {
+                        /*
+                         * Don't update anything.  We don't know if
+                         * this was because of collisions or poor signal.
+                         *
+                         * Later: if rssi_ack is close to
+                         * rate_ctrl->state[txRate].rssi_thres and we see lots
+                         * of retries, then we could increase
+                         * rate_ctrl->state[txRate].rssi_thres.
+                         */
+                        rate_ctrl->hw_maxretry_pktcnt = 0;
+                } else {
+                        /*
+                         * It worked with no retries. First ignore bogus (small)
+                         * rssi_ack values.
+                         */
+                        if (tx_rate == rate_ctrl->rate_max_phy &&
+                                        rate_ctrl->hw_maxretry_pktcnt < 255) {
+                                rate_ctrl->hw_maxretry_pktcnt++;
+                        }
+
+                        if (info_priv->tx.ts_rssi >=
+                                rate_table->info[tx_rate].rssi_ack_validmin) {
+                                /* Average the rssi */
+                                if (tx_rate != rate_ctrl->rssi_sum_rate) {
+                                        rate_ctrl->rssi_sum_rate = tx_rate;
+                                        rate_ctrl->rssi_sum =
+                                                rate_ctrl->rssi_sum_cnt = 0;
+                                }
+
+                                rate_ctrl->rssi_sum += info_priv->tx.ts_rssi;
+                                rate_ctrl->rssi_sum_cnt++;
+
+                                if (rate_ctrl->rssi_sum_cnt > 4) {
+                                        int32_t rssi_ackAvg =
+                                                (rate_ctrl->rssi_sum + 2) / 4;
+                                        int8_t rssi_thres =
+                                                rate_ctrl->state[tx_rate].
+                                                rssi_thres;
+                                        int8_t rssi_ack_vmin =
+                                                rate_table->info[tx_rate].
+                                                rssi_ack_validmin;
+
+                                        rate_ctrl->rssi_sum =
+                                                rate_ctrl->rssi_sum_cnt = 0;
+
+                                        /* Now reduce the current
+                                         * rssi threshold. */
+                                        if ((rssi_ackAvg < rssi_thres + 2) &&
+                                                (rssi_thres > rssi_ack_vmin)) {
+                                                rate_ctrl->state[tx_rate].
+                                                        rssi_thres--;
+                                        }
+
+                                        state_change = TRUE;
+                                }
+                        }
+                }
+        }
+
+        /* For all cases */
+
+        /*
+         * If this rate looks bad (high PER) then stop using it for
+         * a while (except if we are probing).
+         */
+        if (rate_ctrl->state[tx_rate].per >= 55 && tx_rate > 0 &&
+                        rate_table->info[tx_rate].ratekbps <=
+                        rate_table->info[rate_ctrl->rate_max_phy].ratekbps) {
+                ath_rc_get_nextlowervalid_txrate(rate_table, rate_ctrl,
+                                (u8) tx_rate, &rate_ctrl->rate_max_phy);
+
+                /* Don't probe for a little while. */
+                rate_ctrl->probe_time = now_msec;
+        }
+
+        if (state_change) {
+                /*
+                 * Make sure the rates above this have higher rssi thresholds.
+                 * (Note:  Monotonicity is kept within the OFDM rates and
+                 *         within the CCK rates. However, no adjustment is
+                 *         made to keep the rssi thresholds monotonically
+                 *         increasing between the CCK and OFDM rates.)
+                 */
+                for (rate = tx_rate; rate <
+                                rate_ctrl->rate_table_size - 1; rate++) {
+                        if (rate_table->info[rate+1].phy !=
+                                rate_table->info[tx_rate].phy)
+                                break;
+
+                        if (rate_ctrl->state[rate].rssi_thres +
+                                rate_table->info[rate].rssi_ack_deltamin >
+                                        rate_ctrl->state[rate+1].rssi_thres) {
+                                rate_ctrl->state[rate+1].rssi_thres =
+                                        rate_ctrl->state[rate].
+                                                rssi_thres +
+                                        rate_table->info[rate].
+                                                rssi_ack_deltamin;
+                        }
+                }
+
+                /* Make sure the rates below this have lower rssi thresholds. */
+                for (rate = tx_rate - 1; rate >= 0; rate--) {
+                        if (rate_table->info[rate].phy !=
+                                rate_table->info[tx_rate].phy)
+                                break;
+
+                        if (rate_ctrl->state[rate].rssi_thres +
+                                rate_table->info[rate].rssi_ack_deltamin >
+                                        rate_ctrl->state[rate+1].rssi_thres) {
+                                if (rate_ctrl->state[rate+1].rssi_thres <
+                                        rate_table->info[rate].
+                                        rssi_ack_deltamin)
+                                        rate_ctrl->state[rate].rssi_thres = 0;
+                                else {
+                                        rate_ctrl->state[rate].rssi_thres =
+                                                rate_ctrl->state[rate+1].
+                                                        rssi_thres -
+                                                        rate_table->info[rate].
+                                                        rssi_ack_deltamin;
+                                }
+
+                                if (rate_ctrl->state[rate].rssi_thres <
+                                        rate_table->info[rate].
+                                                rssi_ack_validmin) {
+                                        rate_ctrl->state[rate].rssi_thres =
+                                                rate_table->info[rate].
+                                                        rssi_ack_validmin;
+                                }
+                        }
+                }
+        }
+
+        /* Make sure the rates below this have lower PER */
+        /* Monotonicity is kept only for rates below the current rate. */
+        if (rate_ctrl->state[tx_rate].per < last_per) {
+                for (rate = tx_rate - 1; rate >= 0; rate--) {
+                        if (rate_table->info[rate].phy !=
+                                rate_table->info[tx_rate].phy)
+                                break;
+
+                        if (rate_ctrl->state[rate].per >
+                                        rate_ctrl->state[rate+1].per) {
+                                rate_ctrl->state[rate].per =
+                                        rate_ctrl->state[rate+1].per;
+                        }
+                }
+        }
+
+        /* Maintain monotonicity for rates above the current rate */
+        for (rate = tx_rate; rate < rate_ctrl->rate_table_size - 1; rate++) {
+                if (rate_ctrl->state[rate+1].per < rate_ctrl->state[rate].per)
+                        rate_ctrl->state[rate+1].per =
+                                rate_ctrl->state[rate].per;
+        }
+
+        /* Every so often, we reduce the thresholds and
+         * PER (different for CCK and OFDM). */
+        if (now_msec - rate_ctrl->rssi_down_time >=
+                rate_table->rssi_reduce_interval) {
+
+                for (rate = 0; rate < rate_ctrl->rate_table_size; rate++) {
+                        if (rate_ctrl->state[rate].rssi_thres >
+                                rate_table->info[rate].rssi_ack_validmin)
+                                rate_ctrl->state[rate].rssi_thres -= 1;
+                }
+                rate_ctrl->rssi_down_time = now_msec;
+        }
+
+        /* Every so often, we reduce the thresholds
+         * and PER (different for CCK and OFDM). */
+        if (now_msec - rate_ctrl->per_down_time >=
+                rate_table->rssi_reduce_interval) {
+                for (rate = 0; rate < rate_ctrl->rate_table_size; rate++) {
+                        rate_ctrl->state[rate].per =
+                                7 * rate_ctrl->state[rate].per / 8;
+                }
+
+                rate_ctrl->per_down_time = now_msec;
+        }
+}
+
+/*
+ * This routine is called in rate control callback tx_status() to give
+ * the status of previous frames.
+ */
+static void ath_rc_update(struct ath_softc *sc,
+                          struct ath_rate_node *ath_rc_priv,
+                          struct ath_tx_info_priv *info_priv, int final_ts_idx,
+                          int xretries, int long_retry)
+{
+        struct ath_rate_softc  *asc = (struct ath_rate_softc *)sc->sc_rc;
+        struct ath_rate_table *rate_table;
+        struct ath_tx_ratectrl *rate_ctrl;
+        struct ath_rc_series rcs[4];
+        u8 flags;
+        u32 series = 0, rix;
+
+        memcpy(rcs, info_priv->rcs, 4 * sizeof(rcs[0]));
+        rate_table = (struct ath_rate_table *)
+                asc->hw_rate_table[sc->sc_curmode];
+        rate_ctrl = (struct ath_tx_ratectrl *)(ath_rc_priv);
+        ASSERT(rcs[0].tries != 0);
+
+        /*
+         * If the first rate is not the final index, there
+         * are intermediate rate failures to be processed.
+         */
+        if (final_ts_idx != 0) {
+                /* Process intermediate rates that failed.*/
+                for (series = 0; series < final_ts_idx ; series++) {
+                        if (rcs[series].tries != 0) {
+                                flags = rcs[series].flags;
+                                /* If HT40 and we have switched mode from
+                                 * 40 to 20 => don't update */
+                                if ((flags & ATH_RC_CW40_FLAG) &&
+                                        (rate_ctrl->rc_phy_mode !=
+                                        (flags & ATH_RC_CW40_FLAG)))
+                                        return;
+                                if ((flags & ATH_RC_CW40_FLAG) &&
+                                        (flags & ATH_RC_SGI_FLAG))
+                                        rix = rate_table->info[
+                                                rcs[series].rix].ht_index;
+                                else if (flags & ATH_RC_SGI_FLAG)
+                                        rix = rate_table->info[
+                                                rcs[series].rix].sgi_index;
+                                else if (flags & ATH_RC_CW40_FLAG)
+                                        rix = rate_table->info[
+                                                rcs[series].rix].cw40index;
+                                else
+                                        rix = rate_table->info[
+                                                rcs[series].rix].base_index;
+                                ath_rc_update_ht(sc, ath_rc_priv,
+                                                info_priv, rix,
+                                                xretries ? 1 : 2,
+                                                rcs[series].tries);
+                        }
+                }
+        } else {
+                /*
+                 * Handle the special case of MIMO PS burst, where the second
+                 * aggregate is sent out with only one rate and one try.
+                 * Treating it as an excessive retry penalizes the rate
+                 * inordinately.
+                 */
+                if (rcs[0].tries == 1 && xretries == 1)
+                        xretries = 2;
+        }
+
+        flags = rcs[series].flags;
+        /* If HT40 and we have switched mode from 40 to 20 => don't update */
+        if ((flags & ATH_RC_CW40_FLAG) &&
+                (rate_ctrl->rc_phy_mode != (flags & ATH_RC_CW40_FLAG)))
+                return;
+
+        if ((flags & ATH_RC_CW40_FLAG) && (flags & ATH_RC_SGI_FLAG))
+                rix = rate_table->info[rcs[series].rix].ht_index;
+        else if (flags & ATH_RC_SGI_FLAG)
+                rix = rate_table->info[rcs[series].rix].sgi_index;
+        else if (flags & ATH_RC_CW40_FLAG)
+                rix = rate_table->info[rcs[series].rix].cw40index;
+        else
+                rix = rate_table->info[rcs[series].rix].base_index;
+
+        ath_rc_update_ht(sc, ath_rc_priv, info_priv, rix,
+                xretries, long_retry);
+}
+
+
+/*
+ * Process a tx descriptor for a completed transmit (success or failure).
+ */
+static void ath_rate_tx_complete(struct ath_softc *sc,
+                                 struct ath_node *an,
+                                 struct ath_rate_node *rc_priv,
+                                 struct ath_tx_info_priv *info_priv)
+{
+        int final_ts_idx = info_priv->tx.ts_rateindex;
+        int tx_status = 0, is_underrun = 0;
+        struct ath_vap *avp;
+
+        avp = rc_priv->avp;
+        if ((avp->av_config.av_fixed_rateset != IEEE80211_FIXED_RATE_NONE)
+                        || info_priv->tx.ts_status & ATH9K_TXERR_FILT)
+                return;
+
+        if (info_priv->tx.ts_rssi > 0) {
+                ATH_RSSI_LPF(an->an_chainmask_sel.tx_avgrssi,
+                                info_priv->tx.ts_rssi);
+        }
+
+        /*
+         * If underrun error is seen assume it as an excessive retry only
+         * if prefetch trigger level have reached the max (0x3f for 5416)
+         * Adjust the long retry as if the frame was tried ATH_11N_TXMAXTRY
+         * times. This affects how ratectrl updates PER for the failed rate.
+         */
+        if (info_priv->tx.ts_flags &
+                (ATH9K_TX_DATA_UNDERRUN | ATH9K_TX_DELIM_UNDERRUN) &&
+                ((sc->sc_ah->ah_txTrigLevel) >= tx_triglevel_max)) {
+                tx_status = 1;
+                is_underrun = 1;
+        }
+
+        if ((info_priv->tx.ts_status & ATH9K_TXERR_XRETRY) ||
+                        (info_priv->tx.ts_status & ATH9K_TXERR_FIFO))
+                tx_status = 1;
+
+        ath_rc_update(sc, rc_priv, info_priv, final_ts_idx, tx_status,
+                      (is_underrun) ? ATH_11N_TXMAXTRY :
+                      info_priv->tx.ts_longretry);
+}
+
+
+/*
+ *  Update the SIB's rate control information
+ *
+ *  This should be called when the supported rates change
+ *  (e.g. SME operation, wireless mode change)
+ *
+ *  It will determine which rates are valid for use.
+ */
+static void ath_rc_sib_update(struct ath_softc *sc,
+                              struct ath_rate_node *ath_rc_priv,
+                              u32 capflag, int keep_state,
+                              struct ath_rateset *negotiated_rates,
+                              struct ath_rateset *negotiated_htrates)
+{
+        struct ath_rate_table *rate_table = NULL;
+        struct ath_rate_softc *asc = (struct ath_rate_softc *)sc->sc_rc;
+        struct ath_rateset *rateset = negotiated_rates;
+        u8 *ht_mcs = (u8 *)negotiated_htrates;
+        struct ath_tx_ratectrl *rate_ctrl  = (struct ath_tx_ratectrl *)
+                (ath_rc_priv);
+        u8 i, j, k, hi = 0, hthi = 0;
+
+        rate_table = (struct ath_rate_table *)
+                asc->hw_rate_table[sc->sc_curmode];
+
+        /* Initial rate table size. Will change depending
+         * on the working rate set */
+        rate_ctrl->rate_table_size = MAX_TX_RATE_TBL;
+
+        /* Initialize thresholds according to the global rate table */
+        for (i = 0 ; (i < rate_ctrl->rate_table_size) && (!keep_state); i++) {
+                rate_ctrl->state[i].rssi_thres =
+                        rate_table->info[i].rssi_ack_validmin;
+                rate_ctrl->state[i].per = 0;
+        }
+
+        /* Determine the valid rates */
+        ath_rc_init_valid_txmask(rate_ctrl);
+
+        for (i = 0; i < WLAN_RC_PHY_MAX; i++) {
+                for (j = 0; j < MAX_TX_RATE_PHY; j++)
+                        rate_ctrl->valid_phy_rateidx[i][j] = 0;
+                rate_ctrl->valid_phy_ratecnt[i] = 0;
+        }
+        rate_ctrl->rc_phy_mode = (capflag & WLAN_RC_40_FLAG);
+
+        /* Set stream capability */
+        ath_rc_priv->single_stream = (capflag & WLAN_RC_DS_FLAG) ? 0 : 1;
+
+        if (!rateset->rs_nrates) {
+                /* No working rate, just initialize valid rates */
+                hi = ath_rc_sib_init_validrates(ath_rc_priv, rate_table,
+                                                capflag);
+        } else {
+                /* Use intersection of working rates and valid rates */
+                hi = ath_rc_sib_setvalid_rates(ath_rc_priv, rate_table,
+                                               rateset, capflag);
+                if (capflag & WLAN_RC_HT_FLAG) {
+                        hthi = ath_rc_sib_setvalid_htrates(ath_rc_priv,
+                                                           rate_table,
+                                                           ht_mcs,
+                                                           capflag);
+                }
+                hi = A_MAX(hi, hthi);
+        }
+
+        rate_ctrl->rate_table_size = hi + 1;
+        rate_ctrl->rate_max_phy = 0;
+        ASSERT(rate_ctrl->rate_table_size <= MAX_TX_RATE_TBL);
+
+        for (i = 0, k = 0; i < WLAN_RC_PHY_MAX; i++) {
+                for (j = 0; j < rate_ctrl->valid_phy_ratecnt[i]; j++) {
+                        rate_ctrl->valid_rate_index[k++] =
+                                rate_ctrl->valid_phy_rateidx[i][j];
+                }
+
+                if (!ath_rc_valid_phyrate(i, rate_table->initial_ratemax, TRUE)
+                    || !rate_ctrl->valid_phy_ratecnt[i])
+                        continue;
+
+                rate_ctrl->rate_max_phy = rate_ctrl->valid_phy_rateidx[i][j-1];
+        }
+        ASSERT(rate_ctrl->rate_table_size <= MAX_TX_RATE_TBL);
+        ASSERT(k <= MAX_TX_RATE_TBL);
+
+        rate_ctrl->max_valid_rate = k;
+        /*
+         * Some third party vendors don't send the supported rate series in
+         * order. So sorting to make sure its in order, otherwise our RateFind
+         * Algo will select wrong rates
+         */
+        ath_rc_sort_validrates(rate_table, rate_ctrl);
+        rate_ctrl->rate_max_phy = rate_ctrl->valid_rate_index[k-4];
+}
+
+/*
+ * Update rate-control state on station associate/reassociate.
+ */
+static int ath_rate_newassoc(struct ath_softc *sc,
+                             struct ath_rate_node *ath_rc_priv,
+                             unsigned int capflag,
+                             struct ath_rateset *negotiated_rates,
+                             struct ath_rateset *negotiated_htrates)
+{
+
+
+        ath_rc_priv->ht_cap =
+                ((capflag & ATH_RC_DS_FLAG) ? WLAN_RC_DS_FLAG : 0) |
+                ((capflag & ATH_RC_SGI_FLAG) ? WLAN_RC_SGI_FLAG : 0) |
+                ((capflag & ATH_RC_HT_FLAG)  ? WLAN_RC_HT_FLAG : 0) |
+                ((capflag & ATH_RC_CW40_FLAG) ? WLAN_RC_40_FLAG : 0);
+
+        ath_rc_sib_update(sc, ath_rc_priv, ath_rc_priv->ht_cap, 0,
+                          negotiated_rates, negotiated_htrates);
+
+        return 0;
+}
+
+/*
+ *  This routine is called to initialize the rate control parameters
+ *  in the SIB. It is called initially during system initialization
+ *  or when a station is associated with the AP.
+ */
+static void ath_rc_sib_init(struct ath_rate_node *ath_rc_priv)
+{
+        struct ath_tx_ratectrl *rate_ctrl;
+
+        rate_ctrl = (struct ath_tx_ratectrl *)(ath_rc_priv);
+        rate_ctrl->rssi_down_time = jiffies_to_msecs(jiffies);
+}
+
+
+static void ath_setup_rates(struct ieee80211_local *local, struct sta_info *sta)
+
+{
+        struct ieee80211_supported_band *sband;
+        struct ieee80211_hw *hw = local_to_hw(local);
+        struct ath_softc *sc = hw->priv;
+        struct ath_rate_node *rc_priv = sta->rate_ctrl_priv;
+        int i, j = 0;
+
+        DPRINTF(sc, ATH_DBG_RATE, "%s", __func__);
+        sband =  local->hw.wiphy->bands[local->hw.conf.channel->band];
+        for (i = 0; i < sband->n_bitrates; i++) {
+                if (sta->supp_rates[local->hw.conf.channel->band] & BIT(i)) {
+                        rc_priv->neg_rates.rs_rates[j]
+                                = (sband->bitrates[i].bitrate * 2) / 10;
+                        j++;
+                }
+        }
+        rc_priv->neg_rates.rs_nrates = j;
+}
+
+void ath_rc_node_update(struct ieee80211_hw *hw, struct ath_rate_node *rc_priv)
+{
+        struct ath_softc *sc = hw->priv;
+        u32 capflag = 0;
+
+        if (hw->conf.ht_conf.ht_supported) {
+                capflag |= ATH_RC_HT_FLAG | ATH_RC_DS_FLAG;
+                if (sc->sc_ht_info.tx_chan_width == ATH9K_HT_MACMODE_2040)
+                        capflag |= ATH_RC_CW40_FLAG;
+        }
+
+        ath_rate_newassoc(sc, rc_priv, capflag,
+                          &rc_priv->neg_rates,
+                          &rc_priv->neg_ht_rates);
+
+}
+
+/* Rate Control callbacks */
+static void ath_tx_status(void *priv, struct net_device *dev,
+                          struct sk_buff *skb)
+{
+        struct ath_softc *sc = priv;
+        struct ath_tx_info_priv *tx_info_priv;
+        struct ath_node *an;
+        struct sta_info *sta;
+        struct ieee80211_local *local;
+        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+        struct ieee80211_hdr *hdr;
+        __le16 fc;
+
+        local = hw_to_local(sc->hw);
+        hdr = (struct ieee80211_hdr *)skb->data;
+        fc = hdr->frame_control;
+        tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0];
+
+        spin_lock_bh(&sc->node_lock);
+        an = ath_node_find(sc, hdr->addr1);
+        spin_unlock_bh(&sc->node_lock);
+
+        sta = sta_info_get(local, hdr->addr1);
+        if (!an || !sta || !ieee80211_is_data(fc)) {
+                if (tx_info->driver_data[0] != NULL) {
+                        kfree(tx_info->driver_data[0]);
+                        tx_info->driver_data[0] = NULL;
+                }
+                return;
+        }
+        if (tx_info->driver_data[0] != NULL) {
+                ath_rate_tx_complete(sc, an, sta->rate_ctrl_priv, tx_info_priv);
+                kfree(tx_info->driver_data[0]);
+                tx_info->driver_data[0] = NULL;
+        }
+}
+
+static void ath_tx_aggr_resp(struct ath_softc *sc,
+                             struct sta_info *sta,
+                             struct ath_node *an,
+                             u8 tidno)
+{
+        struct ieee80211_hw *hw = sc->hw;
+        struct ieee80211_local *local;
+        struct ath_atx_tid *txtid;
+        struct ieee80211_supported_band *sband;
+        u16 buffersize = 0;
+        int state;
+        DECLARE_MAC_BUF(mac);
+
+        if (!sc->sc_txaggr)
+                return;
+
+        txtid = ATH_AN_2_TID(an, tidno);
+        if (!txtid->paused)
+                return;
+
+        local = hw_to_local(sc->hw);
+        sband = hw->wiphy->bands[hw->conf.channel->band];
+        buffersize = IEEE80211_MIN_AMPDU_BUF <<
+                sband->ht_info.ampdu_factor; /* FIXME */
+        state = sta->ampdu_mlme.tid_state_tx[tidno];
+
+        if (state & HT_ADDBA_RECEIVED_MSK) {
+                txtid->addba_exchangecomplete = 1;
+                txtid->addba_exchangeinprogress = 0;
+                txtid->baw_size = buffersize;
+
+                DPRINTF(sc, ATH_DBG_AGGR,
+                        "%s: Resuming tid, buffersize: %d\n",
+                        __func__,
+                        buffersize);
+
+                ath_tx_resume_tid(sc, txtid);
+        }
+}
+
+static void ath_get_rate(void *priv, struct net_device *dev,
+                         struct ieee80211_supported_band *sband,
+                         struct sk_buff *skb,
+                         struct rate_selection *sel)
+{
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+        struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr);
+        struct sta_info *sta;
+        struct ath_softc *sc = (struct ath_softc *)priv;
+        struct ieee80211_hw *hw = sc->hw;
+        struct ath_tx_info_priv *tx_info_priv;
+        struct ath_rate_node *ath_rc_priv;
+        struct ath_node *an;
+        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+        int is_probe, chk, ret;
+        s8 lowest_idx;
+        __le16 fc = hdr->frame_control;
+        u8 *qc, tid;
+        DECLARE_MAC_BUF(mac);
+
+        DPRINTF(sc, ATH_DBG_RATE, "%s\n", __func__);
+
+        /* allocate driver private area of tx_info */
+        tx_info->driver_data[0] = kzalloc(sizeof(*tx_info_priv), GFP_ATOMIC);
+        ASSERT(tx_info->driver_data[0] != NULL);
+        tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0];
+
+        sta = sta_info_get(local, hdr->addr1);
+        lowest_idx = rate_lowest_index(local, sband, sta);
+        tx_info_priv->min_rate = (sband->bitrates[lowest_idx].bitrate * 2) / 10;
+        /* lowest rate for management and multicast/broadcast frames */
+        if (!ieee80211_is_data(fc) ||
+                        is_multicast_ether_addr(hdr->addr1) || !sta) {
+                sel->rate_idx = lowest_idx;
+                return;
+        }
+
+        ath_rc_priv = sta->rate_ctrl_priv;
+
+        /* Find tx rate for unicast frames */
+        ath_rate_findrate(sc, ath_rc_priv,
+                          ATH_11N_TXMAXTRY, 4,
+                          ATH_RC_PROBE_ALLOWED,
+                          tx_info_priv->rcs,
+                          &is_probe,
+                          false);
+        if (is_probe)
+                sel->probe_idx = ((struct ath_tx_ratectrl *)
+                        sta->rate_ctrl_priv)->probe_rate;
+
+        /* Ratecontrol sometimes returns invalid rate index */
+        if (tx_info_priv->rcs[0].rix != 0xff)
+                ath_rc_priv->prev_data_rix = tx_info_priv->rcs[0].rix;
+        else
+                tx_info_priv->rcs[0].rix = ath_rc_priv->prev_data_rix;
+
+        sel->rate_idx = tx_info_priv->rcs[0].rix;
+
+        /* Check if aggregation has to be enabled for this tid */
+
+        if (hw->conf.ht_conf.ht_supported) {
+                if (ieee80211_is_data_qos(fc)) {
+                        qc = ieee80211_get_qos_ctl(hdr);
+                        tid = qc[0] & 0xf;
+
+                        spin_lock_bh(&sc->node_lock);
+                        an = ath_node_find(sc, hdr->addr1);
+                        spin_unlock_bh(&sc->node_lock);
+
+                        if (!an) {
+                                DPRINTF(sc, ATH_DBG_AGGR,
+                                        "%s: Node not found to "
+                                        "init/chk TX aggr\n", __func__);
+                                return;
+                        }
+
+                        chk = ath_tx_aggr_check(sc, an, tid);
+                        if (chk == AGGR_REQUIRED) {
+                                ret = ieee80211_start_tx_ba_session(hw,
+                                        hdr->addr1, tid);
+                                if (ret)
+                                        DPRINTF(sc, ATH_DBG_AGGR,
+                                                "%s: Unable to start tx "
+                                                "aggr for: %s\n",
+                                                __func__,
+                                                print_mac(mac, hdr->addr1));
+                                else
+                                        DPRINTF(sc, ATH_DBG_AGGR,
+                                                "%s: Started tx aggr for: %s\n",
+                                                __func__,
+                                                print_mac(mac, hdr->addr1));
+                        } else if (chk == AGGR_EXCHANGE_PROGRESS)
+                                ath_tx_aggr_resp(sc, sta, an, tid);
+                }
+        }
+}
+
+static void ath_rate_init(void *priv, void *priv_sta,
+                          struct ieee80211_local *local,
+                          struct sta_info *sta)
+{
+        struct ieee80211_supported_band *sband;
+        struct ieee80211_hw *hw = local_to_hw(local);
+        struct ieee80211_conf *conf = &local->hw.conf;
+        struct ath_softc *sc = hw->priv;
+        int i, j = 0;
+
+        DPRINTF(sc, ATH_DBG_RATE, "%s\n", __func__);
+
+        sband = local->hw.wiphy->bands[local->hw.conf.channel->band];
+        sta->txrate_idx = rate_lowest_index(local, sband, sta);
+
+        ath_setup_rates(local, sta);
+        if (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) {
+                for (i = 0; i < MCS_SET_SIZE; i++) {
+                        if (conf->ht_conf.supp_mcs_set[i/8] & (1<<(i%8)))
+                                ((struct ath_rate_node *)
+                                priv_sta)->neg_ht_rates.rs_rates[j++] = i;
+                        if (j == ATH_RATE_MAX)
+                                break;
+                }
+                ((struct ath_rate_node *)priv_sta)->neg_ht_rates.rs_nrates = j;
+        }
+        ath_rc_node_update(hw, priv_sta);
+}
+
+static void ath_rate_clear(void *priv)
+{
+        return;
+}
+
+static void *ath_rate_alloc(struct ieee80211_local *local)
+{
+        struct ieee80211_hw *hw = local_to_hw(local);
+        struct ath_softc *sc = hw->priv;
+
+        DPRINTF(sc, ATH_DBG_RATE, "%s", __func__);
+        return local->hw.priv;
+}
+
+static void ath_rate_free(void *priv)
+{
+        return;
+}
+
+static void *ath_rate_alloc_sta(void *priv, gfp_t gfp)
+{
+        struct ath_softc *sc = priv;
+        struct ath_vap *avp = sc->sc_vaps[0];
+        struct ath_rate_node *rate_priv;
+
+        DPRINTF(sc, ATH_DBG_RATE, "%s", __func__);
+        rate_priv = ath_rate_node_alloc(avp, sc->sc_rc, gfp);
+        if (!rate_priv) {
+                DPRINTF(sc, ATH_DBG_FATAL, "%s:Unable to allocate"
+                                "private rate control structure", __func__);
+                return NULL;
+        }
+        ath_rc_sib_init(rate_priv);
+        return rate_priv;
+}
+
+static void ath_rate_free_sta(void *priv, void *priv_sta)
+{
+        struct ath_rate_node *rate_priv = priv_sta;
+        struct ath_softc *sc = priv;
+
+        DPRINTF(sc, ATH_DBG_RATE, "%s", __func__);
+        ath_rate_node_free(rate_priv);
+}
+
+static struct rate_control_ops ath_rate_ops = {
+        .module = NULL,
+        .name = "ath9k_rate_control",
+        .tx_status = ath_tx_status,
+        .get_rate = ath_get_rate,
+        .rate_init = ath_rate_init,
+        .clear = ath_rate_clear,
+        .alloc = ath_rate_alloc,
+        .free = ath_rate_free,
+        .alloc_sta = ath_rate_alloc_sta,
+        .free_sta = ath_rate_free_sta
+};
+
+int ath_rate_control_register(void)
+{
+        return ieee80211_rate_control_register(&ath_rate_ops);
+}
+
+void ath_rate_control_unregister(void)
+{
+        ieee80211_rate_control_unregister(&ath_rate_ops);
+}
+
diff --git a/drivers/net/wireless/ath9k/rc.h b/drivers/net/wireless/ath9k/rc.h
new file mode 100644
index 000000000000..71aef9c75232
--- /dev/null
+++ b/drivers/net/wireless/ath9k/rc.h
@@ -0,0 +1,316 @@
+/*
+ * Copyright (c) 2004 Sam Leffler, Errno Consulting
+ * Copyright (c) 2004 Video54 Technologies, Inc.
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef RC_H
+#define RC_H
+
+#include "ath9k.h"
+/*
+ * Interface definitions for transmit rate control modules for the
+ * Atheros driver.
+ *
+ * A rate control module is responsible for choosing the transmit rate
+ * for each data frame.  Management+control frames are always sent at
+ * a fixed rate.
+ *
+ * Only one module may be present at a time; the driver references
+ * rate control interfaces by symbol name.  If multiple modules are
+ * to be supported we'll need to switch to a registration-based scheme
+ * as is currently done, for example, for authentication modules.
+ *
+ * An instance of the rate control module is attached to each device
+ * at attach time and detached when the device is destroyed.  The module
+ * may associate data with each device and each node (station).  Both
+ * sets of storage are opaque except for the size of the per-node storage
+ * which must be provided when the module is attached.
+ *
+ * The rate control module is notified for each state transition and
+ * station association/reassociation.  Otherwise it is queried for a
+ * rate for each outgoing frame and provided status from each transmitted
+ * frame.  Any ancillary processing is the responsibility of the module
+ * (e.g. if periodic processing is required then the module should setup
+ * it's own timer).
+ *
+ * In addition to the transmit rate for each frame the module must also
+ * indicate the number of attempts to make at the specified rate.  If this
+ * number is != ATH_TXMAXTRY then an additional callback is made to setup
+ * additional transmit state.  The rate control code is assumed to write
+ * this additional data directly to the transmit descriptor.
+ */
+
+struct ath_softc;
+
+#define TRUE 1
+#define FALSE 0
+
+#define ATH_RATE_MAX    30
+#define MCS_SET_SIZE    128
+
+enum ieee80211_fixed_rate_mode {
+        IEEE80211_FIXED_RATE_NONE  = 0,
+        IEEE80211_FIXED_RATE_MCS   = 1  /* HT rates */
+};
+
+/*
+ * Use the hal os glue code to get ms time
+ */
+#define IEEE80211_RATE_IDX_ENTRY(val, idx) (((val&(0xff<<(idx*8)))>>(idx*8)))
+
+#define SHORT_PRE 1
+#define LONG_PRE 0
+
+#define WLAN_PHY_HT_20_SS       WLAN_RC_PHY_HT_20_SS
+#define WLAN_PHY_HT_20_DS       WLAN_RC_PHY_HT_20_DS
+#define WLAN_PHY_HT_20_DS_HGI   WLAN_RC_PHY_HT_20_DS_HGI
+#define WLAN_PHY_HT_40_SS       WLAN_RC_PHY_HT_40_SS
+#define WLAN_PHY_HT_40_SS_HGI   WLAN_RC_PHY_HT_40_SS_HGI
+#define WLAN_PHY_HT_40_DS       WLAN_RC_PHY_HT_40_DS
+#define WLAN_PHY_HT_40_DS_HGI   WLAN_RC_PHY_HT_40_DS_HGI
+
+#define WLAN_PHY_OFDM   PHY_OFDM
+#define WLAN_PHY_CCK    PHY_CCK
+
+#define TRUE_20         0x2
+#define TRUE_40         0x4
+#define TRUE_2040       (TRUE_20|TRUE_40)
+#define TRUE_ALL        (TRUE_2040|TRUE)
+
+enum {
+        WLAN_RC_PHY_HT_20_SS = 4,
+        WLAN_RC_PHY_HT_20_DS,
+        WLAN_RC_PHY_HT_40_SS,
+        WLAN_RC_PHY_HT_40_DS,
+        WLAN_RC_PHY_HT_20_SS_HGI,
+        WLAN_RC_PHY_HT_20_DS_HGI,
+        WLAN_RC_PHY_HT_40_SS_HGI,
+        WLAN_RC_PHY_HT_40_DS_HGI,
+        WLAN_RC_PHY_MAX
+};
+
+#define WLAN_RC_PHY_DS(_phy)   ((_phy == WLAN_RC_PHY_HT_20_DS)           \
+        || (_phy == WLAN_RC_PHY_HT_40_DS)        \
+        || (_phy == WLAN_RC_PHY_HT_20_DS_HGI)    \
+        || (_phy == WLAN_RC_PHY_HT_40_DS_HGI))
+#define WLAN_RC_PHY_40(_phy)   ((_phy == WLAN_RC_PHY_HT_40_SS)           \
+        || (_phy == WLAN_RC_PHY_HT_40_DS)        \
+        || (_phy == WLAN_RC_PHY_HT_40_SS_HGI)    \
+        || (_phy == WLAN_RC_PHY_HT_40_DS_HGI))
+#define WLAN_RC_PHY_SGI(_phy)  ((_phy == WLAN_RC_PHY_HT_20_SS_HGI)      \
+        || (_phy == WLAN_RC_PHY_HT_20_DS_HGI)   \
+        || (_phy == WLAN_RC_PHY_HT_40_SS_HGI)   \
+        || (_phy == WLAN_RC_PHY_HT_40_DS_HGI))
+
+#define WLAN_RC_PHY_HT(_phy)    (_phy >= WLAN_RC_PHY_HT_20_SS)
+
+/* Returns the capflag mode */
+#define WLAN_RC_CAP_MODE(capflag) (((capflag & WLAN_RC_HT_FLAG) ?       \
+                (capflag & WLAN_RC_40_FLAG) ? TRUE_40 : TRUE_20 : TRUE))
+
+/* Return TRUE if flag supports HT20 && client supports HT20 or
+ * return TRUE if flag supports HT40 && client supports HT40.
+ * This is used becos some rates overlap between HT20/HT40.
+ */
+
+#define WLAN_RC_PHY_HT_VALID(flag, capflag) (((flag & TRUE_20) && !(capflag \
+                                & WLAN_RC_40_FLAG)) || ((flag & TRUE_40) && \
+                                  (capflag & WLAN_RC_40_FLAG)))
+
+#define WLAN_RC_DS_FLAG         (0x01)
+#define WLAN_RC_40_FLAG         (0x02)
+#define WLAN_RC_SGI_FLAG        (0x04)
+#define WLAN_RC_HT_FLAG         (0x08)
+
+/* Index into the rate table */
+#define INIT_RATE_MAX_20        23
+#define INIT_RATE_MAX_40        40
+
+#define RATE_TABLE_SIZE         64
+
+/* XXX: Convert to kdoc */
+struct ath_rate_table {
+        int rate_cnt;
+        struct {
+                int valid;            /* Valid for use in rate control */
+                int valid_single_stream;/* Valid for use in rate control
+                                        for single stream operation */
+                u8 phy;              /* CCK/OFDM/TURBO/XR */
+                u32 ratekbps;         /* Rate in Kbits per second */
+                u32 user_ratekbps;     /* User rate in KBits per second */
+                u8 ratecode;         /* rate that goes into
+                                        hw descriptors */
+                u8 short_preamble;    /* Mask for enabling short preamble
+                                                in rate code for CCK */
+                u8 dot11rate;        /* Value that goes into supported
+                                        rates info element of MLME */
+                u8 ctrl_rate;      /* Index of next lower basic rate,
+                                        used for duration computation */
+                int8_t rssi_ack_validmin;  /* Rate control related */
+                int8_t rssi_ack_deltamin;  /* Rate control related */
+                u8 base_index;        /* base rate index */
+                u8 cw40index;        /* 40cap rate index */
+                u8 sgi_index;         /* shortgi rate index */
+                u8 ht_index;          /* shortgi rate index */
+                u32 max_4ms_framelen;   /* Maximum frame length(bytes)
+                                                for 4ms tx duration */
+        } info[RATE_TABLE_SIZE];
+        u32 probe_interval;        /* interval for ratectrl to
+                                        probe for other rates */
+        u32 rssi_reduce_interval;   /* interval for ratectrl
+                                                to reduce RSSI */
+        u8 initial_ratemax;   /* the initial ratemax value used
+                                        in ath_rc_sib_update() */
+};
+
+#define ATH_RC_PROBE_ALLOWED            0x00000001
+#define ATH_RC_MINRATE_LASTRATE         0x00000002
+#define ATH_RC_SHORT_PREAMBLE           0x00000004
+
+struct ath_rc_series {
+        u8    rix;
+        u8    tries;
+        u8    flags;
+        u32   max_4ms_framelen;
+};
+
+/* rcs_flags definition */
+#define ATH_RC_DS_FLAG               0x01
+#define ATH_RC_CW40_FLAG             0x02    /* CW 40 */
+#define ATH_RC_SGI_FLAG              0x04    /* Short Guard Interval */
+#define ATH_RC_HT_FLAG               0x08    /* HT */
+#define ATH_RC_RTSCTS_FLAG           0x10    /* RTS-CTS */
+
+/*
+ * State structures for new rate adaptation code
+ */
+#define MAX_TX_RATE_TBL         64
+#define MAX_TX_RATE_PHY         48
+
+struct ath_tx_ratectrl_state {
+        int8_t rssi_thres; /* required rssi for this rate (dB) */
+        u8 per; /* recent estimate of packet error rate (%) */
+};
+
+struct ath_tx_ratectrl {
+        struct ath_tx_ratectrl_state state[MAX_TX_RATE_TBL]; /* state */
+        int8_t rssi_last;            /* last ack rssi */
+        int8_t rssi_last_lookup;        /* last ack rssi used for lookup */
+        int8_t rssi_last_prev;  /* previous last ack rssi */
+        int8_t rssi_last_prev2; /* 2nd previous last ack rssi */
+        int32_t rssi_sum_cnt;        /* count of rssi_sum for averaging */
+        int32_t rssi_sum_rate;       /* rate that we are averaging */
+        int32_t rssi_sum;           /* running sum of rssi for averaging */
+        u32 valid_txrate_mask;   /* mask of valid rates */
+        u8 rate_table_size;      /* rate table size */
+        u8 rate_max;            /* max rate that has recently worked */
+        u8 probe_rate;          /* rate we are probing at */
+        u32 rssi_time;          /* msec timestamp for last ack rssi */
+        u32 rssi_down_time;      /* msec timestamp for last down step */
+        u32 probe_time;         /* msec timestamp for last probe */
+        u8 hw_maxretry_pktcnt;   /* num packets since we got
+                                        HW max retry error */
+        u8 max_valid_rate;       /* maximum number of valid rate */
+        u8 valid_rate_index[MAX_TX_RATE_TBL]; /* valid rate index */
+        u32 per_down_time;       /* msec timstamp for last
+                                        PER down step */
+
+        /* 11n state */
+        u8  valid_phy_ratecnt[WLAN_RC_PHY_MAX]; /* valid rate count */
+        u8  valid_phy_rateidx[WLAN_RC_PHY_MAX][MAX_TX_RATE_TBL];
+        u8  rc_phy_mode;
+        u8  rate_max_phy;        /* Phy index for the max rate */
+        u32 rate_max_lastused;   /* msec timstamp of when we
+                                        last used rateMaxPhy */
+        u32 probe_interval;     /* interval for ratectrl to probe
+                                        for other rates */
+};
+
+struct ath_rateset {
+        u8 rs_nrates;
+        u8 rs_rates[ATH_RATE_MAX];
+};
+
+/* per-device state */
+struct ath_rate_softc {
+        /* phy tables that contain rate control data */
+        const void *hw_rate_table[ATH9K_MODE_MAX];
+        int fixedrix;   /* -1 or index of fixed rate */
+};
+
+/* per-node state */
+struct ath_rate_node {
+        struct ath_tx_ratectrl tx_ratectrl;     /* rate control state proper */
+        u32 prev_data_rix;      /* rate idx of last data frame */
+
+        /* map of rate ix -> negotiated rate set ix */
+        u8 rixmap[MAX_TX_RATE_TBL];
+
+        /* map of ht rate ix -> negotiated rate set ix */
+        u8 ht_rixmap[MAX_TX_RATE_TBL];
+
+        u8 ht_cap;              /* ht capabilities */
+        u8 ant_tx;              /* current transmit antenna */
+
+        u8 single_stream;   /* When TRUE, only single
+                                stream Tx possible */
+        struct ath_rateset neg_rates;   /* Negotiated rates */
+        struct ath_rateset neg_ht_rates;        /* Negotiated HT rates */
+        struct ath_rate_softc *asc; /* back pointer to atheros softc */
+        struct ath_vap *avp;    /* back pointer to vap */
+};
+
+/* Driver data of ieee80211_tx_info */
+struct ath_tx_info_priv {
+        struct ath_rc_series rcs[4];
+        struct ath_tx_status tx;
+        int n_frames;
+        int n_bad_frames;
+        u8 min_rate;
+};
+
+/*
+ * Attach/detach a rate control module.
+ */
+struct ath_rate_softc *ath_rate_attach(struct ath_hal *ah);
+void ath_rate_detach(struct ath_rate_softc *asc);
+
+/*
+ * Update/reset rate control state for 802.11 state transitions.
+ * Important mostly as the analog to ath_rate_newassoc when operating
+ * in station mode.
+ */
+void ath_rc_node_update(struct ieee80211_hw *hw, struct ath_rate_node *rc_priv);
+void ath_rate_newstate(struct ath_softc *sc, struct ath_vap *avp);
+
+/*
+ * Return the tx rate series.
+ */
+void ath_rate_findrate(struct ath_softc *sc, struct ath_rate_node *ath_rc_priv,
+                       int num_tries, int num_rates,
+                       unsigned int rcflag, struct ath_rc_series[],
+                       int *is_probe, int isretry);
+/*
+ * Return rate index for given Dot11 Rate.
+ */
+u8 ath_rate_findrateix(struct ath_softc *sc,
+                             u8 dot11_rate);
+
+/* Routines to register/unregister rate control algorithm */
+int ath_rate_control_register(void);
+void ath_rate_control_unregister(void);
+
+#endif /* RC_H */
diff --git a/drivers/net/wireless/ath9k/recv.c b/drivers/net/wireless/ath9k/recv.c
new file mode 100644
index 000000000000..2fe806175c01
--- /dev/null
+++ b/drivers/net/wireless/ath9k/recv.c
@@ -0,0 +1,1318 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Implementation of receive path.
+ */
+
+#include "core.h"
+
+/*
+ * Setup and link descriptors.
+ *
+ * 11N: we can no longer afford to self link the last descriptor.
+ * MAC acknowledges BA status as long as it copies frames to host
+ * buffer (or rx fifo). This can incorrectly acknowledge packets
+ * to a sender if last desc is self-linked.
+ *
+ * NOTE: Caller should hold the rxbuf lock.
+ */
+
+static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_desc *ds;
+        struct sk_buff *skb;
+
+        ATH_RXBUF_RESET(bf);
+
+        ds = bf->bf_desc;
+        ds->ds_link = 0;    /* link to null */
+        ds->ds_data = bf->bf_buf_addr;
+
+        /* XXX For RADAR?
+         * virtual addr of the beginning of the buffer. */
+        skb = bf->bf_mpdu;
+        ASSERT(skb != NULL);
+        ds->ds_vdata = skb->data;
+
+        /* setup rx descriptors */
+        ath9k_hw_setuprxdesc(ah,
+                             ds,
+                             skb_tailroom(skb),   /* buffer size */
+                             0);
+
+        if (sc->sc_rxlink == NULL)
+                ath9k_hw_putrxbuf(ah, bf->bf_daddr);
+        else
+                *sc->sc_rxlink = bf->bf_daddr;
+
+        sc->sc_rxlink = &ds->ds_link;
+        ath9k_hw_rxena(ah);
+}
+
+/* Process received BAR frame */
+
+static int ath_bar_rx(struct ath_softc *sc,
+                      struct ath_node *an,
+                      struct sk_buff *skb)
+{
+        struct ieee80211_bar *bar;
+        struct ath_arx_tid *rxtid;
+        struct sk_buff *tskb;
+        struct ath_recv_status *rx_status;
+        int tidno, index, cindex;
+        u16 seqno;
+
+        /* look at BAR contents  */
+
+        bar = (struct ieee80211_bar *)skb->data;
+        tidno = (le16_to_cpu(bar->control) & IEEE80211_BAR_CTL_TID_M)
+                >> IEEE80211_BAR_CTL_TID_S;
+        seqno = le16_to_cpu(bar->start_seq_num) >> IEEE80211_SEQ_SEQ_SHIFT;
+
+        /* process BAR - indicate all pending RX frames till the BAR seqno */
+
+        rxtid = &an->an_aggr.rx.tid[tidno];
+
+        spin_lock_bh(&rxtid->tidlock);
+
+        /* get relative index */
+
+        index = ATH_BA_INDEX(rxtid->seq_next, seqno);
+
+        /* drop BAR if old sequence (index is too large) */
+
+        if ((index > rxtid->baw_size) &&
+            (index > (IEEE80211_SEQ_MAX - (rxtid->baw_size << 2))))
+                /* discard frame, ieee layer may not treat frame as a dup */
+                goto unlock_and_free;
+
+        /* complete receive processing for all pending frames upto BAR seqno */
+
+        cindex = (rxtid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
+        while ((rxtid->baw_head != rxtid->baw_tail) &&
+               (rxtid->baw_head != cindex)) {
+                tskb = rxtid->rxbuf[rxtid->baw_head].rx_wbuf;
+                rx_status = &rxtid->rxbuf[rxtid->baw_head].rx_status;
+                rxtid->rxbuf[rxtid->baw_head].rx_wbuf = NULL;
+
+                if (tskb != NULL)
+                        ath_rx_subframe(an, tskb, rx_status);
+
+                INCR(rxtid->baw_head, ATH_TID_MAX_BUFS);
+                INCR(rxtid->seq_next, IEEE80211_SEQ_MAX);
+        }
+
+        /* ... and indicate rest of the frames in-order */
+
+        while (rxtid->baw_head != rxtid->baw_tail &&
+               rxtid->rxbuf[rxtid->baw_head].rx_wbuf != NULL) {
+                tskb = rxtid->rxbuf[rxtid->baw_head].rx_wbuf;
+                rx_status = &rxtid->rxbuf[rxtid->baw_head].rx_status;
+                rxtid->rxbuf[rxtid->baw_head].rx_wbuf = NULL;
+
+                ath_rx_subframe(an, tskb, rx_status);
+
+                INCR(rxtid->baw_head, ATH_TID_MAX_BUFS);
+                INCR(rxtid->seq_next, IEEE80211_SEQ_MAX);
+        }
+
+unlock_and_free:
+        spin_unlock_bh(&rxtid->tidlock);
+        /* free bar itself */
+        dev_kfree_skb(skb);
+        return IEEE80211_FTYPE_CTL;
+}
+
+/* Function to handle a subframe of aggregation when HT is enabled */
+
+static int ath_ampdu_input(struct ath_softc *sc,
+                           struct ath_node *an,
+                           struct sk_buff *skb,
+                           struct ath_recv_status *rx_status)
+{
+        struct ieee80211_hdr *hdr;
+        struct ath_arx_tid *rxtid;
+        struct ath_rxbuf *rxbuf;
+        u8 type, subtype;
+        u16 rxseq;
+        int tid = 0, index, cindex, rxdiff;
+        __le16 fc;
+        u8 *qc;
+
+        hdr = (struct ieee80211_hdr *)skb->data;
+        fc = hdr->frame_control;
+
+        /* collect stats of frames with non-zero version */
+
+        if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_VERS) != 0) {
+                dev_kfree_skb(skb);
+                return -1;
+        }
+
+        type = le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_FTYPE;
+        subtype = le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_STYPE;
+
+        if (ieee80211_is_back_req(fc))
+                return ath_bar_rx(sc, an, skb);
+
+        /* special aggregate processing only for qos unicast data frames */
+
+        if (!ieee80211_is_data(fc) ||
+            !ieee80211_is_data_qos(fc) ||
+            is_multicast_ether_addr(hdr->addr1))
+                return ath_rx_subframe(an, skb, rx_status);
+
+        /* lookup rx tid state */
+
+        if (ieee80211_is_data_qos(fc)) {
+                qc = ieee80211_get_qos_ctl(hdr);
+                tid = qc[0] & 0xf;
+        }
+
+        if (sc->sc_opmode == ATH9K_M_STA) {
+                /* Drop the frame not belonging to me. */
+                if (memcmp(hdr->addr1, sc->sc_myaddr, ETH_ALEN)) {
+                        dev_kfree_skb(skb);
+                        return -1;
+                }
+        }
+
+        rxtid = &an->an_aggr.rx.tid[tid];
+
+        spin_lock(&rxtid->tidlock);
+
+        rxdiff = (rxtid->baw_tail - rxtid->baw_head) &
+                (ATH_TID_MAX_BUFS - 1);
+
+        /*
+         * If the ADDBA exchange has not been completed by the source,
+         * process via legacy path (i.e. no reordering buffer is needed)
+         */
+        if (!rxtid->addba_exchangecomplete) {
+                spin_unlock(&rxtid->tidlock);
+                return ath_rx_subframe(an, skb, rx_status);
+        }
+
+        /* extract sequence number from recvd frame */
+
+        rxseq = le16_to_cpu(hdr->seq_ctrl) >> IEEE80211_SEQ_SEQ_SHIFT;
+
+        if (rxtid->seq_reset) {
+                rxtid->seq_reset = 0;
+                rxtid->seq_next = rxseq;
+        }
+
+        index = ATH_BA_INDEX(rxtid->seq_next, rxseq);
+
+        /* drop frame if old sequence (index is too large) */
+
+        if (index > (IEEE80211_SEQ_MAX - (rxtid->baw_size << 2))) {
+                /* discard frame, ieee layer may not treat frame as a dup */
+                spin_unlock(&rxtid->tidlock);
+                dev_kfree_skb(skb);
+                return IEEE80211_FTYPE_DATA;
+        }
+
+        /* sequence number is beyond block-ack window */
+
+        if (index >= rxtid->baw_size) {
+
+                /* complete receive processing for all pending frames */
+
+                while (index >= rxtid->baw_size) {
+
+                        rxbuf = rxtid->rxbuf + rxtid->baw_head;
+
+                        if (rxbuf->rx_wbuf != NULL) {
+                                ath_rx_subframe(an, rxbuf->rx_wbuf,
+                                                &rxbuf->rx_status);
+                                rxbuf->rx_wbuf = NULL;
+                        }
+
+                        INCR(rxtid->baw_head, ATH_TID_MAX_BUFS);
+                        INCR(rxtid->seq_next, IEEE80211_SEQ_MAX);
+
+                        index--;
+                }
+        }
+
+        /* add buffer to the recv ba window */
+
+        cindex = (rxtid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
+        rxbuf = rxtid->rxbuf + cindex;
+
+        if (rxbuf->rx_wbuf != NULL) {
+                spin_unlock(&rxtid->tidlock);
+                /* duplicate frame */
+                dev_kfree_skb(skb);
+                return IEEE80211_FTYPE_DATA;
+        }
+
+        rxbuf->rx_wbuf = skb;
+        rxbuf->rx_time = get_timestamp();
+        rxbuf->rx_status = *rx_status;
+
+        /* advance tail if sequence received is newer
+         * than any received so far */
+
+        if (index >= rxdiff) {
+                rxtid->baw_tail = cindex;
+                INCR(rxtid->baw_tail, ATH_TID_MAX_BUFS);
+        }
+
+        /* indicate all in-order received frames */
+
+        while (rxtid->baw_head != rxtid->baw_tail) {
+                rxbuf = rxtid->rxbuf + rxtid->baw_head;
+                if (!rxbuf->rx_wbuf)
+                        break;
+
+                ath_rx_subframe(an, rxbuf->rx_wbuf, &rxbuf->rx_status);
+                rxbuf->rx_wbuf = NULL;
+
+                INCR(rxtid->baw_head, ATH_TID_MAX_BUFS);
+                INCR(rxtid->seq_next, IEEE80211_SEQ_MAX);
+        }
+
+        /*
+         * start a timer to flush all received frames if there are pending
+         * receive frames
+         */
+        if (rxtid->baw_head != rxtid->baw_tail)
+                mod_timer(&rxtid->timer, ATH_RX_TIMEOUT);
+        else
+                del_timer_sync(&rxtid->timer);
+
+        spin_unlock(&rxtid->tidlock);
+        return IEEE80211_FTYPE_DATA;
+}
+
+/* Timer to flush all received sub-frames */
+
+static void ath_rx_timer(unsigned long data)
+{
+        struct ath_arx_tid *rxtid = (struct ath_arx_tid *)data;
+        struct ath_node *an = rxtid->an;
+        struct ath_rxbuf *rxbuf;
+        int nosched;
+
+        spin_lock_bh(&rxtid->tidlock);
+        while (rxtid->baw_head != rxtid->baw_tail) {
+                rxbuf = rxtid->rxbuf + rxtid->baw_head;
+                if (!rxbuf->rx_wbuf) {
+                        INCR(rxtid->baw_head, ATH_TID_MAX_BUFS);
+                        INCR(rxtid->seq_next, IEEE80211_SEQ_MAX);
+                        continue;
+                }
+
+                /*
+                 * Stop if the next one is a very recent frame.
+                 *
+                 * Call get_timestamp in every iteration to protect against the
+                 * case in which a new frame is received while we are executing
+                 * this function. Using a timestamp obtained before entering
+                 * the loop could lead to a very large time interval
+                 * (a negative value typecast to unsigned), breaking the
+                 * function's logic.
+                 */
+                if ((get_timestamp() - rxbuf->rx_time) <
+                        (ATH_RX_TIMEOUT * HZ / 1000))
+                        break;
+
+                ath_rx_subframe(an, rxbuf->rx_wbuf,
+                                &rxbuf->rx_status);
+                rxbuf->rx_wbuf = NULL;
+
+                INCR(rxtid->baw_head, ATH_TID_MAX_BUFS);
+                INCR(rxtid->seq_next, IEEE80211_SEQ_MAX);
+        }
+
+        /*
+         * start a timer to flush all received frames if there are pending
+         * receive frames
+         */
+        if (rxtid->baw_head != rxtid->baw_tail)
+                nosched = 0;
+        else
+                nosched = 1; /* no need to re-arm the timer again */
+
+        spin_unlock_bh(&rxtid->tidlock);
+}
+
+/* Free all pending sub-frames in the re-ordering buffer */
+
+static void ath_rx_flush_tid(struct ath_softc *sc,
+        struct ath_arx_tid *rxtid, int drop)
+{
+        struct ath_rxbuf *rxbuf;
+
+        spin_lock_bh(&rxtid->tidlock);
+        while (rxtid->baw_head != rxtid->baw_tail) {
+                rxbuf = rxtid->rxbuf + rxtid->baw_head;
+                if (!rxbuf->rx_wbuf) {
+                        INCR(rxtid->baw_head, ATH_TID_MAX_BUFS);
+                        INCR(rxtid->seq_next, IEEE80211_SEQ_MAX);
+                        continue;
+                }
+
+                if (drop)
+                        dev_kfree_skb(rxbuf->rx_wbuf);
+                else
+                        ath_rx_subframe(rxtid->an,
+                                        rxbuf->rx_wbuf,
+                                        &rxbuf->rx_status);
+
+                rxbuf->rx_wbuf = NULL;
+
+                INCR(rxtid->baw_head, ATH_TID_MAX_BUFS);
+                INCR(rxtid->seq_next, IEEE80211_SEQ_MAX);
+        }
+        spin_unlock_bh(&rxtid->tidlock);
+}
+
+static struct sk_buff *ath_rxbuf_alloc(struct ath_softc *sc,
+        u32 len)
+{
+        struct sk_buff *skb;
+        u32 off;
+
+        /*
+         * Cache-line-align.  This is important (for the
+         * 5210 at least) as not doing so causes bogus data
+         * in rx'd frames.
+         */
+
+        skb = dev_alloc_skb(len + sc->sc_cachelsz - 1);
+        if (skb != NULL) {
+                off = ((unsigned long) skb->data) % sc->sc_cachelsz;
+                if (off != 0)
+                        skb_reserve(skb, sc->sc_cachelsz - off);
+        } else {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: skbuff alloc of size %u failed\n",
+                        __func__, len);
+                return NULL;
+        }
+
+        return skb;
+}
+
+static void ath_rx_requeue(struct ath_softc *sc, struct sk_buff *skb)
+{
+        struct ath_buf *bf = ATH_RX_CONTEXT(skb)->ctx_rxbuf;
+
+        ASSERT(bf != NULL);
+
+        spin_lock_bh(&sc->sc_rxbuflock);
+        if (bf->bf_status & ATH_BUFSTATUS_STALE) {
+                /*
+                 * This buffer is still held for hw acess.
+                 * Mark it as free to be re-queued it later.
+                 */
+                bf->bf_status |= ATH_BUFSTATUS_FREE;
+        } else {
+                /* XXX: we probably never enter here, remove after
+                 * verification */
+                list_add_tail(&bf->list, &sc->sc_rxbuf);
+                ath_rx_buf_link(sc, bf);
+        }
+        spin_unlock_bh(&sc->sc_rxbuflock);
+}
+
+/*
+ * The skb indicated to upper stack won't be returned to us.
+ * So we have to allocate a new one and queue it by ourselves.
+ */
+static int ath_rx_indicate(struct ath_softc *sc,
+                           struct sk_buff *skb,
+                           struct ath_recv_status *status,
+                           u16 keyix)
+{
+        struct ath_buf *bf = ATH_RX_CONTEXT(skb)->ctx_rxbuf;
+        struct sk_buff *nskb;
+        int type;
+
+        /* indicate frame to the stack, which will free the old skb. */
+        type = ath__rx_indicate(sc, skb, status, keyix);
+
+        /* allocate a new skb and queue it to for H/W processing */
+        nskb = ath_rxbuf_alloc(sc, sc->sc_rxbufsize);
+        if (nskb != NULL) {
+                bf->bf_mpdu = nskb;
+                bf->bf_buf_addr = ath_skb_map_single(sc,
+                        nskb,
+                        PCI_DMA_FROMDEVICE,
+                        /* XXX: Remove get_dma_mem_context() */
+                        get_dma_mem_context(bf, bf_dmacontext));
+                ATH_RX_CONTEXT(nskb)->ctx_rxbuf = bf;
+
+                /* queue the new wbuf to H/W */
+                ath_rx_requeue(sc, nskb);
+        }
+
+        return type;
+}
+
+static void ath_opmode_init(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        u32 rfilt, mfilt[2];
+
+        /* configure rx filter */
+        rfilt = ath_calcrxfilter(sc);
+        ath9k_hw_setrxfilter(ah, rfilt);
+
+        /* configure bssid mask */
+        if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
+                ath9k_hw_setbssidmask(ah, sc->sc_bssidmask);
+
+        /* configure operational mode */
+        ath9k_hw_setopmode(ah);
+
+        /* Handle any link-level address change. */
+        ath9k_hw_setmac(ah, sc->sc_myaddr);
+
+        /* calculate and install multicast filter */
+        mfilt[0] = mfilt[1] = ~0;
+
+        ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
+        DPRINTF(sc, ATH_DBG_CONFIG ,
+                "%s: RX filter 0x%x, MC filter %08x:%08x\n",
+                __func__, rfilt, mfilt[0], mfilt[1]);
+}
+
+int ath_rx_init(struct ath_softc *sc, int nbufs)
+{
+        struct sk_buff *skb;
+        struct ath_buf *bf;
+        int error = 0;
+
+        do {
+                spin_lock_init(&sc->sc_rxflushlock);
+                sc->sc_rxflush = 0;
+                spin_lock_init(&sc->sc_rxbuflock);
+
+                /*
+                 * Cisco's VPN software requires that drivers be able to
+                 * receive encapsulated frames that are larger than the MTU.
+                 * Since we can't be sure how large a frame we'll get, setup
+                 * to handle the larges on possible.
+                 */
+                sc->sc_rxbufsize = roundup(IEEE80211_MAX_MPDU_LEN,
+                                           min(sc->sc_cachelsz,
+                                               (u16)64));
+
+                DPRINTF(sc, ATH_DBG_CONFIG, "%s: cachelsz %u rxbufsize %u\n",
+                        __func__, sc->sc_cachelsz, sc->sc_rxbufsize);
+
+                /* Initialize rx descriptors */
+
+                error = ath_descdma_setup(sc, &sc->sc_rxdma, &sc->sc_rxbuf,
+                                          "rx", nbufs, 1);
+                if (error != 0) {
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: failed to allocate rx descriptors: %d\n",
+                                __func__, error);
+                        break;
+                }
+
+                /* Pre-allocate a wbuf for each rx buffer */
+
+                list_for_each_entry(bf, &sc->sc_rxbuf, list) {
+                        skb = ath_rxbuf_alloc(sc, sc->sc_rxbufsize);
+                        if (skb == NULL) {
+                                error = -ENOMEM;
+                                break;
+                        }
+
+                        bf->bf_mpdu = skb;
+                        bf->bf_buf_addr =
+                                ath_skb_map_single(sc, skb, PCI_DMA_FROMDEVICE,
+                                       get_dma_mem_context(bf, bf_dmacontext));
+                        ATH_RX_CONTEXT(skb)->ctx_rxbuf = bf;
+                }
+                sc->sc_rxlink = NULL;
+
+        } while (0);
+
+        if (error)
+                ath_rx_cleanup(sc);
+
+        return error;
+}
+
+/* Reclaim all rx queue resources */
+
+void ath_rx_cleanup(struct ath_softc *sc)
+{
+        struct sk_buff *skb;
+        struct ath_buf *bf;
+
+        list_for_each_entry(bf, &sc->sc_rxbuf, list) {
+                skb = bf->bf_mpdu;
+                if (skb)
+                        dev_kfree_skb(skb);
+        }
+
+        /* cleanup rx descriptors */
+
+        if (sc->sc_rxdma.dd_desc_len != 0)
+                ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf);
+}
+
+/*
+ * Calculate the receive filter according to the
+ * operating mode and state:
+ *
+ * o always accept unicast, broadcast, and multicast traffic
+ * o maintain current state of phy error reception (the hal
+ *   may enable phy error frames for noise immunity work)
+ * o probe request frames are accepted only when operating in
+ *   hostap, adhoc, or monitor modes
+ * o enable promiscuous mode according to the interface state
+ * o accept beacons:
+ *   - when operating in adhoc mode so the 802.11 layer creates
+ *     node table entries for peers,
+ *   - when operating in station mode for collecting rssi data when
+ *     the station is otherwise quiet, or
+ *   - when operating as a repeater so we see repeater-sta beacons
+ *   - when scanning
+ */
+
+u32 ath_calcrxfilter(struct ath_softc *sc)
+{
+#define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
+        u32 rfilt;
+
+        rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
+                | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
+                | ATH9K_RX_FILTER_MCAST;
+
+        /* If not a STA, enable processing of Probe Requests */
+        if (sc->sc_opmode != ATH9K_M_STA)
+                rfilt |= ATH9K_RX_FILTER_PROBEREQ;
+
+        /* Can't set HOSTAP into promiscous mode */
+        if (sc->sc_opmode == ATH9K_M_MONITOR) {
+                rfilt |= ATH9K_RX_FILTER_PROM;
+                /* ??? To prevent from sending ACK */
+                rfilt &= ~ATH9K_RX_FILTER_UCAST;
+        }
+
+        if (sc->sc_opmode == ATH9K_M_STA || sc->sc_opmode == ATH9K_M_IBSS ||
+            sc->sc_scanning)
+                rfilt |= ATH9K_RX_FILTER_BEACON;
+
+        /* If in HOSTAP mode, want to enable reception of PSPOLL frames
+           & beacon frames */
+        if (sc->sc_opmode == ATH9K_M_HOSTAP)
+                rfilt |= (ATH9K_RX_FILTER_BEACON | ATH9K_RX_FILTER_PSPOLL);
+        return rfilt;
+#undef RX_FILTER_PRESERVE
+}
+
+/* Enable the receive h/w following a reset. */
+
+int ath_startrecv(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_buf *bf, *tbf;
+
+        spin_lock_bh(&sc->sc_rxbuflock);
+        if (list_empty(&sc->sc_rxbuf))
+                goto start_recv;
+
+        sc->sc_rxlink = NULL;
+        list_for_each_entry_safe(bf, tbf, &sc->sc_rxbuf, list) {
+                if (bf->bf_status & ATH_BUFSTATUS_STALE) {
+                        /* restarting h/w, no need for holding descriptors */
+                        bf->bf_status &= ~ATH_BUFSTATUS_STALE;
+                        /*
+                         * Upper layer may not be done with the frame yet so
+                         * we can't just re-queue it to hardware. Remove it
+                         * from h/w queue. It'll be re-queued when upper layer
+                         * returns the frame and ath_rx_requeue_mpdu is called.
+                         */
+                        if (!(bf->bf_status & ATH_BUFSTATUS_FREE)) {
+                                list_del(&bf->list);
+                                continue;
+                        }
+                }
+                /* chain descriptors */
+                ath_rx_buf_link(sc, bf);
+        }
+
+        /* We could have deleted elements so the list may be empty now */
+        if (list_empty(&sc->sc_rxbuf))
+                goto start_recv;
+
+        bf = list_first_entry(&sc->sc_rxbuf, struct ath_buf, list);
+        ath9k_hw_putrxbuf(ah, bf->bf_daddr);
+        ath9k_hw_rxena(ah);      /* enable recv descriptors */
+
+start_recv:
+        spin_unlock_bh(&sc->sc_rxbuflock);
+        ath_opmode_init(sc);        /* set filters, etc. */
+        ath9k_hw_startpcureceive(ah);   /* re-enable PCU/DMA engine */
+        return 0;
+}
+
+/* Disable the receive h/w in preparation for a reset. */
+
+bool ath_stoprecv(struct ath_softc *sc)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        u64 tsf;
+        bool stopped;
+
+        ath9k_hw_stoppcurecv(ah);       /* disable PCU */
+        ath9k_hw_setrxfilter(ah, 0);    /* clear recv filter */
+        stopped = ath9k_hw_stopdmarecv(ah);     /* disable DMA engine */
+        mdelay(3);                      /* 3ms is long enough for 1 frame */
+        tsf = ath9k_hw_gettsf64(ah);
+        sc->sc_rxlink = NULL;           /* just in case */
+        return stopped;
+}
+
+/* Flush receive queue */
+
+void ath_flushrecv(struct ath_softc *sc)
+{
+        /*
+         * ath_rx_tasklet may be used to handle rx interrupt and flush receive
+         * queue at the same time. Use a lock to serialize the access of rx
+         * queue.
+         * ath_rx_tasklet cannot hold the spinlock while indicating packets.
+         * Instead, do not claim the spinlock but check for a flush in
+         * progress (see references to sc_rxflush)
+         */
+        spin_lock_bh(&sc->sc_rxflushlock);
+        sc->sc_rxflush = 1;
+
+        ath_rx_tasklet(sc, 1);
+
+        sc->sc_rxflush = 0;
+        spin_unlock_bh(&sc->sc_rxflushlock);
+}
+
+/* Process an individual frame */
+
+int ath_rx_input(struct ath_softc *sc,
+                 struct ath_node *an,
+                 int is_ampdu,
+                 struct sk_buff *skb,
+                 struct ath_recv_status *rx_status,
+                 enum ATH_RX_TYPE *status)
+{
+        if (is_ampdu && sc->sc_rxaggr) {
+                *status = ATH_RX_CONSUMED;
+                return ath_ampdu_input(sc, an, skb, rx_status);
+        } else {
+                *status = ATH_RX_NON_CONSUMED;
+                return -1;
+        }
+}
+
+/* Process receive queue, as well as LED, etc. */
+
+int ath_rx_tasklet(struct ath_softc *sc, int flush)
+{
+#define PA2DESC(_sc, _pa)                                               \
+        ((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc +         \
+                             ((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
+
+        struct ath_buf *bf, *bf_held = NULL;
+        struct ath_desc *ds;
+        struct ieee80211_hdr *hdr;
+        struct sk_buff *skb = NULL;
+        struct ath_recv_status rx_status;
+        struct ath_hal *ah = sc->sc_ah;
+        int type, rx_processed = 0;
+        u32 phyerr;
+        u8 chainreset = 0;
+        int retval;
+        __le16 fc;
+
+        do {
+                /* If handling rx interrupt and flush is in progress => exit */
+                if (sc->sc_rxflush && (flush == 0))
+                        break;
+
+                spin_lock_bh(&sc->sc_rxbuflock);
+                if (list_empty(&sc->sc_rxbuf)) {
+                        sc->sc_rxlink = NULL;
+                        spin_unlock_bh(&sc->sc_rxbuflock);
+                        break;
+                }
+
+                bf = list_first_entry(&sc->sc_rxbuf, struct ath_buf, list);
+
+                /*
+                 * There is a race condition that BH gets scheduled after sw
+                 * writes RxE and before hw re-load the last descriptor to get
+                 * the newly chained one. Software must keep the last DONE
+                 * descriptor as a holding descriptor - software does so by
+                 * marking it with the STALE flag.
+                 */
+                if (bf->bf_status & ATH_BUFSTATUS_STALE) {
+                        bf_held = bf;
+                        if (list_is_last(&bf_held->list, &sc->sc_rxbuf)) {
+                                /*
+                                 * The holding descriptor is the last
+                                 * descriptor in queue. It's safe to
+                                 * remove the last holding descriptor
+                                 * in BH context.
+                                 */
+                                list_del(&bf_held->list);
+                                bf_held->bf_status &= ~ATH_BUFSTATUS_STALE;
+                                sc->sc_rxlink = NULL;
+
+                                if (bf_held->bf_status & ATH_BUFSTATUS_FREE) {
+                                        list_add_tail(&bf_held->list,
+                                                &sc->sc_rxbuf);
+                                        ath_rx_buf_link(sc, bf_held);
+                                }
+                                spin_unlock_bh(&sc->sc_rxbuflock);
+                                break;
+                        }
+                        bf = list_entry(bf->list.next, struct ath_buf, list);
+                }
+
+                ds = bf->bf_desc;
+                ++rx_processed;
+
+                /*
+                 * Must provide the virtual address of the current
+                 * descriptor, the physical address, and the virtual
+                 * address of the next descriptor in the h/w chain.
+                 * This allows the HAL to look ahead to see if the
+                 * hardware is done with a descriptor by checking the
+                 * done bit in the following descriptor and the address
+                 * of the current descriptor the DMA engine is working
+                 * on.  All this is necessary because of our use of
+                 * a self-linked list to avoid rx overruns.
+                 */
+                retval = ath9k_hw_rxprocdesc(ah,
+                                             ds,
+                                             bf->bf_daddr,
+                                             PA2DESC(sc, ds->ds_link),
+                                             0);
+                if (retval == -EINPROGRESS) {
+                        struct ath_buf *tbf;
+                        struct ath_desc *tds;
+
+                        if (list_is_last(&bf->list, &sc->sc_rxbuf)) {
+                                spin_unlock_bh(&sc->sc_rxbuflock);
+                                break;
+                        }
+
+                        tbf = list_entry(bf->list.next, struct ath_buf, list);
+
+                        /*
+                         * On some hardware the descriptor status words could
+                         * get corrupted, including the done bit. Because of
+                         * this, check if the next descriptor's done bit is
+                         * set or not.
+                         *
+                         * If the next descriptor's done bit is set, the current
+                         * descriptor has been corrupted. Force s/w to discard
+                         * this descriptor and continue...
+                         */
+
+                        tds = tbf->bf_desc;
+                        retval = ath9k_hw_rxprocdesc(ah,
+                                tds, tbf->bf_daddr,
+                                PA2DESC(sc, tds->ds_link), 0);
+                        if (retval == -EINPROGRESS) {
+                                spin_unlock_bh(&sc->sc_rxbuflock);
+                                break;
+                        }
+                }
+
+                /* XXX: we do not support frames spanning
+                 * multiple descriptors */
+                bf->bf_status |= ATH_BUFSTATUS_DONE;
+
+                skb = bf->bf_mpdu;
+                if (skb == NULL) {              /* XXX ??? can this happen */
+                        spin_unlock_bh(&sc->sc_rxbuflock);
+                        continue;
+                }
+                /*
+                 * Now we know it's a completed frame, we can indicate the
+                 * frame. Remove the previous holding descriptor and leave
+                 * this one in the queue as the new holding descriptor.
+                 */
+                if (bf_held) {
+                        list_del(&bf_held->list);
+                        bf_held->bf_status &= ~ATH_BUFSTATUS_STALE;
+                        if (bf_held->bf_status & ATH_BUFSTATUS_FREE) {
+                                list_add_tail(&bf_held->list, &sc->sc_rxbuf);
+                                /* try to requeue this descriptor */
+                                ath_rx_buf_link(sc, bf_held);
+                        }
+                }
+
+                bf->bf_status |= ATH_BUFSTATUS_STALE;
+                bf_held = bf;
+                /*
+                 * Release the lock here in case ieee80211_input() return
+                 * the frame immediately by calling ath_rx_mpdu_requeue().
+                 */
+                spin_unlock_bh(&sc->sc_rxbuflock);
+
+                if (flush) {
+                        /*
+                         * If we're asked to flush receive queue, directly
+                         * chain it back at the queue without processing it.
+                         */
+                        goto rx_next;
+                }
+
+                hdr = (struct ieee80211_hdr *)skb->data;
+                fc = hdr->frame_control;
+                memzero(&rx_status, sizeof(struct ath_recv_status));
+
+                if (ds->ds_rxstat.rs_more) {
+                        /*
+                         * Frame spans multiple descriptors; this
+                         * cannot happen yet as we don't support
+                         * jumbograms.  If not in monitor mode,
+                         * discard the frame.
+                         */
+#ifndef ERROR_FRAMES
+                        /*
+                         * Enable this if you want to see
+                         * error frames in Monitor mode.
+                         */
+                        if (sc->sc_opmode != ATH9K_M_MONITOR)
+                                goto rx_next;
+#endif
+                        /* fall thru for monitor mode handling... */
+                } else if (ds->ds_rxstat.rs_status != 0) {
+                        if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
+                                rx_status.flags |= ATH_RX_FCS_ERROR;
+                        if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY) {
+                                phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
+                                goto rx_next;
+                        }
+
+                        if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT) {
+                                /*
+                                 * Decrypt error. We only mark packet status
+                                 * here and always push up the frame up to let
+                                 * mac80211 handle the actual error case, be
+                                 * it no decryption key or real decryption
+                                 * error. This let us keep statistics there.
+                                 */
+                                rx_status.flags |= ATH_RX_DECRYPT_ERROR;
+                        } else if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC) {
+                                /*
+                                 * Demic error. We only mark frame status here
+                                 * and always push up the frame up to let
+                                 * mac80211 handle the actual error case. This
+                                 * let us keep statistics there. Hardware may
+                                 * post a false-positive MIC error.
+                                 */
+                                if (ieee80211_is_ctl(fc))
+                                        /*
+                                         * Sometimes, we get invalid
+                                         * MIC failures on valid control frames.
+                                         * Remove these mic errors.
+                                         */
+                                        ds->ds_rxstat.rs_status &=
+                                                ~ATH9K_RXERR_MIC;
+                                else
+                                        rx_status.flags |= ATH_RX_MIC_ERROR;
+                        }
+                        /*
+                         * Reject error frames with the exception of
+                         * decryption and MIC failures. For monitor mode,
+                         * we also ignore the CRC error.
+                         */
+                        if (sc->sc_opmode == ATH9K_M_MONITOR) {
+                                if (ds->ds_rxstat.rs_status &
+                                    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
+                                        ATH9K_RXERR_CRC))
+                                        goto rx_next;
+                        } else {
+                                if (ds->ds_rxstat.rs_status &
+                                    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
+                                        goto rx_next;
+                                }
+                        }
+                }
+                /*
+                 * The status portion of the descriptor could get corrupted.
+                 */
+                if (sc->sc_rxbufsize < ds->ds_rxstat.rs_datalen)
+                        goto rx_next;
+                /*
+                 * Sync and unmap the frame.  At this point we're
+                 * committed to passing the sk_buff somewhere so
+                 * clear buf_skb; this means a new sk_buff must be
+                 * allocated when the rx descriptor is setup again
+                 * to receive another frame.
+                 */
+                skb_put(skb, ds->ds_rxstat.rs_datalen);
+                skb->protocol = cpu_to_be16(ETH_P_CONTROL);
+                rx_status.tsf = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp);
+                rx_status.rateieee =
+                        sc->sc_hwmap[ds->ds_rxstat.rs_rate].ieeerate;
+                rx_status.rateKbps =
+                        sc->sc_hwmap[ds->ds_rxstat.rs_rate].rateKbps;
+                rx_status.ratecode = ds->ds_rxstat.rs_rate;
+
+                /* HT rate */
+                if (rx_status.ratecode & 0x80) {
+                        /* TODO - add table to avoid division */
+                        if (ds->ds_rxstat.rs_flags & ATH9K_RX_2040) {
+                                rx_status.flags |= ATH_RX_40MHZ;
+                                rx_status.rateKbps =
+                                        (rx_status.rateKbps * 27) / 13;
+                        }
+                        if (ds->ds_rxstat.rs_flags & ATH9K_RX_GI)
+                                rx_status.rateKbps =
+                                        (rx_status.rateKbps * 10) / 9;
+                        else
+                                rx_status.flags |= ATH_RX_SHORT_GI;
+                }
+
+                /* sc->sc_noise_floor is only available when the station
+                   attaches to an AP, so we use a default value
+                   if we are not yet attached. */
+
+                /* XXX we should use either sc->sc_noise_floor or
+                 * ath_hal_getChanNoise(ah, &sc->sc_curchan)
+                 * to calculate the noise floor.
+                 * However, the value returned by ath_hal_getChanNoise
+                 * seems to be incorrect (-31dBm on the last test),
+                 * so we will use a hard-coded value until we
+                 * figure out what is going on.
+                 */
+                rx_status.abs_rssi =
+                        ds->ds_rxstat.rs_rssi + ATH_DEFAULT_NOISE_FLOOR;
+
+                pci_dma_sync_single_for_cpu(sc->pdev,
+                                            bf->bf_buf_addr,
+                                            skb_tailroom(skb),
+                                            PCI_DMA_FROMDEVICE);
+                pci_unmap_single(sc->pdev,
+                                 bf->bf_buf_addr,
+                                 sc->sc_rxbufsize,
+                                 PCI_DMA_FROMDEVICE);
+
+                /* XXX: Ah! make me more readable, use a helper */
+                if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
+                        if (ds->ds_rxstat.rs_moreaggr == 0) {
+                                rx_status.rssictl[0] =
+                                        ds->ds_rxstat.rs_rssi_ctl0;
+                                rx_status.rssictl[1] =
+                                        ds->ds_rxstat.rs_rssi_ctl1;
+                                rx_status.rssictl[2] =
+                                        ds->ds_rxstat.rs_rssi_ctl2;
+                                rx_status.rssi = ds->ds_rxstat.rs_rssi;
+                                if (ds->ds_rxstat.rs_flags & ATH9K_RX_2040) {
+                                        rx_status.rssiextn[0] =
+                                                ds->ds_rxstat.rs_rssi_ext0;
+                                        rx_status.rssiextn[1] =
+                                                ds->ds_rxstat.rs_rssi_ext1;
+                                        rx_status.rssiextn[2] =
+                                                ds->ds_rxstat.rs_rssi_ext2;
+                                        rx_status.flags |=
+                                                ATH_RX_RSSI_EXTN_VALID;
+                                }
+                                rx_status.flags |= ATH_RX_RSSI_VALID |
+                                        ATH_RX_CHAIN_RSSI_VALID;
+                        }
+                } else {
+                        /*
+                         * Need to insert the "combined" rssi into the
+                         * status structure for upper layer processing
+                         */
+                        rx_status.rssi = ds->ds_rxstat.rs_rssi;
+                        rx_status.flags |= ATH_RX_RSSI_VALID;
+                }
+
+                /* Pass frames up to the stack. */
+
+                type = ath_rx_indicate(sc, skb,
+                        &rx_status, ds->ds_rxstat.rs_keyix);
+
+                /*
+                 * change the default rx antenna if rx diversity chooses the
+                 * other antenna 3 times in a row.
+                 */
+                if (sc->sc_defant != ds->ds_rxstat.rs_antenna) {
+                        if (++sc->sc_rxotherant >= 3)
+                                ath_setdefantenna(sc,
+                                                ds->ds_rxstat.rs_antenna);
+                } else {
+                        sc->sc_rxotherant = 0;
+                }
+
+#ifdef CONFIG_SLOW_ANT_DIV
+                if ((rx_status.flags & ATH_RX_RSSI_VALID) &&
+                    ieee80211_is_beacon(fc)) {
+                        ath_slow_ant_div(&sc->sc_antdiv, hdr, &ds->ds_rxstat);
+                }
+#endif
+                /*
+                 * For frames successfully indicated, the buffer will be
+                 * returned to us by upper layers by calling
+                 * ath_rx_mpdu_requeue, either synchronusly or asynchronously.
+                 * So we don't want to do it here in this loop.
+                 */
+                continue;
+
+rx_next:
+                bf->bf_status |= ATH_BUFSTATUS_FREE;
+        } while (TRUE);
+
+        if (chainreset) {
+                DPRINTF(sc, ATH_DBG_CONFIG,
+                        "%s: Reset rx chain mask. "
+                        "Do internal reset\n", __func__);
+                ASSERT(flush == 0);
+                ath_internal_reset(sc);
+        }
+
+        return 0;
+#undef PA2DESC
+}
+
+/* Process ADDBA request in per-TID data structure */
+
+int ath_rx_aggr_start(struct ath_softc *sc,
+                      const u8 *addr,
+                      u16 tid,
+                      u16 *ssn)
+{
+        struct ath_arx_tid *rxtid;
+        struct ath_node *an;
+        struct ieee80211_hw *hw = sc->hw;
+        struct ieee80211_supported_band *sband;
+        u16 buffersize = 0;
+
+        spin_lock_bh(&sc->node_lock);
+        an = ath_node_find(sc, (u8 *) addr);
+        spin_unlock_bh(&sc->node_lock);
+
+        if (!an) {
+                DPRINTF(sc, ATH_DBG_AGGR,
+                        "%s: Node not found to initialize RX aggregation\n",
+                        __func__);
+                return -1;
+        }
+
+        sband = hw->wiphy->bands[hw->conf.channel->band];
+        buffersize = IEEE80211_MIN_AMPDU_BUF <<
+                sband->ht_info.ampdu_factor; /* FIXME */
+
+        rxtid = &an->an_aggr.rx.tid[tid];
+
+        spin_lock_bh(&rxtid->tidlock);
+        if (sc->sc_rxaggr) {
+                /* Allow aggregation reception
+                 * Adjust rx BA window size. Peer might indicate a
+                 * zero buffer size for a _dont_care_ condition.
+                 */
+                if (buffersize)
+                        rxtid->baw_size = min(buffersize, rxtid->baw_size);
+
+                /* set rx sequence number */
+                rxtid->seq_next = *ssn;
+
+                /* Allocate the receive buffers for this TID */
+                DPRINTF(sc, ATH_DBG_AGGR,
+                        "%s: Allcating rxbuffer for TID %d\n", __func__, tid);
+
+                if (rxtid->rxbuf == NULL) {
+                        /*
+                        * If the rxbuff is not NULL at this point, we *probably*
+                        * already allocated the buffer on a previous ADDBA,
+                        * and this is a subsequent ADDBA that got through.
+                        * Don't allocate, but use the value in the pointer,
+                        * we zero it out when we de-allocate.
+                        */
+                        rxtid->rxbuf = kmalloc(ATH_TID_MAX_BUFS *
+                                sizeof(struct ath_rxbuf), GFP_ATOMIC);
+                }
+                if (rxtid->rxbuf == NULL) {
+                        DPRINTF(sc, ATH_DBG_AGGR,
+                                "%s: Unable to allocate RX buffer, "
+                                "refusing ADDBA\n", __func__);
+                } else {
+                        /* Ensure the memory is zeroed out (all internal
+                         * pointers are null) */
+                        memzero(rxtid->rxbuf, ATH_TID_MAX_BUFS *
+                                sizeof(struct ath_rxbuf));
+                        DPRINTF(sc, ATH_DBG_AGGR,
+                                "%s: Allocated @%p\n", __func__, rxtid->rxbuf);
+
+                        /* Allow aggregation reception */
+                        rxtid->addba_exchangecomplete = 1;
+                }
+        }
+        spin_unlock_bh(&rxtid->tidlock);
+
+        return 0;
+}
+
+/* Process DELBA */
+
+int ath_rx_aggr_stop(struct ath_softc *sc,
+                     const u8 *addr,
+                     u16 tid)
+{
+        struct ath_node *an;
+
+        spin_lock_bh(&sc->node_lock);
+        an = ath_node_find(sc, (u8 *) addr);
+        spin_unlock_bh(&sc->node_lock);
+
+        if (!an) {
+                DPRINTF(sc, ATH_DBG_AGGR,
+                        "%s: RX aggr stop for non-existent node\n", __func__);
+                return -1;
+        }
+
+        ath_rx_aggr_teardown(sc, an, tid);
+        return 0;
+}
+
+/* Rx aggregation tear down */
+
+void ath_rx_aggr_teardown(struct ath_softc *sc,
+        struct ath_node *an, u8 tid)
+{
+        struct ath_arx_tid *rxtid = &an->an_aggr.rx.tid[tid];
+
+        if (!rxtid->addba_exchangecomplete)
+                return;
+
+        del_timer_sync(&rxtid->timer);
+        ath_rx_flush_tid(sc, rxtid, 0);
+        rxtid->addba_exchangecomplete = 0;
+
+        /* De-allocate the receive buffer array allocated when addba started */
+
+        if (rxtid->rxbuf) {
+                DPRINTF(sc, ATH_DBG_AGGR,
+                        "%s: Deallocating TID %d rxbuff @%p\n",
+                        __func__, tid, rxtid->rxbuf);
+                kfree(rxtid->rxbuf);
+
+                /* Set pointer to null to avoid reuse*/
+                rxtid->rxbuf = NULL;
+        }
+}
+
+/* Initialize per-node receive state */
+
+void ath_rx_node_init(struct ath_softc *sc, struct ath_node *an)
+{
+        if (sc->sc_rxaggr) {
+                struct ath_arx_tid *rxtid;
+                int tidno;
+
+                /* Init per tid rx state */
+                for (tidno = 0, rxtid = &an->an_aggr.rx.tid[tidno];
+                                tidno < WME_NUM_TID;
+                                tidno++, rxtid++) {
+                        rxtid->an        = an;
+                        rxtid->seq_reset = 1;
+                        rxtid->seq_next  = 0;
+                        rxtid->baw_size  = WME_MAX_BA;
+                        rxtid->baw_head  = rxtid->baw_tail = 0;
+
+                        /*
+                         * Ensure the buffer pointer is null at this point
+                         * (needs to be allocated when addba is received)
+                        */
+
+                        rxtid->rxbuf     = NULL;
+                        setup_timer(&rxtid->timer, ath_rx_timer,
+                                (unsigned long)rxtid);
+                        spin_lock_init(&rxtid->tidlock);
+
+                        /* ADDBA state */
+                        rxtid->addba_exchangecomplete = 0;
+                }
+        }
+}
+
+void ath_rx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
+{
+        if (sc->sc_rxaggr) {
+                struct ath_arx_tid *rxtid;
+                int tidno, i;
+
+                /* Init per tid rx state */
+                for (tidno = 0, rxtid = &an->an_aggr.rx.tid[tidno];
+                                tidno < WME_NUM_TID;
+                                tidno++, rxtid++) {
+
+                        if (!rxtid->addba_exchangecomplete)
+                                continue;
+
+                        /* must cancel timer first */
+                        del_timer_sync(&rxtid->timer);
+
+                        /* drop any pending sub-frames */
+                        ath_rx_flush_tid(sc, rxtid, 1);
+
+                        for (i = 0; i < ATH_TID_MAX_BUFS; i++)
+                                ASSERT(rxtid->rxbuf[i].rx_wbuf == NULL);
+
+                        rxtid->addba_exchangecomplete = 0;
+                }
+        }
+
+}
+
+/* Cleanup per-node receive state */
+
+void ath_rx_node_free(struct ath_softc *sc, struct ath_node *an)
+{
+        ath_rx_node_cleanup(sc, an);
+}
+
+dma_addr_t ath_skb_map_single(struct ath_softc *sc,
+                              struct sk_buff *skb,
+                              int direction,
+                              dma_addr_t *pa)
+{
+        /*
+         * NB: do NOT use skb->len, which is 0 on initialization.
+         * Use skb's entire data area instead.
+         */
+        *pa = pci_map_single(sc->pdev, skb->data,
+                skb_end_pointer(skb) - skb->head, direction);
+        return *pa;
+}
+
+void ath_skb_unmap_single(struct ath_softc *sc,
+                          struct sk_buff *skb,
+                          int direction,
+                          dma_addr_t *pa)
+{
+        /* Unmap skb's entire data area */
+        pci_unmap_single(sc->pdev, *pa,
+                skb_end_pointer(skb) - skb->head, direction);
+}
diff --git a/drivers/net/wireless/ath9k/reg.h b/drivers/net/wireless/ath9k/reg.h
new file mode 100644
index 000000000000..42b0890a4685
--- /dev/null
+++ b/drivers/net/wireless/ath9k/reg.h
@@ -0,0 +1,1385 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef REG_H
+#define REG_H
+
+#define AR_CR                0x0008
+#define AR_CR_RXE            0x00000004
+#define AR_CR_RXD            0x00000020
+#define AR_CR_SWI            0x00000040
+
+#define AR_RXDP              0x000C
+
+#define AR_CFG               0x0014
+#define AR_CFG_SWTD          0x00000001
+#define AR_CFG_SWTB          0x00000002
+#define AR_CFG_SWRD          0x00000004
+#define AR_CFG_SWRB          0x00000008
+#define AR_CFG_SWRG          0x00000010
+#define AR_CFG_AP_ADHOC_INDICATION 0x00000020
+#define AR_CFG_PHOK          0x00000100
+#define AR_CFG_CLK_GATE_DIS  0x00000400
+#define AR_CFG_EEBS          0x00000200
+#define AR_CFG_PCI_MASTER_REQ_Q_THRESH         0x00060000
+#define AR_CFG_PCI_MASTER_REQ_Q_THRESH_S       17
+
+#define AR_MIRT              0x0020
+#define AR_MIRT_VAL          0x0000ffff
+#define AR_MIRT_VAL_S        16
+
+#define AR_IER               0x0024
+#define AR_IER_ENABLE        0x00000001
+#define AR_IER_DISABLE       0x00000000
+
+#define AR_TIMT              0x0028
+#define AR_TIMT_LAST         0x0000ffff
+#define AR_TIMT_LAST_S       0
+#define AR_TIMT_FIRST        0xffff0000
+#define AR_TIMT_FIRST_S      16
+
+#define AR_RIMT              0x002C
+#define AR_RIMT_LAST         0x0000ffff
+#define AR_RIMT_LAST_S       0
+#define AR_RIMT_FIRST        0xffff0000
+#define AR_RIMT_FIRST_S      16
+
+#define AR_DMASIZE_4B        0x00000000
+#define AR_DMASIZE_8B        0x00000001
+#define AR_DMASIZE_16B       0x00000002
+#define AR_DMASIZE_32B       0x00000003
+#define AR_DMASIZE_64B       0x00000004
+#define AR_DMASIZE_128B      0x00000005
+#define AR_DMASIZE_256B      0x00000006
+#define AR_DMASIZE_512B      0x00000007
+
+#define AR_TXCFG             0x0030
+#define AR_TXCFG_DMASZ_MASK  0x00000003
+#define AR_TXCFG_DMASZ_4B    0
+#define AR_TXCFG_DMASZ_8B    1
+#define AR_TXCFG_DMASZ_16B   2
+#define AR_TXCFG_DMASZ_32B   3
+#define AR_TXCFG_DMASZ_64B   4
+#define AR_TXCFG_DMASZ_128B  5
+#define AR_TXCFG_DMASZ_256B  6
+#define AR_TXCFG_DMASZ_512B  7
+#define AR_FTRIG             0x000003F0
+#define AR_FTRIG_S           4
+#define AR_FTRIG_IMMED       0x00000000
+#define AR_FTRIG_64B         0x00000010
+#define AR_FTRIG_128B        0x00000020
+#define AR_FTRIG_192B        0x00000030
+#define AR_FTRIG_256B        0x00000040
+#define AR_FTRIG_512B        0x00000080
+#define AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY 0x00000800
+
+#define AR_RXCFG             0x0034
+#define AR_RXCFG_CHIRP       0x00000008
+#define AR_RXCFG_ZLFDMA      0x00000010
+#define AR_RXCFG_DMASZ_MASK  0x00000007
+#define AR_RXCFG_DMASZ_4B    0
+#define AR_RXCFG_DMASZ_8B    1
+#define AR_RXCFG_DMASZ_16B   2
+#define AR_RXCFG_DMASZ_32B   3
+#define AR_RXCFG_DMASZ_64B   4
+#define AR_RXCFG_DMASZ_128B  5
+#define AR_RXCFG_DMASZ_256B  6
+#define AR_RXCFG_DMASZ_512B  7
+
+#define AR_MIBC              0x0040
+#define AR_MIBC_COW          0x00000001
+#define AR_MIBC_FMC          0x00000002
+#define AR_MIBC_CMC          0x00000004
+#define AR_MIBC_MCS          0x00000008
+
+#define AR_TOPS              0x0044
+#define AR_TOPS_MASK         0x0000FFFF
+
+#define AR_RXNPTO            0x0048
+#define AR_RXNPTO_MASK       0x000003FF
+
+#define AR_TXNPTO            0x004C
+#define AR_TXNPTO_MASK       0x000003FF
+#define AR_TXNPTO_QCU_MASK   0x000FFC00
+
+#define AR_RPGTO             0x0050
+#define AR_RPGTO_MASK        0x000003FF
+
+#define AR_RPCNT             0x0054
+#define AR_RPCNT_MASK        0x0000001F
+
+#define AR_MACMISC           0x0058
+#define AR_MACMISC_PCI_EXT_FORCE        0x00000010
+#define AR_MACMISC_DMA_OBS              0x000001E0
+#define AR_MACMISC_DMA_OBS_S            5
+#define AR_MACMISC_DMA_OBS_LINE_0       0
+#define AR_MACMISC_DMA_OBS_LINE_1       1
+#define AR_MACMISC_DMA_OBS_LINE_2       2
+#define AR_MACMISC_DMA_OBS_LINE_3       3
+#define AR_MACMISC_DMA_OBS_LINE_4       4
+#define AR_MACMISC_DMA_OBS_LINE_5       5
+#define AR_MACMISC_DMA_OBS_LINE_6       6
+#define AR_MACMISC_DMA_OBS_LINE_7       7
+#define AR_MACMISC_DMA_OBS_LINE_8       8
+#define AR_MACMISC_MISC_OBS             0x00000E00
+#define AR_MACMISC_MISC_OBS_S           9
+#define AR_MACMISC_MISC_OBS_BUS_LSB     0x00007000
+#define AR_MACMISC_MISC_OBS_BUS_LSB_S   12
+#define AR_MACMISC_MISC_OBS_BUS_MSB     0x00038000
+#define AR_MACMISC_MISC_OBS_BUS_MSB_S   15
+#define AR_MACMISC_MISC_OBS_BUS_1       1
+
+#define AR_GTXTO    0x0064
+#define AR_GTXTO_TIMEOUT_COUNTER    0x0000FFFF
+#define AR_GTXTO_TIMEOUT_LIMIT      0xFFFF0000
+#define AR_GTXTO_TIMEOUT_LIMIT_S    16
+
+#define AR_GTTM     0x0068
+#define AR_GTTM_USEC          0x00000001
+#define AR_GTTM_IGNORE_IDLE   0x00000002
+#define AR_GTTM_RESET_IDLE    0x00000004
+#define AR_GTTM_CST_USEC      0x00000008
+
+#define AR_CST         0x006C
+#define AR_CST_TIMEOUT_COUNTER    0x0000FFFF
+#define AR_CST_TIMEOUT_LIMIT      0xFFFF0000
+#define AR_CST_TIMEOUT_LIMIT_S    16
+
+#define AR_SREV_VERSION_9100                  0x014
+
+#define AR_SREV_5416_V20_OR_LATER(_ah) \
+        (AR_SREV_9100((_ah)) || AR_SREV_5416_20_OR_LATER(_ah))
+#define AR_SREV_5416_V22_OR_LATER(_ah) \
+        (AR_SREV_9100((_ah)) || AR_SREV_5416_22_OR_LATER(_ah))
+
+#define AR_ISR               0x0080
+#define AR_ISR_RXOK          0x00000001
+#define AR_ISR_RXDESC        0x00000002
+#define AR_ISR_RXERR         0x00000004
+#define AR_ISR_RXNOPKT       0x00000008
+#define AR_ISR_RXEOL         0x00000010
+#define AR_ISR_RXORN         0x00000020
+#define AR_ISR_TXOK          0x00000040
+#define AR_ISR_TXDESC        0x00000080
+#define AR_ISR_TXERR         0x00000100
+#define AR_ISR_TXNOPKT       0x00000200
+#define AR_ISR_TXEOL         0x00000400
+#define AR_ISR_TXURN         0x00000800
+#define AR_ISR_MIB           0x00001000
+#define AR_ISR_SWI           0x00002000
+#define AR_ISR_RXPHY         0x00004000
+#define AR_ISR_RXKCM         0x00008000
+#define AR_ISR_SWBA          0x00010000
+#define AR_ISR_BRSSI         0x00020000
+#define AR_ISR_BMISS         0x00040000
+#define AR_ISR_BNR           0x00100000
+#define AR_ISR_RXCHIRP       0x00200000
+#define AR_ISR_BCNMISC       0x00800000
+#define AR_ISR_TIM           0x00800000
+#define AR_ISR_QCBROVF       0x02000000
+#define AR_ISR_QCBRURN       0x04000000
+#define AR_ISR_QTRIG         0x08000000
+#define AR_ISR_GENTMR        0x10000000
+
+#define AR_ISR_TXMINTR       0x00080000
+#define AR_ISR_RXMINTR       0x01000000
+#define AR_ISR_TXINTM        0x40000000
+#define AR_ISR_RXINTM        0x80000000
+
+#define AR_ISR_S0               0x0084
+#define AR_ISR_S0_QCU_TXOK      0x000003FF
+#define AR_ISR_S0_QCU_TXOK_S    0
+#define AR_ISR_S0_QCU_TXDESC    0x03FF0000
+#define AR_ISR_S0_QCU_TXDESC_S  16
+
+#define AR_ISR_S1              0x0088
+#define AR_ISR_S1_QCU_TXERR    0x000003FF
+#define AR_ISR_S1_QCU_TXERR_S  0
+#define AR_ISR_S1_QCU_TXEOL    0x03FF0000
+#define AR_ISR_S1_QCU_TXEOL_S  16
+
+#define AR_ISR_S2              0x008c
+#define AR_ISR_S2_QCU_TXURN    0x000003FF
+#define AR_ISR_S2_CST          0x00400000
+#define AR_ISR_S2_GTT          0x00800000
+#define AR_ISR_S2_TIM          0x01000000
+#define AR_ISR_S2_CABEND       0x02000000
+#define AR_ISR_S2_DTIMSYNC     0x04000000
+#define AR_ISR_S2_BCNTO        0x08000000
+#define AR_ISR_S2_CABTO        0x10000000
+#define AR_ISR_S2_DTIM         0x20000000
+#define AR_ISR_S2_TSFOOR       0x40000000
+#define AR_ISR_S2_TBTT_TIME    0x80000000
+
+#define AR_ISR_S3             0x0090
+#define AR_ISR_S3_QCU_QCBROVF    0x000003FF
+#define AR_ISR_S3_QCU_QCBRURN    0x03FF0000
+
+#define AR_ISR_S4              0x0094
+#define AR_ISR_S4_QCU_QTRIG    0x000003FF
+#define AR_ISR_S4_RESV0        0xFFFFFC00
+
+#define AR_ISR_S5                   0x0098
+#define AR_ISR_S5_TIMER_TRIG        0x000000FF
+#define AR_ISR_S5_TIMER_THRESH      0x0007FE00
+#define AR_ISR_S5_TIM_TIMER         0x00000010
+#define AR_ISR_S5_DTIM_TIMER        0x00000020
+#define AR_ISR_S5_S                 0x00d8
+#define AR_IMR_S5                   0x00b8
+#define AR_IMR_S5_TIM_TIMER         0x00000010
+#define AR_IMR_S5_DTIM_TIMER        0x00000020
+
+
+#define AR_IMR               0x00a0
+#define AR_IMR_RXOK          0x00000001
+#define AR_IMR_RXDESC        0x00000002
+#define AR_IMR_RXERR         0x00000004
+#define AR_IMR_RXNOPKT       0x00000008
+#define AR_IMR_RXEOL         0x00000010
+#define AR_IMR_RXORN         0x00000020
+#define AR_IMR_TXOK          0x00000040
+#define AR_IMR_TXDESC        0x00000080
+#define AR_IMR_TXERR         0x00000100
+#define AR_IMR_TXNOPKT       0x00000200
+#define AR_IMR_TXEOL         0x00000400
+#define AR_IMR_TXURN         0x00000800
+#define AR_IMR_MIB           0x00001000
+#define AR_IMR_SWI           0x00002000
+#define AR_IMR_RXPHY         0x00004000
+#define AR_IMR_RXKCM         0x00008000
+#define AR_IMR_SWBA          0x00010000
+#define AR_IMR_BRSSI         0x00020000
+#define AR_IMR_BMISS         0x00040000
+#define AR_IMR_BNR           0x00100000
+#define AR_IMR_RXCHIRP       0x00200000
+#define AR_IMR_BCNMISC       0x00800000
+#define AR_IMR_TIM           0x00800000
+#define AR_IMR_QCBROVF       0x02000000
+#define AR_IMR_QCBRURN       0x04000000
+#define AR_IMR_QTRIG         0x08000000
+#define AR_IMR_GENTMR        0x10000000
+
+#define AR_IMR_TXMINTR       0x00080000
+#define AR_IMR_RXMINTR       0x01000000
+#define AR_IMR_TXINTM        0x40000000
+#define AR_IMR_RXINTM        0x80000000
+
+#define AR_IMR_S0               0x00a4
+#define AR_IMR_S0_QCU_TXOK      0x000003FF
+#define AR_IMR_S0_QCU_TXOK_S    0
+#define AR_IMR_S0_QCU_TXDESC    0x03FF0000
+#define AR_IMR_S0_QCU_TXDESC_S  16
+
+#define AR_IMR_S1              0x00a8
+#define AR_IMR_S1_QCU_TXERR    0x000003FF
+#define AR_IMR_S1_QCU_TXERR_S  0
+#define AR_IMR_S1_QCU_TXEOL    0x03FF0000
+#define AR_IMR_S1_QCU_TXEOL_S  16
+
+#define AR_IMR_S2              0x00ac
+#define AR_IMR_S2_QCU_TXURN    0x000003FF
+#define AR_IMR_S2_QCU_TXURN_S  0
+#define AR_IMR_S2_CST          0x00400000
+#define AR_IMR_S2_GTT          0x00800000
+#define AR_IMR_S2_TIM          0x01000000
+#define AR_IMR_S2_CABEND       0x02000000
+#define AR_IMR_S2_DTIMSYNC     0x04000000
+#define AR_IMR_S2_BCNTO        0x08000000
+#define AR_IMR_S2_CABTO        0x10000000
+#define AR_IMR_S2_DTIM         0x20000000
+#define AR_IMR_S2_TSFOOR       0x40000000
+
+#define AR_IMR_S3                0x00b0
+#define AR_IMR_S3_QCU_QCBROVF    0x000003FF
+#define AR_IMR_S3_QCU_QCBRURN    0x03FF0000
+#define AR_IMR_S3_QCU_QCBRURN_S  16
+
+#define AR_IMR_S4              0x00b4
+#define AR_IMR_S4_QCU_QTRIG    0x000003FF
+#define AR_IMR_S4_RESV0        0xFFFFFC00
+
+#define AR_IMR_S5              0x00b8
+#define AR_IMR_S5_TIMER_TRIG        0x000000FF
+#define AR_IMR_S5_TIMER_THRESH      0x0000FF00
+
+
+#define AR_ISR_RAC            0x00c0
+#define AR_ISR_S0_S           0x00c4
+#define AR_ISR_S0_QCU_TXOK      0x000003FF
+#define AR_ISR_S0_QCU_TXOK_S    0
+#define AR_ISR_S0_QCU_TXDESC    0x03FF0000
+#define AR_ISR_S0_QCU_TXDESC_S  16
+
+#define AR_ISR_S1_S           0x00c8
+#define AR_ISR_S1_QCU_TXERR    0x000003FF
+#define AR_ISR_S1_QCU_TXERR_S  0
+#define AR_ISR_S1_QCU_TXEOL    0x03FF0000
+#define AR_ISR_S1_QCU_TXEOL_S  16
+
+#define AR_ISR_S2_S           0x00cc
+#define AR_ISR_S3_S           0x00d0
+#define AR_ISR_S4_S           0x00d4
+#define AR_ISR_S5_S           0x00d8
+#define AR_DMADBG_0           0x00e0
+#define AR_DMADBG_1           0x00e4
+#define AR_DMADBG_2           0x00e8
+#define AR_DMADBG_3           0x00ec
+#define AR_DMADBG_4           0x00f0
+#define AR_DMADBG_5           0x00f4
+#define AR_DMADBG_6           0x00f8
+#define AR_DMADBG_7           0x00fc
+
+#define AR_NUM_QCU      10
+#define AR_QCU_0        0x0001
+#define AR_QCU_1        0x0002
+#define AR_QCU_2        0x0004
+#define AR_QCU_3        0x0008
+#define AR_QCU_4        0x0010
+#define AR_QCU_5        0x0020
+#define AR_QCU_6        0x0040
+#define AR_QCU_7        0x0080
+#define AR_QCU_8        0x0100
+#define AR_QCU_9        0x0200
+
+#define AR_Q0_TXDP           0x0800
+#define AR_Q1_TXDP           0x0804
+#define AR_Q2_TXDP           0x0808
+#define AR_Q3_TXDP           0x080c
+#define AR_Q4_TXDP           0x0810
+#define AR_Q5_TXDP           0x0814
+#define AR_Q6_TXDP           0x0818
+#define AR_Q7_TXDP           0x081c
+#define AR_Q8_TXDP           0x0820
+#define AR_Q9_TXDP           0x0824
+#define AR_QTXDP(_i)    (AR_Q0_TXDP + ((_i)<<2))
+
+#define AR_Q_TXE             0x0840
+#define AR_Q_TXE_M           0x000003FF
+
+#define AR_Q_TXD             0x0880
+#define AR_Q_TXD_M           0x000003FF
+
+#define AR_Q0_CBRCFG         0x08c0
+#define AR_Q1_CBRCFG         0x08c4
+#define AR_Q2_CBRCFG         0x08c8
+#define AR_Q3_CBRCFG         0x08cc
+#define AR_Q4_CBRCFG         0x08d0
+#define AR_Q5_CBRCFG         0x08d4
+#define AR_Q6_CBRCFG         0x08d8
+#define AR_Q7_CBRCFG         0x08dc
+#define AR_Q8_CBRCFG         0x08e0
+#define AR_Q9_CBRCFG         0x08e4
+#define AR_QCBRCFG(_i)      (AR_Q0_CBRCFG + ((_i)<<2))
+#define AR_Q_CBRCFG_INTERVAL     0x00FFFFFF
+#define AR_Q_CBRCFG_INTERVAL_S   0
+#define AR_Q_CBRCFG_OVF_THRESH   0xFF000000
+#define AR_Q_CBRCFG_OVF_THRESH_S 24
+
+#define AR_Q0_RDYTIMECFG         0x0900
+#define AR_Q1_RDYTIMECFG         0x0904
+#define AR_Q2_RDYTIMECFG         0x0908
+#define AR_Q3_RDYTIMECFG         0x090c
+#define AR_Q4_RDYTIMECFG         0x0910
+#define AR_Q5_RDYTIMECFG         0x0914
+#define AR_Q6_RDYTIMECFG         0x0918
+#define AR_Q7_RDYTIMECFG         0x091c
+#define AR_Q8_RDYTIMECFG         0x0920
+#define AR_Q9_RDYTIMECFG         0x0924
+#define AR_QRDYTIMECFG(_i)       (AR_Q0_RDYTIMECFG + ((_i)<<2))
+#define AR_Q_RDYTIMECFG_DURATION   0x00FFFFFF
+#define AR_Q_RDYTIMECFG_DURATION_S 0
+#define AR_Q_RDYTIMECFG_EN         0x01000000
+
+#define AR_Q_ONESHOTARM_SC       0x0940
+#define AR_Q_ONESHOTARM_SC_M     0x000003FF
+#define AR_Q_ONESHOTARM_SC_RESV0 0xFFFFFC00
+
+#define AR_Q_ONESHOTARM_CC       0x0980
+#define AR_Q_ONESHOTARM_CC_M     0x000003FF
+#define AR_Q_ONESHOTARM_CC_RESV0 0xFFFFFC00
+
+#define AR_Q0_MISC         0x09c0
+#define AR_Q1_MISC         0x09c4
+#define AR_Q2_MISC         0x09c8
+#define AR_Q3_MISC         0x09cc
+#define AR_Q4_MISC         0x09d0
+#define AR_Q5_MISC         0x09d4
+#define AR_Q6_MISC         0x09d8
+#define AR_Q7_MISC         0x09dc
+#define AR_Q8_MISC         0x09e0
+#define AR_Q9_MISC         0x09e4
+#define AR_QMISC(_i)       (AR_Q0_MISC + ((_i)<<2))
+#define AR_Q_MISC_FSP                     0x0000000F
+#define AR_Q_MISC_FSP_ASAP                0
+#define AR_Q_MISC_FSP_CBR                 1
+#define AR_Q_MISC_FSP_DBA_GATED           2
+#define AR_Q_MISC_FSP_TIM_GATED           3
+#define AR_Q_MISC_FSP_BEACON_SENT_GATED   4
+#define AR_Q_MISC_FSP_BEACON_RCVD_GATED   5
+#define AR_Q_MISC_ONE_SHOT_EN             0x00000010
+#define AR_Q_MISC_CBR_INCR_DIS1           0x00000020
+#define AR_Q_MISC_CBR_INCR_DIS0           0x00000040
+#define AR_Q_MISC_BEACON_USE              0x00000080
+#define AR_Q_MISC_CBR_EXP_CNTR_LIMIT_EN   0x00000100
+#define AR_Q_MISC_RDYTIME_EXP_POLICY      0x00000200
+#define AR_Q_MISC_RESET_CBR_EXP_CTR       0x00000400
+#define AR_Q_MISC_DCU_EARLY_TERM_REQ      0x00000800
+#define AR_Q_MISC_RESV0                   0xFFFFF000
+
+#define AR_Q0_STS         0x0a00
+#define AR_Q1_STS         0x0a04
+#define AR_Q2_STS         0x0a08
+#define AR_Q3_STS         0x0a0c
+#define AR_Q4_STS         0x0a10
+#define AR_Q5_STS         0x0a14
+#define AR_Q6_STS         0x0a18
+#define AR_Q7_STS         0x0a1c
+#define AR_Q8_STS         0x0a20
+#define AR_Q9_STS         0x0a24
+#define AR_QSTS(_i)       (AR_Q0_STS + ((_i)<<2))
+#define AR_Q_STS_PEND_FR_CNT          0x00000003
+#define AR_Q_STS_RESV0                0x000000FC
+#define AR_Q_STS_CBR_EXP_CNT          0x0000FF00
+#define AR_Q_STS_RESV1                0xFFFF0000
+
+#define AR_Q_RDYTIMESHDN    0x0a40
+#define AR_Q_RDYTIMESHDN_M  0x000003FF
+
+
+#define AR_NUM_DCU      10
+#define AR_DCU_0        0x0001
+#define AR_DCU_1        0x0002
+#define AR_DCU_2        0x0004
+#define AR_DCU_3        0x0008
+#define AR_DCU_4        0x0010
+#define AR_DCU_5        0x0020
+#define AR_DCU_6        0x0040
+#define AR_DCU_7        0x0080
+#define AR_DCU_8        0x0100
+#define AR_DCU_9        0x0200
+
+#define AR_D0_QCUMASK     0x1000
+#define AR_D1_QCUMASK     0x1004
+#define AR_D2_QCUMASK     0x1008
+#define AR_D3_QCUMASK     0x100c
+#define AR_D4_QCUMASK     0x1010
+#define AR_D5_QCUMASK     0x1014
+#define AR_D6_QCUMASK     0x1018
+#define AR_D7_QCUMASK     0x101c
+#define AR_D8_QCUMASK     0x1020
+#define AR_D9_QCUMASK     0x1024
+#define AR_DQCUMASK(_i)   (AR_D0_QCUMASK + ((_i)<<2))
+#define AR_D_QCUMASK         0x000003FF
+#define AR_D_QCUMASK_RESV0   0xFFFFFC00
+
+#define AR_D_TXBLK_CMD  0x1038
+#define AR_D_TXBLK_DATA(i) (AR_D_TXBLK_CMD+(i))
+
+#define AR_D0_LCL_IFS     0x1040
+#define AR_D1_LCL_IFS     0x1044
+#define AR_D2_LCL_IFS     0x1048
+#define AR_D3_LCL_IFS     0x104c
+#define AR_D4_LCL_IFS     0x1050
+#define AR_D5_LCL_IFS     0x1054
+#define AR_D6_LCL_IFS     0x1058
+#define AR_D7_LCL_IFS     0x105c
+#define AR_D8_LCL_IFS     0x1060
+#define AR_D9_LCL_IFS     0x1064
+#define AR_DLCL_IFS(_i)   (AR_D0_LCL_IFS + ((_i)<<2))
+#define AR_D_LCL_IFS_CWMIN       0x000003FF
+#define AR_D_LCL_IFS_CWMIN_S     0
+#define AR_D_LCL_IFS_CWMAX       0x000FFC00
+#define AR_D_LCL_IFS_CWMAX_S     10
+#define AR_D_LCL_IFS_AIFS        0x0FF00000
+#define AR_D_LCL_IFS_AIFS_S      20
+
+#define AR_D_LCL_IFS_RESV0    0xF0000000
+
+#define AR_D0_RETRY_LIMIT     0x1080
+#define AR_D1_RETRY_LIMIT     0x1084
+#define AR_D2_RETRY_LIMIT     0x1088
+#define AR_D3_RETRY_LIMIT     0x108c
+#define AR_D4_RETRY_LIMIT     0x1090
+#define AR_D5_RETRY_LIMIT     0x1094
+#define AR_D6_RETRY_LIMIT     0x1098
+#define AR_D7_RETRY_LIMIT     0x109c
+#define AR_D8_RETRY_LIMIT     0x10a0
+#define AR_D9_RETRY_LIMIT     0x10a4
+#define AR_DRETRY_LIMIT(_i)   (AR_D0_RETRY_LIMIT + ((_i)<<2))
+#define AR_D_RETRY_LIMIT_FR_SH       0x0000000F
+#define AR_D_RETRY_LIMIT_FR_SH_S     0
+#define AR_D_RETRY_LIMIT_STA_SH      0x00003F00
+#define AR_D_RETRY_LIMIT_STA_SH_S    8
+#define AR_D_RETRY_LIMIT_STA_LG      0x000FC000
+#define AR_D_RETRY_LIMIT_STA_LG_S    14
+#define AR_D_RETRY_LIMIT_RESV0       0xFFF00000
+
+#define AR_D0_CHNTIME     0x10c0
+#define AR_D1_CHNTIME     0x10c4
+#define AR_D2_CHNTIME     0x10c8
+#define AR_D3_CHNTIME     0x10cc
+#define AR_D4_CHNTIME     0x10d0
+#define AR_D5_CHNTIME     0x10d4
+#define AR_D6_CHNTIME     0x10d8
+#define AR_D7_CHNTIME     0x10dc
+#define AR_D8_CHNTIME     0x10e0
+#define AR_D9_CHNTIME     0x10e4
+#define AR_DCHNTIME(_i)   (AR_D0_CHNTIME + ((_i)<<2))
+#define AR_D_CHNTIME_DUR         0x000FFFFF
+#define AR_D_CHNTIME_DUR_S       0
+#define AR_D_CHNTIME_EN          0x00100000
+#define AR_D_CHNTIME_RESV0       0xFFE00000
+
+#define AR_D0_MISC        0x1100
+#define AR_D1_MISC        0x1104
+#define AR_D2_MISC        0x1108
+#define AR_D3_MISC        0x110c
+#define AR_D4_MISC        0x1110
+#define AR_D5_MISC        0x1114
+#define AR_D6_MISC        0x1118
+#define AR_D7_MISC        0x111c
+#define AR_D8_MISC        0x1120
+#define AR_D9_MISC        0x1124
+#define AR_DMISC(_i)      (AR_D0_MISC + ((_i)<<2))
+#define AR_D_MISC_BKOFF_THRESH        0x0000003F
+#define AR_D_MISC_RETRY_CNT_RESET_EN  0x00000040
+#define AR_D_MISC_CW_RESET_EN         0x00000080
+#define AR_D_MISC_FRAG_WAIT_EN        0x00000100
+#define AR_D_MISC_FRAG_BKOFF_EN       0x00000200
+#define AR_D_MISC_CW_BKOFF_EN         0x00001000
+#define AR_D_MISC_VIR_COL_HANDLING    0x0000C000
+#define AR_D_MISC_VIR_COL_HANDLING_S  14
+#define AR_D_MISC_VIR_COL_HANDLING_DEFAULT 0
+#define AR_D_MISC_VIR_COL_HANDLING_IGNORE  1
+#define AR_D_MISC_BEACON_USE          0x00010000
+#define AR_D_MISC_ARB_LOCKOUT_CNTRL   0x00060000
+#define AR_D_MISC_ARB_LOCKOUT_CNTRL_S 17
+#define AR_D_MISC_ARB_LOCKOUT_CNTRL_NONE     0
+#define AR_D_MISC_ARB_LOCKOUT_CNTRL_INTRA_FR 1
+#define AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL   2
+#define AR_D_MISC_ARB_LOCKOUT_IGNORE  0x00080000
+#define AR_D_MISC_SEQ_NUM_INCR_DIS    0x00100000
+#define AR_D_MISC_POST_FR_BKOFF_DIS   0x00200000
+#define AR_D_MISC_VIT_COL_CW_BKOFF_EN 0x00400000
+#define AR_D_MISC_BLOWN_IFS_RETRY_EN  0x00800000
+#define AR_D_MISC_RESV0               0xFF000000
+
+#define AR_D_SEQNUM      0x1140
+
+#define AR_D_GBL_IFS_SIFS         0x1030
+#define AR_D_GBL_IFS_SIFS_M       0x0000FFFF
+#define AR_D_GBL_IFS_SIFS_RESV0   0xFFFFFFFF
+
+#define AR_D_TXBLK_BASE            0x1038
+#define AR_D_TXBLK_WRITE_BITMASK    0x0000FFFF
+#define AR_D_TXBLK_WRITE_BITMASK_S  0
+#define AR_D_TXBLK_WRITE_SLICE      0x000F0000
+#define AR_D_TXBLK_WRITE_SLICE_S    16
+#define AR_D_TXBLK_WRITE_DCU        0x00F00000
+#define AR_D_TXBLK_WRITE_DCU_S      20
+#define AR_D_TXBLK_WRITE_COMMAND    0x0F000000
+#define AR_D_TXBLK_WRITE_COMMAND_S      24
+
+#define AR_D_GBL_IFS_SLOT         0x1070
+#define AR_D_GBL_IFS_SLOT_M       0x0000FFFF
+#define AR_D_GBL_IFS_SLOT_RESV0   0xFFFF0000
+
+#define AR_D_GBL_IFS_EIFS         0x10b0
+#define AR_D_GBL_IFS_EIFS_M       0x0000FFFF
+#define AR_D_GBL_IFS_EIFS_RESV0   0xFFFF0000
+
+#define AR_D_GBL_IFS_MISC        0x10f0
+#define AR_D_GBL_IFS_MISC_LFSR_SLICE_SEL        0x00000007
+#define AR_D_GBL_IFS_MISC_TURBO_MODE            0x00000008
+#define AR_D_GBL_IFS_MISC_USEC_DURATION         0x000FFC00
+#define AR_D_GBL_IFS_MISC_DCU_ARBITER_DLY       0x00300000
+#define AR_D_GBL_IFS_MISC_RANDOM_LFSR_SLICE_DIS 0x01000000
+#define AR_D_GBL_IFS_MISC_SLOT_XMIT_WIND_LEN    0x06000000
+#define AR_D_GBL_IFS_MISC_FORCE_XMIT_SLOT_BOUND 0x08000000
+#define AR_D_GBL_IFS_MISC_IGNORE_BACKOFF        0x10000000
+
+#define AR_D_FPCTL                  0x1230
+#define AR_D_FPCTL_DCU              0x0000000F
+#define AR_D_FPCTL_DCU_S            0
+#define AR_D_FPCTL_PREFETCH_EN      0x00000010
+#define AR_D_FPCTL_BURST_PREFETCH   0x00007FE0
+#define AR_D_FPCTL_BURST_PREFETCH_S 5
+
+#define AR_D_TXPSE                 0x1270
+#define AR_D_TXPSE_CTRL            0x000003FF
+#define AR_D_TXPSE_RESV0           0x0000FC00
+#define AR_D_TXPSE_STATUS          0x00010000
+#define AR_D_TXPSE_RESV1           0xFFFE0000
+
+#define AR_D_TXSLOTMASK            0x12f0
+#define AR_D_TXSLOTMASK_NUM        0x0000000F
+
+#define AR_CFG_LED                     0x1f04
+#define AR_CFG_SCLK_RATE_IND           0x00000003
+#define AR_CFG_SCLK_RATE_IND_S         0
+#define AR_CFG_SCLK_32MHZ              0x00000000
+#define AR_CFG_SCLK_4MHZ               0x00000001
+#define AR_CFG_SCLK_1MHZ               0x00000002
+#define AR_CFG_SCLK_32KHZ              0x00000003
+#define AR_CFG_LED_BLINK_SLOW          0x00000008
+#define AR_CFG_LED_BLINK_THRESH_SEL    0x00000070
+#define AR_CFG_LED_MODE_SEL            0x00000380
+#define AR_CFG_LED_MODE_SEL_S          7
+#define AR_CFG_LED_POWER               0x00000280
+#define AR_CFG_LED_POWER_S             7
+#define AR_CFG_LED_NETWORK             0x00000300
+#define AR_CFG_LED_NETWORK_S           7
+#define AR_CFG_LED_MODE_PROP           0x0
+#define AR_CFG_LED_MODE_RPROP          0x1
+#define AR_CFG_LED_MODE_SPLIT          0x2
+#define AR_CFG_LED_MODE_RAND           0x3
+#define AR_CFG_LED_MODE_POWER_OFF      0x4
+#define AR_CFG_LED_MODE_POWER_ON       0x5
+#define AR_CFG_LED_MODE_NETWORK_OFF    0x4
+#define AR_CFG_LED_MODE_NETWORK_ON     0x6
+#define AR_CFG_LED_ASSOC_CTL           0x00000c00
+#define AR_CFG_LED_ASSOC_CTL_S         10
+#define AR_CFG_LED_ASSOC_NONE          0x0
+#define AR_CFG_LED_ASSOC_ACTIVE        0x1
+#define AR_CFG_LED_ASSOC_PENDING       0x2
+
+#define AR_CFG_LED_BLINK_SLOW          0x00000008
+#define AR_CFG_LED_BLINK_SLOW_S        3
+
+#define AR_CFG_LED_BLINK_THRESH_SEL    0x00000070
+#define AR_CFG_LED_BLINK_THRESH_SEL_S  4
+
+#define AR_MAC_SLEEP                0x1f00
+#define AR_MAC_SLEEP_MAC_AWAKE      0x00000000
+#define AR_MAC_SLEEP_MAC_ASLEEP     0x00000001
+
+#define AR_RC                0x4000
+#define AR_RC_AHB            0x00000001
+#define AR_RC_APB            0x00000002
+#define AR_RC_HOSTIF         0x00000100
+
+#define AR_WA                0x4004
+
+#define AR_PM_STATE                 0x4008
+#define AR_PM_STATE_PME_D3COLD_VAUX 0x00100000
+
+#define AR_HOST_TIMEOUT             0x4018
+#define AR_HOST_TIMEOUT_APB_CNTR    0x0000FFFF
+#define AR_HOST_TIMEOUT_APB_CNTR_S  0
+#define AR_HOST_TIMEOUT_LCL_CNTR    0xFFFF0000
+#define AR_HOST_TIMEOUT_LCL_CNTR_S  16
+
+#define AR_EEPROM                0x401c
+#define AR_EEPROM_ABSENT         0x00000100
+#define AR_EEPROM_CORRUPT        0x00000200
+#define AR_EEPROM_PROT_MASK      0x03FFFC00
+#define AR_EEPROM_PROT_MASK_S    10
+
+#define EEPROM_PROTECT_RP_0_31        0x0001
+#define EEPROM_PROTECT_WP_0_31        0x0002
+#define EEPROM_PROTECT_RP_32_63       0x0004
+#define EEPROM_PROTECT_WP_32_63       0x0008
+#define EEPROM_PROTECT_RP_64_127      0x0010
+#define EEPROM_PROTECT_WP_64_127      0x0020
+#define EEPROM_PROTECT_RP_128_191     0x0040
+#define EEPROM_PROTECT_WP_128_191     0x0080
+#define EEPROM_PROTECT_RP_192_255     0x0100
+#define EEPROM_PROTECT_WP_192_255     0x0200
+#define EEPROM_PROTECT_RP_256_511     0x0400
+#define EEPROM_PROTECT_WP_256_511     0x0800
+#define EEPROM_PROTECT_RP_512_1023    0x1000
+#define EEPROM_PROTECT_WP_512_1023    0x2000
+#define EEPROM_PROTECT_RP_1024_2047   0x4000
+#define EEPROM_PROTECT_WP_1024_2047   0x8000
+
+#define AR_SREV \
+        ((AR_SREV_9100(ah)) ? 0x0600 : 0x4020)
+
+#define AR_SREV_ID \
+        ((AR_SREV_9100(ah)) ? 0x00000FFF : 0x000000FF)
+#define AR_SREV_VERSION                       0x000000F0
+#define AR_SREV_VERSION_S                     4
+#define AR_SREV_REVISION                      0x00000007
+
+#define AR_SREV_ID2                           0xFFFFFFFF
+#define AR_SREV_VERSION2                      0xFFFC0000
+#define AR_SREV_VERSION2_S                    18
+#define AR_SREV_TYPE2                         0x0003F000
+#define AR_SREV_TYPE2_S                       12
+#define AR_SREV_TYPE2_CHAIN                   0x00001000
+#define AR_SREV_TYPE2_HOST_MODE               0x00002000
+#define AR_SREV_REVISION2                     0x00000F00
+#define AR_SREV_REVISION2_S                   8
+
+#define AR_SREV_VERSION_5416_PCI               0xD
+#define AR_SREV_VERSION_5416_PCIE              0xC
+#define AR_SREV_REVISION_5416_10               0
+#define AR_SREV_REVISION_5416_20               1
+#define AR_SREV_REVISION_5416_22               2
+#define AR_SREV_VERSION_9160                  0x40
+#define AR_SREV_REVISION_9160_10              0
+#define AR_SREV_REVISION_9160_11              1
+#define AR_SREV_VERSION_9280                0x80
+#define AR_SREV_REVISION_9280_10            0
+#define AR_SREV_REVISION_9280_20            1
+#define AR_SREV_REVISION_9280_21            2
+#define AR_SREV_VERSION_9285                  0xC0
+#define AR_SREV_REVISION_9285_10              0
+
+#define AR_SREV_9100_OR_LATER(_ah) \
+        (((_ah)->ah_macVersion >= AR_SREV_VERSION_5416_PCIE))
+#define AR_SREV_5416_20_OR_LATER(_ah) \
+        (((_ah)->ah_macVersion >= AR_SREV_VERSION_9160) || \
+                ((_ah)->ah_macRev >= AR_SREV_REVISION_5416_20))
+#define AR_SREV_5416_22_OR_LATER(_ah) \
+        (((_ah)->ah_macVersion >= AR_SREV_VERSION_9160) || \
+                ((_ah)->ah_macRev >= AR_SREV_REVISION_5416_22))
+#define AR_SREV_9160(_ah) \
+        (((_ah)->ah_macVersion == AR_SREV_VERSION_9160))
+#define AR_SREV_9160_10_OR_LATER(_ah) \
+        (((_ah)->ah_macVersion >= AR_SREV_VERSION_9160))
+#define AR_SREV_9160_11(_ah) \
+        (AR_SREV_9160(_ah) && ((_ah)->ah_macRev == AR_SREV_REVISION_9160_11))
+#define AR_SREV_9280(_ah) \
+        (((_ah)->ah_macVersion == AR_SREV_VERSION_9280))
+#define AR_SREV_9280_10_OR_LATER(_ah) \
+        (((_ah)->ah_macVersion >= AR_SREV_VERSION_9280))
+#define AR_SREV_9280_20(_ah) \
+        (((_ah)->ah_macVersion == AR_SREV_VERSION_9280) && \
+                ((_ah)->ah_macRev >= AR_SREV_REVISION_9280_20))
+#define AR_SREV_9280_20_OR_LATER(_ah) \
+        (((_ah)->ah_macVersion > AR_SREV_VERSION_9280) || \
+        (((_ah)->ah_macVersion == AR_SREV_VERSION_9280) && \
+        ((_ah)->ah_macRev >= AR_SREV_REVISION_9280_20)))
+
+#define AR_SREV_9285(_ah) (((_ah)->ah_macVersion == AR_SREV_VERSION_9285))
+#define AR_SREV_9285_10_OR_LATER(_ah) \
+        (((_ah)->ah_macVersion >= AR_SREV_VERSION_9285))
+
+#define AR_RADIO_SREV_MAJOR                   0xf0
+#define AR_RAD5133_SREV_MAJOR                 0xc0
+#define AR_RAD2133_SREV_MAJOR                 0xd0
+#define AR_RAD5122_SREV_MAJOR                 0xe0
+#define AR_RAD2122_SREV_MAJOR                 0xf0
+
+#define AR_AHB_MODE                           0x4024
+#define AR_AHB_EXACT_WR_EN                    0x00000000
+#define AR_AHB_BUF_WR_EN                      0x00000001
+#define AR_AHB_EXACT_RD_EN                    0x00000000
+#define AR_AHB_CACHELINE_RD_EN                0x00000002
+#define AR_AHB_PREFETCH_RD_EN                 0x00000004
+#define AR_AHB_PAGE_SIZE_1K                   0x00000000
+#define AR_AHB_PAGE_SIZE_2K                   0x00000008
+#define AR_AHB_PAGE_SIZE_4K                   0x00000010
+
+#define AR_INTR_RTC_IRQ                       0x00000001
+#define AR_INTR_MAC_IRQ                       0x00000002
+#define AR_INTR_EEP_PROT_ACCESS               0x00000004
+#define AR_INTR_MAC_AWAKE                     0x00020000
+#define AR_INTR_MAC_ASLEEP                    0x00040000
+#define AR_INTR_SPURIOUS                      0xFFFFFFFF
+
+
+#define AR_INTR_SYNC_CAUSE_CLR                0x4028
+
+#define AR_INTR_SYNC_CAUSE                    0x4028
+
+#define AR_INTR_SYNC_ENABLE                   0x402c
+#define AR_INTR_SYNC_ENABLE_GPIO              0xFFFC0000
+#define AR_INTR_SYNC_ENABLE_GPIO_S            18
+
+enum {
+        AR_INTR_SYNC_RTC_IRQ = 0x00000001,
+        AR_INTR_SYNC_MAC_IRQ = 0x00000002,
+        AR_INTR_SYNC_EEPROM_ILLEGAL_ACCESS = 0x00000004,
+        AR_INTR_SYNC_APB_TIMEOUT = 0x00000008,
+        AR_INTR_SYNC_PCI_MODE_CONFLICT = 0x00000010,
+        AR_INTR_SYNC_HOST1_FATAL = 0x00000020,
+        AR_INTR_SYNC_HOST1_PERR = 0x00000040,
+        AR_INTR_SYNC_TRCV_FIFO_PERR = 0x00000080,
+        AR_INTR_SYNC_RADM_CPL_EP = 0x00000100,
+        AR_INTR_SYNC_RADM_CPL_DLLP_ABORT = 0x00000200,
+        AR_INTR_SYNC_RADM_CPL_TLP_ABORT = 0x00000400,
+        AR_INTR_SYNC_RADM_CPL_ECRC_ERR = 0x00000800,
+        AR_INTR_SYNC_RADM_CPL_TIMEOUT = 0x00001000,
+        AR_INTR_SYNC_LOCAL_TIMEOUT = 0x00002000,
+        AR_INTR_SYNC_PM_ACCESS = 0x00004000,
+        AR_INTR_SYNC_MAC_AWAKE = 0x00008000,
+        AR_INTR_SYNC_MAC_ASLEEP = 0x00010000,
+        AR_INTR_SYNC_MAC_SLEEP_ACCESS = 0x00020000,
+        AR_INTR_SYNC_ALL = 0x0003FFFF,
+
+
+        AR_INTR_SYNC_DEFAULT = (AR_INTR_SYNC_HOST1_FATAL |
+                                AR_INTR_SYNC_HOST1_PERR |
+                                AR_INTR_SYNC_RADM_CPL_EP |
+                                AR_INTR_SYNC_RADM_CPL_DLLP_ABORT |
+                                AR_INTR_SYNC_RADM_CPL_TLP_ABORT |
+                                AR_INTR_SYNC_RADM_CPL_ECRC_ERR |
+                                AR_INTR_SYNC_RADM_CPL_TIMEOUT |
+                                AR_INTR_SYNC_LOCAL_TIMEOUT |
+                                AR_INTR_SYNC_MAC_SLEEP_ACCESS),
+
+        AR_INTR_SYNC_SPURIOUS = 0xFFFFFFFF,
+
+};
+
+#define AR_INTR_ASYNC_MASK                       0x4030
+#define AR_INTR_ASYNC_MASK_GPIO                  0xFFFC0000
+#define AR_INTR_ASYNC_MASK_GPIO_S                18
+
+#define AR_INTR_SYNC_MASK                        0x4034
+#define AR_INTR_SYNC_MASK_GPIO                   0xFFFC0000
+#define AR_INTR_SYNC_MASK_GPIO_S                 18
+
+#define AR_INTR_ASYNC_CAUSE_CLR                  0x4038
+#define AR_INTR_ASYNC_CAUSE                      0x4038
+
+#define AR_INTR_ASYNC_ENABLE                     0x403c
+#define AR_INTR_ASYNC_ENABLE_GPIO                0xFFFC0000
+#define AR_INTR_ASYNC_ENABLE_GPIO_S              18
+
+#define AR_PCIE_SERDES                           0x4040
+#define AR_PCIE_SERDES2                          0x4044
+#define AR_PCIE_PM_CTRL                          0x4014
+#define AR_PCIE_PM_CTRL_ENA                      0x00080000
+
+#define AR_NUM_GPIO                              14
+#define AR928X_NUM_GPIO                          10
+
+#define AR_GPIO_IN_OUT                           0x4048
+#define AR_GPIO_IN_VAL                           0x0FFFC000
+#define AR_GPIO_IN_VAL_S                         14
+#define AR928X_GPIO_IN_VAL                       0x000FFC00
+#define AR928X_GPIO_IN_VAL_S                     10
+
+#define AR_GPIO_OE_OUT                           0x404c
+#define AR_GPIO_OE_OUT_DRV                       0x3
+#define AR_GPIO_OE_OUT_DRV_NO                    0x0
+#define AR_GPIO_OE_OUT_DRV_LOW                   0x1
+#define AR_GPIO_OE_OUT_DRV_HI                    0x2
+#define AR_GPIO_OE_OUT_DRV_ALL                   0x3
+
+#define AR_GPIO_INTR_POL                         0x4050
+#define AR_GPIO_INTR_POL_VAL                     0x00001FFF
+#define AR_GPIO_INTR_POL_VAL_S                   0
+
+#define AR_GPIO_INPUT_EN_VAL                     0x4054
+#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF        0x00000080
+#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF_S      7
+#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB         0x00008000
+#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB_S       15
+#define AR_GPIO_RTC_RESET_OVERRIDE_ENABLE        0x00010000
+#define AR_GPIO_JTAG_DISABLE                     0x00020000
+
+#define AR_GPIO_INPUT_MUX1                       0x4058
+
+#define AR_GPIO_INPUT_MUX2                       0x405c
+#define AR_GPIO_INPUT_MUX2_CLK25                 0x0000000f
+#define AR_GPIO_INPUT_MUX2_CLK25_S               0
+#define AR_GPIO_INPUT_MUX2_RFSILENT              0x000000f0
+#define AR_GPIO_INPUT_MUX2_RFSILENT_S            4
+#define AR_GPIO_INPUT_MUX2_RTC_RESET             0x00000f00
+#define AR_GPIO_INPUT_MUX2_RTC_RESET_S           8
+
+#define AR_GPIO_OUTPUT_MUX1                      0x4060
+#define AR_GPIO_OUTPUT_MUX2                      0x4064
+#define AR_GPIO_OUTPUT_MUX3                      0x4068
+
+#define AR_GPIO_OUTPUT_MUX_AS_OUTPUT             0
+#define AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED 1
+#define AR_GPIO_OUTPUT_MUX_AS_PCIE_POWER_LED     2
+#define AR_GPIO_OUTPUT_MUX_AS_MAC_NETWORK_LED    5
+#define AR_GPIO_OUTPUT_MUX_AS_MAC_POWER_LED      6
+
+#define AR_INPUT_STATE                           0x406c
+
+#define AR_EEPROM_STATUS_DATA                    0x407c
+#define AR_EEPROM_STATUS_DATA_VAL                0x0000ffff
+#define AR_EEPROM_STATUS_DATA_VAL_S              0
+#define AR_EEPROM_STATUS_DATA_BUSY               0x00010000
+#define AR_EEPROM_STATUS_DATA_BUSY_ACCESS        0x00020000
+#define AR_EEPROM_STATUS_DATA_PROT_ACCESS        0x00040000
+#define AR_EEPROM_STATUS_DATA_ABSENT_ACCESS      0x00080000
+
+#define AR_OBS                  0x4080
+
+#define AR_PCIE_MSI                              0x4094
+#define AR_PCIE_MSI_ENABLE                       0x00000001
+
+
+#define AR_RTC_9160_PLL_DIV     0x000003ff
+#define AR_RTC_9160_PLL_DIV_S   0
+#define AR_RTC_9160_PLL_REFDIV  0x00003C00
+#define AR_RTC_9160_PLL_REFDIV_S 10
+#define AR_RTC_9160_PLL_CLKSEL  0x0000C000
+#define AR_RTC_9160_PLL_CLKSEL_S 14
+
+#define AR_RTC_BASE             0x00020000
+#define AR_RTC_RC \
+        (AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0000) : 0x7000
+#define AR_RTC_RC_M             0x00000003
+#define AR_RTC_RC_MAC_WARM      0x00000001
+#define AR_RTC_RC_MAC_COLD      0x00000002
+#define AR_RTC_RC_COLD_RESET    0x00000004
+#define AR_RTC_RC_WARM_RESET    0x00000008
+
+#define AR_RTC_PLL_CONTROL \
+        (AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0014) : 0x7014
+
+#define AR_RTC_PLL_DIV          0x0000001f
+#define AR_RTC_PLL_DIV_S        0
+#define AR_RTC_PLL_DIV2         0x00000020
+#define AR_RTC_PLL_REFDIV_5     0x000000c0
+#define AR_RTC_PLL_CLKSEL       0x00000300
+#define AR_RTC_PLL_CLKSEL_S     8
+
+
+
+#define AR_RTC_RESET \
+        ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040)
+#define AR_RTC_RESET_EN         (0x00000001)
+
+#define AR_RTC_STATUS \
+        ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0044) : 0x7044)
+
+#define AR_RTC_STATUS_M \
+        ((AR_SREV_9100(ah)) ? 0x0000003f : 0x0000000f)
+
+#define AR_RTC_PM_STATUS_M      0x0000000f
+
+#define AR_RTC_STATUS_SHUTDOWN  0x00000001
+#define AR_RTC_STATUS_ON        0x00000002
+#define AR_RTC_STATUS_SLEEP     0x00000004
+#define AR_RTC_STATUS_WAKEUP    0x00000008
+
+#define AR_RTC_SLEEP_CLK \
+        ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0048) : 0x7048)
+#define AR_RTC_FORCE_DERIVED_CLK    0x2
+
+#define AR_RTC_FORCE_WAKE \
+        ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x004c) : 0x704c)
+#define AR_RTC_FORCE_WAKE_EN        0x00000001
+#define AR_RTC_FORCE_WAKE_ON_INT    0x00000002
+
+
+#define AR_RTC_INTR_CAUSE \
+        ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0050) : 0x7050)
+
+#define AR_RTC_INTR_ENABLE \
+        ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0054) : 0x7054)
+
+#define AR_RTC_INTR_MASK \
+        ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0058) : 0x7058)
+
+#define AR_SEQ_MASK     0x8060
+
+#define AR_AN_RF2G1_CH0         0x7810
+#define AR_AN_RF2G1_CH0_OB      0x03800000
+#define AR_AN_RF2G1_CH0_OB_S    23
+#define AR_AN_RF2G1_CH0_DB      0x1C000000
+#define AR_AN_RF2G1_CH0_DB_S    26
+
+#define AR_AN_RF5G1_CH0         0x7818
+#define AR_AN_RF5G1_CH0_OB5     0x00070000
+#define AR_AN_RF5G1_CH0_OB5_S   16
+#define AR_AN_RF5G1_CH0_DB5     0x00380000
+#define AR_AN_RF5G1_CH0_DB5_S   19
+
+#define AR_AN_RF2G1_CH1         0x7834
+#define AR_AN_RF2G1_CH1_OB      0x03800000
+#define AR_AN_RF2G1_CH1_OB_S    23
+#define AR_AN_RF2G1_CH1_DB      0x1C000000
+#define AR_AN_RF2G1_CH1_DB_S    26
+
+#define AR_AN_RF5G1_CH1         0x783C
+#define AR_AN_RF5G1_CH1_OB5     0x00070000
+#define AR_AN_RF5G1_CH1_OB5_S   16
+#define AR_AN_RF5G1_CH1_DB5     0x00380000
+#define AR_AN_RF5G1_CH1_DB5_S   19
+
+#define AR_AN_TOP2                  0x7894
+#define AR_AN_TOP2_XPABIAS_LVL      0xC0000000
+#define AR_AN_TOP2_XPABIAS_LVL_S    30
+#define AR_AN_TOP2_LOCALBIAS        0x00200000
+#define AR_AN_TOP2_LOCALBIAS_S      21
+#define AR_AN_TOP2_PWDCLKIND        0x00400000
+#define AR_AN_TOP2_PWDCLKIND_S      22
+
+#define AR_AN_SYNTH9            0x7868
+#define AR_AN_SYNTH9_REFDIVA    0xf8000000
+#define AR_AN_SYNTH9_REFDIVA_S  27
+
+#define AR_STA_ID0                 0x8000
+#define AR_STA_ID1                 0x8004
+#define AR_STA_ID1_SADH_MASK       0x0000FFFF
+#define AR_STA_ID1_STA_AP          0x00010000
+#define AR_STA_ID1_ADHOC           0x00020000
+#define AR_STA_ID1_PWR_SAV         0x00040000
+#define AR_STA_ID1_KSRCHDIS        0x00080000
+#define AR_STA_ID1_PCF             0x00100000
+#define AR_STA_ID1_USE_DEFANT      0x00200000
+#define AR_STA_ID1_DEFANT_UPDATE   0x00400000
+#define AR_STA_ID1_RTS_USE_DEF     0x00800000
+#define AR_STA_ID1_ACKCTS_6MB      0x01000000
+#define AR_STA_ID1_BASE_RATE_11B   0x02000000
+#define AR_STA_ID1_SECTOR_SELF_GEN 0x04000000
+#define AR_STA_ID1_CRPT_MIC_ENABLE 0x08000000
+#define AR_STA_ID1_KSRCH_MODE      0x10000000
+#define AR_STA_ID1_PRESERVE_SEQNUM 0x20000000
+#define AR_STA_ID1_CBCIV_ENDIAN    0x40000000
+#define AR_STA_ID1_MCAST_KSRCH     0x80000000
+
+#define AR_BSS_ID0          0x8008
+#define AR_BSS_ID1          0x800C
+#define AR_BSS_ID1_U16       0x0000FFFF
+#define AR_BSS_ID1_AID       0x07FF0000
+#define AR_BSS_ID1_AID_S     16
+
+#define AR_BCN_RSSI_AVE      0x8010
+#define AR_BCN_RSSI_AVE_MASK 0x00000FFF
+
+#define AR_TIME_OUT         0x8014
+#define AR_TIME_OUT_ACK      0x00003FFF
+#define AR_TIME_OUT_ACK_S    0
+#define AR_TIME_OUT_CTS      0x3FFF0000
+#define AR_TIME_OUT_CTS_S    16
+
+#define AR_RSSI_THR          0x8018
+#define AR_RSSI_THR_MASK     0x000000FF
+#define AR_RSSI_THR_BM_THR   0x0000FF00
+#define AR_RSSI_THR_BM_THR_S 8
+#define AR_RSSI_BCN_WEIGHT   0x1F000000
+#define AR_RSSI_BCN_WEIGHT_S 24
+#define AR_RSSI_BCN_RSSI_RST 0x20000000
+
+#define AR_USEC              0x801c
+#define AR_USEC_USEC         0x0000007F
+#define AR_USEC_TX_LAT       0x007FC000
+#define AR_USEC_TX_LAT_S     14
+#define AR_USEC_RX_LAT       0x1F800000
+#define AR_USEC_RX_LAT_S     23
+
+#define AR_RESET_TSF        0x8020
+#define AR_RESET_TSF_ONCE   0x01000000
+
+#define AR_MAX_CFP_DUR      0x8038
+#define AR_CFP_VAL          0x0000FFFF
+
+#define AR_RX_FILTER        0x803C
+#define AR_RX_FILTER_ALL    0x00000000
+#define AR_RX_UCAST         0x00000001
+#define AR_RX_MCAST         0x00000002
+#define AR_RX_BCAST         0x00000004
+#define AR_RX_CONTROL       0x00000008
+#define AR_RX_BEACON        0x00000010
+#define AR_RX_PROM          0x00000020
+#define AR_RX_PROBE_REQ     0x00000080
+#define AR_RX_MY_BEACON     0x00000200
+#define AR_RX_COMPR_BAR     0x00000400
+#define AR_RX_COMPR_BA      0x00000800
+#define AR_RX_UNCOM_BA_BAR  0x00001000
+
+#define AR_MCAST_FIL0       0x8040
+#define AR_MCAST_FIL1       0x8044
+
+#define AR_DIAG_SW                  0x8048
+#define AR_DIAG_CACHE_ACK           0x00000001
+#define AR_DIAG_ACK_DIS             0x00000002
+#define AR_DIAG_CTS_DIS             0x00000004
+#define AR_DIAG_ENCRYPT_DIS         0x00000008
+#define AR_DIAG_DECRYPT_DIS         0x00000010
+#define AR_DIAG_RX_DIS              0x00000020
+#define AR_DIAG_LOOP_BACK           0x00000040
+#define AR_DIAG_CORR_FCS            0x00000080
+#define AR_DIAG_CHAN_INFO           0x00000100
+#define AR_DIAG_SCRAM_SEED          0x0001FE00
+#define AR_DIAG_SCRAM_SEED_S        8
+#define AR_DIAG_FRAME_NV0           0x00020000
+#define AR_DIAG_OBS_PT_SEL1         0x000C0000
+#define AR_DIAG_OBS_PT_SEL1_S       18
+#define AR_DIAG_FORCE_RX_CLEAR      0x00100000
+#define AR_DIAG_IGNORE_VIRT_CS      0x00200000
+#define AR_DIAG_FORCE_CH_IDLE_HIGH  0x00400000
+#define AR_DIAG_EIFS_CTRL_ENA       0x00800000
+#define AR_DIAG_DUAL_CHAIN_INFO     0x01000000
+#define AR_DIAG_RX_ABORT            0x02000000
+#define AR_DIAG_SATURATE_CYCLE_CNT  0x04000000
+#define AR_DIAG_OBS_PT_SEL2         0x08000000
+#define AR_DIAG_RX_CLEAR_CTL_LOW    0x10000000
+#define AR_DIAG_RX_CLEAR_EXT_LOW    0x20000000
+
+#define AR_TSF_L32          0x804c
+#define AR_TSF_U32          0x8050
+
+#define AR_TST_ADDAC        0x8054
+#define AR_DEF_ANTENNA      0x8058
+
+#define AR_AES_MUTE_MASK0       0x805c
+#define AR_AES_MUTE_MASK0_FC    0x0000FFFF
+#define AR_AES_MUTE_MASK0_QOS   0xFFFF0000
+#define AR_AES_MUTE_MASK0_QOS_S 16
+
+#define AR_AES_MUTE_MASK1       0x8060
+#define AR_AES_MUTE_MASK1_SEQ   0x0000FFFF
+
+#define AR_GATED_CLKS       0x8064
+#define AR_GATED_CLKS_TX    0x00000002
+#define AR_GATED_CLKS_RX    0x00000004
+#define AR_GATED_CLKS_REG   0x00000008
+
+#define AR_OBS_BUS_CTRL     0x8068
+#define AR_OBS_BUS_SEL_1    0x00040000
+#define AR_OBS_BUS_SEL_2    0x00080000
+#define AR_OBS_BUS_SEL_3    0x000C0000
+#define AR_OBS_BUS_SEL_4    0x08040000
+#define AR_OBS_BUS_SEL_5    0x08080000
+
+#define AR_OBS_BUS_1               0x806c
+#define AR_OBS_BUS_1_PCU           0x00000001
+#define AR_OBS_BUS_1_RX_END        0x00000002
+#define AR_OBS_BUS_1_RX_WEP        0x00000004
+#define AR_OBS_BUS_1_RX_BEACON     0x00000008
+#define AR_OBS_BUS_1_RX_FILTER     0x00000010
+#define AR_OBS_BUS_1_TX_HCF        0x00000020
+#define AR_OBS_BUS_1_QUIET_TIME    0x00000040
+#define AR_OBS_BUS_1_CHAN_IDLE     0x00000080
+#define AR_OBS_BUS_1_TX_HOLD       0x00000100
+#define AR_OBS_BUS_1_TX_FRAME      0x00000200
+#define AR_OBS_BUS_1_RX_FRAME      0x00000400
+#define AR_OBS_BUS_1_RX_CLEAR      0x00000800
+#define AR_OBS_BUS_1_WEP_STATE     0x0003F000
+#define AR_OBS_BUS_1_WEP_STATE_S   12
+#define AR_OBS_BUS_1_RX_STATE      0x01F00000
+#define AR_OBS_BUS_1_RX_STATE_S    20
+#define AR_OBS_BUS_1_TX_STATE      0x7E000000
+#define AR_OBS_BUS_1_TX_STATE_S    25
+
+#define AR_LAST_TSTP        0x8080
+#define AR_NAV              0x8084
+#define AR_RTS_OK           0x8088
+#define AR_RTS_FAIL         0x808c
+#define AR_ACK_FAIL         0x8090
+#define AR_FCS_FAIL         0x8094
+#define AR_BEACON_CNT       0x8098
+
+#define AR_SLEEP1               0x80d4
+#define AR_SLEEP1_ASSUME_DTIM   0x00080000
+#define AR_SLEEP1_CAB_TIMEOUT   0xFFE00000
+#define AR_SLEEP1_CAB_TIMEOUT_S 21
+
+#define AR_SLEEP2                   0x80d8
+#define AR_SLEEP2_BEACON_TIMEOUT    0xFFE00000
+#define AR_SLEEP2_BEACON_TIMEOUT_S  21
+
+#define AR_BSSMSKL            0x80e0
+#define AR_BSSMSKU            0x80e4
+
+#define AR_TPC                 0x80e8
+#define AR_TPC_ACK             0x0000003f
+#define AR_TPC_ACK_S           0x00
+#define AR_TPC_CTS             0x00003f00
+#define AR_TPC_CTS_S           0x08
+#define AR_TPC_CHIRP           0x003f0000
+#define AR_TPC_CHIRP_S         0x16
+
+#define AR_TFCNT           0x80ec
+#define AR_RFCNT           0x80f0
+#define AR_RCCNT           0x80f4
+#define AR_CCCNT           0x80f8
+
+#define AR_QUIET1          0x80fc
+#define AR_QUIET1_NEXT_QUIET_S         0
+#define AR_QUIET1_NEXT_QUIET_M         0x0000ffff
+#define AR_QUIET1_QUIET_ENABLE         0x00010000
+#define AR_QUIET1_QUIET_ACK_CTS_ENABLE 0x00020000
+#define AR_QUIET2          0x8100
+#define AR_QUIET2_QUIET_PERIOD_S       0
+#define AR_QUIET2_QUIET_PERIOD_M       0x0000ffff
+#define AR_QUIET2_QUIET_DUR_S     16
+#define AR_QUIET2_QUIET_DUR       0xffff0000
+
+#define AR_TSF_PARM        0x8104
+#define AR_TSF_INCREMENT_M     0x000000ff
+#define AR_TSF_INCREMENT_S     0x00
+
+#define AR_QOS_NO_ACK              0x8108
+#define AR_QOS_NO_ACK_TWO_BIT      0x0000000f
+#define AR_QOS_NO_ACK_TWO_BIT_S    0
+#define AR_QOS_NO_ACK_BIT_OFF      0x00000070
+#define AR_QOS_NO_ACK_BIT_OFF_S    4
+#define AR_QOS_NO_ACK_BYTE_OFF     0x00000180
+#define AR_QOS_NO_ACK_BYTE_OFF_S   7
+
+#define AR_PHY_ERR         0x810c
+
+#define AR_PHY_ERR_DCHIRP      0x00000008
+#define AR_PHY_ERR_RADAR       0x00000020
+#define AR_PHY_ERR_OFDM_TIMING 0x00020000
+#define AR_PHY_ERR_CCK_TIMING  0x02000000
+
+#define AR_RXFIFO_CFG          0x8114
+
+
+#define AR_MIC_QOS_CONTROL 0x8118
+#define AR_MIC_QOS_SELECT  0x811c
+
+#define AR_PCU_MISC                0x8120
+#define AR_PCU_FORCE_BSSID_MATCH   0x00000001
+#define AR_PCU_MIC_NEW_LOC_ENA     0x00000004
+#define AR_PCU_TX_ADD_TSF          0x00000008
+#define AR_PCU_CCK_SIFS_MODE       0x00000010
+#define AR_PCU_RX_ANT_UPDT         0x00000800
+#define AR_PCU_TXOP_TBTT_LIMIT_ENA 0x00001000
+#define AR_PCU_MISS_BCN_IN_SLEEP   0x00004000
+#define AR_PCU_BUG_12306_FIX_ENA   0x00020000
+#define AR_PCU_FORCE_QUIET_COLL    0x00040000
+#define AR_PCU_TBTT_PROTECT        0x00200000
+#define AR_PCU_CLEAR_VMF           0x01000000
+#define AR_PCU_CLEAR_BA_VALID      0x04000000
+
+
+#define AR_FILT_OFDM           0x8124
+#define AR_FILT_OFDM_COUNT     0x00FFFFFF
+
+#define AR_FILT_CCK            0x8128
+#define AR_FILT_CCK_COUNT      0x00FFFFFF
+
+#define AR_PHY_ERR_1           0x812c
+#define AR_PHY_ERR_1_COUNT     0x00FFFFFF
+#define AR_PHY_ERR_MASK_1      0x8130
+
+#define AR_PHY_ERR_2           0x8134
+#define AR_PHY_ERR_2_COUNT     0x00FFFFFF
+#define AR_PHY_ERR_MASK_2      0x8138
+
+#define AR_PHY_COUNTMAX        (3 << 22)
+#define AR_MIBCNT_INTRMASK     (3 << 22)
+
+#define AR_TSF_THRESHOLD       0x813c
+#define AR_TSF_THRESHOLD_VAL   0x0000FFFF
+
+#define AR_PHY_ERR_EIFS_MASK   8144
+
+#define AR_PHY_ERR_3           0x8168
+#define AR_PHY_ERR_3_COUNT     0x00FFFFFF
+#define AR_PHY_ERR_MASK_3      0x816c
+
+#define AR_TXSIFS              0x81d0
+#define AR_TXSIFS_TIME         0x000000FF
+#define AR_TXSIFS_TX_LATENCY   0x00000F00
+#define AR_TXSIFS_TX_LATENCY_S 8
+#define AR_TXSIFS_ACK_SHIFT    0x00007000
+#define AR_TXSIFS_ACK_SHIFT_S  12
+
+#define AR_TXOP_X          0x81ec
+#define AR_TXOP_X_VAL      0x000000FF
+
+
+#define AR_TXOP_0_3    0x81f0
+#define AR_TXOP_4_7    0x81f4
+#define AR_TXOP_8_11   0x81f8
+#define AR_TXOP_12_15  0x81fc
+
+
+#define AR_NEXT_TBTT_TIMER                  0x8200
+#define AR_NEXT_DMA_BEACON_ALERT            0x8204
+#define AR_NEXT_SWBA                        0x8208
+#define AR_NEXT_CFP                         0x8208
+#define AR_NEXT_HCF                         0x820C
+#define AR_NEXT_TIM                         0x8210
+#define AR_NEXT_DTIM                        0x8214
+#define AR_NEXT_QUIET_TIMER                 0x8218
+#define AR_NEXT_NDP_TIMER                   0x821C
+
+#define AR_BEACON_PERIOD                    0x8220
+#define AR_DMA_BEACON_PERIOD                0x8224
+#define AR_SWBA_PERIOD                      0x8228
+#define AR_HCF_PERIOD                       0x822C
+#define AR_TIM_PERIOD                       0x8230
+#define AR_DTIM_PERIOD                      0x8234
+#define AR_QUIET_PERIOD                     0x8238
+#define AR_NDP_PERIOD                       0x823C
+
+#define AR_TIMER_MODE                       0x8240
+#define AR_TBTT_TIMER_EN                    0x00000001
+#define AR_DBA_TIMER_EN                     0x00000002
+#define AR_SWBA_TIMER_EN                    0x00000004
+#define AR_HCF_TIMER_EN                     0x00000008
+#define AR_TIM_TIMER_EN                     0x00000010
+#define AR_DTIM_TIMER_EN                    0x00000020
+#define AR_QUIET_TIMER_EN                   0x00000040
+#define AR_NDP_TIMER_EN                     0x00000080
+#define AR_TIMER_OVERFLOW_INDEX             0x00000700
+#define AR_TIMER_OVERFLOW_INDEX_S           8
+#define AR_TIMER_THRESH                     0xFFFFF000
+#define AR_TIMER_THRESH_S                   12
+
+#define AR_SLP32_MODE                  0x8244
+#define AR_SLP32_HALF_CLK_LATENCY      0x000FFFFF
+#define AR_SLP32_ENA                   0x00100000
+#define AR_SLP32_TSF_WRITE_STATUS      0x00200000
+
+#define AR_SLP32_WAKE              0x8248
+#define AR_SLP32_WAKE_XTL_TIME     0x0000FFFF
+
+#define AR_SLP32_INC               0x824c
+#define AR_SLP32_TST_INC           0x000FFFFF
+
+#define AR_SLP_CNT         0x8250
+#define AR_SLP_CYCLE_CNT   0x8254
+
+#define AR_SLP_MIB_CTRL    0x8258
+#define AR_SLP_MIB_CLEAR   0x00000001
+#define AR_SLP_MIB_PENDING 0x00000002
+
+#define AR_2040_MODE                0x8318
+#define AR_2040_JOINED_RX_CLEAR 0x00000001
+
+
+#define AR_EXTRCCNT         0x8328
+
+#define AR_SELFGEN_MASK         0x832c
+
+#define AR_PCU_TXBUF_CTRL               0x8340
+#define AR_PCU_TXBUF_CTRL_SIZE_MASK     0x7FF
+#define AR_PCU_TXBUF_CTRL_USABLE_SIZE   0x700
+#define AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE   0x380
+
+#define AR_KEYTABLE_0           0x8800
+#define AR_KEYTABLE(_n)         (AR_KEYTABLE_0 + ((_n)*32))
+#define AR_KEY_CACHE_SIZE       128
+#define AR_RSVD_KEYTABLE_ENTRIES 4
+#define AR_KEY_TYPE             0x00000007
+#define AR_KEYTABLE_TYPE_40     0x00000000
+#define AR_KEYTABLE_TYPE_104    0x00000001
+#define AR_KEYTABLE_TYPE_128    0x00000003
+#define AR_KEYTABLE_TYPE_TKIP   0x00000004
+#define AR_KEYTABLE_TYPE_AES    0x00000005
+#define AR_KEYTABLE_TYPE_CCM    0x00000006
+#define AR_KEYTABLE_TYPE_CLR    0x00000007
+#define AR_KEYTABLE_ANT         0x00000008
+#define AR_KEYTABLE_VALID       0x00008000
+#define AR_KEYTABLE_KEY0(_n)    (AR_KEYTABLE(_n) + 0)
+#define AR_KEYTABLE_KEY1(_n)    (AR_KEYTABLE(_n) + 4)
+#define AR_KEYTABLE_KEY2(_n)    (AR_KEYTABLE(_n) + 8)
+#define AR_KEYTABLE_KEY3(_n)    (AR_KEYTABLE(_n) + 12)
+#define AR_KEYTABLE_KEY4(_n)    (AR_KEYTABLE(_n) + 16)
+#define AR_KEYTABLE_TYPE(_n)    (AR_KEYTABLE(_n) + 20)
+#define AR_KEYTABLE_MAC0(_n)    (AR_KEYTABLE(_n) + 24)
+#define AR_KEYTABLE_MAC1(_n)    (AR_KEYTABLE(_n) + 28)
+
+#endif
diff --git a/drivers/net/wireless/ath9k/regd.c b/drivers/net/wireless/ath9k/regd.c
new file mode 100644
index 000000000000..62e28887ccd3
--- /dev/null
+++ b/drivers/net/wireless/ath9k/regd.c
@@ -0,0 +1,1026 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include "core.h"
+#include "hw.h"
+#include "regd.h"
+#include "regd_common.h"
+
+static int ath9k_regd_chansort(const void *a, const void *b)
+{
+        const struct ath9k_channel *ca = a;
+        const struct ath9k_channel *cb = b;
+
+        return (ca->channel == cb->channel) ?
+            (ca->channelFlags & CHAN_FLAGS) -
+            (cb->channelFlags & CHAN_FLAGS) : ca->channel - cb->channel;
+}
+
+static void
+ath9k_regd_sort(void *a, u32 n, u32 size, ath_hal_cmp_t *cmp)
+{
+        u8 *aa = a;
+        u8 *ai, *t;
+
+        for (ai = aa + size; --n >= 1; ai += size)
+                for (t = ai; t > aa; t -= size) {
+                        u8 *u = t - size;
+                        if (cmp(u, t) <= 0)
+                                break;
+                        swap(u, t, size);
+                }
+}
+
+static u16 ath9k_regd_get_eepromRD(struct ath_hal *ah)
+{
+        return ah->ah_currentRD & ~WORLDWIDE_ROAMING_FLAG;
+}
+
+static bool ath9k_regd_is_chan_bm_zero(u64 *bitmask)
+{
+        int i;
+
+        for (i = 0; i < BMLEN; i++) {
+                if (bitmask[i] != 0)
+                        return false;
+        }
+        return true;
+}
+
+static bool ath9k_regd_is_eeprom_valid(struct ath_hal *ah)
+{
+        u16 rd = ath9k_regd_get_eepromRD(ah);
+        int i;
+
+        if (rd & COUNTRY_ERD_FLAG) {
+                u16 cc = rd & ~COUNTRY_ERD_FLAG;
+                for (i = 0; i < ARRAY_SIZE(allCountries); i++)
+                        if (allCountries[i].countryCode == cc)
+                                return true;
+        } else {
+                for (i = 0; i < ARRAY_SIZE(regDomainPairs); i++)
+                        if (regDomainPairs[i].regDmnEnum == rd)
+                                return true;
+        }
+        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                 "%s: invalid regulatory domain/country code 0x%x\n",
+                 __func__, rd);
+        return false;
+}
+
+static bool ath9k_regd_is_fcc_midband_supported(struct ath_hal *ah)
+{
+        u32 regcap;
+
+        regcap = ah->ah_caps.reg_cap;
+
+        if (regcap & AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND)
+                return true;
+        else
+                return false;
+}
+
+static bool ath9k_regd_is_ccode_valid(struct ath_hal *ah,
+                                      u16 cc)
+{
+        u16 rd;
+        int i;
+
+        if (cc == CTRY_DEFAULT)
+                return true;
+        if (cc == CTRY_DEBUG)
+                return true;
+
+        rd = ath9k_regd_get_eepromRD(ah);
+        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: EEPROM regdomain 0x%x\n",
+                 __func__, rd);
+
+        if (rd & COUNTRY_ERD_FLAG) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: EEPROM setting is country code %u\n",
+                        __func__, rd & ~COUNTRY_ERD_FLAG);
+                return cc == (rd & ~COUNTRY_ERD_FLAG);
+        }
+
+        for (i = 0; i < ARRAY_SIZE(allCountries); i++) {
+                if (cc == allCountries[i].countryCode) {
+#ifdef AH_SUPPORT_11D
+                        if ((rd & WORLD_SKU_MASK) == WORLD_SKU_PREFIX)
+                                return true;
+#endif
+                        if (allCountries[i].regDmnEnum == rd ||
+                            rd == DEBUG_REG_DMN || rd == NO_ENUMRD)
+                                return true;
+                }
+        }
+        return false;
+}
+
+static void
+ath9k_regd_get_wmodes_nreg(struct ath_hal *ah,
+                           struct country_code_to_enum_rd *country,
+                           struct regDomain *rd5GHz,
+                           unsigned long *modes_allowed)
+{
+        bitmap_copy(modes_allowed, ah->ah_caps.wireless_modes, ATH9K_MODE_MAX);
+
+        if (test_bit(ATH9K_MODE_11G, ah->ah_caps.wireless_modes) &&
+            (!country->allow11g))
+                clear_bit(ATH9K_MODE_11G, modes_allowed);
+
+        if (test_bit(ATH9K_MODE_11A, ah->ah_caps.wireless_modes) &&
+            (ath9k_regd_is_chan_bm_zero(rd5GHz->chan11a)))
+                clear_bit(ATH9K_MODE_11A, modes_allowed);
+
+        if (test_bit(ATH9K_MODE_11NG_HT20, ah->ah_caps.wireless_modes)
+            && (!country->allow11ng20))
+                clear_bit(ATH9K_MODE_11NG_HT20, modes_allowed);
+
+        if (test_bit(ATH9K_MODE_11NA_HT20, ah->ah_caps.wireless_modes)
+            && (!country->allow11na20))
+                clear_bit(ATH9K_MODE_11NA_HT20, modes_allowed);
+
+        if (test_bit(ATH9K_MODE_11NG_HT40PLUS, ah->ah_caps.wireless_modes) &&
+            (!country->allow11ng40))
+                clear_bit(ATH9K_MODE_11NG_HT40PLUS, modes_allowed);
+
+        if (test_bit(ATH9K_MODE_11NG_HT40MINUS, ah->ah_caps.wireless_modes) &&
+            (!country->allow11ng40))
+                clear_bit(ATH9K_MODE_11NG_HT40MINUS, modes_allowed);
+
+        if (test_bit(ATH9K_MODE_11NA_HT40PLUS, ah->ah_caps.wireless_modes) &&
+            (!country->allow11na40))
+                clear_bit(ATH9K_MODE_11NA_HT40PLUS, modes_allowed);
+
+        if (test_bit(ATH9K_MODE_11NA_HT40MINUS, ah->ah_caps.wireless_modes) &&
+            (!country->allow11na40))
+                clear_bit(ATH9K_MODE_11NA_HT40MINUS, modes_allowed);
+}
+
+bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah)
+{
+        u16 rd;
+
+        rd = ath9k_regd_get_eepromRD(ah);
+
+        switch (rd) {
+        case FCC4_FCCA:
+        case (CTRY_UNITED_STATES_FCC49 | COUNTRY_ERD_FLAG):
+                return true;
+        case DEBUG_REG_DMN:
+        case NO_ENUMRD:
+                if (ah->ah_countryCode == CTRY_UNITED_STATES_FCC49)
+                        return true;
+                break;
+        }
+        return false;
+}
+
+static struct country_code_to_enum_rd*
+ath9k_regd_find_country(u16 countryCode)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(allCountries); i++) {
+                if (allCountries[i].countryCode == countryCode)
+                        return &allCountries[i];
+        }
+        return NULL;
+}
+
+static u16 ath9k_regd_get_default_country(struct ath_hal *ah)
+{
+        u16 rd;
+        int i;
+
+        rd = ath9k_regd_get_eepromRD(ah);
+        if (rd & COUNTRY_ERD_FLAG) {
+                struct country_code_to_enum_rd *country = NULL;
+                u16 cc = rd & ~COUNTRY_ERD_FLAG;
+
+                country = ath9k_regd_find_country(cc);
+                if (country != NULL)
+                        return cc;
+        }
+
+        for (i = 0; i < ARRAY_SIZE(regDomainPairs); i++)
+                if (regDomainPairs[i].regDmnEnum == rd) {
+                        if (regDomainPairs[i].singleCC != 0)
+                                return regDomainPairs[i].singleCC;
+                        else
+                                i = ARRAY_SIZE(regDomainPairs);
+                }
+        return CTRY_DEFAULT;
+}
+
+static bool ath9k_regd_is_valid_reg_domain(int regDmn,
+                                           struct regDomain *rd)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(regDomains); i++) {
+                if (regDomains[i].regDmnEnum == regDmn) {
+                        if (rd != NULL) {
+                                memcpy(rd, &regDomains[i],
+                                       sizeof(struct regDomain));
+                        }
+                        return true;
+                }
+        }
+        return false;
+}
+
+static bool ath9k_regd_is_valid_reg_domainPair(int regDmnPair)
+{
+        int i;
+
+        if (regDmnPair == NO_ENUMRD)
+                return false;
+        for (i = 0; i < ARRAY_SIZE(regDomainPairs); i++) {
+                if (regDomainPairs[i].regDmnEnum == regDmnPair)
+                        return true;
+        }
+        return false;
+}
+
+static bool
+ath9k_regd_get_wmode_regdomain(struct ath_hal *ah, int regDmn,
+                               u16 channelFlag, struct regDomain *rd)
+{
+        int i, found;
+        u64 flags = NO_REQ;
+        struct reg_dmn_pair_mapping *regPair = NULL;
+        int regOrg;
+
+        regOrg = regDmn;
+        if (regDmn == CTRY_DEFAULT) {
+                u16 rdnum;
+                rdnum = ath9k_regd_get_eepromRD(ah);
+
+                if (!(rdnum & COUNTRY_ERD_FLAG)) {
+                        if (ath9k_regd_is_valid_reg_domain(rdnum, NULL) ||
+                            ath9k_regd_is_valid_reg_domainPair(rdnum)) {
+                                regDmn = rdnum;
+                        }
+                }
+        }
+
+        if ((regDmn & MULTI_DOMAIN_MASK) == 0) {
+                for (i = 0, found = 0;
+                     (i < ARRAY_SIZE(regDomainPairs)) && (!found); i++) {
+                        if (regDomainPairs[i].regDmnEnum == regDmn) {
+                                regPair = &regDomainPairs[i];
+                                found = 1;
+                        }
+                }
+                if (!found) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                                "%s: Failed to find reg domain pair %u\n",
+                                __func__, regDmn);
+                        return false;
+                }
+                if (!(channelFlag & CHANNEL_2GHZ)) {
+                        regDmn = regPair->regDmn5GHz;
+                        flags = regPair->flags5GHz;
+                }
+                if (channelFlag & CHANNEL_2GHZ) {
+                        regDmn = regPair->regDmn2GHz;
+                        flags = regPair->flags2GHz;
+                }
+        }
+
+        found = ath9k_regd_is_valid_reg_domain(regDmn, rd);
+        if (!found) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: Failed to find unitary reg domain %u\n",
+                        __func__, regDmn);
+                return false;
+        } else {
+                rd->pscan &= regPair->pscanMask;
+                if (((regOrg & MULTI_DOMAIN_MASK) == 0) &&
+                    (flags != NO_REQ)) {
+                        rd->flags = flags;
+                }
+
+                rd->flags &= (channelFlag & CHANNEL_2GHZ) ?
+                    REG_DOMAIN_2GHZ_MASK : REG_DOMAIN_5GHZ_MASK;
+                return true;
+        }
+}
+
+static bool ath9k_regd_is_bit_set(int bit, u64 *bitmask)
+{
+        int byteOffset, bitnum;
+        u64 val;
+
+        byteOffset = bit / 64;
+        bitnum = bit - byteOffset * 64;
+        val = ((u64) 1) << bitnum;
+        if (bitmask[byteOffset] & val)
+                return true;
+        else
+                return false;
+}
+
+static void
+ath9k_regd_add_reg_classid(u8 *regclassids, u32 maxregids,
+                           u32 *nregids, u8 regclassid)
+{
+        int i;
+
+        if (regclassid == 0)
+                return;
+
+        for (i = 0; i < maxregids; i++) {
+                if (regclassids[i] == regclassid)
+                        return;
+                if (regclassids[i] == 0)
+                        break;
+        }
+
+        if (i == maxregids)
+                return;
+        else {
+                regclassids[i] = regclassid;
+                *nregids += 1;
+        }
+
+        return;
+}
+
+static bool
+ath9k_regd_get_eeprom_reg_ext_bits(struct ath_hal *ah,
+                                   enum reg_ext_bitmap bit)
+{
+        return (ah->ah_currentRDExt & (1 << bit)) ? true : false;
+}
+
+#ifdef ATH_NF_PER_CHAN
+
+static void ath9k_regd_init_rf_buffer(struct ath9k_channel *ichans,
+                                      int nchans)
+{
+        int i, j, next;
+
+        for (next = 0; next < nchans; next++) {
+                for (i = 0; i < NUM_NF_READINGS; i++) {
+                        ichans[next].nfCalHist[i].currIndex = 0;
+                        ichans[next].nfCalHist[i].privNF =
+                            AR_PHY_CCA_MAX_GOOD_VALUE;
+                        ichans[next].nfCalHist[i].invalidNFcount =
+                            AR_PHY_CCA_FILTERWINDOW_LENGTH;
+                        for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
+                                ichans[next].nfCalHist[i].nfCalBuffer[j] =
+                                    AR_PHY_CCA_MAX_GOOD_VALUE;
+                        }
+                }
+        }
+}
+#endif
+
+static int ath9k_regd_is_chan_present(struct ath_hal *ah,
+                                      u16 c)
+{
+        int i;
+
+        for (i = 0; i < 150; i++) {
+                if (!ah->ah_channels[i].channel)
+                        return -1;
+                else if (ah->ah_channels[i].channel == c)
+                        return i;
+        }
+
+        return -1;
+}
+
+static bool
+ath9k_regd_add_channel(struct ath_hal *ah,
+                       u16 c,
+                       u16 c_lo,
+                       u16 c_hi,
+                       u16 maxChan,
+                       u8 ctl,
+                       int pos,
+                       struct regDomain rd5GHz,
+                       struct RegDmnFreqBand *fband,
+                       struct regDomain *rd,
+                       const struct cmode *cm,
+                       struct ath9k_channel *ichans,
+                       bool enableExtendedChannels)
+{
+        struct ath9k_channel *chan;
+        int ret;
+        u32 channelFlags = 0;
+        u8 privFlags = 0;
+
+        if (!(c_lo <= c && c <= c_hi)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: c %u out of range [%u..%u]\n",
+                        __func__, c, c_lo, c_hi);
+                return false;
+        }
+        if ((fband->channelBW == CHANNEL_HALF_BW) &&
+            !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_HALFRATE)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: Skipping %u half rate channel\n",
+                        __func__, c);
+                return false;
+        }
+
+        if ((fband->channelBW == CHANNEL_QUARTER_BW) &&
+            !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_QUARTERRATE)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: Skipping %u quarter rate channel\n",
+                        __func__, c);
+                return false;
+        }
+
+        if (((c + fband->channelSep) / 2) > (maxChan + HALF_MAXCHANBW)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: c %u > maxChan %u\n",
+                        __func__, c, maxChan);
+                return false;
+        }
+
+        if ((fband->usePassScan & IS_ECM_CHAN) && !enableExtendedChannels) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "Skipping ecm channel\n");
+                return false;
+        }
+
+        if ((rd->flags & NO_HOSTAP) && (ah->ah_opmode == ATH9K_M_HOSTAP)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "Skipping HOSTAP channel\n");
+                return false;
+        }
+
+        if (IS_HT40_MODE(cm->mode) &&
+            !(ath9k_regd_get_eeprom_reg_ext_bits(ah, REG_EXT_FCC_DFS_HT40)) &&
+            (fband->useDfs) &&
+            (rd->conformanceTestLimit != MKK)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "Skipping HT40 channel (en_fcc_dfs_ht40 = 0)\n");
+                return false;
+        }
+
+        if (IS_HT40_MODE(cm->mode) &&
+            !(ath9k_regd_get_eeprom_reg_ext_bits(ah,
+                                                 REG_EXT_JAPAN_NONDFS_HT40)) &&
+            !(fband->useDfs) && (rd->conformanceTestLimit == MKK)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "Skipping HT40 channel (en_jap_ht40 = 0)\n");
+                return false;
+        }
+
+        if (IS_HT40_MODE(cm->mode) &&
+            !(ath9k_regd_get_eeprom_reg_ext_bits(ah, REG_EXT_JAPAN_DFS_HT40)) &&
+            (fband->useDfs) &&
+            (rd->conformanceTestLimit == MKK)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "Skipping HT40 channel (en_jap_dfs_ht40 = 0)\n");
+                return false;
+        }
+
+        /* Calculate channel flags */
+
+        channelFlags = cm->flags;
+
+        switch (fband->channelBW) {
+        case CHANNEL_HALF_BW:
+                channelFlags |= CHANNEL_HALF;
+                break;
+        case CHANNEL_QUARTER_BW:
+                channelFlags |= CHANNEL_QUARTER;
+                break;
+        }
+
+        if (fband->usePassScan & rd->pscan)
+                channelFlags |= CHANNEL_PASSIVE;
+        else
+                channelFlags &= ~CHANNEL_PASSIVE;
+        if (fband->useDfs & rd->dfsMask)
+                privFlags = CHANNEL_DFS;
+        else
+                privFlags = 0;
+        if (rd->flags & LIMIT_FRAME_4MS)
+                privFlags |= CHANNEL_4MS_LIMIT;
+        if (privFlags & CHANNEL_DFS)
+                privFlags |= CHANNEL_DISALLOW_ADHOC;
+        if (rd->flags & ADHOC_PER_11D)
+                privFlags |= CHANNEL_PER_11D_ADHOC;
+
+        if (channelFlags & CHANNEL_PASSIVE) {
+                if ((c < 2412) || (c > 2462)) {
+                        if (rd5GHz.regDmnEnum == MKK1 ||
+                            rd5GHz.regDmnEnum == MKK2) {
+                                u32 regcap = ah->ah_caps.reg_cap;
+                                if (!(regcap &
+                                      (AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN |
+                                       AR_EEPROM_EEREGCAP_EN_KK_U2 |
+                                       AR_EEPROM_EEREGCAP_EN_KK_MIDBAND)) &&
+                                    isUNII1OddChan(c)) {
+                                        channelFlags &= ~CHANNEL_PASSIVE;
+                                } else {
+                                        privFlags |= CHANNEL_DISALLOW_ADHOC;
+                                }
+                        } else {
+                                privFlags |= CHANNEL_DISALLOW_ADHOC;
+                        }
+                }
+        }
+
+        if ((cm->mode == ATH9K_MODE_11A) ||
+            (cm->mode == ATH9K_MODE_11NA_HT20) ||
+            (cm->mode == ATH9K_MODE_11NA_HT40PLUS) ||
+            (cm->mode == ATH9K_MODE_11NA_HT40MINUS)) {
+                if (rd->flags & (ADHOC_NO_11A | DISALLOW_ADHOC_11A))
+                        privFlags |= CHANNEL_DISALLOW_ADHOC;
+        }
+
+        /* Fill in channel details */
+
+        ret = ath9k_regd_is_chan_present(ah, c);
+        if (ret == -1) {
+                chan = &ah->ah_channels[pos];
+                chan->channel = c;
+                chan->maxRegTxPower = fband->powerDfs;
+                chan->antennaMax = fband->antennaMax;
+                chan->regDmnFlags = rd->flags;
+                chan->maxTxPower = AR5416_MAX_RATE_POWER;
+                chan->minTxPower = AR5416_MAX_RATE_POWER;
+                chan->channelFlags = channelFlags;
+                chan->privFlags = privFlags;
+        } else {
+                chan = &ah->ah_channels[ret];
+                chan->channelFlags |= channelFlags;
+                chan->privFlags |= privFlags;
+        }
+
+        /* Set CTLs */
+
+        if ((cm->flags & CHANNEL_ALL) == CHANNEL_A)
+                chan->conformanceTestLimit[0] = ctl;
+        else if ((cm->flags & CHANNEL_ALL) == CHANNEL_B)
+                chan->conformanceTestLimit[1] = ctl;
+        else if ((cm->flags & CHANNEL_ALL) == CHANNEL_G)
+                chan->conformanceTestLimit[2] = ctl;
+
+        return (ret == -1) ? true : false;
+}
+
+static bool ath9k_regd_japan_check(struct ath_hal *ah,
+                                   int b,
+                                   struct regDomain *rd5GHz)
+{
+        bool skipband = false;
+        int i;
+        u32 regcap;
+
+        for (i = 0; i < ARRAY_SIZE(j_bandcheck); i++) {
+                if (j_bandcheck[i].freqbandbit == b) {
+                        regcap = ah->ah_caps.reg_cap;
+                        if ((j_bandcheck[i].eepromflagtocheck & regcap) == 0) {
+                                skipband = true;
+                        } else if ((regcap & AR_EEPROM_EEREGCAP_EN_KK_U2) ||
+                                  (regcap & AR_EEPROM_EEREGCAP_EN_KK_MIDBAND)) {
+                                rd5GHz->dfsMask |= DFS_MKK4;
+                                rd5GHz->pscan |= PSCAN_MKK3;
+                        }
+                        break;
+                }
+        }
+
+        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                "%s: Skipping %d freq band\n",
+                __func__, j_bandcheck[i].freqbandbit);
+
+        return skipband;
+}
+
+bool
+ath9k_regd_init_channels(struct ath_hal *ah,
+                         u32 maxchans,
+                         u32 *nchans, u8 *regclassids,
+                         u32 maxregids, u32 *nregids, u16 cc,
+                         bool enableOutdoor,
+                         bool enableExtendedChannels)
+{
+        u16 maxChan = 7000;
+        struct country_code_to_enum_rd *country = NULL;
+        struct regDomain rd5GHz, rd2GHz;
+        const struct cmode *cm;
+        struct ath9k_channel *ichans = &ah->ah_channels[0];
+        int next = 0, b;
+        u8 ctl;
+        int regdmn;
+        u16 chanSep;
+        unsigned long *modes_avail;
+        DECLARE_BITMAP(modes_allowed, ATH9K_MODE_MAX);
+
+        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: cc %u %s %s\n",
+                 __func__, cc,
+                 enableOutdoor ? "Enable outdoor" : "",
+                 enableExtendedChannels ? "Enable ecm" : "");
+
+        if (!ath9k_regd_is_ccode_valid(ah, cc)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: invalid country code %d\n", __func__, cc);
+                return false;
+        }
+
+        if (!ath9k_regd_is_eeprom_valid(ah)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: invalid EEPROM contents\n", __func__);
+                return false;
+        }
+
+        ah->ah_countryCode = ath9k_regd_get_default_country(ah);
+
+        if (ah->ah_countryCode == CTRY_DEFAULT) {
+                ah->ah_countryCode = cc & COUNTRY_CODE_MASK;
+                if ((ah->ah_countryCode == CTRY_DEFAULT) &&
+                    (ath9k_regd_get_eepromRD(ah) == CTRY_DEFAULT)) {
+                        ah->ah_countryCode = CTRY_UNITED_STATES;
+                }
+        }
+
+#ifdef AH_SUPPORT_11D
+        if (ah->ah_countryCode == CTRY_DEFAULT) {
+                regdmn = ath9k_regd_get_eepromRD(ah);
+                country = NULL;
+        } else {
+#endif
+                country = ath9k_regd_find_country(ah->ah_countryCode);
+                if (country == NULL) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                                "Country is NULL!!!!, cc= %d\n",
+                                ah->ah_countryCode);
+                        return false;
+                } else {
+                        regdmn = country->regDmnEnum;
+#ifdef AH_SUPPORT_11D
+                        if (((ath9k_regd_get_eepromRD(ah) &
+                              WORLD_SKU_MASK) == WORLD_SKU_PREFIX) &&
+                            (cc == CTRY_UNITED_STATES)) {
+                                if (!isWwrSKU_NoMidband(ah)
+                                    && ath9k_regd_is_fcc_midband_supported(ah))
+                                        regdmn = FCC3_FCCA;
+                                else
+                                        regdmn = FCC1_FCCA;
+                        }
+#endif
+                }
+#ifdef AH_SUPPORT_11D
+        }
+#endif
+        if (!ath9k_regd_get_wmode_regdomain(ah,
+                                            regdmn,
+                                            ~CHANNEL_2GHZ,
+                                            &rd5GHz)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: couldn't find unitary "
+                        "5GHz reg domain for country %u\n",
+                        __func__, ah->ah_countryCode);
+                return false;
+        }
+        if (!ath9k_regd_get_wmode_regdomain(ah,
+                                            regdmn,
+                                            CHANNEL_2GHZ,
+                                            &rd2GHz)) {
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: couldn't find unitary 2GHz "
+                        "reg domain for country %u\n",
+                        __func__, ah->ah_countryCode);
+                return false;
+        }
+
+        if (!isWwrSKU(ah) && ((rd5GHz.regDmnEnum == FCC1) ||
+                              (rd5GHz.regDmnEnum == FCC2))) {
+                if (ath9k_regd_is_fcc_midband_supported(ah)) {
+                        if (!ath9k_regd_get_wmode_regdomain(ah,
+                                                            FCC3_FCCA,
+                                                            ~CHANNEL_2GHZ,
+                                                            &rd5GHz)) {
+                                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                                        "%s: couldn't find unitary 5GHz "
+                                        "reg domain for country %u\n",
+                                        __func__, ah->ah_countryCode);
+                                return false;
+                        }
+                }
+        }
+
+        if (country == NULL) {
+                modes_avail = ah->ah_caps.wireless_modes;
+        } else {
+                ath9k_regd_get_wmodes_nreg(ah, country, &rd5GHz, modes_allowed);
+                modes_avail = modes_allowed;
+
+                if (!enableOutdoor)
+                        maxChan = country->outdoorChanStart;
+        }
+
+        next = 0;
+
+        if (maxchans > ARRAY_SIZE(ah->ah_channels))
+                maxchans = ARRAY_SIZE(ah->ah_channels);
+
+        for (cm = modes; cm < &modes[ARRAY_SIZE(modes)]; cm++) {
+                u16 c, c_hi, c_lo;
+                u64 *channelBM = NULL;
+                struct regDomain *rd = NULL;
+                struct RegDmnFreqBand *fband = NULL, *freqs;
+                int8_t low_adj = 0, hi_adj = 0;
+
+                if (!test_bit(cm->mode, modes_avail)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                                "%s: !avail mode %d flags 0x%x\n",
+                                __func__, cm->mode, cm->flags);
+                        continue;
+                }
+                if (!ath9k_get_channel_edges(ah, cm->flags, &c_lo, &c_hi)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                                "%s: channels 0x%x not supported "
+                                "by hardware\n",
+                                __func__, cm->flags);
+                        continue;
+                }
+
+                switch (cm->mode) {
+                case ATH9K_MODE_11A:
+                case ATH9K_MODE_11NA_HT20:
+                case ATH9K_MODE_11NA_HT40PLUS:
+                case ATH9K_MODE_11NA_HT40MINUS:
+                        rd = &rd5GHz;
+                        channelBM = rd->chan11a;
+                        freqs = &regDmn5GhzFreq[0];
+                        ctl = rd->conformanceTestLimit;
+                        break;
+                case ATH9K_MODE_11B:
+                        rd = &rd2GHz;
+                        channelBM = rd->chan11b;
+                        freqs = &regDmn2GhzFreq[0];
+                        ctl = rd->conformanceTestLimit | CTL_11B;
+                        break;
+                case ATH9K_MODE_11G:
+                case ATH9K_MODE_11NG_HT20:
+                case ATH9K_MODE_11NG_HT40PLUS:
+                case ATH9K_MODE_11NG_HT40MINUS:
+                        rd = &rd2GHz;
+                        channelBM = rd->chan11g;
+                        freqs = &regDmn2Ghz11gFreq[0];
+                        ctl = rd->conformanceTestLimit | CTL_11G;
+                        break;
+                default:
+                        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                                "%s: Unknown HAL mode 0x%x\n", __func__,
+                                cm->mode);
+                        continue;
+                }
+
+                if (ath9k_regd_is_chan_bm_zero(channelBM))
+                        continue;
+
+                if ((cm->mode == ATH9K_MODE_11NA_HT40PLUS) ||
+                    (cm->mode == ATH9K_MODE_11NG_HT40PLUS)) {
+                        hi_adj = -20;
+                }
+
+                if ((cm->mode == ATH9K_MODE_11NA_HT40MINUS) ||
+                    (cm->mode == ATH9K_MODE_11NG_HT40MINUS)) {
+                        low_adj = 20;
+                }
+
+                /* XXX: Add a helper here instead */
+                for (b = 0; b < 64 * BMLEN; b++) {
+                        if (ath9k_regd_is_bit_set(b, channelBM)) {
+                                fband = &freqs[b];
+                                if (rd5GHz.regDmnEnum == MKK1
+                                    || rd5GHz.regDmnEnum == MKK2) {
+                                        if (ath9k_regd_japan_check(ah,
+                                                                   b,
+                                                                   &rd5GHz))
+                                                continue;
+                                }
+
+                                ath9k_regd_add_reg_classid(regclassids,
+                                                           maxregids,
+                                                           nregids,
+                                                           fband->
+                                                           regClassId);
+
+                                if (IS_HT40_MODE(cm->mode) && (rd == &rd5GHz)) {
+                                        chanSep = 40;
+                                        if (fband->lowChannel == 5280)
+                                                low_adj += 20;
+
+                                        if (fband->lowChannel == 5170)
+                                                continue;
+                                } else
+                                        chanSep = fband->channelSep;
+
+                                for (c = fband->lowChannel + low_adj;
+                                     ((c <= (fband->highChannel + hi_adj)) &&
+                                      (c >= (fband->lowChannel + low_adj)));
+                                     c += chanSep) {
+                                        if (next >= maxchans) {
+                                                DPRINTF(ah->ah_sc,
+                                                        ATH_DBG_REGULATORY,
+                                                        "%s: too many channels "
+                                                        "for channel table\n",
+                                                        __func__);
+                                                goto done;
+                                        }
+                                        if (ath9k_regd_add_channel(ah,
+                                                   c, c_lo, c_hi,
+                                                   maxChan, ctl,
+                                                   next,
+                                                   rd5GHz,
+                                                   fband, rd, cm,
+                                                   ichans,
+                                                   enableExtendedChannels))
+                                                next++;
+                                }
+                                if (IS_HT40_MODE(cm->mode) &&
+                                    (fband->lowChannel == 5280)) {
+                                        low_adj -= 20;
+                                }
+                        }
+                }
+        }
+done:
+        if (next != 0) {
+                int i;
+
+                if (next > ARRAY_SIZE(ah->ah_channels)) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                                "%s: too many channels %u; truncating to %u\n",
+                                __func__, next,
+                                (int) ARRAY_SIZE(ah->ah_channels));
+                        next = ARRAY_SIZE(ah->ah_channels);
+                }
+#ifdef ATH_NF_PER_CHAN
+                ath9k_regd_init_rf_buffer(ichans, next);
+#endif
+                ath9k_regd_sort(ichans, next,
+                                sizeof(struct ath9k_channel),
+                                ath9k_regd_chansort);
+
+                ah->ah_nchan = next;
+
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "Channel list:\n");
+                for (i = 0; i < next; i++) {
+                        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                                "chan: %d flags: 0x%x\n",
+                                ah->ah_channels[i].channel,
+                                ah->ah_channels[i].channelFlags);
+                }
+        }
+        *nchans = next;
+
+        ah->ah_countryCode = ah->ah_countryCode;
+
+        ah->ah_currentRDInUse = regdmn;
+        ah->ah_currentRD5G = rd5GHz.regDmnEnum;
+        ah->ah_currentRD2G = rd2GHz.regDmnEnum;
+        if (country == NULL) {
+                ah->ah_iso[0] = 0;
+                ah->ah_iso[1] = 0;
+        } else {
+                ah->ah_iso[0] = country->isoName[0];
+                ah->ah_iso[1] = country->isoName[1];
+        }
+
+        return next != 0;
+}
+
+struct ath9k_channel*
+ath9k_regd_check_channel(struct ath_hal *ah,
+                         const struct ath9k_channel *c)
+{
+        struct ath9k_channel *base, *cc;
+
+        int flags = c->channelFlags & CHAN_FLAGS;
+        int n, lim;
+
+        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                "%s: channel %u/0x%x (0x%x) requested\n", __func__,
+                c->channel, c->channelFlags, flags);
+
+        cc = ah->ah_curchan;
+        if (cc != NULL && cc->channel == c->channel &&
+            (cc->channelFlags & CHAN_FLAGS) == flags) {
+                if ((cc->privFlags & CHANNEL_INTERFERENCE) &&
+                    (cc->privFlags & CHANNEL_DFS))
+                        return NULL;
+                else
+                        return cc;
+        }
+
+        base = ah->ah_channels;
+        n = ah->ah_nchan;
+
+        for (lim = n; lim != 0; lim >>= 1) {
+                int d;
+                cc = &base[lim >> 1];
+                d = c->channel - cc->channel;
+                if (d == 0) {
+                        if ((cc->channelFlags & CHAN_FLAGS) == flags) {
+                                if ((cc->privFlags & CHANNEL_INTERFERENCE) &&
+                                    (cc->privFlags & CHANNEL_DFS))
+                                        return NULL;
+                                else
+                                        return cc;
+                        }
+                        d = flags - (cc->channelFlags & CHAN_FLAGS);
+                }
+                DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
+                        "%s: channel %u/0x%x d %d\n", __func__,
+                        cc->channel, cc->channelFlags, d);
+                if (d > 0) {
+                        base = cc + 1;
+                        lim--;
+                }
+        }
+        DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: no match for %u/0x%x\n",
+                __func__, c->channel, c->channelFlags);
+        return NULL;
+}
+
+u32
+ath9k_regd_get_antenna_allowed(struct ath_hal *ah,
+                               struct ath9k_channel *chan)
+{
+        struct ath9k_channel *ichan = NULL;
+
+        ichan = ath9k_regd_check_channel(ah, chan);
+        if (!ichan)
+                return 0;
+
+        return ichan->antennaMax;
+}
+
+u32 ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan)
+{
+        u32 ctl = NO_CTL;
+        struct ath9k_channel *ichan;
+
+        if (ah->ah_countryCode == CTRY_DEFAULT && isWwrSKU(ah)) {
+                if (IS_CHAN_B(chan))
+                        ctl = SD_NO_CTL | CTL_11B;
+                else if (IS_CHAN_G(chan))
+                        ctl = SD_NO_CTL | CTL_11G;
+                else
+                        ctl = SD_NO_CTL | CTL_11A;
+        } else {
+                ichan = ath9k_regd_check_channel(ah, chan);
+                if (ichan != NULL) {
+                        /* FIXME */
+                        if (IS_CHAN_A(ichan))
+                                ctl = ichan->conformanceTestLimit[0];
+                        else if (IS_CHAN_B(ichan))
+                                ctl = ichan->conformanceTestLimit[1];
+                        else if (IS_CHAN_G(ichan))
+                                ctl = ichan->conformanceTestLimit[2];
+
+                        if (IS_CHAN_G(chan) && (ctl & 0xf) == CTL_11B)
+                                ctl = (ctl & ~0xf) | CTL_11G;
+                }
+        }
+        return ctl;
+}
+
+void ath9k_regd_get_current_country(struct ath_hal *ah,
+                                    struct ath9k_country_entry *ctry)
+{
+        u16 rd = ath9k_regd_get_eepromRD(ah);
+
+        ctry->isMultidomain = false;
+        if (rd == CTRY_DEFAULT)
+                ctry->isMultidomain = true;
+        else if (!(rd & COUNTRY_ERD_FLAG))
+                ctry->isMultidomain = isWwrSKU(ah);
+
+        ctry->countryCode = ah->ah_countryCode;
+        ctry->regDmnEnum = ah->ah_currentRD;
+        ctry->regDmn5G = ah->ah_currentRD5G;
+        ctry->regDmn2G = ah->ah_currentRD2G;
+        ctry->iso[0] = ah->ah_iso[0];
+        ctry->iso[1] = ah->ah_iso[1];
+        ctry->iso[2] = ah->ah_iso[2];
+}
diff --git a/drivers/net/wireless/ath9k/regd.h b/drivers/net/wireless/ath9k/regd.h
new file mode 100644
index 000000000000..0ecd344fbd98
--- /dev/null
+++ b/drivers/net/wireless/ath9k/regd.h
@@ -0,0 +1,412 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef REGD_H
+#define REGD_H
+
+#include "ath9k.h"
+
+#define BMLEN 2
+#define BMZERO {(u64) 0, (u64) 0}
+
+#define BM(_fa, _fb, _fc, _fd, _fe, _ff, _fg, _fh, _fi, _fj, _fk, _fl) \
+        {((((_fa >= 0) && (_fa < 64)) ? \
+                (((u64) 1) << _fa) : (u64) 0) | \
+        (((_fb >= 0) && (_fb < 64)) ? \
+                (((u64) 1) << _fb) : (u64) 0) | \
+        (((_fc >= 0) && (_fc < 64)) ? \
+                (((u64) 1) << _fc) : (u64) 0) | \
+        (((_fd >= 0) && (_fd < 64)) ? \
+                (((u64) 1) << _fd) : (u64) 0) | \
+        (((_fe >= 0) && (_fe < 64)) ? \
+                (((u64) 1) << _fe) : (u64) 0) | \
+        (((_ff >= 0) && (_ff < 64)) ? \
+                (((u64) 1) << _ff) : (u64) 0) | \
+        (((_fg >= 0) && (_fg < 64)) ? \
+                (((u64) 1) << _fg) : (u64) 0) | \
+        (((_fh >= 0) && (_fh < 64)) ? \
+                (((u64) 1) << _fh) : (u64) 0) | \
+        (((_fi >= 0) && (_fi < 64)) ? \
+                (((u64) 1) << _fi) : (u64) 0) | \
+        (((_fj >= 0) && (_fj < 64)) ? \
+                (((u64) 1) << _fj) : (u64) 0) | \
+        (((_fk >= 0) && (_fk < 64)) ? \
+                (((u64) 1) << _fk) : (u64) 0) | \
+        (((_fl >= 0) && (_fl < 64)) ? \
+                (((u64) 1) << _fl) : (u64) 0) | \
+                        ((((_fa > 63) && (_fa < 128)) ? \
+                        (((u64) 1) << (_fa - 64)) : (u64) 0) | \
+        (((_fb > 63) && (_fb < 128)) ? \
+                (((u64) 1) << (_fb - 64)) : (u64) 0) | \
+        (((_fc > 63) && (_fc < 128)) ? \
+                (((u64) 1) << (_fc - 64)) : (u64) 0) | \
+        (((_fd > 63) && (_fd < 128)) ? \
+                (((u64) 1) << (_fd - 64)) : (u64) 0) | \
+        (((_fe > 63) && (_fe < 128)) ? \
+                (((u64) 1) << (_fe - 64)) : (u64) 0) | \
+        (((_ff > 63) && (_ff < 128)) ? \
+                (((u64) 1) << (_ff - 64)) : (u64) 0) | \
+        (((_fg > 63) && (_fg < 128)) ? \
+                (((u64) 1) << (_fg - 64)) : (u64) 0) | \
+        (((_fh > 63) && (_fh < 128)) ? \
+                (((u64) 1) << (_fh - 64)) : (u64) 0) | \
+        (((_fi > 63) && (_fi < 128)) ? \
+                (((u64) 1) << (_fi - 64)) : (u64) 0) | \
+        (((_fj > 63) && (_fj < 128)) ? \
+                (((u64) 1) << (_fj - 64)) : (u64) 0) | \
+        (((_fk > 63) && (_fk < 128)) ? \
+                (((u64) 1) << (_fk - 64)) : (u64) 0) | \
+        (((_fl > 63) && (_fl < 128)) ? \
+                (((u64) 1) << (_fl - 64)) : (u64) 0)))}
+
+#define DEF_REGDMN      FCC1_FCCA
+#define DEF_DMN_5       FCC1
+#define DEF_DMN_2       FCCA
+#define COUNTRY_ERD_FLAG        0x8000
+#define WORLDWIDE_ROAMING_FLAG  0x4000
+#define SUPER_DOMAIN_MASK   0x0fff
+#define COUNTRY_CODE_MASK   0x3fff
+#define CF_INTERFERENCE     (CHANNEL_CW_INT | CHANNEL_RADAR_INT)
+#define CHANNEL_14      (2484)
+#define IS_11G_CH14(_ch,_cf) \
+    (((_ch) == CHANNEL_14) && ((_cf) == CHANNEL_G))
+
+#define NO_PSCAN    0x0ULL
+#define PSCAN_FCC   0x0000000000000001ULL
+#define PSCAN_FCC_T 0x0000000000000002ULL
+#define PSCAN_ETSI  0x0000000000000004ULL
+#define PSCAN_MKK1  0x0000000000000008ULL
+#define PSCAN_MKK2  0x0000000000000010ULL
+#define PSCAN_MKKA  0x0000000000000020ULL
+#define PSCAN_MKKA_G    0x0000000000000040ULL
+#define PSCAN_ETSIA 0x0000000000000080ULL
+#define PSCAN_ETSIB 0x0000000000000100ULL
+#define PSCAN_ETSIC 0x0000000000000200ULL
+#define PSCAN_WWR   0x0000000000000400ULL
+#define PSCAN_MKKA1 0x0000000000000800ULL
+#define PSCAN_MKKA1_G   0x0000000000001000ULL
+#define PSCAN_MKKA2 0x0000000000002000ULL
+#define PSCAN_MKKA2_G   0x0000000000004000ULL
+#define PSCAN_MKK3  0x0000000000008000ULL
+#define PSCAN_DEFER 0x7FFFFFFFFFFFFFFFULL
+#define IS_ECM_CHAN 0x8000000000000000ULL
+
+#define isWwrSKU(_ah) \
+        (((ath9k_regd_get_eepromRD((_ah)) & WORLD_SKU_MASK) == \
+                WORLD_SKU_PREFIX) || \
+                (ath9k_regd_get_eepromRD(_ah) == WORLD))
+
+#define isWwrSKU_NoMidband(_ah) \
+        ((ath9k_regd_get_eepromRD((_ah)) == WOR3_WORLD) || \
+        (ath9k_regd_get_eepromRD(_ah) == WOR4_WORLD) || \
+        (ath9k_regd_get_eepromRD(_ah) == WOR5_ETSIC))
+
+#define isUNII1OddChan(ch) \
+        ((ch == 5170) || (ch == 5190) || (ch == 5210) || (ch == 5230))
+
+#define IS_HT40_MODE(_mode)                                     \
+        (((_mode == ATH9K_MODE_11NA_HT40PLUS  ||                \
+           _mode == ATH9K_MODE_11NG_HT40PLUS    ||              \
+           _mode == ATH9K_MODE_11NA_HT40MINUS   ||              \
+           _mode == ATH9K_MODE_11NG_HT40MINUS) ? true : false))
+
+#define CHAN_FLAGS      (CHANNEL_ALL|CHANNEL_HALF|CHANNEL_QUARTER)
+
+#define swap(_a, _b, _size) {                   \
+        u8 *s = _b;                       \
+        int i = _size;                          \
+        do {                                    \
+                u8 tmp = *_a;             \
+                *_a++ = *s;                     \
+                *s++ = tmp;                     \
+        } while (--i);                          \
+        _a -= _size;                            \
+}
+
+
+#define HALF_MAXCHANBW          10
+
+#define MULTI_DOMAIN_MASK 0xFF00
+
+#define WORLD_SKU_MASK          0x00F0
+#define WORLD_SKU_PREFIX        0x0060
+
+#define CHANNEL_HALF_BW         10
+#define CHANNEL_QUARTER_BW      5
+
+typedef int ath_hal_cmp_t(const void *, const void *);
+
+struct reg_dmn_pair_mapping {
+        u16 regDmnEnum;
+        u16 regDmn5GHz;
+        u16 regDmn2GHz;
+        u32 flags5GHz;
+        u32 flags2GHz;
+        u64 pscanMask;
+        u16 singleCC;
+};
+
+struct ccmap {
+        char isoName[3];
+        u16 countryCode;
+};
+
+struct country_code_to_enum_rd {
+        u16 countryCode;
+        u16 regDmnEnum;
+        const char *isoName;
+        const char *name;
+        bool allow11g;
+        bool allow11aTurbo;
+        bool allow11gTurbo;
+        bool allow11ng20;
+        bool allow11ng40;
+        bool allow11na20;
+        bool allow11na40;
+        u16 outdoorChanStart;
+};
+
+struct RegDmnFreqBand {
+        u16 lowChannel;
+        u16 highChannel;
+        u8 powerDfs;
+        u8 antennaMax;
+        u8 channelBW;
+        u8 channelSep;
+        u64 useDfs;
+        u64 usePassScan;
+        u8 regClassId;
+};
+
+struct regDomain {
+        u16 regDmnEnum;
+        u8 conformanceTestLimit;
+        u64 dfsMask;
+        u64 pscan;
+        u32 flags;
+        u64 chan11a[BMLEN];
+        u64 chan11a_turbo[BMLEN];
+        u64 chan11a_dyn_turbo[BMLEN];
+        u64 chan11b[BMLEN];
+        u64 chan11g[BMLEN];
+        u64 chan11g_turbo[BMLEN];
+};
+
+struct cmode {
+        u32 mode;
+        u32 flags;
+};
+
+#define YES true
+#define NO  false
+
+struct japan_bandcheck {
+        u16 freqbandbit;
+        u32 eepromflagtocheck;
+};
+
+struct common_mode_power {
+        u16 lchan;
+        u16 hchan;
+        u8 pwrlvl;
+};
+
+enum CountryCode {
+        CTRY_ALBANIA = 8,
+        CTRY_ALGERIA = 12,
+        CTRY_ARGENTINA = 32,
+        CTRY_ARMENIA = 51,
+        CTRY_AUSTRALIA = 36,
+        CTRY_AUSTRIA = 40,
+        CTRY_AZERBAIJAN = 31,
+        CTRY_BAHRAIN = 48,
+        CTRY_BELARUS = 112,
+        CTRY_BELGIUM = 56,
+        CTRY_BELIZE = 84,
+        CTRY_BOLIVIA = 68,
+        CTRY_BOSNIA_HERZ = 70,
+        CTRY_BRAZIL = 76,
+        CTRY_BRUNEI_DARUSSALAM = 96,
+        CTRY_BULGARIA = 100,
+        CTRY_CANADA = 124,
+        CTRY_CHILE = 152,
+        CTRY_CHINA = 156,
+        CTRY_COLOMBIA = 170,
+        CTRY_COSTA_RICA = 188,
+        CTRY_CROATIA = 191,
+        CTRY_CYPRUS = 196,
+        CTRY_CZECH = 203,
+        CTRY_DENMARK = 208,
+        CTRY_DOMINICAN_REPUBLIC = 214,
+        CTRY_ECUADOR = 218,
+        CTRY_EGYPT = 818,
+        CTRY_EL_SALVADOR = 222,
+        CTRY_ESTONIA = 233,
+        CTRY_FAEROE_ISLANDS = 234,
+        CTRY_FINLAND = 246,
+        CTRY_FRANCE = 250,
+        CTRY_GEORGIA = 268,
+        CTRY_GERMANY = 276,
+        CTRY_GREECE = 300,
+        CTRY_GUATEMALA = 320,
+        CTRY_HONDURAS = 340,
+        CTRY_HONG_KONG = 344,
+        CTRY_HUNGARY = 348,
+        CTRY_ICELAND = 352,
+        CTRY_INDIA = 356,
+        CTRY_INDONESIA = 360,
+        CTRY_IRAN = 364,
+        CTRY_IRAQ = 368,
+        CTRY_IRELAND = 372,
+        CTRY_ISRAEL = 376,
+        CTRY_ITALY = 380,
+        CTRY_JAMAICA = 388,
+        CTRY_JAPAN = 392,
+        CTRY_JORDAN = 400,
+        CTRY_KAZAKHSTAN = 398,
+        CTRY_KENYA = 404,
+        CTRY_KOREA_NORTH = 408,
+        CTRY_KOREA_ROC = 410,
+        CTRY_KOREA_ROC2 = 411,
+        CTRY_KOREA_ROC3 = 412,
+        CTRY_KUWAIT = 414,
+        CTRY_LATVIA = 428,
+        CTRY_LEBANON = 422,
+        CTRY_LIBYA = 434,
+        CTRY_LIECHTENSTEIN = 438,
+        CTRY_LITHUANIA = 440,
+        CTRY_LUXEMBOURG = 442,
+        CTRY_MACAU = 446,
+        CTRY_MACEDONIA = 807,
+        CTRY_MALAYSIA = 458,
+        CTRY_MALTA = 470,
+        CTRY_MEXICO = 484,
+        CTRY_MONACO = 492,
+        CTRY_MOROCCO = 504,
+        CTRY_NEPAL = 524,
+        CTRY_NETHERLANDS = 528,
+        CTRY_NETHERLANDS_ANTILLES = 530,
+        CTRY_NEW_ZEALAND = 554,
+        CTRY_NICARAGUA = 558,
+        CTRY_NORWAY = 578,
+        CTRY_OMAN = 512,
+        CTRY_PAKISTAN = 586,
+        CTRY_PANAMA = 591,
+        CTRY_PAPUA_NEW_GUINEA = 598,
+        CTRY_PARAGUAY = 600,
+        CTRY_PERU = 604,
+        CTRY_PHILIPPINES = 608,
+        CTRY_POLAND = 616,
+        CTRY_PORTUGAL = 620,
+        CTRY_PUERTO_RICO = 630,
+        CTRY_QATAR = 634,
+        CTRY_ROMANIA = 642,
+        CTRY_RUSSIA = 643,
+        CTRY_SAUDI_ARABIA = 682,
+        CTRY_SERBIA_MONTENEGRO = 891,
+        CTRY_SINGAPORE = 702,
+        CTRY_SLOVAKIA = 703,
+        CTRY_SLOVENIA = 705,
+        CTRY_SOUTH_AFRICA = 710,
+        CTRY_SPAIN = 724,
+        CTRY_SRI_LANKA = 144,
+        CTRY_SWEDEN = 752,
+        CTRY_SWITZERLAND = 756,
+        CTRY_SYRIA = 760,
+        CTRY_TAIWAN = 158,
+        CTRY_THAILAND = 764,
+        CTRY_TRINIDAD_Y_TOBAGO = 780,
+        CTRY_TUNISIA = 788,
+        CTRY_TURKEY = 792,
+        CTRY_UAE = 784,
+        CTRY_UKRAINE = 804,
+        CTRY_UNITED_KINGDOM = 826,
+        CTRY_UNITED_STATES = 840,
+        CTRY_UNITED_STATES_FCC49 = 842,
+        CTRY_URUGUAY = 858,
+        CTRY_UZBEKISTAN = 860,
+        CTRY_VENEZUELA = 862,
+        CTRY_VIET_NAM = 704,
+        CTRY_YEMEN = 887,
+        CTRY_ZIMBABWE = 716,
+        CTRY_JAPAN1 = 393,
+        CTRY_JAPAN2 = 394,
+        CTRY_JAPAN3 = 395,
+        CTRY_JAPAN4 = 396,
+        CTRY_JAPAN5 = 397,
+        CTRY_JAPAN6 = 4006,
+        CTRY_JAPAN7 = 4007,
+        CTRY_JAPAN8 = 4008,
+        CTRY_JAPAN9 = 4009,
+        CTRY_JAPAN10 = 4010,
+        CTRY_JAPAN11 = 4011,
+        CTRY_JAPAN12 = 4012,
+        CTRY_JAPAN13 = 4013,
+        CTRY_JAPAN14 = 4014,
+        CTRY_JAPAN15 = 4015,
+        CTRY_JAPAN16 = 4016,
+        CTRY_JAPAN17 = 4017,
+        CTRY_JAPAN18 = 4018,
+        CTRY_JAPAN19 = 4019,
+        CTRY_JAPAN20 = 4020,
+        CTRY_JAPAN21 = 4021,
+        CTRY_JAPAN22 = 4022,
+        CTRY_JAPAN23 = 4023,
+        CTRY_JAPAN24 = 4024,
+        CTRY_JAPAN25 = 4025,
+        CTRY_JAPAN26 = 4026,
+        CTRY_JAPAN27 = 4027,
+        CTRY_JAPAN28 = 4028,
+        CTRY_JAPAN29 = 4029,
+        CTRY_JAPAN30 = 4030,
+        CTRY_JAPAN31 = 4031,
+        CTRY_JAPAN32 = 4032,
+        CTRY_JAPAN33 = 4033,
+        CTRY_JAPAN34 = 4034,
+        CTRY_JAPAN35 = 4035,
+        CTRY_JAPAN36 = 4036,
+        CTRY_JAPAN37 = 4037,
+        CTRY_JAPAN38 = 4038,
+        CTRY_JAPAN39 = 4039,
+        CTRY_JAPAN40 = 4040,
+        CTRY_JAPAN41 = 4041,
+        CTRY_JAPAN42 = 4042,
+        CTRY_JAPAN43 = 4043,
+        CTRY_JAPAN44 = 4044,
+        CTRY_JAPAN45 = 4045,
+        CTRY_JAPAN46 = 4046,
+        CTRY_JAPAN47 = 4047,
+        CTRY_JAPAN48 = 4048,
+        CTRY_JAPAN49 = 4049,
+        CTRY_JAPAN50 = 4050,
+        CTRY_JAPAN51 = 4051,
+        CTRY_JAPAN52 = 4052,
+        CTRY_JAPAN53 = 4053,
+        CTRY_JAPAN54 = 4054,
+        CTRY_JAPAN55 = 4055,
+        CTRY_JAPAN56 = 4056,
+        CTRY_JAPAN57 = 4057,
+        CTRY_JAPAN58 = 4058,
+        CTRY_JAPAN59 = 4059,
+        CTRY_AUSTRALIA2 = 5000,
+        CTRY_CANADA2 = 5001,
+        CTRY_BELGIUM2 = 5002
+};
+
+void ath9k_regd_get_current_country(struct ath_hal *ah,
+                                    struct ath9k_country_entry *ctry);
+
+#endif
diff --git a/drivers/net/wireless/ath9k/regd_common.h b/drivers/net/wireless/ath9k/regd_common.h
new file mode 100644
index 000000000000..9112c030b1e8
--- /dev/null
+++ b/drivers/net/wireless/ath9k/regd_common.h
@@ -0,0 +1,1915 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef REGD_COMMON_H
+#define REGD_COMMON_H
+
+enum EnumRd {
+        NO_ENUMRD = 0x00,
+        NULL1_WORLD = 0x03,
+        NULL1_ETSIB = 0x07,
+        NULL1_ETSIC = 0x08,
+        FCC1_FCCA = 0x10,
+        FCC1_WORLD = 0x11,
+        FCC4_FCCA = 0x12,
+        FCC5_FCCA = 0x13,
+        FCC6_FCCA = 0x14,
+
+        FCC2_FCCA = 0x20,
+        FCC2_WORLD = 0x21,
+        FCC2_ETSIC = 0x22,
+        FCC6_WORLD = 0x23,
+        FRANCE_RES = 0x31,
+        FCC3_FCCA = 0x3A,
+        FCC3_WORLD = 0x3B,
+
+        ETSI1_WORLD = 0x37,
+        ETSI3_ETSIA = 0x32,
+        ETSI2_WORLD = 0x35,
+        ETSI3_WORLD = 0x36,
+        ETSI4_WORLD = 0x30,
+        ETSI4_ETSIC = 0x38,
+        ETSI5_WORLD = 0x39,
+        ETSI6_WORLD = 0x34,
+        ETSI_RESERVED = 0x33,
+
+        MKK1_MKKA = 0x40,
+        MKK1_MKKB = 0x41,
+        APL4_WORLD = 0x42,
+        MKK2_MKKA = 0x43,
+        APL_RESERVED = 0x44,
+        APL2_WORLD = 0x45,
+        APL2_APLC = 0x46,
+        APL3_WORLD = 0x47,
+        MKK1_FCCA = 0x48,
+        APL2_APLD = 0x49,
+        MKK1_MKKA1 = 0x4A,
+        MKK1_MKKA2 = 0x4B,
+        MKK1_MKKC = 0x4C,
+
+        APL3_FCCA = 0x50,
+        APL1_WORLD = 0x52,
+        APL1_FCCA = 0x53,
+        APL1_APLA = 0x54,
+        APL1_ETSIC = 0x55,
+        APL2_ETSIC = 0x56,
+        APL5_WORLD = 0x58,
+        APL6_WORLD = 0x5B,
+        APL7_FCCA = 0x5C,
+        APL8_WORLD = 0x5D,
+        APL9_WORLD = 0x5E,
+
+        WOR0_WORLD = 0x60,
+        WOR1_WORLD = 0x61,
+        WOR2_WORLD = 0x62,
+        WOR3_WORLD = 0x63,
+        WOR4_WORLD = 0x64,
+        WOR5_ETSIC = 0x65,
+
+        WOR01_WORLD = 0x66,
+        WOR02_WORLD = 0x67,
+        EU1_WORLD = 0x68,
+
+        WOR9_WORLD = 0x69,
+        WORA_WORLD = 0x6A,
+        WORB_WORLD = 0x6B,
+
+        MKK3_MKKB = 0x80,
+        MKK3_MKKA2 = 0x81,
+        MKK3_MKKC = 0x82,
+
+        MKK4_MKKB = 0x83,
+        MKK4_MKKA2 = 0x84,
+        MKK4_MKKC = 0x85,
+
+        MKK5_MKKB = 0x86,
+        MKK5_MKKA2 = 0x87,
+        MKK5_MKKC = 0x88,
+
+        MKK6_MKKB = 0x89,
+        MKK6_MKKA2 = 0x8A,
+        MKK6_MKKC = 0x8B,
+
+        MKK7_MKKB = 0x8C,
+        MKK7_MKKA2 = 0x8D,
+        MKK7_MKKC = 0x8E,
+
+        MKK8_MKKB = 0x8F,
+        MKK8_MKKA2 = 0x90,
+        MKK8_MKKC = 0x91,
+
+        MKK14_MKKA1 = 0x92,
+        MKK15_MKKA1 = 0x93,
+
+        MKK10_FCCA = 0xD0,
+        MKK10_MKKA1 = 0xD1,
+        MKK10_MKKC = 0xD2,
+        MKK10_MKKA2 = 0xD3,
+
+        MKK11_MKKA = 0xD4,
+        MKK11_FCCA = 0xD5,
+        MKK11_MKKA1 = 0xD6,
+        MKK11_MKKC = 0xD7,
+        MKK11_MKKA2 = 0xD8,
+
+        MKK12_MKKA = 0xD9,
+        MKK12_FCCA = 0xDA,
+        MKK12_MKKA1 = 0xDB,
+        MKK12_MKKC = 0xDC,
+        MKK12_MKKA2 = 0xDD,
+
+        MKK13_MKKB = 0xDE,
+
+        MKK3_MKKA = 0xF0,
+        MKK3_MKKA1 = 0xF1,
+        MKK3_FCCA = 0xF2,
+        MKK4_MKKA = 0xF3,
+        MKK4_MKKA1 = 0xF4,
+        MKK4_FCCA = 0xF5,
+        MKK9_MKKA = 0xF6,
+        MKK10_MKKA = 0xF7,
+        MKK6_MKKA1 = 0xF8,
+        MKK6_FCCA = 0xF9,
+        MKK7_MKKA1 = 0xFA,
+        MKK7_FCCA = 0xFB,
+        MKK9_FCCA = 0xFC,
+        MKK9_MKKA1 = 0xFD,
+        MKK9_MKKC = 0xFE,
+        MKK9_MKKA2 = 0xFF,
+
+        APL1 = 0x0150,
+        APL2 = 0x0250,
+        APL3 = 0x0350,
+        APL4 = 0x0450,
+        APL5 = 0x0550,
+        APL6 = 0x0650,
+        APL7 = 0x0750,
+        APL8 = 0x0850,
+        APL9 = 0x0950,
+        APL10 = 0x1050,
+
+        ETSI1 = 0x0130,
+        ETSI2 = 0x0230,
+        ETSI3 = 0x0330,
+        ETSI4 = 0x0430,
+        ETSI5 = 0x0530,
+        ETSI6 = 0x0630,
+        ETSIA = 0x0A30,
+        ETSIB = 0x0B30,
+        ETSIC = 0x0C30,
+
+        FCC1 = 0x0110,
+        FCC2 = 0x0120,
+        FCC3 = 0x0160,
+        FCC4 = 0x0165,
+        FCC5 = 0x0510,
+        FCC6 = 0x0610,
+        FCCA = 0x0A10,
+
+        APLD = 0x0D50,
+
+        MKK1 = 0x0140,
+        MKK2 = 0x0240,
+        MKK3 = 0x0340,
+        MKK4 = 0x0440,
+        MKK5 = 0x0540,
+        MKK6 = 0x0640,
+        MKK7 = 0x0740,
+        MKK8 = 0x0840,
+        MKK9 = 0x0940,
+        MKK10 = 0x0B40,
+        MKK11 = 0x1140,
+        MKK12 = 0x1240,
+        MKK13 = 0x0C40,
+        MKK14 = 0x1440,
+        MKK15 = 0x1540,
+        MKKA = 0x0A40,
+        MKKC = 0x0A50,
+
+        NULL1 = 0x0198,
+        WORLD = 0x0199,
+        DEBUG_REG_DMN = 0x01ff,
+};
+
+enum {
+        FCC = 0x10,
+        MKK = 0x40,
+        ETSI = 0x30,
+};
+
+enum {
+        NO_REQ = 0x00000000,
+        DISALLOW_ADHOC_11A = 0x00000001,
+        DISALLOW_ADHOC_11A_TURB = 0x00000002,
+        NEED_NFC = 0x00000004,
+
+        ADHOC_PER_11D = 0x00000008,
+        ADHOC_NO_11A = 0x00000010,
+
+        PUBLIC_SAFETY_DOMAIN = 0x00000020,
+        LIMIT_FRAME_4MS = 0x00000040,
+
+        NO_HOSTAP = 0x00000080,
+
+        REQ_MASK = 0x000000FF,
+};
+
+#define REG_DOMAIN_2GHZ_MASK    (REQ_MASK & \
+        (!(ADHOC_NO_11A | DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB)))
+#define REG_DOMAIN_5GHZ_MASK    REQ_MASK
+
+static struct reg_dmn_pair_mapping regDomainPairs[] = {
+        {NO_ENUMRD, DEBUG_REG_DMN, DEBUG_REG_DMN, NO_REQ, NO_REQ,
+         PSCAN_DEFER, 0},
+        {NULL1_WORLD, NULL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {NULL1_ETSIB, NULL1, ETSIB, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {NULL1_ETSIC, NULL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+
+        {FCC2_FCCA, FCC2, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {FCC2_WORLD, FCC2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {FCC2_ETSIC, FCC2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {FCC3_FCCA, FCC3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {FCC3_WORLD, FCC3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {FCC4_FCCA, FCC4, FCCA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {FCC5_FCCA, FCC5, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {FCC6_FCCA, FCC6, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {FCC6_WORLD, FCC6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+
+        {ETSI1_WORLD, ETSI1, WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {ETSI2_WORLD, ETSI2, WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {ETSI3_WORLD, ETSI3, WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {ETSI4_WORLD, ETSI4, WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {ETSI5_WORLD, ETSI5, WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {ETSI6_WORLD, ETSI6, WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+
+        {ETSI3_ETSIA, ETSI3, WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {FRANCE_RES, ETSI3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+
+        {FCC1_WORLD, FCC1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {FCC1_FCCA, FCC1, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL1_WORLD, APL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL2_WORLD, APL2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL3_WORLD, APL3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL4_WORLD, APL4, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL5_WORLD, APL5, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL6_WORLD, APL6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL8_WORLD, APL8, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL9_WORLD, APL9, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+
+        {APL3_FCCA, APL3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL1_ETSIC, APL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL2_ETSIC, APL2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {APL2_APLD, APL2, APLD, NO_REQ, NO_REQ, PSCAN_DEFER,},
+
+        {MKK1_MKKA, MKK1, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA, CTRY_JAPAN},
+        {MKK1_MKKB, MKK1, MKKA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
+         LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN1},
+        {MKK1_FCCA, MKK1, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1, CTRY_JAPAN2},
+        {MKK1_MKKA1, MKK1, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN4},
+        {MKK1_MKKA2, MKK1, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN5},
+        {MKK1_MKKC, MKK1, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1, CTRY_JAPAN6},
+
+        {MKK2_MKKA, MKK2, MKKA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
+         LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK2 | PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN3},
+
+        {MKK3_MKKA, MKK3, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKKA, CTRY_JAPAN25},
+        {MKK3_MKKB, MKK3, MKKA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
+         LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN7},
+        {MKK3_MKKA1, MKK3, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN26},
+        {MKK3_MKKA2, MKK3, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN8},
+        {MKK3_MKKC, MKK3, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         NO_PSCAN, CTRY_JAPAN9},
+        {MKK3_FCCA, MKK3, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         NO_PSCAN, CTRY_JAPAN27},
+
+        {MKK4_MKKA, MKK4, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3, CTRY_JAPAN36},
+        {MKK4_MKKB, MKK4, MKKA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
+         LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN10},
+        {MKK4_MKKA1, MKK4, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN28},
+        {MKK4_MKKA2, MKK4, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11},
+        {MKK4_MKKC, MKK4, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3, CTRY_JAPAN12},
+        {MKK4_FCCA, MKK4, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3, CTRY_JAPAN29},
+
+        {MKK5_MKKB, MKK5, MKKA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
+         LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN13},
+        {MKK5_MKKA2, MKK5, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN14},
+        {MKK5_MKKC, MKK5, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3, CTRY_JAPAN15},
+
+        {MKK6_MKKB, MKK6, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN16},
+        {MKK6_MKKA1, MKK6, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN30},
+        {MKK6_MKKA2, MKK6, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN17},
+        {MKK6_MKKC, MKK6, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1, CTRY_JAPAN18},
+        {MKK6_FCCA, MKK6, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         NO_PSCAN, CTRY_JAPAN31},
+
+        {MKK7_MKKB, MKK7, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN19},
+        {MKK7_MKKA1, MKK7, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN32},
+        {MKK7_MKKA2, MKK7, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G,
+         CTRY_JAPAN20},
+        {MKK7_MKKC, MKK7, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN21},
+        {MKK7_FCCA, MKK7, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN33},
+
+        {MKK8_MKKB, MKK8, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN22},
+        {MKK8_MKKA2, MKK8, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G,
+         CTRY_JAPAN23},
+        {MKK8_MKKC, MKK8, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN24},
+
+        {MKK9_MKKA, MKK9, MKKA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
+         LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK2 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN34},
+        {MKK9_FCCA, MKK9, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         NO_PSCAN, CTRY_JAPAN37},
+        {MKK9_MKKA1, MKK9, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN38},
+        {MKK9_MKKA2, MKK9, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN40},
+        {MKK9_MKKC, MKK9, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         NO_PSCAN, CTRY_JAPAN39},
+
+        {MKK10_MKKA, MKK10, MKKA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
+         LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK2 | PSCAN_MKK3, CTRY_JAPAN35},
+        {MKK10_FCCA, MKK10, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         NO_PSCAN, CTRY_JAPAN41},
+        {MKK10_MKKA1, MKK10, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN42},
+        {MKK10_MKKA2, MKK10, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN44},
+        {MKK10_MKKC, MKK10, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         NO_PSCAN, CTRY_JAPAN43},
+
+        {MKK11_MKKA, MKK11, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3, CTRY_JAPAN45},
+        {MKK11_FCCA, MKK11, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3, CTRY_JAPAN46},
+        {MKK11_MKKA1, MKK11, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN47},
+        {MKK11_MKKA2, MKK11, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN49},
+        {MKK11_MKKC, MKK11, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK3, CTRY_JAPAN48},
+
+        {MKK12_MKKA, MKK12, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN50},
+        {MKK12_FCCA, MKK12, FCCA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN51},
+        {MKK12_MKKA1, MKK12, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G,
+         CTRY_JAPAN52},
+        {MKK12_MKKA2, MKK12, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G,
+         CTRY_JAPAN54},
+        {MKK12_MKKC, MKK12, MKKC,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN53},
+
+        {MKK13_MKKB, MKK13, MKKA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
+         LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
+         CTRY_JAPAN57},
+
+        {MKK14_MKKA1, MKK14, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN58},
+        {MKK15_MKKA1, MKK15, MKKA,
+         DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
+         PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN59},
+
+        {WOR0_WORLD, WOR0_WORLD, WOR0_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER,
+         0},
+        {WOR1_WORLD, WOR1_WORLD, WOR1_WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {WOR2_WORLD, WOR2_WORLD, WOR2_WORLD, DISALLOW_ADHOC_11A_TURB,
+         NO_REQ, PSCAN_DEFER, 0},
+        {WOR3_WORLD, WOR3_WORLD, WOR3_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER,
+         0},
+        {WOR4_WORLD, WOR4_WORLD, WOR4_WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {WOR5_ETSIC, WOR5_ETSIC, WOR5_ETSIC,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {WOR01_WORLD, WOR01_WORLD, WOR01_WORLD, NO_REQ, NO_REQ,
+         PSCAN_DEFER, 0},
+        {WOR02_WORLD, WOR02_WORLD, WOR02_WORLD, NO_REQ, NO_REQ,
+         PSCAN_DEFER, 0},
+        {EU1_WORLD, EU1_WORLD, EU1_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
+        {WOR9_WORLD, WOR9_WORLD, WOR9_WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {WORA_WORLD, WORA_WORLD, WORA_WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+        {WORB_WORLD, WORB_WORLD, WORB_WORLD,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
+         0},
+};
+
+#define NO_INTERSECT_REQ        0xFFFFFFFF
+#define NO_UNION_REQ            0
+
+static struct country_code_to_enum_rd allCountries[] = {
+        {CTRY_DEBUG, NO_ENUMRD, "DB", "DEBUG", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_DEFAULT, DEF_REGDMN, "NA", "NO_COUNTRY_SET", YES, YES, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_ALBANIA, NULL1_WORLD, "AL", "ALBANIA", YES, NO, YES, YES, NO,
+         NO, NO, 7000},
+        {CTRY_ALGERIA, NULL1_WORLD, "DZ", "ALGERIA", YES, NO, YES, YES, NO,
+         NO, NO, 7000},
+        {CTRY_ARGENTINA, APL3_WORLD, "AR", "ARGENTINA", YES, NO, NO, YES,
+         NO, YES, NO, 7000},
+        {CTRY_ARMENIA, ETSI4_WORLD, "AM", "ARMENIA", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_AUSTRALIA, FCC2_WORLD, "AU", "AUSTRALIA", YES, YES, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_AUSTRALIA2, FCC6_WORLD, "AU", "AUSTRALIA2", YES, YES, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_AUSTRIA, ETSI1_WORLD, "AT", "AUSTRIA", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ", "AZERBAIJAN", YES, YES, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_BAHRAIN, APL6_WORLD, "BH", "BAHRAIN", YES, NO, YES, YES, YES,
+         YES, NO, 7000},
+        {CTRY_BELARUS, ETSI1_WORLD, "BY", "BELARUS", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_BELGIUM, ETSI1_WORLD, "BE", "BELGIUM", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_BELGIUM2, ETSI4_WORLD, "BL", "BELGIUM", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_BELIZE, APL1_ETSIC, "BZ", "BELIZE", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_BOLIVIA, APL1_ETSIC, "BO", "BOLVIA", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_BOSNIA_HERZ, ETSI1_WORLD, "BA", "BOSNIA_HERZGOWINA", YES, NO,
+         YES, YES, YES, YES, NO, 7000},
+        {CTRY_BRAZIL, FCC3_WORLD, "BR", "BRAZIL", YES, NO, NO, YES, NO,
+         YES, NO, 7000},
+        {CTRY_BRUNEI_DARUSSALAM, APL1_WORLD, "BN", "BRUNEI DARUSSALAM",
+         YES, YES, YES, YES, YES, YES, YES, 7000},
+        {CTRY_BULGARIA, ETSI6_WORLD, "BG", "BULGARIA", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_CANADA, FCC2_FCCA, "CA", "CANADA", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_CANADA2, FCC6_FCCA, "CA", "CANADA2", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_CHILE, APL6_WORLD, "CL", "CHILE", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_CHINA, APL1_WORLD, "CN", "CHINA", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_COLOMBIA, FCC1_FCCA, "CO", "COLOMBIA", YES, NO, YES, YES,
+         YES, YES, NO, 7000},
+        {CTRY_COSTA_RICA, FCC1_WORLD, "CR", "COSTA RICA", YES, NO, YES,
+         YES, YES, YES, NO, 7000},
+        {CTRY_CROATIA, ETSI3_WORLD, "HR", "CROATIA", YES, NO, YES, YES,
+         YES, YES, NO, 7000},
+        {CTRY_CYPRUS, ETSI1_WORLD, "CY", "CYPRUS", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_CZECH, ETSI3_WORLD, "CZ", "CZECH REPUBLIC", YES, NO, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_DENMARK, ETSI1_WORLD, "DK", "DENMARK", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_DOMINICAN_REPUBLIC, FCC1_FCCA, "DO", "DOMINICAN REPUBLIC",
+         YES, YES, YES, YES, YES, YES, YES, 7000},
+        {CTRY_ECUADOR, FCC1_WORLD, "EC", "ECUADOR", YES, NO, NO, YES, YES,
+         YES, NO, 7000},
+        {CTRY_EGYPT, ETSI3_WORLD, "EG", "EGYPT", YES, NO, YES, YES, YES,
+         YES, NO, 7000},
+        {CTRY_EL_SALVADOR, FCC1_WORLD, "SV", "EL SALVADOR", YES, NO, YES,
+         YES, YES, YES, NO, 7000},
+        {CTRY_ESTONIA, ETSI1_WORLD, "EE", "ESTONIA", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_FINLAND, ETSI1_WORLD, "FI", "FINLAND", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_FRANCE, ETSI1_WORLD, "FR", "FRANCE", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_GEORGIA, ETSI4_WORLD, "GE", "GEORGIA", YES, YES, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_GERMANY, ETSI1_WORLD, "DE", "GERMANY", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_GREECE, ETSI1_WORLD, "GR", "GREECE", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_GUATEMALA, FCC1_FCCA, "GT", "GUATEMALA", YES, YES, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_HONDURAS, NULL1_WORLD, "HN", "HONDURAS", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_HONG_KONG, FCC2_WORLD, "HK", "HONG KONG", YES, YES, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_HUNGARY, ETSI1_WORLD, "HU", "HUNGARY", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_ICELAND, ETSI1_WORLD, "IS", "ICELAND", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_INDIA, APL6_WORLD, "IN", "INDIA", YES, NO, YES, YES, YES,
+         YES, NO, 7000},
+        {CTRY_INDONESIA, APL1_WORLD, "ID", "INDONESIA", YES, NO, YES, YES,
+         YES, YES, NO, 7000},
+        {CTRY_IRAN, APL1_WORLD, "IR", "IRAN", YES, YES, YES, YES, YES, YES,
+         YES, 7000},
+        {CTRY_IRELAND, ETSI1_WORLD, "IE", "IRELAND", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_ISRAEL, NULL1_WORLD, "IL", "ISRAEL", YES, NO, YES, YES, YES,
+         NO, NO, 7000},
+        {CTRY_ITALY, ETSI1_WORLD, "IT", "ITALY", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAMAICA, ETSI1_WORLD, "JM", "JAMAICA", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+
+        {CTRY_JAPAN, MKK1_MKKA, "JP", "JAPAN", YES, NO, NO, YES, YES, YES,
+         YES, 7000},
+        {CTRY_JAPAN1, MKK1_MKKB, "JP", "JAPAN1", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN2, MKK1_FCCA, "JP", "JAPAN2", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN3, MKK2_MKKA, "JP", "JAPAN3", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN4, MKK1_MKKA1, "JP", "JAPAN4", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN5, MKK1_MKKA2, "JP", "JAPAN5", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN6, MKK1_MKKC, "JP", "JAPAN6", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JAPAN7, MKK3_MKKB, "JP", "JAPAN7", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN8, MKK3_MKKA2, "JP", "JAPAN8", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN9, MKK3_MKKC, "JP", "JAPAN9", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JAPAN10, MKK4_MKKB, "JP", "JAPAN10", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN11, MKK4_MKKA2, "JP", "JAPAN11", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN12, MKK4_MKKC, "JP", "JAPAN12", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JAPAN13, MKK5_MKKB, "JP", "JAPAN13", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN14, MKK5_MKKA2, "JP", "JAPAN14", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN15, MKK5_MKKC, "JP", "JAPAN15", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JAPAN16, MKK6_MKKB, "JP", "JAPAN16", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN17, MKK6_MKKA2, "JP", "JAPAN17", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN18, MKK6_MKKC, "JP", "JAPAN18", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JAPAN19, MKK7_MKKB, "JP", "JAPAN19", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN20, MKK7_MKKA2, "JP", "JAPAN20", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN21, MKK7_MKKC, "JP", "JAPAN21", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JAPAN22, MKK8_MKKB, "JP", "JAPAN22", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN23, MKK8_MKKA2, "JP", "JAPAN23", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN24, MKK8_MKKC, "JP", "JAPAN24", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JAPAN25, MKK3_MKKA, "JP", "JAPAN25", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN26, MKK3_MKKA1, "JP", "JAPAN26", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN27, MKK3_FCCA, "JP", "JAPAN27", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN28, MKK4_MKKA1, "JP", "JAPAN28", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN29, MKK4_FCCA, "JP", "JAPAN29", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN30, MKK6_MKKA1, "JP", "JAPAN30", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN31, MKK6_FCCA, "JP", "JAPAN31", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN32, MKK7_MKKA1, "JP", "JAPAN32", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN33, MKK7_FCCA, "JP", "JAPAN33", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN34, MKK9_MKKA, "JP", "JAPAN34", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN35, MKK10_MKKA, "JP", "JAPAN35", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN36, MKK4_MKKA, "JP", "JAPAN36", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN37, MKK9_FCCA, "JP", "JAPAN37", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN38, MKK9_MKKA1, "JP", "JAPAN38", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN39, MKK9_MKKC, "JP", "JAPAN39", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN40, MKK9_MKKA2, "JP", "JAPAN40", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN41, MKK10_FCCA, "JP", "JAPAN41", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN42, MKK10_MKKA1, "JP", "JAPAN42", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN43, MKK10_MKKC, "JP", "JAPAN43", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN44, MKK10_MKKA2, "JP", "JAPAN44", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN45, MKK11_MKKA, "JP", "JAPAN45", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN46, MKK11_FCCA, "JP", "JAPAN46", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN47, MKK11_MKKA1, "JP", "JAPAN47", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN48, MKK11_MKKC, "JP", "JAPAN48", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN49, MKK11_MKKA2, "JP", "JAPAN49", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN50, MKK12_MKKA, "JP", "JAPAN50", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN51, MKK12_FCCA, "JP", "JAPAN51", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN52, MKK12_MKKA1, "JP", "JAPAN52", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN53, MKK12_MKKC, "JP", "JAPAN53", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN54, MKK12_MKKA2, "JP", "JAPAN54", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JAPAN57, MKK13_MKKB, "JP", "JAPAN57", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN58, MKK14_MKKA1, "JP", "JAPAN58", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+        {CTRY_JAPAN59, MKK15_MKKA1, "JP", "JAPAN59", YES, NO, NO, YES, YES,
+         YES, YES, 7000},
+
+        {CTRY_JORDAN, ETSI2_WORLD, "JO", "JORDAN", YES, NO, YES, YES, YES,
+         YES, NO, 7000},
+        {CTRY_KAZAKHSTAN, NULL1_WORLD, "KZ", "KAZAKHSTAN", YES, NO, YES,
+         YES, YES, NO, NO, 7000},
+        {CTRY_KOREA_NORTH, APL9_WORLD, "KP", "NORTH KOREA", YES, NO, NO,
+         YES, YES, YES, YES, 7000},
+        {CTRY_KOREA_ROC, APL9_WORLD, "KR", "KOREA REPUBLIC", YES, NO, NO,
+         YES, NO, YES, NO, 7000},
+        {CTRY_KOREA_ROC2, APL2_WORLD, "K2", "KOREA REPUBLIC2", YES, NO, NO,
+         YES, NO, YES, NO, 7000},
+        {CTRY_KOREA_ROC3, APL9_WORLD, "K3", "KOREA REPUBLIC3", YES, NO, NO,
+         YES, NO, YES, NO, 7000},
+        {CTRY_KUWAIT, NULL1_WORLD, "KW", "KUWAIT", YES, NO, YES, YES, YES,
+         NO, NO, 7000},
+        {CTRY_LATVIA, ETSI1_WORLD, "LV", "LATVIA", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_LEBANON, NULL1_WORLD, "LB", "LEBANON", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_LIECHTENSTEIN, ETSI1_WORLD, "LI", "LIECHTENSTEIN", YES, NO,
+         YES, YES, YES, YES, YES, 7000},
+        {CTRY_LITHUANIA, ETSI1_WORLD, "LT", "LITHUANIA", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_LUXEMBOURG, ETSI1_WORLD, "LU", "LUXEMBOURG", YES, NO, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_MACAU, FCC2_WORLD, "MO", "MACAU", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_MACEDONIA, NULL1_WORLD, "MK", "MACEDONIA", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_MALAYSIA, APL8_WORLD, "MY", "MALAYSIA", YES, NO, NO, YES, NO,
+         YES, NO, 7000},
+        {CTRY_MALTA, ETSI1_WORLD, "MT", "MALTA", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_MEXICO, FCC1_FCCA, "MX", "MEXICO", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_MONACO, ETSI4_WORLD, "MC", "MONACO", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_MOROCCO, NULL1_WORLD, "MA", "MOROCCO", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_NEPAL, APL1_WORLD, "NP", "NEPAL", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_NETHERLANDS, ETSI1_WORLD, "NL", "NETHERLANDS", YES, NO, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_NETHERLANDS_ANTILLES, ETSI1_WORLD, "AN",
+         "NETHERLANDS-ANTILLES", YES, NO, YES, YES, YES, YES, YES, 7000},
+        {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ", "NEW ZEALAND", YES, NO, YES,
+         YES, YES, YES, NO, 7000},
+        {CTRY_NORWAY, ETSI1_WORLD, "NO", "NORWAY", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_OMAN, APL6_WORLD, "OM", "OMAN", YES, NO, YES, YES, YES, YES,
+         NO, 7000},
+        {CTRY_PAKISTAN, NULL1_WORLD, "PK", "PAKISTAN", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_PANAMA, FCC1_FCCA, "PA", "PANAMA", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_PAPUA_NEW_GUINEA, FCC1_WORLD, "PG", "PAPUA NEW GUINEA", YES,
+         YES, YES, YES, YES, YES, YES, 7000},
+        {CTRY_PERU, APL1_WORLD, "PE", "PERU", YES, NO, YES, YES, YES, YES,
+         NO, 7000},
+        {CTRY_PHILIPPINES, APL1_WORLD, "PH", "PHILIPPINES", YES, YES, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_POLAND, ETSI1_WORLD, "PL", "POLAND", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_PORTUGAL, ETSI1_WORLD, "PT", "PORTUGAL", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_PUERTO_RICO, FCC1_FCCA, "PR", "PUERTO RICO", YES, YES, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_QATAR, NULL1_WORLD, "QA", "QATAR", YES, NO, YES, YES, YES,
+         NO, NO, 7000},
+        {CTRY_ROMANIA, NULL1_WORLD, "RO", "ROMANIA", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_RUSSIA, NULL1_WORLD, "RU", "RUSSIA", YES, NO, YES, YES, YES,
+         NO, NO, 7000},
+        {CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA", "SAUDI ARABIA", YES, NO,
+         YES, YES, YES, NO, NO, 7000},
+        {CTRY_SERBIA_MONTENEGRO, ETSI1_WORLD, "CS", "SERBIA & MONTENEGRO",
+         YES, NO, YES, YES, YES, YES, YES, 7000},
+        {CTRY_SINGAPORE, APL6_WORLD, "SG", "SINGAPORE", YES, YES, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_SLOVAKIA, ETSI1_WORLD, "SK", "SLOVAK REPUBLIC", YES, NO, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_SLOVENIA, ETSI1_WORLD, "SI", "SLOVENIA", YES, NO, YES, YES,
+         YES, YES, YES, 7000},
+        {CTRY_SOUTH_AFRICA, FCC3_WORLD, "ZA", "SOUTH AFRICA", YES, NO, YES,
+         YES, YES, YES, NO, 7000},
+        {CTRY_SPAIN, ETSI1_WORLD, "ES", "SPAIN", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_SRI_LANKA, FCC3_WORLD, "LK", "SRI LANKA", YES, NO, YES, YES,
+         YES, YES, NO, 7000},
+        {CTRY_SWEDEN, ETSI1_WORLD, "SE", "SWEDEN", YES, NO, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_SWITZERLAND, ETSI1_WORLD, "CH", "SWITZERLAND", YES, NO, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_SYRIA, NULL1_WORLD, "SY", "SYRIA", YES, NO, YES, YES, YES,
+         NO, NO, 7000},
+        {CTRY_TAIWAN, APL3_FCCA, "TW", "TAIWAN", YES, YES, YES, YES, YES,
+         YES, YES, 7000},
+        {CTRY_THAILAND, NULL1_WORLD, "TH", "THAILAND", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_TRINIDAD_Y_TOBAGO, ETSI4_WORLD, "TT", "TRINIDAD & TOBAGO",
+         YES, NO, YES, YES, YES, YES, NO, 7000},
+        {CTRY_TUNISIA, ETSI3_WORLD, "TN", "TUNISIA", YES, NO, YES, YES,
+         YES, YES, NO, 7000},
+        {CTRY_TURKEY, ETSI3_WORLD, "TR", "TURKEY", YES, NO, YES, YES, YES,
+         YES, NO, 7000},
+        {CTRY_UKRAINE, NULL1_WORLD, "UA", "UKRAINE", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_UAE, NULL1_WORLD, "AE", "UNITED ARAB EMIRATES", YES, NO, YES,
+         YES, YES, NO, NO, 7000},
+        {CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB", "UNITED KINGDOM", YES, NO,
+         YES, YES, YES, YES, YES, 7000},
+        {CTRY_UNITED_STATES, FCC3_FCCA, "US", "UNITED STATES", YES, YES,
+         YES, YES, YES, YES, YES, 5825},
+        {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS",
+         "UNITED STATES (PUBLIC SAFETY)", YES, YES, YES, YES, YES, YES,
+         YES, 7000},
+        {CTRY_URUGUAY, APL2_WORLD, "UY", "URUGUAY", YES, NO, YES, YES, YES,
+         YES, NO, 7000},
+        {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ", "UZBEKISTAN", YES, YES, YES,
+         YES, YES, YES, YES, 7000},
+        {CTRY_VENEZUELA, APL2_ETSIC, "VE", "VENEZUELA", YES, NO, YES, YES,
+         YES, YES, NO, 7000},
+        {CTRY_VIET_NAM, NULL1_WORLD, "VN", "VIET NAM", YES, NO, YES, YES,
+         YES, NO, NO, 7000},
+        {CTRY_YEMEN, NULL1_WORLD, "YE", "YEMEN", YES, NO, YES, YES, YES,
+         NO, NO, 7000},
+        {CTRY_ZIMBABWE, NULL1_WORLD, "ZW", "ZIMBABWE", YES, NO, YES, YES,
+         YES, NO, NO, 7000}
+};
+
+enum {
+        NO_DFS = 0x0000000000000000ULL,
+        DFS_FCC3 = 0x0000000000000001ULL,
+        DFS_ETSI = 0x0000000000000002ULL,
+        DFS_MKK4 = 0x0000000000000004ULL,
+};
+
+enum {
+        F1_4915_4925,
+        F1_4935_4945,
+        F1_4920_4980,
+        F1_4942_4987,
+        F1_4945_4985,
+        F1_4950_4980,
+        F1_5035_5040,
+        F1_5040_5080,
+        F1_5055_5055,
+
+        F1_5120_5240,
+
+        F1_5170_5230,
+        F2_5170_5230,
+
+        F1_5180_5240,
+        F2_5180_5240,
+        F3_5180_5240,
+        F4_5180_5240,
+        F5_5180_5240,
+        F6_5180_5240,
+        F7_5180_5240,
+        F8_5180_5240,
+
+        F1_5180_5320,
+
+        F1_5240_5280,
+
+        F1_5260_5280,
+
+        F1_5260_5320,
+        F2_5260_5320,
+        F3_5260_5320,
+        F4_5260_5320,
+        F5_5260_5320,
+        F6_5260_5320,
+
+        F1_5260_5700,
+
+        F1_5280_5320,
+
+        F1_5500_5580,
+
+        F1_5500_5620,
+
+        F1_5500_5700,
+        F2_5500_5700,
+        F3_5500_5700,
+        F4_5500_5700,
+        F5_5500_5700,
+
+        F1_5660_5700,
+
+        F1_5745_5805,
+        F2_5745_5805,
+        F3_5745_5805,
+
+        F1_5745_5825,
+        F2_5745_5825,
+        F3_5745_5825,
+        F4_5745_5825,
+        F5_5745_5825,
+        F6_5745_5825,
+
+        W1_4920_4980,
+        W1_5040_5080,
+        W1_5170_5230,
+        W1_5180_5240,
+        W1_5260_5320,
+        W1_5745_5825,
+        W1_5500_5700,
+        A_DEMO_ALL_CHANNELS
+};
+
+static struct RegDmnFreqBand regDmn5GhzFreq[] = {
+        {4915, 4925, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 16},
+        {4935, 4945, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 16},
+        {4920, 4980, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2, 7},
+        {4942, 4987, 27, 6, 5, 5, NO_DFS, PSCAN_FCC, 0},
+        {4945, 4985, 30, 6, 10, 5, NO_DFS, PSCAN_FCC, 0},
+        {4950, 4980, 33, 6, 20, 5, NO_DFS, PSCAN_FCC, 0},
+        {5035, 5040, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 12},
+        {5040, 5080, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2, 2},
+        {5055, 5055, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 12},
+
+        {5120, 5240, 5, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
+
+        {5170, 5230, 23, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2, 1},
+        {5170, 5230, 20, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2, 1},
+
+        {5180, 5240, 15, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0},
+        {5180, 5240, 17, 6, 20, 20, NO_DFS, NO_PSCAN, 1},
+        {5180, 5240, 18, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0},
+        {5180, 5240, 20, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0},
+        {5180, 5240, 23, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0},
+        {5180, 5240, 23, 6, 20, 20, NO_DFS, PSCAN_FCC, 0},
+        {5180, 5240, 20, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK3, 0},
+        {5180, 5240, 23, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
+
+        {5180, 5320, 20, 6, 20, 20, NO_DFS, PSCAN_ETSI, 0},
+
+        {5240, 5280, 23, 0, 20, 20, DFS_FCC3, PSCAN_FCC | PSCAN_ETSI, 0},
+
+        {5260, 5280, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI,
+         PSCAN_FCC | PSCAN_ETSI, 0},
+
+        {5260, 5320, 18, 0, 20, 20, DFS_FCC3 | DFS_ETSI,
+         PSCAN_FCC | PSCAN_ETSI, 0},
+
+        {5260, 5320, 20, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4,
+         PSCAN_FCC | PSCAN_ETSI | PSCAN_MKK3, 0},
+
+
+        {5260, 5320, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI,
+         PSCAN_FCC | PSCAN_ETSI, 2},
+        {5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 2},
+        {5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 0},
+        {5260, 5320, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
+
+        {5260, 5700, 5, 6, 20, 20, DFS_FCC3 | DFS_ETSI, NO_PSCAN, 0},
+
+        {5280, 5320, 17, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 0},
+
+        {5500, 5580, 23, 6, 20, 20, DFS_FCC3, PSCAN_FCC, 0},
+
+        {5500, 5620, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0},
+
+        {5500, 5700, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 4},
+        {5500, 5700, 27, 0, 20, 20, DFS_FCC3 | DFS_ETSI,
+         PSCAN_FCC | PSCAN_ETSI, 0},
+        {5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI,
+         PSCAN_FCC | PSCAN_ETSI, 0},
+        {5500, 5700, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4,
+         PSCAN_MKK3 | PSCAN_FCC, 0},
+        {5500, 5700, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0},
+
+        {5660, 5700, 23, 6, 20, 20, DFS_FCC3, PSCAN_FCC, 0},
+
+        {5745, 5805, 23, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
+        {5745, 5805, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
+        {5745, 5805, 30, 6, 20, 20, NO_DFS, PSCAN_ETSI, 0},
+        {5745, 5825, 5, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
+        {5745, 5825, 17, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
+        {5745, 5825, 20, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
+        {5745, 5825, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
+        {5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 3},
+        {5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
+
+
+        {4920, 4980, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
+        {5040, 5080, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
+        {5170, 5230, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
+        {5180, 5240, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
+        {5260, 5320, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0},
+        {5745, 5825, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
+        {5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0},
+        {4920, 6100, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
+};
+
+enum {
+        T1_5130_5650,
+        T1_5150_5670,
+
+        T1_5200_5200,
+        T2_5200_5200,
+        T3_5200_5200,
+        T4_5200_5200,
+        T5_5200_5200,
+        T6_5200_5200,
+        T7_5200_5200,
+        T8_5200_5200,
+
+        T1_5200_5280,
+        T2_5200_5280,
+        T3_5200_5280,
+        T4_5200_5280,
+        T5_5200_5280,
+        T6_5200_5280,
+
+        T1_5200_5240,
+        T1_5210_5210,
+        T2_5210_5210,
+        T3_5210_5210,
+        T4_5210_5210,
+        T5_5210_5210,
+        T6_5210_5210,
+        T7_5210_5210,
+        T8_5210_5210,
+        T9_5210_5210,
+        T10_5210_5210,
+        T1_5240_5240,
+
+        T1_5210_5250,
+        T1_5210_5290,
+        T2_5210_5290,
+        T3_5210_5290,
+
+        T1_5280_5280,
+        T2_5280_5280,
+        T1_5290_5290,
+        T2_5290_5290,
+        T3_5290_5290,
+        T1_5250_5290,
+        T2_5250_5290,
+        T3_5250_5290,
+        T4_5250_5290,
+
+        T1_5540_5660,
+        T2_5540_5660,
+        T3_5540_5660,
+        T1_5760_5800,
+        T2_5760_5800,
+        T3_5760_5800,
+        T4_5760_5800,
+        T5_5760_5800,
+        T6_5760_5800,
+        T7_5760_5800,
+
+        T1_5765_5805,
+        T2_5765_5805,
+        T3_5765_5805,
+        T4_5765_5805,
+        T5_5765_5805,
+        T6_5765_5805,
+        T7_5765_5805,
+        T8_5765_5805,
+        T9_5765_5805,
+
+        WT1_5210_5250,
+        WT1_5290_5290,
+        WT1_5540_5660,
+        WT1_5760_5800,
+};
+
+enum {
+        F1_2312_2372,
+        F2_2312_2372,
+
+        F1_2412_2472,
+        F2_2412_2472,
+        F3_2412_2472,
+
+        F1_2412_2462,
+        F2_2412_2462,
+
+        F1_2432_2442,
+
+        F1_2457_2472,
+
+        F1_2467_2472,
+
+        F1_2484_2484,
+        F2_2484_2484,
+
+        F1_2512_2732,
+
+        W1_2312_2372,
+        W1_2412_2412,
+        W1_2417_2432,
+        W1_2437_2442,
+        W1_2447_2457,
+        W1_2462_2462,
+        W1_2467_2467,
+        W2_2467_2467,
+        W1_2472_2472,
+        W2_2472_2472,
+        W1_2484_2484,
+        W2_2484_2484,
+};
+
+static struct RegDmnFreqBand regDmn2GhzFreq[] = {
+        {2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0},
+        {2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0},
+
+        {2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0},
+
+        {2484, 2484, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2484, 2484, 20, 0, 20, 5, NO_DFS,
+         PSCAN_MKKA | PSCAN_MKKA1 | PSCAN_MKKA2, 0},
+
+        {2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2412, 2412, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2417, 2432, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2437, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2447, 2457, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2462, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2467, 2467, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0},
+        {2467, 2467, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0},
+        {2472, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0},
+        {2472, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0},
+        {2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0},
+        {2484, 2484, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0},
+};
+
+enum {
+        G1_2312_2372,
+        G2_2312_2372,
+
+        G1_2412_2472,
+        G2_2412_2472,
+        G3_2412_2472,
+
+        G1_2412_2462,
+        G2_2412_2462,
+
+        G1_2432_2442,
+
+        G1_2457_2472,
+
+        G1_2512_2732,
+
+        G1_2467_2472,
+
+        WG1_2312_2372,
+        WG1_2412_2462,
+        WG1_2467_2472,
+        WG2_2467_2472,
+        G_DEMO_ALL_CHANNELS
+};
+
+static struct RegDmnFreqBand regDmn2Ghz11gFreq[] = {
+        {2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G, 0},
+        {2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G, 0},
+
+        {2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+
+        {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0},
+
+        {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2412, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
+        {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0},
+        {2467, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0},
+        {2312, 2732, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
+};
+
+enum {
+        T1_2312_2372,
+        T1_2437_2437,
+        T2_2437_2437,
+        T3_2437_2437,
+        T1_2512_2732
+};
+
+static struct regDomain regDomains[] = {
+
+        {DEBUG_REG_DMN, FCC, DFS_FCC3, NO_PSCAN, NO_REQ,
+         BM(A_DEMO_ALL_CHANNELS, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5130_5650, T1_5150_5670, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5200_5240, T1_5280_5280, T1_5540_5660, T1_5765_5805, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BM(F1_2312_2372, F1_2412_2472, F1_2484_2484, F1_2512_2732, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BM(G_DEMO_ALL_CHANNELS, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_2312_2372, T1_2437_2437, T1_2512_2732, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1)},
+
+        {APL1, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BM(F4_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL2, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BM(F1_5745_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL3, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BM(F1_5280_5320, F2_5745_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5290_5290, T1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL4, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BM(F4_5180_5240, F3_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5210_5210, T3_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5200_5200, T3_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL5, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BM(F2_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T4_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T4_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL6, ETSI, DFS_ETSI, PSCAN_FCC_T | PSCAN_FCC, NO_REQ,
+         BM(F4_5180_5240, F2_5260_5320, F3_5745_5825, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T2_5210_5210, T1_5250_5290, T1_5760_5800, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T1_5200_5280, T5_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL7, ETSI, DFS_ETSI, PSCAN_ETSI, NO_REQ,
+         BM(F1_5280_5320, F5_5500_5700, F3_5745_5805, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL8, ETSI, NO_DFS, NO_PSCAN,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F6_5260_5320, F4_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T2_5290_5290, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5280_5280, T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL9, ETSI, DFS_ETSI, PSCAN_ETSI,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F1_5180_5320, F1_5500_5620, F3_5745_5805, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {APL10, ETSI, DFS_ETSI, PSCAN_ETSI,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F1_5180_5320, F5_5500_5700, F3_5745_5805, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {ETSI1, ETSI, DFS_ETSI, PSCAN_ETSI,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F4_5180_5240, F2_5260_5320, F2_5500_5700, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T1_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_5200_5280, T2_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {ETSI2, ETSI, DFS_ETSI, PSCAN_ETSI,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F3_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T3_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {ETSI3, ETSI, DFS_ETSI, PSCAN_ETSI,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T1_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {ETSI4, ETSI, DFS_ETSI, PSCAN_ETSI,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F3_5180_5240, F1_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T2_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T3_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {ETSI5, ETSI, DFS_ETSI, PSCAN_ETSI,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F1_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T4_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T3_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {ETSI6, ETSI, DFS_ETSI, PSCAN_ETSI,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F5_5180_5240, F1_5260_5280, F3_5500_5700, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T1_5210_5250, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T4_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {FCC1, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BM(F2_5180_5240, F4_5260_5320, F5_5745_5825, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T6_5210_5210, T2_5250_5290, T6_5760_5800, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T1_5200_5240, T2_5280_5280, T7_5765_5805, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {FCC2, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BM(F6_5180_5240, F5_5260_5320, F6_5745_5825, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T7_5210_5210, T3_5250_5290, T2_5760_5800, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T7_5200_5200, T1_5240_5240, T2_5280_5280, T1_5765_5805, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {FCC3, FCC, DFS_FCC3, PSCAN_FCC | PSCAN_FCC_T, NO_REQ,
+         BM(F2_5180_5240, F3_5260_5320, F1_5500_5700, F5_5745_5825, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BM(T6_5210_5210, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T4_5200_5200, T8_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {FCC4, FCC, DFS_FCC3, PSCAN_FCC | PSCAN_FCC_T, NO_REQ,
+         BM(F1_4942_4987, F1_4945_4985, F1_4950_4980, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T8_5210_5210, T4_5250_5290, T7_5760_5800, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T1_5200_5240, T1_5280_5280, T9_5765_5805, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {FCC5, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BM(F2_5180_5240, F6_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T6_5210_5210, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T8_5200_5200, T7_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {FCC6, FCC, DFS_FCC3, PSCAN_FCC, NO_REQ,
+         BM(F8_5180_5240, F5_5260_5320, F1_5500_5580, F1_5660_5700,
+            F6_5745_5825, -1, -1, -1, -1, -1, -1, -1),
+         BM(T7_5210_5210, T3_5250_5290, T2_5760_5800, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T7_5200_5200, T1_5240_5240, T2_5280_5280, T1_5765_5805, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {MKK1, MKK, NO_DFS, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB,
+         BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BM(T7_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T5_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+        {MKK2, MKK, NO_DFS, PSCAN_MKK2, DISALLOW_ADHOC_11A_TURB,
+         BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
+            F1_5055_5055, F1_5040_5080, F1_5170_5230, F4_5180_5240,
+            F2_5260_5320, F4_5500_5700, -1, -1),
+         BM(T7_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T5_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK3, MKK, NO_DFS, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB,
+         BM(F4_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T9_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T1_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK4, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB,
+         BM(F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T10_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T6_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK5, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB,
+         BM(F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T5_5200_5280, T3_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK6, MKK, NO_DFS, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB,
+         BM(F2_5170_5230, F4_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T3_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T6_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK7, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3,
+         DISALLOW_ADHOC_11A_TURB,
+         BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T5_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK8, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3,
+         DISALLOW_ADHOC_11A_TURB,
+         BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T5_5200_5280, T3_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK9, MKK, NO_DFS, PSCAN_MKK2 | PSCAN_MKK3,
+         DISALLOW_ADHOC_11A_TURB,
+         BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
+            F1_5055_5055, F1_5040_5080, F4_5180_5240, -1, -1, -1, -1, -1),
+         BM(T9_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T1_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK10, MKK, DFS_MKK4, PSCAN_MKK2 | PSCAN_MKK3,
+         DISALLOW_ADHOC_11A_TURB,
+         BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
+            F1_5055_5055, F1_5040_5080, F4_5180_5240, F2_5260_5320, -1, -1,
+            -1, -1),
+         BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK11, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB,
+         BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
+            F1_5055_5055, F1_5040_5080, F4_5180_5240, F2_5260_5320,
+            F4_5500_5700, -1, -1, -1),
+         BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK12, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3,
+         DISALLOW_ADHOC_11A_TURB,
+         BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
+            F1_5055_5055, F1_5040_5080, F1_5170_5230, F4_5180_5240,
+            F2_5260_5320, F4_5500_5700, -1, -1),
+         BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK13, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BM(F1_5170_5230, F7_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK14, MKK, DFS_MKK4, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB,
+         BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
+            F1_5040_5080, F1_5055_5055, F1_5170_5230, F4_5180_5240, -1, -1,
+            -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {MKK15, MKK, DFS_MKK4, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB,
+         BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
+            F1_5040_5080, F1_5055_5055, F1_5170_5230, F4_5180_5240,
+            F2_5260_5320, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO},
+
+
+        {APLD, NO_CTL, NO_DFS, NO_PSCAN, NO_REQ,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BM(F2_2312_2372, F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(G2_2312_2372, G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BMZERO},
+
+        {ETSIA, NO_CTL, NO_DFS, PSCAN_ETSIA,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BM(F1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(G1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {ETSIB, ETSI, NO_DFS, PSCAN_ETSIB,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BM(F1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(G1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {ETSIC, ETSI, NO_DFS, PSCAN_ETSIC,
+         DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BM(F3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(G3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {FCCA, FCC, NO_DFS, NO_PSCAN, NO_REQ,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BM(F1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(G1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {MKKA, MKK, NO_DFS,
+         PSCAN_MKKA | PSCAN_MKKA_G | PSCAN_MKKA1 | PSCAN_MKKA1_G |
+         PSCAN_MKKA2 | PSCAN_MKKA2_G, DISALLOW_ADHOC_11A_TURB,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BM(F2_2412_2462, F1_2467_2472, F2_2484_2484, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(G2_2412_2462, G1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1),
+         BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {MKKC, MKK, NO_DFS, NO_PSCAN, NO_REQ,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WORLD, ETSI, NO_DFS, NO_PSCAN, NO_REQ,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR0_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
+         BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
+            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
+         BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
+            -1, -1, -1, -1, -1),
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
+            W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1,
+            -1, -1),
+         BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR01_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR,
+         ADHOC_PER_11D,
+         BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
+            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
+         BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
+            -1, -1, -1, -1, -1),
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432,
+            W1_2447_2457, -1, -1, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR02_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR,
+         ADHOC_PER_11D,
+         BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
+            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
+         BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
+            -1, -1, -1, -1, -1),
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
+            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {EU1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
+         BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
+            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
+         BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
+            -1, -1, -1, -1, -1),
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W2_2472_2472,
+            W1_2417_2432, W1_2447_2457, W2_2467_2467, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, WG2_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
+         BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
+            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
+            W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1,
+            -1, -1),
+         BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR2_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
+         BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
+            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
+         BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
+            -1, -1, -1, -1, -1),
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
+            W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1,
+            -1, -1),
+         BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR3_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
+         BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
+            -1, -1, -1, -1, -1),
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
+            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, WG2_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR4_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
+         BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
+            -1, -1, -1, -1, -1),
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432,
+            W1_2447_2457, -1, -1, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR5_ETSIC, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
+         BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
+            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WOR9_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
+         BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, W1_5500_5700, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
+            -1, -1, -1, -1, -1),
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432,
+            W1_2447_2457, -1, -1, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WORA_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
+         BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, W1_5500_5700, -1, -1,
+            -1, -1, -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
+            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {WORB_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
+         BM(W1_5260_5320, W1_5180_5240, W1_5500_5700, -1, -1, -1, -1, -1,
+            -1, -1, -1, -1),
+         BMZERO,
+         BMZERO,
+         BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
+            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
+         BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
+            -1, -1),
+         BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},
+
+        {NULL1, NO_CTL, NO_DFS, NO_PSCAN, NO_REQ,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO,
+         BMZERO}
+};
+
+static const struct cmode modes[] = {
+        {ATH9K_MODE_11A, CHANNEL_A},
+        {ATH9K_MODE_11B, CHANNEL_B},
+        {ATH9K_MODE_11G, CHANNEL_G},
+        {ATH9K_MODE_11NG_HT20, CHANNEL_G_HT20},
+        {ATH9K_MODE_11NG_HT40PLUS, CHANNEL_G_HT40PLUS},
+        {ATH9K_MODE_11NG_HT40MINUS, CHANNEL_G_HT40MINUS},
+        {ATH9K_MODE_11NA_HT20, CHANNEL_A_HT20},
+        {ATH9K_MODE_11NA_HT40PLUS, CHANNEL_A_HT40PLUS},
+        {ATH9K_MODE_11NA_HT40MINUS, CHANNEL_A_HT40MINUS},
+};
+
+static struct japan_bandcheck j_bandcheck[] = {
+        {F1_5170_5230, AR_EEPROM_EEREGCAP_EN_KK_U1_ODD},
+        {F4_5180_5240, AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN},
+        {F2_5260_5320, AR_EEPROM_EEREGCAP_EN_KK_U2},
+        {F4_5500_5700, AR_EEPROM_EEREGCAP_EN_KK_MIDBAND}
+};
+
+
+#endif
diff --git a/drivers/net/wireless/ath9k/xmit.c b/drivers/net/wireless/ath9k/xmit.c
new file mode 100644
index 000000000000..157f830ee6b8
--- /dev/null
+++ b/drivers/net/wireless/ath9k/xmit.c
@@ -0,0 +1,2871 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Implementation of transmit path.
+ */
+
+#include "core.h"
+
+#define BITS_PER_BYTE           8
+#define OFDM_PLCP_BITS          22
+#define HT_RC_2_MCS(_rc)        ((_rc) & 0x0f)
+#define HT_RC_2_STREAMS(_rc)    ((((_rc) & 0x78) >> 3) + 1)
+#define L_STF                   8
+#define L_LTF                   8
+#define L_SIG                   4
+#define HT_SIG                  8
+#define HT_STF                  4
+#define HT_LTF(_ns)             (4 * (_ns))
+#define SYMBOL_TIME(_ns)        ((_ns) << 2) /* ns * 4 us */
+#define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5)  /* ns * 3.6 us */
+#define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
+#define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
+
+#define OFDM_SIFS_TIME              16
+
+static u32 bits_per_symbol[][2] = {
+        /* 20MHz 40MHz */
+        {    26,   54 },     /*  0: BPSK */
+        {    52,  108 },     /*  1: QPSK 1/2 */
+        {    78,  162 },     /*  2: QPSK 3/4 */
+        {   104,  216 },     /*  3: 16-QAM 1/2 */
+        {   156,  324 },     /*  4: 16-QAM 3/4 */
+        {   208,  432 },     /*  5: 64-QAM 2/3 */
+        {   234,  486 },     /*  6: 64-QAM 3/4 */
+        {   260,  540 },     /*  7: 64-QAM 5/6 */
+        {    52,  108 },     /*  8: BPSK */
+        {   104,  216 },     /*  9: QPSK 1/2 */
+        {   156,  324 },     /* 10: QPSK 3/4 */
+        {   208,  432 },     /* 11: 16-QAM 1/2 */
+        {   312,  648 },     /* 12: 16-QAM 3/4 */
+        {   416,  864 },     /* 13: 64-QAM 2/3 */
+        {   468,  972 },     /* 14: 64-QAM 3/4 */
+        {   520, 1080 },     /* 15: 64-QAM 5/6 */
+};
+
+#define IS_HT_RATE(_rate)     ((_rate) & 0x80)
+
+/*
+ * Insert a chain of ath_buf (descriptors) on a multicast txq
+ * but do NOT start tx DMA on this queue.
+ * NB: must be called with txq lock held
+ */
+
+static void ath_tx_mcastqaddbuf(struct ath_softc *sc,
+                                struct ath_txq *txq,
+                                struct list_head *head)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_buf *bf;
+
+        if (list_empty(head))
+                return;
+
+        /*
+         * Insert the frame on the outbound list and
+         * pass it on to the hardware.
+         */
+        bf = list_first_entry(head, struct ath_buf, list);
+
+        /*
+         * The CAB queue is started from the SWBA handler since
+         * frames only go out on DTIM and to avoid possible races.
+         */
+        ath9k_hw_set_interrupts(ah, 0);
+
+        /*
+         * If there is anything in the mcastq, we want to set
+         * the "more data" bit in the last item in the queue to
+         * indicate that there is "more data". It makes sense to add
+         * it here since you are *always* going to have
+         * more data when adding to this queue, no matter where
+         * you call from.
+         */
+
+        if (txq->axq_depth) {
+                struct ath_buf *lbf;
+                struct ieee80211_hdr *hdr;
+
+                /*
+                 * Add the "more data flag" to the last frame
+                 */
+
+                lbf = list_entry(txq->axq_q.prev, struct ath_buf, list);
+                hdr = (struct ieee80211_hdr *)
+                        ((struct sk_buff *)(lbf->bf_mpdu))->data;
+                hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
+        }
+
+        /*
+         * Now, concat the frame onto the queue
+         */
+        list_splice_tail_init(head, &txq->axq_q);
+        txq->axq_depth++;
+        txq->axq_totalqueued++;
+        txq->axq_linkbuf = list_entry(txq->axq_q.prev, struct ath_buf, list);
+
+        DPRINTF(sc, ATH_DBG_QUEUE,
+                "%s: txq depth = %d\n", __func__, txq->axq_depth);
+        if (txq->axq_link != NULL) {
+                *txq->axq_link = bf->bf_daddr;
+                DPRINTF(sc, ATH_DBG_XMIT,
+                        "%s: link[%u](%p)=%llx (%p)\n",
+                        __func__,
+                        txq->axq_qnum, txq->axq_link,
+                        ito64(bf->bf_daddr), bf->bf_desc);
+        }
+        txq->axq_link = &(bf->bf_lastbf->bf_desc->ds_link);
+        ath9k_hw_set_interrupts(ah, sc->sc_imask);
+}
+
+/*
+ * Insert a chain of ath_buf (descriptors) on a txq and
+ * assume the descriptors are already chained together by caller.
+ * NB: must be called with txq lock held
+ */
+
+static void ath_tx_txqaddbuf(struct ath_softc *sc,
+                struct ath_txq *txq, struct list_head *head)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_buf *bf;
+        /*
+         * Insert the frame on the outbound list and
+         * pass it on to the hardware.
+         */
+
+        if (list_empty(head))
+                return;
+
+        bf = list_first_entry(head, struct ath_buf, list);
+
+        list_splice_tail_init(head, &txq->axq_q);
+        txq->axq_depth++;
+        txq->axq_totalqueued++;
+        txq->axq_linkbuf = list_entry(txq->axq_q.prev, struct ath_buf, list);
+
+        DPRINTF(sc, ATH_DBG_QUEUE,
+                "%s: txq depth = %d\n", __func__, txq->axq_depth);
+
+        if (txq->axq_link == NULL) {
+                ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
+                DPRINTF(sc, ATH_DBG_XMIT,
+                        "%s: TXDP[%u] = %llx (%p)\n",
+                        __func__, txq->axq_qnum,
+                        ito64(bf->bf_daddr), bf->bf_desc);
+        } else {
+                *txq->axq_link = bf->bf_daddr;
+                DPRINTF(sc, ATH_DBG_XMIT, "%s: link[%u] (%p)=%llx (%p)\n",
+                        __func__,
+                        txq->axq_qnum, txq->axq_link,
+                        ito64(bf->bf_daddr), bf->bf_desc);
+        }
+        txq->axq_link = &(bf->bf_lastbf->bf_desc->ds_link);
+        ath9k_hw_txstart(ah, txq->axq_qnum);
+}
+
+/* Get transmit rate index using rate in Kbps */
+
+static int ath_tx_findindex(const struct ath9k_rate_table *rt, int rate)
+{
+        int i;
+        int ndx = 0;
+
+        for (i = 0; i < rt->rateCount; i++) {
+                if (rt->info[i].rateKbps == rate) {
+                        ndx = i;
+                        break;
+                }
+        }
+
+        return ndx;
+}
+
+/* Check if it's okay to send out aggregates */
+
+static int ath_aggr_query(struct ath_softc *sc,
+        struct ath_node *an, u8 tidno)
+{
+        struct ath_atx_tid *tid;
+        tid = ATH_AN_2_TID(an, tidno);
+
+        if (tid->addba_exchangecomplete || tid->addba_exchangeinprogress)
+                return 1;
+        else
+                return 0;
+}
+
+static enum ath9k_pkt_type get_hal_packet_type(struct ieee80211_hdr *hdr)
+{
+        enum ath9k_pkt_type htype;
+        __le16 fc;
+
+        fc = hdr->frame_control;
+
+        /* Calculate Atheros packet type from IEEE80211 packet header */
+
+        if (ieee80211_is_beacon(fc))
+                htype = ATH9K_PKT_TYPE_BEACON;
+        else if (ieee80211_is_probe_resp(fc))
+                htype = ATH9K_PKT_TYPE_PROBE_RESP;
+        else if (ieee80211_is_atim(fc))
+                htype = ATH9K_PKT_TYPE_ATIM;
+        else if (ieee80211_is_pspoll(fc))
+                htype = ATH9K_PKT_TYPE_PSPOLL;
+        else
+                htype = ATH9K_PKT_TYPE_NORMAL;
+
+        return htype;
+}
+
+static void fill_min_rates(struct sk_buff *skb, struct ath_tx_control *txctl)
+{
+        struct ieee80211_hdr *hdr;
+        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+        struct ath_tx_info_priv *tx_info_priv;
+        __le16 fc;
+
+        hdr = (struct ieee80211_hdr *)skb->data;
+        fc = hdr->frame_control;
+        tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0];
+
+        if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
+                txctl->use_minrate = 1;
+                txctl->min_rate = tx_info_priv->min_rate;
+        } else if (ieee80211_is_data(fc)) {
+                if (ieee80211_is_nullfunc(fc) ||
+                        /* Port Access Entity (IEEE 802.1X) */
+                        (skb->protocol == cpu_to_be16(0x888E))) {
+                        txctl->use_minrate = 1;
+                        txctl->min_rate = tx_info_priv->min_rate;
+                }
+                if (is_multicast_ether_addr(hdr->addr1))
+                        txctl->mcast_rate = tx_info_priv->min_rate;
+        }
+
+}
+
+/* This function will setup additional txctl information, mostly rate stuff */
+/* FIXME: seqno, ps */
+static int ath_tx_prepare(struct ath_softc *sc,
+                          struct sk_buff *skb,
+                          struct ath_tx_control *txctl)
+{
+        struct ieee80211_hw *hw = sc->hw;
+        struct ieee80211_hdr *hdr;
+        struct ath_rc_series *rcs;
+        struct ath_txq *txq = NULL;
+        const struct ath9k_rate_table *rt;
+        struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
+        struct ath_tx_info_priv *tx_info_priv;
+        int hdrlen;
+        u8 rix, antenna;
+        __le16 fc;
+        u8 *qc;
+
+        memset(txctl, 0, sizeof(struct ath_tx_control));
+
+        txctl->dev = sc;
+        hdr = (struct ieee80211_hdr *)skb->data;
+        hdrlen = ieee80211_get_hdrlen_from_skb(skb);
+        fc = hdr->frame_control;
+
+        rt = sc->sc_currates;
+        BUG_ON(!rt);
+
+        /* Fill misc fields */
+
+        spin_lock_bh(&sc->node_lock);
+        txctl->an = ath_node_get(sc, hdr->addr1);
+        /* create a temp node, if the node is not there already */
+        if (!txctl->an)
+                txctl->an = ath_node_attach(sc, hdr->addr1, 0);
+        spin_unlock_bh(&sc->node_lock);
+
+        if (ieee80211_is_data_qos(fc)) {
+                qc = ieee80211_get_qos_ctl(hdr);
+                txctl->tidno = qc[0] & 0xf;
+        }
+
+        txctl->if_id = 0;
+        txctl->nextfraglen = 0;
+        txctl->frmlen = skb->len + FCS_LEN - (hdrlen & 3);
+        txctl->txpower = MAX_RATE_POWER; /* FIXME */
+
+        /* Fill Key related fields */
+
+        txctl->keytype = ATH9K_KEY_TYPE_CLEAR;
+        txctl->keyix = ATH9K_TXKEYIX_INVALID;
+
+        if (tx_info->control.hw_key) {
+                txctl->keyix = tx_info->control.hw_key->hw_key_idx;
+                txctl->frmlen += tx_info->control.icv_len;
+
+                if (sc->sc_keytype == ATH9K_CIPHER_WEP)
+                        txctl->keytype = ATH9K_KEY_TYPE_WEP;
+                else if (sc->sc_keytype == ATH9K_CIPHER_TKIP)
+                        txctl->keytype = ATH9K_KEY_TYPE_TKIP;
+                else if (sc->sc_keytype == ATH9K_CIPHER_AES_CCM)
+                        txctl->keytype = ATH9K_KEY_TYPE_AES;
+        }
+
+        /* Fill packet type */
+
+        txctl->atype = get_hal_packet_type(hdr);
+
+        /* Fill qnum */
+
+        txctl->qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
+        txq = &sc->sc_txq[txctl->qnum];
+        spin_lock_bh(&txq->axq_lock);
+
+        /* Try to avoid running out of descriptors */
+        if (txq->axq_depth >= (ATH_TXBUF - 20)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: TX queue: %d is full, depth: %d\n",
+                        __func__,
+                        txctl->qnum,
+                        txq->axq_depth);
+                ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
+                txq->stopped = 1;
+                spin_unlock_bh(&txq->axq_lock);
+                return -1;
+        }
+
+        spin_unlock_bh(&txq->axq_lock);
+
+        /* Fill rate */
+
+        fill_min_rates(skb, txctl);
+
+        /* Fill flags */
+
+        txctl->flags = ATH9K_TXDESC_CLRDMASK;    /* needed for crypto errors */
+
+        if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
+                tx_info->flags |= ATH9K_TXDESC_NOACK;
+        if (tx_info->flags & IEEE80211_TX_CTL_USE_RTS_CTS)
+                tx_info->flags |= ATH9K_TXDESC_RTSENA;
+
+        /*
+         * Setup for rate calculations.
+         */
+        tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0];
+        rcs = tx_info_priv->rcs;
+
+        if (ieee80211_is_data(fc) && !txctl->use_minrate) {
+
+                /* Enable HT only for DATA frames and not for EAPOL */
+                txctl->ht = (hw->conf.ht_conf.ht_supported &&
+                            (tx_info->flags & IEEE80211_TX_CTL_AMPDU));
+
+                if (is_multicast_ether_addr(hdr->addr1)) {
+                        rcs[0].rix = (u8)
+                                ath_tx_findindex(rt, txctl->mcast_rate);
+
+                        /*
+                         * mcast packets are not re-tried.
+                         */
+                        rcs[0].tries = 1;
+                }
+                /* For HT capable stations, we save tidno for later use.
+                 * We also override seqno set by upper layer with the one
+                 * in tx aggregation state.
+                 *
+                 * First, the fragmentation stat is determined.
+                 * If fragmentation is on, the sequence number is
+                 * not overridden, since it has been
+                 * incremented by the fragmentation routine.
+                 */
+                if (likely(!(txctl->flags & ATH9K_TXDESC_FRAG_IS_ON)) &&
+                        txctl->ht && sc->sc_txaggr) {
+                        struct ath_atx_tid *tid;
+
+                        tid = ATH_AN_2_TID(txctl->an, txctl->tidno);
+
+                        hdr->seq_ctrl = cpu_to_le16(tid->seq_next <<
+                                IEEE80211_SEQ_SEQ_SHIFT);
+                        txctl->seqno = tid->seq_next;
+                        INCR(tid->seq_next, IEEE80211_SEQ_MAX);
+                }
+        } else {
+                /* for management and control frames,
+                 * or for NULL and EAPOL frames */
+                if (txctl->min_rate)
+                        rcs[0].rix = ath_rate_findrateix(sc, txctl->min_rate);
+                else
+                        rcs[0].rix = 0;
+                rcs[0].tries = ATH_MGT_TXMAXTRY;
+        }
+        rix = rcs[0].rix;
+
+        /*
+         * Calculate duration.  This logically belongs in the 802.11
+         * layer but it lacks sufficient information to calculate it.
+         */
+        if ((txctl->flags & ATH9K_TXDESC_NOACK) == 0 && !ieee80211_is_ctl(fc)) {
+                u16 dur;
+                /*
+                 * XXX not right with fragmentation.
+                 */
+                if (sc->sc_flags & ATH_PREAMBLE_SHORT)
+                        dur = rt->info[rix].spAckDuration;
+                else
+                        dur = rt->info[rix].lpAckDuration;
+
+                if (le16_to_cpu(hdr->frame_control) &
+                                IEEE80211_FCTL_MOREFRAGS) {
+                        dur += dur;  /* Add additional 'SIFS + ACK' */
+
+                        /*
+                        ** Compute size of next fragment in order to compute
+                        ** durations needed to update NAV.
+                        ** The last fragment uses the ACK duration only.
+                        ** Add time for next fragment.
+                        */
+                        dur += ath9k_hw_computetxtime(sc->sc_ah, rt,
+                                        txctl->nextfraglen,
+                                        rix, sc->sc_flags & ATH_PREAMBLE_SHORT);
+                }
+
+                if (ieee80211_has_morefrags(fc) ||
+                     (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG)) {
+                        /*
+                        **  Force hardware to use computed duration for next
+                        **  fragment by disabling multi-rate retry, which
+                        **  updates duration based on the multi-rate
+                        **  duration table.
+                        */
+                        rcs[1].tries = rcs[2].tries = rcs[3].tries = 0;
+                        rcs[1].rix = rcs[2].rix = rcs[3].rix = 0;
+                        /* reset tries but keep rate index */
+                        rcs[0].tries = ATH_TXMAXTRY;
+                }
+
+                hdr->duration_id = cpu_to_le16(dur);
+        }
+
+        /*
+         * Determine if a tx interrupt should be generated for
+         * this descriptor.  We take a tx interrupt to reap
+         * descriptors when the h/w hits an EOL condition or
+         * when the descriptor is specifically marked to generate
+         * an interrupt.  We periodically mark descriptors in this
+         * way to insure timely replenishing of the supply needed
+         * for sending frames.  Defering interrupts reduces system
+         * load and potentially allows more concurrent work to be
+         * done but if done to aggressively can cause senders to
+         * backup.
+         *
+         * NB: use >= to deal with sc_txintrperiod changing
+         *     dynamically through sysctl.
+         */
+        spin_lock_bh(&txq->axq_lock);
+        if ((++txq->axq_intrcnt >= sc->sc_txintrperiod)) {
+                txctl->flags |= ATH9K_TXDESC_INTREQ;
+                txq->axq_intrcnt = 0;
+        }
+        spin_unlock_bh(&txq->axq_lock);
+
+        if (is_multicast_ether_addr(hdr->addr1)) {
+                antenna = sc->sc_mcastantenna + 1;
+                sc->sc_mcastantenna = (sc->sc_mcastantenna + 1) & 0x1;
+        } else
+                antenna = sc->sc_txantenna;
+
+#ifdef USE_LEGACY_HAL
+        txctl->antenna = antenna;
+#endif
+        return 0;
+}
+
+/* To complete a chain of buffers associated a frame */
+
+static void ath_tx_complete_buf(struct ath_softc *sc,
+                                struct ath_buf *bf,
+                                struct list_head *bf_q,
+                                int txok, int sendbar)
+{
+        struct sk_buff *skb = bf->bf_mpdu;
+        struct ath_xmit_status tx_status;
+        dma_addr_t *pa;
+
+        /*
+         * Set retry information.
+         * NB: Don't use the information in the descriptor, because the frame
+         * could be software retried.
+         */
+        tx_status.retries = bf->bf_retries;
+        tx_status.flags = 0;
+
+        if (sendbar)
+                tx_status.flags = ATH_TX_BAR;
+
+        if (!txok) {
+                tx_status.flags |= ATH_TX_ERROR;
+
+                if (bf->bf_isxretried)
+                        tx_status.flags |= ATH_TX_XRETRY;
+        }
+        /* Unmap this frame */
+        pa = get_dma_mem_context(bf, bf_dmacontext);
+        pci_unmap_single(sc->pdev,
+                         *pa,
+                         skb->len,
+                         PCI_DMA_TODEVICE);
+        /* complete this frame */
+        ath_tx_complete(sc, skb, &tx_status, bf->bf_node);
+
+        /*
+         * Return the list of ath_buf of this mpdu to free queue
+         */
+        spin_lock_bh(&sc->sc_txbuflock);
+        list_splice_tail_init(bf_q, &sc->sc_txbuf);
+        spin_unlock_bh(&sc->sc_txbuflock);
+}
+
+/*
+ * queue up a dest/ac pair for tx scheduling
+ * NB: must be called with txq lock held
+ */
+
+static void ath_tx_queue_tid(struct ath_txq *txq, struct ath_atx_tid *tid)
+{
+        struct ath_atx_ac *ac = tid->ac;
+
+        /*
+         * if tid is paused, hold off
+         */
+        if (tid->paused)
+                return;
+
+        /*
+         * add tid to ac atmost once
+         */
+        if (tid->sched)
+                return;
+
+        tid->sched = true;
+        list_add_tail(&tid->list, &ac->tid_q);
+
+        /*
+         * add node ac to txq atmost once
+         */
+        if (ac->sched)
+                return;
+
+        ac->sched = true;
+        list_add_tail(&ac->list, &txq->axq_acq);
+}
+
+/* pause a tid */
+
+static void ath_tx_pause_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
+{
+        struct ath_txq *txq = &sc->sc_txq[tid->ac->qnum];
+
+        spin_lock_bh(&txq->axq_lock);
+
+        tid->paused++;
+
+        spin_unlock_bh(&txq->axq_lock);
+}
+
+/* resume a tid and schedule aggregate */
+
+void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
+{
+        struct ath_txq *txq = &sc->sc_txq[tid->ac->qnum];
+
+        ASSERT(tid->paused > 0);
+        spin_lock_bh(&txq->axq_lock);
+
+        tid->paused--;
+
+        if (tid->paused > 0)
+                goto unlock;
+
+        if (list_empty(&tid->buf_q))
+                goto unlock;
+
+        /*
+         * Add this TID to scheduler and try to send out aggregates
+         */
+        ath_tx_queue_tid(txq, tid);
+        ath_txq_schedule(sc, txq);
+unlock:
+        spin_unlock_bh(&txq->axq_lock);
+}
+
+/* Compute the number of bad frames */
+
+static int ath_tx_num_badfrms(struct ath_softc *sc,
+        struct ath_buf *bf, int txok)
+{
+        struct ath_node *an = bf->bf_node;
+        int isnodegone = (an->an_flags & ATH_NODE_CLEAN);
+        struct ath_buf *bf_last = bf->bf_lastbf;
+        struct ath_desc *ds = bf_last->bf_desc;
+        u16 seq_st = 0;
+        u32 ba[WME_BA_BMP_SIZE >> 5];
+        int ba_index;
+        int nbad = 0;
+        int isaggr = 0;
+
+        if (isnodegone || ds->ds_txstat.ts_flags == ATH9K_TX_SW_ABORTED)
+                return 0;
+
+        isaggr = bf->bf_isaggr;
+        if (isaggr) {
+                seq_st = ATH_DS_BA_SEQ(ds);
+                memcpy(ba, ATH_DS_BA_BITMAP(ds), WME_BA_BMP_SIZE >> 3);
+        }
+
+        while (bf) {
+                ba_index = ATH_BA_INDEX(seq_st, bf->bf_seqno);
+                if (!txok || (isaggr && !ATH_BA_ISSET(ba, ba_index)))
+                        nbad++;
+
+                bf = bf->bf_next;
+        }
+
+        return nbad;
+}
+
+static void ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
+{
+        struct sk_buff *skb;
+        struct ieee80211_hdr *hdr;
+
+        bf->bf_isretried = 1;
+        bf->bf_retries++;
+
+        skb = bf->bf_mpdu;
+        hdr = (struct ieee80211_hdr *)skb->data;
+        hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY);
+}
+
+/* Update block ack window */
+
+static void ath_tx_update_baw(struct ath_softc *sc,
+        struct ath_atx_tid *tid, int seqno)
+{
+        int index, cindex;
+
+        index  = ATH_BA_INDEX(tid->seq_start, seqno);
+        cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
+
+        tid->tx_buf[cindex] = NULL;
+
+        while (tid->baw_head != tid->baw_tail && !tid->tx_buf[tid->baw_head]) {
+                INCR(tid->seq_start, IEEE80211_SEQ_MAX);
+                INCR(tid->baw_head, ATH_TID_MAX_BUFS);
+        }
+}
+
+/*
+ * ath_pkt_dur - compute packet duration (NB: not NAV)
+ *
+ * rix - rate index
+ * pktlen - total bytes (delims + data + fcs + pads + pad delims)
+ * width  - 0 for 20 MHz, 1 for 40 MHz
+ * half_gi - to use 4us v/s 3.6 us for symbol time
+ */
+
+static u32 ath_pkt_duration(struct ath_softc *sc,
+                                  u8 rix,
+                                  struct ath_buf *bf,
+                                  int width,
+                                  int half_gi,
+                                  bool shortPreamble)
+{
+        const struct ath9k_rate_table *rt = sc->sc_currates;
+        u32 nbits, nsymbits, duration, nsymbols;
+        u8 rc;
+        int streams, pktlen;
+
+        pktlen = bf->bf_isaggr ? bf->bf_al : bf->bf_frmlen;
+        rc = rt->info[rix].rateCode;
+
+        /*
+         * for legacy rates, use old function to compute packet duration
+         */
+        if (!IS_HT_RATE(rc))
+                return ath9k_hw_computetxtime(sc->sc_ah,
+                                             rt,
+                                             pktlen,
+                                             rix,
+                                             shortPreamble);
+        /*
+         * find number of symbols: PLCP + data
+         */
+        nbits = (pktlen << 3) + OFDM_PLCP_BITS;
+        nsymbits = bits_per_symbol[HT_RC_2_MCS(rc)][width];
+        nsymbols = (nbits + nsymbits - 1) / nsymbits;
+
+        if (!half_gi)
+                duration = SYMBOL_TIME(nsymbols);
+        else
+                duration = SYMBOL_TIME_HALFGI(nsymbols);
+
+        /*
+         * addup duration for legacy/ht training and signal fields
+         */
+        streams = HT_RC_2_STREAMS(rc);
+        duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
+        return duration;
+}
+
+/* Rate module function to set rate related fields in tx descriptor */
+
+static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        const struct ath9k_rate_table *rt;
+        struct ath_desc *ds = bf->bf_desc;
+        struct ath_desc *lastds = bf->bf_lastbf->bf_desc;
+        struct ath9k_11n_rate_series series[4];
+        int i, flags, rtsctsena = 0, dynamic_mimops = 0;
+        u32 ctsduration = 0;
+        u8 rix = 0, cix, ctsrate = 0;
+        u32 aggr_limit_with_rts = sc->sc_rtsaggrlimit;
+        struct ath_node *an = (struct ath_node *) bf->bf_node;
+
+        /*
+         * get the cix for the lowest valid rix.
+         */
+        rt = sc->sc_currates;
+        for (i = 4; i--;) {
+                if (bf->bf_rcs[i].tries) {
+                        rix = bf->bf_rcs[i].rix;
+                        break;
+                }
+        }
+        flags = (bf->bf_flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA));
+        cix = rt->info[rix].controlRate;
+
+        /*
+         * If 802.11g protection is enabled, determine whether
+         * to use RTS/CTS or just CTS.  Note that this is only
+         * done for OFDM/HT unicast frames.
+         */
+        if (sc->sc_protmode != PROT_M_NONE &&
+            (rt->info[rix].phy == PHY_OFDM ||
+             rt->info[rix].phy == PHY_HT) &&
+            (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0) {
+                if (sc->sc_protmode == PROT_M_RTSCTS)
+                        flags = ATH9K_TXDESC_RTSENA;
+                else if (sc->sc_protmode == PROT_M_CTSONLY)
+                        flags = ATH9K_TXDESC_CTSENA;
+
+                cix = rt->info[sc->sc_protrix].controlRate;
+                rtsctsena = 1;
+        }
+
+        /* For 11n, the default behavior is to enable RTS for
+         * hw retried frames. We enable the global flag here and
+         * let rate series flags determine which rates will actually
+         * use RTS.
+         */
+        if ((ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) && bf->bf_isdata) {
+                BUG_ON(!an);
+                /*
+                 * 802.11g protection not needed, use our default behavior
+                 */
+                if (!rtsctsena)
+                        flags = ATH9K_TXDESC_RTSENA;
+                /*
+                 * For dynamic MIMO PS, RTS needs to precede the first aggregate
+                 * and the second aggregate should have any protection at all.
+                 */
+                if (an->an_smmode == ATH_SM_PWRSAV_DYNAMIC) {
+                        if (!bf->bf_aggrburst) {
+                                flags = ATH9K_TXDESC_RTSENA;
+                                dynamic_mimops = 1;
+                        } else {
+                                flags = 0;
+                        }
+                }
+        }
+
+        /*
+         * Set protection if aggregate protection on
+         */
+        if (sc->sc_config.ath_aggr_prot &&
+            (!bf->bf_isaggr || (bf->bf_isaggr && bf->bf_al < 8192))) {
+                flags = ATH9K_TXDESC_RTSENA;
+                cix = rt->info[sc->sc_protrix].controlRate;
+                rtsctsena = 1;
+        }
+
+        /*
+         *  For AR5416 - RTS cannot be followed by a frame larger than 8K.
+         */
+        if (bf->bf_isaggr && (bf->bf_al > aggr_limit_with_rts)) {
+                /*
+                 * Ensure that in the case of SM Dynamic power save
+                 * while we are bursting the second aggregate the
+                 * RTS is cleared.
+                 */
+                flags &= ~(ATH9K_TXDESC_RTSENA);
+        }
+
+        /*
+         * CTS transmit rate is derived from the transmit rate
+         * by looking in the h/w rate table.  We must also factor
+         * in whether or not a short preamble is to be used.
+         */
+        /* NB: cix is set above where RTS/CTS is enabled */
+        BUG_ON(cix == 0xff);
+        ctsrate = rt->info[cix].rateCode |
+                (bf->bf_shpreamble ? rt->info[cix].shortPreamble : 0);
+
+        /*
+         * Setup HAL rate series
+         */
+        memzero(series, sizeof(struct ath9k_11n_rate_series) * 4);
+
+        for (i = 0; i < 4; i++) {
+                if (!bf->bf_rcs[i].tries)
+                        continue;
+
+                rix = bf->bf_rcs[i].rix;
+
+                series[i].Rate = rt->info[rix].rateCode |
+                        (bf->bf_shpreamble ? rt->info[rix].shortPreamble : 0);
+
+                series[i].Tries = bf->bf_rcs[i].tries;
+
+                series[i].RateFlags = (
+                        (bf->bf_rcs[i].flags & ATH_RC_RTSCTS_FLAG) ?
+                                ATH9K_RATESERIES_RTS_CTS : 0) |
+                        ((bf->bf_rcs[i].flags & ATH_RC_CW40_FLAG) ?
+                                ATH9K_RATESERIES_2040 : 0) |
+                        ((bf->bf_rcs[i].flags & ATH_RC_SGI_FLAG) ?
+                                ATH9K_RATESERIES_HALFGI : 0);
+
+                series[i].PktDuration = ath_pkt_duration(
+                        sc, rix, bf,
+                        (bf->bf_rcs[i].flags & ATH_RC_CW40_FLAG) != 0,
+                        (bf->bf_rcs[i].flags & ATH_RC_SGI_FLAG),
+                        bf->bf_shpreamble);
+
+                if ((an->an_smmode == ATH_SM_PWRSAV_STATIC) &&
+                    (bf->bf_rcs[i].flags & ATH_RC_DS_FLAG) == 0) {
+                        /*
+                         * When sending to an HT node that has enabled static
+                         * SM/MIMO power save, send at single stream rates but
+                         * use maximum allowed transmit chains per user,
+                         * hardware, regulatory, or country limits for
+                         * better range.
+                         */
+                        series[i].ChSel = sc->sc_tx_chainmask;
+                } else {
+                        if (bf->bf_ht)
+                                series[i].ChSel =
+                                        ath_chainmask_sel_logic(sc, an);
+                        else
+                                series[i].ChSel = sc->sc_tx_chainmask;
+                }
+
+                if (rtsctsena)
+                        series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
+
+                /*
+                 * Set RTS for all rates if node is in dynamic powersave
+                 * mode and we are using dual stream rates.
+                 */
+                if (dynamic_mimops && (bf->bf_rcs[i].flags & ATH_RC_DS_FLAG))
+                        series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
+        }
+
+        /*
+         * For non-HT devices, calculate RTS/CTS duration in software
+         * and disable multi-rate retry.
+         */
+        if (flags && !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)) {
+                /*
+                 * Compute the transmit duration based on the frame
+                 * size and the size of an ACK frame.  We call into the
+                 * HAL to do the computation since it depends on the
+                 * characteristics of the actual PHY being used.
+                 *
+                 * NB: CTS is assumed the same size as an ACK so we can
+                 *     use the precalculated ACK durations.
+                 */
+                if (flags & ATH9K_TXDESC_RTSENA) {    /* SIFS + CTS */
+                        ctsduration += bf->bf_shpreamble ?
+                                rt->info[cix].spAckDuration :
+                                rt->info[cix].lpAckDuration;
+                }
+
+                ctsduration += series[0].PktDuration;
+
+                if ((bf->bf_flags & ATH9K_TXDESC_NOACK) == 0) { /* SIFS + ACK */
+                        ctsduration += bf->bf_shpreamble ?
+                                rt->info[rix].spAckDuration :
+                                rt->info[rix].lpAckDuration;
+                }
+
+                /*
+                 * Disable multi-rate retry when using RTS/CTS by clearing
+                 * series 1, 2 and 3.
+                 */
+                memzero(&series[1], sizeof(struct ath9k_11n_rate_series) * 3);
+        }
+
+        /*
+         * set dur_update_en for l-sig computation except for PS-Poll frames
+         */
+        ath9k_hw_set11n_ratescenario(ah, ds, lastds,
+                                    !bf->bf_ispspoll,
+                                    ctsrate,
+                                    ctsduration,
+                                    series, 4, flags);
+        if (sc->sc_config.ath_aggr_prot && flags)
+                ath9k_hw_set11n_burstduration(ah, ds, 8192);
+}
+
+/*
+ * Function to send a normal HT (non-AMPDU) frame
+ * NB: must be called with txq lock held
+ */
+
+static int ath_tx_send_normal(struct ath_softc *sc,
+                              struct ath_txq *txq,
+                              struct ath_atx_tid *tid,
+                              struct list_head *bf_head)
+{
+        struct ath_buf *bf;
+        struct sk_buff *skb;
+        struct ieee80211_tx_info *tx_info;
+        struct ath_tx_info_priv *tx_info_priv;
+
+        BUG_ON(list_empty(bf_head));
+
+        bf = list_first_entry(bf_head, struct ath_buf, list);
+        bf->bf_isampdu = 0; /* regular HT frame */
+
+        skb = (struct sk_buff *)bf->bf_mpdu;
+        tx_info = IEEE80211_SKB_CB(skb);
+        tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0];
+        memcpy(bf->bf_rcs, tx_info_priv->rcs, 4 * sizeof(tx_info_priv->rcs[0]));
+
+        /* update starting sequence number for subsequent ADDBA request */
+        INCR(tid->seq_start, IEEE80211_SEQ_MAX);
+
+        /* Queue to h/w without aggregation */
+        bf->bf_nframes = 1;
+        bf->bf_lastbf = bf->bf_lastfrm; /* one single frame */
+        ath_buf_set_rate(sc, bf);
+        ath_tx_txqaddbuf(sc, txq, bf_head);
+
+        return 0;
+}
+
+/* flush tid's software queue and send frames as non-ampdu's */
+
+static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
+{
+        struct ath_txq *txq = &sc->sc_txq[tid->ac->qnum];
+        struct ath_buf *bf;
+        struct list_head bf_head;
+        INIT_LIST_HEAD(&bf_head);
+
+        ASSERT(tid->paused > 0);
+        spin_lock_bh(&txq->axq_lock);
+
+        tid->paused--;
+
+        if (tid->paused > 0) {
+                spin_unlock_bh(&txq->axq_lock);
+                return;
+        }
+
+        while (!list_empty(&tid->buf_q)) {
+                bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
+                ASSERT(!bf->bf_isretried);
+                list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list);
+                ath_tx_send_normal(sc, txq, tid, &bf_head);
+        }
+
+        spin_unlock_bh(&txq->axq_lock);
+}
+
+/* Completion routine of an aggregate */
+
+static void ath_tx_complete_aggr_rifs(struct ath_softc *sc,
+                                      struct ath_txq *txq,
+                                      struct ath_buf *bf,
+                                      struct list_head *bf_q,
+                                      int txok)
+{
+        struct ath_node *an = bf->bf_node;
+        struct ath_atx_tid *tid = ATH_AN_2_TID(an, bf->bf_tidno);
+        struct ath_buf *bf_last = bf->bf_lastbf;
+        struct ath_desc *ds = bf_last->bf_desc;
+        struct ath_buf *bf_next, *bf_lastq = NULL;
+        struct list_head bf_head, bf_pending;
+        u16 seq_st = 0;
+        u32 ba[WME_BA_BMP_SIZE >> 5];
+        int isaggr, txfail, txpending, sendbar = 0, needreset = 0;
+        int isnodegone = (an->an_flags & ATH_NODE_CLEAN);
+
+        isaggr = bf->bf_isaggr;
+        if (isaggr) {
+                if (txok) {
+                        if (ATH_DS_TX_BA(ds)) {
+                                /*
+                                 * extract starting sequence and
+                                 * block-ack bitmap
+                                 */
+                                seq_st = ATH_DS_BA_SEQ(ds);
+                                memcpy(ba,
+                                        ATH_DS_BA_BITMAP(ds),
+                                        WME_BA_BMP_SIZE >> 3);
+                        } else {
+                                memzero(ba, WME_BA_BMP_SIZE >> 3);
+
+                                /*
+                                 * AR5416 can become deaf/mute when BA
+                                 * issue happens. Chip needs to be reset.
+                                 * But AP code may have sychronization issues
+                                 * when perform internal reset in this routine.
+                                 * Only enable reset in STA mode for now.
+                                 */
+                                if (sc->sc_opmode == ATH9K_M_STA)
+                                        needreset = 1;
+                        }
+                } else {
+                        memzero(ba, WME_BA_BMP_SIZE >> 3);
+                }
+        }
+
+        INIT_LIST_HEAD(&bf_pending);
+        INIT_LIST_HEAD(&bf_head);
+
+        while (bf) {
+                txfail = txpending = 0;
+                bf_next = bf->bf_next;
+
+                if (ATH_BA_ISSET(ba, ATH_BA_INDEX(seq_st, bf->bf_seqno))) {
+                        /* transmit completion, subframe is
+                         * acked by block ack */
+                } else if (!isaggr && txok) {
+                        /* transmit completion */
+                } else {
+
+                        if (!tid->cleanup_inprogress && !isnodegone &&
+                            ds->ds_txstat.ts_flags != ATH9K_TX_SW_ABORTED) {
+                                if (bf->bf_retries < ATH_MAX_SW_RETRIES) {
+                                        ath_tx_set_retry(sc, bf);
+                                        txpending = 1;
+                                } else {
+                                        bf->bf_isxretried = 1;
+                                        txfail = 1;
+                                        sendbar = 1;
+                                }
+                        } else {
+                                /*
+                                 * cleanup in progress, just fail
+                                 * the un-acked sub-frames
+                                 */
+                                txfail = 1;
+                        }
+                }
+                /*
+                 * Remove ath_buf's of this sub-frame from aggregate queue.
+                 */
+                if (bf_next == NULL) {  /* last subframe in the aggregate */
+                        ASSERT(bf->bf_lastfrm == bf_last);
+
+                        /*
+                         * The last descriptor of the last sub frame could be
+                         * a holding descriptor for h/w. If that's the case,
+                         * bf->bf_lastfrm won't be in the bf_q.
+                         * Make sure we handle bf_q properly here.
+                         */
+
+                        if (!list_empty(bf_q)) {
+                                bf_lastq = list_entry(bf_q->prev,
+                                        struct ath_buf, list);
+                                list_cut_position(&bf_head,
+                                        bf_q, &bf_lastq->list);
+                        } else {
+                                /*
+                                 * XXX: if the last subframe only has one
+                                 * descriptor which is also being used as
+                                 * a holding descriptor. Then the ath_buf
+                                 * is not in the bf_q at all.
+                                 */
+                                INIT_LIST_HEAD(&bf_head);
+                        }
+                } else {
+                        ASSERT(!list_empty(bf_q));
+                        list_cut_position(&bf_head,
+                                bf_q, &bf->bf_lastfrm->list);
+                }
+
+                if (!txpending) {
+                        /*
+                         * complete the acked-ones/xretried ones; update
+                         * block-ack window
+                         */
+                        spin_lock_bh(&txq->axq_lock);
+                        ath_tx_update_baw(sc, tid, bf->bf_seqno);
+                        spin_unlock_bh(&txq->axq_lock);
+
+                        /* complete this sub-frame */
+                        ath_tx_complete_buf(sc, bf, &bf_head, !txfail, sendbar);
+                } else {
+                        /*
+                         * retry the un-acked ones
+                         */
+                        /*
+                         * XXX: if the last descriptor is holding descriptor,
+                         * in order to requeue the frame to software queue, we
+                         * need to allocate a new descriptor and
+                         * copy the content of holding descriptor to it.
+                         */
+                        if (bf->bf_next == NULL &&
+                            bf_last->bf_status & ATH_BUFSTATUS_STALE) {
+                                struct ath_buf *tbf;
+
+                                /* allocate new descriptor */
+                                spin_lock_bh(&sc->sc_txbuflock);
+                                ASSERT(!list_empty((&sc->sc_txbuf)));
+                                tbf = list_first_entry(&sc->sc_txbuf,
+                                                struct ath_buf, list);
+                                list_del(&tbf->list);
+                                spin_unlock_bh(&sc->sc_txbuflock);
+
+                                ATH_TXBUF_RESET(tbf);
+
+                                /* copy descriptor content */
+                                tbf->bf_mpdu = bf_last->bf_mpdu;
+                                tbf->bf_node = bf_last->bf_node;
+                                tbf->bf_buf_addr = bf_last->bf_buf_addr;
+                                *(tbf->bf_desc) = *(bf_last->bf_desc);
+
+                                /* link it to the frame */
+                                if (bf_lastq) {
+                                        bf_lastq->bf_desc->ds_link =
+                                                tbf->bf_daddr;
+                                        bf->bf_lastfrm = tbf;
+                                        ath9k_hw_cleartxdesc(sc->sc_ah,
+                                                bf->bf_lastfrm->bf_desc);
+                                } else {
+                                        tbf->bf_state = bf_last->bf_state;
+                                        tbf->bf_lastfrm = tbf;
+                                        ath9k_hw_cleartxdesc(sc->sc_ah,
+                                                tbf->bf_lastfrm->bf_desc);
+
+                                        /* copy the DMA context */
+                                        copy_dma_mem_context(
+                                                get_dma_mem_context(tbf,
+                                                        bf_dmacontext),
+                                                get_dma_mem_context(bf_last,
+                                                        bf_dmacontext));
+                                }
+                                list_add_tail(&tbf->list, &bf_head);
+                        } else {
+                                /*
+                                 * Clear descriptor status words for
+                                 * software retry
+                                 */
+                                ath9k_hw_cleartxdesc(sc->sc_ah,
+                                        bf->bf_lastfrm->bf_desc);
+                        }
+
+                        /*
+                         * Put this buffer to the temporary pending
+                         * queue to retain ordering
+                         */
+                        list_splice_tail_init(&bf_head, &bf_pending);
+                }
+
+                bf = bf_next;
+        }
+
+        /*
+         * node is already gone. no more assocication
+         * with the node. the node might have been freed
+         * any  node acces can result in panic.note tid
+         * is part of the node.
+         */
+        if (isnodegone)
+                return;
+
+        if (tid->cleanup_inprogress) {
+                /* check to see if we're done with cleaning the h/w queue */
+                spin_lock_bh(&txq->axq_lock);
+
+                if (tid->baw_head == tid->baw_tail) {
+                        tid->addba_exchangecomplete = 0;
+                        tid->addba_exchangeattempts = 0;
+                        spin_unlock_bh(&txq->axq_lock);
+
+                        tid->cleanup_inprogress = false;
+
+                        /* send buffered frames as singles */
+                        ath_tx_flush_tid(sc, tid);
+                } else
+                        spin_unlock_bh(&txq->axq_lock);
+
+                return;
+        }
+
+        /*
+         * prepend un-acked frames to the beginning of the pending frame queue
+         */
+        if (!list_empty(&bf_pending)) {
+                spin_lock_bh(&txq->axq_lock);
+                /* Note: we _prepend_, we _do_not_ at to
+                 * the end of the queue ! */
+                list_splice(&bf_pending, &tid->buf_q);
+                ath_tx_queue_tid(txq, tid);
+                spin_unlock_bh(&txq->axq_lock);
+        }
+
+        if (needreset)
+                ath_internal_reset(sc);
+
+        return;
+}
+
+/* Process completed xmit descriptors from the specified queue */
+
+static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_buf *bf, *lastbf, *bf_held = NULL;
+        struct list_head bf_head;
+        struct ath_desc *ds, *tmp_ds;
+        struct sk_buff *skb;
+        struct ieee80211_tx_info *tx_info;
+        struct ath_tx_info_priv *tx_info_priv;
+        int nacked, txok, nbad = 0, isrifs = 0;
+        int status;
+
+        DPRINTF(sc, ATH_DBG_QUEUE,
+                "%s: tx queue %d (%x), link %p\n", __func__,
+                txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum),
+                txq->axq_link);
+
+        nacked = 0;
+        for (;;) {
+                spin_lock_bh(&txq->axq_lock);
+                txq->axq_intrcnt = 0; /* reset periodic desc intr count */
+                if (list_empty(&txq->axq_q)) {
+                        txq->axq_link = NULL;
+                        txq->axq_linkbuf = NULL;
+                        spin_unlock_bh(&txq->axq_lock);
+                        break;
+                }
+                bf = list_first_entry(&txq->axq_q, struct ath_buf, list);
+
+                /*
+                 * There is a race condition that a BH gets scheduled
+                 * after sw writes TxE and before hw re-load the last
+                 * descriptor to get the newly chained one.
+                 * Software must keep the last DONE descriptor as a
+                 * holding descriptor - software does so by marking
+                 * it with the STALE flag.
+                 */
+                bf_held = NULL;
+                if (bf->bf_status & ATH_BUFSTATUS_STALE) {
+                        bf_held = bf;
+                        if (list_is_last(&bf_held->list, &txq->axq_q)) {
+                                /* FIXME:
+                                 * The holding descriptor is the last
+                                 * descriptor in queue. It's safe to remove
+                                 * the last holding descriptor in BH context.
+                                 */
+                                spin_unlock_bh(&txq->axq_lock);
+                                break;
+                        } else {
+                                /* Lets work with the next buffer now */
+                                bf = list_entry(bf_held->list.next,
+                                        struct ath_buf, list);
+                        }
+                }
+
+                lastbf = bf->bf_lastbf;
+                ds = lastbf->bf_desc;    /* NB: last decriptor */
+
+                status = ath9k_hw_txprocdesc(ah, ds);
+                if (status == -EINPROGRESS) {
+                        spin_unlock_bh(&txq->axq_lock);
+                        break;
+                }
+                if (bf->bf_desc == txq->axq_lastdsWithCTS)
+                        txq->axq_lastdsWithCTS = NULL;
+                if (ds == txq->axq_gatingds)
+                        txq->axq_gatingds = NULL;
+
+                /*
+                 * Remove ath_buf's of the same transmit unit from txq,
+                 * however leave the last descriptor back as the holding
+                 * descriptor for hw.
+                 */
+                lastbf->bf_status |= ATH_BUFSTATUS_STALE;
+                INIT_LIST_HEAD(&bf_head);
+
+                if (!list_is_singular(&lastbf->list))
+                        list_cut_position(&bf_head,
+                                &txq->axq_q, lastbf->list.prev);
+
+                txq->axq_depth--;
+
+                if (bf->bf_isaggr)
+                        txq->axq_aggr_depth--;
+
+                txok = (ds->ds_txstat.ts_status == 0);
+
+                spin_unlock_bh(&txq->axq_lock);
+
+                if (bf_held) {
+                        list_del(&bf_held->list);
+                        spin_lock_bh(&sc->sc_txbuflock);
+                        list_add_tail(&bf_held->list, &sc->sc_txbuf);
+                        spin_unlock_bh(&sc->sc_txbuflock);
+                }
+
+                if (!bf->bf_isampdu) {
+                        /*
+                         * This frame is sent out as a single frame.
+                         * Use hardware retry status for this frame.
+                         */
+                        bf->bf_retries = ds->ds_txstat.ts_longretry;
+                        if (ds->ds_txstat.ts_status & ATH9K_TXERR_XRETRY)
+                                bf->bf_isxretried = 1;
+                        nbad = 0;
+                } else {
+                        nbad = ath_tx_num_badfrms(sc, bf, txok);
+                }
+                skb = bf->bf_mpdu;
+                tx_info = IEEE80211_SKB_CB(skb);
+                tx_info_priv = (struct ath_tx_info_priv *)
+                        tx_info->driver_data[0];
+                if (ds->ds_txstat.ts_status & ATH9K_TXERR_FILT)
+                        tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
+                if ((ds->ds_txstat.ts_status & ATH9K_TXERR_FILT) == 0 &&
+                                (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0) {
+                        if (ds->ds_txstat.ts_status == 0)
+                                nacked++;
+
+                        if (bf->bf_isdata) {
+                                if (isrifs)
+                                        tmp_ds = bf->bf_rifslast->bf_desc;
+                                else
+                                        tmp_ds = ds;
+                                memcpy(&tx_info_priv->tx,
+                                        &tmp_ds->ds_txstat,
+                                        sizeof(tx_info_priv->tx));
+                                tx_info_priv->n_frames = bf->bf_nframes;
+                                tx_info_priv->n_bad_frames = nbad;
+                        }
+                }
+
+                /*
+                 * Complete this transmit unit
+                 */
+                if (bf->bf_isampdu)
+                        ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, txok);
+                else
+                        ath_tx_complete_buf(sc, bf, &bf_head, txok, 0);
+
+                /* Wake up mac80211 queue */
+
+                spin_lock_bh(&txq->axq_lock);
+                if (txq->stopped && ath_txq_depth(sc, txq->axq_qnum) <=
+                                (ATH_TXBUF - 20)) {
+                        int qnum;
+                        qnum = ath_get_mac80211_qnum(txq->axq_qnum, sc);
+                        if (qnum != -1) {
+                                ieee80211_wake_queue(sc->hw, qnum);
+                                txq->stopped = 0;
+                        }
+
+                }
+
+                /*
+                 * schedule any pending packets if aggregation is enabled
+                 */
+                if (sc->sc_txaggr)
+                        ath_txq_schedule(sc, txq);
+                spin_unlock_bh(&txq->axq_lock);
+        }
+        return nacked;
+}
+
+static void ath_tx_stopdma(struct ath_softc *sc, struct ath_txq *txq)
+{
+        struct ath_hal *ah = sc->sc_ah;
+
+        (void) ath9k_hw_stoptxdma(ah, txq->axq_qnum);
+        DPRINTF(sc, ATH_DBG_XMIT, "%s: tx queue [%u] %x, link %p\n",
+                __func__, txq->axq_qnum,
+                ath9k_hw_gettxbuf(ah, txq->axq_qnum), txq->axq_link);
+}
+
+/* Drain only the data queues */
+
+static void ath_drain_txdataq(struct ath_softc *sc, bool retry_tx)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        int i;
+        int npend = 0;
+        enum ath9k_ht_macmode ht_macmode = ath_cwm_macmode(sc);
+
+        /* XXX return value */
+        if (!sc->sc_invalid) {
+                for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+                        if (ATH_TXQ_SETUP(sc, i)) {
+                                ath_tx_stopdma(sc, &sc->sc_txq[i]);
+
+                                /* The TxDMA may not really be stopped.
+                                 * Double check the hal tx pending count */
+                                npend += ath9k_hw_numtxpending(ah,
+                                        sc->sc_txq[i].axq_qnum);
+                        }
+                }
+        }
+
+        if (npend) {
+                int status;
+
+                /* TxDMA not stopped, reset the hal */
+                DPRINTF(sc, ATH_DBG_XMIT,
+                        "%s: Unable to stop TxDMA. Reset HAL!\n", __func__);
+
+                spin_lock_bh(&sc->sc_resetlock);
+                if (!ath9k_hw_reset(ah, sc->sc_opmode,
+                        &sc->sc_curchan, ht_macmode,
+                        sc->sc_tx_chainmask, sc->sc_rx_chainmask,
+                        sc->sc_ht_extprotspacing, true, &status)) {
+
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: unable to reset hardware; hal status %u\n",
+                                __func__,
+                                status);
+                }
+                spin_unlock_bh(&sc->sc_resetlock);
+        }
+
+        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+                if (ATH_TXQ_SETUP(sc, i))
+                        ath_tx_draintxq(sc, &sc->sc_txq[i], retry_tx);
+        }
+}
+
+/* Add a sub-frame to block ack window */
+
+static void ath_tx_addto_baw(struct ath_softc *sc,
+                             struct ath_atx_tid *tid,
+                             struct ath_buf *bf)
+{
+        int index, cindex;
+
+        if (bf->bf_isretried)
+                return;
+
+        index  = ATH_BA_INDEX(tid->seq_start, bf->bf_seqno);
+        cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
+
+        ASSERT(tid->tx_buf[cindex] == NULL);
+        tid->tx_buf[cindex] = bf;
+
+        if (index >= ((tid->baw_tail - tid->baw_head) &
+                (ATH_TID_MAX_BUFS - 1))) {
+                tid->baw_tail = cindex;
+                INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
+        }
+}
+
+/*
+ * Function to send an A-MPDU
+ * NB: must be called with txq lock held
+ */
+
+static int ath_tx_send_ampdu(struct ath_softc *sc,
+                             struct ath_txq *txq,
+                             struct ath_atx_tid *tid,
+                             struct list_head *bf_head,
+                             struct ath_tx_control *txctl)
+{
+        struct ath_buf *bf;
+        struct sk_buff *skb;
+        struct ieee80211_tx_info *tx_info;
+        struct ath_tx_info_priv *tx_info_priv;
+
+        BUG_ON(list_empty(bf_head));
+
+        bf = list_first_entry(bf_head, struct ath_buf, list);
+        bf->bf_isampdu = 1;
+        bf->bf_seqno = txctl->seqno; /* save seqno and tidno in buffer */
+        bf->bf_tidno = txctl->tidno;
+
+        /*
+         * Do not queue to h/w when any of the following conditions is true:
+         * - there are pending frames in software queue
+         * - the TID is currently paused for ADDBA/BAR request
+         * - seqno is not within block-ack window
+         * - h/w queue depth exceeds low water mark
+         */
+        if (!list_empty(&tid->buf_q) || tid->paused ||
+            !BAW_WITHIN(tid->seq_start, tid->baw_size, bf->bf_seqno) ||
+            txq->axq_depth >= ATH_AGGR_MIN_QDEPTH) {
+                /*
+                 * Add this frame to software queue for scheduling later
+                 * for aggregation.
+                 */
+                list_splice_tail_init(bf_head, &tid->buf_q);
+                ath_tx_queue_tid(txq, tid);
+                return 0;
+        }
+
+        skb = (struct sk_buff *)bf->bf_mpdu;
+        tx_info = IEEE80211_SKB_CB(skb);
+        tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0];
+        memcpy(bf->bf_rcs, tx_info_priv->rcs, 4 * sizeof(tx_info_priv->rcs[0]));
+
+        /* Add sub-frame to BAW */
+        ath_tx_addto_baw(sc, tid, bf);
+
+        /* Queue to h/w without aggregation */
+        bf->bf_nframes = 1;
+        bf->bf_lastbf = bf->bf_lastfrm; /* one single frame */
+        ath_buf_set_rate(sc, bf);
+        ath_tx_txqaddbuf(sc, txq, bf_head);
+        return 0;
+}
+
+/*
+ * looks up the rate
+ * returns aggr limit based on lowest of the rates
+ */
+
+static u32 ath_lookup_rate(struct ath_softc *sc,
+                                 struct ath_buf *bf)
+{
+        const struct ath9k_rate_table *rt = sc->sc_currates;
+        struct sk_buff *skb;
+        struct ieee80211_tx_info *tx_info;
+        struct ath_tx_info_priv *tx_info_priv;
+        u32 max_4ms_framelen, frame_length;
+        u16 aggr_limit, legacy = 0, maxampdu;
+        int i;
+
+
+        skb = (struct sk_buff *)bf->bf_mpdu;
+        tx_info = IEEE80211_SKB_CB(skb);
+        tx_info_priv = (struct ath_tx_info_priv *)
+                tx_info->driver_data[0];
+        memcpy(bf->bf_rcs,
+                tx_info_priv->rcs, 4 * sizeof(tx_info_priv->rcs[0]));
+
+        /*
+         * Find the lowest frame length among the rate series that will have a
+         * 4ms transmit duration.
+         * TODO - TXOP limit needs to be considered.
+         */
+        max_4ms_framelen = ATH_AMPDU_LIMIT_MAX;
+
+        for (i = 0; i < 4; i++) {
+                if (bf->bf_rcs[i].tries) {
+                        frame_length = bf->bf_rcs[i].max_4ms_framelen;
+
+                        if (rt->info[bf->bf_rcs[i].rix].phy != PHY_HT) {
+                                legacy = 1;
+                                break;
+                        }
+
+                        max_4ms_framelen = min(max_4ms_framelen, frame_length);
+                }
+        }
+
+        /*
+         * limit aggregate size by the minimum rate if rate selected is
+         * not a probe rate, if rate selected is a probe rate then
+         * avoid aggregation of this packet.
+         */
+        if (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE || legacy)
+                return 0;
+
+        aggr_limit = min(max_4ms_framelen,
+                (u32)ATH_AMPDU_LIMIT_DEFAULT);
+
+        /*
+         * h/w can accept aggregates upto 16 bit lengths (65535).
+         * The IE, however can hold upto 65536, which shows up here
+         * as zero. Ignore 65536 since we  are constrained by hw.
+         */
+        maxampdu = sc->sc_ht_info.maxampdu;
+        if (maxampdu)
+                aggr_limit = min(aggr_limit, maxampdu);
+
+        return aggr_limit;
+}
+
+/*
+ * returns the number of delimiters to be added to
+ * meet the minimum required mpdudensity.
+ * caller should make sure that the rate is  HT rate .
+ */
+
+static int ath_compute_num_delims(struct ath_softc *sc,
+                                  struct ath_buf *bf,
+                                  u16 frmlen)
+{
+        const struct ath9k_rate_table *rt = sc->sc_currates;
+        u32 nsymbits, nsymbols, mpdudensity;
+        u16 minlen;
+        u8 rc, flags, rix;
+        int width, half_gi, ndelim, mindelim;
+
+        /* Select standard number of delimiters based on frame length alone */
+        ndelim = ATH_AGGR_GET_NDELIM(frmlen);
+
+        /*
+         * If encryption enabled, hardware requires some more padding between
+         * subframes.
+         * TODO - this could be improved to be dependent on the rate.
+         *      The hardware can keep up at lower rates, but not higher rates
+         */
+        if (bf->bf_keytype != ATH9K_KEY_TYPE_CLEAR)
+                ndelim += ATH_AGGR_ENCRYPTDELIM;
+
+        /*
+         * Convert desired mpdu density from microeconds to bytes based
+         * on highest rate in rate series (i.e. first rate) to determine
+         * required minimum length for subframe. Take into account
+         * whether high rate is 20 or 40Mhz and half or full GI.
+         */
+        mpdudensity = sc->sc_ht_info.mpdudensity;
+
+        /*
+         * If there is no mpdu density restriction, no further calculation
+         * is needed.
+         */
+        if (mpdudensity == 0)
+                return ndelim;
+
+        rix = bf->bf_rcs[0].rix;
+        flags = bf->bf_rcs[0].flags;
+        rc = rt->info[rix].rateCode;
+        width = (flags & ATH_RC_CW40_FLAG) ? 1 : 0;
+        half_gi = (flags & ATH_RC_SGI_FLAG) ? 1 : 0;
+
+        if (half_gi)
+                nsymbols = NUM_SYMBOLS_PER_USEC_HALFGI(mpdudensity);
+        else
+                nsymbols = NUM_SYMBOLS_PER_USEC(mpdudensity);
+
+        if (nsymbols == 0)
+                nsymbols = 1;
+
+        nsymbits = bits_per_symbol[HT_RC_2_MCS(rc)][width];
+        minlen = (nsymbols * nsymbits) / BITS_PER_BYTE;
+
+        /* Is frame shorter than required minimum length? */
+        if (frmlen < minlen) {
+                /* Get the minimum number of delimiters required. */
+                mindelim = (minlen - frmlen) / ATH_AGGR_DELIM_SZ;
+                ndelim = max(mindelim, ndelim);
+        }
+
+        return ndelim;
+}
+
+/*
+ * For aggregation from software buffer queue.
+ * NB: must be called with txq lock held
+ */
+
+static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
+                                        struct ath_atx_tid *tid,
+                                        struct list_head *bf_q,
+                                        struct ath_buf **bf_last,
+                                        struct aggr_rifs_param *param,
+                                        int *prev_frames)
+{
+#define PADBYTES(_len) ((4 - ((_len) % 4)) % 4)
+        struct ath_buf *bf, *tbf, *bf_first, *bf_prev = NULL;
+        struct list_head bf_head;
+        int rl = 0, nframes = 0, ndelim;
+        u16 aggr_limit = 0, al = 0, bpad = 0,
+                al_delta, h_baw = tid->baw_size / 2;
+        enum ATH_AGGR_STATUS status = ATH_AGGR_DONE;
+        int prev_al = 0, is_ds_rate = 0;
+        INIT_LIST_HEAD(&bf_head);
+
+        BUG_ON(list_empty(&tid->buf_q));
+
+        bf_first = list_first_entry(&tid->buf_q, struct ath_buf, list);
+
+        do {
+                bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
+
+                /*
+                 * do not step over block-ack window
+                 */
+                if (!BAW_WITHIN(tid->seq_start, tid->baw_size, bf->bf_seqno)) {
+                        status = ATH_AGGR_BAW_CLOSED;
+                        break;
+                }
+
+                if (!rl) {
+                        aggr_limit = ath_lookup_rate(sc, bf);
+                        rl = 1;
+                        /*
+                         * Is rate dual stream
+                         */
+                        is_ds_rate =
+                                (bf->bf_rcs[0].flags & ATH_RC_DS_FLAG) ? 1 : 0;
+                }
+
+                /*
+                 * do not exceed aggregation limit
+                 */
+                al_delta = ATH_AGGR_DELIM_SZ + bf->bf_frmlen;
+
+                if (nframes && (aggr_limit <
+                        (al + bpad + al_delta + prev_al))) {
+                        status = ATH_AGGR_LIMITED;
+                        break;
+                }
+
+                /*
+                 * do not exceed subframe limit
+                 */
+                if ((nframes + *prev_frames) >=
+                    min((int)h_baw, ATH_AMPDU_SUBFRAME_DEFAULT)) {
+                        status = ATH_AGGR_LIMITED;
+                        break;
+                }
+
+                /*
+                 * add padding for previous frame to aggregation length
+                 */
+                al += bpad + al_delta;
+
+                /*
+                 * Get the delimiters needed to meet the MPDU
+                 * density for this node.
+                 */
+                ndelim = ath_compute_num_delims(sc, bf_first, bf->bf_frmlen);
+
+                bpad = PADBYTES(al_delta) + (ndelim << 2);
+
+                bf->bf_next = NULL;
+                bf->bf_lastfrm->bf_desc->ds_link = 0;
+
+                /*
+                 * this packet is part of an aggregate
+                 * - remove all descriptors belonging to this frame from
+                 *   software queue
+                 * - add it to block ack window
+                 * - set up descriptors for aggregation
+                 */
+                list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list);
+                ath_tx_addto_baw(sc, tid, bf);
+
+                list_for_each_entry(tbf, &bf_head, list) {
+                        ath9k_hw_set11n_aggr_middle(sc->sc_ah,
+                                tbf->bf_desc, ndelim);
+                }
+
+                /*
+                 * link buffers of this frame to the aggregate
+                 */
+                list_splice_tail_init(&bf_head, bf_q);
+                nframes++;
+
+                if (bf_prev) {
+                        bf_prev->bf_next = bf;
+                        bf_prev->bf_lastfrm->bf_desc->ds_link = bf->bf_daddr;
+                }
+                bf_prev = bf;
+
+#ifdef AGGR_NOSHORT
+                /*
+                 * terminate aggregation on a small packet boundary
+                 */
+                if (bf->bf_frmlen < ATH_AGGR_MINPLEN) {
+                        status = ATH_AGGR_SHORTPKT;
+                        break;
+                }
+#endif
+        } while (!list_empty(&tid->buf_q));
+
+        bf_first->bf_al = al;
+        bf_first->bf_nframes = nframes;
+        *bf_last = bf_prev;
+        return status;
+#undef PADBYTES
+}
+
+/*
+ * process pending frames possibly doing a-mpdu aggregation
+ * NB: must be called with txq lock held
+ */
+
+static void ath_tx_sched_aggr(struct ath_softc *sc,
+        struct ath_txq *txq, struct ath_atx_tid *tid)
+{
+        struct ath_buf *bf, *tbf, *bf_last, *bf_lastaggr = NULL;
+        enum ATH_AGGR_STATUS status;
+        struct list_head bf_q;
+        struct aggr_rifs_param param = {0, 0, 0, 0, NULL};
+        int prev_frames = 0;
+
+        do {
+                if (list_empty(&tid->buf_q))
+                        return;
+
+                INIT_LIST_HEAD(&bf_q);
+
+                status = ath_tx_form_aggr(sc, tid, &bf_q, &bf_lastaggr, &param,
+                                          &prev_frames);
+
+                /*
+                 * no frames picked up to be aggregated; block-ack
+                 * window is not open
+                 */
+                if (list_empty(&bf_q))
+                        break;
+
+                bf = list_first_entry(&bf_q, struct ath_buf, list);
+                bf_last = list_entry(bf_q.prev, struct ath_buf, list);
+                bf->bf_lastbf = bf_last;
+
+                /*
+                 * if only one frame, send as non-aggregate
+                 */
+                if (bf->bf_nframes == 1) {
+                        ASSERT(bf->bf_lastfrm == bf_last);
+
+                        bf->bf_isaggr = 0;
+                        /*
+                         * clear aggr bits for every descriptor
+                         * XXX TODO: is there a way to optimize it?
+                         */
+                        list_for_each_entry(tbf, &bf_q, list) {
+                                ath9k_hw_clr11n_aggr(sc->sc_ah, tbf->bf_desc);
+                        }
+
+                        ath_buf_set_rate(sc, bf);
+                        ath_tx_txqaddbuf(sc, txq, &bf_q);
+                        continue;
+                }
+
+                /*
+                 * setup first desc with rate and aggr info
+                 */
+                bf->bf_isaggr  = 1;
+                ath_buf_set_rate(sc, bf);
+                ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al);
+
+                /*
+                 * anchor last frame of aggregate correctly
+                 */
+                ASSERT(bf_lastaggr);
+                ASSERT(bf_lastaggr->bf_lastfrm == bf_last);
+                tbf = bf_lastaggr;
+                ath9k_hw_set11n_aggr_last(sc->sc_ah, tbf->bf_desc);
+
+                /* XXX: We don't enter into this loop, consider removing this */
+                while (!list_empty(&bf_q) && !list_is_last(&tbf->list, &bf_q)) {
+                        tbf = list_entry(tbf->list.next, struct ath_buf, list);
+                        ath9k_hw_set11n_aggr_last(sc->sc_ah, tbf->bf_desc);
+                }
+
+                txq->axq_aggr_depth++;
+
+                /*
+                 * Normal aggregate, queue to hardware
+                 */
+                ath_tx_txqaddbuf(sc, txq, &bf_q);
+
+        } while (txq->axq_depth < ATH_AGGR_MIN_QDEPTH &&
+                 status != ATH_AGGR_BAW_CLOSED);
+}
+
+/* Called with txq lock held */
+
+static void ath_tid_drain(struct ath_softc *sc,
+                          struct ath_txq *txq,
+                          struct ath_atx_tid *tid,
+                          bool bh_flag)
+{
+        struct ath_buf *bf;
+        struct list_head bf_head;
+        INIT_LIST_HEAD(&bf_head);
+
+        for (;;) {
+                if (list_empty(&tid->buf_q))
+                        break;
+                bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
+
+                list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list);
+
+                /* update baw for software retried frame */
+                if (bf->bf_isretried)
+                        ath_tx_update_baw(sc, tid, bf->bf_seqno);
+
+                /*
+                 * do not indicate packets while holding txq spinlock.
+                 * unlock is intentional here
+                 */
+                if (likely(bh_flag))
+                        spin_unlock_bh(&txq->axq_lock);
+                else
+                        spin_unlock(&txq->axq_lock);
+
+                /* complete this sub-frame */
+                ath_tx_complete_buf(sc, bf, &bf_head, 0, 0);
+
+                if (likely(bh_flag))
+                        spin_lock_bh(&txq->axq_lock);
+                else
+                        spin_lock(&txq->axq_lock);
+        }
+
+        /*
+         * TODO: For frame(s) that are in the retry state, we will reuse the
+         * sequence number(s) without setting the retry bit. The
+         * alternative is to give up on these and BAR the receiver's window
+         * forward.
+         */
+        tid->seq_next = tid->seq_start;
+        tid->baw_tail = tid->baw_head;
+}
+
+/*
+ * Drain all pending buffers
+ * NB: must be called with txq lock held
+ */
+
+static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
+                                          struct ath_txq *txq,
+                                          bool bh_flag)
+{
+        struct ath_atx_ac *ac, *ac_tmp;
+        struct ath_atx_tid *tid, *tid_tmp;
+
+        list_for_each_entry_safe(ac, ac_tmp, &txq->axq_acq, list) {
+                list_del(&ac->list);
+                ac->sched = false;
+                list_for_each_entry_safe(tid, tid_tmp, &ac->tid_q, list) {
+                        list_del(&tid->list);
+                        tid->sched = false;
+                        ath_tid_drain(sc, txq, tid, bh_flag);
+                }
+        }
+}
+
+static int ath_tx_start_dma(struct ath_softc *sc,
+                            struct sk_buff *skb,
+                            struct scatterlist *sg,
+                            u32 n_sg,
+                            struct ath_tx_control *txctl)
+{
+        struct ath_node *an = txctl->an;
+        struct ath_buf *bf = NULL;
+        struct list_head bf_head;
+        struct ath_desc *ds;
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath_txq *txq = &sc->sc_txq[txctl->qnum];
+        struct ath_tx_info_priv *tx_info_priv;
+        struct ath_rc_series *rcs;
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+        struct ieee80211_tx_info *tx_info =  IEEE80211_SKB_CB(skb);
+        __le16 fc = hdr->frame_control;
+
+        /* For each sglist entry, allocate an ath_buf for DMA */
+        INIT_LIST_HEAD(&bf_head);
+        spin_lock_bh(&sc->sc_txbuflock);
+        if (unlikely(list_empty(&sc->sc_txbuf))) {
+                spin_unlock_bh(&sc->sc_txbuflock);
+                return -ENOMEM;
+        }
+
+        bf = list_first_entry(&sc->sc_txbuf, struct ath_buf, list);
+        list_del(&bf->list);
+        spin_unlock_bh(&sc->sc_txbuflock);
+
+        list_add_tail(&bf->list, &bf_head);
+
+        /* set up this buffer */
+        ATH_TXBUF_RESET(bf);
+        bf->bf_frmlen = txctl->frmlen;
+        bf->bf_isdata = ieee80211_is_data(fc);
+        bf->bf_isbar = ieee80211_is_back_req(fc);
+        bf->bf_ispspoll = ieee80211_is_pspoll(fc);
+        bf->bf_flags = txctl->flags;
+        bf->bf_shpreamble = sc->sc_flags & ATH_PREAMBLE_SHORT;
+        bf->bf_keytype = txctl->keytype;
+        tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0];
+        rcs = tx_info_priv->rcs;
+        bf->bf_rcs[0] = rcs[0];
+        bf->bf_rcs[1] = rcs[1];
+        bf->bf_rcs[2] = rcs[2];
+        bf->bf_rcs[3] = rcs[3];
+        bf->bf_node = an;
+        bf->bf_mpdu = skb;
+        bf->bf_buf_addr = sg_dma_address(sg);
+
+        /* setup descriptor */
+        ds = bf->bf_desc;
+        ds->ds_link = 0;
+        ds->ds_data = bf->bf_buf_addr;
+
+        /*
+         * Save the DMA context in the first ath_buf
+         */
+        copy_dma_mem_context(get_dma_mem_context(bf, bf_dmacontext),
+                             get_dma_mem_context(txctl, dmacontext));
+
+        /*
+         * Formulate first tx descriptor with tx controls.
+         */
+        ath9k_hw_set11n_txdesc(ah,
+                               ds,
+                               bf->bf_frmlen, /* frame length */
+                               txctl->atype, /* Atheros packet type */
+                               min(txctl->txpower, (u16)60), /* txpower */
+                               txctl->keyix,            /* key cache index */
+                               txctl->keytype,          /* key type */
+                               txctl->flags);           /* flags */
+        ath9k_hw_filltxdesc(ah,
+                            ds,
+                            sg_dma_len(sg),     /* segment length */
+                            true,            /* first segment */
+                            (n_sg == 1) ? true : false, /* last segment */
+                            ds);                /* first descriptor */
+
+        bf->bf_lastfrm = bf;
+        bf->bf_ht = txctl->ht;
+
+        spin_lock_bh(&txq->axq_lock);
+
+        if (txctl->ht && sc->sc_txaggr) {
+                struct ath_atx_tid *tid = ATH_AN_2_TID(an, txctl->tidno);
+                if (ath_aggr_query(sc, an, txctl->tidno)) {
+                        /*
+                         * Try aggregation if it's a unicast data frame
+                         * and the destination is HT capable.
+                         */
+                        ath_tx_send_ampdu(sc, txq, tid, &bf_head, txctl);
+                } else {
+                        /*
+                         * Send this frame as regular when ADDBA exchange
+                         * is neither complete nor pending.
+                         */
+                        ath_tx_send_normal(sc, txq, tid, &bf_head);
+                }
+        } else {
+                bf->bf_lastbf = bf;
+                bf->bf_nframes = 1;
+                ath_buf_set_rate(sc, bf);
+
+                if (ieee80211_is_back_req(fc)) {
+                        /* This is required for resuming tid
+                         * during BAR completion */
+                        bf->bf_tidno = txctl->tidno;
+                }
+
+                if (is_multicast_ether_addr(hdr->addr1)) {
+                        struct ath_vap *avp = sc->sc_vaps[txctl->if_id];
+
+                        /*
+                         * When servicing one or more stations in power-save
+                         * mode (or) if there is some mcast data waiting on
+                         * mcast queue (to prevent out of order delivery of
+                         * mcast,bcast packets) multicast frames must be
+                         * buffered until after the beacon. We use the private
+                         * mcast queue for that.
+                         */
+                        /* XXX? more bit in 802.11 frame header */
+                        spin_lock_bh(&avp->av_mcastq.axq_lock);
+                        if (txctl->ps || avp->av_mcastq.axq_depth)
+                                ath_tx_mcastqaddbuf(sc,
+                                        &avp->av_mcastq, &bf_head);
+                        else
+                                ath_tx_txqaddbuf(sc, txq, &bf_head);
+                        spin_unlock_bh(&avp->av_mcastq.axq_lock);
+                } else
+                        ath_tx_txqaddbuf(sc, txq, &bf_head);
+        }
+        spin_unlock_bh(&txq->axq_lock);
+        return 0;
+}
+
+static void xmit_map_sg(struct ath_softc *sc,
+                        struct sk_buff *skb,
+                        dma_addr_t *pa,
+                        struct ath_tx_control *txctl)
+{
+        struct ath_xmit_status tx_status;
+        struct ath_atx_tid *tid;
+        struct scatterlist sg;
+
+        *pa = pci_map_single(sc->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
+
+        /* setup S/G list */
+        memset(&sg, 0, sizeof(struct scatterlist));
+        sg_dma_address(&sg) = *pa;
+        sg_dma_len(&sg) = skb->len;
+
+        if (ath_tx_start_dma(sc, skb, &sg, 1, txctl) != 0) {
+                /*
+                 *  We have to do drop frame here.
+                 */
+                pci_unmap_single(sc->pdev, *pa, skb->len, PCI_DMA_TODEVICE);
+
+                tx_status.retries = 0;
+                tx_status.flags = ATH_TX_ERROR;
+
+                if (txctl->ht && sc->sc_txaggr) {
+                        /* Reclaim the seqno. */
+                        tid = ATH_AN_2_TID((struct ath_node *)
+                                txctl->an, txctl->tidno);
+                        DECR(tid->seq_next, IEEE80211_SEQ_MAX);
+                }
+                ath_tx_complete(sc, skb, &tx_status, txctl->an);
+        }
+}
+
+/* Initialize TX queue and h/w */
+
+int ath_tx_init(struct ath_softc *sc, int nbufs)
+{
+        int error = 0;
+
+        do {
+                spin_lock_init(&sc->sc_txbuflock);
+
+                /* Setup tx descriptors */
+                error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf,
+                        "tx", nbufs * ATH_FRAG_PER_MSDU, ATH_TXDESC);
+                if (error != 0) {
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: failed to allocate tx descriptors: %d\n",
+                                __func__, error);
+                        break;
+                }
+
+                /* XXX allocate beacon state together with vap */
+                error = ath_descdma_setup(sc, &sc->sc_bdma, &sc->sc_bbuf,
+                                          "beacon", ATH_BCBUF, 1);
+                if (error != 0) {
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: failed to allocate "
+                                "beacon descripotrs: %d\n",
+                                __func__, error);
+                        break;
+                }
+
+        } while (0);
+
+        if (error != 0)
+                ath_tx_cleanup(sc);
+
+        return error;
+}
+
+/* Reclaim all tx queue resources */
+
+int ath_tx_cleanup(struct ath_softc *sc)
+{
+        /* cleanup beacon descriptors */
+        if (sc->sc_bdma.dd_desc_len != 0)
+                ath_descdma_cleanup(sc, &sc->sc_bdma, &sc->sc_bbuf);
+
+        /* cleanup tx descriptors */
+        if (sc->sc_txdma.dd_desc_len != 0)
+                ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf);
+
+        return 0;
+}
+
+/* Setup a h/w transmit queue */
+
+struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        struct ath9k_tx_queue_info qi;
+        int qnum;
+
+        memzero(&qi, sizeof(qi));
+        qi.tqi_subtype = subtype;
+        qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT;
+        qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT;
+        qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT;
+        qi.tqi_physCompBuf = 0;
+
+        /*
+         * Enable interrupts only for EOL and DESC conditions.
+         * We mark tx descriptors to receive a DESC interrupt
+         * when a tx queue gets deep; otherwise waiting for the
+         * EOL to reap descriptors.  Note that this is done to
+         * reduce interrupt load and this only defers reaping
+         * descriptors, never transmitting frames.  Aside from
+         * reducing interrupts this also permits more concurrency.
+         * The only potential downside is if the tx queue backs
+         * up in which case the top half of the kernel may backup
+         * due to a lack of tx descriptors.
+         *
+         * The UAPSD queue is an exception, since we take a desc-
+         * based intr on the EOSP frames.
+         */
+        if (qtype == ATH9K_TX_QUEUE_UAPSD)
+                qi.tqi_qflags = TXQ_FLAG_TXDESCINT_ENABLE;
+        else
+                qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE |
+                        TXQ_FLAG_TXDESCINT_ENABLE;
+        qnum = ath9k_hw_setuptxqueue(ah, qtype, &qi);
+        if (qnum == -1) {
+                /*
+                 * NB: don't print a message, this happens
+                 * normally on parts with too few tx queues
+                 */
+                return NULL;
+        }
+        if (qnum >= ARRAY_SIZE(sc->sc_txq)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: hal qnum %u out of range, max %u!\n",
+                        __func__, qnum, (unsigned int)ARRAY_SIZE(sc->sc_txq));
+                ath9k_hw_releasetxqueue(ah, qnum);
+                return NULL;
+        }
+        if (!ATH_TXQ_SETUP(sc, qnum)) {
+                struct ath_txq *txq = &sc->sc_txq[qnum];
+
+                txq->axq_qnum = qnum;
+                txq->axq_link = NULL;
+                INIT_LIST_HEAD(&txq->axq_q);
+                INIT_LIST_HEAD(&txq->axq_acq);
+                spin_lock_init(&txq->axq_lock);
+                txq->axq_depth = 0;
+                txq->axq_aggr_depth = 0;
+                txq->axq_totalqueued = 0;
+                txq->axq_intrcnt = 0;
+                txq->axq_linkbuf = NULL;
+                sc->sc_txqsetup |= 1<<qnum;
+        }
+        return &sc->sc_txq[qnum];
+}
+
+/* Reclaim resources for a setup queue */
+
+void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq)
+{
+        ath9k_hw_releasetxqueue(sc->sc_ah, txq->axq_qnum);
+        sc->sc_txqsetup &= ~(1<<txq->axq_qnum);
+}
+
+/*
+ * Setup a hardware data transmit queue for the specified
+ * access control.  The hal may not support all requested
+ * queues in which case it will return a reference to a
+ * previously setup queue.  We record the mapping from ac's
+ * to h/w queues for use by ath_tx_start and also track
+ * the set of h/w queues being used to optimize work in the
+ * transmit interrupt handler and related routines.
+ */
+
+int ath_tx_setup(struct ath_softc *sc, int haltype)
+{
+        struct ath_txq *txq;
+
+        if (haltype >= ARRAY_SIZE(sc->sc_haltype2q)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: HAL AC %u out of range, max %zu!\n",
+                        __func__, haltype, ARRAY_SIZE(sc->sc_haltype2q));
+                return 0;
+        }
+        txq = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, haltype);
+        if (txq != NULL) {
+                sc->sc_haltype2q[haltype] = txq->axq_qnum;
+                return 1;
+        } else
+                return 0;
+}
+
+int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype)
+{
+        int qnum;
+
+        switch (qtype) {
+        case ATH9K_TX_QUEUE_DATA:
+                if (haltype >= ARRAY_SIZE(sc->sc_haltype2q)) {
+                        DPRINTF(sc, ATH_DBG_FATAL,
+                                "%s: HAL AC %u out of range, max %zu!\n",
+                                __func__,
+                                haltype, ARRAY_SIZE(sc->sc_haltype2q));
+                        return -1;
+                }
+                qnum = sc->sc_haltype2q[haltype];
+                break;
+        case ATH9K_TX_QUEUE_BEACON:
+                qnum = sc->sc_bhalq;
+                break;
+        case ATH9K_TX_QUEUE_CAB:
+                qnum = sc->sc_cabq->axq_qnum;
+                break;
+        default:
+                qnum = -1;
+        }
+        return qnum;
+}
+
+/* Update parameters for a transmit queue */
+
+int ath_txq_update(struct ath_softc *sc, int qnum,
+                   struct ath9k_tx_queue_info *qinfo)
+{
+        struct ath_hal *ah = sc->sc_ah;
+        int error = 0;
+        struct ath9k_tx_queue_info qi;
+
+        if (qnum == sc->sc_bhalq) {
+                /*
+                 * XXX: for beacon queue, we just save the parameter.
+                 * It will be picked up by ath_beaconq_config when
+                 * it's necessary.
+                 */
+                sc->sc_beacon_qi = *qinfo;
+                return 0;
+        }
+
+        ASSERT(sc->sc_txq[qnum].axq_qnum == qnum);
+
+        ath9k_hw_get_txq_props(ah, qnum, &qi);
+        qi.tqi_aifs = qinfo->tqi_aifs;
+        qi.tqi_cwmin = qinfo->tqi_cwmin;
+        qi.tqi_cwmax = qinfo->tqi_cwmax;
+        qi.tqi_burstTime = qinfo->tqi_burstTime;
+        qi.tqi_readyTime = qinfo->tqi_readyTime;
+
+        if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {
+                DPRINTF(sc, ATH_DBG_FATAL,
+                        "%s: unable to update hardware queue %u!\n",
+                        __func__, qnum);
+                error = -EIO;
+        } else {
+                ath9k_hw_resettxqueue(ah, qnum); /* push to h/w */
+        }
+
+        return error;
+}
+
+int ath_cabq_update(struct ath_softc *sc)
+{
+        struct ath9k_tx_queue_info qi;
+        int qnum = sc->sc_cabq->axq_qnum;
+        struct ath_beacon_config conf;
+
+        ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi);
+        /*
+         * Ensure the readytime % is within the bounds.
+         */
+        if (sc->sc_config.cabqReadytime < ATH9K_READY_TIME_LO_BOUND)
+                sc->sc_config.cabqReadytime = ATH9K_READY_TIME_LO_BOUND;
+        else if (sc->sc_config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND)
+                sc->sc_config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND;
+
+        ath_get_beaconconfig(sc, ATH_IF_ID_ANY, &conf);
+        qi.tqi_readyTime =
+                (conf.beacon_interval * sc->sc_config.cabqReadytime) / 100;
+        ath_txq_update(sc, qnum, &qi);
+
+        return 0;
+}
+
+int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb)
+{
+        struct ath_tx_control txctl;
+        int error = 0;
+
+        error = ath_tx_prepare(sc, skb, &txctl);
+        if (error == 0)
+                /*
+                 * Start DMA mapping.
+                 * ath_tx_start_dma() will be called either synchronously
+                 * or asynchrounsly once DMA is complete.
+                 */
+                xmit_map_sg(sc, skb,
+                            get_dma_mem_context(&txctl, dmacontext),
+                            &txctl);
+        else
+                ath_node_put(sc, txctl.an, ATH9K_BH_STATUS_CHANGE);
+
+        /* failed packets will be dropped by the caller */
+        return error;
+}
+
+/* Deferred processing of transmit interrupt */
+
+void ath_tx_tasklet(struct ath_softc *sc)
+{
+        u64 tsf = ath9k_hw_gettsf64(sc->sc_ah);
+        int i, nacked = 0;
+        u32 qcumask = ((1 << ATH9K_NUM_TX_QUEUES) - 1);
+
+        ath9k_hw_gettxintrtxqs(sc->sc_ah, &qcumask);
+
+        /*
+         * Process each active queue.
+         */
+        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+                if (ATH_TXQ_SETUP(sc, i) && (qcumask & (1 << i)))
+                        nacked += ath_tx_processq(sc, &sc->sc_txq[i]);
+        }
+        if (nacked)
+                sc->sc_lastrx = tsf;
+}
+
+void ath_tx_draintxq(struct ath_softc *sc,
+        struct ath_txq *txq, bool retry_tx)
+{
+        struct ath_buf *bf, *lastbf;
+        struct list_head bf_head;
+
+        INIT_LIST_HEAD(&bf_head);
+
+        /*
+         * NB: this assumes output has been stopped and
+         *     we do not need to block ath_tx_tasklet
+         */
+        for (;;) {
+                spin_lock_bh(&txq->axq_lock);
+
+                if (list_empty(&txq->axq_q)) {
+                        txq->axq_link = NULL;
+                        txq->axq_linkbuf = NULL;
+                        spin_unlock_bh(&txq->axq_lock);
+                        break;
+                }
+
+                bf = list_first_entry(&txq->axq_q, struct ath_buf, list);
+
+                if (bf->bf_status & ATH_BUFSTATUS_STALE) {
+                        list_del(&bf->list);
+                        spin_unlock_bh(&txq->axq_lock);
+
+                        spin_lock_bh(&sc->sc_txbuflock);
+                        list_add_tail(&bf->list, &sc->sc_txbuf);
+                        spin_unlock_bh(&sc->sc_txbuflock);
+                        continue;
+                }
+
+                lastbf = bf->bf_lastbf;
+                if (!retry_tx)
+                        lastbf->bf_desc->ds_txstat.ts_flags =
+                                ATH9K_TX_SW_ABORTED;
+
+                /* remove ath_buf's of the same mpdu from txq */
+                list_cut_position(&bf_head, &txq->axq_q, &lastbf->list);
+                txq->axq_depth--;
+
+                spin_unlock_bh(&txq->axq_lock);
+
+                if (bf->bf_isampdu)
+                        ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, 0);
+                else
+                        ath_tx_complete_buf(sc, bf, &bf_head, 0, 0);
+        }
+
+        /* flush any pending frames if aggregation is enabled */
+        if (sc->sc_txaggr) {
+                if (!retry_tx) {
+                        spin_lock_bh(&txq->axq_lock);
+                        ath_txq_drain_pending_buffers(sc, txq,
+                                ATH9K_BH_STATUS_CHANGE);
+                        spin_unlock_bh(&txq->axq_lock);
+                }
+        }
+}
+
+/* Drain the transmit queues and reclaim resources */
+
+void ath_draintxq(struct ath_softc *sc, bool retry_tx)
+{
+        /* stop beacon queue. The beacon will be freed when
+         * we go to INIT state */
+        if (!sc->sc_invalid) {
+                (void) ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
+                DPRINTF(sc, ATH_DBG_XMIT, "%s: beacon queue %x\n", __func__,
+                        ath9k_hw_gettxbuf(sc->sc_ah, sc->sc_bhalq));
+        }
+
+        ath_drain_txdataq(sc, retry_tx);
+}
+
+u32 ath_txq_depth(struct ath_softc *sc, int qnum)
+{
+        return sc->sc_txq[qnum].axq_depth;
+}
+
+u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum)
+{
+        return sc->sc_txq[qnum].axq_aggr_depth;
+}
+
+/* Check if an ADDBA is required. A valid node must be passed. */
+enum ATH_AGGR_CHECK ath_tx_aggr_check(struct ath_softc *sc,
+                                      struct ath_node *an,
+                                      u8 tidno)
+{
+        struct ath_atx_tid *txtid;
+        DECLARE_MAC_BUF(mac);
+
+        if (!sc->sc_txaggr)
+                return AGGR_NOT_REQUIRED;
+
+        /* ADDBA exchange must be completed before sending aggregates */
+        txtid = ATH_AN_2_TID(an, tidno);
+
+        if (txtid->addba_exchangecomplete)
+                return AGGR_EXCHANGE_DONE;
+
+        if (txtid->cleanup_inprogress)
+                return AGGR_CLEANUP_PROGRESS;
+
+        if (txtid->addba_exchangeinprogress)
+                return AGGR_EXCHANGE_PROGRESS;
+
+        if (!txtid->addba_exchangecomplete) {
+                if (!txtid->addba_exchangeinprogress &&
+                    (txtid->addba_exchangeattempts < ADDBA_EXCHANGE_ATTEMPTS)) {
+                        txtid->addba_exchangeattempts++;
+                        return AGGR_REQUIRED;
+                }
+        }
+
+        return AGGR_NOT_REQUIRED;
+}
+
+/* Start TX aggregation */
+
+int ath_tx_aggr_start(struct ath_softc *sc,
+                      const u8 *addr,
+                      u16 tid,
+                      u16 *ssn)
+{
+        struct ath_atx_tid *txtid;
+        struct ath_node *an;
+
+        spin_lock_bh(&sc->node_lock);
+        an = ath_node_find(sc, (u8 *) addr);
+        spin_unlock_bh(&sc->node_lock);
+
+        if (!an) {
+                DPRINTF(sc, ATH_DBG_AGGR,
+                        "%s: Node not found to initialize "
+                        "TX aggregation\n", __func__);
+                return -1;
+        }
+
+        if (sc->sc_txaggr) {
+                txtid = ATH_AN_2_TID(an, tid);
+                txtid->addba_exchangeinprogress = 1;
+                ath_tx_pause_tid(sc, txtid);
+        }
+
+        return 0;
+}
+
+/* Stop tx aggregation */
+
+int ath_tx_aggr_stop(struct ath_softc *sc,
+                     const u8 *addr,
+                     u16 tid)
+{
+        struct ath_node *an;
+
+        spin_lock_bh(&sc->node_lock);
+        an = ath_node_find(sc, (u8 *) addr);
+        spin_unlock_bh(&sc->node_lock);
+
+        if (!an) {
+                DPRINTF(sc, ATH_DBG_AGGR,
+                        "%s: TX aggr stop for non-existent node\n", __func__);
+                return -1;
+        }
+
+        ath_tx_aggr_teardown(sc, an, tid);
+        return 0;
+}
+
+/*
+ * Performs transmit side cleanup when TID changes from aggregated to
+ * unaggregated.
+ * - Pause the TID and mark cleanup in progress
+ * - Discard all retry frames from the s/w queue.
+ */
+
+void ath_tx_aggr_teardown(struct ath_softc *sc,
+        struct ath_node *an, u8 tid)
+{
+        struct ath_atx_tid *txtid = ATH_AN_2_TID(an, tid);
+        struct ath_txq *txq = &sc->sc_txq[txtid->ac->qnum];
+        struct ath_buf *bf;
+        struct list_head bf_head;
+        INIT_LIST_HEAD(&bf_head);
+
+        DPRINTF(sc, ATH_DBG_AGGR, "%s: teardown TX aggregation\n", __func__);
+
+        if (txtid->cleanup_inprogress) /* cleanup is in progress */
+                return;
+
+        if (!txtid->addba_exchangecomplete) {
+                txtid->addba_exchangeattempts = 0;
+                return;
+        }
+
+        /* TID must be paused first */
+        ath_tx_pause_tid(sc, txtid);
+
+        /* drop all software retried frames and mark this TID */
+        spin_lock_bh(&txq->axq_lock);
+        while (!list_empty(&txtid->buf_q)) {
+                bf = list_first_entry(&txtid->buf_q, struct ath_buf, list);
+                if (!bf->bf_isretried) {
+                        /*
+                         * NB: it's based on the assumption that
+                         * software retried frame will always stay
+                         * at the head of software queue.
+                         */
+                        break;
+                }
+                list_cut_position(&bf_head,
+                        &txtid->buf_q, &bf->bf_lastfrm->list);
+                ath_tx_update_baw(sc, txtid, bf->bf_seqno);
+
+                /* complete this sub-frame */
+                ath_tx_complete_buf(sc, bf, &bf_head, 0, 0);
+        }
+
+        if (txtid->baw_head != txtid->baw_tail) {
+                spin_unlock_bh(&txq->axq_lock);
+                txtid->cleanup_inprogress = true;
+        } else {
+                txtid->addba_exchangecomplete = 0;
+                txtid->addba_exchangeattempts = 0;
+                spin_unlock_bh(&txq->axq_lock);
+                ath_tx_flush_tid(sc, txtid);
+        }
+}
+
+/*
+ * Tx scheduling logic
+ * NB: must be called with txq lock held
+ */
+
+void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
+{
+        struct ath_atx_ac *ac;
+        struct ath_atx_tid *tid;
+
+        /* nothing to schedule */
+        if (list_empty(&txq->axq_acq))
+                return;
+        /*
+         * get the first node/ac pair on the queue
+         */
+        ac = list_first_entry(&txq->axq_acq, struct ath_atx_ac, list);
+        list_del(&ac->list);
+        ac->sched = false;
+
+        /*
+         * process a single tid per destination
+         */
+        do {
+                /* nothing to schedule */
+                if (list_empty(&ac->tid_q))
+                        return;
+
+                tid = list_first_entry(&ac->tid_q, struct ath_atx_tid, list);
+                list_del(&tid->list);
+                tid->sched = false;
+
+                if (tid->paused)    /* check next tid to keep h/w busy */
+                        continue;
+
+                if (!(tid->an->an_smmode == ATH_SM_PWRSAV_DYNAMIC) ||
+                    ((txq->axq_depth % 2) == 0)) {
+                        ath_tx_sched_aggr(sc, txq, tid);
+                }
+
+                /*
+                 * add tid to round-robin queue if more frames
+                 * are pending for the tid
+                 */
+                if (!list_empty(&tid->buf_q))
+                        ath_tx_queue_tid(txq, tid);
+
+                /* only schedule one TID at a time */
+                break;
+        } while (!list_empty(&ac->tid_q));
+
+        /*
+         * schedule AC if more TIDs need processing
+         */
+        if (!list_empty(&ac->tid_q)) {
+                /*
+                 * add dest ac to txq if not already added
+                 */
+                if (!ac->sched) {
+                        ac->sched = true;
+                        list_add_tail(&ac->list, &txq->axq_acq);
+                }
+        }
+}
+
+/* Initialize per-node transmit state */
+
+void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
+{
+        if (sc->sc_txaggr) {
+                struct ath_atx_tid *tid;
+                struct ath_atx_ac *ac;
+                int tidno, acno;
+
+                sc->sc_ht_info.maxampdu = ATH_AMPDU_LIMIT_DEFAULT;
+
+                /*
+                 * Init per tid tx state
+                 */
+                for (tidno = 0, tid = &an->an_aggr.tx.tid[tidno];
+                                tidno < WME_NUM_TID;
+                                tidno++, tid++) {
+                        tid->an        = an;
+                        tid->tidno     = tidno;
+                        tid->seq_start = tid->seq_next = 0;
+                        tid->baw_size  = WME_MAX_BA;
+                        tid->baw_head  = tid->baw_tail = 0;
+                        tid->sched     = false;
+                        tid->paused = false;
+                        tid->cleanup_inprogress = false;
+                        INIT_LIST_HEAD(&tid->buf_q);
+
+                        acno = TID_TO_WME_AC(tidno);
+                        tid->ac = &an->an_aggr.tx.ac[acno];
+
+                        /* ADDBA state */
+                        tid->addba_exchangecomplete     = 0;
+                        tid->addba_exchangeinprogress   = 0;
+                        tid->addba_exchangeattempts     = 0;
+                }
+
+                /*
+                 * Init per ac tx state
+                 */
+                for (acno = 0, ac = &an->an_aggr.tx.ac[acno];
+                                acno < WME_NUM_AC; acno++, ac++) {
+                        ac->sched    = false;
+                        INIT_LIST_HEAD(&ac->tid_q);
+
+                        switch (acno) {
+                        case WME_AC_BE:
+                                ac->qnum = ath_tx_get_qnum(sc,
+                                        ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
+                                break;
+                        case WME_AC_BK:
+                                ac->qnum = ath_tx_get_qnum(sc,
+                                        ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BK);
+                                break;
+                        case WME_AC_VI:
+                                ac->qnum = ath_tx_get_qnum(sc,
+                                        ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_VI);
+                                break;
+                        case WME_AC_VO:
+                                ac->qnum = ath_tx_get_qnum(sc,
+                                        ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_VO);
+                                break;
+                        }
+                }
+        }
+}
+
+/* Cleanupthe pending buffers for the node. */
+
+void ath_tx_node_cleanup(struct ath_softc *sc,
+        struct ath_node *an, bool bh_flag)
+{
+        int i;
+        struct ath_atx_ac *ac, *ac_tmp;
+        struct ath_atx_tid *tid, *tid_tmp;
+        struct ath_txq *txq;
+        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+                if (ATH_TXQ_SETUP(sc, i)) {
+                        txq = &sc->sc_txq[i];
+
+                        if (likely(bh_flag))
+                                spin_lock_bh(&txq->axq_lock);
+                        else
+                                spin_lock(&txq->axq_lock);
+
+                        list_for_each_entry_safe(ac,
+                                        ac_tmp, &txq->axq_acq, list) {
+                                tid = list_first_entry(&ac->tid_q,
+                                                struct ath_atx_tid, list);
+                                if (tid && tid->an != an)
+                                        continue;
+                                list_del(&ac->list);
+                                ac->sched = false;
+
+                                list_for_each_entry_safe(tid,
+                                                tid_tmp, &ac->tid_q, list) {
+                                        list_del(&tid->list);
+                                        tid->sched = false;
+                                        ath_tid_drain(sc, txq, tid, bh_flag);
+                                        tid->addba_exchangecomplete = 0;
+                                        tid->addba_exchangeattempts = 0;
+                                        tid->cleanup_inprogress = false;
+                                }
+                        }
+
+                        if (likely(bh_flag))
+                                spin_unlock_bh(&txq->axq_lock);
+                        else
+                                spin_unlock(&txq->axq_lock);
+                }
+        }
+}
+
+/* Cleanup per node transmit state */
+
+void ath_tx_node_free(struct ath_softc *sc, struct ath_node *an)
+{
+        if (sc->sc_txaggr) {
+                struct ath_atx_tid *tid;
+                int tidno, i;
+
+                /* Init per tid rx state */
+                for (tidno = 0, tid = &an->an_aggr.tx.tid[tidno];
+                        tidno < WME_NUM_TID;
+                     tidno++, tid++) {
+
+                        for (i = 0; i < ATH_TID_MAX_BUFS; i++)
+                                ASSERT(tid->tx_buf[i] == NULL);
+                }
+        }
+}
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 3bf3a869361f..7205a936ec74 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -33,7 +33,6 @@
 #include <linux/moduleparam.h>
 #include <linux/if_arp.h>
 #include <linux/etherdevice.h>
-#include <linux/version.h>
 #include <linux/firmware.h>
 #include <linux/wireless.h>
 #include <linux/workqueue.h>
@@ -4615,7 +4614,9 @@ static void b43_sprom_fixup(struct ssb_bus *bus)
         if (bus->bustype == SSB_BUSTYPE_PCI) {
                 pdev = bus->host_pci;
                 if (IS_PDEV(pdev, BROADCOM, 0x4318, ASUSTEK, 0x100F) ||
+                    IS_PDEV(pdev, BROADCOM, 0x4320,    DELL, 0x0003) ||
                     IS_PDEV(pdev, BROADCOM, 0x4320, LINKSYS, 0x0015) ||
+                    IS_PDEV(pdev, BROADCOM, 0x4320, LINKSYS, 0x0014) ||
                     IS_PDEV(pdev, BROADCOM, 0x4320, LINKSYS, 0x0013))
                         bus->sprom.boardflags_lo &= ~B43_BFL_BTCOEXIST;
         }
diff --git a/drivers/net/wireless/ipw2100.c b/drivers/net/wireless/ipw2100.c
index c6f886ec08a3..19a401c4a0dc 100644
--- a/drivers/net/wireless/ipw2100.c
+++ b/drivers/net/wireless/ipw2100.c
@@ -157,7 +157,6 @@ that only one external action is invoked at a time.
 #include <linux/stringify.h>
 #include <linux/tcp.h>
 #include <linux/types.h>
-#include <linux/version.h>
 #include <linux/time.h>
 #include <linux/firmware.h>
 #include <linux/acpi.h>
diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c
index 36e8d2f6e7b4..dcce3542d5a7 100644
--- a/drivers/net/wireless/ipw2200.c
+++ b/drivers/net/wireless/ipw2200.c
@@ -31,7 +31,6 @@
 ******************************************************************************/
 
 #include "ipw2200.h"
-#include <linux/version.h>
 
 
 #ifndef KBUILD_EXTMOD
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c
index b3931f6135a4..3f51f3635344 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -26,7 +26,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c
index 22bb26985c2e..e2581229d8b2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965.c
+++ b/drivers/net/wireless/iwlwifi/iwl-4965.c
@@ -26,7 +26,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
@@ -967,7 +966,7 @@ static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 
         s = iwl4965_get_sub_band(priv, channel);
         if (s >= EEPROM_TX_POWER_BANDS) {
-                IWL_ERROR("Tx Power can not find channel %d ", channel);
+                IWL_ERROR("Tx Power can not find channel %d\n", channel);
                 return -1;
         }
 
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index f3d139b663e6..cbc01a00eaf4 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -25,7 +25,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index b8407d5704a1..061ffba9c884 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -29,7 +29,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
@@ -2719,7 +2718,7 @@ static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
 {
         struct iwl_priv *priv = hw->priv;
 
-        IWL_DEBUG_MAC80211("enter\n");
+        IWL_DEBUG_MACDUMP("enter\n");
 
         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
                 IWL_DEBUG_MAC80211("leave - monitor\n");
@@ -2733,7 +2732,7 @@ static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
         if (iwl_tx_skb(priv, skb))
                 dev_kfree_skb_any(skb);
 
-        IWL_DEBUG_MAC80211("leave\n");
+        IWL_DEBUG_MACDUMP("leave\n");
         return 0;
 }
 
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index 9bd61809129f..c72f72579bea 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -28,7 +28,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <net/mac80211.h>
 
 struct iwl_priv; /* FIXME: remove */
diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h
index b4ffd33ef98c..d2daa174df22 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debug.h
+++ b/drivers/net/wireless/iwlwifi/iwl-debug.h
@@ -114,7 +114,7 @@ static inline void iwl_dbgfs_unregister(struct iwl_priv *priv)
 #define IWL_DL_MAC80211      (1 << 1)
 #define IWL_DL_HOST_COMMAND  (1 << 2)
 #define IWL_DL_STATE         (1 << 3)
-
+#define IWL_DL_MACDUMP          (1 << 4)
 #define IWL_DL_RADIO         (1 << 7)
 #define IWL_DL_POWER         (1 << 8)
 #define IWL_DL_TEMP          (1 << 9)
@@ -154,6 +154,7 @@ static inline void iwl_dbgfs_unregister(struct iwl_priv *priv)
 #define IWL_DEBUG_INFO(f, a...)    IWL_DEBUG(IWL_DL_INFO, f, ## a)
 
 #define IWL_DEBUG_MAC80211(f, a...)     IWL_DEBUG(IWL_DL_MAC80211, f, ## a)
+#define IWL_DEBUG_MACDUMP(f, a...)     IWL_DEBUG(IWL_DL_MACDUMP, f, ## a)
 #define IWL_DEBUG_TEMP(f, a...)   IWL_DEBUG(IWL_DL_TEMP, f, ## a)
 #define IWL_DEBUG_SCAN(f, a...)   IWL_DEBUG(IWL_DL_SCAN, f, ## a)
 #define IWL_DEBUG_RX(f, a...)     IWL_DEBUG(IWL_DL_RX, f, ## a)
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index bce53830b301..37155755efc5 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -63,7 +63,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/init.h>
 
 #include <net/mac80211.h>
@@ -146,7 +145,7 @@ int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
 {
         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
         if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
-                IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
+                IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
                 return -ENOENT;
         }
         return 0;
@@ -227,7 +226,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
 
         ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
         if (ret < 0) {
-                IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
+                IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
                 ret = -ENOENT;
                 goto err;
         }
@@ -254,7 +253,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
                 }
 
                 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
-                        IWL_ERROR("Time out reading EEPROM[%d]", addr);
+                        IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
                         ret = -ETIMEDOUT;
                         goto done;
                 }
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
index 6512834bb916..2eb03eea1908 100644
--- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c
+++ b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
@@ -28,7 +28,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <net/mac80211.h>
 
 #include "iwl-dev.h" /* FIXME: remove */
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c
index 028e3053c0ca..a099c9e30e55 100644
--- a/drivers/net/wireless/iwlwifi/iwl-power.c
+++ b/drivers/net/wireless/iwlwifi/iwl-power.c
@@ -29,7 +29,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/init.h>
 
 #include <net/mac80211.h>
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index 60a6e0106036..6283a3a707f5 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -207,7 +207,7 @@ static void iwl_set_ht_add_station(struct iwl_priv *priv, u8 index,
         case WLAN_HT_CAP_MIMO_PS_DISABLED:
                 break;
         default:
-                IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
+                IWL_WARNING("Invalid MIMO PS mode %d\n", mimo_ps_mode);
                 break;
         }
 
@@ -969,7 +969,7 @@ int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
                 return priv->hw_params.bcast_sta_id;
 
         default:
-                IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
+                IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode);
                 return priv->hw_params.bcast_sta_id;
         }
 }
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c
index aa98c76d8195..d82823b5c8ab 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -493,7 +493,7 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv)
         /* Alloc keep-warm buffer */
         ret = iwl_kw_alloc(priv);
         if (ret) {
-                IWL_ERROR("Keep Warm allocation failed");
+                IWL_ERROR("Keep Warm allocation failed\n");
                 goto error_kw;
         }
         spin_lock_irqsave(&priv->lock, flags);
@@ -764,20 +764,19 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
         struct iwl_tfd_frame *tfd;
-        u32 *control_flags;
-        int txq_id = skb_get_queue_mapping(skb);
-        struct iwl_tx_queue *txq = NULL;
-        struct iwl_queue *q = NULL;
+        struct iwl_tx_queue *txq;
+        struct iwl_queue *q;
+        struct iwl_cmd *out_cmd;
+        struct iwl_tx_cmd *tx_cmd;
+        int swq_id, txq_id;
         dma_addr_t phys_addr;
         dma_addr_t txcmd_phys;
         dma_addr_t scratch_phys;
-        struct iwl_cmd *out_cmd = NULL;
-        struct iwl_tx_cmd *tx_cmd;
         u16 len, idx, len_org;
         u16 seq_number = 0;
-        u8 id, hdr_len, unicast;
-        u8 sta_id;
         __le16 fc;
+        u8 hdr_len, unicast;
+        u8 sta_id;
         u8 wait_write_ptr = 0;
         u8 tid = 0;
         u8 *qc = NULL;
@@ -802,7 +801,6 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
         }
 
         unicast = !is_multicast_ether_addr(hdr->addr1);
-        id = 0;
 
         fc = hdr->frame_control;
 
@@ -840,14 +838,16 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
 
         IWL_DEBUG_TX("station Id %d\n", sta_id);
 
+        swq_id = skb_get_queue_mapping(skb);
+        txq_id = swq_id;
         if (ieee80211_is_data_qos(fc)) {
                 qc = ieee80211_get_qos_ctl(hdr);
                 tid = qc[0] & 0xf;
-                seq_number = priv->stations[sta_id].tid[tid].seq_number &
-                                IEEE80211_SCTL_SEQ;
-                hdr->seq_ctrl = cpu_to_le16(seq_number) |
-                        (hdr->seq_ctrl &
-                                __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
+                seq_number = priv->stations[sta_id].tid[tid].seq_number;
+                seq_number &= IEEE80211_SCTL_SEQ;
+                hdr->seq_ctrl = hdr->seq_ctrl &
+                                __constant_cpu_to_le16(IEEE80211_SCTL_FRAG);
+                hdr->seq_ctrl |= cpu_to_le16(seq_number);
                 seq_number += 0x10;
                 /* aggregation is on for this <sta,tid> */
                 if (info->flags & IEEE80211_TX_CTL_AMPDU)
@@ -864,7 +864,6 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
         /* Set up first empty TFD within this queue's circular TFD buffer */
         tfd = &txq->bd[q->write_ptr];
         memset(tfd, 0, sizeof(*tfd));
-        control_flags = (u32 *) tfd;
         idx = get_cmd_index(q, q->write_ptr, 0);
 
         /* Set up driver data for this TFD */
@@ -983,8 +982,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
                         iwl_txq_update_write_ptr(priv, txq);
                         spin_unlock_irqrestore(&priv->lock, flags);
                 } else {
-                        ieee80211_stop_queue(priv->hw,
-                                             skb_get_queue_mapping(skb));
+                        ieee80211_stop_queue(priv->hw, swq_id);
                 }
         }
 
@@ -1013,13 +1011,12 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
         struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
         struct iwl_queue *q = &txq->q;
         struct iwl_tfd_frame *tfd;
-        u32 *control_flags;
         struct iwl_cmd *out_cmd;
-        u32 idx;
-        u16 fix_size;
         dma_addr_t phys_addr;
-        int len, ret;
         unsigned long flags;
+        int len, ret;
+        u32 idx;
+        u16 fix_size;
 
         cmd->len = priv->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
         fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
@@ -1045,7 +1042,6 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
         tfd = &txq->bd[q->write_ptr];
         memset(tfd, 0, sizeof(*tfd));
 
-        control_flags = (u32 *) tfd;
 
         idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
         out_cmd = txq->cmd[idx];
@@ -1467,7 +1463,7 @@ void iwl_rx_reply_compressed_ba(struct iwl_priv *priv,
         u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
 
         if (scd_flow >= priv->hw_params.max_txq_num) {
-                IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
+                IWL_ERROR("BUG_ON scd_flow is bigger than number of queues\n");
                 return;
         }
 
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index 444847ab1b5a..b775d5bab668 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -29,7 +29,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
@@ -1558,7 +1557,7 @@ int iwl3945_eeprom_init(struct iwl3945_priv *priv)
         BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
 
         if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
-                IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
+                IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
                 return -ENOENT;
         }
 
@@ -1583,7 +1582,7 @@ int iwl3945_eeprom_init(struct iwl3945_priv *priv)
                 }
 
                 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
-                        IWL_ERROR("Time out reading EEPROM[%d]", addr);
+                        IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
                         return -ETIMEDOUT;
                 }
                 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
@@ -2507,7 +2506,7 @@ static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *h
                 return priv->hw_setting.bcast_sta_id;
 
         default:
-                IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
+                IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode);
                 return priv->hw_setting.bcast_sta_id;
         }
 }
diff --git a/drivers/net/wireless/orinoco.c b/drivers/net/wireless/orinoco.c
index b047306bf386..1ebcafe7ca5f 100644
--- a/drivers/net/wireless/orinoco.c
+++ b/drivers/net/wireless/orinoco.c
@@ -1998,13 +1998,6 @@ __orinoco_set_multicast_list(struct net_device *dev)
                 else
                         priv->mc_count = mc_count;
         }
-
-        /* Since we can set the promiscuous flag when it wasn't asked
-           for, make sure the net_device knows about it. */
-        if (priv->promiscuous)
-                dev->flags |= IFF_PROMISC;
-        else
-                dev->flags &= ~IFF_PROMISC;
 }
 
 /* This must be called from user context, without locks held - use
diff --git a/drivers/net/wireless/p54/p54.h b/drivers/net/wireless/p54/p54.h
index cac9a515b82d..4801a363507b 100644
--- a/drivers/net/wireless/p54/p54.h
+++ b/drivers/net/wireless/p54/p54.h
@@ -52,6 +52,7 @@ struct p54_common {
         int (*open)(struct ieee80211_hw *dev);
         void (*stop)(struct ieee80211_hw *dev);
         int mode;
+        u16 seqno;
         struct mutex conf_mutex;
         u8 mac_addr[ETH_ALEN];
         u8 bssid[ETH_ALEN];
diff --git a/drivers/net/wireless/p54/p54common.c b/drivers/net/wireless/p54/p54common.c
index 4da89ea9b561..29be3dc8ee09 100644
--- a/drivers/net/wireless/p54/p54common.c
+++ b/drivers/net/wireless/p54/p54common.c
@@ -413,12 +413,12 @@ static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
                         last_addr = range->end_addr;
                         __skb_unlink(entry, &priv->tx_queue);
                         memset(&info->status, 0, sizeof(info->status));
-                        priv->tx_stats[skb_get_queue_mapping(skb)].len--;
                         entry_hdr = (struct p54_control_hdr *) entry->data;
                         entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
                         if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
                                 pad = entry_data->align[0];
 
+                        priv->tx_stats[entry_data->hw_queue - 4].len--;
                         if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
                                 if (!(payload->status & 0x01))
                                         info->flags |= IEEE80211_TX_STAT_ACK;
@@ -553,9 +553,11 @@ static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
         struct ieee80211_tx_queue_stats *current_queue;
         struct p54_common *priv = dev->priv;
         struct p54_control_hdr *hdr;
+        struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
         struct p54_tx_control_allocdata *txhdr;
         size_t padding, len;
         u8 rate;
+        u8 cts_rate = 0x20;
 
         current_queue = &priv->tx_stats[skb_get_queue_mapping(skb)];
         if (unlikely(current_queue->len > current_queue->limit))
@@ -580,31 +582,44 @@ static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
         hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
         hdr->retry1 = hdr->retry2 = info->control.retry_limit;
 
-        memset(txhdr->wep_key, 0x0, 16);
-        txhdr->padding = 0;
-        txhdr->padding2 = 0;
-
         /* TODO: add support for alternate retry TX rates */
         rate = ieee80211_get_tx_rate(dev, info)->hw_value;
-        if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE)
+        if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) {
                 rate |= 0x10;
-        if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS)
+                cts_rate |= 0x10;
+        }
+        if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
                 rate |= 0x40;
-        else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT)
+                cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
+        } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
                 rate |= 0x20;
+                cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
+        }
         memset(txhdr->rateset, rate, 8);
-        txhdr->wep_key_present = 0;
-        txhdr->wep_key_len = 0;
-        txhdr->frame_type = cpu_to_le32(skb_get_queue_mapping(skb) + 4);
-        txhdr->magic4 = 0;
-        txhdr->antenna = (info->antenna_sel_tx == 0) ?
+        txhdr->key_type = 0;
+        txhdr->key_len = 0;
+        txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
+        txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
                 2 : info->antenna_sel_tx - 1;
         txhdr->output_power = 0x7f; // HW Maximum
-        txhdr->magic5 = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
-                0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
+        txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
+                          0 : cts_rate;
         if (padding)
                 txhdr->align[0] = padding;
 
+        /* FIXME: The sequence that follows is needed for this driver to
+         * work with mac80211 since "mac80211: fix TX sequence numbers".
+         * As with the temporary code in rt2x00, changes will be needed
+         * to get proper sequence numbers on beacons. In addition, this
+         * patch places the sequence number in the hardware state, which
+         * limits us to a single virtual state.
+         */
+        if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
+                if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
+                        priv->seqno += 0x10;
+                ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
+                ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
+        }
         /* modifies skb->cb and with it info, so must be last! */
         p54_assign_address(dev, skb, hdr, skb->len);
 
@@ -803,8 +818,8 @@ static void p54_set_vdcf(struct ieee80211_hw *dev)
 
         if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
                 vdcf->slottime = 9;
-                vdcf->magic1 = 0x00;
-                vdcf->magic2 = 0x10;
+                vdcf->magic1 = 0x10;
+                vdcf->magic2 = 0x00;
         } else {
                 vdcf->slottime = 20;
                 vdcf->magic1 = 0x0a;
@@ -822,10 +837,21 @@ static int p54_start(struct ieee80211_hw *dev)
         struct p54_common *priv = dev->priv;
         int err;
 
+        if (!priv->cached_vdcf) {
+                priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
+                        priv->tx_hdr_len + sizeof(struct p54_control_hdr),
+                        GFP_KERNEL);
+
+                if (!priv->cached_vdcf)
+                        return -ENOMEM;
+        }
+
         err = priv->open(dev);
         if (!err)
                 priv->mode = IEEE80211_IF_TYPE_MNTR;
 
+        p54_init_vdcf(dev);
+
         return err;
 }
 
@@ -1005,15 +1031,6 @@ struct ieee80211_hw *p54_init_common(size_t priv_data_len)
         dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
                                  sizeof(struct p54_tx_control_allocdata);
 
-        priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
-              priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
-
-        if (!priv->cached_vdcf) {
-                ieee80211_free_hw(dev);
-                return NULL;
-        }
-
-        p54_init_vdcf(dev);
         mutex_init(&priv->conf_mutex);
 
         return dev;
diff --git a/drivers/net/wireless/p54/p54common.h b/drivers/net/wireless/p54/p54common.h
index 2245fcce92dc..8db6c0e8e540 100644
--- a/drivers/net/wireless/p54/p54common.h
+++ b/drivers/net/wireless/p54/p54common.h
@@ -183,16 +183,16 @@ struct p54_frame_sent_hdr {
 
 struct p54_tx_control_allocdata {
         u8 rateset[8];
-        u16 padding;
-        u8 wep_key_present;
-        u8 wep_key_len;
-        u8 wep_key[16];
-        __le32 frame_type;
-        u32 padding2;
-        __le16 magic4;
-        u8 antenna;
+        u8 unalloc0[2];
+        u8 key_type;
+        u8 key_len;
+        u8 key[16];
+        u8 hw_queue;
+        u8 unalloc1[9];
+        u8 tx_antenna;
         u8 output_power;
-        __le32 magic5;
+        u8 cts_rate;
+        u8 unalloc2[3];
         u8 align[0];
 } __attribute__ ((packed));
 
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c
index 815c095ef797..cbaca23a9453 100644
--- a/drivers/net/wireless/p54/p54usb.c
+++ b/drivers/net/wireless/p54/p54usb.c
@@ -109,7 +109,17 @@ static void p54u_rx_cb(struct urb *urb)
                 urb->context = skb;
                 skb_queue_tail(&priv->rx_queue, skb);
         } else {
+                if (!priv->hw_type)
+                        skb_push(skb, sizeof(struct net2280_tx_hdr));
+
+                skb_reset_tail_pointer(skb);
                 skb_trim(skb, 0);
+                if (urb->transfer_buffer != skb_tail_pointer(skb)) {
+                        /* this should not happen */
+                        WARN_ON(1);
+                        urb->transfer_buffer = skb_tail_pointer(skb);
+                }
+
                 skb_queue_tail(&priv->rx_queue, skb);
         }
 
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index bd422fd6a894..d06507388635 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -203,23 +203,43 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw,
             !test_bit(DEVICE_STARTED, &rt2x00dev->flags))
                 return -ENODEV;
 
-        /*
-         * We don't support mixed combinations of sta and ap virtual
-         * interfaces. We can only add this interface when the rival
-         * interface count is 0.
-         */
-        if ((conf->type == IEEE80211_IF_TYPE_AP && rt2x00dev->intf_sta_count) ||
-            (conf->type != IEEE80211_IF_TYPE_AP && rt2x00dev->intf_ap_count))
-                return -ENOBUFS;
-
-        /*
-         * Check if we exceeded the maximum amount of supported interfaces.
-         */
-        if ((conf->type == IEEE80211_IF_TYPE_AP &&
-             rt2x00dev->intf_ap_count >= rt2x00dev->ops->max_ap_intf) ||
-            (conf->type != IEEE80211_IF_TYPE_AP &&
-             rt2x00dev->intf_sta_count >= rt2x00dev->ops->max_sta_intf))
-                return -ENOBUFS;
+        switch (conf->type) {
+        case IEEE80211_IF_TYPE_AP:
+                /*
+                 * We don't support mixed combinations of
+                 * sta and ap interfaces.
+                 */
+                if (rt2x00dev->intf_sta_count)
+                        return -ENOBUFS;
+
+                /*
+                 * Check if we exceeded the maximum amount
+                 * of supported interfaces.
+                 */
+                if (rt2x00dev->intf_ap_count >= rt2x00dev->ops->max_ap_intf)
+                        return -ENOBUFS;
+
+                break;
+        case IEEE80211_IF_TYPE_STA:
+        case IEEE80211_IF_TYPE_IBSS:
+                /*
+                 * We don't support mixed combinations of
+                 * sta and ap interfaces.
+                 */
+                if (rt2x00dev->intf_ap_count)
+                        return -ENOBUFS;
+
+                /*
+                 * Check if we exceeded the maximum amount
+                 * of supported interfaces.
+                 */
+                if (rt2x00dev->intf_sta_count >= rt2x00dev->ops->max_sta_intf)
+                        return -ENOBUFS;
+
+                break;
+        default:
+                return -EINVAL;
+        }
 
         /*
          * Loop through all beacon queues to find a free
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.h b/drivers/net/wireless/rt2x00/rt2x00queue.h
index a4a8c57004db..ff78e52ce43c 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.h
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.h
@@ -173,10 +173,10 @@ struct rxdone_entry_desc {
  *      frame transmission failed due to excessive retries.
  */
 enum txdone_entry_desc_flags {
-        TXDONE_UNKNOWN = 1 << 0,
-        TXDONE_SUCCESS = 1 << 1,
-        TXDONE_FAILURE = 1 << 2,
-        TXDONE_EXCESSIVE_RETRY = 1 << 3,
+        TXDONE_UNKNOWN,
+        TXDONE_SUCCESS,
+        TXDONE_FAILURE,
+        TXDONE_EXCESSIVE_RETRY,
 };
 
 /**
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c
index 8d76bb2e0312..2050227ea530 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.c
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.c
@@ -181,6 +181,7 @@ static void rt2x00usb_interrupt_txdone(struct urb *urb)
          * (Only indirectly by looking at the failed TX counters
          * in the register).
          */
+        txdesc.flags = 0;
         if (!urb->status)
                 __set_bit(TXDONE_UNKNOWN, &txdesc.flags);
         else
diff --git a/drivers/net/wireless/rtl8187_dev.c b/drivers/net/wireless/rtl8187_dev.c
index 57376fb993ed..ca5deb6244e6 100644
--- a/drivers/net/wireless/rtl8187_dev.c
+++ b/drivers/net/wireless/rtl8187_dev.c
@@ -40,6 +40,7 @@ static struct usb_device_id rtl8187_table[] __devinitdata = {
         /* Netgear */
         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
+        {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
         /* HP */
         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
         /* Sitecom */
diff --git a/drivers/net/wireless/wavelan.c b/drivers/net/wireless/wavelan.c
index 49ae97003952..136220b5ca81 100644
--- a/drivers/net/wireless/wavelan.c
+++ b/drivers/net/wireless/wavelan.c
@@ -1409,9 +1409,6 @@ static void wavelan_set_multicast_list(struct net_device * dev)
                         lp->mc_count = 0;
 
                         wv_82586_reconfig(dev);
-
-                        /* Tell the kernel that we are doing a really bad job. */
-                        dev->flags |= IFF_PROMISC;
                 }
         } else
                 /* Are there multicast addresses to send? */
diff --git a/drivers/net/wireless/wavelan_cs.c b/drivers/net/wireless/wavelan_cs.c
index b584c0ecc62d..00a3559e5aa4 100644
--- a/drivers/net/wireless/wavelan_cs.c
+++ b/drivers/net/wireless/wavelan_cs.c
@@ -1412,9 +1412,6 @@ wavelan_set_multicast_list(struct net_device *	dev)
           lp->mc_count = 0;
 
           wv_82593_reconfig(dev);
-
-          /* Tell the kernel that we are doing a really bad job... */
-          dev->flags |= IFF_PROMISC;
         }
     }
   else
@@ -1433,9 +1430,6 @@ wavelan_set_multicast_list(struct net_device *	dev)
             lp->mc_count = 0;
 
             wv_82593_reconfig(dev);
-
-            /* Tell the kernel that we are doing a really bad job... */
-            dev->flags |= IFF_ALLMULTI;
           }
       }
     else
diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index 902bbe788215..c749bdba214c 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -329,7 +329,7 @@ static int xennet_open(struct net_device *dev)
         }
         spin_unlock_bh(&np->rx_lock);
 
-        xennet_maybe_wake_tx(dev);
+        netif_start_queue(dev);
 
         return 0;
 }
diff --git a/drivers/pci/hotplug/acpi_pcihp.c b/drivers/pci/hotplug/acpi_pcihp.c
index 93e37f0666ab..e17ef54f0efc 100644
--- a/drivers/pci/hotplug/acpi_pcihp.c
+++ b/drivers/pci/hotplug/acpi_pcihp.c
@@ -382,7 +382,7 @@ EXPORT_SYMBOL_GPL(acpi_get_hp_params_from_firmware);
 int acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev, u32 flags)
 {
         acpi_status status;
-        acpi_handle chandle, handle = DEVICE_ACPI_HANDLE(&(dev->dev));
+        acpi_handle chandle, handle;
         struct pci_dev *pdev = dev;
         struct pci_bus *parent;
         struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL };
@@ -399,10 +399,25 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev, u32 flags)
          * Per PCI firmware specification, we should run the ACPI _OSC
          * method to get control of hotplug hardware before using it. If
          * an _OSC is missing, we look for an OSHP to do the same thing.
-         * To handle different BIOS behavior, we look for _OSC and OSHP
-         * within the scope of the hotplug controller and its parents,
+         * To handle different BIOS behavior, we look for _OSC on a root
+         * bridge preferentially (according to PCI fw spec). Later for
+         * OSHP within the scope of the hotplug controller and its parents,
          * upto the host bridge under which this controller exists.
          */
+        handle = acpi_find_root_bridge_handle(pdev);
+        if (handle) {
+                acpi_get_name(handle, ACPI_FULL_PATHNAME, &string);
+                dbg("Trying to get hotplug control for %s\n",
+                                (char *)string.pointer);
+                status = pci_osc_control_set(handle, flags);
+                if (ACPI_SUCCESS(status))
+                        goto got_one;
+                kfree(string.pointer);
+                string = (struct acpi_buffer){ ACPI_ALLOCATE_BUFFER, NULL };
+        }
+
+        pdev = dev;
+        handle = DEVICE_ACPI_HANDLE(&dev->dev);
         while (!handle) {
                 /*
                  * This hotplug controller was not listed in the ACPI name
@@ -427,15 +442,9 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev, u32 flags)
                 acpi_get_name(handle, ACPI_FULL_PATHNAME, &string);
                 dbg("Trying to get hotplug control for %s \n",
                     (char *)string.pointer);
-                status = pci_osc_control_set(handle, flags);
-                if (status == AE_NOT_FOUND)
-                        status = acpi_run_oshp(handle);
-                if (ACPI_SUCCESS(status)) {
-                        dbg("Gained control for hotplug HW for pci %s (%s)\n",
-                            pci_name(dev), (char *)string.pointer);
-                        kfree(string.pointer);
-                        return 0;
-                }
+                status = acpi_run_oshp(handle);
+                if (ACPI_SUCCESS(status))
+                        goto got_one;
                 if (acpi_root_bridge(handle))
                         break;
                 chandle = handle;
@@ -449,6 +458,11 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev, u32 flags)
 
         kfree(string.pointer);
         return -ENODEV;
+got_one:
+        dbg("Gained control for hotplug HW for pci %s (%s)\n", pci_name(dev),
+                        (char *)string.pointer);
+        kfree(string.pointer);
+        return 0;
 }
 EXPORT_SYMBOL(acpi_get_hp_hw_control_from_firmware);
 
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 18354817173c..4a10b5624f72 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -308,9 +308,8 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
                                   entry->msi_attrib.masked);
 
         pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
-        control &= ~(PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE);
-        if (entry->msi_attrib.maskbit || !entry->msi_attrib.masked)
-                control |= PCI_MSI_FLAGS_ENABLE;
+        control &= ~PCI_MSI_FLAGS_QSIZE;
+        control |= PCI_MSI_FLAGS_ENABLE;
         pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
 }
 
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0a3d856833fc..c9884bba22de 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1060,7 +1060,7 @@ bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)
  * The caller must verify that the device is capable of generating PME# before
  * calling this function with @enable equal to 'true'.
  */
-static void pci_pme_active(struct pci_dev *dev, bool enable)
+void pci_pme_active(struct pci_dev *dev, bool enable)
 {
         u16 pmcsr;
 
@@ -1941,6 +1941,7 @@ EXPORT_SYMBOL(pci_set_power_state);
 EXPORT_SYMBOL(pci_save_state);
 EXPORT_SYMBOL(pci_restore_state);
 EXPORT_SYMBOL(pci_pme_capable);
+EXPORT_SYMBOL(pci_pme_active);
 EXPORT_SYMBOL(pci_enable_wake);
 EXPORT_SYMBOL(pci_target_state);
 EXPORT_SYMBOL(pci_prepare_to_sleep);
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 30f581b8791f..6dd7b13e9808 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -36,12 +36,7 @@ int aer_osc_setup(struct pcie_device *pciedev)
         if (acpi_pci_disabled)
                 return -1;
 
-        /* Find root host bridge */
-        while (pdev->bus->self)
-                pdev = pdev->bus->self;
-        handle = acpi_get_pci_rootbridge_handle(
-                pci_domain_nr(pdev->bus), pdev->bus->number);
-
+        handle = acpi_find_root_bridge_handle(pdev);
         if (handle) {
                 pcie_osc_support_set(OSC_EXT_PCI_CONFIG_SUPPORT);
                 status = pci_osc_control_set(handle,
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 7098dfb07449..cce2f4cb1fbf 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -52,27 +52,49 @@ EXPORT_SYMBOL(no_pci_devices);
  * Some platforms allow access to legacy I/O port and ISA memory space on
  * a per-bus basis.  This routine creates the files and ties them into
  * their associated read, write and mmap files from pci-sysfs.c
+ *
+ * On error unwind, but don't propogate the error to the caller
+ * as it is ok to set up the PCI bus without these files.
  */
 static void pci_create_legacy_files(struct pci_bus *b)
 {
+        int error;
+
         b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
                                GFP_ATOMIC);
-        if (b->legacy_io) {
-                b->legacy_io->attr.name = "legacy_io";
-                b->legacy_io->size = 0xffff;
-                b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
-                b->legacy_io->read = pci_read_legacy_io;
-                b->legacy_io->write = pci_write_legacy_io;
-                device_create_bin_file(&b->dev, b->legacy_io);
-
-                /* Allocated above after the legacy_io struct */
-                b->legacy_mem = b->legacy_io + 1;
-                b->legacy_mem->attr.name = "legacy_mem";
-                b->legacy_mem->size = 1024*1024;
-                b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
-                b->legacy_mem->mmap = pci_mmap_legacy_mem;
-                device_create_bin_file(&b->dev, b->legacy_mem);
-        }
+        if (!b->legacy_io)
+                goto kzalloc_err;
+
+        b->legacy_io->attr.name = "legacy_io";
+        b->legacy_io->size = 0xffff;
+        b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
+        b->legacy_io->read = pci_read_legacy_io;
+        b->legacy_io->write = pci_write_legacy_io;
+        error = device_create_bin_file(&b->dev, b->legacy_io);
+        if (error)
+                goto legacy_io_err;
+
+        /* Allocated above after the legacy_io struct */
+        b->legacy_mem = b->legacy_io + 1;
+        b->legacy_mem->attr.name = "legacy_mem";
+        b->legacy_mem->size = 1024*1024;
+        b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
+        b->legacy_mem->mmap = pci_mmap_legacy_mem;
+        error = device_create_bin_file(&b->dev, b->legacy_mem);
+        if (error)
+                goto legacy_mem_err;
+
+        return;
+
+legacy_mem_err:
+        device_remove_bin_file(&b->dev, b->legacy_io);
+legacy_io_err:
+        kfree(b->legacy_io);
+        b->legacy_io = NULL;
+kzalloc_err:
+        printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
+               "and ISA memory resources to sysfs\n");
+        return;
 }
 
 void pci_remove_legacy_files(struct pci_bus *b)
@@ -361,6 +383,7 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                         res->start = base;
                 if (!res->end)
                         res->end = limit + 0xfff;
+                printk(KERN_INFO "PCI: bridge %s io port: [%llx, %llx]\n", pci_name(dev), res->start, res->end);
         }
 
         res = child->resource[1];
@@ -372,6 +395,7 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
                 res->start = base;
                 res->end = limit + 0xfffff;
+                printk(KERN_INFO "PCI: bridge %s 32bit mmio: [%llx, %llx]\n", pci_name(dev), res->start, res->end);
         }
 
         res = child->resource[2];
@@ -407,6 +431,7 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH;
                 res->start = base;
                 res->end = limit + 0xfffff;
+                printk(KERN_INFO "PCI: bridge %s %sbit mmio pref: [%llx, %llx]\n", pci_name(dev), (res->flags & PCI_PREF_RANGE_TYPE_64)?"64":"32",res->start, res->end);
         }
 }
 
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 0fb365074288..9236e7f869c8 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1756,9 +1756,14 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_c
  */
 static void __devinit quirk_brcm_570x_limit_vpd(struct pci_dev *dev)
 {
-        /*  Only disable the VPD capability for 5706, 5708, and 5709 rev. A */
+        /*
+         * Only disable the VPD capability for 5706, 5706S, 5708,
+         * 5708S and 5709 rev. A
+         */
         if ((dev->device == PCI_DEVICE_ID_NX2_5706) ||
+            (dev->device == PCI_DEVICE_ID_NX2_5706S) ||
             (dev->device == PCI_DEVICE_ID_NX2_5708) ||
+            (dev->device == PCI_DEVICE_ID_NX2_5708S) ||
             ((dev->device == PCI_DEVICE_ID_NX2_5709) &&
              (dev->revision & 0xf0) == 0x0)) {
                 if (dev->vpd)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 827c0a520e2b..82634a2f1b1d 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -530,6 +530,36 @@ void __ref pci_bus_assign_resources(struct pci_bus *bus)
 }
 EXPORT_SYMBOL(pci_bus_assign_resources);
 
+static void pci_bus_dump_res(struct pci_bus *bus)
+{
+        int i;
+
+        for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
+                struct resource *res = bus->resource[i];
+                if (!res)
+                        continue;
+
+                printk(KERN_INFO "bus: %02x index %x %s: [%llx, %llx]\n", bus->number, i, (res->flags & IORESOURCE_IO)? "io port":"mmio", res->start, res->end);
+        }
+}
+
+static void pci_bus_dump_resources(struct pci_bus *bus)
+{
+        struct pci_bus *b;
+        struct pci_dev *dev;
+
+
+        pci_bus_dump_res(bus);
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                b = dev->subordinate;
+                if (!b)
+                        continue;
+
+                pci_bus_dump_resources(b);
+        }
+}
+
 void __init
 pci_assign_unassigned_resources(void)
 {
@@ -545,4 +575,9 @@ pci_assign_unassigned_resources(void)
                 pci_bus_assign_resources(bus);
                 pci_enable_bridges(bus);
         }
+
+        /* dump the resource on buses */
+        list_for_each_entry(bus, &pci_root_buses, node) {
+                pci_bus_dump_resources(bus);
+        }
 }
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c
index 684968558c19..a0ffb8ebfe00 100644
--- a/drivers/pcmcia/at91_cf.c
+++ b/drivers/pcmcia/at91_cf.c
@@ -18,13 +18,13 @@
 
 #include <pcmcia/ss.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/sizes.h>
 #include <asm/gpio.h>
 
-#include <asm/arch/board.h>
-#include <asm/arch/at91rm9200_mc.h>
+#include <mach/board.h>
+#include <mach/at91rm9200_mc.h>
 
 
 /*
diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c
index 569b746b5731..f3736398900e 100644
--- a/drivers/pcmcia/omap_cf.c
+++ b/drivers/pcmcia/omap_cf.c
@@ -19,12 +19,12 @@
 
 #include <pcmcia/ss.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/sizes.h>
 
-#include <asm/arch/mux.h>
-#include <asm/arch/tc.h>
+#include <mach/mux.h>
+#include <mach/tc.h>
 
 
 /* NOTE:  don't expect this to support many I/O cards.  The 16xx chips have
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index ccfdf1969a7f..1b07af5a2ed3 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -24,12 +24,12 @@
 #include <linux/spinlock.h>
 #include <linux/platform_device.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/system.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-regs.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h>
 
 #include <pcmcia/cs_types.h>
 #include <pcmcia/ss.h>
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c
index bb95db7d2b76..bcff5cfed051 100644
--- a/drivers/pcmcia/pxa2xx_cm_x270.c
+++ b/drivers/pcmcia/pxa2xx_cm_x270.c
@@ -16,7 +16,7 @@
 #include <linux/gpio.h>
 
 #include <asm/mach-types.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 
 #include "soc_common.h"
 
diff --git a/drivers/pcmcia/pxa2xx_lubbock.c b/drivers/pcmcia/pxa2xx_lubbock.c
index 881ec8a8e389..37ec55df086e 100644
--- a/drivers/pcmcia/pxa2xx_lubbock.c
+++ b/drivers/pcmcia/pxa2xx_lubbock.c
@@ -21,11 +21,11 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/hardware/sa1111.h>
 #include <asm/mach-types.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/lubbock.h>
+#include <mach/pxa-regs.h>
+#include <mach/lubbock.h>
 
 #include "sa1111_generic.h"
 
diff --git a/drivers/pcmcia/pxa2xx_mainstone.c b/drivers/pcmcia/pxa2xx_mainstone.c
index 92d1cc33808c..877001db4916 100644
--- a/drivers/pcmcia/pxa2xx_mainstone.c
+++ b/drivers/pcmcia/pxa2xx_mainstone.c
@@ -21,12 +21,12 @@
 
 #include <pcmcia/ss.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/irq.h>
 
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/mainstone.h>
+#include <mach/pxa-regs.h>
+#include <mach/mainstone.h>
 
 #include "soc_common.h"
 
diff --git a/drivers/pcmcia/pxa2xx_palmtx.c b/drivers/pcmcia/pxa2xx_palmtx.c
index 4abde190c1f5..e07b5c51ec5b 100644
--- a/drivers/pcmcia/pxa2xx_palmtx.c
+++ b/drivers/pcmcia/pxa2xx_palmtx.c
@@ -16,19 +16,64 @@
 
 #include <asm/mach-types.h>
 
-#include <asm/arch/gpio.h>
-#include <asm/arch/palmtx.h>
+#include <mach/gpio.h>
+#include <mach/palmtx.h>
 
 #include "soc_common.h"
 
 static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
 {
-        skt->irq = IRQ_GPIO(GPIO_NR_PALMTX_PCMCIA_READY);
+        int ret;
+
+        ret = gpio_request(GPIO_NR_PALMTX_PCMCIA_POWER1, "PCMCIA PWR1");
+        if (ret)
+                goto err1;
+        ret = gpio_direction_output(GPIO_NR_PALMTX_PCMCIA_POWER1, 0);
+        if (ret)
+                goto err2;
+
+        ret = gpio_request(GPIO_NR_PALMTX_PCMCIA_POWER2, "PCMCIA PWR2");
+        if (ret)
+                goto err2;
+        ret = gpio_direction_output(GPIO_NR_PALMTX_PCMCIA_POWER2, 0);
+        if (ret)
+                goto err3;
+
+        ret = gpio_request(GPIO_NR_PALMTX_PCMCIA_RESET, "PCMCIA RST");
+        if (ret)
+                goto err3;
+        ret = gpio_direction_output(GPIO_NR_PALMTX_PCMCIA_RESET, 1);
+        if (ret)
+                goto err4;
+
+        ret = gpio_request(GPIO_NR_PALMTX_PCMCIA_READY, "PCMCIA RDY");
+        if (ret)
+                goto err4;
+        ret = gpio_direction_input(GPIO_NR_PALMTX_PCMCIA_READY);
+        if (ret)
+                goto err5;
+
+        skt->irq = gpio_to_irq(GPIO_NR_PALMTX_PCMCIA_READY);
         return 0;
+
+err5:
+        gpio_free(GPIO_NR_PALMTX_PCMCIA_READY);
+err4:
+        gpio_free(GPIO_NR_PALMTX_PCMCIA_RESET);
+err3:
+        gpio_free(GPIO_NR_PALMTX_PCMCIA_POWER2);
+err2:
+        gpio_free(GPIO_NR_PALMTX_PCMCIA_POWER1);
+err1:
+        return ret;
 }
 
 static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
 {
+        gpio_free(GPIO_NR_PALMTX_PCMCIA_READY);
+        gpio_free(GPIO_NR_PALMTX_PCMCIA_RESET);
+        gpio_free(GPIO_NR_PALMTX_PCMCIA_POWER2);
+        gpio_free(GPIO_NR_PALMTX_PCMCIA_POWER1);
 }
 
 static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
@@ -109,7 +154,7 @@ static void __exit palmtx_pcmcia_exit(void)
         platform_device_unregister(palmtx_pcmcia_device);
 }
 
-fs_initcall(palmtx_pcmcia_init);
+module_init(palmtx_pcmcia_init);
 module_exit(palmtx_pcmcia_exit);
 
 MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c
index d71f93d45833..1cd02f5a23a0 100644
--- a/drivers/pcmcia/pxa2xx_sharpsl.c
+++ b/drivers/pcmcia/pxa2xx_sharpsl.c
@@ -19,7 +19,7 @@
 #include <linux/platform_device.h>
 
 #include <asm/mach-types.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/hardware/scoop.h>
 
diff --git a/drivers/pcmcia/sa1100_assabet.c b/drivers/pcmcia/sa1100_assabet.c
index ce133ce81c10..f424146a2bc9 100644
--- a/drivers/pcmcia/sa1100_assabet.c
+++ b/drivers/pcmcia/sa1100_assabet.c
@@ -11,11 +11,11 @@
 #include <linux/device.h>
 #include <linux/init.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/irq.h>
 #include <asm/signal.h>
-#include <asm/arch/assabet.h>
+#include <mach/assabet.h>
 
 #include "sa1100_generic.h"
 
diff --git a/drivers/pcmcia/sa1100_badge4.c b/drivers/pcmcia/sa1100_badge4.c
index 607c3f326eca..1ca9737ea79e 100644
--- a/drivers/pcmcia/sa1100_badge4.c
+++ b/drivers/pcmcia/sa1100_badge4.c
@@ -18,9 +18,9 @@
 #include <linux/errno.h>
 #include <linux/init.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
-#include <asm/arch/badge4.h>
+#include <mach/badge4.h>
 #include <asm/hardware/sa1111.h>
 
 #include "sa1111_generic.h"
diff --git a/drivers/pcmcia/sa1100_cerf.c b/drivers/pcmcia/sa1100_cerf.c
index 7c3951a2675d..63e6bc431a0d 100644
--- a/drivers/pcmcia/sa1100_cerf.c
+++ b/drivers/pcmcia/sa1100_cerf.c
@@ -11,10 +11,10 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/irq.h>
-#include <asm/arch/cerf.h>
+#include <mach/cerf.h>
 #include "sa1100_generic.h"
 
 #define CERF_SOCKET     1
diff --git a/drivers/pcmcia/sa1100_h3600.c b/drivers/pcmcia/sa1100_h3600.c
index e5491879acd9..6de4e1b41d60 100644
--- a/drivers/pcmcia/sa1100_h3600.c
+++ b/drivers/pcmcia/sa1100_h3600.c
@@ -11,10 +11,10 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
-#include <asm/arch/h3600.h>
+#include <mach/h3600.h>
 
 #include "sa1100_generic.h"
 
diff --git a/drivers/pcmcia/sa1100_jornada720.c b/drivers/pcmcia/sa1100_jornada720.c
index 2167e6714d2d..57ca085473d5 100644
--- a/drivers/pcmcia/sa1100_jornada720.c
+++ b/drivers/pcmcia/sa1100_jornada720.c
@@ -10,7 +10,7 @@
 #include <linux/errno.h>
 #include <linux/init.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/hardware/sa1111.h>
 #include <asm/mach-types.h>
 
diff --git a/drivers/pcmcia/sa1100_neponset.c b/drivers/pcmcia/sa1100_neponset.c
index 687492fcd5b4..4c41e86ccff9 100644
--- a/drivers/pcmcia/sa1100_neponset.c
+++ b/drivers/pcmcia/sa1100_neponset.c
@@ -9,9 +9,9 @@
 #include <linux/errno.h>
 #include <linux/init.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
-#include <asm/arch/neponset.h>
+#include <mach/neponset.h>
 #include <asm/hardware/sa1111.h>
 
 #include "sa1111_generic.h"
diff --git a/drivers/pcmcia/sa1100_shannon.c b/drivers/pcmcia/sa1100_shannon.c
index 494912fccc0d..46d8c1977c2a 100644
--- a/drivers/pcmcia/sa1100_shannon.c
+++ b/drivers/pcmcia/sa1100_shannon.c
@@ -9,9 +9,9 @@
 #include <linux/device.h>
 #include <linux/init.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
-#include <asm/arch/shannon.h>
+#include <mach/shannon.h>
 #include <asm/irq.h>
 #include "sa1100_generic.h"
 
diff --git a/drivers/pcmcia/sa1100_simpad.c b/drivers/pcmcia/sa1100_simpad.c
index 42567de894b9..33a08ae09fdf 100644
--- a/drivers/pcmcia/sa1100_simpad.c
+++ b/drivers/pcmcia/sa1100_simpad.c
@@ -9,10 +9,10 @@
 #include <linux/device.h>
 #include <linux/init.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/irq.h>
-#include <asm/arch/simpad.h>
+#include <mach/simpad.h>
 #include "sa1100_generic.h"
  
 extern long get_cs3_shadow(void);
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index 658cddfbcf29..6924d0ea8d32 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -14,7 +14,7 @@
 
 #include <pcmcia/ss.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/hardware/sa1111.h>
 #include <asm/io.h>
 #include <asm/irq.h>
diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index 31a7abc55b23..7cb1273202cc 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -37,7 +37,7 @@
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/system.h>
diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c
index 8c21446996f2..c48f3f69bdaf 100644
--- a/drivers/pcmcia/soc_common.c
+++ b/drivers/pcmcia/soc_common.c
@@ -43,7 +43,7 @@
 #include <linux/spinlock.h>
 #include <linux/cpufreq.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/system.h>
 
@@ -51,7 +51,7 @@
 
 /* FIXME: platform dependent resource declaration has to move out of this file */
 #ifdef CONFIG_ARCH_PXA
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 #endif
 
 #ifdef DEBUG
diff --git a/drivers/power/palmtx_battery.c b/drivers/power/palmtx_battery.c
index 244bb273a637..7035bfa41c62 100644
--- a/drivers/power/palmtx_battery.c
+++ b/drivers/power/palmtx_battery.c
@@ -22,7 +22,7 @@
 #include <linux/gpio.h>
 
 #include <asm/mach-types.h>
-#include <asm/arch/palmtx.h>
+#include <mach/palmtx.h>
 
 static DEFINE_MUTEX(bat_lock);
 static struct work_struct bat_work;
diff --git a/drivers/power/tosa_battery.c b/drivers/power/tosa_battery.c
index bf664fbd6610..2eab35aab311 100644
--- a/drivers/power/tosa_battery.c
+++ b/drivers/power/tosa_battery.c
@@ -19,7 +19,7 @@
 #include <linux/gpio.h>
 
 #include <asm/mach-types.h>
-#include <asm/arch/tosa.h>
+#include <mach/tosa.h>
 
 static DEFINE_MUTEX(bat_lock); /* protects gpio pins */
 static struct work_struct bat_work;
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c
index cd32d05db773..4e888cc8be5b 100644
--- a/drivers/rtc/rtc-at91rm9200.c
+++ b/drivers/rtc/rtc-at91rm9200.c
@@ -29,7 +29,7 @@
 #include <linux/completion.h>
 
 #include <asm/uaccess.h>
-#include <asm/arch/at91_rtc.h>
+#include <mach/at91_rtc.h>
 
 
 #define AT91_RTC_FREQ           1
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c
index f0246ef413a4..2133f37906f2 100644
--- a/drivers/rtc/rtc-at91sam9.c
+++ b/drivers/rtc/rtc-at91sam9.c
@@ -19,8 +19,8 @@
 #include <linux/interrupt.h>
 #include <linux/ioctl.h>
 
-#include <asm/arch/board.h>
-#include <asm/arch/at91_rtt.h>
+#include <mach/board.h>
+#include <mach/at91_rtt.h>
 
 
 /*
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c
index 856cc1af40df..35dcc06eb3e2 100644
--- a/drivers/rtc/rtc-dev.c
+++ b/drivers/rtc/rtc-dev.c
@@ -13,7 +13,6 @@
 
 #include <linux/module.h>
 #include <linux/rtc.h>
-#include <linux/smp_lock.h>
 #include "rtc-core.h"
 
 static dev_t rtc_devt;
@@ -27,11 +26,8 @@ static int rtc_dev_open(struct inode *inode, struct file *file)
                                         struct rtc_device, char_dev);
         const struct rtc_class_ops *ops = rtc->ops;
 
-        lock_kernel();
-        if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags)) {
-                err = -EBUSY;
-                goto out;
-        }
+        if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags))
+                return -EBUSY;
 
         file->private_data = rtc;
 
@@ -41,13 +37,11 @@ static int rtc_dev_open(struct inode *inode, struct file *file)
                 rtc->irq_data = 0;
                 spin_unlock_irq(&rtc->irq_lock);
 
-                goto out;
+                return 0;
         }
 
         /* something has gone wrong */
         clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags);
-out:
-        unlock_kernel();
         return err;
 }
 
diff --git a/drivers/rtc/rtc-ep93xx.c b/drivers/rtc/rtc-ep93xx.c
index 1e99325270df..36e4ac0bd69c 100644
--- a/drivers/rtc/rtc-ep93xx.c
+++ b/drivers/rtc/rtc-ep93xx.c
@@ -12,7 +12,7 @@
 #include <linux/module.h>
 #include <linux/rtc.h>
 #include <linux/platform_device.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #define EP93XX_RTC_REG(x)       (EP93XX_RTC_BASE + (x))
 #define EP93XX_RTC_DATA         EP93XX_RTC_REG(0x0000)
diff --git a/drivers/rtc/rtc-isl1208.c b/drivers/rtc/rtc-isl1208.c
index fbb90b1e4098..a81adab6e515 100644
--- a/drivers/rtc/rtc-isl1208.c
+++ b/drivers/rtc/rtc-isl1208.c
@@ -482,7 +482,7 @@ isl1208_sysfs_register(struct device *dev)
 static int
 isl1208_sysfs_unregister(struct device *dev)
 {
-        device_remove_file(dev, &dev_attr_atrim);
+        device_remove_file(dev, &dev_attr_dtrim);
         device_remove_file(dev, &dev_attr_atrim);
         device_remove_file(dev, &dev_attr_usr);
 
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 54b1ebb01502..e7d19b6c265a 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -22,7 +22,7 @@
 #include <linux/clk.h>
 #include <linux/log2.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
 #include <asm/irq.h>
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c
index f47294c60148..66a9bb85bbe8 100644
--- a/drivers/rtc/rtc-sa1100.c
+++ b/drivers/rtc/rtc-sa1100.c
@@ -31,11 +31,11 @@
 #include <linux/pm.h>
 #include <linux/bitops.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 
 #ifdef CONFIG_ARCH_PXA
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 #endif
 
 #define TIMER_FREQ              CLOCK_TICK_RATE
diff --git a/drivers/sbus/sbus.c b/drivers/sbus/sbus.c
index 73a86d09bba8..9c129248466c 100644
--- a/drivers/sbus/sbus.c
+++ b/drivers/sbus/sbus.c
@@ -7,13 +7,13 @@
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/device.h>
+#include <linux/of_device.h>
 
 #include <asm/system.h>
 #include <asm/sbus.h>
 #include <asm/dma.h>
 #include <asm/oplib.h>
 #include <asm/prom.h>
-#include <asm/of_device.h>
 #include <asm/bpp.h>
 #include <asm/irq.h>
 
diff --git a/drivers/scsi/arm/acornscsi-io.S b/drivers/scsi/arm/acornscsi-io.S
index 5cebe3105260..22171b2110a8 100644
--- a/drivers/scsi/arm/acornscsi-io.S
+++ b/drivers/scsi/arm/acornscsi-io.S
@@ -8,7 +8,7 @@
 #include <linux/linkage.h>
 
 #include <asm/assembler.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #if defined(__APCS_32__)
 #define LOADREGS(t,r,l...)      ldm##t  r, l
diff --git a/drivers/scsi/device_handler/scsi_dh_alua.c b/drivers/scsi/device_handler/scsi_dh_alua.c
index fcdd73f25625..994da56fffed 100644
--- a/drivers/scsi/device_handler/scsi_dh_alua.c
+++ b/drivers/scsi/device_handler/scsi_dh_alua.c
@@ -680,7 +680,7 @@ static int alua_prep_fn(struct scsi_device *sdev, struct request *req)
 
 }
 
-const struct scsi_dh_devlist alua_dev_list[] = {
+static const struct scsi_dh_devlist alua_dev_list[] = {
         {"HP", "MSA VOLUME" },
         {"HP", "HSV101" },
         {"HP", "HSV111" },
diff --git a/drivers/scsi/device_handler/scsi_dh_emc.c b/drivers/scsi/device_handler/scsi_dh_emc.c
index aa46b131b20e..b9d23e9e9a44 100644
--- a/drivers/scsi/device_handler/scsi_dh_emc.c
+++ b/drivers/scsi/device_handler/scsi_dh_emc.c
@@ -562,7 +562,7 @@ done:
         return result;
 }
 
-const struct scsi_dh_devlist clariion_dev_list[] = {
+static const struct scsi_dh_devlist clariion_dev_list[] = {
         {"DGC", "RAID"},
         {"DGC", "DISK"},
         {"DGC", "VRAID"},
diff --git a/drivers/scsi/device_handler/scsi_dh_hp_sw.c b/drivers/scsi/device_handler/scsi_dh_hp_sw.c
index 9c7a1f8ebb72..a6a4ef3ad51c 100644
--- a/drivers/scsi/device_handler/scsi_dh_hp_sw.c
+++ b/drivers/scsi/device_handler/scsi_dh_hp_sw.c
@@ -282,7 +282,7 @@ static int hp_sw_activate(struct scsi_device *sdev)
         return ret;
 }
 
-const struct scsi_dh_devlist hp_sw_dh_data_list[] = {
+static const struct scsi_dh_devlist hp_sw_dh_data_list[] = {
         {"COMPAQ", "MSA1000 VOLUME"},
         {"COMPAQ", "HSV110"},
         {"HP", "HSV100"},
diff --git a/drivers/scsi/device_handler/scsi_dh_rdac.c b/drivers/scsi/device_handler/scsi_dh_rdac.c
index 518da832ad26..2dee69da35cf 100644
--- a/drivers/scsi/device_handler/scsi_dh_rdac.c
+++ b/drivers/scsi/device_handler/scsi_dh_rdac.c
@@ -575,7 +575,7 @@ static int rdac_check_sense(struct scsi_device *sdev,
         return SCSI_RETURN_NOT_HANDLED;
 }
 
-const struct scsi_dh_devlist rdac_dev_list[] = {
+static const struct scsi_dh_devlist rdac_dev_list[] = {
         {"IBM", "1722"},
         {"IBM", "1724"},
         {"IBM", "1726"},
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index 6558a4037806..f31c6698419c 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -19,7 +19,7 @@
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 #include <asm/hardware/dec21285.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #define BAUD_BASE               (mem_fclk_21285/64)
 
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 3b4a14e355c1..77cb34270fc1 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -449,6 +449,7 @@ config SERIAL_CLPS711X_CONSOLE
 config SERIAL_SAMSUNG
         tristate "Samsung SoC serial support"
         depends on ARM && PLAT_S3C24XX
+        select SERIAL_CORE
         help
           Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
           providing /dev/ttySAC0, 1 and 2 (note, some machines may not
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 1fee12c1f4f8..3a6da80b081c 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -42,11 +42,11 @@
 #include <asm/io.h>
 
 #include <asm/mach/serial_at91.h>
-#include <asm/arch/board.h>
+#include <mach/board.h>
 
 #ifdef CONFIG_ARM
-#include <asm/arch/cpu.h>
-#include <asm/arch/gpio.h>
+#include <mach/cpu.h>
+#include <mach/gpio.h>
 #endif
 
 #define PDC_BUFFER_SIZE         512
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c
index fc1fa9267c59..459f3420a429 100644
--- a/drivers/serial/clps711x.c
+++ b/drivers/serial/clps711x.c
@@ -39,7 +39,7 @@
 #include <linux/serial_core.h>
 #include <linux/serial.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/hardware/clps7111.h>
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index e0da4dc7bbf6..6a29f9330a73 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -44,8 +44,8 @@
 
 #include <asm/io.h>
 #include <asm/irq.h>
-#include <asm/hardware.h>
-#include <asm/arch/imx-uart.h>
+#include <mach/hardware.h>
+#include <mach/imx-uart.h>
 
 /* Register definitions */
 #define URXD0 0x0  /* Receiver Register */
diff --git a/drivers/serial/netx-serial.c b/drivers/serial/netx-serial.c
index 9f8ccb735c19..3f489329e8d3 100644
--- a/drivers/serial/netx-serial.c
+++ b/drivers/serial/netx-serial.c
@@ -35,8 +35,8 @@
 
 #include <asm/io.h>
 #include <asm/irq.h>
-#include <asm/hardware.h>
-#include <asm/arch/netx-regs.h>
+#include <mach/hardware.h>
+#include <mach/netx-regs.h>
 
 /* We've been assigned a range on the "Low-density serial ports" major */
 #define SERIAL_NX_MAJOR 204
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index b9a93f326fb8..f7a0d37c4221 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -45,9 +45,9 @@
 #include <linux/clk.h>
 
 #include <asm/io.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 
 
 struct uart_pxa_port {
diff --git a/drivers/serial/s3c2400.c b/drivers/serial/s3c2400.c
index a1102053e553..c8b4266ac35f 100644
--- a/drivers/serial/s3c2400.c
+++ b/drivers/serial/s3c2400.c
@@ -17,10 +17,10 @@
 
 #include <asm/irq.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include <asm/plat-s3c/regs-serial.h>
-#include <asm/arch/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 #include "samsung.h"
 
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
index c5f03f41686f..40a2531b5541 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/serial/s3c2410.c
@@ -19,10 +19,10 @@
 #include <linux/serial.h>
 
 #include <asm/irq.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include <asm/plat-s3c/regs-serial.h>
-#include <asm/arch/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 #include "samsung.h"
 
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index ce0c220e3e92..d0170319c729 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -19,10 +19,10 @@
 #include <linux/serial.h>
 
 #include <asm/irq.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include <asm/plat-s3c/regs-serial.h>
-#include <asm/arch/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 #include "samsung.h"
 
diff --git a/drivers/serial/s3c2440.c b/drivers/serial/s3c2440.c
index 38f954bd39c6..d4a2b17b2498 100644
--- a/drivers/serial/s3c2440.c
+++ b/drivers/serial/s3c2440.c
@@ -19,10 +19,10 @@
 #include <linux/serial.h>
 
 #include <asm/irq.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include <asm/plat-s3c/regs-serial.h>
-#include <asm/arch/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 #include "samsung.h"
 
diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c
index a5e76cc18073..b24a25ea6bc5 100644
--- a/drivers/serial/sa1100.c
+++ b/drivers/serial/sa1100.c
@@ -39,7 +39,7 @@
 
 #include <asm/io.h>
 #include <asm/irq.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach/serial_sa1100.h>
 
 /* We've been assigned a range on the "Low-density serial ports" major */
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index d852f83f8900..5a88b3f9fe9b 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -45,10 +45,10 @@
 
 #include <asm/irq.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include <asm/plat-s3c/regs-serial.h>
-#include <asm/arch/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 #include "samsung.h"
 
diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c
index 0edbc5dd378b..b9cbfc87f616 100644
--- a/drivers/serial/serial_ks8695.c
+++ b/drivers/serial/serial_ks8695.c
@@ -26,8 +26,8 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 
-#include <asm/arch/regs-uart.h>
-#include <asm/arch/regs-irq.h>
+#include <mach/regs-uart.h>
+#include <mach/regs-irq.h>
 
 #if defined(CONFIG_SERIAL_KS8695_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
diff --git a/drivers/serial/sunhv.c b/drivers/serial/sunhv.c
index aeeec5588afd..e41766d08035 100644
--- a/drivers/serial/sunhv.c
+++ b/drivers/serial/sunhv.c
@@ -17,11 +17,11 @@
 #include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/init.h>
+#include <linux/of_device.h>
 
 #include <asm/hypervisor.h>
 #include <asm/spitfire.h>
 #include <asm/prom.h>
-#include <asm/of_device.h>
 #include <asm/irq.h>
 
 #if defined(CONFIG_MAGIC_SYSRQ)
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c
index 15ee497e1c78..29b4458abf74 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/serial/sunsab.c
@@ -32,11 +32,11 @@
 #include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/init.h>
+#include <linux/of_device.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
-#include <asm/of_device.h>
 
 #if defined(CONFIG_SERIAL_SUNSAB_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index e24e68235088..a378464f9292 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -35,11 +35,11 @@
 #include <linux/serial_reg.h>
 #include <linux/init.h>
 #include <linux/delay.h>
+#include <linux/of_device.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
-#include <asm/of_device.h>
 
 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c
index 0f3d69b86d67..3cb4c8aee13f 100644
--- a/drivers/serial/sunzilog.c
+++ b/drivers/serial/sunzilog.c
@@ -32,11 +32,11 @@
 #include <linux/serio.h>
 #endif
 #include <linux/init.h>
+#include <linux/of_device.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
-#include <asm/of_device.h>
 
 #if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 95190c619c10..02f9320f3efc 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -20,9 +20,9 @@
 #include <linux/spi/spi.h>
 
 #include <asm/io.h>
-#include <asm/arch/board.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/cpu.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/cpu.h>
 
 #include "atmel_spi.h"
 
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index f6f987bb71ca..9d2186fd74aa 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -35,8 +35,8 @@
 
 #include <linux/spi/spi.h>
 
-#include <asm/arch/dma.h>
-#include <asm/arch/clock.h>
+#include <mach/dma.h>
+#include <mach/clock.h>
 
 
 #define OMAP2_MCSPI_MAX_FREQ            48000000
diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c
index d9ae111c27ae..5515eb97d7c5 100644
--- a/drivers/spi/omap_uwire.c
+++ b/drivers/spi/omap_uwire.c
@@ -47,12 +47,12 @@
 
 #include <asm/system.h>
 #include <asm/irq.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/mach-types.h>
 
-#include <asm/arch/mux.h>
-#include <asm/arch/omap730.h>   /* OMAP730_IO_CONF registers */
+#include <mach/mux.h>
+#include <mach/omap730.h>       /* OMAP730_IO_CONF registers */
 
 
 /* FIXME address is now a platform device resource,
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 067299d6d192..34c7c9875681 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -31,15 +31,14 @@
 
 #include <asm/io.h>
 #include <asm/irq.h>
-#include <asm/hardware.h>
 #include <asm/delay.h>
 #include <asm/dma.h>
 
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/regs-ssp.h>
-#include <asm/arch/ssp.h>
-#include <asm/arch/pxa2xx_spi.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/regs-ssp.h>
+#include <mach/ssp.h>
+#include <mach/pxa2xx_spi.h>
 
 MODULE_AUTHOR("Stephen Street");
 MODULE_DESCRIPTION("PXA2xx SSP SPI Controller");
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 964124b60db2..75e86865234c 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -226,10 +226,11 @@ EXPORT_SYMBOL_GPL(spi_alloc_device);
  * Companion function to spi_alloc_device.  Devices allocated with
  * spi_alloc_device can be added onto the spi bus with this function.
  *
- * Returns 0 on success; non-zero on failure
+ * Returns 0 on success; negative errno on failure
  */
 int spi_add_device(struct spi_device *spi)
 {
+        static DEFINE_MUTEX(spi_add_lock);
         struct device *dev = spi->master->dev.parent;
         int status;
 
@@ -246,26 +247,43 @@ int spi_add_device(struct spi_device *spi)
                         "%s.%u", spi->master->dev.bus_id,
                         spi->chip_select);
 
-        /* drivers may modify this initial i/o setup */
+
+        /* We need to make sure there's no other device with this
+         * chipselect **BEFORE** we call setup(), else we'll trash
+         * its configuration.  Lock against concurrent add() calls.
+         */
+        mutex_lock(&spi_add_lock);
+
+        if (bus_find_device_by_name(&spi_bus_type, NULL, spi->dev.bus_id)
+                        != NULL) {
+                dev_err(dev, "chipselect %d already in use\n",
+                                spi->chip_select);
+                status = -EBUSY;
+                goto done;
+        }
+
+        /* Drivers may modify this initial i/o setup, but will
+         * normally rely on the device being setup.  Devices
+         * using SPI_CS_HIGH can't coexist well otherwise...
+         */
         status = spi->master->setup(spi);
         if (status < 0) {
                 dev_err(dev, "can't %s %s, status %d\n",
                                 "setup", spi->dev.bus_id, status);
-                return status;
+                goto done;
         }
 
-        /* driver core catches callers that misbehave by defining
-         * devices that already exist.
-         */
+        /* Device may be bound to an active driver when this returns */
         status = device_add(&spi->dev);
-        if (status < 0) {
+        if (status < 0)
                 dev_err(dev, "can't %s %s, status %d\n",
                                 "add", spi->dev.bus_id, status);
-                return status;
-        }
+        else
+                dev_dbg(dev, "registered child %s\n", spi->dev.bus_id);
 
-        dev_dbg(dev, "registered child %s\n", spi->dev.bus_id);
-        return 0;
+done:
+        mutex_unlock(&spi_add_lock);
+        return status;
 }
 EXPORT_SYMBOL_GPL(spi_add_device);
 
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
index 6fb77fcc4971..61ba147e384d 100644
--- a/drivers/spi/spi_imx.c
+++ b/drivers/spi/spi_imx.c
@@ -33,12 +33,11 @@
 
 #include <asm/io.h>
 #include <asm/irq.h>
-#include <asm/hardware.h>
 #include <asm/delay.h>
 
-#include <asm/arch/hardware.h>
-#include <asm/arch/imx-dma.h>
-#include <asm/arch/spi_imx.h>
+#include <mach/hardware.h>
+#include <mach/imx-dma.h>
+#include <mach/spi_imx.h>
 
 /*-------------------------------------------------------------------------*/
 /* SPI Registers offsets from peripheral base address */
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index 21661c7959c8..98abc73c1a1d 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -25,11 +25,11 @@
 
 #include <asm/io.h>
 #include <asm/dma.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
-#include <asm/arch/regs-gpio.h>
+#include <mach/regs-gpio.h>
 #include <asm/plat-s3c24xx/regs-spi.h>
-#include <asm/arch/spi.h>
+#include <mach/spi.h>
 
 struct s3c24xx_spi {
         /* bitbang has to be first */
diff --git a/drivers/spi/spi_s3c24xx_gpio.c b/drivers/spi/spi_s3c24xx_gpio.c
index e33f6145c560..cc1f647f579b 100644
--- a/drivers/spi/spi_s3c24xx_gpio.c
+++ b/drivers/spi/spi_s3c24xx_gpio.c
@@ -21,9 +21,9 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/spi_bitbang.h>
 
-#include <asm/arch/regs-gpio.h>
-#include <asm/arch/spi-gpio.h>
-#include <asm/hardware.h>
+#include <mach/regs-gpio.h>
+#include <mach/spi-gpio.h>
+#include <mach/hardware.h>
 
 struct s3c2410_spigpio {
         struct spi_bitbang               bitbang;
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index d831a2beff39..87ab2443e66d 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1165,15 +1165,19 @@ EXPORT_SYMBOL(ssb_dma_translation);
 
 int ssb_dma_set_mask(struct ssb_device *dev, u64 mask)
 {
+#ifdef CONFIG_SSB_PCIHOST
         int err;
+#endif
 
         switch (dev->bus->bustype) {
         case SSB_BUSTYPE_PCI:
+#ifdef CONFIG_SSB_PCIHOST
                 err = pci_set_dma_mask(dev->bus->host_pci, mask);
                 if (err)
                         return err;
                 err = pci_set_consistent_dma_mask(dev->bus->host_pci, mask);
                 return err;
+#endif
         case SSB_BUSTYPE_SSB:
                 return dma_set_mask(dev->dev, mask);
         default:
@@ -1188,6 +1192,7 @@ void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
 {
         switch (dev->bus->bustype) {
         case SSB_BUSTYPE_PCI:
+#ifdef CONFIG_SSB_PCIHOST
                 if (gfp_flags & GFP_DMA) {
                         /* Workaround: The PCI API does not support passing
                          * a GFP flag. */
@@ -1195,6 +1200,7 @@ void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
                                                   size, dma_handle, gfp_flags);
                 }
                 return pci_alloc_consistent(dev->bus->host_pci, size, dma_handle);
+#endif
         case SSB_BUSTYPE_SSB:
                 return dma_alloc_coherent(dev->dev, size, dma_handle, gfp_flags);
         default:
@@ -1210,6 +1216,7 @@ void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
 {
         switch (dev->bus->bustype) {
         case SSB_BUSTYPE_PCI:
+#ifdef CONFIG_SSB_PCIHOST
                 if (gfp_flags & GFP_DMA) {
                         /* Workaround: The PCI API does not support passing
                          * a GFP flag. */
@@ -1220,6 +1227,7 @@ void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
                 pci_free_consistent(dev->bus->host_pci, size,
                                     vaddr, dma_handle);
                 return;
+#endif
         case SSB_BUSTYPE_SSB:
                 dma_free_coherent(dev->dev, size, vaddr, dma_handle);
                 return;
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 755823cdf62a..bcefbddeba50 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -95,16 +95,18 @@ config USB
 
 source "drivers/usb/core/Kconfig"
 
+source "drivers/usb/mon/Kconfig"
+
 source "drivers/usb/host/Kconfig"
 
+source "drivers/usb/musb/Kconfig"
+
 source "drivers/usb/class/Kconfig"
 
 source "drivers/usb/storage/Kconfig"
 
 source "drivers/usb/image/Kconfig"
 
-source "drivers/usb/mon/Kconfig"
-
 comment "USB port drivers"
         depends on USB
 
diff --git a/drivers/usb/atm/cxacru.c b/drivers/usb/atm/cxacru.c
index 507a9bd0d77c..9aea43a8c4ad 100644
--- a/drivers/usb/atm/cxacru.c
+++ b/drivers/usb/atm/cxacru.c
@@ -602,7 +602,7 @@ static int cxacru_cm_get_array(struct cxacru_data *instance, enum cxacru_cm_requ
                         offd = le32_to_cpu(buf[offb++]);
                         if (offd >= size) {
                                 if (printk_ratelimit())
-                                        usb_err(instance->usbatm, "wrong index #%x in response to cm #%x\n",
+                                        usb_err(instance->usbatm, "wrong index %#x in response to cm %#x\n",
                                                 offd, cm);
                                 ret = -EIO;
                                 goto cleanup;
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 0725b1871f23..efc4373ededb 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -51,6 +51,7 @@
  */
 
 #undef DEBUG
+#undef VERBOSE_DEBUG
 
 #include <linux/kernel.h>
 #include <linux/errno.h>
@@ -70,6 +71,9 @@
 
 #include "cdc-acm.h"
 
+
+#define ACM_CLOSE_TIMEOUT       15      /* seconds to let writes drain */
+
 /*
  * Version Information
  */
@@ -85,6 +89,12 @@ static DEFINE_MUTEX(open_mutex);
 
 #define ACM_READY(acm)  (acm && acm->dev && acm->used)
 
+#ifdef VERBOSE_DEBUG
+#define verbose 1
+#else
+#define verbose 0
+#endif
+
 /*
  * Functions for ACM control messages.
  */
@@ -136,19 +146,17 @@ static int acm_wb_alloc(struct acm *acm)
 static int acm_wb_is_avail(struct acm *acm)
 {
         int i, n;
+        unsigned long flags;
 
         n = ACM_NW;
+        spin_lock_irqsave(&acm->write_lock, flags);
         for (i = 0; i < ACM_NW; i++) {
                 n -= acm->wb[i].use;
         }
+        spin_unlock_irqrestore(&acm->write_lock, flags);
         return n;
 }
 
-static inline int acm_wb_is_used(struct acm *acm, int wbn)
-{
-        return acm->wb[wbn].use;
-}
-
 /*
  * Finish write.
  */
@@ -157,7 +165,6 @@ static void acm_write_done(struct acm *acm, struct acm_wb *wb)
         unsigned long flags;
 
         spin_lock_irqsave(&acm->write_lock, flags);
-        acm->write_ready = 1;
         wb->use = 0;
         acm->transmitting--;
         spin_unlock_irqrestore(&acm->write_lock, flags);
@@ -190,40 +197,25 @@ static int acm_start_wb(struct acm *acm, struct acm_wb *wb)
 static int acm_write_start(struct acm *acm, int wbn)
 {
         unsigned long flags;
-        struct acm_wb *wb;
+        struct acm_wb *wb = &acm->wb[wbn];
         int rc;
 
         spin_lock_irqsave(&acm->write_lock, flags);
         if (!acm->dev) {
+                wb->use = 0;
                 spin_unlock_irqrestore(&acm->write_lock, flags);
                 return -ENODEV;
         }
 
-        if (!acm->write_ready) {
-                spin_unlock_irqrestore(&acm->write_lock, flags);
-                return 0;       /* A white lie */
-        }
-
-        wb = &acm->wb[wbn];
-        if(acm_wb_is_avail(acm) <= 1)
-                acm->write_ready = 0;
-
         dbg("%s susp_count: %d", __func__, acm->susp_count);
         if (acm->susp_count) {
-                acm->old_ready = acm->write_ready;
                 acm->delayed_wb = wb;
-                acm->write_ready = 0;
                 schedule_work(&acm->waker);
                 spin_unlock_irqrestore(&acm->write_lock, flags);
                 return 0;       /* A white lie */
         }
         usb_mark_last_busy(acm->dev);
 
-        if (!acm_wb_is_used(acm, wbn)) {
-                spin_unlock_irqrestore(&acm->write_lock, flags);
-                return 0;
-        }
-
         rc = acm_start_wb(acm, wb);
         spin_unlock_irqrestore(&acm->write_lock, flags);
 
@@ -488,22 +480,28 @@ urbs:
 /* data interface wrote those outgoing bytes */
 static void acm_write_bulk(struct urb *urb)
 {
-        struct acm *acm;
         struct acm_wb *wb = urb->context;
+        struct acm *acm = wb->instance;
 
-        dbg("Entering acm_write_bulk with status %d", urb->status);
+        if (verbose || urb->status
+                        || (urb->actual_length != urb->transfer_buffer_length))
+                dev_dbg(&acm->data->dev, "tx %d/%d bytes -- > %d\n",
+                        urb->actual_length,
+                        urb->transfer_buffer_length,
+                        urb->status);
 
-        acm = wb->instance;
         acm_write_done(acm, wb);
         if (ACM_READY(acm))
                 schedule_work(&acm->work);
+        else
+                wake_up_interruptible(&acm->drain_wait);
 }
 
 static void acm_softint(struct work_struct *work)
 {
         struct acm *acm = container_of(work, struct acm, work);
-        dbg("Entering acm_softint.");
-        
+
+        dev_vdbg(&acm->data->dev, "tx work\n");
         if (!ACM_READY(acm))
                 return;
         tty_wakeup(acm->tty);
@@ -512,7 +510,6 @@ static void acm_softint(struct work_struct *work)
 static void acm_waker(struct work_struct *waker)
 {
         struct acm *acm = container_of(waker, struct acm, waker);
-        long flags;
         int rv;
 
         rv = usb_autopm_get_interface(acm->control);
@@ -524,9 +521,6 @@ static void acm_waker(struct work_struct *waker)
                 acm_start_wb(acm, acm->delayed_wb);
                 acm->delayed_wb = NULL;
         }
-        spin_lock_irqsave(&acm->write_lock, flags);
-        acm->write_ready = acm->old_ready;
-        spin_unlock_irqrestore(&acm->write_lock, flags);
         usb_autopm_put_interface(acm->control);
 }
 
@@ -628,6 +622,8 @@ static void acm_tty_unregister(struct acm *acm)
         kfree(acm);
 }
 
+static int acm_tty_chars_in_buffer(struct tty_struct *tty);
+
 static void acm_tty_close(struct tty_struct *tty, struct file *filp)
 {
         struct acm *acm = tty->driver_data;
@@ -642,6 +638,13 @@ static void acm_tty_close(struct tty_struct *tty, struct file *filp)
                 if (acm->dev) {
                         usb_autopm_get_interface(acm->control);
                         acm_set_control(acm, acm->ctrlout = 0);
+
+                        /* try letting the last writes drain naturally */
+                        wait_event_interruptible_timeout(acm->drain_wait,
+                                        (ACM_NW == acm_wb_is_avail(acm))
+                                                || !acm->dev,
+                                        ACM_CLOSE_TIMEOUT * HZ);
+
                         usb_kill_urb(acm->ctrlurb);
                         for (i = 0; i < ACM_NW; i++)
                                 usb_kill_urb(acm->wb[i].urb);
@@ -697,7 +700,7 @@ static int acm_tty_write_room(struct tty_struct *tty)
          * Do not let the line discipline to know that we have a reserve,
          * or it might get too enthusiastic.
          */
-        return (acm->write_ready && acm_wb_is_avail(acm)) ? acm->writesize : 0;
+        return acm_wb_is_avail(acm) ? acm->writesize : 0;
 }
 
 static int acm_tty_chars_in_buffer(struct tty_struct *tty)
@@ -1072,11 +1075,11 @@ skip_normal_probe:
         acm->urb_task.data = (unsigned long) acm;
         INIT_WORK(&acm->work, acm_softint);
         INIT_WORK(&acm->waker, acm_waker);
+        init_waitqueue_head(&acm->drain_wait);
         spin_lock_init(&acm->throttle_lock);
         spin_lock_init(&acm->write_lock);
         spin_lock_init(&acm->read_lock);
         mutex_init(&acm->mutex);
-        acm->write_ready = 1;
         acm->rx_endpoint = usb_rcvbulkpipe(usb_dev, epread->bEndpointAddress);
 
         buf = usb_buffer_alloc(usb_dev, ctrlsize, GFP_KERNEL, &acm->ctrl_dma);
@@ -1108,9 +1111,11 @@ skip_normal_probe:
                 rcv->instance = acm;
         }
         for (i = 0; i < num_rx_buf; i++) {
-                struct acm_rb *buf = &(acm->rb[i]);
+                struct acm_rb *rb = &(acm->rb[i]);
 
-                if (!(buf->base = usb_buffer_alloc(acm->dev, readsize, GFP_KERNEL, &buf->dma))) {
+                rb->base = usb_buffer_alloc(acm->dev, readsize,
+                                GFP_KERNEL, &rb->dma);
+                if (!rb->base) {
                         dev_dbg(&intf->dev, "out of memory (read bufs usb_buffer_alloc)\n");
                         goto alloc_fail7;
                 }
@@ -1172,6 +1177,7 @@ skip_countries:
         acm_set_line(acm, &acm->line);
 
         usb_driver_claim_interface(&acm_driver, data_interface, acm);
+        usb_set_intfdata(data_interface, acm);
 
         usb_get_intf(control_interface);
         tty_register_device(acm_tty_driver, minor, &control_interface->dev);
@@ -1221,11 +1227,11 @@ static void acm_disconnect(struct usb_interface *intf)
         struct acm *acm = usb_get_intfdata(intf);
         struct usb_device *usb_dev = interface_to_usbdev(intf);
 
-        mutex_lock(&open_mutex);
-        if (!acm || !acm->dev) {
-                mutex_unlock(&open_mutex);
+        /* sibling interface is already cleaning up */
+        if (!acm)
                 return;
-        }
+
+        mutex_lock(&open_mutex);
         if (acm->country_codes){
                 device_remove_file(&acm->control->dev,
                                 &dev_attr_wCountryCodes);
diff --git a/drivers/usb/class/cdc-acm.h b/drivers/usb/class/cdc-acm.h
index 85c3aaaab7c5..1f95e7aa1b66 100644
--- a/drivers/usb/class/cdc-acm.h
+++ b/drivers/usb/class/cdc-acm.h
@@ -106,8 +106,6 @@ struct acm {
         struct list_head spare_read_bufs;
         struct list_head filled_read_bufs;
         int write_used;                                 /* number of non-empty write buffers */
-        int write_ready;                                /* write urb is not running */
-        int old_ready;
         int processing;
         int transmitting;
         spinlock_t write_lock;
@@ -115,6 +113,7 @@ struct acm {
         struct usb_cdc_line_coding line;                /* bits, stop, parity */
         struct work_struct work;                        /* work queue entry for line discipline waking up */
         struct work_struct waker;
+        wait_queue_head_t drain_wait;                   /* close processing */
         struct tasklet_struct urb_task;                 /* rx processing */
         spinlock_t throttle_lock;                       /* synchronize throtteling and read callback */
         unsigned int ctrlin;                            /* input control lines (DCD, DSR, RI, break, overruns) */
diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c
index ddb54e14a5c5..2be37fe466f2 100644
--- a/drivers/usb/core/driver.c
+++ b/drivers/usb/core/driver.c
@@ -774,7 +774,6 @@ void usb_deregister(struct usb_driver *driver)
 }
 EXPORT_SYMBOL_GPL(usb_deregister);
 
-
 /* Forced unbinding of a USB interface driver, either because
  * it doesn't support pre_reset/post_reset/reset_resume or
  * because it doesn't support suspend/resume.
@@ -821,6 +820,8 @@ void usb_rebind_intf(struct usb_interface *intf)
                 dev_warn(&intf->dev, "rebind failed: %d\n", rc);
 }
 
+#ifdef CONFIG_PM
+
 #define DO_UNBIND       0
 #define DO_REBIND       1
 
@@ -872,8 +873,6 @@ static void do_unbind_rebind(struct usb_device *udev, int action)
         }
 }
 
-#ifdef CONFIG_PM
-
 /* Caller has locked udev's pm_mutex */
 static int usb_suspend_device(struct usb_device *udev, pm_message_t msg)
 {
diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c
index 586d6f1376cf..286b4431a097 100644
--- a/drivers/usb/core/message.c
+++ b/drivers/usb/core/message.c
@@ -1091,8 +1091,8 @@ void usb_disable_device(struct usb_device *dev, int skip_ep0)
                                 continue;
                         dev_dbg(&dev->dev, "unregistering interface %s\n",
                                 dev_name(&interface->dev));
-                        device_del(&interface->dev);
                         usb_remove_sysfs_intf_files(interface);
+                        device_del(&interface->dev);
                 }
 
                 /* Now that the interfaces are unbound, nobody should
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index c6a8c6b1116a..acc95b2ac6f8 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -284,6 +284,16 @@ config USB_LH7A40X
         default USB_GADGET
         select USB_GADGET_SELECTED
 
+# built in ../musb along with host support
+config USB_GADGET_MUSB_HDRC
+        boolean "Inventra HDRC USB Peripheral (TI, ...)"
+        depends on USB_MUSB_HDRC && (USB_MUSB_PERIPHERAL || USB_MUSB_OTG)
+        select USB_GADGET_DUALSPEED
+        select USB_GADGET_SELECTED
+        help
+          This OTG-capable silicon IP is used in dual designs including
+          the TI DaVinci, OMAP 243x, OMAP 343x, and TUSB 6010.
+
 config USB_GADGET_OMAP
         boolean "OMAP USB Device Controller"
         depends on ARCH_OMAP
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index e2d8a5d86c40..a8a1de413321 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -40,16 +40,15 @@
 #include <linux/usb/gadget.h>
 
 #include <asm/byteorder.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/system.h>
-#include <asm/mach-types.h>
 #include <asm/gpio.h>
 
-#include <asm/arch/board.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/at91sam9261_matrix.h>
+#include <mach/board.h>
+#include <mach/cpu.h>
+#include <mach/at91sam9261_matrix.h>
 
 #include "at91_udc.h"
 
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index 07e5a0b5dcda..ae30ab1d264f 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -22,7 +22,7 @@
 #include <linux/delay.h>
 
 #include <asm/gpio.h>
-#include <asm/arch/board.h>
+#include <mach/board.h>
 
 #include "atmel_usba_udc.h"
 
@@ -334,7 +334,7 @@ static void toggle_bias(int is_on)
 
 #elif defined(CONFIG_ARCH_AT91)
 
-#include <asm/arch/at91_pmc.h>
+#include <mach/at91_pmc.h>
 
 static void toggle_bias(int is_on)
 {
diff --git a/drivers/usb/gadget/dummy_hcd.c b/drivers/usb/gadget/dummy_hcd.c
index 21d1406af9ee..7600a0c78753 100644
--- a/drivers/usb/gadget/dummy_hcd.c
+++ b/drivers/usb/gadget/dummy_hcd.c
@@ -542,13 +542,14 @@ dummy_queue (struct usb_ep *_ep, struct usb_request *_req,
                 req->req.context = dum;
                 req->req.complete = fifo_complete;
 
+                list_add_tail(&req->queue, &ep->queue);
                 spin_unlock (&dum->lock);
                 _req->actual = _req->length;
                 _req->status = 0;
                 _req->complete (_ep, _req);
                 spin_lock (&dum->lock);
-        }
-        list_add_tail (&req->queue, &ep->queue);
+        }  else
+                list_add_tail(&req->queue, &ep->queue);
         spin_unlock_irqrestore (&dum->lock, flags);
 
         /* real hardware would likely enable transfers here, in case
diff --git a/drivers/usb/gadget/f_acm.c b/drivers/usb/gadget/f_acm.c
index d8faccf27895..5ee1590b8e9c 100644
--- a/drivers/usb/gadget/f_acm.c
+++ b/drivers/usb/gadget/f_acm.c
@@ -47,18 +47,37 @@ struct f_acm {
         u8                              ctrl_id, data_id;
         u8                              port_num;
 
-        struct usb_descriptor_header    **fs_function;
+        u8                              pending;
+
+        /* lock is mostly for pending and notify_req ... they get accessed
+         * by callbacks both from tty (open/close/break) under its spinlock,
+         * and notify_req.complete() which can't use that lock.
+         */
+        spinlock_t                      lock;
+
         struct acm_ep_descs             fs;
-        struct usb_descriptor_header    **hs_function;
         struct acm_ep_descs             hs;
 
         struct usb_ep                   *notify;
         struct usb_endpoint_descriptor  *notify_desc;
+        struct usb_request              *notify_req;
 
         struct usb_cdc_line_coding      port_line_coding;       /* 8-N-1 etc */
+
+        /* SetControlLineState request -- CDC 1.1 section 6.2.14 (INPUT) */
         u16                             port_handshake_bits;
-#define RS232_RTS       (1 << 1)        /* unused with full duplex */
-#define RS232_DTR       (1 << 0)        /* host is ready for data r/w */
+#define ACM_CTRL_RTS    (1 << 1)        /* unused with full duplex */
+#define ACM_CTRL_DTR    (1 << 0)        /* host is ready for data r/w */
+
+        /* SerialState notification -- CDC 1.1 section 6.3.5 (OUTPUT) */
+        u16                             serial_state;
+#define ACM_CTRL_OVERRUN        (1 << 6)
+#define ACM_CTRL_PARITY         (1 << 5)
+#define ACM_CTRL_FRAMING        (1 << 4)
+#define ACM_CTRL_RI             (1 << 3)
+#define ACM_CTRL_BRK            (1 << 2)
+#define ACM_CTRL_DSR            (1 << 1)
+#define ACM_CTRL_DCD            (1 << 0)
 };
 
 static inline struct f_acm *func_to_acm(struct usb_function *f)
@@ -66,12 +85,17 @@ static inline struct f_acm *func_to_acm(struct usb_function *f)
         return container_of(f, struct f_acm, port.func);
 }
 
+static inline struct f_acm *port_to_acm(struct gserial *p)
+{
+        return container_of(p, struct f_acm, port);
+}
+
 /*-------------------------------------------------------------------------*/
 
 /* notification endpoint uses smallish and infrequent fixed-size messages */
 
 #define GS_LOG2_NOTIFY_INTERVAL         5       /* 1 << 5 == 32 msec */
-#define GS_NOTIFY_MAXPACKET             8
+#define GS_NOTIFY_MAXPACKET             10      /* notification + 2 bytes */
 
 /* interface and class descriptors: */
 
@@ -117,7 +141,7 @@ static struct usb_cdc_acm_descriptor acm_descriptor __initdata = {
         .bLength =              sizeof(acm_descriptor),
         .bDescriptorType =      USB_DT_CS_INTERFACE,
         .bDescriptorSubType =   USB_CDC_ACM_TYPE,
-        .bmCapabilities =       (1 << 1),
+        .bmCapabilities =       USB_CDC_CAP_LINE,
 };
 
 static struct usb_cdc_union_desc acm_union_desc __initdata = {
@@ -277,6 +301,11 @@ static int acm_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
 
         /* composite driver infrastructure handles everything except
          * CDC class messages; interface activation uses set_alt().
+         *
+         * Note CDC spec table 4 lists the ACM request profile.  It requires
+         * encapsulated command support ... we don't handle any, and respond
+         * to them by stalling.  Options include get/set/clear comm features
+         * (not that useful) and SEND_BREAK.
          */
         switch ((ctrl->bRequestType << 8) | ctrl->bRequest) {
 
@@ -312,7 +341,7 @@ static int acm_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
                 value = 0;
 
                 /* FIXME we should not allow data to flow until the
-                 * host sets the RS232_DTR bit; and when it clears
+                 * host sets the ACM_CTRL_DTR bit; and when it clears
                  * that bit, we should return to that no-flow state.
                  */
                 acm->port_handshake_bits = w_value;
@@ -350,9 +379,6 @@ static int acm_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
         /* we know alt == 0, so this is an activation or a reset */
 
         if (intf == acm->ctrl_id) {
-                /* REVISIT this may need more work when we start to
-                 * send notifications ...
-                 */
                 if (acm->notify->driver_data) {
                         VDBG(cdev, "reset acm control interface %d\n", intf);
                         usb_ep_disable(acm->notify);
@@ -397,6 +423,128 @@ static void acm_disable(struct usb_function *f)
 
 /*-------------------------------------------------------------------------*/
 
+/**
+ * acm_cdc_notify - issue CDC notification to host
+ * @acm: wraps host to be notified
+ * @type: notification type
+ * @value: Refer to cdc specs, wValue field.
+ * @data: data to be sent
+ * @length: size of data
+ * Context: irqs blocked, acm->lock held, acm_notify_req non-null
+ *
+ * Returns zero on sucess or a negative errno.
+ *
+ * See section 6.3.5 of the CDC 1.1 specification for information
+ * about the only notification we issue:  SerialState change.
+ */
+static int acm_cdc_notify(struct f_acm *acm, u8 type, u16 value,
+                void *data, unsigned length)
+{
+        struct usb_ep                   *ep = acm->notify;
+        struct usb_request              *req;
+        struct usb_cdc_notification     *notify;
+        const unsigned                  len = sizeof(*notify) + length;
+        void                            *buf;
+        int                             status;
+
+        req = acm->notify_req;
+        acm->notify_req = NULL;
+        acm->pending = false;
+
+        req->length = len;
+        notify = req->buf;
+        buf = notify + 1;
+
+        notify->bmRequestType = USB_DIR_IN | USB_TYPE_CLASS
+                        | USB_RECIP_INTERFACE;
+        notify->bNotificationType = type;
+        notify->wValue = cpu_to_le16(value);
+        notify->wIndex = cpu_to_le16(acm->ctrl_id);
+        notify->wLength = cpu_to_le16(length);
+        memcpy(buf, data, length);
+
+        status = usb_ep_queue(ep, req, GFP_ATOMIC);
+        if (status < 0) {
+                ERROR(acm->port.func.config->cdev,
+                                "acm ttyGS%d can't notify serial state, %d\n",
+                                acm->port_num, status);
+                acm->notify_req = req;
+        }
+
+        return status;
+}
+
+static int acm_notify_serial_state(struct f_acm *acm)
+{
+        struct usb_composite_dev *cdev = acm->port.func.config->cdev;
+        int                     status;
+
+        spin_lock(&acm->lock);
+        if (acm->notify_req) {
+                DBG(cdev, "acm ttyGS%d serial state %04x\n",
+                                acm->port_num, acm->serial_state);
+                status = acm_cdc_notify(acm, USB_CDC_NOTIFY_SERIAL_STATE,
+                                0, &acm->serial_state, sizeof(acm->serial_state));
+        } else {
+                acm->pending = true;
+                status = 0;
+        }
+        spin_unlock(&acm->lock);
+        return status;
+}
+
+static void acm_cdc_notify_complete(struct usb_ep *ep, struct usb_request *req)
+{
+        struct f_acm            *acm = req->context;
+        u8                      doit = false;
+
+        /* on this call path we do NOT hold the port spinlock,
+         * which is why ACM needs its own spinlock
+         */
+        spin_lock(&acm->lock);
+        if (req->status != -ESHUTDOWN)
+                doit = acm->pending;
+        acm->notify_req = req;
+        spin_unlock(&acm->lock);
+
+        if (doit)
+                acm_notify_serial_state(acm);
+}
+
+/* connect == the TTY link is open */
+
+static void acm_connect(struct gserial *port)
+{
+        struct f_acm            *acm = port_to_acm(port);
+
+        acm->serial_state |= ACM_CTRL_DSR | ACM_CTRL_DCD;
+        acm_notify_serial_state(acm);
+}
+
+static void acm_disconnect(struct gserial *port)
+{
+        struct f_acm            *acm = port_to_acm(port);
+
+        acm->serial_state &= ~(ACM_CTRL_DSR | ACM_CTRL_DCD);
+        acm_notify_serial_state(acm);
+}
+
+static int acm_send_break(struct gserial *port, int duration)
+{
+        struct f_acm            *acm = port_to_acm(port);
+        u16                     state;
+
+        state = acm->serial_state;
+        state &= ~ACM_CTRL_BRK;
+        if (duration)
+                state |= ACM_CTRL_BRK;
+
+        acm->serial_state = state;
+        return acm_notify_serial_state(acm);
+}
+
+/*-------------------------------------------------------------------------*/
+
 /* ACM function driver setup/binding */
 static int __init
 acm_bind(struct usb_configuration *c, struct usb_function *f)
@@ -445,8 +593,20 @@ acm_bind(struct usb_configuration *c, struct usb_function *f)
         acm->notify = ep;
         ep->driver_data = cdev; /* claim */
 
+        /* allocate notification */
+        acm->notify_req = gs_alloc_req(ep,
+                        sizeof(struct usb_cdc_notification) + 2,
+                        GFP_KERNEL);
+        if (!acm->notify_req)
+                goto fail;
+
+        acm->notify_req->complete = acm_cdc_notify_complete;
+        acm->notify_req->context = acm;
+
         /* copy descriptors, and track endpoint copies */
         f->descriptors = usb_copy_descriptors(acm_fs_function);
+        if (!f->descriptors)
+                goto fail;
 
         acm->fs.in = usb_find_endpoint(acm_fs_function,
                         f->descriptors, &acm_fs_in_desc);
@@ -478,8 +638,6 @@ acm_bind(struct usb_configuration *c, struct usb_function *f)
                                 f->hs_descriptors, &acm_hs_notify_desc);
         }
 
-        /* FIXME provide a callback for triggering notifications */
-
         DBG(cdev, "acm ttyGS%d: %s speed IN/%s OUT/%s NOTIFY/%s\n",
                         acm->port_num,
                         gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full",
@@ -488,6 +646,9 @@ acm_bind(struct usb_configuration *c, struct usb_function *f)
         return 0;
 
 fail:
+        if (acm->notify_req)
+                gs_free_req(acm->notify, acm->notify_req);
+
         /* we might as well release our claims on endpoints */
         if (acm->notify)
                 acm->notify->driver_data = NULL;
@@ -504,10 +665,13 @@ fail:
 static void
 acm_unbind(struct usb_configuration *c, struct usb_function *f)
 {
+        struct f_acm            *acm = func_to_acm(f);
+
         if (gadget_is_dualspeed(c->cdev->gadget))
                 usb_free_descriptors(f->hs_descriptors);
         usb_free_descriptors(f->descriptors);
-        kfree(func_to_acm(f));
+        gs_free_req(acm->notify, acm->notify_req);
+        kfree(acm);
 }
 
 /* Some controllers can't support CDC ACM ... */
@@ -571,8 +735,14 @@ int __init acm_bind_config(struct usb_configuration *c, u8 port_num)
         if (!acm)
                 return -ENOMEM;
 
+        spin_lock_init(&acm->lock);
+
         acm->port_num = port_num;
 
+        acm->port.connect = acm_connect;
+        acm->port.disconnect = acm_disconnect;
+        acm->port.send_break = acm_send_break;
+
         acm->port.func.name = "acm";
         acm->port.func.strings = acm_strings;
         /* descriptors are per-instance copies */
diff --git a/drivers/usb/gadget/f_ecm.c b/drivers/usb/gadget/f_ecm.c
index 0822e9d7693a..a2b5c092bda0 100644
--- a/drivers/usb/gadget/f_ecm.c
+++ b/drivers/usb/gadget/f_ecm.c
@@ -63,9 +63,7 @@ struct f_ecm {
 
         char                            ethaddr[14];
 
-        struct usb_descriptor_header    **fs_function;
         struct ecm_ep_descs             fs;
-        struct usb_descriptor_header    **hs_function;
         struct ecm_ep_descs             hs;
 
         struct usb_ep                   *notify;
diff --git a/drivers/usb/gadget/f_rndis.c b/drivers/usb/gadget/f_rndis.c
index 61652f0f13fd..659b3d9671c4 100644
--- a/drivers/usb/gadget/f_rndis.c
+++ b/drivers/usb/gadget/f_rndis.c
@@ -85,9 +85,7 @@ struct f_rndis {
         u8                              ethaddr[ETH_ALEN];
         int                             config;
 
-        struct usb_descriptor_header    **fs_function;
         struct rndis_ep_descs           fs;
-        struct usb_descriptor_header    **hs_function;
         struct rndis_ep_descs           hs;
 
         struct usb_ep                   *notify;
diff --git a/drivers/usb/gadget/f_serial.c b/drivers/usb/gadget/f_serial.c
index 1b6bde9aaed5..fe5674db344b 100644
--- a/drivers/usb/gadget/f_serial.c
+++ b/drivers/usb/gadget/f_serial.c
@@ -36,9 +36,7 @@ struct f_gser {
         u8                              data_id;
         u8                              port_num;
 
-        struct usb_descriptor_header    **fs_function;
         struct gser_descs               fs;
-        struct usb_descriptor_header    **hs_function;
         struct gser_descs               hs;
 };
 
diff --git a/drivers/usb/gadget/f_subset.c b/drivers/usb/gadget/f_subset.c
index afeab9a0523f..acb8d233aa1d 100644
--- a/drivers/usb/gadget/f_subset.c
+++ b/drivers/usb/gadget/f_subset.c
@@ -66,9 +66,7 @@ struct f_gether {
 
         char                            ethaddr[14];
 
-        struct usb_descriptor_header    **fs_function;
         struct geth_descs               fs;
-        struct usb_descriptor_header    **hs_function;
         struct geth_descs               hs;
 };
 
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index 5246e8fef2b2..17d9905101b7 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -11,6 +11,10 @@
  * Some are available on 2.4 kernels; several are available, but not
  * yet pushed in the 2.6 mainline tree.
  */
+
+#ifndef __GADGET_CHIPS_H
+#define __GADGET_CHIPS_H
+
 #ifdef CONFIG_USB_GADGET_NET2280
 #define gadget_is_net2280(g)    !strcmp("net2280", (g)->name)
 #else
@@ -237,3 +241,5 @@ static inline bool gadget_supports_altsettings(struct usb_gadget *gadget)
         /* Everything else is *presumably* fine ... */
         return true;
 }
+
+#endif /* __GADGET_CHIPS_H */
diff --git a/drivers/usb/gadget/lh7a40x_udc.h b/drivers/usb/gadget/lh7a40x_udc.h
index 1ecfd6366b9a..ca861203a301 100644
--- a/drivers/usb/gadget/lh7a40x_udc.h
+++ b/drivers/usb/gadget/lh7a40x_udc.h
@@ -47,7 +47,7 @@
 #include <asm/irq.h>
 #include <asm/system.h>
 #include <asm/unaligned.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index 395bd1844482..574c53831a05 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -52,8 +52,9 @@
 #include <asm/unaligned.h>
 #include <asm/mach-types.h>
 
-#include <asm/arch/dma.h>
-#include <asm/arch/usb.h>
+#include <mach/dma.h>
+#include <mach/usb.h>
+#include <mach/control.h>
 
 #include "omap_udc.h"
 
@@ -2310,10 +2311,10 @@ static int proc_otg_show(struct seq_file *s)
         u32             trans;
         char            *ctrl_name;
 
-        tmp = OTG_REV_REG;
+        tmp = omap_readl(OTG_REV);
         if (cpu_is_omap24xx()) {
                 ctrl_name = "control_devconf";
-                trans = CONTROL_DEVCONF_REG;
+                trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
         } else {
                 ctrl_name = "tranceiver_ctrl";
                 trans = omap_readw(USB_TRANSCEIVER_CTRL);
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 7e6725d89976..da6e93c201d2 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -61,7 +61,7 @@
  * This driver is PXA25x only.  Grab the right register definitions.
  */
 #ifdef CONFIG_ARCH_PXA
-#include <asm/arch/pxa25x-udc.h>
+#include <mach/pxa25x-udc.h>
 #endif
 
 #include <asm/mach/udc_pxa2xx.h>
diff --git a/drivers/usb/gadget/pxa25x_udc.h b/drivers/usb/gadget/pxa25x_udc.h
index c8a13215e02c..1d51aa21e6eb 100644
--- a/drivers/usb/gadget/pxa25x_udc.h
+++ b/drivers/usb/gadget/pxa25x_udc.h
@@ -139,7 +139,7 @@ struct pxa25x_udc {
 /*-------------------------------------------------------------------------*/
 
 #ifdef CONFIG_ARCH_LUBBOCK
-#include <asm/arch/lubbock.h>
+#include <mach/lubbock.h>
 /* lubbock can also report usb connect/disconnect irqs */
 #endif
 
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
index 9d447d8cfc0c..a28513ecbe5b 100644
--- a/drivers/usb/gadget/pxa27x_udc.c
+++ b/drivers/usb/gadget/pxa27x_udc.c
@@ -33,13 +33,13 @@
 #include <linux/irq.h>
 
 #include <asm/byteorder.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 #include <linux/usb.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
-#include <asm/arch/pxa2xx-regs.h> /* FIXME: for PSSR */
-#include <asm/arch/udc.h>
+#include <mach/pxa2xx-regs.h> /* FIXME: for PSSR */
+#include <mach/udc.h>
 
 #include "pxa27x_udc.h"
 
diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c
index 6b1ef488043b..538807384592 100644
--- a/drivers/usb/gadget/s3c2410_udc.c
+++ b/drivers/usb/gadget/s3c2410_udc.c
@@ -49,15 +49,14 @@
 #include <asm/irq.h>
 #include <asm/system.h>
 #include <asm/unaligned.h>
-#include <asm/arch/irqs.h>
+#include <mach/irqs.h>
 
-#include <asm/arch/hardware.h>
-#include <asm/arch/regs-gpio.h>
+#include <mach/hardware.h>
+#include <mach/regs-gpio.h>
 
 #include <asm/plat-s3c24xx/regs-udc.h>
 #include <asm/plat-s3c24xx/udc.h>
 
-#include <asm/mach-types.h>
 
 #include "s3c2410_udc.h"
 
@@ -888,7 +887,7 @@ static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
         }
 }
 
-#include <asm/arch/regs-irq.h>
+#include <mach/regs-irq.h>
 
 /*
  *      s3c2410_udc_irq - interrupt handler
diff --git a/drivers/usb/gadget/u_serial.c b/drivers/usb/gadget/u_serial.c
index abf9505d3a75..53d59287f2bc 100644
--- a/drivers/usb/gadget/u_serial.c
+++ b/drivers/usb/gadget/u_serial.c
@@ -52,13 +52,16 @@
  * is managed in userspace ... OBEX, PTP, and MTP have been mentioned.
  */
 
+#define PREFIX  "ttyGS"
+
 /*
  * gserial is the lifecycle interface, used by USB functions
  * gs_port is the I/O nexus, used by the tty driver
  * tty_struct links to the tty/filesystem framework
  *
  * gserial <---> gs_port ... links will be null when the USB link is
- * inactive; managed by gserial_{connect,disconnect}().
+ * inactive; managed by gserial_{connect,disconnect}().  each gserial
+ * instance can wrap its own USB control protocol.
  *      gserial->ioport == usb_ep->driver_data ... gs_port
  *      gs_port->port_usb ... gserial
  *
@@ -100,6 +103,8 @@ struct gs_port {
         wait_queue_head_t       close_wait;     /* wait for last close */
 
         struct list_head        read_pool;
+        struct list_head        read_queue;
+        unsigned                n_read;
         struct tasklet_struct   push;
 
         struct list_head        write_pool;
@@ -177,7 +182,7 @@ static void gs_buf_clear(struct gs_buf *gb)
 /*
  * gs_buf_data_avail
  *
- * Return the number of bytes of data available in the circular
+ * Return the number of bytes of data written into the circular
  * buffer.
  */
 static unsigned gs_buf_data_avail(struct gs_buf *gb)
@@ -278,7 +283,7 @@ gs_buf_get(struct gs_buf *gb, char *buf, unsigned count)
  * Allocate a usb_request and its buffer.  Returns a pointer to the
  * usb_request or NULL if there is an error.
  */
-static struct usb_request *
+struct usb_request *
 gs_alloc_req(struct usb_ep *ep, unsigned len, gfp_t kmalloc_flags)
 {
         struct usb_request *req;
@@ -302,7 +307,7 @@ gs_alloc_req(struct usb_ep *ep, unsigned len, gfp_t kmalloc_flags)
  *
  * Free a usb_request and its buffer.
  */
-static void gs_free_req(struct usb_ep *ep, struct usb_request *req)
+void gs_free_req(struct usb_ep *ep, struct usb_request *req)
 {
         kfree(req->buf);
         usb_ep_free_request(ep, req);
@@ -367,11 +372,9 @@ __acquires(&port->port_lock)
                 req->length = len;
                 list_del(&req->list);
 
-#ifdef VERBOSE_DEBUG
-                pr_debug("%s: %s, len=%d, 0x%02x 0x%02x 0x%02x ...\n",
-                                __func__, in->name, len, *((u8 *)req->buf),
+                pr_vdebug(PREFIX "%d: tx len=%d, 0x%02x 0x%02x 0x%02x ...\n",
+                                port->port_num, len, *((u8 *)req->buf),
                                 *((u8 *)req->buf+1), *((u8 *)req->buf+2));
-#endif
 
                 /* Drop lock while we call out of driver; completions
                  * could be issued while we do so.  Disconnection may
@@ -401,56 +404,6 @@ __acquires(&port->port_lock)
         return status;
 }
 
-static void gs_rx_push(unsigned long _port)
-{
-        struct gs_port          *port = (void *)_port;
-        struct tty_struct       *tty = port->port_tty;
-
-        /* With low_latency, tty_flip_buffer_push() doesn't put its
-         * real work through a workqueue, so the ldisc has a better
-         * chance to keep up with peak USB data rates.
-         */
-        if (tty) {
-                tty_flip_buffer_push(tty);
-                wake_up_interruptible(&tty->read_wait);
-        }
-}
-
-/*
- * gs_recv_packet
- *
- * Called for each USB packet received.  Reads the packet
- * header and stuffs the data in the appropriate tty buffer.
- * Returns 0 if successful, or a negative error number.
- *
- * Called during USB completion routine, on interrupt time.
- * With port_lock.
- */
-static int gs_recv_packet(struct gs_port *port, char *packet, unsigned size)
-{
-        unsigned                len;
-        struct tty_struct       *tty;
-
-        /* I/O completions can continue for a while after close(), until the
-         * request queue empties.  Just discard any data we receive, until
-         * something reopens this TTY ... as if there were no HW flow control.
-         */
-        tty = port->port_tty;
-        if (tty == NULL) {
-                pr_vdebug("%s: ttyGS%d, after close\n",
-                                __func__, port->port_num);
-                return -EIO;
-        }
-
-        len = tty_insert_flip_string(tty, packet, size);
-        if (len > 0)
-                tasklet_schedule(&port->push);
-        if (len < size)
-                pr_debug("%s: ttyGS%d, drop %d bytes\n",
-                                __func__, port->port_num, size - len);
-        return 0;
-}
-
 /*
  * Context: caller owns port_lock, and port_usb is set
  */
@@ -469,9 +422,9 @@ __acquires(&port->port_lock)
                 int                     status;
                 struct tty_struct       *tty;
 
-                /* no more rx if closed or throttled */
+                /* no more rx if closed */
                 tty = port->port_tty;
-                if (!tty || test_bit(TTY_THROTTLED, &tty->flags))
+                if (!tty)
                         break;
 
                 req = list_entry(pool->next, struct usb_request, list);
@@ -500,36 +453,134 @@ __acquires(&port->port_lock)
         return started;
 }
 
-static void gs_read_complete(struct usb_ep *ep, struct usb_request *req)
+/*
+ * RX tasklet takes data out of the RX queue and hands it up to the TTY
+ * layer until it refuses to take any more data (or is throttled back).
+ * Then it issues reads for any further data.
+ *
+ * If the RX queue becomes full enough that no usb_request is queued,
+ * the OUT endpoint may begin NAKing as soon as its FIFO fills up.
+ * So QUEUE_SIZE packets plus however many the FIFO holds (usually two)
+ * can be buffered before the TTY layer's buffers (currently 64 KB).
+ */
+static void gs_rx_push(unsigned long _port)
 {
-        int             status;
-        struct gs_port  *port = ep->driver_data;
+        struct gs_port          *port = (void *)_port;
+        struct tty_struct       *tty;
+        struct list_head        *queue = &port->read_queue;
+        bool                    disconnect = false;
+        bool                    do_push = false;
 
-        spin_lock(&port->port_lock);
-        list_add(&req->list, &port->read_pool);
+        /* hand any queued data to the tty */
+        spin_lock_irq(&port->port_lock);
+        tty = port->port_tty;
+        while (!list_empty(queue)) {
+                struct usb_request      *req;
 
-        switch (req->status) {
-        case 0:
-                /* normal completion */
-                status = gs_recv_packet(port, req->buf, req->actual);
-                if (status && status != -EIO)
-                        pr_debug("%s: %s %s err %d\n",
-                                __func__, "recv", ep->name, status);
-                gs_start_rx(port);
-                break;
+                req = list_first_entry(queue, struct usb_request, list);
 
-        case -ESHUTDOWN:
-                /* disconnect */
-                pr_vdebug("%s: %s shutdown\n", __func__, ep->name);
-                break;
+                /* discard data if tty was closed */
+                if (!tty)
+                        goto recycle;
 
-        default:
-                /* presumably a transient fault */
-                pr_warning("%s: unexpected %s status %d\n",
-                                __func__, ep->name, req->status);
-                gs_start_rx(port);
-                break;
+                /* leave data queued if tty was rx throttled */
+                if (test_bit(TTY_THROTTLED, &tty->flags))
+                        break;
+
+                switch (req->status) {
+                case -ESHUTDOWN:
+                        disconnect = true;
+                        pr_vdebug(PREFIX "%d: shutdown\n", port->port_num);
+                        break;
+
+                default:
+                        /* presumably a transient fault */
+                        pr_warning(PREFIX "%d: unexpected RX status %d\n",
+                                        port->port_num, req->status);
+                        /* FALLTHROUGH */
+                case 0:
+                        /* normal completion */
+                        break;
+                }
+
+                /* push data to (open) tty */
+                if (req->actual) {
+                        char            *packet = req->buf;
+                        unsigned        size = req->actual;
+                        unsigned        n;
+                        int             count;
+
+                        /* we may have pushed part of this packet already... */
+                        n = port->n_read;
+                        if (n) {
+                                packet += n;
+                                size -= n;
+                        }
+
+                        count = tty_insert_flip_string(tty, packet, size);
+                        if (count)
+                                do_push = true;
+                        if (count != size) {
+                                /* stop pushing; TTY layer can't handle more */
+                                port->n_read += count;
+                                pr_vdebug(PREFIX "%d: rx block %d/%d\n",
+                                                port->port_num,
+                                                count, req->actual);
+                                break;
+                        }
+                        port->n_read = 0;
+                }
+recycle:
+                list_move(&req->list, &port->read_pool);
         }
+
+        /* Push from tty to ldisc; this is immediate with low_latency, and
+         * may trigger callbacks to this driver ... so drop the spinlock.
+         */
+        if (tty && do_push) {
+                spin_unlock_irq(&port->port_lock);
+                tty_flip_buffer_push(tty);
+                wake_up_interruptible(&tty->read_wait);
+                spin_lock_irq(&port->port_lock);
+
+                /* tty may have been closed */
+                tty = port->port_tty;
+        }
+
+
+        /* We want our data queue to become empty ASAP, keeping data
+         * in the tty and ldisc (not here).  If we couldn't push any
+         * this time around, there may be trouble unless there's an
+         * implicit tty_unthrottle() call on its way...
+         *
+         * REVISIT we should probably add a timer to keep the tasklet
+         * from starving ... but it's not clear that case ever happens.
+         */
+        if (!list_empty(queue) && tty) {
+                if (!test_bit(TTY_THROTTLED, &tty->flags)) {
+                        if (do_push)
+                                tasklet_schedule(&port->push);
+                        else
+                                pr_warning(PREFIX "%d: RX not scheduled?\n",
+                                        port->port_num);
+                }
+        }
+
+        /* If we're still connected, refill the USB RX queue. */
+        if (!disconnect && port->port_usb)
+                gs_start_rx(port);
+
+        spin_unlock_irq(&port->port_lock);
+}
+
+static void gs_read_complete(struct usb_ep *ep, struct usb_request *req)
+{
+        struct gs_port  *port = ep->driver_data;
+
+        /* Queue all received data until the tty layer is ready for it. */
+        spin_lock(&port->port_lock);
+        list_add_tail(&req->list, &port->read_queue);
+        tasklet_schedule(&port->push);
         spin_unlock(&port->port_lock);
 }
 
@@ -625,6 +676,7 @@ static int gs_start_io(struct gs_port *port)
         }
 
         /* queue read requests */
+        port->n_read = 0;
         started = gs_start_rx(port);
 
         /* unblock any pending writes into our circular buffer */
@@ -633,9 +685,10 @@ static int gs_start_io(struct gs_port *port)
         } else {
                 gs_free_requests(ep, head);
                 gs_free_requests(port->port_usb->in, &port->write_pool);
+                status = -EIO;
         }
 
-        return started ? 0 : status;
+        return status;
 }
 
 /*-------------------------------------------------------------------------*/
@@ -736,10 +789,13 @@ static int gs_open(struct tty_struct *tty, struct file *file)
 
         /* if connected, start the I/O stream */
         if (port->port_usb) {
+                struct gserial  *gser = port->port_usb;
+
                 pr_debug("gs_open: start ttyGS%d\n", port->port_num);
                 gs_start_io(port);
 
-                /* REVISIT for ACM, issue "network connected" event */
+                if (gser->connect)
+                        gser->connect(gser);
         }
 
         pr_debug("gs_open: ttyGS%d (%p,%p)\n", port->port_num, tty, file);
@@ -766,6 +822,7 @@ static int gs_writes_finished(struct gs_port *p)
 static void gs_close(struct tty_struct *tty, struct file *file)
 {
         struct gs_port *port = tty->driver_data;
+        struct gserial  *gser;
 
         spin_lock_irq(&port->port_lock);
 
@@ -785,32 +842,31 @@ static void gs_close(struct tty_struct *tty, struct file *file)
         port->openclose = true;
         port->open_count = 0;
 
-        if (port->port_usb)
-                /* REVISIT for ACM, issue "network disconnected" event */;
+        gser = port->port_usb;
+        if (gser && gser->disconnect)
+                gser->disconnect(gser);
 
         /* wait for circular write buffer to drain, disconnect, or at
          * most GS_CLOSE_TIMEOUT seconds; then discard the rest
          */
-        if (gs_buf_data_avail(&port->port_write_buf) > 0
-                        && port->port_usb) {
+        if (gs_buf_data_avail(&port->port_write_buf) > 0 && gser) {
                 spin_unlock_irq(&port->port_lock);
                 wait_event_interruptible_timeout(port->drain_wait,
                                         gs_writes_finished(port),
                                         GS_CLOSE_TIMEOUT * HZ);
                 spin_lock_irq(&port->port_lock);
+                gser = port->port_usb;
         }
 
         /* Iff we're disconnected, there can be no I/O in flight so it's
          * ok to free the circular buffer; else just scrub it.  And don't
          * let the push tasklet fire again until we're re-opened.
          */
-        if (port->port_usb == NULL)
+        if (gser == NULL)
                 gs_buf_free(&port->port_write_buf);
         else
                 gs_buf_clear(&port->port_write_buf);
 
-        tasklet_kill(&port->push);
-
         tty->driver_data = NULL;
         port->port_tty = NULL;
 
@@ -911,15 +967,35 @@ static void gs_unthrottle(struct tty_struct *tty)
 {
         struct gs_port          *port = tty->driver_data;
         unsigned long           flags;
-        unsigned                started = 0;
 
         spin_lock_irqsave(&port->port_lock, flags);
-        if (port->port_usb)
-                started = gs_start_rx(port);
+        if (port->port_usb) {
+                /* Kickstart read queue processing.  We don't do xon/xoff,
+                 * rts/cts, or other handshaking with the host, but if the
+                 * read queue backs up enough we'll be NAKing OUT packets.
+                 */
+                tasklet_schedule(&port->push);
+                pr_vdebug(PREFIX "%d: unthrottle\n", port->port_num);
+        }
         spin_unlock_irqrestore(&port->port_lock, flags);
+}
+
+static int gs_break_ctl(struct tty_struct *tty, int duration)
+{
+        struct gs_port  *port = tty->driver_data;
+        int             status = 0;
+        struct gserial  *gser;
+
+        pr_vdebug("gs_break_ctl: ttyGS%d, send break (%d) \n",
+                        port->port_num, duration);
 
-        pr_vdebug("gs_unthrottle: ttyGS%d, %d packets\n",
-                        port->port_num, started);
+        spin_lock_irq(&port->port_lock);
+        gser = port->port_usb;
+        if (gser && gser->send_break)
+                status = gser->send_break(gser, duration);
+        spin_unlock_irq(&port->port_lock);
+
+        return status;
 }
 
 static const struct tty_operations gs_tty_ops = {
@@ -931,6 +1007,7 @@ static const struct tty_operations gs_tty_ops = {
         .write_room =           gs_write_room,
         .chars_in_buffer =      gs_chars_in_buffer,
         .unthrottle =           gs_unthrottle,
+        .break_ctl =            gs_break_ctl,
 };
 
 /*-------------------------------------------------------------------------*/
@@ -953,6 +1030,7 @@ gs_port_alloc(unsigned port_num, struct usb_cdc_line_coding *coding)
         tasklet_init(&port->push, gs_rx_push, (unsigned long) port);
 
         INIT_LIST_HEAD(&port->read_pool);
+        INIT_LIST_HEAD(&port->read_queue);
         INIT_LIST_HEAD(&port->write_pool);
 
         port->port_num = port_num;
@@ -997,7 +1075,7 @@ int __init gserial_setup(struct usb_gadget *g, unsigned count)
 
         gs_tty_driver->owner = THIS_MODULE;
         gs_tty_driver->driver_name = "g_serial";
-        gs_tty_driver->name = "ttyGS";
+        gs_tty_driver->name = PREFIX;
         /* uses dynamically assigned dev_t values */
 
         gs_tty_driver->type = TTY_DRIVER_TYPE_SERIAL;
@@ -1104,6 +1182,8 @@ void gserial_cleanup(void)
                 ports[i].port = NULL;
                 mutex_unlock(&ports[i].lock);
 
+                tasklet_kill(&port->push);
+
                 /* wait for old opens to finish */
                 wait_event(port->close_wait, gs_closed(port));
 
@@ -1175,14 +1255,17 @@ int gserial_connect(struct gserial *gser, u8 port_num)
 
         /* REVISIT if waiting on "carrier detect", signal. */
 
-        /* REVISIT for ACM, issue "network connection" status notification:
-         * connected if open_count, else disconnected.
+        /* if it's already open, start I/O ... and notify the serial
+         * protocol about open/close status (connect/disconnect).
          */
-
-        /* if it's already open, start I/O */
         if (port->open_count) {
                 pr_debug("gserial_connect: start ttyGS%d\n", port->port_num);
                 gs_start_io(port);
+                if (gser->connect)
+                        gser->connect(gser);
+        } else {
+                if (gser->disconnect)
+                        gser->disconnect(gser);
         }
 
         spin_unlock_irqrestore(&port->port_lock, flags);
@@ -1241,6 +1324,7 @@ void gserial_disconnect(struct gserial *gser)
         if (port->open_count == 0 && !port->openclose)
                 gs_buf_free(&port->port_write_buf);
         gs_free_requests(gser->out, &port->read_pool);
+        gs_free_requests(gser->out, &port->read_queue);
         gs_free_requests(gser->in, &port->write_pool);
         spin_unlock_irqrestore(&port->port_lock, flags);
 }
diff --git a/drivers/usb/gadget/u_serial.h b/drivers/usb/gadget/u_serial.h
index 7b561138f90e..af3910d01aea 100644
--- a/drivers/usb/gadget/u_serial.h
+++ b/drivers/usb/gadget/u_serial.h
@@ -23,8 +23,7 @@
  * style I/O using the USB peripheral endpoints listed here, including
  * hookups to sysfs and /dev for each logical "tty" device.
  *
- * REVISIT need TTY --> USB event flow too, so ACM can report open/close
- * as carrier detect events.  Model after ECM.  There's more ACM state too.
+ * REVISIT at least ACM could support tiocmget() if needed.
  *
  * REVISIT someday, allow multiplexing several TTYs over these endpoints.
  */
@@ -41,8 +40,17 @@ struct gserial {
 
         /* REVISIT avoid this CDC-ACM support harder ... */
         struct usb_cdc_line_coding port_line_coding;    /* 9600-8-N-1 etc */
+
+        /* notification callbacks */
+        void (*connect)(struct gserial *p);
+        void (*disconnect)(struct gserial *p);
+        int (*send_break)(struct gserial *p, int duration);
 };
 
+/* utilities to allocate/free request and buffer */
+struct usb_request *gs_alloc_req(struct usb_ep *ep, unsigned len, gfp_t flags);
+void gs_free_req(struct usb_ep *, struct usb_request *req);
+
 /* port setup/teardown is handled by gadget driver */
 int gserial_setup(struct usb_gadget *g, unsigned n_ports);
 void gserial_cleanup(void);
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index 5fbdc14e63b3..5416cf969005 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -12,7 +12,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/mbus.h>
-#include <asm/plat-orion/ehci-orion.h>
+#include <plat/ehci-orion.h>
 
 #define rdl(off)        __raw_readl(hcd->regs + (off))
 #define wrl(off, val)   __raw_writel((val), hcd->regs + (off))
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index 2622b6596d7c..3712b925b315 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -932,7 +932,7 @@ static struct ehci_qh *qh_append_tds (
 
                         list_del (&qtd->qtd_list);
                         list_add (&dummy->qtd_list, qtd_list);
-                        __list_splice (qtd_list, qh->qtd_list.prev);
+                        list_splice_tail(qtd_list, &qh->qtd_list);
 
                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
                         qh->dummy = qtd;
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
index c858f2adb929..d22a84f86a33 100644
--- a/drivers/usb/host/isp1760-hcd.c
+++ b/drivers/usb/host/isp1760-hcd.c
@@ -126,9 +126,8 @@ static void isp1760_writel(const unsigned int val, __u32 __iomem *regs)
  * doesn't quite work because some people have to enforce 32-bit access
  */
 static void priv_read_copy(struct isp1760_hcd *priv, u32 *src,
-                __u32 __iomem *dst, u32 offset, u32 len)
+                __u32 __iomem *dst, u32 len)
 {
-        struct usb_hcd *hcd = priv_to_hcd(priv);
         u32 val;
         u8 *buff8;
 
@@ -136,11 +135,6 @@ static void priv_read_copy(struct isp1760_hcd *priv, u32 *src,
                 printk(KERN_ERR "ERROR: buffer: %p len: %d\n", src, len);
                 return;
         }
-        isp1760_writel(offset,  hcd->regs + HC_MEMORY_REG);
-        /* XXX
-         * 90nsec delay, the spec says something how this could be avoided.
-         */
-        mdelay(1);
 
         while (len >= 4) {
                 *src = __raw_readl(dst);
@@ -987,8 +981,20 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
                         printk(KERN_ERR "qh is 0\n");
                         continue;
                 }
-                priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs,
-                                atl_regs, sizeof(ptd));
+                isp1760_writel(atl_regs + ISP_BANK(0), usb_hcd->regs +
+                                HC_MEMORY_REG);
+                isp1760_writel(payload  + ISP_BANK(1), usb_hcd->regs +
+                                HC_MEMORY_REG);
+                /*
+                 * write bank1 address twice to ensure the 90ns delay (time
+                 * between BANK0 write and the priv_read_copy() call is at
+                 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 92ns)
+                 */
+                isp1760_writel(payload  + ISP_BANK(1), usb_hcd->regs +
+                                HC_MEMORY_REG);
+
+                priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs +
+                                ISP_BANK(0), sizeof(ptd));
 
                 dw1 = le32_to_cpu(ptd.dw1);
                 dw2 = le32_to_cpu(ptd.dw2);
@@ -1091,7 +1097,7 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
                         case IN_PID:
                                 priv_read_copy(priv,
                                         priv->atl_ints[queue_entry].data_buffer,
-                                        usb_hcd->regs + payload, payload,
+                                        usb_hcd->regs + payload + ISP_BANK(1),
                                         length);
 
                         case OUT_PID:
@@ -1122,11 +1128,11 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
                 } else if (usb_pipebulk(urb->pipe) && (length < qtd->length)) {
                         /* short BULK received */
 
-                        printk(KERN_ERR "short bulk, %d instead %zu\n", length,
-                                        qtd->length);
                         if (urb->transfer_flags & URB_SHORT_NOT_OK) {
                                 urb->status = -EREMOTEIO;
-                                printk(KERN_ERR "not okey\n");
+                                isp1760_dbg(priv, "short bulk, %d instead %zu "
+                                        "with URB_SHORT_NOT_OK flag.\n",
+                                        length, qtd->length);
                         }
 
                         if (urb->status == -EINPROGRESS)
@@ -1206,8 +1212,20 @@ static void do_intl_int(struct usb_hcd *usb_hcd)
                         continue;
                 }
 
-                priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs,
-                                int_regs, sizeof(ptd));
+                isp1760_writel(int_regs + ISP_BANK(0), usb_hcd->regs +
+                                HC_MEMORY_REG);
+                isp1760_writel(payload  + ISP_BANK(1), usb_hcd->regs +
+                                HC_MEMORY_REG);
+                /*
+                 * write bank1 address twice to ensure the 90ns delay (time
+                 * between BANK0 write and the priv_read_copy() call is at
+                 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 92ns)
+                 */
+                isp1760_writel(payload  + ISP_BANK(1), usb_hcd->regs +
+                                HC_MEMORY_REG);
+
+                priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs +
+                                ISP_BANK(0), sizeof(ptd));
                 dw1 = le32_to_cpu(ptd.dw1);
                 dw3 = le32_to_cpu(ptd.dw3);
                 check_int_err_status(le32_to_cpu(ptd.dw4));
@@ -1242,7 +1260,7 @@ static void do_intl_int(struct usb_hcd *usb_hcd)
                         case IN_PID:
                                 priv_read_copy(priv,
                                         priv->int_ints[queue_entry].data_buffer,
-                                        usb_hcd->regs + payload , payload,
+                                        usb_hcd->regs + payload + ISP_BANK(1),
                                         length);
                         case OUT_PID:
 
@@ -1615,8 +1633,7 @@ static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
                 return -EPIPE;
         }
 
-        isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe);
-        return 0;
+        return isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe);
 }
 
 static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
diff --git a/drivers/usb/host/isp1760-hcd.h b/drivers/usb/host/isp1760-hcd.h
index 6473dd86993c..4377277667d9 100644
--- a/drivers/usb/host/isp1760-hcd.h
+++ b/drivers/usb/host/isp1760-hcd.h
@@ -54,6 +54,8 @@ void deinit_kmem_cache(void);
 #define BUFFER_MAP              0x7
 
 #define HC_MEMORY_REG           0x33c
+#define ISP_BANK(x)             ((x) << 16)
+
 #define HC_PORT1_CTRL           0x374
 #define PORT1_POWER             (3 << 3)
 #define PORT1_INIT1             (1 << 7)
@@ -119,6 +121,9 @@ struct inter_packet_info {
 typedef void (packet_enqueue)(struct usb_hcd *hcd, struct isp1760_qh *qh,
                 struct isp1760_qtd *qtd);
 
+#define isp1760_dbg(priv, fmt, args...) \
+        dev_dbg(priv_to_hcd(priv)->self.controller, fmt, ##args)
+
 #define isp1760_info(priv, fmt, args...) \
         dev_info(priv_to_hcd(priv)->self.controller, fmt, ##args)
 
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index a5d8e550d897..6db7a2889e66 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -15,12 +15,11 @@
 #include <linux/clk.h>
 #include <linux/platform_device.h>
 
-#include <asm/mach-types.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/gpio.h>
 
-#include <asm/arch/board.h>
-#include <asm/arch/cpu.h>
+#include <mach/board.h>
+#include <mach/cpu.h>
 
 #ifndef CONFIG_ARCH_AT91
 #error "CONFIG_ARCH_AT91 must be defined."
diff --git a/drivers/usb/host/ohci-ep93xx.c b/drivers/usb/host/ohci-ep93xx.c
index 5adaf36e47d0..cb0b506f8259 100644
--- a/drivers/usb/host/ohci-ep93xx.c
+++ b/drivers/usb/host/ohci-ep93xx.c
@@ -28,8 +28,7 @@
 #include <linux/signal.h>
 #include <linux/platform_device.h>
 
-#include <asm/mach-types.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 static struct clk *usb_host_clock;
 
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 26bc47941d01..89901962cbfd 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -86,6 +86,21 @@ static void ohci_stop (struct usb_hcd *hcd);
 static int ohci_restart (struct ohci_hcd *ohci);
 #endif
 
+#ifdef CONFIG_PCI
+static void quirk_amd_pll(int state);
+static void amd_iso_dev_put(void);
+#else
+static inline void quirk_amd_pll(int state)
+{
+        return;
+}
+static inline void amd_iso_dev_put(void)
+{
+        return;
+}
+#endif
+
+
 #include "ohci-hub.c"
 #include "ohci-dbg.c"
 #include "ohci-mem.c"
@@ -483,6 +498,9 @@ static int ohci_init (struct ohci_hcd *ohci)
         int ret;
         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 
+        if (distrust_firmware)
+                ohci->flags |= OHCI_QUIRK_HUB_POWER;
+
         disable (ohci);
         ohci->regs = hcd->regs;
 
@@ -689,7 +707,8 @@ retry:
                 temp |= RH_A_NOCP;
                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
-        } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
+        } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
+                        (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
                 /* hub power always on; required for AMD-756 and some
                  * Mac platforms.  ganged overcurrent reporting, if any.
                  */
@@ -882,6 +901,8 @@ static void ohci_stop (struct usb_hcd *hcd)
 
         if (quirk_zfmicro(ohci))
                 del_timer(&ohci->unlink_watchdog);
+        if (quirk_amdiso(ohci))
+                amd_iso_dev_put();
 
         remove_debug_files (ohci);
         ohci_mem_cleanup (ohci);
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
index b56739221d11..439beb784f3e 100644
--- a/drivers/usb/host/ohci-hub.c
+++ b/drivers/usb/host/ohci-hub.c
@@ -483,6 +483,13 @@ ohci_hub_status_data (struct usb_hcd *hcd, char *buf)
                 length++;
         }
 
+        /* Some broken controllers never turn off RHCS in the interrupt
+         * status register.  For their sake we won't re-enable RHSC
+         * interrupts if the flag is already set.
+         */
+        if (ohci_readl(ohci, &ohci->regs->intrstatus) & OHCI_INTR_RHSC)
+                changed = 1;
+
         /* look at each port */
         for (i = 0; i < ohci->num_ports; i++) {
                 u32     status = roothub_portstatus (ohci, i);
@@ -572,8 +579,6 @@ static int ohci_start_port_reset (struct usb_hcd *hcd, unsigned port)
         return 0;
 }
 
-static void start_hnp(struct ohci_hcd *ohci);
-
 #else
 
 #define ohci_start_port_reset           NULL
@@ -760,7 +765,7 @@ static int ohci_hub_control (
 #ifdef  CONFIG_USB_OTG
                         if (hcd->self.otg_port == (wIndex + 1)
                                         && hcd->self.b_hnp_enable)
-                                start_hnp(ohci);
+                                ohci->start_hnp(ohci);
                         else
 #endif
                         ohci_writel (ohci, RH_PS_PSS,
diff --git a/drivers/usb/host/ohci-lh7a404.c b/drivers/usb/host/ohci-lh7a404.c
index 1ef5d482c145..9e31d440d115 100644
--- a/drivers/usb/host/ohci-lh7a404.c
+++ b/drivers/usb/host/ohci-lh7a404.c
@@ -19,7 +19,7 @@
 #include <linux/platform_device.h>
 #include <linux/signal.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 
 extern int usb_disabled(void);
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 6e5e5f81ac90..3d532b709670 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -19,15 +19,15 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/mach-types.h>
 
-#include <asm/arch/mux.h>
-#include <asm/arch/irqs.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/fpga.h>
-#include <asm/arch/usb.h>
+#include <mach/mux.h>
+#include <mach/irqs.h>
+#include <mach/gpio.h>
+#include <mach/fpga.h>
+#include <mach/usb.h>
 
 
 /* OMAP-1510 OHCI has its own MMU for DMA */
@@ -225,6 +225,7 @@ static int ohci_omap_init(struct usb_hcd *hcd)
                         dev_err(hcd->self.controller, "can't find transceiver\n");
                         return -ENODEV;
                 }
+                ohci->start_hnp = start_hnp;
         }
 #endif
 
@@ -260,7 +261,7 @@ static int ohci_omap_init(struct usb_hcd *hcd)
                         omap_cfg_reg(W4_USB_HIGHZ);
                 }
                 ohci_writel(ohci, rh, &ohci->regs->roothub.a);
-                distrust_firmware = 0;
+                ohci->flags &= ~OHCI_QUIRK_HUB_POWER;
         } else if (machine_is_nokia770()) {
                 /* We require a self-powered hub, which should have
                  * plenty of power. */
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
index 4696cc912e16..083e8df0a817 100644
--- a/drivers/usb/host/ohci-pci.c
+++ b/drivers/usb/host/ohci-pci.c
@@ -18,6 +18,28 @@
 #error "This file is PCI bus glue.  CONFIG_PCI must be defined."
 #endif
 
+#include <linux/pci.h>
+#include <linux/io.h>
+
+
+/* constants used to work around PM-related transfer
+ * glitches in some AMD 700 series southbridges
+ */
+#define AB_REG_BAR      0xf0
+#define AB_INDX(addr)   ((addr) + 0x00)
+#define AB_DATA(addr)   ((addr) + 0x04)
+#define AX_INDXC        0X30
+#define AX_DATAC        0x34
+
+#define NB_PCIE_INDX_ADDR       0xe0
+#define NB_PCIE_INDX_DATA       0xe4
+#define PCIE_P_CNTL             0x10040
+#define BIF_NB                  0x10002
+
+static struct pci_dev *amd_smbus_dev;
+static struct pci_dev *amd_hb_dev;
+static int amd_ohci_iso_count;
+
 /*-------------------------------------------------------------------------*/
 
 static int broken_suspend(struct usb_hcd *hcd)
@@ -143,6 +165,103 @@ static int ohci_quirk_nec(struct usb_hcd *hcd)
         return 0;
 }
 
+static int ohci_quirk_amd700(struct usb_hcd *hcd)
+{
+        struct ohci_hcd *ohci = hcd_to_ohci(hcd);
+        u8 rev = 0;
+
+        if (!amd_smbus_dev)
+                amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
+                                PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
+        if (!amd_smbus_dev)
+                return 0;
+
+        pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
+        if ((rev > 0x3b) || (rev < 0x30)) {
+                pci_dev_put(amd_smbus_dev);
+                amd_smbus_dev = NULL;
+                return 0;
+        }
+
+        amd_ohci_iso_count++;
+
+        if (!amd_hb_dev)
+                amd_hb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x9600, NULL);
+
+        ohci->flags |= OHCI_QUIRK_AMD_ISO;
+        ohci_dbg(ohci, "enabled AMD ISO transfers quirk\n");
+
+        return 0;
+}
+
+/*
+ * The hardware normally enables the A-link power management feature, which
+ * lets the system lower the power consumption in idle states.
+ *
+ * Assume the system is configured to have USB 1.1 ISO transfers going
+ * to or from a USB device.  Without this quirk, that stream may stutter
+ * or have breaks occasionally.  For transfers going to speakers, this
+ * makes a very audible mess...
+ *
+ * That audio playback corruption is due to the audio stream getting
+ * interrupted occasionally when the link goes in lower power state
+ * This USB quirk prevents the link going into that lower power state
+ * during audio playback or other ISO operations.
+ */
+static void quirk_amd_pll(int on)
+{
+        u32 addr;
+        u32 val;
+        u32 bit = (on > 0) ? 1 : 0;
+
+        pci_read_config_dword(amd_smbus_dev, AB_REG_BAR, &addr);
+
+        /* BIT names/meanings are NDA-protected, sorry ... */
+
+        outl(AX_INDXC, AB_INDX(addr));
+        outl(0x40, AB_DATA(addr));
+        outl(AX_DATAC, AB_INDX(addr));
+        val = inl(AB_DATA(addr));
+        val &= ~((1 << 3) | (1 << 4) | (1 << 9));
+        val |= (bit << 3) | ((!bit) << 4) | ((!bit) << 9);
+        outl(val, AB_DATA(addr));
+
+        if (amd_hb_dev) {
+                addr = PCIE_P_CNTL;
+                pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_ADDR, addr);
+
+                pci_read_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, &val);
+                val &= ~(1 | (1 << 3) | (1 << 4) | (1 << 9) | (1 << 12));
+                val |= bit | (bit << 3) | (bit << 12);
+                val |= ((!bit) << 4) | ((!bit) << 9);
+                pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, val);
+
+                addr = BIF_NB;
+                pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_ADDR, addr);
+
+                pci_read_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, &val);
+                val &= ~(1 << 8);
+                val |= bit << 8;
+                pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, val);
+        }
+}
+
+static void amd_iso_dev_put(void)
+{
+        amd_ohci_iso_count--;
+        if (amd_ohci_iso_count == 0) {
+                if (amd_smbus_dev) {
+                        pci_dev_put(amd_smbus_dev);
+                        amd_smbus_dev = NULL;
+                }
+                if (amd_hb_dev) {
+                        pci_dev_put(amd_hb_dev);
+                        amd_hb_dev = NULL;
+                }
+        }
+
+}
+
 /* List of quirks for OHCI */
 static const struct pci_device_id ohci_pci_quirks[] = {
         {
@@ -181,6 +300,19 @@ static const struct pci_device_id ohci_pci_quirks[] = {
                 PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
                 .driver_data = (unsigned long) broken_suspend,
         },
+        {
+                PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
+                .driver_data = (unsigned long)ohci_quirk_amd700,
+        },
+        {
+                PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
+                .driver_data = (unsigned long)ohci_quirk_amd700,
+        },
+        {
+                PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
+                .driver_data = (unsigned long)ohci_quirk_amd700,
+        },
+
         /* FIXME for some of the early AMD 760 southbridges, OHCI
          * won't work at all.  blacklist them.
          */
diff --git a/drivers/usb/host/ohci-pnx4008.c b/drivers/usb/host/ohci-pnx4008.c
index 6ad8f2fc57b9..b02cd0761977 100644
--- a/drivers/usb/host/ohci-pnx4008.c
+++ b/drivers/usb/host/ohci-pnx4008.c
@@ -21,13 +21,12 @@
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
-#include <asm/mach-types.h>
 
-#include <asm/arch/platform.h>
-#include <asm/arch/irqs.h>
-#include <asm/arch/gpio.h>
+#include <mach/platform.h>
+#include <mach/irqs.h>
+#include <mach/gpio.h>
 
 #define USB_CTRL        IO_ADDRESS(PNX4008_PWRMAN_BASE + 0x64)
 
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index 127b15799024..8c9c4849db6e 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -24,11 +24,10 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 
-#include <asm/mach-types.h>
-#include <asm/hardware.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-regs.h> /* FIXME: for PSSR */
-#include <asm/arch/ohci.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h> /* FIXME: for PSSR */
+#include <mach/ohci.h>
 
 #define PXA_UHC_MAX_PORTNUM    3
 
diff --git a/drivers/usb/host/ohci-q.c b/drivers/usb/host/ohci-q.c
index 6a9b4c557953..c2d80f80448b 100644
--- a/drivers/usb/host/ohci-q.c
+++ b/drivers/usb/host/ohci-q.c
@@ -49,6 +49,9 @@ __acquires(ohci->lock)
         switch (usb_pipetype (urb->pipe)) {
         case PIPE_ISOCHRONOUS:
                 ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--;
+                if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0
+                                && quirk_amdiso(ohci))
+                        quirk_amd_pll(1);
                 break;
         case PIPE_INTERRUPT:
                 ohci_to_hcd(ohci)->self.bandwidth_int_reqs--;
@@ -677,6 +680,9 @@ static void td_submit_urb (
                                 data + urb->iso_frame_desc [cnt].offset,
                                 urb->iso_frame_desc [cnt].length, urb, cnt);
                 }
+                if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0
+                                && quirk_amdiso(ohci))
+                        quirk_amd_pll(0);
                 periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0
                         && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0;
                 break;
diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c
index 3c7a740cfe0c..9e3dc4069e8b 100644
--- a/drivers/usb/host/ohci-s3c2410.c
+++ b/drivers/usb/host/ohci-s3c2410.c
@@ -22,8 +22,8 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 
-#include <asm/hardware.h>
-#include <asm/arch/usb-control.h>
+#include <mach/hardware.h>
+#include <mach/usb-control.h>
 
 #define valid_port(idx) ((idx) == 1 || (idx) == 2)
 
diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c
index 2e9dceb9bb99..4626b002e670 100644
--- a/drivers/usb/host/ohci-sa1111.c
+++ b/drivers/usb/host/ohci-sa1111.c
@@ -13,10 +13,10 @@
  * This file is licenced under the GPL.
  */
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
-#include <asm/arch/assabet.h>
-#include <asm/arch/badge4.h>
+#include <mach/assabet.h>
+#include <mach/badge4.h>
 #include <asm/hardware/sa1111.h>
 
 #ifndef CONFIG_SA1111
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index dc544ddc7849..faf622eafce7 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -371,6 +371,7 @@ struct ohci_hcd {
          * other external transceivers should be software-transparent
          */
         struct otg_transceiver  *transceiver;
+        void (*start_hnp)(struct ohci_hcd *ohci);
 
         /*
          * memory management for queue data structures
@@ -399,6 +400,8 @@ struct ohci_hcd {
 #define OHCI_QUIRK_ZFMICRO      0x20                    /* Compaq ZFMicro chipset*/
 #define OHCI_QUIRK_NEC          0x40                    /* lost interrupts */
 #define OHCI_QUIRK_FRAME_NO     0x80                    /* no big endian frame_no shift */
+#define OHCI_QUIRK_HUB_POWER    0x100                   /* distrust firmware power/oc setup */
+#define OHCI_QUIRK_AMD_ISO      0x200                   /* ISO transfers*/
         // there are also chip quirks/bugs in init logic
 
         struct work_struct      nec_work;       /* Worker for NEC quirk */
@@ -426,6 +429,10 @@ static inline int quirk_zfmicro(struct ohci_hcd *ohci)
 {
         return ohci->flags & OHCI_QUIRK_ZFMICRO;
 }
+static inline int quirk_amdiso(struct ohci_hcd *ohci)
+{
+        return ohci->flags & OHCI_QUIRK_AMD_ISO;
+}
 #else
 static inline int quirk_nec(struct ohci_hcd *ohci)
 {
@@ -435,6 +442,10 @@ static inline int quirk_zfmicro(struct ohci_hcd *ohci)
 {
         return 0;
 }
+static inline int quirk_amdiso(struct ohci_hcd *ohci)
+{
+        return 0;
+}
 #endif
 
 /* convert between an hcd pointer and the corresponding ohci_hcd */
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index d5f02dddb120..ea7126f99cab 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -964,11 +964,34 @@ static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
         disable_irq_nrdy(r8a66597, pipenum);
 }
 
+static void r8a66597_root_hub_start_polling(struct r8a66597 *r8a66597)
+{
+        mod_timer(&r8a66597->rh_timer,
+                        jiffies + msecs_to_jiffies(R8A66597_RH_POLL_TIME));
+}
+
+static void start_root_hub_sampling(struct r8a66597 *r8a66597, int port,
+                                        int connect)
+{
+        struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
+
+        rh->old_syssts = r8a66597_read(r8a66597, get_syssts_reg(port)) & LNST;
+        rh->scount = R8A66597_MAX_SAMPLING;
+        if (connect)
+                rh->port |= 1 << USB_PORT_FEAT_CONNECTION;
+        else
+                rh->port &= ~(1 << USB_PORT_FEAT_CONNECTION);
+        rh->port |= 1 << USB_PORT_FEAT_C_CONNECTION;
+
+        r8a66597_root_hub_start_polling(r8a66597);
+}
+
 /* this function must be called with interrupt disabled */
 static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port,
                                         u16 syssts)
 {
         if (syssts == SE0) {
+                r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
                 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
                 return;
         }
@@ -1002,13 +1025,10 @@ static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597, int port)
 {
         struct r8a66597_device *dev = r8a66597->root_hub[port].dev;
 
-        r8a66597->root_hub[port].port &= ~(1 << USB_PORT_FEAT_CONNECTION);
-        r8a66597->root_hub[port].port |= (1 << USB_PORT_FEAT_C_CONNECTION);
-
         disable_r8a66597_pipe_all(r8a66597, dev);
         free_usb_address(r8a66597, dev);
 
-        r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
+        start_root_hub_sampling(r8a66597, port, 0);
 }
 
 /* this function must be called with interrupt disabled */
@@ -1551,23 +1571,6 @@ static void irq_pipe_nrdy(struct r8a66597 *r8a66597)
         }
 }
 
-static void r8a66597_root_hub_start_polling(struct r8a66597 *r8a66597)
-{
-        mod_timer(&r8a66597->rh_timer,
-                        jiffies + msecs_to_jiffies(R8A66597_RH_POLL_TIME));
-}
-
-static void start_root_hub_sampling(struct r8a66597 *r8a66597, int port)
-{
-        struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
-
-        rh->old_syssts = r8a66597_read(r8a66597, get_syssts_reg(port)) & LNST;
-        rh->scount = R8A66597_MAX_SAMPLING;
-        r8a66597->root_hub[port].port |= (1 << USB_PORT_FEAT_CONNECTION)
-                                         | (1 << USB_PORT_FEAT_C_CONNECTION);
-        r8a66597_root_hub_start_polling(r8a66597);
-}
-
 static irqreturn_t r8a66597_irq(struct usb_hcd *hcd)
 {
         struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
@@ -1594,7 +1597,7 @@ static irqreturn_t r8a66597_irq(struct usb_hcd *hcd)
                         r8a66597_bclr(r8a66597, ATTCHE, INTENB2);
 
                         /* start usb bus sampling */
-                        start_root_hub_sampling(r8a66597, 1);
+                        start_root_hub_sampling(r8a66597, 1, 1);
                 }
                 if (mask2 & DTCH) {
                         r8a66597_write(r8a66597, ~DTCH, INTSTS2);
@@ -1609,7 +1612,7 @@ static irqreturn_t r8a66597_irq(struct usb_hcd *hcd)
                         r8a66597_bclr(r8a66597, ATTCHE, INTENB1);
 
                         /* start usb bus sampling */
-                        start_root_hub_sampling(r8a66597, 0);
+                        start_root_hub_sampling(r8a66597, 0, 1);
                 }
                 if (mask1 & DTCH) {
                         r8a66597_write(r8a66597, ~DTCH, INTSTS1);
diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig
index 001789c9a11a..4ea50e0abcbb 100644
--- a/drivers/usb/misc/Kconfig
+++ b/drivers/usb/misc/Kconfig
@@ -42,16 +42,6 @@ config USB_ADUTUX
           To compile this driver as a module, choose M here.  The module
           will be called adutux.
 
-config USB_AUERSWALD
-        tristate "USB Auerswald ISDN support"
-        depends on USB
-        help
-          Say Y here if you want to connect an Auerswald USB ISDN Device
-          to your computer's USB port.
-
-          To compile this driver as a module, choose M here: the
-          module will be called auerswald.
-
 config USB_RIO500
         tristate "USB Diamond Rio500 support"
         depends on USB
diff --git a/drivers/usb/misc/Makefile b/drivers/usb/misc/Makefile
index aba091cb5ec0..45b4e12afb08 100644
--- a/drivers/usb/misc/Makefile
+++ b/drivers/usb/misc/Makefile
@@ -5,7 +5,6 @@
 
 obj-$(CONFIG_USB_ADUTUX)        += adutux.o
 obj-$(CONFIG_USB_APPLEDISPLAY)  += appledisplay.o
-obj-$(CONFIG_USB_AUERSWALD)     += auerswald.o
 obj-$(CONFIG_USB_BERRY_CHARGE)  += berry_charge.o
 obj-$(CONFIG_USB_CYPRESS_CY7C63)+= cypress_cy7c63.o
 obj-$(CONFIG_USB_CYTHERM)       += cytherm.o
diff --git a/drivers/usb/misc/auerswald.c b/drivers/usb/misc/auerswald.c
deleted file mode 100644
index d2f61d5510e7..000000000000
--- a/drivers/usb/misc/auerswald.c
+++ /dev/null
@@ -1,2152 +0,0 @@
-/*****************************************************************************/
-/*
- *      auerswald.c  --  Auerswald PBX/System Telephone usb driver.
- *
- *      Copyright (C) 2001  Wolfgang Mües (wolfgang@iksw-muees.de)
- *
- *      Very much code of this driver is borrowed from dabusb.c (Deti Fliegl)
- *      and from the USB Skeleton driver (Greg Kroah-Hartman). Thank you.
- *
- *      This program is free software; you can redistribute it and/or modify
- *      it under the terms of the GNU General Public License as published by
- *      the Free Software Foundation; either version 2 of the License, or
- *      (at your option) any later version.
- *
- *      This program is distributed in the hope that it will be useful,
- *      but WITHOUT ANY WARRANTY; without even the implied warranty of
- *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *      GNU General Public License for more details.
- *
- *      You should have received a copy of the GNU General Public License
- *      along with this program; if not, write to the Free Software
- *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
- /*****************************************************************************/
-
-/* Standard Linux module include files */
-#include <asm/uaccess.h>
-#include <asm/byteorder.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/wait.h>
-#include <linux/usb.h>
-#include <linux/mutex.h>
-
-/*-------------------------------------------------------------------*/
-/* Debug support                                                     */
-#ifdef DEBUG
-#define dump( adr, len) \
-do {                    \
-        unsigned int u; \
-        printk (KERN_DEBUG); \
-        for (u = 0; u < len; u++) \
-                printk (" %02X", adr[u] & 0xFF); \
-        printk ("\n"); \
-} while (0)
-#else
-#define dump( adr, len)
-#endif
-
-/*-------------------------------------------------------------------*/
-/* Version Information */
-#define DRIVER_VERSION "0.9.11"
-#define DRIVER_AUTHOR  "Wolfgang Mües <wolfgang@iksw-muees.de>"
-#define DRIVER_DESC    "Auerswald PBX/System Telephone usb driver"
-
-/*-------------------------------------------------------------------*/
-/* Private declarations for Auerswald USB driver                     */
-
-/* Auerswald Vendor ID */
-#define ID_AUERSWALD    0x09BF
-
-#define AUER_MINOR_BASE 112     /* auerswald driver minor number */
-
-/* we can have up to this number of device plugged in at once */
-#define AUER_MAX_DEVICES 16
-
-
-/* Number of read buffers for each device */
-#define AU_RBUFFERS     10
-
-/* Number of chain elements for each control chain */
-#define AUCH_ELEMENTS   20
-
-/* Number of retries in communication */
-#define AU_RETRIES      10
-
-/*-------------------------------------------------------------------*/
-/* vendor specific protocol                                          */
-/* Header Byte */
-#define AUH_INDIRMASK   0x80    /* mask for direct/indirect bit */
-#define AUH_DIRECT      0x00    /* data is for USB device */
-#define AUH_INDIRECT    0x80    /* USB device is relay */
-
-#define AUH_SPLITMASK   0x40    /* mask for split bit */
-#define AUH_UNSPLIT     0x00    /* data block is full-size */
-#define AUH_SPLIT       0x40    /* data block is part of a larger one,
-                                   split-byte follows */
-
-#define AUH_TYPEMASK    0x3F    /* mask for type of data transfer */
-#define AUH_TYPESIZE    0x40    /* different types */
-#define AUH_DCHANNEL    0x00    /* D channel data */
-#define AUH_B1CHANNEL   0x01    /* B1 channel transparent */
-#define AUH_B2CHANNEL   0x02    /* B2 channel transparent */
-/*                0x03..0x0F       reserved for driver internal use */
-#define AUH_COMMAND     0x10    /* Command channel */
-#define AUH_BPROT       0x11    /* Configuration block protocol */
-#define AUH_DPROTANA    0x12    /* D channel protocol analyzer */
-#define AUH_TAPI        0x13    /* telephone api data (ATD) */
-/*                0x14..0x3F       reserved for other protocols */
-#define AUH_UNASSIGNED  0xFF    /* if char device has no assigned service */
-#define AUH_FIRSTUSERCH 0x11    /* first channel which is available for driver users */
-
-#define AUH_SIZE        1       /* Size of Header Byte */
-
-/* Split Byte. Only present if split bit in header byte set.*/
-#define AUS_STARTMASK   0x80    /* mask for first block of splitted frame */
-#define AUS_FIRST       0x80    /* first block */
-#define AUS_FOLLOW      0x00    /* following block */
-
-#define AUS_ENDMASK     0x40    /* mask for last block of splitted frame */
-#define AUS_END         0x40    /* last block */
-#define AUS_NOEND       0x00    /* not the last block */
-
-#define AUS_LENMASK     0x3F    /* mask for block length information */
-
-/* Request types */
-#define AUT_RREQ        (USB_DIR_IN  | USB_TYPE_VENDOR | USB_RECIP_OTHER)   /* Read Request */
-#define AUT_WREQ        (USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_OTHER)   /* Write Request */
-
-/* Vendor Requests */
-#define AUV_GETINFO     0x00    /* GetDeviceInfo */
-#define AUV_WBLOCK      0x01    /* Write Block */
-#define AUV_RBLOCK      0x02    /* Read Block */
-#define AUV_CHANNELCTL  0x03    /* Channel Control */
-#define AUV_DUMMY       0x04    /* Dummy Out for retry */
-
-/* Device Info Types */
-#define AUDI_NUMBCH     0x0000  /* Number of supported B channels */
-#define AUDI_OUTFSIZE   0x0001  /* Size of OUT B channel fifos */
-#define AUDI_MBCTRANS   0x0002  /* max. Blocklength of control transfer */
-
-/* Interrupt endpoint definitions */
-#define AU_IRQENDP      1       /* Endpoint number */
-#define AU_IRQCMDID     16      /* Command-block ID */
-#define AU_BLOCKRDY     0       /* Command: Block data ready on ctl endpoint */
-#define AU_IRQMINSIZE   5       /* Nr. of bytes decoded in this driver */
-
-/* Device String Descriptors */
-#define AUSI_VENDOR     1       /* "Auerswald GmbH & Co. KG" */
-#define AUSI_DEVICE     2       /* Name of the Device */
-#define AUSI_SERIALNR   3       /* Serial Number */
-#define AUSI_MSN        4       /* "MSN ..." (first) Multiple Subscriber Number */
-
-#define AUSI_DLEN       100     /* Max. Length of Device Description */
-
-#define AUV_RETRY       0x101   /* First Firmware version which can do control retries */
-
-/*-------------------------------------------------------------------*/
-/* External data structures / Interface                              */
-typedef struct
-{
-        char __user *buf;       /* return buffer for string contents */
-        unsigned int bsize;     /* size of return buffer */
-} audevinfo_t,*paudevinfo_t;
-
-/* IO controls */
-#define IOCTL_AU_SLEN     _IOR( 'U', 0xF0, int)         /* return the max. string descriptor length */
-#define IOCTL_AU_DEVINFO  _IOWR('U', 0xF1, audevinfo_t) /* get name of a specific device */
-#define IOCTL_AU_SERVREQ  _IOW( 'U', 0xF2, int)         /* request a service channel */
-#define IOCTL_AU_BUFLEN   _IOR( 'U', 0xF3, int)         /* return the max. buffer length for the device */
-#define IOCTL_AU_RXAVAIL  _IOR( 'U', 0xF4, int)         /* return != 0 if Receive Data available */
-#define IOCTL_AU_CONNECT  _IOR( 'U', 0xF5, int)         /* return != 0 if connected to a service channel */
-#define IOCTL_AU_TXREADY  _IOR( 'U', 0xF6, int)         /* return != 0 if Transmitt channel ready to send */
-/*                              'U'  0xF7..0xFF reseved */
-
-/*-------------------------------------------------------------------*/
-/* Internal data structures                                          */
-
-/* ..................................................................*/
-/* urb chain element */
-struct  auerchain;                      /* forward for circular reference */
-typedef struct
-{
-        struct auerchain *chain;        /* pointer to the chain to which this element belongs */
-        struct urb * urbp;                   /* pointer to attached urb */
-        void *context;                  /* saved URB context */
-        usb_complete_t complete;        /* saved URB completion function */
-        struct list_head list;          /* to include element into a list */
-} auerchainelement_t,*pauerchainelement_t;
-
-/* urb chain */
-typedef struct auerchain
-{
-        pauerchainelement_t active;     /* element which is submitted to urb */
-        spinlock_t lock;                /* protection agains interrupts */
-        struct list_head waiting_list;  /* list of waiting elements */
-        struct list_head free_list;     /* list of available elements */
-} auerchain_t,*pauerchain_t;
-
-/* urb blocking completion helper struct */
-typedef struct
-{
-        wait_queue_head_t wqh;          /* wait for completion */
-        unsigned int done;              /* completion flag */
-} auerchain_chs_t,*pauerchain_chs_t;
-
-/* ...................................................................*/
-/* buffer element */
-struct  auerbufctl;                     /* forward */
-typedef struct
-{
-        char *bufp;                     /* reference to allocated data buffer */
-        unsigned int len;               /* number of characters in data buffer */
-        unsigned int retries;           /* for urb retries */
-        struct usb_ctrlrequest *dr;     /* for setup data in control messages */
-        struct urb * urbp;                   /* USB urb */
-        struct auerbufctl *list;        /* pointer to list */
-        struct list_head buff_list;     /* reference to next buffer in list */
-} auerbuf_t,*pauerbuf_t;
-
-/* buffer list control block */
-typedef struct auerbufctl
-{
-        spinlock_t lock;                /* protection in interrupt */
-        struct list_head free_buff_list;/* free buffers */
-        struct list_head rec_buff_list; /* buffers with receive data */
-} auerbufctl_t,*pauerbufctl_t;
-
-/* ...................................................................*/
-/* service context */
-struct  auerscon;                       /* forward */
-typedef void (*auer_dispatch_t)(struct auerscon*, pauerbuf_t);
-typedef void (*auer_disconn_t) (struct auerscon*);
-typedef struct auerscon
-{
-        unsigned int id;                /* protocol service id AUH_xxxx */
-        auer_dispatch_t dispatch;       /* dispatch read buffer */
-        auer_disconn_t disconnect;      /* disconnect from device, wake up all char readers */
-} auerscon_t,*pauerscon_t;
-
-/* ...................................................................*/
-/* USB device context */
-typedef struct
-{
-        struct mutex    mutex;              /* protection in user context */
-        char                    name[20];           /* name of the /dev/usb entry */
-        unsigned int            dtindex;            /* index in the device table */
-        struct usb_device *     usbdev;             /* USB device handle */
-        int                     open_count;         /* count the number of open character channels */
-        char                    dev_desc[AUSI_DLEN];/* for storing a textual description */
-        unsigned int            maxControlLength;   /* max. Length of control paket (without header) */
-        struct urb *            inturbp;            /* interrupt urb */
-        char *                  intbufp;            /* data buffer for interrupt urb */
-        unsigned int            irqsize;            /* size of interrupt endpoint 1 */
-        struct auerchain        controlchain;       /* for chaining of control messages */
-        auerbufctl_t            bufctl;             /* Buffer control for control transfers */
-        pauerscon_t             services[AUH_TYPESIZE];/* context pointers for each service */
-        unsigned int            version;            /* Version of the device */
-        wait_queue_head_t       bufferwait;         /* wait for a control buffer */
-} auerswald_t,*pauerswald_t;
-
-/* ................................................................... */
-/* character device context */
-typedef struct
-{
-        struct mutex mutex;             /* protection in user context */
-        pauerswald_t auerdev;           /* context pointer of assigned device */
-        auerbufctl_t bufctl;            /* controls the buffer chain */
-        auerscon_t scontext;            /* service context */
-        wait_queue_head_t readwait;     /* for synchronous reading */
-        struct mutex readmutex;         /* protection against multiple reads */
-        pauerbuf_t readbuf;             /* buffer held for partial reading */
-        unsigned int readoffset;        /* current offset in readbuf */
-        unsigned int removed;           /* is != 0 if device is removed */
-} auerchar_t,*pauerchar_t;
-
-
-/*-------------------------------------------------------------------*/
-/* Forwards */
-static void auerswald_ctrlread_complete (struct urb * urb);
-static void auerswald_removeservice (pauerswald_t cp, pauerscon_t scp);
-static struct usb_driver auerswald_driver;
-
-
-/*-------------------------------------------------------------------*/
-/* USB chain helper functions                                        */
-/* --------------------------                                        */
-
-/* completion function for chained urbs */
-static void auerchain_complete (struct urb * urb)
-{
-        unsigned long flags;
-        int result;
-
-        /* get pointer to element and to chain */
-        pauerchainelement_t acep = urb->context;
-        pauerchain_t         acp = acep->chain;
-
-        /* restore original entries in urb */
-        urb->context  = acep->context;
-        urb->complete = acep->complete;
-
-        dbg ("auerchain_complete called");
-
-        /* call original completion function
-           NOTE: this function may lead to more urbs submitted into the chain.
-                 (no chain lock at calling complete()!)
-                 acp->active != NULL is protecting us against recursion.*/
-        urb->complete (urb);
-
-        /* detach element from chain data structure */
-        spin_lock_irqsave (&acp->lock, flags);
-        if (acp->active != acep) /* paranoia debug check */
-                dbg ("auerchain_complete: completion on non-active element called!");
-        else
-                acp->active = NULL;
-
-        /* add the used chain element to the list of free elements */
-        list_add_tail (&acep->list, &acp->free_list);
-        acep = NULL;
-
-        /* is there a new element waiting in the chain? */
-        if (!acp->active && !list_empty (&acp->waiting_list)) {
-                /* yes: get the entry */
-                struct list_head *tmp = acp->waiting_list.next;
-                list_del (tmp);
-                acep = list_entry (tmp, auerchainelement_t, list);
-                acp->active = acep;
-        }
-        spin_unlock_irqrestore (&acp->lock, flags);
-
-        /* submit the new urb */
-        if (acep) {
-                urb    = acep->urbp;
-                dbg ("auerchain_complete: submitting next urb from chain");
-                urb->status = 0;        /* needed! */
-                result = usb_submit_urb(urb, GFP_ATOMIC);
-
-                /* check for submit errors */
-                if (result) {
-                        urb->status = result;
-                        dbg("auerchain_complete: usb_submit_urb with error code %d", result);
-                        /* and do error handling via *this* completion function (recursive) */
-                        auerchain_complete( urb);
-                }
-        } else {
-                /* simple return without submitting a new urb.
-                   The empty chain is detected with acp->active == NULL. */
-        };
-}
-
-
-/* submit function for chained urbs
-   this function may be called from completion context or from user space!
-   early = 1 -> submit in front of chain
-*/
-static int auerchain_submit_urb_list (pauerchain_t acp, struct urb * urb, int early)
-{
-        int result;
-        unsigned long flags;
-        pauerchainelement_t acep = NULL;
-
-        dbg ("auerchain_submit_urb called");
-
-        /* try to get a chain element */
-        spin_lock_irqsave (&acp->lock, flags);
-        if (!list_empty (&acp->free_list)) {
-                /* yes: get the entry */
-                struct list_head *tmp = acp->free_list.next;
-                list_del (tmp);
-                acep = list_entry (tmp, auerchainelement_t, list);
-        }
-        spin_unlock_irqrestore (&acp->lock, flags);
-
-        /* if no chain element available: return with error */
-        if (!acep) {
-                return -ENOMEM;
-        }
-
-        /* fill in the new chain element values */
-        acep->chain    = acp;
-        acep->context  = urb->context;
-        acep->complete = urb->complete;
-        acep->urbp     = urb;
-        INIT_LIST_HEAD (&acep->list);
-
-        /* modify urb */
-        urb->context   = acep;
-        urb->complete  = auerchain_complete;
-        urb->status    = -EINPROGRESS;    /* usb_submit_urb does this, too */
-
-        /* add element to chain - or start it immediately */
-        spin_lock_irqsave (&acp->lock, flags);
-        if (acp->active) {
-                /* there is traffic in the chain, simple add element to chain */
-                if (early) {
-                        dbg ("adding new urb to head of chain");
-                        list_add (&acep->list, &acp->waiting_list);
-                } else {
-                        dbg ("adding new urb to end of chain");
-                        list_add_tail (&acep->list, &acp->waiting_list);
-                }
-                acep = NULL;
-        } else {
-                /* the chain is empty. Prepare restart */
-                acp->active = acep;
-        }
-        /* Spin has to be removed before usb_submit_urb! */
-        spin_unlock_irqrestore (&acp->lock, flags);
-
-        /* Submit urb if immediate restart */
-        if (acep) {
-                dbg("submitting urb immediate");
-                urb->status = 0;        /* needed! */
-                result = usb_submit_urb(urb, GFP_ATOMIC);
-                /* check for submit errors */
-                if (result) {
-                        urb->status = result;
-                        dbg("auerchain_submit_urb: usb_submit_urb with error code %d", result);
-                        /* and do error handling via completion function */
-                        auerchain_complete( urb);
-                }
-        }
-
-        return 0;
-}
-
-/* submit function for chained urbs
-   this function may be called from completion context or from user space!
-*/
-static int auerchain_submit_urb (pauerchain_t acp, struct urb * urb)
-{
-        return auerchain_submit_urb_list (acp, urb, 0);
-}
-
-/* cancel an urb which is submitted to the chain
-   the result is 0 if the urb is cancelled, or -EINPROGRESS if
-   the function is successfully started.
-*/
-static int auerchain_unlink_urb (pauerchain_t acp, struct urb * urb)
-{
-        unsigned long flags;
-        struct urb * urbp;
-        pauerchainelement_t acep;
-        struct list_head *tmp;
-
-        dbg ("auerchain_unlink_urb called");
-
-        /* search the chain of waiting elements */
-        spin_lock_irqsave (&acp->lock, flags);
-        list_for_each (tmp, &acp->waiting_list) {
-                acep = list_entry (tmp, auerchainelement_t, list);
-                if (acep->urbp == urb) {
-                        list_del (tmp);
-                        urb->context = acep->context;
-                        urb->complete = acep->complete;
-                        list_add_tail (&acep->list, &acp->free_list);
-                        spin_unlock_irqrestore (&acp->lock, flags);
-                        dbg ("unlink waiting urb");
-                        urb->status = -ENOENT;
-                        urb->complete (urb);
-                        return 0;
-                }
-        }
-        /* not found. */
-        spin_unlock_irqrestore (&acp->lock, flags);
-
-        /* get the active urb */
-        acep = acp->active;
-        if (acep) {
-                urbp = acep->urbp;
-
-                /* check if we have to cancel the active urb */
-                if (urbp == urb) {
-                        /* note that there is a race condition between the check above
-                           and the unlink() call because of no lock. This race is harmless,
-                           because the usb module will detect the unlink() after completion.
-                           We can't use the acp->lock here because the completion function
-                           wants to grab it.
-                        */
-                        dbg ("unlink active urb");
-                        return usb_unlink_urb (urbp);
-                }
-        }
-
-        /* not found anyway
-           ... is some kind of success
-        */
-        dbg ("urb to unlink not found in chain");
-        return 0;
-}
-
-/* cancel all urbs which are in the chain.
-   this function must not be called from interrupt or completion handler.
-*/
-static void auerchain_unlink_all (pauerchain_t acp)
-{
-        unsigned long flags;
-        struct urb * urbp;
-        pauerchainelement_t acep;
-
-        dbg ("auerchain_unlink_all called");
-
-        /* clear the chain of waiting elements */
-        spin_lock_irqsave (&acp->lock, flags);
-        while (!list_empty (&acp->waiting_list)) {
-                /* get the next entry */
-                struct list_head *tmp = acp->waiting_list.next;
-                list_del (tmp);
-                acep = list_entry (tmp, auerchainelement_t, list);
-                urbp = acep->urbp;
-                urbp->context = acep->context;
-                urbp->complete = acep->complete;
-                list_add_tail (&acep->list, &acp->free_list);
-                spin_unlock_irqrestore (&acp->lock, flags);
-                dbg ("unlink waiting urb");
-                urbp->status = -ENOENT;
-                urbp->complete (urbp);
-                spin_lock_irqsave (&acp->lock, flags);
-        }
-        spin_unlock_irqrestore (&acp->lock, flags);
-
-        /* clear the active urb */
-        acep = acp->active;
-        if (acep) {
-                urbp = acep->urbp;
-                dbg ("unlink active urb");
-                usb_kill_urb (urbp);
-        }
-}
-
-
-/* free the chain.
-   this function must not be called from interrupt or completion handler.
-*/
-static void auerchain_free (pauerchain_t acp)
-{
-        unsigned long flags;
-        pauerchainelement_t acep;
-
-        dbg ("auerchain_free called");
-
-        /* first, cancel all pending urbs */
-        auerchain_unlink_all (acp);
-
-        /* free the elements */
-        spin_lock_irqsave (&acp->lock, flags);
-        while (!list_empty (&acp->free_list)) {
-                /* get the next entry */
-                struct list_head *tmp = acp->free_list.next;
-                list_del (tmp);
-                spin_unlock_irqrestore (&acp->lock, flags);
-                acep = list_entry (tmp, auerchainelement_t, list);
-                kfree (acep);
-                spin_lock_irqsave (&acp->lock, flags);
-        }
-        spin_unlock_irqrestore (&acp->lock, flags);
-}
-
-
-/* Init the chain control structure */
-static void auerchain_init (pauerchain_t acp)
-{
-        /* init the chain data structure */
-        acp->active = NULL;
-        spin_lock_init (&acp->lock);
-        INIT_LIST_HEAD (&acp->waiting_list);
-        INIT_LIST_HEAD (&acp->free_list);
-}
-
-/* setup a chain.
-   It is assumed that there is no concurrency while setting up the chain
-   requirement: auerchain_init()
-*/
-static int auerchain_setup (pauerchain_t acp, unsigned int numElements)
-{
-        pauerchainelement_t acep;
-
-        dbg ("auerchain_setup called with %d elements", numElements);
-
-        /* fill the list of free elements */
-        for (;numElements; numElements--) {
-                acep = kzalloc(sizeof(auerchainelement_t), GFP_KERNEL);
-                if (!acep)
-                        goto ac_fail;
-                INIT_LIST_HEAD (&acep->list);
-                list_add_tail (&acep->list, &acp->free_list);
-        }
-        return 0;
-
-ac_fail:/* free the elements */
-        while (!list_empty (&acp->free_list)) {
-                /* get the next entry */
-                struct list_head *tmp = acp->free_list.next;
-                list_del (tmp);
-                acep = list_entry (tmp, auerchainelement_t, list);
-                kfree (acep);
-        }
-        return -ENOMEM;
-}
-
-
-/* completion handler for synchronous chained URBs */
-static void auerchain_blocking_completion (struct urb *urb)
-{
-        pauerchain_chs_t pchs = urb->context;
-        pchs->done = 1;
-        wmb();
-        wake_up (&pchs->wqh);
-}
-
-
-/* Starts chained urb and waits for completion or timeout */
-static int auerchain_start_wait_urb (pauerchain_t acp, struct urb *urb, int timeout, int* actual_length)
-{
-        auerchain_chs_t chs;
-        int status;
-
-        dbg ("auerchain_start_wait_urb called");
-        init_waitqueue_head (&chs.wqh);
-        chs.done = 0;
-
-        urb->context = &chs;
-        status = auerchain_submit_urb (acp, urb);
-        if (status)
-                /* something went wrong */
-                return status;
-
-        timeout = wait_event_timeout(chs.wqh, chs.done, timeout);
-
-        if (!timeout && !chs.done) {
-                if (urb->status != -EINPROGRESS) {      /* No callback?!! */
-                        dbg ("auerchain_start_wait_urb: raced timeout");
-                        status = urb->status;
-                } else {
-                        dbg ("auerchain_start_wait_urb: timeout");
-                        auerchain_unlink_urb (acp, urb);  /* remove urb safely */
-                        status = -ETIMEDOUT;
-                }
-        } else
-                status = urb->status;
-
-        if (status >= 0)
-                *actual_length = urb->actual_length;
-
-        return status;
-}
-
-
-/* auerchain_control_msg - Builds a control urb, sends it off and waits for completion
-   acp: pointer to the auerchain
-   dev: pointer to the usb device to send the message to
-   pipe: endpoint "pipe" to send the message to
-   request: USB message request value
-   requesttype: USB message request type value
-   value: USB message value
-   index: USB message index value
-   data: pointer to the data to send
-   size: length in bytes of the data to send
-   timeout: time to wait for the message to complete before timing out (if 0 the wait is forever)
-
-   This function sends a simple control message to a specified endpoint
-   and waits for the message to complete, or timeout.
-
-   If successful, it returns the transferred length, otherwise a negative error number.
-
-   Don't use this function from within an interrupt context, like a
-   bottom half handler.  If you need an asynchronous message, or need to send
-   a message from within interrupt context, use auerchain_submit_urb()
-*/
-static int auerchain_control_msg (pauerchain_t acp, struct usb_device *dev, unsigned int pipe, __u8 request, __u8 requesttype,
-                                  __u16 value, __u16 index, void *data, __u16 size, int timeout)
-{
-        int ret;
-        struct usb_ctrlrequest *dr;
-        struct urb *urb;
-        int uninitialized_var(length);
-
-        dbg ("auerchain_control_msg");
-        dr = kmalloc (sizeof (struct usb_ctrlrequest), GFP_KERNEL);
-        if (!dr)
-                return -ENOMEM;
-        urb = usb_alloc_urb (0, GFP_KERNEL);
-        if (!urb) {
-                kfree (dr);
-                return -ENOMEM;
-        }
-
-        dr->bRequestType = requesttype;
-        dr->bRequest = request;
-        dr->wValue  = cpu_to_le16 (value);
-        dr->wIndex  = cpu_to_le16 (index);
-        dr->wLength = cpu_to_le16 (size);
-
-        usb_fill_control_urb (urb, dev, pipe, (unsigned char*)dr, data, size,    /* build urb */
-                          auerchain_blocking_completion, NULL);
-        ret = auerchain_start_wait_urb (acp, urb, timeout, &length);
-
-        usb_free_urb (urb);
-        kfree (dr);
-
-        if (ret < 0)
-                return ret;
-        else
-                return length;
-}
-
-
-/*-------------------------------------------------------------------*/
-/* Buffer List helper functions                                      */
-
-/* free a single auerbuf */
-static void auerbuf_free (pauerbuf_t bp)
-{
-        kfree(bp->bufp);
-        kfree(bp->dr);
-        usb_free_urb(bp->urbp);
-        kfree(bp);
-}
-
-/* free the buffers from an auerbuf list */
-static void auerbuf_free_list (struct list_head *q)
-{
-        struct list_head *tmp;
-        struct list_head *p;
-        pauerbuf_t bp;
-
-        dbg ("auerbuf_free_list");
-        for (p = q->next; p != q;) {
-                bp = list_entry (p, auerbuf_t, buff_list);
-                tmp = p->next;
-                list_del (p);
-                p = tmp;
-                auerbuf_free (bp);
-        }
-}
-
-/* init the members of a list control block */
-static void auerbuf_init (pauerbufctl_t bcp)
-{
-        dbg ("auerbuf_init");
-        spin_lock_init (&bcp->lock);
-        INIT_LIST_HEAD (&bcp->free_buff_list);
-        INIT_LIST_HEAD (&bcp->rec_buff_list);
-}
-
-/* free all buffers from an auerbuf chain */
-static void auerbuf_free_buffers (pauerbufctl_t bcp)
-{
-        unsigned long flags;
-        dbg ("auerbuf_free_buffers");
-
-        spin_lock_irqsave (&bcp->lock, flags);
-
-        auerbuf_free_list (&bcp->free_buff_list);
-        auerbuf_free_list (&bcp->rec_buff_list);
-
-        spin_unlock_irqrestore (&bcp->lock, flags);
-}
-
-/* setup a list of buffers */
-/* requirement: auerbuf_init() */
-static int auerbuf_setup (pauerbufctl_t bcp, unsigned int numElements, unsigned int bufsize)
-{
-        pauerbuf_t bep = NULL;
-
-        dbg ("auerbuf_setup called with %d elements of %d bytes", numElements, bufsize);
-
-        /* fill the list of free elements */
-        for (;numElements; numElements--) {
-                bep = kzalloc(sizeof(auerbuf_t), GFP_KERNEL);
-                if (!bep)
-                        goto bl_fail;
-                bep->list = bcp;
-                INIT_LIST_HEAD (&bep->buff_list);
-                bep->bufp = kmalloc (bufsize, GFP_KERNEL);
-                if (!bep->bufp)
-                        goto bl_fail;
-                bep->dr = kmalloc(sizeof (struct usb_ctrlrequest), GFP_KERNEL);
-                if (!bep->dr)
-                        goto bl_fail;
-                bep->urbp = usb_alloc_urb (0, GFP_KERNEL);
-                if (!bep->urbp)
-                        goto bl_fail;
-                list_add_tail (&bep->buff_list, &bcp->free_buff_list);
-        }
-        return 0;
-
-bl_fail:/* not enough memory. Free allocated elements */
-        dbg ("auerbuf_setup: no more memory");
-        auerbuf_free(bep);
-        auerbuf_free_buffers (bcp);
-        return -ENOMEM;
-}
-
-/* insert a used buffer into the free list */
-static void auerbuf_releasebuf( pauerbuf_t bp)
-{
-        unsigned long flags;
-        pauerbufctl_t bcp = bp->list;
-        bp->retries = 0;
-
-        dbg ("auerbuf_releasebuf called");
-        spin_lock_irqsave (&bcp->lock, flags);
-        list_add_tail (&bp->buff_list, &bcp->free_buff_list);
-        spin_unlock_irqrestore (&bcp->lock, flags);
-}
-
-
-/*-------------------------------------------------------------------*/
-/* Completion handlers */
-
-/* Values of urb->status or results of usb_submit_urb():
-0               Initial, OK
--EINPROGRESS    during submission until end
--ENOENT         if urb is unlinked
--ETIME          Device did not respond
--ENOMEM         Memory Overflow
--ENODEV         Specified USB-device or bus doesn't exist
--ENXIO          URB already queued
--EINVAL         a) Invalid transfer type specified (or not supported)
-                b) Invalid interrupt interval (0n256)
--EAGAIN         a) Specified ISO start frame too early
-                b) (using ISO-ASAP) Too much scheduled for the future wait some time and try again.
--EFBIG          Too much ISO frames requested (currently uhci900)
--EPIPE          Specified pipe-handle/Endpoint is already stalled
--EMSGSIZE       Endpoint message size is zero, do interface/alternate setting
--EPROTO         a) Bitstuff error
-                b) Unknown USB error
--EILSEQ         CRC mismatch
--ENOSR          Buffer error
--EREMOTEIO      Short packet detected
--EXDEV          ISO transfer only partially completed look at individual frame status for details
--EINVAL         ISO madness, if this happens: Log off and go home
--EOVERFLOW      babble
-*/
-
-/* check if a status code allows a retry */
-static int auerswald_status_retry (int status)
-{
-        switch (status) {
-        case 0:
-        case -ETIME:
-        case -EOVERFLOW:
-        case -EAGAIN:
-        case -EPIPE:
-        case -EPROTO:
-        case -EILSEQ:
-        case -ENOSR:
-        case -EREMOTEIO:
-                return 1; /* do a retry */
-        }
-        return 0;       /* no retry possible */
-}
-
-/* Completion of asynchronous write block */
-static void auerchar_ctrlwrite_complete (struct urb * urb)
-{
-        pauerbuf_t bp =  urb->context;
-        pauerswald_t cp = ((pauerswald_t)((char *)(bp->list)-(unsigned long)(&((pauerswald_t)0)->bufctl)));
-        dbg ("auerchar_ctrlwrite_complete called");
-
-        /* reuse the buffer */
-        auerbuf_releasebuf (bp);
-        /* Wake up all processes waiting for a buffer */
-        wake_up (&cp->bufferwait);
-}
-
-/* Completion handler for dummy retry packet */
-static void auerswald_ctrlread_wretcomplete (struct urb * urb)
-{
-        pauerbuf_t bp = urb->context;
-        pauerswald_t cp;
-        int ret;
-        int status = urb->status;
-
-        dbg ("auerswald_ctrlread_wretcomplete called");
-        dbg ("complete with status: %d", status);
-        cp = ((pauerswald_t)((char *)(bp->list)-(unsigned long)(&((pauerswald_t)0)->bufctl)));
-
-        /* check if it is possible to advance */
-        if (!auerswald_status_retry(status) || !cp->usbdev) {
-                /* reuse the buffer */
-                err ("control dummy: transmission error %d, can not retry", status);
-                auerbuf_releasebuf (bp);
-                /* Wake up all processes waiting for a buffer */
-                wake_up (&cp->bufferwait);
-                return;
-        }
-
-        /* fill the control message */
-        bp->dr->bRequestType = AUT_RREQ;
-        bp->dr->bRequest     = AUV_RBLOCK;
-        bp->dr->wLength      = bp->dr->wValue;  /* temporary stored */
-        bp->dr->wValue       = cpu_to_le16 (1); /* Retry Flag */
-        /* bp->dr->index    = channel id;          remains */
-        usb_fill_control_urb (bp->urbp, cp->usbdev, usb_rcvctrlpipe (cp->usbdev, 0),
-                          (unsigned char*)bp->dr, bp->bufp, le16_to_cpu (bp->dr->wLength),
-                          auerswald_ctrlread_complete,bp);
-
-        /* submit the control msg as next paket */
-        ret = auerchain_submit_urb_list (&cp->controlchain, bp->urbp, 1);
-        if (ret) {
-                dbg ("auerswald_ctrlread_complete: nonzero result of auerchain_submit_urb_list %d", ret);
-                bp->urbp->status = ret;
-                auerswald_ctrlread_complete (bp->urbp);
-        }
-}
-
-/* completion handler for receiving of control messages */
-static void auerswald_ctrlread_complete (struct urb * urb)
-{
-        unsigned int  serviceid;
-        pauerswald_t  cp;
-        pauerscon_t   scp;
-        pauerbuf_t bp = urb->context;
-        int status = urb->status;
-        int ret;
-
-        dbg ("auerswald_ctrlread_complete called");
-
-        cp = ((pauerswald_t)((char *)(bp->list)-(unsigned long)(&((pauerswald_t)0)->bufctl)));
-
-        /* check if there is valid data in this urb */
-        if (status) {
-                dbg ("complete with non-zero status: %d", status);
-                /* should we do a retry? */
-                if (!auerswald_status_retry(status)
-                 || !cp->usbdev
-                 || (cp->version < AUV_RETRY)
-                 || (bp->retries >= AU_RETRIES)) {
-                        /* reuse the buffer */
-                        err ("control read: transmission error %d, can not retry", status);
-                        auerbuf_releasebuf (bp);
-                        /* Wake up all processes waiting for a buffer */
-                        wake_up (&cp->bufferwait);
-                        return;
-                }
-                bp->retries++;
-                dbg ("Retry count = %d", bp->retries);
-                /* send a long dummy control-write-message to allow device firmware to react */
-                bp->dr->bRequestType = AUT_WREQ;
-                bp->dr->bRequest     = AUV_DUMMY;
-                bp->dr->wValue       = bp->dr->wLength; /* temporary storage */
-                // bp->dr->wIndex    channel ID remains
-                bp->dr->wLength      = cpu_to_le16 (32); /* >= 8 bytes */
-                usb_fill_control_urb (bp->urbp, cp->usbdev, usb_sndctrlpipe (cp->usbdev, 0),
-                        (unsigned char*)bp->dr, bp->bufp, 32,
-                        auerswald_ctrlread_wretcomplete,bp);
-
-                /* submit the control msg as next paket */
-                ret = auerchain_submit_urb_list (&cp->controlchain, bp->urbp, 1);
-                if (ret) {
-                        dbg ("auerswald_ctrlread_complete: nonzero result of auerchain_submit_urb_list %d", ret);
-                        bp->urbp->status = ret;
-                        auerswald_ctrlread_wretcomplete (bp->urbp);
-                }
-                return;
-        }
-
-        /* get the actual bytecount (incl. headerbyte) */
-        bp->len = urb->actual_length;
-        serviceid = bp->bufp[0] & AUH_TYPEMASK;
-        dbg ("Paket with serviceid %d and %d bytes received", serviceid, bp->len);
-
-        /* dispatch the paket */
-        scp = cp->services[serviceid];
-        if (scp) {
-                /* look, Ma, a listener! */
-                scp->dispatch (scp, bp);
-        }
-
-        /* release the paket */
-        auerbuf_releasebuf (bp);
-        /* Wake up all processes waiting for a buffer */
-        wake_up (&cp->bufferwait);
-}
-
-/*-------------------------------------------------------------------*/
-/* Handling of Interrupt Endpoint                                    */
-/* This interrupt Endpoint is used to inform the host about waiting
-   messages from the USB device.
-*/
-/* int completion handler. */
-static void auerswald_int_complete (struct urb * urb)
-{
-        unsigned long flags;
-        unsigned  int channelid;
-        unsigned  int bytecount;
-        int ret;
-        int status = urb->status;
-        pauerbuf_t   bp = NULL;
-        pauerswald_t cp = urb->context;
-
-        dbg ("%s called", __func__);
-
-        switch (status) {
-        case 0:
-                /* success */
-                break;
-        case -ECONNRESET:
-        case -ENOENT:
-        case -ESHUTDOWN:
-                /* this urb is terminated, clean up */
-                dbg("%s - urb shutting down with status: %d", __func__, status);
-                return;
-        default:
-                dbg("%s - nonzero urb status received: %d", __func__, status);
-                goto exit;
-        }
-
-        /* check if all needed data was received */
-        if (urb->actual_length < AU_IRQMINSIZE) {
-                dbg ("invalid data length received: %d bytes", urb->actual_length);
-                goto exit;
-        }
-
-        /* check the command code */
-        if (cp->intbufp[0] != AU_IRQCMDID) {
-                dbg ("invalid command received: %d", cp->intbufp[0]);
-                goto exit;
-        }
-
-        /* check the command type */
-        if (cp->intbufp[1] != AU_BLOCKRDY) {
-                dbg ("invalid command type received: %d", cp->intbufp[1]);
-                goto exit;
-        }
-
-        /* now extract the information */
-        channelid = cp->intbufp[2];
-        bytecount = (unsigned char)cp->intbufp[3];
-        bytecount |= (unsigned char)cp->intbufp[4] << 8;
-
-        /* check the channel id */
-        if (channelid >= AUH_TYPESIZE) {
-                dbg ("invalid channel id received: %d", channelid);
-                goto exit;
-        }
-
-        /* check the byte count */
-        if (bytecount > (cp->maxControlLength+AUH_SIZE)) {
-                dbg ("invalid byte count received: %d", bytecount);
-                goto exit;
-        }
-        dbg ("Service Channel = %d", channelid);
-        dbg ("Byte Count = %d", bytecount);
-
-        /* get a buffer for the next data paket */
-        spin_lock_irqsave (&cp->bufctl.lock, flags);
-        if (!list_empty (&cp->bufctl.free_buff_list)) {
-                /* yes: get the entry */
-                struct list_head *tmp = cp->bufctl.free_buff_list.next;
-                list_del (tmp);
-                bp = list_entry (tmp, auerbuf_t, buff_list);
-        }
-        spin_unlock_irqrestore (&cp->bufctl.lock, flags);
-
-        /* if no buffer available: skip it */
-        if (!bp) {
-                dbg ("auerswald_int_complete: no data buffer available");
-                /* can we do something more?
-                   This is a big problem: if this int packet is ignored, the
-                   device will wait forever and not signal any more data.
-                   The only real solution is: having enough buffers!
-                   Or perhaps temporary disabling the int endpoint?
-                */
-                goto exit;
-        }
-
-        /* fill the control message */
-        bp->dr->bRequestType = AUT_RREQ;
-        bp->dr->bRequest     = AUV_RBLOCK;
-        bp->dr->wValue       = cpu_to_le16 (0);
-        bp->dr->wIndex       = cpu_to_le16 (channelid | AUH_DIRECT | AUH_UNSPLIT);
-        bp->dr->wLength      = cpu_to_le16 (bytecount);
-        usb_fill_control_urb (bp->urbp, cp->usbdev, usb_rcvctrlpipe (cp->usbdev, 0),
-                          (unsigned char*)bp->dr, bp->bufp, bytecount,
-                          auerswald_ctrlread_complete,bp);
-
-        /* submit the control msg */
-        ret = auerchain_submit_urb (&cp->controlchain, bp->urbp);
-        if (ret) {
-                dbg ("auerswald_int_complete: nonzero result of auerchain_submit_urb %d", ret);
-                bp->urbp->status = ret;
-                auerswald_ctrlread_complete( bp->urbp);
-                /* here applies the same problem as above: device locking! */
-        }
-exit:
-        ret = usb_submit_urb (urb, GFP_ATOMIC);
-        if (ret)
-                err ("%s - usb_submit_urb failed with result %d",
-                     __func__, ret);
-}
-
-/* int memory deallocation
-   NOTE: no mutex please!
-*/
-static void auerswald_int_free (pauerswald_t cp)
-{
-        if (cp->inturbp) {
-                usb_free_urb(cp->inturbp);
-                cp->inturbp = NULL;
-        }
-        kfree(cp->intbufp);
-        cp->intbufp = NULL;
-}
-
-/* This function is called to activate the interrupt
-   endpoint. This function returns 0 if successful or an error code.
-   NOTE: no mutex please!
-*/
-static int auerswald_int_open (pauerswald_t cp)
-{
-        int ret;
-        struct usb_host_endpoint *ep;
-        int irqsize;
-        dbg ("auerswald_int_open");
-
-        ep = cp->usbdev->ep_in[AU_IRQENDP];
-        if (!ep) {
-                ret = -EFAULT;
-                goto intoend;
-        }
-        irqsize = le16_to_cpu(ep->desc.wMaxPacketSize);
-        cp->irqsize = irqsize;
-
-        /* allocate the urb and data buffer */
-        if (!cp->inturbp) {
-                cp->inturbp = usb_alloc_urb (0, GFP_KERNEL);
-                if (!cp->inturbp) {
-                        ret = -ENOMEM;
-                        goto intoend;
-                }
-        }
-        if (!cp->intbufp) {
-                cp->intbufp = kmalloc (irqsize, GFP_KERNEL);
-                if (!cp->intbufp) {
-                        ret = -ENOMEM;
-                        goto intoend;
-                }
-        }
-        /* setup urb */
-        usb_fill_int_urb (cp->inturbp, cp->usbdev,
-                        usb_rcvintpipe (cp->usbdev,AU_IRQENDP), cp->intbufp,
-                        irqsize, auerswald_int_complete, cp, ep->desc.bInterval);
-        /* start the urb */
-        cp->inturbp->status = 0;        /* needed! */
-        ret = usb_submit_urb (cp->inturbp, GFP_KERNEL);
-
-intoend:
-        if (ret < 0) {
-                /* activation of interrupt endpoint has failed. Now clean up. */
-                dbg ("auerswald_int_open: activation of int endpoint failed");
-
-                /* deallocate memory */
-                auerswald_int_free (cp);
-        }
-        return ret;
-}
-
-/* This function is called to deactivate the interrupt
-   endpoint. This function returns 0 if successful or an error code.
-   NOTE: no mutex please!
-*/
-static void auerswald_int_release (pauerswald_t cp)
-{
-        dbg ("auerswald_int_release");
-
-        /* stop the int endpoint */
-        usb_kill_urb (cp->inturbp);
-
-        /* deallocate memory */
-        auerswald_int_free (cp);
-}
-
-/* --------------------------------------------------------------------- */
-/* Helper functions                                                      */
-
-/* wake up waiting readers */
-static void auerchar_disconnect (pauerscon_t scp)
-{
-        pauerchar_t ccp = ((pauerchar_t)((char *)(scp)-(unsigned long)(&((pauerchar_t)0)->scontext)));
-        dbg ("auerchar_disconnect called");
-        ccp->removed = 1;
-        wake_up (&ccp->readwait);
-}
-
-
-/* dispatch a read paket to a waiting character device */
-static void auerchar_ctrlread_dispatch (pauerscon_t scp, pauerbuf_t bp)
-{
-        unsigned long flags;
-        pauerchar_t ccp;
-        pauerbuf_t newbp = NULL;
-        char * charp;
-        dbg ("auerchar_ctrlread_dispatch called");
-        ccp = ((pauerchar_t)((char *)(scp)-(unsigned long)(&((pauerchar_t)0)->scontext)));
-
-        /* get a read buffer from character device context */
-        spin_lock_irqsave (&ccp->bufctl.lock, flags);
-        if (!list_empty (&ccp->bufctl.free_buff_list)) {
-                /* yes: get the entry */
-                struct list_head *tmp = ccp->bufctl.free_buff_list.next;
-                list_del (tmp);
-                newbp = list_entry (tmp, auerbuf_t, buff_list);
-        }
-        spin_unlock_irqrestore (&ccp->bufctl.lock, flags);
-
-        if (!newbp) {
-                dbg ("No read buffer available, discard paket!");
-                return;     /* no buffer, no dispatch */
-        }
-
-        /* copy information to new buffer element
-           (all buffers have the same length) */
-        charp = newbp->bufp;
-        newbp->bufp = bp->bufp;
-        bp->bufp = charp;
-        newbp->len = bp->len;
-
-        /* insert new buffer in read list */
-        spin_lock_irqsave (&ccp->bufctl.lock, flags);
-        list_add_tail (&newbp->buff_list, &ccp->bufctl.rec_buff_list);
-        spin_unlock_irqrestore (&ccp->bufctl.lock, flags);
-        dbg ("read buffer appended to rec_list");
-
-        /* wake up pending synchronous reads */
-        wake_up (&ccp->readwait);
-}
-
-
-/* Delete an auerswald driver context */
-static void auerswald_delete( pauerswald_t cp)
-{
-        dbg( "auerswald_delete");
-        if (cp == NULL)
-                return;
-
-        /* Wake up all processes waiting for a buffer */
-        wake_up (&cp->bufferwait);
-
-        /* Cleaning up */
-        auerswald_int_release (cp);
-        auerchain_free (&cp->controlchain);
-        auerbuf_free_buffers (&cp->bufctl);
-
-        /* release the memory */
-        kfree( cp);
-}
-
-
-/* Delete an auerswald character context */
-static void auerchar_delete( pauerchar_t ccp)
-{
-        dbg ("auerchar_delete");
-        if (ccp == NULL)
-                return;
-
-        /* wake up pending synchronous reads */
-        ccp->removed = 1;
-        wake_up (&ccp->readwait);
-
-        /* remove the read buffer */
-        if (ccp->readbuf) {
-                auerbuf_releasebuf (ccp->readbuf);
-                ccp->readbuf = NULL;
-        }
-
-        /* remove the character buffers */
-        auerbuf_free_buffers (&ccp->bufctl);
-
-        /* release the memory */
-        kfree( ccp);
-}
-
-
-/* add a new service to the device
-   scp->id must be set!
-   return: 0 if OK, else error code
-*/
-static int auerswald_addservice (pauerswald_t cp, pauerscon_t scp)
-{
-        int ret;
-
-        /* is the device available? */
-        if (!cp->usbdev) {
-                dbg ("usbdev == NULL");
-                return -EIO;    /*no: can not add a service, sorry*/
-        }
-
-        /* is the service available? */
-        if (cp->services[scp->id]) {
-                dbg ("service is busy");
-                return -EBUSY;
-        }
-
-        /* device is available, service is free */
-        cp->services[scp->id] = scp;
-
-        /* register service in device */
-        ret = auerchain_control_msg(
-                &cp->controlchain,                      /* pointer to control chain */
-                cp->usbdev,                             /* pointer to device */
-                usb_sndctrlpipe (cp->usbdev, 0),        /* pipe to control endpoint */
-                AUV_CHANNELCTL,                         /* USB message request value */
-                AUT_WREQ,                               /* USB message request type value */
-                0x01,              /* open                 USB message value */
-                scp->id,                                /* USB message index value */
-                NULL,                                   /* pointer to the data to send */
-                0,                                      /* length in bytes of the data to send */
-                HZ * 2);                                /* time to wait for the message to complete before timing out */
-        if (ret < 0) {
-                dbg ("auerswald_addservice: auerchain_control_msg returned error code %d", ret);
-                /* undo above actions */
-                cp->services[scp->id] = NULL;
-                return ret;
-        }
-
-        dbg ("auerswald_addservice: channel open OK");
-        return 0;
-}
-
-
-/* remove a service from the device
-   scp->id must be set! */
-static void auerswald_removeservice (pauerswald_t cp, pauerscon_t scp)
-{
-        dbg ("auerswald_removeservice called");
-
-        /* check if we have a service allocated */
-        if (scp->id == AUH_UNASSIGNED)
-                return;
-
-        /* If there is a device: close the channel */
-        if (cp->usbdev) {
-                /* Close the service channel inside the device */
-                int ret = auerchain_control_msg(
-                &cp->controlchain,                      /* pointer to control chain */
-                cp->usbdev,                             /* pointer to device */
-                usb_sndctrlpipe (cp->usbdev, 0),        /* pipe to control endpoint */
-                AUV_CHANNELCTL,                         /* USB message request value */
-                AUT_WREQ,                               /* USB message request type value */
-                0x00,              // close             /* USB message value */
-                scp->id,                                /* USB message index value */
-                NULL,                                   /* pointer to the data to send */
-                0,                                      /* length in bytes of the data to send */
-                HZ * 2);                                /* time to wait for the message to complete before timing out */
-                if (ret < 0) {
-                        dbg ("auerswald_removeservice: auerchain_control_msg returned error code %d", ret);
-                }
-                else {
-                        dbg ("auerswald_removeservice: channel close OK");
-                }
-        }
-
-        /* remove the service from the device */
-        cp->services[scp->id] = NULL;
-        scp->id = AUH_UNASSIGNED;
-}
-
-
-/* --------------------------------------------------------------------- */
-/* Char device functions                                                 */
-
-/* Open a new character device */
-static int auerchar_open (struct inode *inode, struct file *file)
-{
-        int dtindex = iminor(inode);
-        pauerswald_t cp = NULL;
-        pauerchar_t ccp = NULL;
-        struct usb_interface *intf;
-        int ret;
-
-        /* minor number in range? */
-        if (dtindex < 0) {
-                return -ENODEV;
-        }
-        intf = usb_find_interface(&auerswald_driver, dtindex);
-        if (!intf) {
-                return -ENODEV;
-        }
-
-        /* usb device available? */
-        cp = usb_get_intfdata (intf);
-        if (cp == NULL) {
-                return -ENODEV;
-        }
-        if (mutex_lock_interruptible(&cp->mutex)) {
-                return -ERESTARTSYS;
-        }
-
-        /* we have access to the device. Now lets allocate memory */
-        ccp = kzalloc(sizeof(auerchar_t), GFP_KERNEL);
-        if (ccp == NULL) {
-                err ("out of memory");
-                ret = -ENOMEM;
-                goto ofail;
-        }
-
-        /* Initialize device descriptor */
-        mutex_init(&ccp->mutex);
-        mutex_init(&ccp->readmutex);
-        auerbuf_init (&ccp->bufctl);
-        ccp->scontext.id = AUH_UNASSIGNED;
-        ccp->scontext.dispatch = auerchar_ctrlread_dispatch;
-        ccp->scontext.disconnect = auerchar_disconnect;
-        init_waitqueue_head (&ccp->readwait);
-
-        ret = auerbuf_setup (&ccp->bufctl, AU_RBUFFERS, cp->maxControlLength+AUH_SIZE);
-        if (ret) {
-                goto ofail;
-        }
-
-        cp->open_count++;
-        ccp->auerdev = cp;
-        dbg("open %s as /dev/%s", cp->dev_desc, cp->name);
-        mutex_unlock(&cp->mutex);
-
-        /* file IO stuff */
-        file->f_pos = 0;
-        file->private_data = ccp;
-        return nonseekable_open(inode, file);
-
-        /* Error exit */
-ofail:  mutex_unlock(&cp->mutex);
-        auerchar_delete (ccp);
-        return ret;
-}
-
-
-/* IOCTL functions */
-static long auerchar_ioctl(struct file *file, unsigned int cmd,
-                                                        unsigned long arg)
-{
-        pauerchar_t ccp = (pauerchar_t) file->private_data;
-        int ret = 0;
-        audevinfo_t devinfo;
-        pauerswald_t cp = NULL;
-        unsigned int u;
-        unsigned int __user *user_arg = (unsigned int __user *)arg;
-
-        dbg ("ioctl");
-
-        /* get the mutexes */
-        if (mutex_lock_interruptible(&ccp->mutex)) {
-                return -ERESTARTSYS;
-        }
-        cp = ccp->auerdev;
-        if (!cp) {
-                mutex_unlock(&ccp->mutex);
-                return -ENODEV;
-        }
-        if (mutex_lock_interruptible(&cp->mutex)) {
-                mutex_unlock(&ccp->mutex);
-                return -ERESTARTSYS;
-        }
-
-        /* Check for removal */
-        if (!cp->usbdev) {
-                mutex_unlock(&cp->mutex);
-                mutex_unlock(&ccp->mutex);
-                return -ENODEV;
-        }
-        lock_kernel();
-        switch (cmd) {
-
-        /* return != 0 if Transmitt channel ready to send */
-        case IOCTL_AU_TXREADY:
-                dbg ("IOCTL_AU_TXREADY");
-                u   = ccp->auerdev
-                   && (ccp->scontext.id != AUH_UNASSIGNED)
-                   && !list_empty (&cp->bufctl.free_buff_list);
-                ret = put_user (u, user_arg);
-                break;
-
-        /* return != 0 if connected to a service channel */
-        case IOCTL_AU_CONNECT:
-                dbg ("IOCTL_AU_CONNECT");
-                u = (ccp->scontext.id != AUH_UNASSIGNED);
-                ret = put_user (u, user_arg);
-                break;
-
-        /* return != 0 if Receive Data available */
-        case IOCTL_AU_RXAVAIL:
-                dbg ("IOCTL_AU_RXAVAIL");
-                if (ccp->scontext.id == AUH_UNASSIGNED) {
-                        ret = -EIO;
-                        break;
-                }
-                u = 0;  /* no data */
-                if (ccp->readbuf) {
-                        int restlen = ccp->readbuf->len - ccp->readoffset;
-                        if (restlen > 0)
-                                u = 1;
-                }
-                if (!u) {
-                        if (!list_empty (&ccp->bufctl.rec_buff_list)) {
-                                u = 1;
-                        }
-                }
-                ret = put_user (u, user_arg);
-                break;
-
-        /* return the max. buffer length for the device */
-        case IOCTL_AU_BUFLEN:
-                dbg ("IOCTL_AU_BUFLEN");
-                u = cp->maxControlLength;
-                ret = put_user (u, user_arg);
-                break;
-
-        /* requesting a service channel */
-        case IOCTL_AU_SERVREQ:
-                dbg ("IOCTL_AU_SERVREQ");
-                /* requesting a service means: release the previous one first */
-                auerswald_removeservice (cp, &ccp->scontext);
-                /* get the channel number */
-                ret = get_user (u, user_arg);
-                if (ret) {
-                        break;
-                }
-                if ((u < AUH_FIRSTUSERCH) || (u >= AUH_TYPESIZE)) {
-                        ret = -EIO;
-                        break;
-                }
-                dbg ("auerchar service request parameters are ok");
-                ccp->scontext.id = u;
-
-                /* request the service now */
-                ret = auerswald_addservice (cp, &ccp->scontext);
-                if (ret) {
-                        /* no: revert service entry */
-                        ccp->scontext.id = AUH_UNASSIGNED;
-                }
-                break;
-
-        /* get a string descriptor for the device */
-        case IOCTL_AU_DEVINFO:
-                dbg ("IOCTL_AU_DEVINFO");
-                if (copy_from_user (&devinfo, (void __user *) arg, sizeof (audevinfo_t))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                u = strlen(cp->dev_desc)+1;
-                if (u > devinfo.bsize) {
-                        u = devinfo.bsize;
-                }
-                ret = copy_to_user(devinfo.buf, cp->dev_desc, u) ? -EFAULT : 0;
-                break;
-
-        /* get the max. string descriptor length */
-        case IOCTL_AU_SLEN:
-                dbg ("IOCTL_AU_SLEN");
-                u = AUSI_DLEN;
-                ret = put_user (u, user_arg);
-                break;
-
-        default:
-                dbg ("IOCTL_AU_UNKNOWN");
-                ret = -ENOTTY;
-                break;
-        }
-        unlock_kernel();
-        /* release the mutexes */
-        mutex_unlock(&cp->mutex);
-        mutex_unlock(&ccp->mutex);
-        return ret;
-}
-
-/* Read data from the device */
-static ssize_t auerchar_read (struct file *file, char __user *buf, size_t count, loff_t * ppos)
-{
-        unsigned long flags;
-        pauerchar_t ccp = (pauerchar_t) file->private_data;
-        pauerbuf_t   bp = NULL;
-        wait_queue_t wait;
-
-        dbg ("auerchar_read");
-
-        /* Error checking */
-        if (!ccp)
-                return -EIO;
-        if (*ppos)
-                return -ESPIPE;
-        if (count == 0)
-                return 0;
-
-        /* get the mutex */
-        if (mutex_lock_interruptible(&ccp->mutex))
-                return -ERESTARTSYS;
-
-        /* Can we expect to read something? */
-        if (ccp->scontext.id == AUH_UNASSIGNED) {
-                mutex_unlock(&ccp->mutex);
-                return -EIO;
-        }
-
-        /* only one reader per device allowed */
-        if (mutex_lock_interruptible(&ccp->readmutex)) {
-                mutex_unlock(&ccp->mutex);
-                return -ERESTARTSYS;
-        }
-
-        /* read data from readbuf, if available */
-doreadbuf:
-        bp = ccp->readbuf;
-        if (bp) {
-                /* read the maximum bytes */
-                int restlen = bp->len - ccp->readoffset;
-                if (restlen < 0)
-                        restlen = 0;
-                if (count > restlen)
-                        count = restlen;
-                if (count) {
-                        if (copy_to_user (buf, bp->bufp+ccp->readoffset, count)) {
-                                dbg ("auerswald_read: copy_to_user failed");
-                                mutex_unlock(&ccp->readmutex);
-                                mutex_unlock(&ccp->mutex);
-                                return -EFAULT;
-                        }
-                }
-                /* advance the read offset */
-                ccp->readoffset += count;
-                restlen -= count;
-                // reuse the read buffer
-                if (restlen <= 0) {
-                        auerbuf_releasebuf (bp);
-                        ccp->readbuf = NULL;
-                }
-                /* return with number of bytes read */
-                if (count) {
-                        mutex_unlock(&ccp->readmutex);
-                        mutex_unlock(&ccp->mutex);
-                        return count;
-                }
-        }
-
-        /* a read buffer is not available. Try to get the next data block. */
-doreadlist:
-        /* Preparing for sleep */
-        init_waitqueue_entry (&wait, current);
-        set_current_state (TASK_INTERRUPTIBLE);
-        add_wait_queue (&ccp->readwait, &wait);
-
-        bp = NULL;
-        spin_lock_irqsave (&ccp->bufctl.lock, flags);
-        if (!list_empty (&ccp->bufctl.rec_buff_list)) {
-                /* yes: get the entry */
-                struct list_head *tmp = ccp->bufctl.rec_buff_list.next;
-                list_del (tmp);
-                bp = list_entry (tmp, auerbuf_t, buff_list);
-        }
-        spin_unlock_irqrestore (&ccp->bufctl.lock, flags);
-
-        /* have we got data? */
-        if (bp) {
-                ccp->readbuf = bp;
-                ccp->readoffset = AUH_SIZE; /* for headerbyte */
-                set_current_state (TASK_RUNNING);
-                remove_wait_queue (&ccp->readwait, &wait);
-                goto doreadbuf;           /* now we can read! */
-        }
-
-        /* no data available. Should we wait? */
-        if (file->f_flags & O_NONBLOCK) {
-                dbg ("No read buffer available, returning -EAGAIN");
-                set_current_state (TASK_RUNNING);
-                remove_wait_queue (&ccp->readwait, &wait);
-                mutex_unlock(&ccp->readmutex);
-                mutex_unlock(&ccp->mutex);
-                return -EAGAIN;  /* nonblocking, no data available */
-        }
-
-        /* yes, we should wait! */
-        mutex_unlock(&ccp->mutex); /* allow other operations while we wait */
-        schedule();
-        remove_wait_queue (&ccp->readwait, &wait);
-        if (signal_pending (current)) {
-                /* waked up by a signal */
-                mutex_unlock(&ccp->readmutex);
-                return -ERESTARTSYS;
-        }
-
-        /* Anything left to read? */
-        if ((ccp->scontext.id == AUH_UNASSIGNED) || ccp->removed) {
-                mutex_unlock(&ccp->readmutex);
-                return -EIO;
-        }
-
-        if (mutex_lock_interruptible(&ccp->mutex)) {
-                mutex_unlock(&ccp->readmutex);
-                return -ERESTARTSYS;
-        }
-
-        /* try to read the incoming data again */
-        goto doreadlist;
-}
-
-
-/* Write a data block into the right service channel of the device */
-static ssize_t auerchar_write (struct file *file, const char __user *buf, size_t len, loff_t *ppos)
-{
-        pauerchar_t ccp = (pauerchar_t) file->private_data;
-        pauerswald_t cp = NULL;
-        pauerbuf_t bp;
-        unsigned long flags;
-        int ret;
-        wait_queue_t wait;
-
-        dbg ("auerchar_write %zd bytes", len);
-
-        /* Error checking */
-        if (!ccp)
-                return -EIO;
-        if (*ppos)
-                return -ESPIPE;
-        if (len == 0)
-                return 0;
-
-write_again:
-        /* get the mutex */
-        if (mutex_lock_interruptible(&ccp->mutex))
-                return -ERESTARTSYS;
-
-        /* Can we expect to write something? */
-        if (ccp->scontext.id == AUH_UNASSIGNED) {
-                mutex_unlock(&ccp->mutex);
-                return -EIO;
-        }
-
-        cp = ccp->auerdev;
-        if (!cp) {
-                mutex_unlock(&ccp->mutex);
-                return -ERESTARTSYS;
-        }
-        if (mutex_lock_interruptible(&cp->mutex)) {
-                mutex_unlock(&ccp->mutex);
-                return -ERESTARTSYS;
-        }
-        if (!cp->usbdev) {
-                mutex_unlock(&cp->mutex);
-                mutex_unlock(&ccp->mutex);
-                return -EIO;
-        }
-        /* Prepare for sleep */
-        init_waitqueue_entry (&wait, current);
-        set_current_state (TASK_INTERRUPTIBLE);
-        add_wait_queue (&cp->bufferwait, &wait);
-
-        /* Try to get a buffer from the device pool.
-           We can't use a buffer from ccp->bufctl because the write
-           command will last beond a release() */
-        bp = NULL;
-        spin_lock_irqsave (&cp->bufctl.lock, flags);
-        if (!list_empty (&cp->bufctl.free_buff_list)) {
-                /* yes: get the entry */
-                struct list_head *tmp = cp->bufctl.free_buff_list.next;
-                list_del (tmp);
-                bp = list_entry (tmp, auerbuf_t, buff_list);
-        }
-        spin_unlock_irqrestore (&cp->bufctl.lock, flags);
-
-        /* are there any buffers left? */
-        if (!bp) {
-                mutex_unlock(&cp->mutex);
-                mutex_unlock(&ccp->mutex);
-
-                /* NONBLOCK: don't wait */
-                if (file->f_flags & O_NONBLOCK) {
-                        set_current_state (TASK_RUNNING);
-                        remove_wait_queue (&cp->bufferwait, &wait);
-                        return -EAGAIN;
-                }
-
-                /* BLOCKING: wait */
-                schedule();
-                remove_wait_queue (&cp->bufferwait, &wait);
-                if (signal_pending (current)) {
-                        /* waked up by a signal */
-                        return -ERESTARTSYS;
-                }
-                goto write_again;
-        } else {
-                set_current_state (TASK_RUNNING);
-                remove_wait_queue (&cp->bufferwait, &wait);
-        }
-
-        /* protect against too big write requests */
-        if (len > cp->maxControlLength)
-                len = cp->maxControlLength;
-
-        /* Fill the buffer */
-        if (copy_from_user ( bp->bufp+AUH_SIZE, buf, len)) {
-                dbg ("copy_from_user failed");
-                auerbuf_releasebuf (bp);
-                /* Wake up all processes waiting for a buffer */
-                wake_up (&cp->bufferwait);
-                mutex_unlock(&cp->mutex);
-                mutex_unlock(&ccp->mutex);
-                return -EFAULT;
-        }
-
-        /* set the header byte */
-        *(bp->bufp) = ccp->scontext.id | AUH_DIRECT | AUH_UNSPLIT;
-
-        /* Set the transfer Parameters */
-        bp->len = len+AUH_SIZE;
-        bp->dr->bRequestType = AUT_WREQ;
-        bp->dr->bRequest     = AUV_WBLOCK;
-        bp->dr->wValue       = cpu_to_le16 (0);
-        bp->dr->wIndex       = cpu_to_le16 (ccp->scontext.id | AUH_DIRECT | AUH_UNSPLIT);
-        bp->dr->wLength      = cpu_to_le16 (len+AUH_SIZE);
-        usb_fill_control_urb (bp->urbp, cp->usbdev, usb_sndctrlpipe (cp->usbdev, 0),
-                   (unsigned char*)bp->dr, bp->bufp, len+AUH_SIZE,
-                    auerchar_ctrlwrite_complete, bp);
-        /* up we go */
-        ret = auerchain_submit_urb (&cp->controlchain, bp->urbp);
-        mutex_unlock(&cp->mutex);
-        if (ret) {
-                dbg ("auerchar_write: nonzero result of auerchain_submit_urb %d", ret);
-                auerbuf_releasebuf (bp);
-                /* Wake up all processes waiting for a buffer */
-                wake_up (&cp->bufferwait);
-                mutex_unlock(&ccp->mutex);
-                return -EIO;
-        }
-        else {
-                dbg ("auerchar_write: Write OK");
-                mutex_unlock(&ccp->mutex);
-                return len;
-        }
-}
-
-
-/* Close a character device */
-static int auerchar_release (struct inode *inode, struct file *file)
-{
-        pauerchar_t ccp = (pauerchar_t) file->private_data;
-        pauerswald_t cp;
-        dbg("release");
-
-        mutex_lock(&ccp->mutex);
-        cp = ccp->auerdev;
-        if (cp) {
-                mutex_lock(&cp->mutex);
-                /* remove an open service */
-                auerswald_removeservice (cp, &ccp->scontext);
-                /* detach from device */
-                if ((--cp->open_count <= 0) && (cp->usbdev == NULL)) {
-                        /* usb device waits for removal */
-                        mutex_unlock(&cp->mutex);
-                        auerswald_delete (cp);
-                } else {
-                        mutex_unlock(&cp->mutex);
-                }
-                cp = NULL;
-                ccp->auerdev = NULL;
-        }
-        mutex_unlock(&ccp->mutex);
-        auerchar_delete (ccp);
-
-        return 0;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* File operation structure                                             */
-static const struct file_operations auerswald_fops =
-{
-        .owner =        THIS_MODULE,
-        .llseek =       no_llseek,
-        .read =         auerchar_read,
-        .write =        auerchar_write,
-        .unlocked_ioctl = auerchar_ioctl,
-        .open =         auerchar_open,
-        .release =      auerchar_release,
-};
-
-static struct usb_class_driver auerswald_class = {
-        .name =         "auer%d",
-        .fops =         &auerswald_fops,
-        .minor_base =   AUER_MINOR_BASE,
-};
-
-
-/* --------------------------------------------------------------------- */
-/* Special USB driver functions                                          */
-
-/* Probe if this driver wants to serve an USB device
-
-   This entry point is called whenever a new device is attached to the bus.
-   Then the device driver has to create a new instance of its internal data
-   structures for the new device.
-
-   The  dev argument specifies the device context, which contains pointers
-   to all USB descriptors. The  interface argument specifies the interface
-   number. If a USB driver wants to bind itself to a particular device and
-   interface it has to return a pointer. This pointer normally references
-   the device driver's context structure.
-
-   Probing normally is done by checking the vendor and product identifications
-   or the class and subclass definitions. If they match the interface number
-   is compared with the ones supported by the driver. When probing is done
-   class based it might be necessary to parse some more USB descriptors because
-   the device properties can differ in a wide range.
-*/
-static int auerswald_probe (struct usb_interface *intf,
-                            const struct usb_device_id *id)
-{
-        struct usb_device *usbdev = interface_to_usbdev(intf);
-        pauerswald_t cp = NULL;
-        unsigned int u = 0;
-        __le16 *pbuf;
-        int ret;
-
-        dbg ("probe: vendor id 0x%x, device id 0x%x",
-             le16_to_cpu(usbdev->descriptor.idVendor),
-             le16_to_cpu(usbdev->descriptor.idProduct));
-
-        /* we use only the first -and only- interface */
-        if (intf->altsetting->desc.bInterfaceNumber != 0)
-                return -ENODEV;
-
-        /* allocate memory for our device and initialize it */
-        cp = kzalloc (sizeof(auerswald_t), GFP_KERNEL);
-        if (cp == NULL) {
-                err ("out of memory");
-                goto pfail;
-        }
-
-        /* Initialize device descriptor */
-        mutex_init(&cp->mutex);
-        cp->usbdev = usbdev;
-        auerchain_init (&cp->controlchain);
-        auerbuf_init (&cp->bufctl);
-        init_waitqueue_head (&cp->bufferwait);
-
-        ret = usb_register_dev(intf, &auerswald_class);
-        if (ret) {
-                err ("Not able to get a minor for this device.");
-                goto pfail;
-        }
-
-        /* Give the device a name */
-        sprintf (cp->name, "usb/auer%d", intf->minor);
-
-        /* Store the index */
-        cp->dtindex = intf->minor;
-
-        /* Get the usb version of the device */
-        cp->version = le16_to_cpu(cp->usbdev->descriptor.bcdDevice);
-        dbg ("Version is %X", cp->version);
-
-        /* allow some time to settle the device */
-        msleep(334);
-
-        /* Try to get a suitable textual description of the device */
-        /* Device name:*/
-        ret = usb_string( cp->usbdev, AUSI_DEVICE, cp->dev_desc, AUSI_DLEN-1);
-        if (ret >= 0) {
-                u += ret;
-                /* Append Serial Number */
-                memcpy(&cp->dev_desc[u], ",Ser# ", 6);
-                u += 6;
-                ret = usb_string( cp->usbdev, AUSI_SERIALNR, &cp->dev_desc[u], AUSI_DLEN-u-1);
-                if (ret >= 0) {
-                        u += ret;
-                        /* Append subscriber number */
-                        memcpy(&cp->dev_desc[u], ", ", 2);
-                        u += 2;
-                        ret = usb_string( cp->usbdev, AUSI_MSN, &cp->dev_desc[u], AUSI_DLEN-u-1);
-                        if (ret >= 0) {
-                                u += ret;
-                        }
-                }
-        }
-        cp->dev_desc[u] = '\0';
-        info("device is a %s", cp->dev_desc);
-
-        /* get the maximum allowed control transfer length */
-        pbuf = kmalloc(2, GFP_KERNEL);    /* use an allocated buffer because of urb target */
-        if (!pbuf) {
-                err( "out of memory");
-                goto pfail;
-        }
-        ret = usb_control_msg(cp->usbdev,           /* pointer to device */
-                usb_rcvctrlpipe( cp->usbdev, 0 ),   /* pipe to control endpoint */
-                AUV_GETINFO,                        /* USB message request value */
-                AUT_RREQ,                           /* USB message request type value */
-                0,                                  /* USB message value */
-                AUDI_MBCTRANS,                      /* USB message index value */
-                pbuf,                               /* pointer to the receive buffer */
-                2,                                  /* length of the buffer */
-                2000);                            /* time to wait for the message to complete before timing out */
-        if (ret == 2) {
-                cp->maxControlLength = le16_to_cpup(pbuf);
-                kfree(pbuf);
-                dbg("setup: max. allowed control transfersize is %d bytes", cp->maxControlLength);
-        } else {
-                kfree(pbuf);
-                err("setup: getting max. allowed control transfer length failed with error %d", ret);
-                goto pfail;
-        }
-
-        /* allocate a chain for the control messages */
-        if (auerchain_setup (&cp->controlchain, AUCH_ELEMENTS)) {
-                err ("out of memory");
-                goto pfail;
-        }
-
-        /* allocate buffers for control messages */
-        if (auerbuf_setup (&cp->bufctl, AU_RBUFFERS, cp->maxControlLength+AUH_SIZE)) {
-                err ("out of memory");
-                goto pfail;
-        }
-
-        /* start the interrupt endpoint */
-        if (auerswald_int_open (cp)) {
-                err ("int endpoint failed");
-                goto pfail;
-        }
-
-        /* all OK */
-        usb_set_intfdata (intf, cp);
-        return 0;
-
-        /* Error exit: clean up the memory */
-pfail:  auerswald_delete (cp);
-        return -EIO;
-}
-
-
-/* Disconnect driver from a served device
-
-   This function is called whenever a device which was served by this driver
-   is disconnected.
-
-   The argument  dev specifies the device context and the  driver_context
-   returns a pointer to the previously registered  driver_context of the
-   probe function. After returning from the disconnect function the USB
-   framework completely deallocates all data structures associated with
-   this device. So especially the usb_device structure must not be used
-   any longer by the usb driver.
-*/
-static void auerswald_disconnect (struct usb_interface *intf)
-{
-        pauerswald_t cp = usb_get_intfdata (intf);
-        unsigned int u;
-
-        usb_set_intfdata (intf, NULL);
-        if (!cp)
-                return;
-
-        /* give back our USB minor number */
-        usb_deregister_dev(intf, &auerswald_class);
-
-        mutex_lock(&cp->mutex);
-        info ("device /dev/%s now disconnecting", cp->name);
-
-        /* Stop the interrupt endpoint */
-        auerswald_int_release (cp);
-
-        /* remove the control chain allocated in auerswald_probe
-           This has the benefit of
-           a) all pending (a)synchronous urbs are unlinked
-           b) all buffers dealing with urbs are reclaimed
-        */
-        auerchain_free (&cp->controlchain);
-
-        if (cp->open_count == 0) {
-                /* nobody is using this device. So we can clean up now */
-                mutex_unlock(&cp->mutex);
-                /* mutex_unlock() is possible here because no other task
-                   can open the device (see above). I don't want
-                   to kfree() a locked mutex. */
-
-                auerswald_delete (cp);
-        } else {
-                /* device is used. Remove the pointer to the
-                   usb device (it's not valid any more). The last
-                   release() will do the clean up */
-                cp->usbdev = NULL;
-                mutex_unlock(&cp->mutex);
-                /* Terminate waiting writers */
-                wake_up (&cp->bufferwait);
-                /* Inform all waiting readers */
-                for ( u = 0; u < AUH_TYPESIZE; u++) {
-                        pauerscon_t scp = cp->services[u];
-                        if (scp)
-                                scp->disconnect( scp);
-                }
-        }
-}
-
-/* Descriptor for the devices which are served by this driver.
-   NOTE: this struct is parsed by the usbmanager install scripts.
-         Don't change without caution!
-*/
-static struct usb_device_id auerswald_ids [] = {
-        { USB_DEVICE (ID_AUERSWALD, 0x00C0) },          /* COMpact 2104 USB */
-        { USB_DEVICE (ID_AUERSWALD, 0x00DB) },          /* COMpact 4410/2206 USB */
-        { USB_DEVICE (ID_AUERSWALD, 0x00DC) }, /* COMpact 4406 DSL */
-        { USB_DEVICE (ID_AUERSWALD, 0x00DD) }, /* COMpact 2204 USB */
-        { USB_DEVICE (ID_AUERSWALD, 0x00F1) },          /* Comfort 2000 System Telephone */
-        { USB_DEVICE (ID_AUERSWALD, 0x00F2) },          /* Comfort 1200 System Telephone */
-        { }                                             /* Terminating entry */
-};
-
-/* Standard module device table */
-MODULE_DEVICE_TABLE (usb, auerswald_ids);
-
-/* Standard usb driver struct */
-static struct usb_driver auerswald_driver = {
-        .name =         "auerswald",
-        .probe =        auerswald_probe,
-        .disconnect =   auerswald_disconnect,
-        .id_table =     auerswald_ids,
-};
-
-
-/* --------------------------------------------------------------------- */
-/* Module loading/unloading                                              */
-
-/* Driver initialisation. Called after module loading.
-   NOTE: there is no concurrency at _init
-*/
-static int __init auerswald_init (void)
-{
-        int result;
-        dbg ("init");
-
-        /* register driver at the USB subsystem */
-        result = usb_register (&auerswald_driver);
-        if (result < 0) {
-                err ("driver could not be registered");
-                return -1;
-        }
-        return 0;
-}
-
-/* Driver deinit. Called before module removal.
-   NOTE: there is no concurrency at _cleanup
-*/
-static void __exit auerswald_cleanup (void)
-{
-        dbg ("cleanup");
-        usb_deregister (&auerswald_driver);
-}
-
-/* --------------------------------------------------------------------- */
-/* Linux device driver module description                                */
-
-MODULE_AUTHOR (DRIVER_AUTHOR);
-MODULE_DESCRIPTION (DRIVER_DESC);
-MODULE_LICENSE ("GPL");
-
-module_init (auerswald_init);
-module_exit (auerswald_cleanup);
-
-/* --------------------------------------------------------------------- */
-
diff --git a/drivers/usb/misc/isight_firmware.c b/drivers/usb/misc/isight_firmware.c
index d94aa7387608..b897f6554ecd 100644
--- a/drivers/usb/misc/isight_firmware.c
+++ b/drivers/usb/misc/isight_firmware.c
@@ -48,7 +48,8 @@ static int isight_firmware_load(struct usb_interface *intf,
 
         if (request_firmware(&firmware, "isight.fw", &dev->dev) != 0) {
                 printk(KERN_ERR "Unable to load isight firmware\n");
-                return -ENODEV;
+                ret = -ENODEV;
+                goto out;
         }
 
         ptr = firmware->data;
@@ -91,7 +92,6 @@ static int isight_firmware_load(struct usb_interface *intf,
                              buf, llen, 300) != llen) {
                                 printk(KERN_ERR
                                        "Failed to load isight firmware\n");
-                                kfree(buf);
                                 ret = -ENODEV;
                                 goto out;
                         }
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
new file mode 100644
index 000000000000..faca4333f27a
--- /dev/null
+++ b/drivers/usb/musb/Kconfig
@@ -0,0 +1,176 @@
+#
+# USB Dual Role (OTG-ready) Controller Drivers
+# for silicon based on Mentor Graphics INVENTRA designs
+#
+
+comment "Enable Host or Gadget support to see Inventra options"
+        depends on !USB && USB_GADGET=n
+
+# (M)HDRC = (Multipoint) Highspeed Dual-Role Controller
+config USB_MUSB_HDRC
+        depends on (USB || USB_GADGET) && HAVE_CLK
+        select TWL4030_USB if MACH_OMAP_3430SDP
+        tristate 'Inventra Highspeed Dual Role Controller (TI, ...)'
+        help
+          Say Y here if your system has a dual role high speed USB
+          controller based on the Mentor Graphics silicon IP.  Then
+          configure options to match your silicon and the board
+          it's being used with, including the USB peripheral role,
+          or the USB host role, or both.
+
+          Texas Instruments parts using this IP include DaVinci 644x,
+          OMAP 243x, OMAP 343x, and TUSB 6010.
+
+          If you do not know what this is, please say N.
+
+          To compile this driver as a module, choose M here; the
+          module will be called "musb_hdrc".
+
+config USB_MUSB_SOC
+        boolean
+        depends on USB_MUSB_HDRC
+        default y if ARCH_DAVINCI
+        default y if ARCH_OMAP2430
+        default y if ARCH_OMAP34XX
+        help
+          Use a static <asm/arch/hdrc_cnf.h> file to describe how the
+          controller is configured (endpoints, mechanisms, etc) on the
+          current iteration of a given system-on-chip.
+
+comment "DaVinci 644x USB support"
+        depends on USB_MUSB_HDRC && ARCH_DAVINCI
+
+comment "OMAP 243x high speed USB support"
+        depends on USB_MUSB_HDRC && ARCH_OMAP2430
+
+comment "OMAP 343x high speed USB support"
+        depends on USB_MUSB_HDRC && ARCH_OMAP34XX
+
+config USB_TUSB6010
+        boolean "TUSB 6010 support"
+        depends on USB_MUSB_HDRC && !USB_MUSB_SOC
+        default y
+        help
+          The TUSB 6010 chip, from Texas Instruments, connects a discrete
+          HDRC core using a 16-bit parallel bus (NOR flash style) or VLYNQ
+          (a high speed serial link).  It can use system-specific external
+          DMA controllers.
+
+choice
+        prompt "Driver Mode"
+        depends on USB_MUSB_HDRC
+        help
+          Dual-Role devices can support both host and peripheral roles,
+          as well as a the special "OTG Device" role which can switch
+          between both roles as needed.
+
+# use USB_MUSB_HDRC_HCD not USB_MUSB_HOST to #ifdef host side support;
+# OTG needs both roles, not just USB_MUSB_HOST.
+config USB_MUSB_HOST
+        depends on USB
+        bool "USB Host"
+        help
+          Say Y here if your system supports the USB host role.
+          If it has a USB "A" (rectangular), "Mini-A" (uncommon),
+          or "Mini-AB" connector, it supports the host role.
+          (With a "Mini-AB" connector, you should enable USB OTG.)
+
+# use USB_GADGET_MUSB_HDRC not USB_MUSB_PERIPHERAL to #ifdef peripheral
+# side support ... OTG needs both roles
+config USB_MUSB_PERIPHERAL
+        depends on USB_GADGET
+        bool "USB Peripheral (gadget stack)"
+        select USB_GADGET_MUSB_HDRC
+        help
+          Say Y here if your system supports the USB peripheral role.
+          If it has a USB "B" (squarish), "Mini-B", or "Mini-AB"
+          connector, it supports the peripheral role.
+          (With a "Mini-AB" connector, you should enable USB OTG.)
+
+config USB_MUSB_OTG
+        depends on USB && USB_GADGET && PM && EXPERIMENTAL
+        bool "Both host and peripheral:  USB OTG (On The Go) Device"
+        select USB_GADGET_MUSB_HDRC
+        select USB_OTG
+        help
+           The most notable feature of USB OTG is support for a
+           "Dual-Role" device, which can act as either a device
+           or a host.  The initial role choice can be changed
+           later, when two dual-role devices talk to each other.
+
+           At this writing, the OTG support in this driver is incomplete,
+           omitting the mandatory HNP or SRP protocols.  However, some
+           of the cable based role switching works.  (That is, grounding
+           the ID pin switches the controller to host mode, while leaving
+           it floating leaves it in peripheral mode.)
+
+           Select this if your system has a Mini-AB connector, or
+           to simplify certain kinds of configuration.
+
+           To implement your OTG Targeted Peripherals List (TPL), enable
+           USB_OTG_WHITELIST and update "drivers/usb/core/otg_whitelist.h"
+           to match your requirements.
+
+endchoice
+
+# enable peripheral support (including with OTG)
+config USB_GADGET_MUSB_HDRC
+        bool
+        depends on USB_MUSB_HDRC && (USB_MUSB_PERIPHERAL || USB_MUSB_OTG)
+#       default y
+#       select USB_GADGET_DUALSPEED
+#       select USB_GADGET_SELECTED
+
+# enables host support (including with OTG)
+config USB_MUSB_HDRC_HCD
+        bool
+        depends on USB_MUSB_HDRC && (USB_MUSB_HOST || USB_MUSB_OTG)
+        select USB_OTG if USB_GADGET_MUSB_HDRC
+        default y
+
+
+config MUSB_PIO_ONLY
+        bool 'Disable DMA (always use PIO)'
+        depends on USB_MUSB_HDRC
+        default y if USB_TUSB6010
+        help
+          All data is copied between memory and FIFO by the CPU.
+          DMA controllers are ignored.
+
+          Do not select 'n' here unless DMA support for your SOC or board
+          is unavailable (or unstable).  When DMA is enabled at compile time,
+          you can still disable it at run time using the "use_dma=n" module
+          parameter.
+
+config USB_INVENTRA_DMA
+        bool
+        depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY
+        default ARCH_OMAP2430 || ARCH_OMAP34XX
+        help
+          Enable DMA transfers using Mentor's engine.
+
+config USB_TI_CPPI_DMA
+        bool
+        depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY
+        default ARCH_DAVINCI
+        help
+          Enable DMA transfers when TI CPPI DMA is available.
+
+config USB_TUSB_OMAP_DMA
+        bool
+        depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY
+        depends on USB_TUSB6010
+        depends on ARCH_OMAP
+        default y
+        help
+          Enable DMA transfers on TUSB 6010 when OMAP DMA is available.
+
+config  USB_MUSB_LOGLEVEL
+        depends on USB_MUSB_HDRC
+        int  'Logging Level (0 - none / 3 - annoying / ... )'
+        default 0
+        help
+          Set the logging level. 0 disables the debugging altogether,
+          although when USB_DEBUG is set the value is at least 1.
+          Starting at level 3, per-transfer (urb, usb_request, packet,
+          or dma transfer) tracing may kick in.
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
new file mode 100644
index 000000000000..88eb67de08ae
--- /dev/null
+++ b/drivers/usb/musb/Makefile
@@ -0,0 +1,86 @@
+#
+# for USB OTG silicon based on Mentor Graphics INVENTRA designs
+#
+
+musb_hdrc-objs := musb_core.o
+
+obj-$(CONFIG_USB_MUSB_HDRC)     += musb_hdrc.o
+
+ifeq ($(CONFIG_ARCH_DAVINCI),y)
+        musb_hdrc-objs  += davinci.o
+endif
+
+ifeq ($(CONFIG_USB_TUSB6010),y)
+        musb_hdrc-objs  += tusb6010.o
+endif
+
+ifeq ($(CONFIG_ARCH_OMAP2430),y)
+        musb_hdrc-objs  += omap2430.o
+endif
+
+ifeq ($(CONFIG_ARCH_OMAP3430),y)
+        musb_hdrc-objs  += omap2430.o
+endif
+
+ifeq ($(CONFIG_USB_GADGET_MUSB_HDRC),y)
+        musb_hdrc-objs          += musb_gadget_ep0.o musb_gadget.o
+endif
+
+ifeq ($(CONFIG_USB_MUSB_HDRC_HCD),y)
+        musb_hdrc-objs          += musb_virthub.o musb_host.o
+endif
+
+# the kconfig must guarantee that only one of the
+# possible I/O schemes will be enabled at a time ...
+# PIO only, or DMA (several potential schemes).
+# though PIO is always there to back up DMA, and for ep0
+
+ifneq ($(CONFIG_MUSB_PIO_ONLY),y)
+
+  ifeq ($(CONFIG_USB_INVENTRA_DMA),y)
+    musb_hdrc-objs              += musbhsdma.o
+
+  else
+    ifeq ($(CONFIG_USB_TI_CPPI_DMA),y)
+      musb_hdrc-objs            += cppi_dma.o
+
+    else
+      ifeq ($(CONFIG_USB_TUSB_OMAP_DMA),y)
+        musb_hdrc-objs          += tusb6010_omap.o
+
+      endif
+    endif
+  endif
+endif
+
+
+################################################################################
+
+# FIXME remove all these extra "-DMUSB_* things, stick to CONFIG_*
+
+ifeq ($(CONFIG_USB_INVENTRA_MUSB_HAS_AHB_ID),y)
+        EXTRA_CFLAGS += -DMUSB_AHB_ID
+endif
+
+# Debugging
+
+MUSB_DEBUG:=$(CONFIG_USB_MUSB_LOGLEVEL)
+
+ifeq ("$(strip $(MUSB_DEBUG))","")
+    ifdef CONFIG_USB_DEBUG
+        MUSB_DEBUG:=1
+    else
+        MUSB_DEBUG:=0
+    endif
+endif
+
+ifneq ($(MUSB_DEBUG),0)
+    EXTRA_CFLAGS += -DDEBUG
+
+    ifeq ($(CONFIG_PROC_FS),y)
+        musb_hdrc-objs          += musb_procfs.o
+    endif
+
+endif
+
+EXTRA_CFLAGS += -DMUSB_DEBUG=$(MUSB_DEBUG)
diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c
new file mode 100644
index 000000000000..5ad6d0893cbe
--- /dev/null
+++ b/drivers/usb/musb/cppi_dma.c
@@ -0,0 +1,1540 @@
+/*
+ * Copyright (C) 2005-2006 by Texas Instruments
+ *
+ * This file implements a DMA  interface using TI's CPPI DMA.
+ * For now it's DaVinci-only, but CPPI isn't specific to DaVinci or USB.
+ * The TUSB6020, using VLYNQ, has CPPI that looks much like DaVinci.
+ */
+
+#include <linux/usb.h>
+
+#include "musb_core.h"
+#include "cppi_dma.h"
+
+
+/* CPPI DMA status 7-mar-2006:
+ *
+ * - See musb_{host,gadget}.c for more info
+ *
+ * - Correct RX DMA generally forces the engine into irq-per-packet mode,
+ *   which can easily saturate the CPU under non-mass-storage loads.
+ *
+ * NOTES 24-aug-2006 (2.6.18-rc4):
+ *
+ * - peripheral RXDMA wedged in a test with packets of length 512/512/1.
+ *   evidently after the 1 byte packet was received and acked, the queue
+ *   of BDs got garbaged so it wouldn't empty the fifo.  (rxcsr 0x2003,
+ *   and RX DMA0: 4 left, 80000000 8feff880, 8feff860 8feff860; 8f321401
+ *   004001ff 00000001 .. 8feff860)  Host was just getting NAKed on tx
+ *   of its next (512 byte) packet.  IRQ issues?
+ *
+ * REVISIT:  the "transfer DMA" glue between CPPI and USB fifos will
+ * evidently also directly update the RX and TX CSRs ... so audit all
+ * host and peripheral side DMA code to avoid CSR access after DMA has
+ * been started.
+ */
+
+/* REVISIT now we can avoid preallocating these descriptors; or
+ * more simply, switch to a global freelist not per-channel ones.
+ * Note: at full speed, 64 descriptors == 4K bulk data.
+ */
+#define NUM_TXCHAN_BD       64
+#define NUM_RXCHAN_BD       64
+
+static inline void cpu_drain_writebuffer(void)
+{
+        wmb();
+#ifdef  CONFIG_CPU_ARM926T
+        /* REVISIT this "should not be needed",
+         * but lack of it sure seemed to hurt ...
+         */
+        asm("mcr p15, 0, r0, c7, c10, 4 @ drain write buffer\n");
+#endif
+}
+
+static inline struct cppi_descriptor *cppi_bd_alloc(struct cppi_channel *c)
+{
+        struct cppi_descriptor  *bd = c->freelist;
+
+        if (bd)
+                c->freelist = bd->next;
+        return bd;
+}
+
+static inline void
+cppi_bd_free(struct cppi_channel *c, struct cppi_descriptor *bd)
+{
+        if (!bd)
+                return;
+        bd->next = c->freelist;
+        c->freelist = bd;
+}
+
+/*
+ *  Start DMA controller
+ *
+ *  Initialize the DMA controller as necessary.
+ */
+
+/* zero out entire rx state RAM entry for the channel */
+static void cppi_reset_rx(struct cppi_rx_stateram __iomem *rx)
+{
+        musb_writel(&rx->rx_skipbytes, 0, 0);
+        musb_writel(&rx->rx_head, 0, 0);
+        musb_writel(&rx->rx_sop, 0, 0);
+        musb_writel(&rx->rx_current, 0, 0);
+        musb_writel(&rx->rx_buf_current, 0, 0);
+        musb_writel(&rx->rx_len_len, 0, 0);
+        musb_writel(&rx->rx_cnt_cnt, 0, 0);
+}
+
+/* zero out entire tx state RAM entry for the channel */
+static void cppi_reset_tx(struct cppi_tx_stateram __iomem *tx, u32 ptr)
+{
+        musb_writel(&tx->tx_head, 0, 0);
+        musb_writel(&tx->tx_buf, 0, 0);
+        musb_writel(&tx->tx_current, 0, 0);
+        musb_writel(&tx->tx_buf_current, 0, 0);
+        musb_writel(&tx->tx_info, 0, 0);
+        musb_writel(&tx->tx_rem_len, 0, 0);
+        /* musb_writel(&tx->tx_dummy, 0, 0); */
+        musb_writel(&tx->tx_complete, 0, ptr);
+}
+
+static void __init cppi_pool_init(struct cppi *cppi, struct cppi_channel *c)
+{
+        int     j;
+
+        /* initialize channel fields */
+        c->head = NULL;
+        c->tail = NULL;
+        c->last_processed = NULL;
+        c->channel.status = MUSB_DMA_STATUS_UNKNOWN;
+        c->controller = cppi;
+        c->is_rndis = 0;
+        c->freelist = NULL;
+
+        /* build the BD Free list for the channel */
+        for (j = 0; j < NUM_TXCHAN_BD + 1; j++) {
+                struct cppi_descriptor  *bd;
+                dma_addr_t              dma;
+
+                bd = dma_pool_alloc(cppi->pool, GFP_KERNEL, &dma);
+                bd->dma = dma;
+                cppi_bd_free(c, bd);
+        }
+}
+
+static int cppi_channel_abort(struct dma_channel *);
+
+static void cppi_pool_free(struct cppi_channel *c)
+{
+        struct cppi             *cppi = c->controller;
+        struct cppi_descriptor  *bd;
+
+        (void) cppi_channel_abort(&c->channel);
+        c->channel.status = MUSB_DMA_STATUS_UNKNOWN;
+        c->controller = NULL;
+
+        /* free all its bds */
+        bd = c->last_processed;
+        do {
+                if (bd)
+                        dma_pool_free(cppi->pool, bd, bd->dma);
+                bd = cppi_bd_alloc(c);
+        } while (bd);
+        c->last_processed = NULL;
+}
+
+static int __init cppi_controller_start(struct dma_controller *c)
+{
+        struct cppi     *controller;
+        void __iomem    *tibase;
+        int             i;
+
+        controller = container_of(c, struct cppi, controller);
+
+        /* do whatever is necessary to start controller */
+        for (i = 0; i < ARRAY_SIZE(controller->tx); i++) {
+                controller->tx[i].transmit = true;
+                controller->tx[i].index = i;
+        }
+        for (i = 0; i < ARRAY_SIZE(controller->rx); i++) {
+                controller->rx[i].transmit = false;
+                controller->rx[i].index = i;
+        }
+
+        /* setup BD list on a per channel basis */
+        for (i = 0; i < ARRAY_SIZE(controller->tx); i++)
+                cppi_pool_init(controller, controller->tx + i);
+        for (i = 0; i < ARRAY_SIZE(controller->rx); i++)
+                cppi_pool_init(controller, controller->rx + i);
+
+        tibase =  controller->tibase;
+        INIT_LIST_HEAD(&controller->tx_complete);
+
+        /* initialise tx/rx channel head pointers to zero */
+        for (i = 0; i < ARRAY_SIZE(controller->tx); i++) {
+                struct cppi_channel     *tx_ch = controller->tx + i;
+                struct cppi_tx_stateram __iomem *tx;
+
+                INIT_LIST_HEAD(&tx_ch->tx_complete);
+
+                tx = tibase + DAVINCI_TXCPPI_STATERAM_OFFSET(i);
+                tx_ch->state_ram = tx;
+                cppi_reset_tx(tx, 0);
+        }
+        for (i = 0; i < ARRAY_SIZE(controller->rx); i++) {
+                struct cppi_channel     *rx_ch = controller->rx + i;
+                struct cppi_rx_stateram __iomem *rx;
+
+                INIT_LIST_HEAD(&rx_ch->tx_complete);
+
+                rx = tibase + DAVINCI_RXCPPI_STATERAM_OFFSET(i);
+                rx_ch->state_ram = rx;
+                cppi_reset_rx(rx);
+        }
+
+        /* enable individual cppi channels */
+        musb_writel(tibase, DAVINCI_TXCPPI_INTENAB_REG,
+                        DAVINCI_DMA_ALL_CHANNELS_ENABLE);
+        musb_writel(tibase, DAVINCI_RXCPPI_INTENAB_REG,
+                        DAVINCI_DMA_ALL_CHANNELS_ENABLE);
+
+        /* enable tx/rx CPPI control */
+        musb_writel(tibase, DAVINCI_TXCPPI_CTRL_REG, DAVINCI_DMA_CTRL_ENABLE);
+        musb_writel(tibase, DAVINCI_RXCPPI_CTRL_REG, DAVINCI_DMA_CTRL_ENABLE);
+
+        /* disable RNDIS mode, also host rx RNDIS autorequest */
+        musb_writel(tibase, DAVINCI_RNDIS_REG, 0);
+        musb_writel(tibase, DAVINCI_AUTOREQ_REG, 0);
+
+        return 0;
+}
+
+/*
+ *  Stop DMA controller
+ *
+ *  De-Init the DMA controller as necessary.
+ */
+
+static int cppi_controller_stop(struct dma_controller *c)
+{
+        struct cppi             *controller;
+        void __iomem            *tibase;
+        int                     i;
+
+        controller = container_of(c, struct cppi, controller);
+
+        tibase = controller->tibase;
+        /* DISABLE INDIVIDUAL CHANNEL Interrupts */
+        musb_writel(tibase, DAVINCI_TXCPPI_INTCLR_REG,
+                        DAVINCI_DMA_ALL_CHANNELS_ENABLE);
+        musb_writel(tibase, DAVINCI_RXCPPI_INTCLR_REG,
+                        DAVINCI_DMA_ALL_CHANNELS_ENABLE);
+
+        DBG(1, "Tearing down RX and TX Channels\n");
+        for (i = 0; i < ARRAY_SIZE(controller->tx); i++) {
+                /* FIXME restructure of txdma to use bds like rxdma */
+                controller->tx[i].last_processed = NULL;
+                cppi_pool_free(controller->tx + i);
+        }
+        for (i = 0; i < ARRAY_SIZE(controller->rx); i++)
+                cppi_pool_free(controller->rx + i);
+
+        /* in Tx Case proper teardown is supported. We resort to disabling
+         * Tx/Rx CPPI after cleanup of Tx channels. Before TX teardown is
+         * complete TX CPPI cannot be disabled.
+         */
+        /*disable tx/rx cppi */
+        musb_writel(tibase, DAVINCI_TXCPPI_CTRL_REG, DAVINCI_DMA_CTRL_DISABLE);
+        musb_writel(tibase, DAVINCI_RXCPPI_CTRL_REG, DAVINCI_DMA_CTRL_DISABLE);
+
+        return 0;
+}
+
+/* While dma channel is allocated, we only want the core irqs active
+ * for fault reports, otherwise we'd get irqs that we don't care about.
+ * Except for TX irqs, where dma done != fifo empty and reusable ...
+ *
+ * NOTE: docs don't say either way, but irq masking **enables** irqs.
+ *
+ * REVISIT same issue applies to pure PIO usage too, and non-cppi dma...
+ */
+static inline void core_rxirq_disable(void __iomem *tibase, unsigned epnum)
+{
+        musb_writel(tibase, DAVINCI_USB_INT_MASK_CLR_REG, 1 << (epnum + 8));
+}
+
+static inline void core_rxirq_enable(void __iomem *tibase, unsigned epnum)
+{
+        musb_writel(tibase, DAVINCI_USB_INT_MASK_SET_REG, 1 << (epnum + 8));
+}
+
+
+/*
+ * Allocate a CPPI Channel for DMA.  With CPPI, channels are bound to
+ * each transfer direction of a non-control endpoint, so allocating
+ * (and deallocating) is mostly a way to notice bad housekeeping on
+ * the software side.  We assume the irqs are always active.
+ */
+static struct dma_channel *
+cppi_channel_allocate(struct dma_controller *c,
+                struct musb_hw_ep *ep, u8 transmit)
+{
+        struct cppi             *controller;
+        u8                      index;
+        struct cppi_channel     *cppi_ch;
+        void __iomem            *tibase;
+
+        controller = container_of(c, struct cppi, controller);
+        tibase = controller->tibase;
+
+        /* ep0 doesn't use DMA; remember cppi indices are 0..N-1 */
+        index = ep->epnum - 1;
+
+        /* return the corresponding CPPI Channel Handle, and
+         * probably disable the non-CPPI irq until we need it.
+         */
+        if (transmit) {
+                if (index >= ARRAY_SIZE(controller->tx)) {
+                        DBG(1, "no %cX%d CPPI channel\n", 'T', index);
+                        return NULL;
+                }
+                cppi_ch = controller->tx + index;
+        } else {
+                if (index >= ARRAY_SIZE(controller->rx)) {
+                        DBG(1, "no %cX%d CPPI channel\n", 'R', index);
+                        return NULL;
+                }
+                cppi_ch = controller->rx + index;
+                core_rxirq_disable(tibase, ep->epnum);
+        }
+
+        /* REVISIT make this an error later once the same driver code works
+         * with the other DMA engine too
+         */
+        if (cppi_ch->hw_ep)
+                DBG(1, "re-allocating DMA%d %cX channel %p\n",
+                                index, transmit ? 'T' : 'R', cppi_ch);
+        cppi_ch->hw_ep = ep;
+        cppi_ch->channel.status = MUSB_DMA_STATUS_FREE;
+
+        DBG(4, "Allocate CPPI%d %cX\n", index, transmit ? 'T' : 'R');
+        return &cppi_ch->channel;
+}
+
+/* Release a CPPI Channel.  */
+static void cppi_channel_release(struct dma_channel *channel)
+{
+        struct cppi_channel     *c;
+        void __iomem            *tibase;
+
+        /* REVISIT:  for paranoia, check state and abort if needed... */
+
+        c = container_of(channel, struct cppi_channel, channel);
+        tibase = c->controller->tibase;
+        if (!c->hw_ep)
+                DBG(1, "releasing idle DMA channel %p\n", c);
+        else if (!c->transmit)
+                core_rxirq_enable(tibase, c->index + 1);
+
+        /* for now, leave its cppi IRQ enabled (we won't trigger it) */
+        c->hw_ep = NULL;
+        channel->status = MUSB_DMA_STATUS_UNKNOWN;
+}
+
+/* Context: controller irqlocked */
+static void
+cppi_dump_rx(int level, struct cppi_channel *c, const char *tag)
+{
+        void __iomem                    *base = c->controller->mregs;
+        struct cppi_rx_stateram __iomem *rx = c->state_ram;
+
+        musb_ep_select(base, c->index + 1);
+
+        DBG(level, "RX DMA%d%s: %d left, csr %04x, "
+                        "%08x H%08x S%08x C%08x, "
+                        "B%08x L%08x %08x .. %08x"
+                        "\n",
+                c->index, tag,
+                musb_readl(c->controller->tibase,
+                        DAVINCI_RXCPPI_BUFCNT0_REG + 4 * c->index),
+                musb_readw(c->hw_ep->regs, MUSB_RXCSR),
+
+                musb_readl(&rx->rx_skipbytes, 0),
+                musb_readl(&rx->rx_head, 0),
+                musb_readl(&rx->rx_sop, 0),
+                musb_readl(&rx->rx_current, 0),
+
+                musb_readl(&rx->rx_buf_current, 0),
+                musb_readl(&rx->rx_len_len, 0),
+                musb_readl(&rx->rx_cnt_cnt, 0),
+                musb_readl(&rx->rx_complete, 0)
+                );
+}
+
+/* Context: controller irqlocked */
+static void
+cppi_dump_tx(int level, struct cppi_channel *c, const char *tag)
+{
+        void __iomem                    *base = c->controller->mregs;
+        struct cppi_tx_stateram __iomem *tx = c->state_ram;
+
+        musb_ep_select(base, c->index + 1);
+
+        DBG(level, "TX DMA%d%s: csr %04x, "
+                        "H%08x S%08x C%08x %08x, "
+                        "F%08x L%08x .. %08x"
+                        "\n",
+                c->index, tag,
+                musb_readw(c->hw_ep->regs, MUSB_TXCSR),
+
+                musb_readl(&tx->tx_head, 0),
+                musb_readl(&tx->tx_buf, 0),
+                musb_readl(&tx->tx_current, 0),
+                musb_readl(&tx->tx_buf_current, 0),
+
+                musb_readl(&tx->tx_info, 0),
+                musb_readl(&tx->tx_rem_len, 0),
+                /* dummy/unused word 6 */
+                musb_readl(&tx->tx_complete, 0)
+                );
+}
+
+/* Context: controller irqlocked */
+static inline void
+cppi_rndis_update(struct cppi_channel *c, int is_rx,
+                void __iomem *tibase, int is_rndis)
+{
+        /* we may need to change the rndis flag for this cppi channel */
+        if (c->is_rndis != is_rndis) {
+                u32     value = musb_readl(tibase, DAVINCI_RNDIS_REG);
+                u32     temp = 1 << (c->index);
+
+                if (is_rx)
+                        temp <<= 16;
+                if (is_rndis)
+                        value |= temp;
+                else
+                        value &= ~temp;
+                musb_writel(tibase, DAVINCI_RNDIS_REG, value);
+                c->is_rndis = is_rndis;
+        }
+}
+
+static void cppi_dump_rxbd(const char *tag, struct cppi_descriptor *bd)
+{
+        pr_debug("RXBD/%s %08x: "
+                        "nxt %08x buf %08x off.blen %08x opt.plen %08x\n",
+                        tag, bd->dma,
+                        bd->hw_next, bd->hw_bufp, bd->hw_off_len,
+                        bd->hw_options);
+}
+
+static void cppi_dump_rxq(int level, const char *tag, struct cppi_channel *rx)
+{
+#if MUSB_DEBUG > 0
+        struct cppi_descriptor  *bd;
+
+        if (!_dbg_level(level))
+                return;
+        cppi_dump_rx(level, rx, tag);
+        if (rx->last_processed)
+                cppi_dump_rxbd("last", rx->last_processed);
+        for (bd = rx->head; bd; bd = bd->next)
+                cppi_dump_rxbd("active", bd);
+#endif
+}
+
+
+/* NOTE:  DaVinci autoreq is ignored except for host side "RNDIS" mode RX;
+ * so we won't ever use it (see "CPPI RX Woes" below).
+ */
+static inline int cppi_autoreq_update(struct cppi_channel *rx,
+                void __iomem *tibase, int onepacket, unsigned n_bds)
+{
+        u32     val;
+
+#ifdef  RNDIS_RX_IS_USABLE
+        u32     tmp;
+        /* assert(is_host_active(musb)) */
+
+        /* start from "AutoReq never" */
+        tmp = musb_readl(tibase, DAVINCI_AUTOREQ_REG);
+        val = tmp & ~((0x3) << (rx->index * 2));
+
+        /* HCD arranged reqpkt for packet #1.  we arrange int
+         * for all but the last one, maybe in two segments.
+         */
+        if (!onepacket) {
+#if 0
+                /* use two segments, autoreq "all" then the last "never" */
+                val |= ((0x3) << (rx->index * 2));
+                n_bds--;
+#else
+                /* one segment, autoreq "all-but-last" */
+                val |= ((0x1) << (rx->index * 2));
+#endif
+        }
+
+        if (val != tmp) {
+                int n = 100;
+
+                /* make sure that autoreq is updated before continuing */
+                musb_writel(tibase, DAVINCI_AUTOREQ_REG, val);
+                do {
+                        tmp = musb_readl(tibase, DAVINCI_AUTOREQ_REG);
+                        if (tmp == val)
+                                break;
+                        cpu_relax();
+                } while (n-- > 0);
+        }
+#endif
+
+        /* REQPKT is turned off after each segment */
+        if (n_bds && rx->channel.actual_len) {
+                void __iomem    *regs = rx->hw_ep->regs;
+
+                val = musb_readw(regs, MUSB_RXCSR);
+                if (!(val & MUSB_RXCSR_H_REQPKT)) {
+                        val |= MUSB_RXCSR_H_REQPKT | MUSB_RXCSR_H_WZC_BITS;
+                        musb_writew(regs, MUSB_RXCSR, val);
+                        /* flush writebufer */
+                        val = musb_readw(regs, MUSB_RXCSR);
+                }
+        }
+        return n_bds;
+}
+
+
+/* Buffer enqueuing Logic:
+ *
+ *  - RX builds new queues each time, to help handle routine "early
+ *    termination" cases (faults, including errors and short reads)
+ *    more correctly.
+ *
+ *  - for now, TX reuses the same queue of BDs every time
+ *
+ * REVISIT long term, we want a normal dynamic model.
+ * ... the goal will be to append to the
+ * existing queue, processing completed "dma buffers" (segments) on the fly.
+ *
+ * Otherwise we force an IRQ latency between requests, which slows us a lot
+ * (especially in "transparent" dma).  Unfortunately that model seems to be
+ * inherent in the DMA model from the Mentor code, except in the rare case
+ * of transfers big enough (~128+ KB) that we could append "middle" segments
+ * in the TX paths.  (RX can't do this, see below.)
+ *
+ * That's true even in the CPPI- friendly iso case, where most urbs have
+ * several small segments provided in a group and where the "packet at a time"
+ * "transparent" DMA model is always correct, even on the RX side.
+ */
+
+/*
+ * CPPI TX:
+ * ========
+ * TX is a lot more reasonable than RX; it doesn't need to run in
+ * irq-per-packet mode very often.  RNDIS mode seems to behave too
+ * (except how it handles the exactly-N-packets case).  Building a
+ * txdma queue with multiple requests (urb or usb_request) looks
+ * like it would work ... but fault handling would need much testing.
+ *
+ * The main issue with TX mode RNDIS relates to transfer lengths that
+ * are an exact multiple of the packet length.  It appears that there's
+ * a hiccup in that case (maybe the DMA completes before the ZLP gets
+ * written?) boiling down to not being able to rely on CPPI writing any
+ * terminating zero length packet before the next transfer is written.
+ * So that's punted to PIO; better yet, gadget drivers can avoid it.
+ *
+ * Plus, there's allegedly an undocumented constraint that rndis transfer
+ * length be a multiple of 64 bytes ... but the chip doesn't act that
+ * way, and we really don't _want_ that behavior anyway.
+ *
+ * On TX, "transparent" mode works ... although experiments have shown
+ * problems trying to use the SOP/EOP bits in different USB packets.
+ *
+ * REVISIT try to handle terminating zero length packets using CPPI
+ * instead of doing it by PIO after an IRQ.  (Meanwhile, make Ethernet
+ * links avoid that issue by forcing them to avoid zlps.)
+ */
+static void
+cppi_next_tx_segment(struct musb *musb, struct cppi_channel *tx)
+{
+        unsigned                maxpacket = tx->maxpacket;
+        dma_addr_t              addr = tx->buf_dma + tx->offset;
+        size_t                  length = tx->buf_len - tx->offset;
+        struct cppi_descriptor  *bd;
+        unsigned                n_bds;
+        unsigned                i;
+        struct cppi_tx_stateram __iomem *tx_ram = tx->state_ram;
+        int                     rndis;
+
+        /* TX can use the CPPI "rndis" mode, where we can probably fit this
+         * transfer in one BD and one IRQ.  The only time we would NOT want
+         * to use it is when hardware constraints prevent it, or if we'd
+         * trigger the "send a ZLP?" confusion.
+         */
+        rndis = (maxpacket & 0x3f) == 0
+                && length < 0xffff
+                && (length % maxpacket) != 0;
+
+        if (rndis) {
+                maxpacket = length;
+                n_bds = 1;
+        } else {
+                n_bds = length / maxpacket;
+                if (!length || (length % maxpacket))
+                        n_bds++;
+                n_bds = min(n_bds, (unsigned) NUM_TXCHAN_BD);
+                length = min(n_bds * maxpacket, length);
+        }
+
+        DBG(4, "TX DMA%d, pktSz %d %s bds %d dma 0x%x len %u\n",
+                        tx->index,
+                        maxpacket,
+                        rndis ? "rndis" : "transparent",
+                        n_bds,
+                        addr, length);
+
+        cppi_rndis_update(tx, 0, musb->ctrl_base, rndis);
+
+        /* assuming here that channel_program is called during
+         * transfer initiation ... current code maintains state
+         * for one outstanding request only (no queues, not even
+         * the implicit ones of an iso urb).
+         */
+
+        bd = tx->freelist;
+        tx->head = bd;
+        tx->last_processed = NULL;
+
+        /* FIXME use BD pool like RX side does, and just queue
+         * the minimum number for this request.
+         */
+
+        /* Prepare queue of BDs first, then hand it to hardware.
+         * All BDs except maybe the last should be of full packet
+         * size; for RNDIS there _is_ only that last packet.
+         */
+        for (i = 0; i < n_bds; ) {
+                if (++i < n_bds && bd->next)
+                        bd->hw_next = bd->next->dma;
+                else
+                        bd->hw_next = 0;
+
+                bd->hw_bufp = tx->buf_dma + tx->offset;
+
+                /* FIXME set EOP only on the last packet,
+                 * SOP only on the first ... avoid IRQs
+                 */
+                if ((tx->offset + maxpacket) <= tx->buf_len) {
+                        tx->offset += maxpacket;
+                        bd->hw_off_len = maxpacket;
+                        bd->hw_options = CPPI_SOP_SET | CPPI_EOP_SET
+                                | CPPI_OWN_SET | maxpacket;
+                } else {
+                        /* only this one may be a partial USB Packet */
+                        u32             partial_len;
+
+                        partial_len = tx->buf_len - tx->offset;
+                        tx->offset = tx->buf_len;
+                        bd->hw_off_len = partial_len;
+
+                        bd->hw_options = CPPI_SOP_SET | CPPI_EOP_SET
+                                | CPPI_OWN_SET | partial_len;
+                        if (partial_len == 0)
+                                bd->hw_options |= CPPI_ZERO_SET;
+                }
+
+                DBG(5, "TXBD %p: nxt %08x buf %08x len %04x opt %08x\n",
+                                bd, bd->hw_next, bd->hw_bufp,
+                                bd->hw_off_len, bd->hw_options);
+
+                /* update the last BD enqueued to the list */
+                tx->tail = bd;
+                bd = bd->next;
+        }
+
+        /* BDs live in DMA-coherent memory, but writes might be pending */
+        cpu_drain_writebuffer();
+
+        /* Write to the HeadPtr in state RAM to trigger */
+        musb_writel(&tx_ram->tx_head, 0, (u32)tx->freelist->dma);
+
+        cppi_dump_tx(5, tx, "/S");
+}
+
+/*
+ * CPPI RX Woes:
+ * =============
+ * Consider a 1KB bulk RX buffer in two scenarios:  (a) it's fed two 300 byte
+ * packets back-to-back, and (b) it's fed two 512 byte packets back-to-back.
+ * (Full speed transfers have similar scenarios.)
+ *
+ * The correct behavior for Linux is that (a) fills the buffer with 300 bytes,
+ * and the next packet goes into a buffer that's queued later; while (b) fills
+ * the buffer with 1024 bytes.  How to do that with CPPI?
+ *
+ * - RX queues in "rndis" mode -- one single BD -- handle (a) correctly, but
+ *   (b) loses **BADLY** because nothing (!) happens when that second packet
+ *   fills the buffer, much less when a third one arrives.  (Which makes this
+ *   not a "true" RNDIS mode.  In the RNDIS protocol short-packet termination
+ *   is optional, and it's fine if peripherals -- not hosts! -- pad messages
+ *   out to end-of-buffer.  Standard PCI host controller DMA descriptors
+ *   implement that mode by default ... which is no accident.)
+ *
+ * - RX queues in "transparent" mode -- two BDs with 512 bytes each -- have
+ *   converse problems:  (b) is handled right, but (a) loses badly.  CPPI RX
+ *   ignores SOP/EOP markings and processes both of those BDs; so both packets
+ *   are loaded into the buffer (with a 212 byte gap between them), and the next
+ *   buffer queued will NOT get its 300 bytes of data. (It seems like SOP/EOP
+ *   are intended as outputs for RX queues, not inputs...)
+ *
+ * - A variant of "transparent" mode -- one BD at a time -- is the only way to
+ *   reliably make both cases work, with software handling both cases correctly
+ *   and at the significant penalty of needing an IRQ per packet.  (The lack of
+ *   I/O overlap can be slightly ameliorated by enabling double buffering.)
+ *
+ * So how to get rid of IRQ-per-packet?  The transparent multi-BD case could
+ * be used in special cases like mass storage, which sets URB_SHORT_NOT_OK
+ * (or maybe its peripheral side counterpart) to flag (a) scenarios as errors
+ * with guaranteed driver level fault recovery and scrubbing out what's left
+ * of that garbaged datastream.
+ *
+ * But there seems to be no way to identify the cases where CPPI RNDIS mode
+ * is appropriate -- which do NOT include RNDIS host drivers, but do include
+ * the CDC Ethernet driver! -- and the documentation is incomplete/wrong.
+ * So we can't _ever_ use RX RNDIS mode ... except by using a heuristic
+ * that applies best on the peripheral side (and which could fail rudely).
+ *
+ * Leaving only "transparent" mode; we avoid multi-bd modes in almost all
+ * cases other than mass storage class.  Otherwise we're correct but slow,
+ * since CPPI penalizes our need for a "true RNDIS" default mode.
+ */
+
+
+/* Heuristic, intended to kick in for ethernet/rndis peripheral ONLY
+ *
+ * IFF
+ *  (a) peripheral mode ... since rndis peripherals could pad their
+ *      writes to hosts, causing i/o failure; or we'd have to cope with
+ *      a largely unknowable variety of host side protocol variants
+ *  (b) and short reads are NOT errors ... since full reads would
+ *      cause those same i/o failures
+ *  (c) and read length is
+ *      - less than 64KB (max per cppi descriptor)
+ *      - not a multiple of 4096 (g_zero default, full reads typical)
+ *      - N (>1) packets long, ditto (full reads not EXPECTED)
+ * THEN
+ *   try rx rndis mode
+ *
+ * Cost of heuristic failing:  RXDMA wedges at the end of transfers that
+ * fill out the whole buffer.  Buggy host side usb network drivers could
+ * trigger that, but "in the field" such bugs seem to be all but unknown.
+ *
+ * So this module parameter lets the heuristic be disabled.  When using
+ * gadgetfs, the heuristic will probably need to be disabled.
+ */
+static int cppi_rx_rndis = 1;
+
+module_param(cppi_rx_rndis, bool, 0);
+MODULE_PARM_DESC(cppi_rx_rndis, "enable/disable RX RNDIS heuristic");
+
+
+/**
+ * cppi_next_rx_segment - dma read for the next chunk of a buffer
+ * @musb: the controller
+ * @rx: dma channel
+ * @onepacket: true unless caller treats short reads as errors, and
+ *      performs fault recovery above usbcore.
+ * Context: controller irqlocked
+ *
+ * See above notes about why we can't use multi-BD RX queues except in
+ * rare cases (mass storage class), and can never use the hardware "rndis"
+ * mode (since it's not a "true" RNDIS mode) with complete safety..
+ *
+ * It's ESSENTIAL that callers specify "onepacket" mode unless they kick in
+ * code to recover from corrupted datastreams after each short transfer.
+ */
+static void
+cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
+{
+        unsigned                maxpacket = rx->maxpacket;
+        dma_addr_t              addr = rx->buf_dma + rx->offset;
+        size_t                  length = rx->buf_len - rx->offset;
+        struct cppi_descriptor  *bd, *tail;
+        unsigned                n_bds;
+        unsigned                i;
+        void __iomem            *tibase = musb->ctrl_base;
+        int                     is_rndis = 0;
+        struct cppi_rx_stateram __iomem *rx_ram = rx->state_ram;
+
+        if (onepacket) {
+                /* almost every USB driver, host or peripheral side */
+                n_bds = 1;
+
+                /* maybe apply the heuristic above */
+                if (cppi_rx_rndis
+                                && is_peripheral_active(musb)
+                                && length > maxpacket
+                                && (length & ~0xffff) == 0
+                                && (length & 0x0fff) != 0
+                                && (length & (maxpacket - 1)) == 0) {
+                        maxpacket = length;
+                        is_rndis = 1;
+                }
+        } else {
+                /* virtually nothing except mass storage class */
+                if (length > 0xffff) {
+                        n_bds = 0xffff / maxpacket;
+                        length = n_bds * maxpacket;
+                } else {
+                        n_bds = length / maxpacket;
+                        if (length % maxpacket)
+                                n_bds++;
+                }
+                if (n_bds == 1)
+                        onepacket = 1;
+                else
+                        n_bds = min(n_bds, (unsigned) NUM_RXCHAN_BD);
+        }
+
+        /* In host mode, autorequest logic can generate some IN tokens; it's
+         * tricky since we can't leave REQPKT set in RXCSR after the transfer
+         * finishes. So:  multipacket transfers involve two or more segments.
+         * And always at least two IRQs ... RNDIS mode is not an option.
+         */
+        if (is_host_active(musb))
+                n_bds = cppi_autoreq_update(rx, tibase, onepacket, n_bds);
+
+        cppi_rndis_update(rx, 1, musb->ctrl_base, is_rndis);
+
+        length = min(n_bds * maxpacket, length);
+
+        DBG(4, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) "
+                        "dma 0x%x len %u %u/%u\n",
+                        rx->index, maxpacket,
+                        onepacket
+                                ? (is_rndis ? "rndis" : "onepacket")
+                                : "multipacket",
+                        n_bds,
+                        musb_readl(tibase,
+                                DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
+                                        & 0xffff,
+                        addr, length, rx->channel.actual_len, rx->buf_len);
+
+        /* only queue one segment at a time, since the hardware prevents
+         * correct queue shutdown after unexpected short packets
+         */
+        bd = cppi_bd_alloc(rx);
+        rx->head = bd;
+
+        /* Build BDs for all packets in this segment */
+        for (i = 0, tail = NULL; bd && i < n_bds; i++, tail = bd) {
+                u32     bd_len;
+
+                if (i) {
+                        bd = cppi_bd_alloc(rx);
+                        if (!bd)
+                                break;
+                        tail->next = bd;
+                        tail->hw_next = bd->dma;
+                }
+                bd->hw_next = 0;
+
+                /* all but the last packet will be maxpacket size */
+                if (maxpacket < length)
+                        bd_len = maxpacket;
+                else
+                        bd_len = length;
+
+                bd->hw_bufp = addr;
+                addr += bd_len;
+                rx->offset += bd_len;
+
+                bd->hw_off_len = (0 /*offset*/ << 16) + bd_len;
+                bd->buflen = bd_len;
+
+                bd->hw_options = CPPI_OWN_SET | (i == 0 ? length : 0);
+                length -= bd_len;
+        }
+
+        /* we always expect at least one reusable BD! */
+        if (!tail) {
+                WARNING("rx dma%d -- no BDs? need %d\n", rx->index, n_bds);
+                return;
+        } else if (i < n_bds)
+                WARNING("rx dma%d -- only %d of %d BDs\n", rx->index, i, n_bds);
+
+        tail->next = NULL;
+        tail->hw_next = 0;
+
+        bd = rx->head;
+        rx->tail = tail;
+
+        /* short reads and other faults should terminate this entire
+         * dma segment.  we want one "dma packet" per dma segment, not
+         * one per USB packet, terminating the whole queue at once...
+         * NOTE that current hardware seems to ignore SOP and EOP.
+         */
+        bd->hw_options |= CPPI_SOP_SET;
+        tail->hw_options |= CPPI_EOP_SET;
+
+        if (debug >= 5) {
+                struct cppi_descriptor  *d;
+
+                for (d = rx->head; d; d = d->next)
+                        cppi_dump_rxbd("S", d);
+        }
+
+        /* in case the preceding transfer left some state... */
+        tail = rx->last_processed;
+        if (tail) {
+                tail->next = bd;
+                tail->hw_next = bd->dma;
+        }
+
+        core_rxirq_enable(tibase, rx->index + 1);
+
+        /* BDs live in DMA-coherent memory, but writes might be pending */
+        cpu_drain_writebuffer();
+
+        /* REVISIT specs say to write this AFTER the BUFCNT register
+         * below ... but that loses badly.
+         */
+        musb_writel(&rx_ram->rx_head, 0, bd->dma);
+
+        /* bufferCount must be at least 3, and zeroes on completion
+         * unless it underflows below zero, or stops at two, or keeps
+         * growing ... grr.
+         */
+        i = musb_readl(tibase,
+                        DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
+                        & 0xffff;
+
+        if (!i)
+                musb_writel(tibase,
+                        DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
+                        n_bds + 2);
+        else if (n_bds > (i - 3))
+                musb_writel(tibase,
+                        DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
+                        n_bds - (i - 3));
+
+        i = musb_readl(tibase,
+                        DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
+                        & 0xffff;
+        if (i < (2 + n_bds)) {
+                DBG(2, "bufcnt%d underrun - %d (for %d)\n",
+                                        rx->index, i, n_bds);
+                musb_writel(tibase,
+                        DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
+                        n_bds + 2);
+        }
+
+        cppi_dump_rx(4, rx, "/S");
+}
+
+/**
+ * cppi_channel_program - program channel for data transfer
+ * @ch: the channel
+ * @maxpacket: max packet size
+ * @mode: For RX, 1 unless the usb protocol driver promised to treat
+ *      all short reads as errors and kick in high level fault recovery.
+ *      For TX, ignored because of RNDIS mode races/glitches.
+ * @dma_addr: dma address of buffer
+ * @len: length of buffer
+ * Context: controller irqlocked
+ */
+static int cppi_channel_program(struct dma_channel *ch,
+                u16 maxpacket, u8 mode,
+                dma_addr_t dma_addr, u32 len)
+{
+        struct cppi_channel     *cppi_ch;
+        struct cppi             *controller;
+        struct musb             *musb;
+
+        cppi_ch = container_of(ch, struct cppi_channel, channel);
+        controller = cppi_ch->controller;
+        musb = controller->musb;
+
+        switch (ch->status) {
+        case MUSB_DMA_STATUS_BUS_ABORT:
+        case MUSB_DMA_STATUS_CORE_ABORT:
+                /* fault irq handler should have handled cleanup */
+                WARNING("%cX DMA%d not cleaned up after abort!\n",
+                                cppi_ch->transmit ? 'T' : 'R',
+                                cppi_ch->index);
+                /* WARN_ON(1); */
+                break;
+        case MUSB_DMA_STATUS_BUSY:
+                WARNING("program active channel?  %cX DMA%d\n",
+                                cppi_ch->transmit ? 'T' : 'R',
+                                cppi_ch->index);
+                /* WARN_ON(1); */
+                break;
+        case MUSB_DMA_STATUS_UNKNOWN:
+                DBG(1, "%cX DMA%d not allocated!\n",
+                                cppi_ch->transmit ? 'T' : 'R',
+                                cppi_ch->index);
+                /* FALLTHROUGH */
+        case MUSB_DMA_STATUS_FREE:
+                break;
+        }
+
+        ch->status = MUSB_DMA_STATUS_BUSY;
+
+        /* set transfer parameters, then queue up its first segment */
+        cppi_ch->buf_dma = dma_addr;
+        cppi_ch->offset = 0;
+        cppi_ch->maxpacket = maxpacket;
+        cppi_ch->buf_len = len;
+
+        /* TX channel? or RX? */
+        if (cppi_ch->transmit)
+                cppi_next_tx_segment(musb, cppi_ch);
+        else
+                cppi_next_rx_segment(musb, cppi_ch, mode);
+
+        return true;
+}
+
+static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
+{
+        struct cppi_channel             *rx = &cppi->rx[ch];
+        struct cppi_rx_stateram __iomem *state = rx->state_ram;
+        struct cppi_descriptor          *bd;
+        struct cppi_descriptor          *last = rx->last_processed;
+        bool                            completed = false;
+        bool                            acked = false;
+        int                             i;
+        dma_addr_t                      safe2ack;
+        void __iomem                    *regs = rx->hw_ep->regs;
+
+        cppi_dump_rx(6, rx, "/K");
+
+        bd = last ? last->next : rx->head;
+        if (!bd)
+                return false;
+
+        /* run through all completed BDs */
+        for (i = 0, safe2ack = musb_readl(&state->rx_complete, 0);
+                        (safe2ack || completed) && bd && i < NUM_RXCHAN_BD;
+                        i++, bd = bd->next) {
+                u16     len;
+
+                /* catch latest BD writes from CPPI */
+                rmb();
+                if (!completed && (bd->hw_options & CPPI_OWN_SET))
+                        break;
+
+                DBG(5, "C/RXBD %08x: nxt %08x buf %08x "
+                        "off.len %08x opt.len %08x (%d)\n",
+                        bd->dma, bd->hw_next, bd->hw_bufp,
+                        bd->hw_off_len, bd->hw_options,
+                        rx->channel.actual_len);
+
+                /* actual packet received length */
+                if ((bd->hw_options & CPPI_SOP_SET) && !completed)
+                        len = bd->hw_off_len & CPPI_RECV_PKTLEN_MASK;
+                else
+                        len = 0;
+
+                if (bd->hw_options & CPPI_EOQ_MASK)
+                        completed = true;
+
+                if (!completed && len < bd->buflen) {
+                        /* NOTE:  when we get a short packet, RXCSR_H_REQPKT
+                         * must have been cleared, and no more DMA packets may
+                         * active be in the queue... TI docs didn't say, but
+                         * CPPI ignores those BDs even though OWN is still set.
+                         */
+                        completed = true;
+                        DBG(3, "rx short %d/%d (%d)\n",
+                                        len, bd->buflen,
+                                        rx->channel.actual_len);
+                }
+
+                /* If we got here, we expect to ack at least one BD; meanwhile
+                 * CPPI may completing other BDs while we scan this list...
+                 *
+                 * RACE: we can notice OWN cleared before CPPI raises the
+                 * matching irq by writing that BD as the completion pointer.
+                 * In such cases, stop scanning and wait for the irq, avoiding
+                 * lost acks and states where BD ownership is unclear.
+                 */
+                if (bd->dma == safe2ack) {
+                        musb_writel(&state->rx_complete, 0, safe2ack);
+                        safe2ack = musb_readl(&state->rx_complete, 0);
+                        acked = true;
+                        if (bd->dma == safe2ack)
+                                safe2ack = 0;
+                }
+
+                rx->channel.actual_len += len;
+
+                cppi_bd_free(rx, last);
+                last = bd;
+
+                /* stop scanning on end-of-segment */
+                if (bd->hw_next == 0)
+                        completed = true;
+        }
+        rx->last_processed = last;
+
+        /* dma abort, lost ack, or ... */
+        if (!acked && last) {
+                int     csr;
+
+                if (safe2ack == 0 || safe2ack == rx->last_processed->dma)
+                        musb_writel(&state->rx_complete, 0, safe2ack);
+                if (safe2ack == 0) {
+                        cppi_bd_free(rx, last);
+                        rx->last_processed = NULL;
+
+                        /* if we land here on the host side, H_REQPKT will
+                         * be clear and we need to restart the queue...
+                         */
+                        WARN_ON(rx->head);
+                }
+                musb_ep_select(cppi->mregs, rx->index + 1);
+                csr = musb_readw(regs, MUSB_RXCSR);
+                if (csr & MUSB_RXCSR_DMAENAB) {
+                        DBG(4, "list%d %p/%p, last %08x%s, csr %04x\n",
+                                rx->index,
+                                rx->head, rx->tail,
+                                rx->last_processed
+                                        ? rx->last_processed->dma
+                                        : 0,
+                                completed ? ", completed" : "",
+                                csr);
+                        cppi_dump_rxq(4, "/what?", rx);
+                }
+        }
+        if (!completed) {
+                int     csr;
+
+                rx->head = bd;
+
+                /* REVISIT seems like "autoreq all but EOP" doesn't...
+                 * setting it here "should" be racey, but seems to work
+                 */
+                csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR);
+                if (is_host_active(cppi->musb)
+                                && bd
+                                && !(csr & MUSB_RXCSR_H_REQPKT)) {
+                        csr |= MUSB_RXCSR_H_REQPKT;
+                        musb_writew(regs, MUSB_RXCSR,
+                                        MUSB_RXCSR_H_WZC_BITS | csr);
+                        csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR);
+                }
+        } else {
+                rx->head = NULL;
+                rx->tail = NULL;
+        }
+
+        cppi_dump_rx(6, rx, completed ? "/completed" : "/cleaned");
+        return completed;
+}
+
+void cppi_completion(struct musb *musb, u32 rx, u32 tx)
+{
+        void __iomem            *tibase;
+        int                     i, index;
+        struct cppi             *cppi;
+        struct musb_hw_ep       *hw_ep = NULL;
+
+        cppi = container_of(musb->dma_controller, struct cppi, controller);
+
+        tibase = musb->ctrl_base;
+
+        /* process TX channels */
+        for (index = 0; tx; tx = tx >> 1, index++) {
+                struct cppi_channel             *tx_ch;
+                struct cppi_tx_stateram __iomem *tx_ram;
+                bool                            completed = false;
+                struct cppi_descriptor          *bd;
+
+                if (!(tx & 1))
+                        continue;
+
+                tx_ch = cppi->tx + index;
+                tx_ram = tx_ch->state_ram;
+
+                /* FIXME  need a cppi_tx_scan() routine, which
+                 * can also be called from abort code
+                 */
+
+                cppi_dump_tx(5, tx_ch, "/E");
+
+                bd = tx_ch->head;
+
+                if (NULL == bd) {
+                        DBG(1, "null BD\n");
+                        continue;
+                }
+
+                /* run through all completed BDs */
+                for (i = 0; !completed && bd && i < NUM_TXCHAN_BD;
+                                i++, bd = bd->next) {
+                        u16     len;
+
+                        /* catch latest BD writes from CPPI */
+                        rmb();
+                        if (bd->hw_options & CPPI_OWN_SET)
+                                break;
+
+                        DBG(5, "C/TXBD %p n %x b %x off %x opt %x\n",
+                                        bd, bd->hw_next, bd->hw_bufp,
+                                        bd->hw_off_len, bd->hw_options);
+
+                        len = bd->hw_off_len & CPPI_BUFFER_LEN_MASK;
+                        tx_ch->channel.actual_len += len;
+
+                        tx_ch->last_processed = bd;
+
+                        /* write completion register to acknowledge
+                         * processing of completed BDs, and possibly
+                         * release the IRQ; EOQ might not be set ...
+                         *
+                         * REVISIT use the same ack strategy as rx
+                         *
+                         * REVISIT have observed bit 18 set; huh??
+                         */
+                        /* if ((bd->hw_options & CPPI_EOQ_MASK)) */
+                                musb_writel(&tx_ram->tx_complete, 0, bd->dma);
+
+                        /* stop scanning on end-of-segment */
+                        if (bd->hw_next == 0)
+                                completed = true;
+                }
+
+                /* on end of segment, maybe go to next one */
+                if (completed) {
+                        /* cppi_dump_tx(4, tx_ch, "/complete"); */
+
+                        /* transfer more, or report completion */
+                        if (tx_ch->offset >= tx_ch->buf_len) {
+                                tx_ch->head = NULL;
+                                tx_ch->tail = NULL;
+                                tx_ch->channel.status = MUSB_DMA_STATUS_FREE;
+
+                                hw_ep = tx_ch->hw_ep;
+
+                                /* Peripheral role never repurposes the
+                                 * endpoint, so immediate completion is
+                                 * safe.  Host role waits for the fifo
+                                 * to empty (TXPKTRDY irq) before going
+                                 * to the next queued bulk transfer.
+                                 */
+                                if (is_host_active(cppi->musb)) {
+#if 0
+                                        /* WORKAROUND because we may
+                                         * not always get TXKPTRDY ...
+                                         */
+                                        int     csr;
+
+                                        csr = musb_readw(hw_ep->regs,
+                                                MUSB_TXCSR);
+                                        if (csr & MUSB_TXCSR_TXPKTRDY)
+#endif
+                                                completed = false;
+                                }
+                                if (completed)
+                                        musb_dma_completion(musb, index + 1, 1);
+
+                        } else {
+                                /* Bigger transfer than we could fit in
+                                 * that first batch of descriptors...
+                                 */
+                                cppi_next_tx_segment(musb, tx_ch);
+                        }
+                } else
+                        tx_ch->head = bd;
+        }
+
+        /* Start processing the RX block */
+        for (index = 0; rx; rx = rx >> 1, index++) {
+
+                if (rx & 1) {
+                        struct cppi_channel             *rx_ch;
+
+                        rx_ch = cppi->rx + index;
+
+                        /* let incomplete dma segments finish */
+                        if (!cppi_rx_scan(cppi, index))
+                                continue;
+
+                        /* start another dma segment if needed */
+                        if (rx_ch->channel.actual_len != rx_ch->buf_len
+                                        && rx_ch->channel.actual_len
+                                                == rx_ch->offset) {
+                                cppi_next_rx_segment(musb, rx_ch, 1);
+                                continue;
+                        }
+
+                        /* all segments completed! */
+                        rx_ch->channel.status = MUSB_DMA_STATUS_FREE;
+
+                        hw_ep = rx_ch->hw_ep;
+
+                        core_rxirq_disable(tibase, index + 1);
+                        musb_dma_completion(musb, index + 1, 0);
+                }
+        }
+
+        /* write to CPPI EOI register to re-enable interrupts */
+        musb_writel(tibase, DAVINCI_CPPI_EOI_REG, 0);
+}
+
+/* Instantiate a software object representing a DMA controller. */
+struct dma_controller *__init
+dma_controller_create(struct musb *musb, void __iomem *mregs)
+{
+        struct cppi             *controller;
+
+        controller = kzalloc(sizeof *controller, GFP_KERNEL);
+        if (!controller)
+                return NULL;
+
+        controller->mregs = mregs;
+        controller->tibase = mregs - DAVINCI_BASE_OFFSET;
+
+        controller->musb = musb;
+        controller->controller.start = cppi_controller_start;
+        controller->controller.stop = cppi_controller_stop;
+        controller->controller.channel_alloc = cppi_channel_allocate;
+        controller->controller.channel_release = cppi_channel_release;
+        controller->controller.channel_program = cppi_channel_program;
+        controller->controller.channel_abort = cppi_channel_abort;
+
+        /* NOTE: allocating from on-chip SRAM would give the least
+         * contention for memory access, if that ever matters here.
+         */
+
+        /* setup BufferPool */
+        controller->pool = dma_pool_create("cppi",
+                        controller->musb->controller,
+                        sizeof(struct cppi_descriptor),
+                        CPPI_DESCRIPTOR_ALIGN, 0);
+        if (!controller->pool) {
+                kfree(controller);
+                return NULL;
+        }
+
+        return &controller->controller;
+}
+
+/*
+ *  Destroy a previously-instantiated DMA controller.
+ */
+void dma_controller_destroy(struct dma_controller *c)
+{
+        struct cppi     *cppi;
+
+        cppi = container_of(c, struct cppi, controller);
+
+        /* assert:  caller stopped the controller first */
+        dma_pool_destroy(cppi->pool);
+
+        kfree(cppi);
+}
+
+/*
+ * Context: controller irqlocked, endpoint selected
+ */
+static int cppi_channel_abort(struct dma_channel *channel)
+{
+        struct cppi_channel     *cppi_ch;
+        struct cppi             *controller;
+        void __iomem            *mbase;
+        void __iomem            *tibase;
+        void __iomem            *regs;
+        u32                     value;
+        struct cppi_descriptor  *queue;
+
+        cppi_ch = container_of(channel, struct cppi_channel, channel);
+
+        controller = cppi_ch->controller;
+
+        switch (channel->status) {
+        case MUSB_DMA_STATUS_BUS_ABORT:
+        case MUSB_DMA_STATUS_CORE_ABORT:
+                /* from RX or TX fault irq handler */
+        case MUSB_DMA_STATUS_BUSY:
+                /* the hardware needs shutting down */
+                regs = cppi_ch->hw_ep->regs;
+                break;
+        case MUSB_DMA_STATUS_UNKNOWN:
+        case MUSB_DMA_STATUS_FREE:
+                return 0;
+        default:
+                return -EINVAL;
+        }
+
+        if (!cppi_ch->transmit && cppi_ch->head)
+                cppi_dump_rxq(3, "/abort", cppi_ch);
+
+        mbase = controller->mregs;
+        tibase = controller->tibase;
+
+        queue = cppi_ch->head;
+        cppi_ch->head = NULL;
+        cppi_ch->tail = NULL;
+
+        /* REVISIT should rely on caller having done this,
+         * and caller should rely on us not changing it.
+         * peripheral code is safe ... check host too.
+         */
+        musb_ep_select(mbase, cppi_ch->index + 1);
+
+        if (cppi_ch->transmit) {
+                struct cppi_tx_stateram __iomem *tx_ram;
+                int                     enabled;
+
+                /* mask interrupts raised to signal teardown complete.  */
+                enabled = musb_readl(tibase, DAVINCI_TXCPPI_INTENAB_REG)
+                                & (1 << cppi_ch->index);
+                if (enabled)
+                        musb_writel(tibase, DAVINCI_TXCPPI_INTCLR_REG,
+                                        (1 << cppi_ch->index));
+
+                /* REVISIT put timeouts on these controller handshakes */
+
+                cppi_dump_tx(6, cppi_ch, " (teardown)");
+
+                /* teardown DMA engine then usb core */
+                do {
+                        value = musb_readl(tibase, DAVINCI_TXCPPI_TEAR_REG);
+                } while (!(value & CPPI_TEAR_READY));
+                musb_writel(tibase, DAVINCI_TXCPPI_TEAR_REG, cppi_ch->index);
+
+                tx_ram = cppi_ch->state_ram;
+                do {
+                        value = musb_readl(&tx_ram->tx_complete, 0);
+                } while (0xFFFFFFFC != value);
+                musb_writel(&tx_ram->tx_complete, 0, 0xFFFFFFFC);
+
+                /* FIXME clean up the transfer state ... here?
+                 * the completion routine should get called with
+                 * an appropriate status code.
+                 */
+
+                value = musb_readw(regs, MUSB_TXCSR);
+                value &= ~MUSB_TXCSR_DMAENAB;
+                value |= MUSB_TXCSR_FLUSHFIFO;
+                musb_writew(regs, MUSB_TXCSR, value);
+                musb_writew(regs, MUSB_TXCSR, value);
+
+                /* re-enable interrupt */
+                if (enabled)
+                        musb_writel(tibase, DAVINCI_TXCPPI_INTENAB_REG,
+                                        (1 << cppi_ch->index));
+
+                /* While we scrub the TX state RAM, ensure that we clean
+                 * up any interrupt that's currently asserted:
+                 * 1. Write to completion Ptr value 0x1(bit 0 set)
+                 *    (write back mode)
+                 * 2. Write to completion Ptr value 0x0(bit 0 cleared)
+                 *    (compare mode)
+                 * Value written is compared(for bits 31:2) and when
+                 * equal, interrupt is deasserted.
+                 */
+                cppi_reset_tx(tx_ram, 1);
+                musb_writel(&tx_ram->tx_complete, 0, 0);
+
+                cppi_dump_tx(5, cppi_ch, " (done teardown)");
+
+                /* REVISIT tx side _should_ clean up the same way
+                 * as the RX side ... this does no cleanup at all!
+                 */
+
+        } else /* RX */ {
+                u16                     csr;
+
+                /* NOTE: docs don't guarantee any of this works ...  we
+                 * expect that if the usb core stops telling the cppi core
+                 * to pull more data from it, then it'll be safe to flush
+                 * current RX DMA state iff any pending fifo transfer is done.
+                 */
+
+                core_rxirq_disable(tibase, cppi_ch->index + 1);
+
+                /* for host, ensure ReqPkt is never set again */
+                if (is_host_active(cppi_ch->controller->musb)) {
+                        value = musb_readl(tibase, DAVINCI_AUTOREQ_REG);
+                        value &= ~((0x3) << (cppi_ch->index * 2));
+                        musb_writel(tibase, DAVINCI_AUTOREQ_REG, value);
+                }
+
+                csr = musb_readw(regs, MUSB_RXCSR);
+
+                /* for host, clear (just) ReqPkt at end of current packet(s) */
+                if (is_host_active(cppi_ch->controller->musb)) {
+                        csr |= MUSB_RXCSR_H_WZC_BITS;
+                        csr &= ~MUSB_RXCSR_H_REQPKT;
+                } else
+                        csr |= MUSB_RXCSR_P_WZC_BITS;
+
+                /* clear dma enable */
+                csr &= ~(MUSB_RXCSR_DMAENAB);
+                musb_writew(regs, MUSB_RXCSR, csr);
+                csr = musb_readw(regs, MUSB_RXCSR);
+
+                /* Quiesce: wait for current dma to finish (if not cleanup).
+                 * We can't use bit zero of stateram->rx_sop, since that
+                 * refers to an entire "DMA packet" not just emptying the
+                 * current fifo.  Most segments need multiple usb packets.
+                 */
+                if (channel->status == MUSB_DMA_STATUS_BUSY)
+                        udelay(50);
+
+                /* scan the current list, reporting any data that was
+                 * transferred and acking any IRQ
+                 */
+                cppi_rx_scan(controller, cppi_ch->index);
+
+                /* clobber the existing state once it's idle
+                 *
+                 * NOTE:  arguably, we should also wait for all the other
+                 * RX channels to quiesce (how??) and then temporarily
+                 * disable RXCPPI_CTRL_REG ... but it seems that we can
+                 * rely on the controller restarting from state ram, with
+                 * only RXCPPI_BUFCNT state being bogus.  BUFCNT will
+                 * correct itself after the next DMA transfer though.
+                 *
+                 * REVISIT does using rndis mode change that?
+                 */
+                cppi_reset_rx(cppi_ch->state_ram);
+
+                /* next DMA request _should_ load cppi head ptr */
+
+                /* ... we don't "free" that list, only mutate it in place.  */
+                cppi_dump_rx(5, cppi_ch, " (done abort)");
+
+                /* clean up previously pending bds */
+                cppi_bd_free(cppi_ch, cppi_ch->last_processed);
+                cppi_ch->last_processed = NULL;
+
+                while (queue) {
+                        struct cppi_descriptor  *tmp = queue->next;
+
+                        cppi_bd_free(cppi_ch, queue);
+                        queue = tmp;
+                }
+        }
+
+        channel->status = MUSB_DMA_STATUS_FREE;
+        cppi_ch->buf_dma = 0;
+        cppi_ch->offset = 0;
+        cppi_ch->buf_len = 0;
+        cppi_ch->maxpacket = 0;
+        return 0;
+}
+
+/* TBD Queries:
+ *
+ * Power Management ... probably turn off cppi during suspend, restart;
+ * check state ram?  Clocking is presumably shared with usb core.
+ */
diff --git a/drivers/usb/musb/cppi_dma.h b/drivers/usb/musb/cppi_dma.h
new file mode 100644
index 000000000000..fc5216b5d2c5
--- /dev/null
+++ b/drivers/usb/musb/cppi_dma.h
@@ -0,0 +1,133 @@
+/* Copyright (C) 2005-2006 by Texas Instruments */
+
+#ifndef _CPPI_DMA_H_
+#define _CPPI_DMA_H_
+
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/smp_lock.h>
+#include <linux/errno.h>
+#include <linux/dmapool.h>
+
+#include "musb_dma.h"
+#include "musb_core.h"
+
+
+/* FIXME fully isolate CPPI from DaVinci ... the "CPPI generic" registers
+ * would seem to be shared with the TUSB6020 (over VLYNQ).
+ */
+
+#include "davinci.h"
+
+
+/* CPPI RX/TX state RAM */
+
+struct cppi_tx_stateram {
+        u32 tx_head;                    /* "DMA packet" head descriptor */
+        u32 tx_buf;
+        u32 tx_current;                 /* current descriptor */
+        u32 tx_buf_current;
+        u32 tx_info;                    /* flags, remaining buflen */
+        u32 tx_rem_len;
+        u32 tx_dummy;                   /* unused */
+        u32 tx_complete;
+};
+
+struct cppi_rx_stateram {
+        u32 rx_skipbytes;
+        u32 rx_head;
+        u32 rx_sop;                     /* "DMA packet" head descriptor */
+        u32 rx_current;                 /* current descriptor */
+        u32 rx_buf_current;
+        u32 rx_len_len;
+        u32 rx_cnt_cnt;
+        u32 rx_complete;
+};
+
+/* hw_options bits in CPPI buffer descriptors */
+#define CPPI_SOP_SET    ((u32)(1 << 31))
+#define CPPI_EOP_SET    ((u32)(1 << 30))
+#define CPPI_OWN_SET    ((u32)(1 << 29))        /* owned by cppi */
+#define CPPI_EOQ_MASK   ((u32)(1 << 28))
+#define CPPI_ZERO_SET   ((u32)(1 << 23))        /* rx saw zlp; tx issues one */
+#define CPPI_RXABT_MASK ((u32)(1 << 19))        /* need more rx buffers */
+
+#define CPPI_RECV_PKTLEN_MASK 0xFFFF
+#define CPPI_BUFFER_LEN_MASK 0xFFFF
+
+#define CPPI_TEAR_READY ((u32)(1 << 31))
+
+/* CPPI data structure definitions */
+
+#define CPPI_DESCRIPTOR_ALIGN   16      /* bytes; 5-dec docs say 4-byte align */
+
+struct cppi_descriptor {
+        /* hardware overlay */
+        u32             hw_next;        /* next buffer descriptor Pointer */
+        u32             hw_bufp;        /* i/o buffer pointer */
+        u32             hw_off_len;     /* buffer_offset16, buffer_length16 */
+        u32             hw_options;     /* flags:  SOP, EOP etc*/
+
+        struct cppi_descriptor *next;
+        dma_addr_t      dma;            /* address of this descriptor */
+        u32             buflen;         /* for RX: original buffer length */
+} __attribute__ ((aligned(CPPI_DESCRIPTOR_ALIGN)));
+
+
+struct cppi;
+
+/* CPPI  Channel Control structure */
+struct cppi_channel {
+        struct dma_channel      channel;
+
+        /* back pointer to the DMA controller structure */
+        struct cppi             *controller;
+
+        /* which direction of which endpoint? */
+        struct musb_hw_ep       *hw_ep;
+        bool                    transmit;
+        u8                      index;
+
+        /* DMA modes:  RNDIS or "transparent" */
+        u8                      is_rndis;
+
+        /* book keeping for current transfer request */
+        dma_addr_t              buf_dma;
+        u32                     buf_len;
+        u32                     maxpacket;
+        u32                     offset;         /* dma requested */
+
+        void __iomem            *state_ram;     /* CPPI state */
+
+        struct cppi_descriptor  *freelist;
+
+        /* BD management fields */
+        struct cppi_descriptor  *head;
+        struct cppi_descriptor  *tail;
+        struct cppi_descriptor  *last_processed;
+
+        /* use tx_complete in host role to track endpoints waiting for
+         * FIFONOTEMPTY to clear.
+         */
+        struct list_head        tx_complete;
+};
+
+/* CPPI DMA controller object */
+struct cppi {
+        struct dma_controller           controller;
+        struct musb                     *musb;
+        void __iomem                    *mregs;         /* Mentor regs */
+        void __iomem                    *tibase;        /* TI/CPPI regs */
+
+        struct cppi_channel             tx[MUSB_C_NUM_EPT - 1];
+        struct cppi_channel             rx[MUSB_C_NUM_EPR - 1];
+
+        struct dma_pool                 *pool;
+
+        struct list_head                tx_complete;
+};
+
+/* irq handling hook */
+extern void cppi_completion(struct musb *, u32 rx, u32 tx);
+
+#endif                          /* end of ifndef _CPPI_DMA_H_ */
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
new file mode 100644
index 000000000000..75baf181a8cd
--- /dev/null
+++ b/drivers/usb/musb/davinci.c
@@ -0,0 +1,462 @@
+/*
+ * Copyright (C) 2005-2006 by Texas Instruments
+ *
+ * This file is part of the Inventra Controller Driver for Linux.
+ *
+ * The Inventra Controller Driver for Linux is free software; you
+ * can redistribute it and/or modify it under the terms of the GNU
+ * General Public License version 2 as published by the Free Software
+ * Foundation.
+ *
+ * The Inventra Controller Driver for Linux is distributed in
+ * the hope that it will be useful, but WITHOUT ANY WARRANTY;
+ * without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+ * License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with The Inventra Controller Driver for Linux ; if not,
+ * write to the Free Software Foundation, Inc., 59 Temple Place,
+ * Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <asm/arch/hardware.h>
+#include <asm/arch/memory.h>
+#include <asm/arch/gpio.h>
+#include <asm/mach-types.h>
+
+#include "musb_core.h"
+
+#ifdef CONFIG_MACH_DAVINCI_EVM
+#include <asm/arch/i2c-client.h>
+#endif
+
+#include "davinci.h"
+#include "cppi_dma.h"
+
+
+/* REVISIT (PM) we should be able to keep the PHY in low power mode most
+ * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
+ * and, when in host mode, autosuspending idle root ports... PHYPLLON
+ * (overriding SUSPENDM?) then likely needs to stay off.
+ */
+
+static inline void phy_on(void)
+{
+        /* start the on-chip PHY and its PLL */
+        __raw_writel(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON,
+                        (void __force __iomem *) IO_ADDRESS(USBPHY_CTL_PADDR));
+        while ((__raw_readl((void __force __iomem *)
+                                IO_ADDRESS(USBPHY_CTL_PADDR))
+                        & USBPHY_PHYCLKGD) == 0)
+                cpu_relax();
+}
+
+static inline void phy_off(void)
+{
+        /* powerdown the on-chip PHY and its oscillator */
+        __raw_writel(USBPHY_OSCPDWN | USBPHY_PHYPDWN, (void __force __iomem *)
+                        IO_ADDRESS(USBPHY_CTL_PADDR));
+}
+
+static int dma_off = 1;
+
+void musb_platform_enable(struct musb *musb)
+{
+        u32     tmp, old, val;
+
+        /* workaround:  setup irqs through both register sets */
+        tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
+                        << DAVINCI_USB_TXINT_SHIFT;
+        musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
+        old = tmp;
+        tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
+                        << DAVINCI_USB_RXINT_SHIFT;
+        musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
+        tmp |= old;
+
+        val = ~MUSB_INTR_SOF;
+        tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
+        musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
+
+        if (is_dma_capable() && !dma_off)
+                printk(KERN_WARNING "%s %s: dma not reactivated\n",
+                                __FILE__, __func__);
+        else
+                dma_off = 0;
+
+        /* force a DRVVBUS irq so we can start polling for ID change */
+        if (is_otg_enabled(musb))
+                musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
+                        DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
+}
+
+/*
+ * Disable the HDRC and flush interrupts
+ */
+void musb_platform_disable(struct musb *musb)
+{
+        /* because we don't set CTRLR.UINT, "important" to:
+         *  - not read/write INTRUSB/INTRUSBE
+         *  - (except during initial setup, as workaround)
+         *  - use INTSETR/INTCLRR instead
+         */
+        musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG,
+                          DAVINCI_USB_USBINT_MASK
+                        | DAVINCI_USB_TXINT_MASK
+                        | DAVINCI_USB_RXINT_MASK);
+        musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
+        musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
+
+        if (is_dma_capable() && !dma_off)
+                WARNING("dma still active\n");
+}
+
+
+/* REVISIT it's not clear whether DaVinci can support full OTG.  */
+
+static int vbus_state = -1;
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+#define portstate(stmt)         stmt
+#else
+#define portstate(stmt)
+#endif
+
+
+/* VBUS SWITCHING IS BOARD-SPECIFIC */
+
+#ifdef CONFIG_MACH_DAVINCI_EVM
+#ifndef CONFIG_MACH_DAVINCI_EVM_OTG
+
+/* I2C operations are always synchronous, and require a task context.
+ * With unloaded systems, using the shared workqueue seems to suffice
+ * to satisfy the 100msec A_WAIT_VRISE timeout...
+ */
+static void evm_deferred_drvvbus(struct work_struct *ignored)
+{
+        davinci_i2c_expander_op(0x3a, USB_DRVVBUS, vbus_state);
+        vbus_state = !vbus_state;
+}
+static DECLARE_WORK(evm_vbus_work, evm_deferred_drvvbus);
+
+#endif  /* modified board */
+#endif  /* EVM */
+
+static void davinci_source_power(struct musb *musb, int is_on, int immediate)
+{
+        if (is_on)
+                is_on = 1;
+
+        if (vbus_state == is_on)
+                return;
+        vbus_state = !is_on;            /* 0/1 vs "-1 == unknown/init" */
+
+#ifdef CONFIG_MACH_DAVINCI_EVM
+        if (machine_is_davinci_evm()) {
+#ifdef CONFIG_MACH_DAVINCI_EVM_OTG
+                /* modified EVM board switching VBUS with GPIO(6) not I2C
+                 * NOTE:  PINMUX0.RGB888 (bit23) must be clear
+                 */
+                if (is_on)
+                        gpio_set(GPIO(6));
+                else
+                        gpio_clear(GPIO(6));
+                immediate = 1;
+#else
+                if (immediate)
+                        davinci_i2c_expander_op(0x3a, USB_DRVVBUS, !is_on);
+                else
+                        schedule_work(&evm_vbus_work);
+#endif
+        }
+#endif
+        if (immediate)
+                vbus_state = is_on;
+}
+
+static void davinci_set_vbus(struct musb *musb, int is_on)
+{
+        WARN_ON(is_on && is_peripheral_active(musb));
+        davinci_source_power(musb, is_on, 0);
+}
+
+
+#define POLL_SECONDS    2
+
+static struct timer_list otg_workaround;
+
+static void otg_timer(unsigned long _musb)
+{
+        struct musb             *musb = (void *)_musb;
+        void __iomem            *mregs = musb->mregs;
+        u8                      devctl;
+        unsigned long           flags;
+
+        /* We poll because DaVinci's won't expose several OTG-critical
+        * status change events (from the transceiver) otherwise.
+         */
+        devctl = musb_readb(mregs, MUSB_DEVCTL);
+        DBG(7, "poll devctl %02x (%s)\n", devctl, otg_state_string(musb));
+
+        spin_lock_irqsave(&musb->lock, flags);
+        switch (musb->xceiv.state) {
+        case OTG_STATE_A_WAIT_VFALL:
+                /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
+                 * seems to mis-handle session "start" otherwise (or in our
+                 * case "recover"), in routine "VBUS was valid by the time
+                 * VBUSERR got reported during enumeration" cases.
+                 */
+                if (devctl & MUSB_DEVCTL_VBUS) {
+                        mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
+                        break;
+                }
+                musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
+                musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
+                        MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
+                break;
+        case OTG_STATE_B_IDLE:
+                if (!is_peripheral_enabled(musb))
+                        break;
+
+                /* There's no ID-changed IRQ, so we have no good way to tell
+                 * when to switch to the A-Default state machine (by setting
+                 * the DEVCTL.SESSION flag).
+                 *
+                 * Workaround:  whenever we're in B_IDLE, try setting the
+                 * session flag every few seconds.  If it works, ID was
+                 * grounded and we're now in the A-Default state machine.
+                 *
+                 * NOTE setting the session flag is _supposed_ to trigger
+                 * SRP, but clearly it doesn't.
+                 */
+                musb_writeb(mregs, MUSB_DEVCTL,
+                                devctl | MUSB_DEVCTL_SESSION);
+                devctl = musb_readb(mregs, MUSB_DEVCTL);
+                if (devctl & MUSB_DEVCTL_BDEVICE)
+                        mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
+                else
+                        musb->xceiv.state = OTG_STATE_A_IDLE;
+                break;
+        default:
+                break;
+        }
+        spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+static irqreturn_t davinci_interrupt(int irq, void *__hci)
+{
+        unsigned long   flags;
+        irqreturn_t     retval = IRQ_NONE;
+        struct musb     *musb = __hci;
+        void __iomem    *tibase = musb->ctrl_base;
+        u32             tmp;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        /* NOTE: DaVinci shadows the Mentor IRQs.  Don't manage them through
+         * the Mentor registers (except for setup), use the TI ones and EOI.
+         *
+         * Docs describe irq "vector" registers asociated with the CPPI and
+         * USB EOI registers.  These hold a bitmask corresponding to the
+         * current IRQ, not an irq handler address.  Would using those bits
+         * resolve some of the races observed in this dispatch code??
+         */
+
+        /* CPPI interrupts share the same IRQ line, but have their own
+         * mask, state, "vector", and EOI registers.
+         */
+        if (is_cppi_enabled()) {
+                u32 cppi_tx = musb_readl(tibase, DAVINCI_TXCPPI_MASKED_REG);
+                u32 cppi_rx = musb_readl(tibase, DAVINCI_RXCPPI_MASKED_REG);
+
+                if (cppi_tx || cppi_rx) {
+                        DBG(4, "CPPI IRQ t%x r%x\n", cppi_tx, cppi_rx);
+                        cppi_completion(musb, cppi_rx, cppi_tx);
+                        retval = IRQ_HANDLED;
+                }
+        }
+
+        /* ack and handle non-CPPI interrupts */
+        tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
+        musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);
+        DBG(4, "IRQ %08x\n", tmp);
+
+        musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
+                        >> DAVINCI_USB_RXINT_SHIFT;
+        musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
+                        >> DAVINCI_USB_TXINT_SHIFT;
+        musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
+                        >> DAVINCI_USB_USBINT_SHIFT;
+
+        /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
+         * DaVinci's missing ID change IRQ.  We need an ID change IRQ to
+         * switch appropriately between halves of the OTG state machine.
+         * Managing DEVCTL.SESSION per Mentor docs requires we know its
+         * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
+         * Also, DRVVBUS pulses for SRP (but not at 5V) ...
+         */
+        if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
+                int     drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
+                void __iomem *mregs = musb->mregs;
+                u8      devctl = musb_readb(mregs, MUSB_DEVCTL);
+                int     err = musb->int_usb & MUSB_INTR_VBUSERROR;
+
+                err = is_host_enabled(musb)
+                                && (musb->int_usb & MUSB_INTR_VBUSERROR);
+                if (err) {
+                        /* The Mentor core doesn't debounce VBUS as needed
+                         * to cope with device connect current spikes. This
+                         * means it's not uncommon for bus-powered devices
+                         * to get VBUS errors during enumeration.
+                         *
+                         * This is a workaround, but newer RTL from Mentor
+                         * seems to allow a better one: "re"starting sessions
+                         * without waiting (on EVM, a **long** time) for VBUS
+                         * to stop registering in devctl.
+                         */
+                        musb->int_usb &= ~MUSB_INTR_VBUSERROR;
+                        musb->xceiv.state = OTG_STATE_A_WAIT_VFALL;
+                        mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
+                        WARNING("VBUS error workaround (delay coming)\n");
+                } else if (is_host_enabled(musb) && drvvbus) {
+                        musb->is_active = 1;
+                        MUSB_HST_MODE(musb);
+                        musb->xceiv.default_a = 1;
+                        musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
+                        portstate(musb->port1_status |= USB_PORT_STAT_POWER);
+                        del_timer(&otg_workaround);
+                } else {
+                        musb->is_active = 0;
+                        MUSB_DEV_MODE(musb);
+                        musb->xceiv.default_a = 0;
+                        musb->xceiv.state = OTG_STATE_B_IDLE;
+                        portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
+                }
+
+                /* NOTE:  this must complete poweron within 100 msec */
+                davinci_source_power(musb, drvvbus, 0);
+                DBG(2, "VBUS %s (%s)%s, devctl %02x\n",
+                                drvvbus ? "on" : "off",
+                                otg_state_string(musb),
+                                err ? " ERROR" : "",
+                                devctl);
+                retval = IRQ_HANDLED;
+        }
+
+        if (musb->int_tx || musb->int_rx || musb->int_usb)
+                retval |= musb_interrupt(musb);
+
+        /* irq stays asserted until EOI is written */
+        musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
+
+        /* poll for ID change */
+        if (is_otg_enabled(musb)
+                        && musb->xceiv.state == OTG_STATE_B_IDLE)
+                mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        /* REVISIT we sometimes get unhandled IRQs
+         * (e.g. ep0).  not clear why...
+         */
+        if (retval != IRQ_HANDLED)
+                DBG(5, "unhandled? %08x\n", tmp);
+        return IRQ_HANDLED;
+}
+
+int __init musb_platform_init(struct musb *musb)
+{
+        void __iomem    *tibase = musb->ctrl_base;
+        u32             revision;
+
+        musb->mregs += DAVINCI_BASE_OFFSET;
+#if 0
+        /* REVISIT there's something odd about clocking, this
+         * didn't appear do the job ...
+         */
+        musb->clock = clk_get(pDevice, "usb");
+        if (IS_ERR(musb->clock))
+                return PTR_ERR(musb->clock);
+
+        status = clk_enable(musb->clock);
+        if (status < 0)
+                return -ENODEV;
+#endif
+
+        /* returns zero if e.g. not clocked */
+        revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
+        if (revision == 0)
+                return -ENODEV;
+
+        if (is_host_enabled(musb))
+                setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
+
+        musb->board_set_vbus = davinci_set_vbus;
+        davinci_source_power(musb, 0, 1);
+
+        /* reset the controller */
+        musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
+
+        /* start the on-chip PHY and its PLL */
+        phy_on();
+
+        msleep(5);
+
+        /* NOTE:  irqs are in mixed mode, not bypass to pure-musb */
+        pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
+                revision, __raw_readl((void __force __iomem *)
+                                IO_ADDRESS(USBPHY_CTL_PADDR)),
+                musb_readb(tibase, DAVINCI_USB_CTRL_REG));
+
+        musb->isr = davinci_interrupt;
+        return 0;
+}
+
+int musb_platform_exit(struct musb *musb)
+{
+        if (is_host_enabled(musb))
+                del_timer_sync(&otg_workaround);
+
+        davinci_source_power(musb, 0 /*off*/, 1);
+
+        /* delay, to avoid problems with module reload */
+        if (is_host_enabled(musb) && musb->xceiv.default_a) {
+                int     maxdelay = 30;
+                u8      devctl, warn = 0;
+
+                /* if there's no peripheral connected, this can take a
+                 * long time to fall, especially on EVM with huge C133.
+                 */
+                do {
+                        devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+                        if (!(devctl & MUSB_DEVCTL_VBUS))
+                                break;
+                        if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
+                                warn = devctl & MUSB_DEVCTL_VBUS;
+                                DBG(1, "VBUS %d\n",
+                                        warn >> MUSB_DEVCTL_VBUS_SHIFT);
+                        }
+                        msleep(1000);
+                        maxdelay--;
+                } while (maxdelay > 0);
+
+                /* in OTG mode, another host might be connected */
+                if (devctl & MUSB_DEVCTL_VBUS)
+                        DBG(1, "VBUS off timeout (devctl %02x)\n", devctl);
+        }
+
+        phy_off();
+        return 0;
+}
diff --git a/drivers/usb/musb/davinci.h b/drivers/usb/musb/davinci.h
new file mode 100644
index 000000000000..7fb6238e270f
--- /dev/null
+++ b/drivers/usb/musb/davinci.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2005-2006 by Texas Instruments
+ *
+ * The Inventra Controller Driver for Linux is free software; you
+ * can redistribute it and/or modify it under the terms of the GNU
+ * General Public License version 2 as published by the Free Software
+ * Foundation.
+ */
+
+#ifndef __MUSB_HDRDF_H__
+#define __MUSB_HDRDF_H__
+
+/*
+ * DaVinci-specific definitions
+ */
+
+/* Integrated highspeed/otg PHY */
+#define USBPHY_CTL_PADDR        (DAVINCI_SYSTEM_MODULE_BASE + 0x34)
+#define USBPHY_PHYCLKGD         (1 << 8)
+#define USBPHY_SESNDEN          (1 << 7)        /* v(sess_end) comparator */
+#define USBPHY_VBDTCTEN         (1 << 6)        /* v(bus) comparator */
+#define USBPHY_PHYPLLON         (1 << 4)        /* override pll suspend */
+#define USBPHY_CLKO1SEL         (1 << 3)
+#define USBPHY_OSCPDWN          (1 << 2)
+#define USBPHY_PHYPDWN          (1 << 0)
+
+/* For now include usb OTG module registers here */
+#define DAVINCI_USB_VERSION_REG         0x00
+#define DAVINCI_USB_CTRL_REG            0x04
+#define DAVINCI_USB_STAT_REG            0x08
+#define DAVINCI_RNDIS_REG               0x10
+#define DAVINCI_AUTOREQ_REG             0x14
+#define DAVINCI_USB_INT_SOURCE_REG      0x20
+#define DAVINCI_USB_INT_SET_REG         0x24
+#define DAVINCI_USB_INT_SRC_CLR_REG     0x28
+#define DAVINCI_USB_INT_MASK_REG        0x2c
+#define DAVINCI_USB_INT_MASK_SET_REG    0x30
+#define DAVINCI_USB_INT_MASK_CLR_REG    0x34
+#define DAVINCI_USB_INT_SRC_MASKED_REG  0x38
+#define DAVINCI_USB_EOI_REG             0x3c
+#define DAVINCI_USB_EOI_INTVEC          0x40
+
+/* BEGIN CPPI-generic (?) */
+
+/* CPPI related registers */
+#define DAVINCI_TXCPPI_CTRL_REG         0x80
+#define DAVINCI_TXCPPI_TEAR_REG         0x84
+#define DAVINCI_CPPI_EOI_REG            0x88
+#define DAVINCI_CPPI_INTVEC_REG         0x8c
+#define DAVINCI_TXCPPI_MASKED_REG       0x90
+#define DAVINCI_TXCPPI_RAW_REG          0x94
+#define DAVINCI_TXCPPI_INTENAB_REG      0x98
+#define DAVINCI_TXCPPI_INTCLR_REG       0x9c
+
+#define DAVINCI_RXCPPI_CTRL_REG         0xC0
+#define DAVINCI_RXCPPI_MASKED_REG       0xD0
+#define DAVINCI_RXCPPI_RAW_REG          0xD4
+#define DAVINCI_RXCPPI_INTENAB_REG      0xD8
+#define DAVINCI_RXCPPI_INTCLR_REG       0xDC
+
+#define DAVINCI_RXCPPI_BUFCNT0_REG      0xE0
+#define DAVINCI_RXCPPI_BUFCNT1_REG      0xE4
+#define DAVINCI_RXCPPI_BUFCNT2_REG      0xE8
+#define DAVINCI_RXCPPI_BUFCNT3_REG      0xEC
+
+/* CPPI state RAM entries */
+#define DAVINCI_CPPI_STATERAM_BASE_OFFSET   0x100
+
+#define DAVINCI_TXCPPI_STATERAM_OFFSET(chnum) \
+        (DAVINCI_CPPI_STATERAM_BASE_OFFSET +       ((chnum) * 0x40))
+#define DAVINCI_RXCPPI_STATERAM_OFFSET(chnum) \
+        (DAVINCI_CPPI_STATERAM_BASE_OFFSET + 0x20 + ((chnum) * 0x40))
+
+/* CPPI masks */
+#define DAVINCI_DMA_CTRL_ENABLE         1
+#define DAVINCI_DMA_CTRL_DISABLE        0
+
+#define DAVINCI_DMA_ALL_CHANNELS_ENABLE 0xF
+#define DAVINCI_DMA_ALL_CHANNELS_DISABLE 0xF
+
+/* END CPPI-generic (?) */
+
+#define DAVINCI_USB_TX_ENDPTS_MASK      0x1f            /* ep0 + 4 tx */
+#define DAVINCI_USB_RX_ENDPTS_MASK      0x1e            /* 4 rx */
+
+#define DAVINCI_USB_USBINT_SHIFT        16
+#define DAVINCI_USB_TXINT_SHIFT         0
+#define DAVINCI_USB_RXINT_SHIFT         8
+
+#define DAVINCI_INTR_DRVVBUS            0x0100
+
+#define DAVINCI_USB_USBINT_MASK         0x01ff0000      /* 8 Mentor, DRVVBUS */
+#define DAVINCI_USB_TXINT_MASK \
+        (DAVINCI_USB_TX_ENDPTS_MASK << DAVINCI_USB_TXINT_SHIFT)
+#define DAVINCI_USB_RXINT_MASK \
+        (DAVINCI_USB_RX_ENDPTS_MASK << DAVINCI_USB_RXINT_SHIFT)
+
+#define DAVINCI_BASE_OFFSET             0x400
+
+#endif  /* __MUSB_HDRDF_H__ */
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
new file mode 100644
index 000000000000..d68ec6daf335
--- /dev/null
+++ b/drivers/usb/musb/musb_core.c
@@ -0,0 +1,2261 @@
+/*
+ * MUSB OTG driver core code
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * Inventra (Multipoint) Dual-Role Controller Driver for Linux.
+ *
+ * This consists of a Host Controller Driver (HCD) and a peripheral
+ * controller driver implementing the "Gadget" API; OTG support is
+ * in the works.  These are normal Linux-USB controller drivers which
+ * use IRQs and have no dedicated thread.
+ *
+ * This version of the driver has only been used with products from
+ * Texas Instruments.  Those products integrate the Inventra logic
+ * with other DMA, IRQ, and bus modules, as well as other logic that
+ * needs to be reflected in this driver.
+ *
+ *
+ * NOTE:  the original Mentor code here was pretty much a collection
+ * of mechanisms that don't seem to have been fully integrated/working
+ * for *any* Linux kernel version.  This version aims at Linux 2.6.now,
+ * Key open issues include:
+ *
+ *  - Lack of host-side transaction scheduling, for all transfer types.
+ *    The hardware doesn't do it; instead, software must.
+ *
+ *    This is not an issue for OTG devices that don't support external
+ *    hubs, but for more "normal" USB hosts it's a user issue that the
+ *    "multipoint" support doesn't scale in the expected ways.  That
+ *    includes DaVinci EVM in a common non-OTG mode.
+ *
+ *      * Control and bulk use dedicated endpoints, and there's as
+ *        yet no mechanism to either (a) reclaim the hardware when
+ *        peripherals are NAKing, which gets complicated with bulk
+ *        endpoints, or (b) use more than a single bulk endpoint in
+ *        each direction.
+ *
+ *        RESULT:  one device may be perceived as blocking another one.
+ *
+ *      * Interrupt and isochronous will dynamically allocate endpoint
+ *        hardware, but (a) there's no record keeping for bandwidth;
+ *        (b) in the common case that few endpoints are available, there
+ *        is no mechanism to reuse endpoints to talk to multiple devices.
+ *
+ *        RESULT:  At one extreme, bandwidth can be overcommitted in
+ *        some hardware configurations, no faults will be reported.
+ *        At the other extreme, the bandwidth capabilities which do
+ *        exist tend to be severely undercommitted.  You can't yet hook
+ *        up both a keyboard and a mouse to an external USB hub.
+ */
+
+/*
+ * This gets many kinds of configuration information:
+ *      - Kconfig for everything user-configurable
+ *      - <asm/arch/hdrc_cnf.h> for SOC or family details
+ *      - platform_device for addressing, irq, and platform_data
+ *      - platform_data is mostly for board-specific informarion
+ *
+ * Most of the conditional compilation will (someday) vanish.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/kobject.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#ifdef  CONFIG_ARM
+#include <asm/arch/hardware.h>
+#include <asm/arch/memory.h>
+#include <asm/mach-types.h>
+#endif
+
+#include "musb_core.h"
+
+
+#ifdef CONFIG_ARCH_DAVINCI
+#include "davinci.h"
+#endif
+
+
+
+#if MUSB_DEBUG > 0
+unsigned debug = MUSB_DEBUG;
+module_param(debug, uint, 0);
+MODULE_PARM_DESC(debug, "initial debug message level");
+
+#define MUSB_VERSION_SUFFIX     "/dbg"
+#endif
+
+#define DRIVER_AUTHOR "Mentor Graphics, Texas Instruments, Nokia"
+#define DRIVER_DESC "Inventra Dual-Role USB Controller Driver"
+
+#define MUSB_VERSION_BASE "6.0"
+
+#ifndef MUSB_VERSION_SUFFIX
+#define MUSB_VERSION_SUFFIX     ""
+#endif
+#define MUSB_VERSION    MUSB_VERSION_BASE MUSB_VERSION_SUFFIX
+
+#define DRIVER_INFO DRIVER_DESC ", v" MUSB_VERSION
+
+#define MUSB_DRIVER_NAME "musb_hdrc"
+const char musb_driver_name[] = MUSB_DRIVER_NAME;
+
+MODULE_DESCRIPTION(DRIVER_INFO);
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" MUSB_DRIVER_NAME);
+
+
+/*-------------------------------------------------------------------------*/
+
+static inline struct musb *dev_to_musb(struct device *dev)
+{
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        /* usbcore insists dev->driver_data is a "struct hcd *" */
+        return hcd_to_musb(dev_get_drvdata(dev));
+#else
+        return dev_get_drvdata(dev);
+#endif
+}
+
+/*-------------------------------------------------------------------------*/
+
+#ifndef CONFIG_USB_TUSB6010
+/*
+ * Load an endpoint's FIFO
+ */
+void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
+{
+        void __iomem *fifo = hw_ep->fifo;
+
+        prefetch((u8 *)src);
+
+        DBG(4, "%cX ep%d fifo %p count %d buf %p\n",
+                        'T', hw_ep->epnum, fifo, len, src);
+
+        /* we can't assume unaligned reads work */
+        if (likely((0x01 & (unsigned long) src) == 0)) {
+                u16     index = 0;
+
+                /* best case is 32bit-aligned source address */
+                if ((0x02 & (unsigned long) src) == 0) {
+                        if (len >= 4) {
+                                writesl(fifo, src + index, len >> 2);
+                                index += len & ~0x03;
+                        }
+                        if (len & 0x02) {
+                                musb_writew(fifo, 0, *(u16 *)&src[index]);
+                                index += 2;
+                        }
+                } else {
+                        if (len >= 2) {
+                                writesw(fifo, src + index, len >> 1);
+                                index += len & ~0x01;
+                        }
+                }
+                if (len & 0x01)
+                        musb_writeb(fifo, 0, src[index]);
+        } else  {
+                /* byte aligned */
+                writesb(fifo, src, len);
+        }
+}
+
+/*
+ * Unload an endpoint's FIFO
+ */
+void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
+{
+        void __iomem *fifo = hw_ep->fifo;
+
+        DBG(4, "%cX ep%d fifo %p count %d buf %p\n",
+                        'R', hw_ep->epnum, fifo, len, dst);
+
+        /* we can't assume unaligned writes work */
+        if (likely((0x01 & (unsigned long) dst) == 0)) {
+                u16     index = 0;
+
+                /* best case is 32bit-aligned destination address */
+                if ((0x02 & (unsigned long) dst) == 0) {
+                        if (len >= 4) {
+                                readsl(fifo, dst, len >> 2);
+                                index = len & ~0x03;
+                        }
+                        if (len & 0x02) {
+                                *(u16 *)&dst[index] = musb_readw(fifo, 0);
+                                index += 2;
+                        }
+                } else {
+                        if (len >= 2) {
+                                readsw(fifo, dst, len >> 1);
+                                index = len & ~0x01;
+                        }
+                }
+                if (len & 0x01)
+                        dst[index] = musb_readb(fifo, 0);
+        } else  {
+                /* byte aligned */
+                readsb(fifo, dst, len);
+        }
+}
+
+#endif  /* normal PIO */
+
+
+/*-------------------------------------------------------------------------*/
+
+/* for high speed test mode; see USB 2.0 spec 7.1.20 */
+static const u8 musb_test_packet[53] = {
+        /* implicit SYNC then DATA0 to start */
+
+        /* JKJKJKJK x9 */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* JJKKJJKK x8 */
+        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+        /* JJJJKKKK x8 */
+        0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
+        /* JJJJJJJKKKKKKK x8 */
+        0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        /* JJJJJJJK x8 */
+        0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
+        /* JKKKKKKK x10, JK */
+        0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e
+
+        /* implicit CRC16 then EOP to end */
+};
+
+void musb_load_testpacket(struct musb *musb)
+{
+        void __iomem    *regs = musb->endpoints[0].regs;
+
+        musb_ep_select(musb->mregs, 0);
+        musb_write_fifo(musb->control_ep,
+                        sizeof(musb_test_packet), musb_test_packet);
+        musb_writew(regs, MUSB_CSR0, MUSB_CSR0_TXPKTRDY);
+}
+
+/*-------------------------------------------------------------------------*/
+
+const char *otg_state_string(struct musb *musb)
+{
+        switch (musb->xceiv.state) {
+        case OTG_STATE_A_IDLE:          return "a_idle";
+        case OTG_STATE_A_WAIT_VRISE:    return "a_wait_vrise";
+        case OTG_STATE_A_WAIT_BCON:     return "a_wait_bcon";
+        case OTG_STATE_A_HOST:          return "a_host";
+        case OTG_STATE_A_SUSPEND:       return "a_suspend";
+        case OTG_STATE_A_PERIPHERAL:    return "a_peripheral";
+        case OTG_STATE_A_WAIT_VFALL:    return "a_wait_vfall";
+        case OTG_STATE_A_VBUS_ERR:      return "a_vbus_err";
+        case OTG_STATE_B_IDLE:          return "b_idle";
+        case OTG_STATE_B_SRP_INIT:      return "b_srp_init";
+        case OTG_STATE_B_PERIPHERAL:    return "b_peripheral";
+        case OTG_STATE_B_WAIT_ACON:     return "b_wait_acon";
+        case OTG_STATE_B_HOST:          return "b_host";
+        default:                        return "UNDEFINED";
+        }
+}
+
+#ifdef  CONFIG_USB_MUSB_OTG
+
+/*
+ * See also USB_OTG_1-3.pdf 6.6.5 Timers
+ * REVISIT: Are the other timers done in the hardware?
+ */
+#define TB_ASE0_BRST            100     /* Min 3.125 ms */
+
+/*
+ * Handles OTG hnp timeouts, such as b_ase0_brst
+ */
+void musb_otg_timer_func(unsigned long data)
+{
+        struct musb     *musb = (struct musb *)data;
+        unsigned long   flags;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        switch (musb->xceiv.state) {
+        case OTG_STATE_B_WAIT_ACON:
+                DBG(1, "HNP: b_wait_acon timeout; back to b_peripheral\n");
+                musb_g_disconnect(musb);
+                musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
+                musb->is_active = 0;
+                break;
+        case OTG_STATE_A_WAIT_BCON:
+                DBG(1, "HNP: a_wait_bcon timeout; back to a_host\n");
+                musb_hnp_stop(musb);
+                break;
+        default:
+                DBG(1, "HNP: Unhandled mode %s\n", otg_state_string(musb));
+        }
+        musb->ignore_disconnect = 0;
+        spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+static DEFINE_TIMER(musb_otg_timer, musb_otg_timer_func, 0, 0);
+
+/*
+ * Stops the B-device HNP state. Caller must take care of locking.
+ */
+void musb_hnp_stop(struct musb *musb)
+{
+        struct usb_hcd  *hcd = musb_to_hcd(musb);
+        void __iomem    *mbase = musb->mregs;
+        u8      reg;
+
+        switch (musb->xceiv.state) {
+        case OTG_STATE_A_PERIPHERAL:
+        case OTG_STATE_A_WAIT_VFALL:
+        case OTG_STATE_A_WAIT_BCON:
+                DBG(1, "HNP: Switching back to A-host\n");
+                musb_g_disconnect(musb);
+                musb->xceiv.state = OTG_STATE_A_IDLE;
+                MUSB_HST_MODE(musb);
+                musb->is_active = 0;
+                break;
+        case OTG_STATE_B_HOST:
+                DBG(1, "HNP: Disabling HR\n");
+                hcd->self.is_b_host = 0;
+                musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
+                MUSB_DEV_MODE(musb);
+                reg = musb_readb(mbase, MUSB_POWER);
+                reg |= MUSB_POWER_SUSPENDM;
+                musb_writeb(mbase, MUSB_POWER, reg);
+                /* REVISIT: Start SESSION_REQUEST here? */
+                break;
+        default:
+                DBG(1, "HNP: Stopping in unknown state %s\n",
+                        otg_state_string(musb));
+        }
+
+        /*
+         * When returning to A state after HNP, avoid hub_port_rebounce(),
+         * which cause occasional OPT A "Did not receive reset after connect"
+         * errors.
+         */
+        musb->port1_status &=
+                ~(1 << USB_PORT_FEAT_C_CONNECTION);
+}
+
+#endif
+
+/*
+ * Interrupt Service Routine to record USB "global" interrupts.
+ * Since these do not happen often and signify things of
+ * paramount importance, it seems OK to check them individually;
+ * the order of the tests is specified in the manual
+ *
+ * @param musb instance pointer
+ * @param int_usb register contents
+ * @param devctl
+ * @param power
+ */
+
+#define STAGE0_MASK (MUSB_INTR_RESUME | MUSB_INTR_SESSREQ \
+                | MUSB_INTR_VBUSERROR | MUSB_INTR_CONNECT \
+                | MUSB_INTR_RESET)
+
+static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
+                                u8 devctl, u8 power)
+{
+        irqreturn_t handled = IRQ_NONE;
+        void __iomem *mbase = musb->mregs;
+
+        DBG(3, "<== Power=%02x, DevCtl=%02x, int_usb=0x%x\n", power, devctl,
+                int_usb);
+
+        /* in host mode, the peripheral may issue remote wakeup.
+         * in peripheral mode, the host may resume the link.
+         * spurious RESUME irqs happen too, paired with SUSPEND.
+         */
+        if (int_usb & MUSB_INTR_RESUME) {
+                handled = IRQ_HANDLED;
+                DBG(3, "RESUME (%s)\n", otg_state_string(musb));
+
+                if (devctl & MUSB_DEVCTL_HM) {
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+                        switch (musb->xceiv.state) {
+                        case OTG_STATE_A_SUSPEND:
+                                /* remote wakeup?  later, GetPortStatus
+                                 * will stop RESUME signaling
+                                 */
+
+                                if (power & MUSB_POWER_SUSPENDM) {
+                                        /* spurious */
+                                        musb->int_usb &= ~MUSB_INTR_SUSPEND;
+                                        DBG(2, "Spurious SUSPENDM\n");
+                                        break;
+                                }
+
+                                power &= ~MUSB_POWER_SUSPENDM;
+                                musb_writeb(mbase, MUSB_POWER,
+                                                power | MUSB_POWER_RESUME);
+
+                                musb->port1_status |=
+                                                (USB_PORT_STAT_C_SUSPEND << 16)
+                                                | MUSB_PORT_STAT_RESUME;
+                                musb->rh_timer = jiffies
+                                                + msecs_to_jiffies(20);
+
+                                musb->xceiv.state = OTG_STATE_A_HOST;
+                                musb->is_active = 1;
+                                usb_hcd_resume_root_hub(musb_to_hcd(musb));
+                                break;
+                        case OTG_STATE_B_WAIT_ACON:
+                                musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
+                                musb->is_active = 1;
+                                MUSB_DEV_MODE(musb);
+                                break;
+                        default:
+                                WARNING("bogus %s RESUME (%s)\n",
+                                        "host",
+                                        otg_state_string(musb));
+                        }
+#endif
+                } else {
+                        switch (musb->xceiv.state) {
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+                        case OTG_STATE_A_SUSPEND:
+                                /* possibly DISCONNECT is upcoming */
+                                musb->xceiv.state = OTG_STATE_A_HOST;
+                                usb_hcd_resume_root_hub(musb_to_hcd(musb));
+                                break;
+#endif
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+                        case OTG_STATE_B_WAIT_ACON:
+                        case OTG_STATE_B_PERIPHERAL:
+                                /* disconnect while suspended?  we may
+                                 * not get a disconnect irq...
+                                 */
+                                if ((devctl & MUSB_DEVCTL_VBUS)
+                                                != (3 << MUSB_DEVCTL_VBUS_SHIFT)
+                                                ) {
+                                        musb->int_usb |= MUSB_INTR_DISCONNECT;
+                                        musb->int_usb &= ~MUSB_INTR_SUSPEND;
+                                        break;
+                                }
+                                musb_g_resume(musb);
+                                break;
+                        case OTG_STATE_B_IDLE:
+                                musb->int_usb &= ~MUSB_INTR_SUSPEND;
+                                break;
+#endif
+                        default:
+                                WARNING("bogus %s RESUME (%s)\n",
+                                        "peripheral",
+                                        otg_state_string(musb));
+                        }
+                }
+        }
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        /* see manual for the order of the tests */
+        if (int_usb & MUSB_INTR_SESSREQ) {
+                DBG(1, "SESSION_REQUEST (%s)\n", otg_state_string(musb));
+
+                /* IRQ arrives from ID pin sense or (later, if VBUS power
+                 * is removed) SRP.  responses are time critical:
+                 *  - turn on VBUS (with silicon-specific mechanism)
+                 *  - go through A_WAIT_VRISE
+                 *  - ... to A_WAIT_BCON.
+                 * a_wait_vrise_tmout triggers VBUS_ERROR transitions
+                 */
+                musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
+                musb->ep0_stage = MUSB_EP0_START;
+                musb->xceiv.state = OTG_STATE_A_IDLE;
+                MUSB_HST_MODE(musb);
+                musb_set_vbus(musb, 1);
+
+                handled = IRQ_HANDLED;
+        }
+
+        if (int_usb & MUSB_INTR_VBUSERROR) {
+                int     ignore = 0;
+
+                /* During connection as an A-Device, we may see a short
+                 * current spikes causing voltage drop, because of cable
+                 * and peripheral capacitance combined with vbus draw.
+                 * (So: less common with truly self-powered devices, where
+                 * vbus doesn't act like a power supply.)
+                 *
+                 * Such spikes are short; usually less than ~500 usec, max
+                 * of ~2 msec.  That is, they're not sustained overcurrent
+                 * errors, though they're reported using VBUSERROR irqs.
+                 *
+                 * Workarounds:  (a) hardware: use self powered devices.
+                 * (b) software:  ignore non-repeated VBUS errors.
+                 *
+                 * REVISIT:  do delays from lots of DEBUG_KERNEL checks
+                 * make trouble here, keeping VBUS < 4.4V ?
+                 */
+                switch (musb->xceiv.state) {
+                case OTG_STATE_A_HOST:
+                        /* recovery is dicey once we've gotten past the
+                         * initial stages of enumeration, but if VBUS
+                         * stayed ok at the other end of the link, and
+                         * another reset is due (at least for high speed,
+                         * to redo the chirp etc), it might work OK...
+                         */
+                case OTG_STATE_A_WAIT_BCON:
+                case OTG_STATE_A_WAIT_VRISE:
+                        if (musb->vbuserr_retry) {
+                                musb->vbuserr_retry--;
+                                ignore = 1;
+                                devctl |= MUSB_DEVCTL_SESSION;
+                                musb_writeb(mbase, MUSB_DEVCTL, devctl);
+                        } else {
+                                musb->port1_status |=
+                                          (1 << USB_PORT_FEAT_OVER_CURRENT)
+                                        | (1 << USB_PORT_FEAT_C_OVER_CURRENT);
+                        }
+                        break;
+                default:
+                        break;
+                }
+
+                DBG(1, "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n",
+                                otg_state_string(musb),
+                                devctl,
+                                ({ char *s;
+                                switch (devctl & MUSB_DEVCTL_VBUS) {
+                                case 0 << MUSB_DEVCTL_VBUS_SHIFT:
+                                        s = "<SessEnd"; break;
+                                case 1 << MUSB_DEVCTL_VBUS_SHIFT:
+                                        s = "<AValid"; break;
+                                case 2 << MUSB_DEVCTL_VBUS_SHIFT:
+                                        s = "<VBusValid"; break;
+                                /* case 3 << MUSB_DEVCTL_VBUS_SHIFT: */
+                                default:
+                                        s = "VALID"; break;
+                                }; s; }),
+                                VBUSERR_RETRY_COUNT - musb->vbuserr_retry,
+                                musb->port1_status);
+
+                /* go through A_WAIT_VFALL then start a new session */
+                if (!ignore)
+                        musb_set_vbus(musb, 0);
+                handled = IRQ_HANDLED;
+        }
+
+        if (int_usb & MUSB_INTR_CONNECT) {
+                struct usb_hcd *hcd = musb_to_hcd(musb);
+
+                handled = IRQ_HANDLED;
+                musb->is_active = 1;
+                set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
+
+                musb->ep0_stage = MUSB_EP0_START;
+
+#ifdef CONFIG_USB_MUSB_OTG
+                /* flush endpoints when transitioning from Device Mode */
+                if (is_peripheral_active(musb)) {
+                        /* REVISIT HNP; just force disconnect */
+                }
+                musb_writew(mbase, MUSB_INTRTXE, musb->epmask);
+                musb_writew(mbase, MUSB_INTRRXE, musb->epmask & 0xfffe);
+                musb_writeb(mbase, MUSB_INTRUSBE, 0xf7);
+#endif
+                musb->port1_status &= ~(USB_PORT_STAT_LOW_SPEED
+                                        |USB_PORT_STAT_HIGH_SPEED
+                                        |USB_PORT_STAT_ENABLE
+                                        );
+                musb->port1_status |= USB_PORT_STAT_CONNECTION
+                                        |(USB_PORT_STAT_C_CONNECTION << 16);
+
+                /* high vs full speed is just a guess until after reset */
+                if (devctl & MUSB_DEVCTL_LSDEV)
+                        musb->port1_status |= USB_PORT_STAT_LOW_SPEED;
+
+                if (hcd->status_urb)
+                        usb_hcd_poll_rh_status(hcd);
+                else
+                        usb_hcd_resume_root_hub(hcd);
+
+                MUSB_HST_MODE(musb);
+
+                /* indicate new connection to OTG machine */
+                switch (musb->xceiv.state) {
+                case OTG_STATE_B_PERIPHERAL:
+                        if (int_usb & MUSB_INTR_SUSPEND) {
+                                DBG(1, "HNP: SUSPEND+CONNECT, now b_host\n");
+                                musb->xceiv.state = OTG_STATE_B_HOST;
+                                hcd->self.is_b_host = 1;
+                                int_usb &= ~MUSB_INTR_SUSPEND;
+                        } else
+                                DBG(1, "CONNECT as b_peripheral???\n");
+                        break;
+                case OTG_STATE_B_WAIT_ACON:
+                        DBG(1, "HNP: Waiting to switch to b_host state\n");
+                        musb->xceiv.state = OTG_STATE_B_HOST;
+                        hcd->self.is_b_host = 1;
+                        break;
+                default:
+                        if ((devctl & MUSB_DEVCTL_VBUS)
+                                        == (3 << MUSB_DEVCTL_VBUS_SHIFT)) {
+                                musb->xceiv.state = OTG_STATE_A_HOST;
+                                hcd->self.is_b_host = 0;
+                        }
+                        break;
+                }
+                DBG(1, "CONNECT (%s) devctl %02x\n",
+                                otg_state_string(musb), devctl);
+        }
+#endif  /* CONFIG_USB_MUSB_HDRC_HCD */
+
+        /* mentor saves a bit: bus reset and babble share the same irq.
+         * only host sees babble; only peripheral sees bus reset.
+         */
+        if (int_usb & MUSB_INTR_RESET) {
+                if (is_host_capable() && (devctl & MUSB_DEVCTL_HM) != 0) {
+                        /*
+                         * Looks like non-HS BABBLE can be ignored, but
+                         * HS BABBLE is an error condition. For HS the solution
+                         * is to avoid babble in the first place and fix what
+                         * caused BABBLE. When HS BABBLE happens we can only
+                         * stop the session.
+                         */
+                        if (devctl & (MUSB_DEVCTL_FSDEV | MUSB_DEVCTL_LSDEV))
+                                DBG(1, "BABBLE devctl: %02x\n", devctl);
+                        else {
+                                ERR("Stopping host session -- babble\n");
+                                musb_writeb(mbase, MUSB_DEVCTL, 0);
+                        }
+                } else if (is_peripheral_capable()) {
+                        DBG(1, "BUS RESET as %s\n", otg_state_string(musb));
+                        switch (musb->xceiv.state) {
+#ifdef CONFIG_USB_OTG
+                        case OTG_STATE_A_SUSPEND:
+                                /* We need to ignore disconnect on suspend
+                                 * otherwise tusb 2.0 won't reconnect after a
+                                 * power cycle, which breaks otg compliance.
+                                 */
+                                musb->ignore_disconnect = 1;
+                                musb_g_reset(musb);
+                                /* FALLTHROUGH */
+                        case OTG_STATE_A_WAIT_BCON:     /* OPT TD.4.7-900ms */
+                                DBG(1, "HNP: Setting timer as %s\n",
+                                                otg_state_string(musb));
+                                musb_otg_timer.data = (unsigned long)musb;
+                                mod_timer(&musb_otg_timer, jiffies
+                                        + msecs_to_jiffies(100));
+                                break;
+                        case OTG_STATE_A_PERIPHERAL:
+                                musb_hnp_stop(musb);
+                                break;
+                        case OTG_STATE_B_WAIT_ACON:
+                                DBG(1, "HNP: RESET (%s), to b_peripheral\n",
+                                        otg_state_string(musb));
+                                musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
+                                musb_g_reset(musb);
+                                break;
+#endif
+                        case OTG_STATE_B_IDLE:
+                                musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
+                                /* FALLTHROUGH */
+                        case OTG_STATE_B_PERIPHERAL:
+                                musb_g_reset(musb);
+                                break;
+                        default:
+                                DBG(1, "Unhandled BUS RESET as %s\n",
+                                        otg_state_string(musb));
+                        }
+                }
+
+                handled = IRQ_HANDLED;
+        }
+        schedule_work(&musb->irq_work);
+
+        return handled;
+}
+
+/*
+ * Interrupt Service Routine to record USB "global" interrupts.
+ * Since these do not happen often and signify things of
+ * paramount importance, it seems OK to check them individually;
+ * the order of the tests is specified in the manual
+ *
+ * @param musb instance pointer
+ * @param int_usb register contents
+ * @param devctl
+ * @param power
+ */
+static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb,
+                                u8 devctl, u8 power)
+{
+        irqreturn_t handled = IRQ_NONE;
+
+#if 0
+/* REVISIT ... this would be for multiplexing periodic endpoints, or
+ * supporting transfer phasing to prevent exceeding ISO bandwidth
+ * limits of a given frame or microframe.
+ *
+ * It's not needed for peripheral side, which dedicates endpoints;
+ * though it _might_ use SOF irqs for other purposes.
+ *
+ * And it's not currently needed for host side, which also dedicates
+ * endpoints, relies on TX/RX interval registers, and isn't claimed
+ * to support ISO transfers yet.
+ */
+        if (int_usb & MUSB_INTR_SOF) {
+                void __iomem *mbase = musb->mregs;
+                struct musb_hw_ep       *ep;
+                u8 epnum;
+                u16 frame;
+
+                DBG(6, "START_OF_FRAME\n");
+                handled = IRQ_HANDLED;
+
+                /* start any periodic Tx transfers waiting for current frame */
+                frame = musb_readw(mbase, MUSB_FRAME);
+                ep = musb->endpoints;
+                for (epnum = 1; (epnum < musb->nr_endpoints)
+                                        && (musb->epmask >= (1 << epnum));
+                                epnum++, ep++) {
+                        /*
+                         * FIXME handle framecounter wraps (12 bits)
+                         * eliminate duplicated StartUrb logic
+                         */
+                        if (ep->dwWaitFrame >= frame) {
+                                ep->dwWaitFrame = 0;
+                                pr_debug("SOF --> periodic TX%s on %d\n",
+                                        ep->tx_channel ? " DMA" : "",
+                                        epnum);
+                                if (!ep->tx_channel)
+                                        musb_h_tx_start(musb, epnum);
+                                else
+                                        cppi_hostdma_start(musb, epnum);
+                        }
+                }               /* end of for loop */
+        }
+#endif
+
+        if ((int_usb & MUSB_INTR_DISCONNECT) && !musb->ignore_disconnect) {
+                DBG(1, "DISCONNECT (%s) as %s, devctl %02x\n",
+                                otg_state_string(musb),
+                                MUSB_MODE(musb), devctl);
+                handled = IRQ_HANDLED;
+
+                switch (musb->xceiv.state) {
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+                case OTG_STATE_A_HOST:
+                case OTG_STATE_A_SUSPEND:
+                        musb_root_disconnect(musb);
+                        if (musb->a_wait_bcon != 0)
+                                musb_platform_try_idle(musb, jiffies
+                                        + msecs_to_jiffies(musb->a_wait_bcon));
+                        break;
+#endif  /* HOST */
+#ifdef CONFIG_USB_MUSB_OTG
+                case OTG_STATE_B_HOST:
+                        musb_hnp_stop(musb);
+                        break;
+                case OTG_STATE_A_PERIPHERAL:
+                        musb_hnp_stop(musb);
+                        musb_root_disconnect(musb);
+                        /* FALLTHROUGH */
+                case OTG_STATE_B_WAIT_ACON:
+                        /* FALLTHROUGH */
+#endif  /* OTG */
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+                case OTG_STATE_B_PERIPHERAL:
+                case OTG_STATE_B_IDLE:
+                        musb_g_disconnect(musb);
+                        break;
+#endif  /* GADGET */
+                default:
+                        WARNING("unhandled DISCONNECT transition (%s)\n",
+                                otg_state_string(musb));
+                        break;
+                }
+
+                schedule_work(&musb->irq_work);
+        }
+
+        if (int_usb & MUSB_INTR_SUSPEND) {
+                DBG(1, "SUSPEND (%s) devctl %02x power %02x\n",
+                                otg_state_string(musb), devctl, power);
+                handled = IRQ_HANDLED;
+
+                switch (musb->xceiv.state) {
+#ifdef  CONFIG_USB_MUSB_OTG
+                case OTG_STATE_A_PERIPHERAL:
+                        /*
+                         * We cannot stop HNP here, devctl BDEVICE might be
+                         * still set.
+                         */
+                        break;
+#endif
+                case OTG_STATE_B_PERIPHERAL:
+                        musb_g_suspend(musb);
+                        musb->is_active = is_otg_enabled(musb)
+                                        && musb->xceiv.gadget->b_hnp_enable;
+                        if (musb->is_active) {
+#ifdef  CONFIG_USB_MUSB_OTG
+                                musb->xceiv.state = OTG_STATE_B_WAIT_ACON;
+                                DBG(1, "HNP: Setting timer for b_ase0_brst\n");
+                                musb_otg_timer.data = (unsigned long)musb;
+                                mod_timer(&musb_otg_timer, jiffies
+                                        + msecs_to_jiffies(TB_ASE0_BRST));
+#endif
+                        }
+                        break;
+                case OTG_STATE_A_WAIT_BCON:
+                        if (musb->a_wait_bcon != 0)
+                                musb_platform_try_idle(musb, jiffies
+                                        + msecs_to_jiffies(musb->a_wait_bcon));
+                        break;
+                case OTG_STATE_A_HOST:
+                        musb->xceiv.state = OTG_STATE_A_SUSPEND;
+                        musb->is_active = is_otg_enabled(musb)
+                                        && musb->xceiv.host->b_hnp_enable;
+                        break;
+                case OTG_STATE_B_HOST:
+                        /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
+                        DBG(1, "REVISIT: SUSPEND as B_HOST\n");
+                        break;
+                default:
+                        /* "should not happen" */
+                        musb->is_active = 0;
+                        break;
+                }
+                schedule_work(&musb->irq_work);
+        }
+
+
+        return handled;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/*
+* Program the HDRC to start (enable interrupts, dma, etc.).
+*/
+void musb_start(struct musb *musb)
+{
+        void __iomem    *regs = musb->mregs;
+        u8              devctl = musb_readb(regs, MUSB_DEVCTL);
+
+        DBG(2, "<== devctl %02x\n", devctl);
+
+        /*  Set INT enable registers, enable interrupts */
+        musb_writew(regs, MUSB_INTRTXE, musb->epmask);
+        musb_writew(regs, MUSB_INTRRXE, musb->epmask & 0xfffe);
+        musb_writeb(regs, MUSB_INTRUSBE, 0xf7);
+
+        musb_writeb(regs, MUSB_TESTMODE, 0);
+
+        /* put into basic highspeed mode and start session */
+        musb_writeb(regs, MUSB_POWER, MUSB_POWER_ISOUPDATE
+                                                | MUSB_POWER_SOFTCONN
+                                                | MUSB_POWER_HSENAB
+                                                /* ENSUSPEND wedges tusb */
+                                                /* | MUSB_POWER_ENSUSPEND */
+                                                );
+
+        musb->is_active = 0;
+        devctl = musb_readb(regs, MUSB_DEVCTL);
+        devctl &= ~MUSB_DEVCTL_SESSION;
+
+        if (is_otg_enabled(musb)) {
+                /* session started after:
+                 * (a) ID-grounded irq, host mode;
+                 * (b) vbus present/connect IRQ, peripheral mode;
+                 * (c) peripheral initiates, using SRP
+                 */
+                if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
+                        musb->is_active = 1;
+                else
+                        devctl |= MUSB_DEVCTL_SESSION;
+
+        } else if (is_host_enabled(musb)) {
+                /* assume ID pin is hard-wired to ground */
+                devctl |= MUSB_DEVCTL_SESSION;
+
+        } else /* peripheral is enabled */ {
+                if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
+                        musb->is_active = 1;
+        }
+        musb_platform_enable(musb);
+        musb_writeb(regs, MUSB_DEVCTL, devctl);
+}
+
+
+static void musb_generic_disable(struct musb *musb)
+{
+        void __iomem    *mbase = musb->mregs;
+        u16     temp;
+
+        /* disable interrupts */
+        musb_writeb(mbase, MUSB_INTRUSBE, 0);
+        musb_writew(mbase, MUSB_INTRTXE, 0);
+        musb_writew(mbase, MUSB_INTRRXE, 0);
+
+        /* off */
+        musb_writeb(mbase, MUSB_DEVCTL, 0);
+
+        /*  flush pending interrupts */
+        temp = musb_readb(mbase, MUSB_INTRUSB);
+        temp = musb_readw(mbase, MUSB_INTRTX);
+        temp = musb_readw(mbase, MUSB_INTRRX);
+
+}
+
+/*
+ * Make the HDRC stop (disable interrupts, etc.);
+ * reversible by musb_start
+ * called on gadget driver unregister
+ * with controller locked, irqs blocked
+ * acts as a NOP unless some role activated the hardware
+ */
+void musb_stop(struct musb *musb)
+{
+        /* stop IRQs, timers, ... */
+        musb_platform_disable(musb);
+        musb_generic_disable(musb);
+        DBG(3, "HDRC disabled\n");
+
+        /* FIXME
+         *  - mark host and/or peripheral drivers unusable/inactive
+         *  - disable DMA (and enable it in HdrcStart)
+         *  - make sure we can musb_start() after musb_stop(); with
+         *    OTG mode, gadget driver module rmmod/modprobe cycles that
+         *  - ...
+         */
+        musb_platform_try_idle(musb, 0);
+}
+
+static void musb_shutdown(struct platform_device *pdev)
+{
+        struct musb     *musb = dev_to_musb(&pdev->dev);
+        unsigned long   flags;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        musb_platform_disable(musb);
+        musb_generic_disable(musb);
+        if (musb->clock) {
+                clk_put(musb->clock);
+                musb->clock = NULL;
+        }
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        /* FIXME power down */
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+/*
+ * The silicon either has hard-wired endpoint configurations, or else
+ * "dynamic fifo" sizing.  The driver has support for both, though at this
+ * writing only the dynamic sizing is very well tested.   We use normal
+ * idioms to so both modes are compile-tested, but dead code elimination
+ * leaves only the relevant one in the object file.
+ *
+ * We don't currently use dynamic fifo setup capability to do anything
+ * more than selecting one of a bunch of predefined configurations.
+ */
+#if defined(CONFIG_USB_TUSB6010) || \
+        defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
+static ushort __initdata fifo_mode = 4;
+#else
+static ushort __initdata fifo_mode = 2;
+#endif
+
+/* "modprobe ... fifo_mode=1" etc */
+module_param(fifo_mode, ushort, 0);
+MODULE_PARM_DESC(fifo_mode, "initial endpoint configuration");
+
+
+enum fifo_style { FIFO_RXTX, FIFO_TX, FIFO_RX } __attribute__ ((packed));
+enum buf_mode { BUF_SINGLE, BUF_DOUBLE } __attribute__ ((packed));
+
+struct fifo_cfg {
+        u8              hw_ep_num;
+        enum fifo_style style;
+        enum buf_mode   mode;
+        u16             maxpacket;
+};
+
+/*
+ * tables defining fifo_mode values.  define more if you like.
+ * for host side, make sure both halves of ep1 are set up.
+ */
+
+/* mode 0 - fits in 2KB */
+static struct fifo_cfg __initdata mode_0_cfg[] = {
+{ .hw_ep_num = 1, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num = 1, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, },
+{ .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
+{ .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
+};
+
+/* mode 1 - fits in 4KB */
+static struct fifo_cfg __initdata mode_1_cfg[] = {
+{ .hw_ep_num = 1, .style = FIFO_TX,   .maxpacket = 512, .mode = BUF_DOUBLE, },
+{ .hw_ep_num = 1, .style = FIFO_RX,   .maxpacket = 512, .mode = BUF_DOUBLE, },
+{ .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, .mode = BUF_DOUBLE, },
+{ .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
+{ .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
+};
+
+/* mode 2 - fits in 4KB */
+static struct fifo_cfg __initdata mode_2_cfg[] = {
+{ .hw_ep_num = 1, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num = 1, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 2, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num = 2, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
+{ .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
+};
+
+/* mode 3 - fits in 4KB */
+static struct fifo_cfg __initdata mode_3_cfg[] = {
+{ .hw_ep_num = 1, .style = FIFO_TX,   .maxpacket = 512, .mode = BUF_DOUBLE, },
+{ .hw_ep_num = 1, .style = FIFO_RX,   .maxpacket = 512, .mode = BUF_DOUBLE, },
+{ .hw_ep_num = 2, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num = 2, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
+{ .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
+};
+
+/* mode 4 - fits in 16KB */
+static struct fifo_cfg __initdata mode_4_cfg[] = {
+{ .hw_ep_num =  1, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  1, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num =  2, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  2, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num =  3, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  3, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num =  4, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  4, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num =  5, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  5, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num =  6, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  6, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num =  7, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  7, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num =  8, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  8, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num =  9, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num =  9, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 10, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num = 10, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 11, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num = 11, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 12, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num = 12, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 13, .style = FIFO_TX,   .maxpacket = 512, },
+{ .hw_ep_num = 13, .style = FIFO_RX,   .maxpacket = 512, },
+{ .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
+{ .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
+};
+
+
+/*
+ * configure a fifo; for non-shared endpoints, this may be called
+ * once for a tx fifo and once for an rx fifo.
+ *
+ * returns negative errno or offset for next fifo.
+ */
+static int __init
+fifo_setup(struct musb *musb, struct musb_hw_ep  *hw_ep,
+                const struct fifo_cfg *cfg, u16 offset)
+{
+        void __iomem    *mbase = musb->mregs;
+        int     size = 0;
+        u16     maxpacket = cfg->maxpacket;
+        u16     c_off = offset >> 3;
+        u8      c_size;
+
+        /* expect hw_ep has already been zero-initialized */
+
+        size = ffs(max(maxpacket, (u16) 8)) - 1;
+        maxpacket = 1 << size;
+
+        c_size = size - 3;
+        if (cfg->mode == BUF_DOUBLE) {
+                if ((offset + (maxpacket << 1)) >
+                                (1 << (musb->config->ram_bits + 2)))
+                        return -EMSGSIZE;
+                c_size |= MUSB_FIFOSZ_DPB;
+        } else {
+                if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2)))
+                        return -EMSGSIZE;
+        }
+
+        /* configure the FIFO */
+        musb_writeb(mbase, MUSB_INDEX, hw_ep->epnum);
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        /* EP0 reserved endpoint for control, bidirectional;
+         * EP1 reserved for bulk, two unidirection halves.
+         */
+        if (hw_ep->epnum == 1)
+                musb->bulk_ep = hw_ep;
+        /* REVISIT error check:  be sure ep0 can both rx and tx ... */
+#endif
+        switch (cfg->style) {
+        case FIFO_TX:
+                musb_writeb(mbase, MUSB_TXFIFOSZ, c_size);
+                musb_writew(mbase, MUSB_TXFIFOADD, c_off);
+                hw_ep->tx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
+                hw_ep->max_packet_sz_tx = maxpacket;
+                break;
+        case FIFO_RX:
+                musb_writeb(mbase, MUSB_RXFIFOSZ, c_size);
+                musb_writew(mbase, MUSB_RXFIFOADD, c_off);
+                hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
+                hw_ep->max_packet_sz_rx = maxpacket;
+                break;
+        case FIFO_RXTX:
+                musb_writeb(mbase, MUSB_TXFIFOSZ, c_size);
+                musb_writew(mbase, MUSB_TXFIFOADD, c_off);
+                hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
+                hw_ep->max_packet_sz_rx = maxpacket;
+
+                musb_writeb(mbase, MUSB_RXFIFOSZ, c_size);
+                musb_writew(mbase, MUSB_RXFIFOADD, c_off);
+                hw_ep->tx_double_buffered = hw_ep->rx_double_buffered;
+                hw_ep->max_packet_sz_tx = maxpacket;
+
+                hw_ep->is_shared_fifo = true;
+                break;
+        }
+
+        /* NOTE rx and tx endpoint irqs aren't managed separately,
+         * which happens to be ok
+         */
+        musb->epmask |= (1 << hw_ep->epnum);
+
+        return offset + (maxpacket << ((c_size & MUSB_FIFOSZ_DPB) ? 1 : 0));
+}
+
+static struct fifo_cfg __initdata ep0_cfg = {
+        .style = FIFO_RXTX, .maxpacket = 64,
+};
+
+static int __init ep_config_from_table(struct musb *musb)
+{
+        const struct fifo_cfg   *cfg;
+        unsigned                i, n;
+        int                     offset;
+        struct musb_hw_ep       *hw_ep = musb->endpoints;
+
+        switch (fifo_mode) {
+        default:
+                fifo_mode = 0;
+                /* FALLTHROUGH */
+        case 0:
+                cfg = mode_0_cfg;
+                n = ARRAY_SIZE(mode_0_cfg);
+                break;
+        case 1:
+                cfg = mode_1_cfg;
+                n = ARRAY_SIZE(mode_1_cfg);
+                break;
+        case 2:
+                cfg = mode_2_cfg;
+                n = ARRAY_SIZE(mode_2_cfg);
+                break;
+        case 3:
+                cfg = mode_3_cfg;
+                n = ARRAY_SIZE(mode_3_cfg);
+                break;
+        case 4:
+                cfg = mode_4_cfg;
+                n = ARRAY_SIZE(mode_4_cfg);
+                break;
+        }
+
+        printk(KERN_DEBUG "%s: setup fifo_mode %d\n",
+                        musb_driver_name, fifo_mode);
+
+
+        offset = fifo_setup(musb, hw_ep, &ep0_cfg, 0);
+        /* assert(offset > 0) */
+
+        /* NOTE:  for RTL versions >= 1.400 EPINFO and RAMINFO would
+         * be better than static musb->config->num_eps and DYN_FIFO_SIZE...
+         */
+
+        for (i = 0; i < n; i++) {
+                u8      epn = cfg->hw_ep_num;
+
+                if (epn >= musb->config->num_eps) {
+                        pr_debug("%s: invalid ep %d\n",
+                                        musb_driver_name, epn);
+                        continue;
+                }
+                offset = fifo_setup(musb, hw_ep + epn, cfg++, offset);
+                if (offset < 0) {
+                        pr_debug("%s: mem overrun, ep %d\n",
+                                        musb_driver_name, epn);
+                        return -EINVAL;
+                }
+                epn++;
+                musb->nr_endpoints = max(epn, musb->nr_endpoints);
+        }
+
+        printk(KERN_DEBUG "%s: %d/%d max ep, %d/%d memory\n",
+                        musb_driver_name,
+                        n + 1, musb->config->num_eps * 2 - 1,
+                        offset, (1 << (musb->config->ram_bits + 2)));
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        if (!musb->bulk_ep) {
+                pr_debug("%s: missing bulk\n", musb_driver_name);
+                return -EINVAL;
+        }
+#endif
+
+        return 0;
+}
+
+
+/*
+ * ep_config_from_hw - when MUSB_C_DYNFIFO_DEF is false
+ * @param musb the controller
+ */
+static int __init ep_config_from_hw(struct musb *musb)
+{
+        u8 epnum = 0, reg;
+        struct musb_hw_ep *hw_ep;
+        void *mbase = musb->mregs;
+
+        DBG(2, "<== static silicon ep config\n");
+
+        /* FIXME pick up ep0 maxpacket size */
+
+        for (epnum = 1; epnum < musb->config->num_eps; epnum++) {
+                musb_ep_select(mbase, epnum);
+                hw_ep = musb->endpoints + epnum;
+
+                /* read from core using indexed model */
+                reg = musb_readb(hw_ep->regs, 0x10 + MUSB_FIFOSIZE);
+                if (!reg) {
+                        /* 0's returned when no more endpoints */
+                        break;
+                }
+                musb->nr_endpoints++;
+                musb->epmask |= (1 << epnum);
+
+                hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
+
+                /* shared TX/RX FIFO? */
+                if ((reg & 0xf0) == 0xf0) {
+                        hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
+                        hw_ep->is_shared_fifo = true;
+                        continue;
+                } else {
+                        hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
+                        hw_ep->is_shared_fifo = false;
+                }
+
+                /* FIXME set up hw_ep->{rx,tx}_double_buffered */
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+                /* pick an RX/TX endpoint for bulk */
+                if (hw_ep->max_packet_sz_tx < 512
+                                || hw_ep->max_packet_sz_rx < 512)
+                        continue;
+
+                /* REVISIT:  this algorithm is lazy, we should at least
+                 * try to pick a double buffered endpoint.
+                 */
+                if (musb->bulk_ep)
+                        continue;
+                musb->bulk_ep = hw_ep;
+#endif
+        }
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        if (!musb->bulk_ep) {
+                pr_debug("%s: missing bulk\n", musb_driver_name);
+                return -EINVAL;
+        }
+#endif
+
+        return 0;
+}
+
+enum { MUSB_CONTROLLER_MHDRC, MUSB_CONTROLLER_HDRC, };
+
+/* Initialize MUSB (M)HDRC part of the USB hardware subsystem;
+ * configure endpoints, or take their config from silicon
+ */
+static int __init musb_core_init(u16 musb_type, struct musb *musb)
+{
+#ifdef MUSB_AHB_ID
+        u32 data;
+#endif
+        u8 reg;
+        char *type;
+        u16 hwvers, rev_major, rev_minor;
+        char aInfo[78], aRevision[32], aDate[12];
+        void __iomem    *mbase = musb->mregs;
+        int             status = 0;
+        int             i;
+
+        /* log core options (read using indexed model) */
+        musb_ep_select(mbase, 0);
+        reg = musb_readb(mbase, 0x10 + MUSB_CONFIGDATA);
+
+        strcpy(aInfo, (reg & MUSB_CONFIGDATA_UTMIDW) ? "UTMI-16" : "UTMI-8");
+        if (reg & MUSB_CONFIGDATA_DYNFIFO)
+                strcat(aInfo, ", dyn FIFOs");
+        if (reg & MUSB_CONFIGDATA_MPRXE) {
+                strcat(aInfo, ", bulk combine");
+#ifdef C_MP_RX
+                musb->bulk_combine = true;
+#else
+                strcat(aInfo, " (X)");          /* no driver support */
+#endif
+        }
+        if (reg & MUSB_CONFIGDATA_MPTXE) {
+                strcat(aInfo, ", bulk split");
+#ifdef C_MP_TX
+                musb->bulk_split = true;
+#else
+                strcat(aInfo, " (X)");          /* no driver support */
+#endif
+        }
+        if (reg & MUSB_CONFIGDATA_HBRXE) {
+                strcat(aInfo, ", HB-ISO Rx");
+                strcat(aInfo, " (X)");          /* no driver support */
+        }
+        if (reg & MUSB_CONFIGDATA_HBTXE) {
+                strcat(aInfo, ", HB-ISO Tx");
+                strcat(aInfo, " (X)");          /* no driver support */
+        }
+        if (reg & MUSB_CONFIGDATA_SOFTCONE)
+                strcat(aInfo, ", SoftConn");
+
+        printk(KERN_DEBUG "%s: ConfigData=0x%02x (%s)\n",
+                        musb_driver_name, reg, aInfo);
+
+#ifdef MUSB_AHB_ID
+        data = musb_readl(mbase, 0x404);
+        sprintf(aDate, "%04d-%02x-%02x", (data & 0xffff),
+                (data >> 16) & 0xff, (data >> 24) & 0xff);
+        /* FIXME ID2 and ID3 are unused */
+        data = musb_readl(mbase, 0x408);
+        printk(KERN_DEBUG "ID2=%lx\n", (long unsigned)data);
+        data = musb_readl(mbase, 0x40c);
+        printk(KERN_DEBUG "ID3=%lx\n", (long unsigned)data);
+        reg = musb_readb(mbase, 0x400);
+        musb_type = ('M' == reg) ? MUSB_CONTROLLER_MHDRC : MUSB_CONTROLLER_HDRC;
+#else
+        aDate[0] = 0;
+#endif
+        if (MUSB_CONTROLLER_MHDRC == musb_type) {
+                musb->is_multipoint = 1;
+                type = "M";
+        } else {
+                musb->is_multipoint = 0;
+                type = "";
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+#ifndef CONFIG_USB_OTG_BLACKLIST_HUB
+                printk(KERN_ERR
+                        "%s: kernel must blacklist external hubs\n",
+                        musb_driver_name);
+#endif
+#endif
+        }
+
+        /* log release info */
+        hwvers = musb_readw(mbase, MUSB_HWVERS);
+        rev_major = (hwvers >> 10) & 0x1f;
+        rev_minor = hwvers & 0x3ff;
+        snprintf(aRevision, 32, "%d.%d%s", rev_major,
+                rev_minor, (hwvers & 0x8000) ? "RC" : "");
+        printk(KERN_DEBUG "%s: %sHDRC RTL version %s %s\n",
+                        musb_driver_name, type, aRevision, aDate);
+
+        /* configure ep0 */
+        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
+        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
+
+        /* discover endpoint configuration */
+        musb->nr_endpoints = 1;
+        musb->epmask = 1;
+
+        if (reg & MUSB_CONFIGDATA_DYNFIFO) {
+                if (musb->config->dyn_fifo)
+                        status = ep_config_from_table(musb);
+                else {
+                        ERR("reconfigure software for Dynamic FIFOs\n");
+                        status = -ENODEV;
+                }
+        } else {
+                if (!musb->config->dyn_fifo)
+                        status = ep_config_from_hw(musb);
+                else {
+                        ERR("reconfigure software for static FIFOs\n");
+                        return -ENODEV;
+                }
+        }
+
+        if (status < 0)
+                return status;
+
+        /* finish init, and print endpoint config */
+        for (i = 0; i < musb->nr_endpoints; i++) {
+                struct musb_hw_ep       *hw_ep = musb->endpoints + i;
+
+                hw_ep->fifo = MUSB_FIFO_OFFSET(i) + mbase;
+#ifdef CONFIG_USB_TUSB6010
+                hw_ep->fifo_async = musb->async + 0x400 + MUSB_FIFO_OFFSET(i);
+                hw_ep->fifo_sync = musb->sync + 0x400 + MUSB_FIFO_OFFSET(i);
+                hw_ep->fifo_sync_va =
+                        musb->sync_va + 0x400 + MUSB_FIFO_OFFSET(i);
+
+                if (i == 0)
+                        hw_ep->conf = mbase - 0x400 + TUSB_EP0_CONF;
+                else
+                        hw_ep->conf = mbase + 0x400 + (((i - 1) & 0xf) << 2);
+#endif
+
+                hw_ep->regs = MUSB_EP_OFFSET(i, 0) + mbase;
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+                hw_ep->target_regs = MUSB_BUSCTL_OFFSET(i, 0) + mbase;
+                hw_ep->rx_reinit = 1;
+                hw_ep->tx_reinit = 1;
+#endif
+
+                if (hw_ep->max_packet_sz_tx) {
+                        printk(KERN_DEBUG
+                                "%s: hw_ep %d%s, %smax %d\n",
+                                musb_driver_name, i,
+                                hw_ep->is_shared_fifo ? "shared" : "tx",
+                                hw_ep->tx_double_buffered
+                                        ? "doublebuffer, " : "",
+                                hw_ep->max_packet_sz_tx);
+                }
+                if (hw_ep->max_packet_sz_rx && !hw_ep->is_shared_fifo) {
+                        printk(KERN_DEBUG
+                                "%s: hw_ep %d%s, %smax %d\n",
+                                musb_driver_name, i,
+                                "rx",
+                                hw_ep->rx_double_buffered
+                                        ? "doublebuffer, " : "",
+                                hw_ep->max_packet_sz_rx);
+                }
+                if (!(hw_ep->max_packet_sz_tx || hw_ep->max_packet_sz_rx))
+                        DBG(1, "hw_ep %d not configured\n", i);
+        }
+
+        return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
+
+static irqreturn_t generic_interrupt(int irq, void *__hci)
+{
+        unsigned long   flags;
+        irqreturn_t     retval = IRQ_NONE;
+        struct musb     *musb = __hci;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
+        musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
+        musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
+
+        if (musb->int_usb || musb->int_tx || musb->int_rx)
+                retval = musb_interrupt(musb);
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        /* REVISIT we sometimes get spurious IRQs on g_ep0
+         * not clear why...
+         */
+        if (retval != IRQ_HANDLED)
+                DBG(5, "spurious?\n");
+
+        return IRQ_HANDLED;
+}
+
+#else
+#define generic_interrupt       NULL
+#endif
+
+/*
+ * handle all the irqs defined by the HDRC core. for now we expect:  other
+ * irq sources (phy, dma, etc) will be handled first, musb->int_* values
+ * will be assigned, and the irq will already have been acked.
+ *
+ * called in irq context with spinlock held, irqs blocked
+ */
+irqreturn_t musb_interrupt(struct musb *musb)
+{
+        irqreturn_t     retval = IRQ_NONE;
+        u8              devctl, power;
+        int             ep_num;
+        u32             reg;
+
+        devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+        power = musb_readb(musb->mregs, MUSB_POWER);
+
+        DBG(4, "** IRQ %s usb%04x tx%04x rx%04x\n",
+                (devctl & MUSB_DEVCTL_HM) ? "host" : "peripheral",
+                musb->int_usb, musb->int_tx, musb->int_rx);
+
+        /* the core can interrupt us for multiple reasons; docs have
+         * a generic interrupt flowchart to follow
+         */
+        if (musb->int_usb & STAGE0_MASK)
+                retval |= musb_stage0_irq(musb, musb->int_usb,
+                                devctl, power);
+
+        /* "stage 1" is handling endpoint irqs */
+
+        /* handle endpoint 0 first */
+        if (musb->int_tx & 1) {
+                if (devctl & MUSB_DEVCTL_HM)
+                        retval |= musb_h_ep0_irq(musb);
+                else
+                        retval |= musb_g_ep0_irq(musb);
+        }
+
+        /* RX on endpoints 1-15 */
+        reg = musb->int_rx >> 1;
+        ep_num = 1;
+        while (reg) {
+                if (reg & 1) {
+                        /* musb_ep_select(musb->mregs, ep_num); */
+                        /* REVISIT just retval = ep->rx_irq(...) */
+                        retval = IRQ_HANDLED;
+                        if (devctl & MUSB_DEVCTL_HM) {
+                                if (is_host_capable())
+                                        musb_host_rx(musb, ep_num);
+                        } else {
+                                if (is_peripheral_capable())
+                                        musb_g_rx(musb, ep_num);
+                        }
+                }
+
+                reg >>= 1;
+                ep_num++;
+        }
+
+        /* TX on endpoints 1-15 */
+        reg = musb->int_tx >> 1;
+        ep_num = 1;
+        while (reg) {
+                if (reg & 1) {
+                        /* musb_ep_select(musb->mregs, ep_num); */
+                        /* REVISIT just retval |= ep->tx_irq(...) */
+                        retval = IRQ_HANDLED;
+                        if (devctl & MUSB_DEVCTL_HM) {
+                                if (is_host_capable())
+                                        musb_host_tx(musb, ep_num);
+                        } else {
+                                if (is_peripheral_capable())
+                                        musb_g_tx(musb, ep_num);
+                        }
+                }
+                reg >>= 1;
+                ep_num++;
+        }
+
+        /* finish handling "global" interrupts after handling fifos */
+        if (musb->int_usb)
+                retval |= musb_stage2_irq(musb,
+                                musb->int_usb, devctl, power);
+
+        return retval;
+}
+
+
+#ifndef CONFIG_MUSB_PIO_ONLY
+static int __initdata use_dma = 1;
+
+/* "modprobe ... use_dma=0" etc */
+module_param(use_dma, bool, 0);
+MODULE_PARM_DESC(use_dma, "enable/disable use of DMA");
+
+void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit)
+{
+        u8      devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+
+        /* called with controller lock already held */
+
+        if (!epnum) {
+#ifndef CONFIG_USB_TUSB_OMAP_DMA
+                if (!is_cppi_enabled()) {
+                        /* endpoint 0 */
+                        if (devctl & MUSB_DEVCTL_HM)
+                                musb_h_ep0_irq(musb);
+                        else
+                                musb_g_ep0_irq(musb);
+                }
+#endif
+        } else {
+                /* endpoints 1..15 */
+                if (transmit) {
+                        if (devctl & MUSB_DEVCTL_HM) {
+                                if (is_host_capable())
+                                        musb_host_tx(musb, epnum);
+                        } else {
+                                if (is_peripheral_capable())
+                                        musb_g_tx(musb, epnum);
+                        }
+                } else {
+                        /* receive */
+                        if (devctl & MUSB_DEVCTL_HM) {
+                                if (is_host_capable())
+                                        musb_host_rx(musb, epnum);
+                        } else {
+                                if (is_peripheral_capable())
+                                        musb_g_rx(musb, epnum);
+                        }
+                }
+        }
+}
+
+#else
+#define use_dma                 0
+#endif
+
+/*-------------------------------------------------------------------------*/
+
+#ifdef CONFIG_SYSFS
+
+static ssize_t
+musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+        struct musb *musb = dev_to_musb(dev);
+        unsigned long flags;
+        int ret = -EINVAL;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        ret = sprintf(buf, "%s\n", otg_state_string(musb));
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        return ret;
+}
+
+static ssize_t
+musb_mode_store(struct device *dev, struct device_attribute *attr,
+                const char *buf, size_t n)
+{
+        struct musb     *musb = dev_to_musb(dev);
+        unsigned long   flags;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        if (!strncmp(buf, "host", 4))
+                musb_platform_set_mode(musb, MUSB_HOST);
+        if (!strncmp(buf, "peripheral", 10))
+                musb_platform_set_mode(musb, MUSB_PERIPHERAL);
+        if (!strncmp(buf, "otg", 3))
+                musb_platform_set_mode(musb, MUSB_OTG);
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        return n;
+}
+static DEVICE_ATTR(mode, 0644, musb_mode_show, musb_mode_store);
+
+static ssize_t
+musb_vbus_store(struct device *dev, struct device_attribute *attr,
+                const char *buf, size_t n)
+{
+        struct musb     *musb = dev_to_musb(dev);
+        unsigned long   flags;
+        unsigned long   val;
+
+        if (sscanf(buf, "%lu", &val) < 1) {
+                printk(KERN_ERR "Invalid VBUS timeout ms value\n");
+                return -EINVAL;
+        }
+
+        spin_lock_irqsave(&musb->lock, flags);
+        musb->a_wait_bcon = val;
+        if (musb->xceiv.state == OTG_STATE_A_WAIT_BCON)
+                musb->is_active = 0;
+        musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val));
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        return n;
+}
+
+static ssize_t
+musb_vbus_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+        struct musb     *musb = dev_to_musb(dev);
+        unsigned long   flags;
+        unsigned long   val;
+        int             vbus;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        val = musb->a_wait_bcon;
+        vbus = musb_platform_get_vbus_status(musb);
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        return sprintf(buf, "Vbus %s, timeout %lu\n",
+                        vbus ? "on" : "off", val);
+}
+static DEVICE_ATTR(vbus, 0644, musb_vbus_show, musb_vbus_store);
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+
+/* Gadget drivers can't know that a host is connected so they might want
+ * to start SRP, but users can.  This allows userspace to trigger SRP.
+ */
+static ssize_t
+musb_srp_store(struct device *dev, struct device_attribute *attr,
+                const char *buf, size_t n)
+{
+        struct musb     *musb = dev_to_musb(dev);
+        unsigned short  srp;
+
+        if (sscanf(buf, "%hu", &srp) != 1
+                        || (srp != 1)) {
+                printk(KERN_ERR "SRP: Value must be 1\n");
+                return -EINVAL;
+        }
+
+        if (srp == 1)
+                musb_g_wakeup(musb);
+
+        return n;
+}
+static DEVICE_ATTR(srp, 0644, NULL, musb_srp_store);
+
+#endif /* CONFIG_USB_GADGET_MUSB_HDRC */
+
+#endif  /* sysfs */
+
+/* Only used to provide driver mode change events */
+static void musb_irq_work(struct work_struct *data)
+{
+        struct musb *musb = container_of(data, struct musb, irq_work);
+        static int old_state;
+
+        if (musb->xceiv.state != old_state) {
+                old_state = musb->xceiv.state;
+                sysfs_notify(&musb->controller->kobj, NULL, "mode");
+        }
+}
+
+/* --------------------------------------------------------------------------
+ * Init support
+ */
+
+static struct musb *__init
+allocate_instance(struct device *dev,
+                struct musb_hdrc_config *config, void __iomem *mbase)
+{
+        struct musb             *musb;
+        struct musb_hw_ep       *ep;
+        int                     epnum;
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        struct usb_hcd  *hcd;
+
+        hcd = usb_create_hcd(&musb_hc_driver, dev, dev->bus_id);
+        if (!hcd)
+                return NULL;
+        /* usbcore sets dev->driver_data to hcd, and sometimes uses that... */
+
+        musb = hcd_to_musb(hcd);
+        INIT_LIST_HEAD(&musb->control);
+        INIT_LIST_HEAD(&musb->in_bulk);
+        INIT_LIST_HEAD(&musb->out_bulk);
+
+        hcd->uses_new_polling = 1;
+
+        musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
+#else
+        musb = kzalloc(sizeof *musb, GFP_KERNEL);
+        if (!musb)
+                return NULL;
+        dev_set_drvdata(dev, musb);
+
+#endif
+
+        musb->mregs = mbase;
+        musb->ctrl_base = mbase;
+        musb->nIrq = -ENODEV;
+        musb->config = config;
+        for (epnum = 0, ep = musb->endpoints;
+                        epnum < musb->config->num_eps;
+                        epnum++, ep++) {
+
+                ep->musb = musb;
+                ep->epnum = epnum;
+        }
+
+        musb->controller = dev;
+        return musb;
+}
+
+static void musb_free(struct musb *musb)
+{
+        /* this has multiple entry modes. it handles fault cleanup after
+         * probe(), where things may be partially set up, as well as rmmod
+         * cleanup after everything's been de-activated.
+         */
+
+#ifdef CONFIG_SYSFS
+        device_remove_file(musb->controller, &dev_attr_mode);
+        device_remove_file(musb->controller, &dev_attr_vbus);
+#ifdef CONFIG_USB_MUSB_OTG
+        device_remove_file(musb->controller, &dev_attr_srp);
+#endif
+#endif
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+        musb_gadget_cleanup(musb);
+#endif
+
+        if (musb->nIrq >= 0) {
+                disable_irq_wake(musb->nIrq);
+                free_irq(musb->nIrq, musb);
+        }
+        if (is_dma_capable() && musb->dma_controller) {
+                struct dma_controller   *c = musb->dma_controller;
+
+                (void) c->stop(c);
+                dma_controller_destroy(c);
+        }
+
+        musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
+        musb_platform_exit(musb);
+        musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
+
+        if (musb->clock) {
+                clk_disable(musb->clock);
+                clk_put(musb->clock);
+        }
+
+#ifdef CONFIG_USB_MUSB_OTG
+        put_device(musb->xceiv.dev);
+#endif
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        usb_put_hcd(musb_to_hcd(musb));
+#else
+        kfree(musb);
+#endif
+}
+
+/*
+ * Perform generic per-controller initialization.
+ *
+ * @pDevice: the controller (already clocked, etc)
+ * @nIrq: irq
+ * @mregs: virtual address of controller registers,
+ *      not yet corrected for platform-specific offsets
+ */
+static int __init
+musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
+{
+        int                     status;
+        struct musb             *musb;
+        struct musb_hdrc_platform_data *plat = dev->platform_data;
+
+        /* The driver might handle more features than the board; OK.
+         * Fail when the board needs a feature that's not enabled.
+         */
+        if (!plat) {
+                dev_dbg(dev, "no platform_data?\n");
+                return -ENODEV;
+        }
+        switch (plat->mode) {
+        case MUSB_HOST:
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+                break;
+#else
+                goto bad_config;
+#endif
+        case MUSB_PERIPHERAL:
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+                break;
+#else
+                goto bad_config;
+#endif
+        case MUSB_OTG:
+#ifdef CONFIG_USB_MUSB_OTG
+                break;
+#else
+bad_config:
+#endif
+        default:
+                dev_err(dev, "incompatible Kconfig role setting\n");
+                return -EINVAL;
+        }
+
+        /* allocate */
+        musb = allocate_instance(dev, plat->config, ctrl);
+        if (!musb)
+                return -ENOMEM;
+
+        spin_lock_init(&musb->lock);
+        musb->board_mode = plat->mode;
+        musb->board_set_power = plat->set_power;
+        musb->set_clock = plat->set_clock;
+        musb->min_power = plat->min_power;
+
+        /* Clock usage is chip-specific ... functional clock (DaVinci,
+         * OMAP2430), or PHY ref (some TUSB6010 boards).  All this core
+         * code does is make sure a clock handle is available; platform
+         * code manages it during start/stop and suspend/resume.
+         */
+        if (plat->clock) {
+                musb->clock = clk_get(dev, plat->clock);
+                if (IS_ERR(musb->clock)) {
+                        status = PTR_ERR(musb->clock);
+                        musb->clock = NULL;
+                        goto fail;
+                }
+        }
+
+        /* assume vbus is off */
+
+        /* platform adjusts musb->mregs and musb->isr if needed,
+         * and activates clocks
+         */
+        musb->isr = generic_interrupt;
+        status = musb_platform_init(musb);
+
+        if (status < 0)
+                goto fail;
+        if (!musb->isr) {
+                status = -ENODEV;
+                goto fail2;
+        }
+
+#ifndef CONFIG_MUSB_PIO_ONLY
+        if (use_dma && dev->dma_mask) {
+                struct dma_controller   *c;
+
+                c = dma_controller_create(musb, musb->mregs);
+                musb->dma_controller = c;
+                if (c)
+                        (void) c->start(c);
+        }
+#endif
+        /* ideally this would be abstracted in platform setup */
+        if (!is_dma_capable() || !musb->dma_controller)
+                dev->dma_mask = NULL;
+
+        /* be sure interrupts are disabled before connecting ISR */
+        musb_platform_disable(musb);
+        musb_generic_disable(musb);
+
+        /* setup musb parts of the core (especially endpoints) */
+        status = musb_core_init(plat->config->multipoint
+                        ? MUSB_CONTROLLER_MHDRC
+                        : MUSB_CONTROLLER_HDRC, musb);
+        if (status < 0)
+                goto fail2;
+
+        /* Init IRQ workqueue before request_irq */
+        INIT_WORK(&musb->irq_work, musb_irq_work);
+
+        /* attach to the IRQ */
+        if (request_irq(nIrq, musb->isr, 0, dev->bus_id, musb)) {
+                dev_err(dev, "request_irq %d failed!\n", nIrq);
+                status = -ENODEV;
+                goto fail2;
+        }
+        musb->nIrq = nIrq;
+/* FIXME this handles wakeup irqs wrong */
+        if (enable_irq_wake(nIrq) == 0)
+                device_init_wakeup(dev, 1);
+
+        pr_info("%s: USB %s mode controller at %p using %s, IRQ %d\n",
+                        musb_driver_name,
+                        ({char *s;
+                        switch (musb->board_mode) {
+                        case MUSB_HOST:         s = "Host"; break;
+                        case MUSB_PERIPHERAL:   s = "Peripheral"; break;
+                        default:                s = "OTG"; break;
+                        }; s; }),
+                        ctrl,
+                        (is_dma_capable() && musb->dma_controller)
+                                ? "DMA" : "PIO",
+                        musb->nIrq);
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        /* host side needs more setup, except for no-host modes */
+        if (musb->board_mode != MUSB_PERIPHERAL) {
+                struct usb_hcd  *hcd = musb_to_hcd(musb);
+
+                if (musb->board_mode == MUSB_OTG)
+                        hcd->self.otg_port = 1;
+                musb->xceiv.host = &hcd->self;
+                hcd->power_budget = 2 * (plat->power ? : 250);
+        }
+#endif                          /* CONFIG_USB_MUSB_HDRC_HCD */
+
+        /* For the host-only role, we can activate right away.
+         * (We expect the ID pin to be forcibly grounded!!)
+         * Otherwise, wait till the gadget driver hooks up.
+         */
+        if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
+                MUSB_HST_MODE(musb);
+                musb->xceiv.default_a = 1;
+                musb->xceiv.state = OTG_STATE_A_IDLE;
+
+                status = usb_add_hcd(musb_to_hcd(musb), -1, 0);
+
+                DBG(1, "%s mode, status %d, devctl %02x %c\n",
+                        "HOST", status,
+                        musb_readb(musb->mregs, MUSB_DEVCTL),
+                        (musb_readb(musb->mregs, MUSB_DEVCTL)
+                                        & MUSB_DEVCTL_BDEVICE
+                                ? 'B' : 'A'));
+
+        } else /* peripheral is enabled */ {
+                MUSB_DEV_MODE(musb);
+                musb->xceiv.default_a = 0;
+                musb->xceiv.state = OTG_STATE_B_IDLE;
+
+                status = musb_gadget_setup(musb);
+
+                DBG(1, "%s mode, status %d, dev%02x\n",
+                        is_otg_enabled(musb) ? "OTG" : "PERIPHERAL",
+                        status,
+                        musb_readb(musb->mregs, MUSB_DEVCTL));
+
+        }
+
+        if (status == 0)
+                musb_debug_create("driver/musb_hdrc", musb);
+        else {
+fail:
+                if (musb->clock)
+                        clk_put(musb->clock);
+                device_init_wakeup(dev, 0);
+                musb_free(musb);
+                return status;
+        }
+
+#ifdef CONFIG_SYSFS
+        status = device_create_file(dev, &dev_attr_mode);
+        status = device_create_file(dev, &dev_attr_vbus);
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+        status = device_create_file(dev, &dev_attr_srp);
+#endif /* CONFIG_USB_GADGET_MUSB_HDRC */
+        status = 0;
+#endif
+
+        return status;
+
+fail2:
+        musb_platform_exit(musb);
+        goto fail;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* all implementations (PCI bridge to FPGA, VLYNQ, etc) should just
+ * bridge to a platform device; this driver then suffices.
+ */
+
+#ifndef CONFIG_MUSB_PIO_ONLY
+static u64      *orig_dma_mask;
+#endif
+
+static int __init musb_probe(struct platform_device *pdev)
+{
+        struct device   *dev = &pdev->dev;
+        int             irq = platform_get_irq(pdev, 0);
+        struct resource *iomem;
+        void __iomem    *base;
+
+        iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!iomem || irq == 0)
+                return -ENODEV;
+
+        base = ioremap(iomem->start, iomem->end - iomem->start + 1);
+        if (!base) {
+                dev_err(dev, "ioremap failed\n");
+                return -ENOMEM;
+        }
+
+#ifndef CONFIG_MUSB_PIO_ONLY
+        /* clobbered by use_dma=n */
+        orig_dma_mask = dev->dma_mask;
+#endif
+        return musb_init_controller(dev, irq, base);
+}
+
+static int __devexit musb_remove(struct platform_device *pdev)
+{
+        struct musb     *musb = dev_to_musb(&pdev->dev);
+        void __iomem    *ctrl_base = musb->ctrl_base;
+
+        /* this gets called on rmmod.
+         *  - Host mode: host may still be active
+         *  - Peripheral mode: peripheral is deactivated (or never-activated)
+         *  - OTG mode: both roles are deactivated (or never-activated)
+         */
+        musb_shutdown(pdev);
+        musb_debug_delete("driver/musb_hdrc", musb);
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        if (musb->board_mode == MUSB_HOST)
+                usb_remove_hcd(musb_to_hcd(musb));
+#endif
+        musb_free(musb);
+        iounmap(ctrl_base);
+        device_init_wakeup(&pdev->dev, 0);
+#ifndef CONFIG_MUSB_PIO_ONLY
+        pdev->dev.dma_mask = orig_dma_mask;
+#endif
+        return 0;
+}
+
+#ifdef  CONFIG_PM
+
+static int musb_suspend(struct platform_device *pdev, pm_message_t message)
+{
+        unsigned long   flags;
+        struct musb     *musb = dev_to_musb(&pdev->dev);
+
+        if (!musb->clock)
+                return 0;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if (is_peripheral_active(musb)) {
+                /* FIXME force disconnect unless we know USB will wake
+                 * the system up quickly enough to respond ...
+                 */
+        } else if (is_host_active(musb)) {
+                /* we know all the children are suspended; sometimes
+                 * they will even be wakeup-enabled.
+                 */
+        }
+
+        if (musb->set_clock)
+                musb->set_clock(musb->clock, 0);
+        else
+                clk_disable(musb->clock);
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return 0;
+}
+
+static int musb_resume(struct platform_device *pdev)
+{
+        unsigned long   flags;
+        struct musb     *musb = dev_to_musb(&pdev->dev);
+
+        if (!musb->clock)
+                return 0;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if (musb->set_clock)
+                musb->set_clock(musb->clock, 1);
+        else
+                clk_enable(musb->clock);
+
+        /* for static cmos like DaVinci, register values were preserved
+         * unless for some reason the whole soc powered down and we're
+         * not treating that as a whole-system restart (e.g. swsusp)
+         */
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return 0;
+}
+
+#else
+#define musb_suspend    NULL
+#define musb_resume     NULL
+#endif
+
+static struct platform_driver musb_driver = {
+        .driver = {
+                .name           = (char *)musb_driver_name,
+                .bus            = &platform_bus_type,
+                .owner          = THIS_MODULE,
+        },
+        .remove         = __devexit_p(musb_remove),
+        .shutdown       = musb_shutdown,
+        .suspend        = musb_suspend,
+        .resume         = musb_resume,
+};
+
+/*-------------------------------------------------------------------------*/
+
+static int __init musb_init(void)
+{
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        if (usb_disabled())
+                return 0;
+#endif
+
+        pr_info("%s: version " MUSB_VERSION ", "
+#ifdef CONFIG_MUSB_PIO_ONLY
+                "pio"
+#elif defined(CONFIG_USB_TI_CPPI_DMA)
+                "cppi-dma"
+#elif defined(CONFIG_USB_INVENTRA_DMA)
+                "musb-dma"
+#elif defined(CONFIG_USB_TUSB_OMAP_DMA)
+                "tusb-omap-dma"
+#else
+                "?dma?"
+#endif
+                ", "
+#ifdef CONFIG_USB_MUSB_OTG
+                "otg (peripheral+host)"
+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
+                "peripheral"
+#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
+                "host"
+#endif
+                ", debug=%d\n",
+                musb_driver_name, debug);
+        return platform_driver_probe(&musb_driver, musb_probe);
+}
+
+/* make us init after usbcore and before usb
+ * gadget and host-side drivers start to register
+ */
+subsys_initcall(musb_init);
+
+static void __exit musb_cleanup(void)
+{
+        platform_driver_unregister(&musb_driver);
+}
+module_exit(musb_cleanup);
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
new file mode 100644
index 000000000000..eade46d81708
--- /dev/null
+++ b/drivers/usb/musb/musb_core.h
@@ -0,0 +1,507 @@
+/*
+ * MUSB OTG driver defines
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef __MUSB_CORE_H__
+#define __MUSB_CORE_H__
+
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/interrupt.h>
+#include <linux/smp_lock.h>
+#include <linux/errno.h>
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/musb.h>
+
+struct musb;
+struct musb_hw_ep;
+struct musb_ep;
+
+
+#include "musb_debug.h"
+#include "musb_dma.h"
+
+#include "musb_io.h"
+#include "musb_regs.h"
+
+#include "musb_gadget.h"
+#include "../core/hcd.h"
+#include "musb_host.h"
+
+
+
+#ifdef CONFIG_USB_MUSB_OTG
+
+#define is_peripheral_enabled(musb)     ((musb)->board_mode != MUSB_HOST)
+#define is_host_enabled(musb)           ((musb)->board_mode != MUSB_PERIPHERAL)
+#define is_otg_enabled(musb)            ((musb)->board_mode == MUSB_OTG)
+
+/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
+ * OTG or host-only go to A_IDLE when ID is sensed.
+ */
+#define is_peripheral_active(m)         (!(m)->is_host)
+#define is_host_active(m)               ((m)->is_host)
+
+#else
+#define is_peripheral_enabled(musb)     is_peripheral_capable()
+#define is_host_enabled(musb)           is_host_capable()
+#define is_otg_enabled(musb)            0
+
+#define is_peripheral_active(musb)      is_peripheral_capable()
+#define is_host_active(musb)            is_host_capable()
+#endif
+
+#if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
+/* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
+ * override that choice selection (often USB_GADGET_DUMMY_HCD).
+ */
+#ifndef CONFIG_USB_GADGET_MUSB_HDRC
+#error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
+#endif
+#endif  /* need MUSB gadget selection */
+
+
+#ifdef CONFIG_PROC_FS
+#include <linux/fs.h>
+#define MUSB_CONFIG_PROC_FS
+#endif
+
+/****************************** PERIPHERAL ROLE *****************************/
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+
+#define is_peripheral_capable() (1)
+
+extern irqreturn_t musb_g_ep0_irq(struct musb *);
+extern void musb_g_tx(struct musb *, u8);
+extern void musb_g_rx(struct musb *, u8);
+extern void musb_g_reset(struct musb *);
+extern void musb_g_suspend(struct musb *);
+extern void musb_g_resume(struct musb *);
+extern void musb_g_wakeup(struct musb *);
+extern void musb_g_disconnect(struct musb *);
+
+#else
+
+#define is_peripheral_capable() (0)
+
+static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
+static inline void musb_g_reset(struct musb *m) {}
+static inline void musb_g_suspend(struct musb *m) {}
+static inline void musb_g_resume(struct musb *m) {}
+static inline void musb_g_wakeup(struct musb *m) {}
+static inline void musb_g_disconnect(struct musb *m) {}
+
+#endif
+
+/****************************** HOST ROLE ***********************************/
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+
+#define is_host_capable()       (1)
+
+extern irqreturn_t musb_h_ep0_irq(struct musb *);
+extern void musb_host_tx(struct musb *, u8);
+extern void musb_host_rx(struct musb *, u8);
+
+#else
+
+#define is_host_capable()       (0)
+
+static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
+static inline void musb_host_tx(struct musb *m, u8 e) {}
+static inline void musb_host_rx(struct musb *m, u8 e) {}
+
+#endif
+
+
+/****************************** CONSTANTS ********************************/
+
+#ifndef MUSB_C_NUM_EPS
+#define MUSB_C_NUM_EPS ((u8)16)
+#endif
+
+#ifndef MUSB_MAX_END0_PACKET
+#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
+#endif
+
+/* host side ep0 states */
+enum musb_h_ep0_state {
+        MUSB_EP0_IDLE,
+        MUSB_EP0_START,                 /* expect ack of setup */
+        MUSB_EP0_IN,                    /* expect IN DATA */
+        MUSB_EP0_OUT,                   /* expect ack of OUT DATA */
+        MUSB_EP0_STATUS,                /* expect ack of STATUS */
+} __attribute__ ((packed));
+
+/* peripheral side ep0 states */
+enum musb_g_ep0_state {
+        MUSB_EP0_STAGE_SETUP,           /* idle, waiting for setup */
+        MUSB_EP0_STAGE_TX,              /* IN data */
+        MUSB_EP0_STAGE_RX,              /* OUT data */
+        MUSB_EP0_STAGE_STATUSIN,        /* (after OUT data) */
+        MUSB_EP0_STAGE_STATUSOUT,       /* (after IN data) */
+        MUSB_EP0_STAGE_ACKWAIT,         /* after zlp, before statusin */
+} __attribute__ ((packed));
+
+/* OTG protocol constants */
+#define OTG_TIME_A_WAIT_VRISE   100             /* msec (max) */
+#define OTG_TIME_A_WAIT_BCON    0               /* 0=infinite; min 1000 msec */
+#define OTG_TIME_A_IDLE_BDIS    200             /* msec (min) */
+
+/*************************** REGISTER ACCESS ********************************/
+
+/* Endpoint registers (other than dynfifo setup) can be accessed either
+ * directly with the "flat" model, or after setting up an index register.
+ */
+
+#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
+                || defined(CONFIG_ARCH_OMAP3430)
+/* REVISIT indexed access seemed to
+ * misbehave (on DaVinci) for at least peripheral IN ...
+ */
+#define MUSB_FLAT_REG
+#endif
+
+/* TUSB mapping: "flat" plus ep0 special cases */
+#if     defined(CONFIG_USB_TUSB6010)
+#define musb_ep_select(_mbase, _epnum) \
+        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
+#define MUSB_EP_OFFSET                  MUSB_TUSB_OFFSET
+
+/* "flat" mapping: each endpoint has its own i/o address */
+#elif   defined(MUSB_FLAT_REG)
+#define musb_ep_select(_mbase, _epnum)  (((void)(_mbase)), ((void)(_epnum)))
+#define MUSB_EP_OFFSET                  MUSB_FLAT_OFFSET
+
+/* "indexed" mapping: INDEX register controls register bank select */
+#else
+#define musb_ep_select(_mbase, _epnum) \
+        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
+#define MUSB_EP_OFFSET                  MUSB_INDEXED_OFFSET
+#endif
+
+/****************************** FUNCTIONS ********************************/
+
+#define MUSB_HST_MODE(_musb)\
+        { (_musb)->is_host = true; }
+#define MUSB_DEV_MODE(_musb) \
+        { (_musb)->is_host = false; }
+
+#define test_devctl_hst_mode(_x) \
+        (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
+
+#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
+
+/******************************** TYPES *************************************/
+
+/*
+ * struct musb_hw_ep - endpoint hardware (bidirectional)
+ *
+ * Ordered slightly for better cacheline locality.
+ */
+struct musb_hw_ep {
+        struct musb             *musb;
+        void __iomem            *fifo;
+        void __iomem            *regs;
+
+#ifdef CONFIG_USB_TUSB6010
+        void __iomem            *conf;
+#endif
+
+        /* index in musb->endpoints[]  */
+        u8                      epnum;
+
+        /* hardware configuration, possibly dynamic */
+        bool                    is_shared_fifo;
+        bool                    tx_double_buffered;
+        bool                    rx_double_buffered;
+        u16                     max_packet_sz_tx;
+        u16                     max_packet_sz_rx;
+
+        struct dma_channel      *tx_channel;
+        struct dma_channel      *rx_channel;
+
+#ifdef CONFIG_USB_TUSB6010
+        /* TUSB has "asynchronous" and "synchronous" dma modes */
+        dma_addr_t              fifo_async;
+        dma_addr_t              fifo_sync;
+        void __iomem            *fifo_sync_va;
+#endif
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        void __iomem            *target_regs;
+
+        /* currently scheduled peripheral endpoint */
+        struct musb_qh          *in_qh;
+        struct musb_qh          *out_qh;
+
+        u8                      rx_reinit;
+        u8                      tx_reinit;
+#endif
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+        /* peripheral side */
+        struct musb_ep          ep_in;                  /* TX */
+        struct musb_ep          ep_out;                 /* RX */
+#endif
+};
+
+static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
+{
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+        return next_request(&hw_ep->ep_in);
+#else
+        return NULL;
+#endif
+}
+
+static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
+{
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+        return next_request(&hw_ep->ep_out);
+#else
+        return NULL;
+#endif
+}
+
+/*
+ * struct musb - Driver instance data.
+ */
+struct musb {
+        /* device lock */
+        spinlock_t              lock;
+        struct clk              *clock;
+        irqreturn_t             (*isr)(int, void *);
+        struct work_struct      irq_work;
+
+/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
+#define MUSB_PORT_STAT_RESUME   (1 << 31)
+
+        u32                     port1_status;
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        unsigned long           rh_timer;
+
+        enum musb_h_ep0_state   ep0_stage;
+
+        /* bulk traffic normally dedicates endpoint hardware, and each
+         * direction has its own ring of host side endpoints.
+         * we try to progress the transfer at the head of each endpoint's
+         * queue until it completes or NAKs too much; then we try the next
+         * endpoint.
+         */
+        struct musb_hw_ep       *bulk_ep;
+
+        struct list_head        control;        /* of musb_qh */
+        struct list_head        in_bulk;        /* of musb_qh */
+        struct list_head        out_bulk;       /* of musb_qh */
+        struct musb_qh          *periodic[32];  /* tree of interrupt+iso */
+#endif
+
+        /* called with IRQs blocked; ON/nonzero implies starting a session,
+         * and waiting at least a_wait_vrise_tmout.
+         */
+        void                    (*board_set_vbus)(struct musb *, int is_on);
+
+        struct dma_controller   *dma_controller;
+
+        struct device           *controller;
+        void __iomem            *ctrl_base;
+        void __iomem            *mregs;
+
+#ifdef CONFIG_USB_TUSB6010
+        dma_addr_t              async;
+        dma_addr_t              sync;
+        void __iomem            *sync_va;
+#endif
+
+        /* passed down from chip/board specific irq handlers */
+        u8                      int_usb;
+        u16                     int_rx;
+        u16                     int_tx;
+
+        struct otg_transceiver  xceiv;
+
+        int nIrq;
+
+        struct musb_hw_ep        endpoints[MUSB_C_NUM_EPS];
+#define control_ep              endpoints
+
+#define VBUSERR_RETRY_COUNT     3
+        u16                     vbuserr_retry;
+        u16 epmask;
+        u8 nr_endpoints;
+
+        u8 board_mode;          /* enum musb_mode */
+        int                     (*board_set_power)(int state);
+
+        int                     (*set_clock)(struct clk *clk, int is_active);
+
+        u8                      min_power;      /* vbus for periph, in mA/2 */
+
+        bool                    is_host;
+
+        int                     a_wait_bcon;    /* VBUS timeout in msecs */
+        unsigned long           idle_timeout;   /* Next timeout in jiffies */
+
+        /* active means connected and not suspended */
+        unsigned                is_active:1;
+
+        unsigned is_multipoint:1;
+        unsigned ignore_disconnect:1;   /* during bus resets */
+
+#ifdef C_MP_TX
+        unsigned bulk_split:1;
+#define can_bulk_split(musb,type) \
+                (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
+#else
+#define can_bulk_split(musb, type)      0
+#endif
+
+#ifdef C_MP_RX
+        unsigned bulk_combine:1;
+#define can_bulk_combine(musb,type) \
+                (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
+#else
+#define can_bulk_combine(musb, type)    0
+#endif
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+        /* is_suspended means USB B_PERIPHERAL suspend */
+        unsigned                is_suspended:1;
+
+        /* may_wakeup means remote wakeup is enabled */
+        unsigned                may_wakeup:1;
+
+        /* is_self_powered is reported in device status and the
+         * config descriptor.  is_bus_powered means B_PERIPHERAL
+         * draws some VBUS current; both can be true.
+         */
+        unsigned                is_self_powered:1;
+        unsigned                is_bus_powered:1;
+
+        unsigned                set_address:1;
+        unsigned                test_mode:1;
+        unsigned                softconnect:1;
+
+        u8                      address;
+        u8                      test_mode_nr;
+        u16                     ackpend;                /* ep0 */
+        enum musb_g_ep0_state   ep0_state;
+        struct usb_gadget       g;                      /* the gadget */
+        struct usb_gadget_driver *gadget_driver;        /* its driver */
+#endif
+
+        struct musb_hdrc_config *config;
+
+#ifdef MUSB_CONFIG_PROC_FS
+        struct proc_dir_entry *proc_entry;
+#endif
+};
+
+static inline void musb_set_vbus(struct musb *musb, int is_on)
+{
+        musb->board_set_vbus(musb, is_on);
+}
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+static inline struct musb *gadget_to_musb(struct usb_gadget *g)
+{
+        return container_of(g, struct musb, g);
+}
+#endif
+
+
+/***************************** Glue it together *****************************/
+
+extern const char musb_driver_name[];
+
+extern void musb_start(struct musb *musb);
+extern void musb_stop(struct musb *musb);
+
+extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
+extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
+
+extern void musb_load_testpacket(struct musb *);
+
+extern irqreturn_t musb_interrupt(struct musb *);
+
+extern void musb_platform_enable(struct musb *musb);
+extern void musb_platform_disable(struct musb *musb);
+
+extern void musb_hnp_stop(struct musb *musb);
+
+extern void musb_platform_set_mode(struct musb *musb, u8 musb_mode);
+
+#if defined(CONFIG_USB_TUSB6010) || \
+        defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
+extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout);
+#else
+#define musb_platform_try_idle(x, y)            do {} while (0)
+#endif
+
+#ifdef CONFIG_USB_TUSB6010
+extern int musb_platform_get_vbus_status(struct musb *musb);
+#else
+#define musb_platform_get_vbus_status(x)        0
+#endif
+
+extern int __init musb_platform_init(struct musb *musb);
+extern int musb_platform_exit(struct musb *musb);
+
+/*-------------------------- ProcFS definitions ---------------------*/
+
+struct proc_dir_entry;
+
+#if (MUSB_DEBUG > 0) && defined(MUSB_CONFIG_PROC_FS)
+extern struct proc_dir_entry *musb_debug_create(char *name, struct musb *data);
+extern void musb_debug_delete(char *name, struct musb *data);
+
+#else
+static inline struct proc_dir_entry *
+musb_debug_create(char *name, struct musb *data)
+{
+        return NULL;
+}
+static inline void musb_debug_delete(char *name, struct musb *data)
+{
+}
+#endif
+
+#endif  /* __MUSB_CORE_H__ */
diff --git a/drivers/usb/musb/musb_debug.h b/drivers/usb/musb/musb_debug.h
new file mode 100644
index 000000000000..3bdb311e820d
--- /dev/null
+++ b/drivers/usb/musb/musb_debug.h
@@ -0,0 +1,66 @@
+/*
+ * MUSB OTG driver debug defines
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef __MUSB_LINUX_DEBUG_H__
+#define __MUSB_LINUX_DEBUG_H__
+
+#define yprintk(facility, format, args...) \
+        do { printk(facility "%s %d: " format , \
+        __func__, __LINE__ , ## args); } while (0)
+#define WARNING(fmt, args...) yprintk(KERN_WARNING, fmt, ## args)
+#define INFO(fmt, args...) yprintk(KERN_INFO, fmt, ## args)
+#define ERR(fmt, args...) yprintk(KERN_ERR, fmt, ## args)
+
+#define xprintk(level, facility, format, args...) do { \
+        if (_dbg_level(level)) { \
+                printk(facility "%s %d: " format , \
+                                __func__, __LINE__ , ## args); \
+        } } while (0)
+
+#if MUSB_DEBUG > 0
+extern unsigned debug;
+#else
+#define debug   0
+#endif
+
+static inline int _dbg_level(unsigned l)
+{
+        return debug >= l;
+}
+
+#define DBG(level, fmt, args...) xprintk(level, KERN_DEBUG, fmt, ## args)
+
+extern const char *otg_state_string(struct musb *);
+
+#endif                          /*  __MUSB_LINUX_DEBUG_H__ */
diff --git a/drivers/usb/musb/musb_dma.h b/drivers/usb/musb/musb_dma.h
new file mode 100644
index 000000000000..0a2c4e3602c1
--- /dev/null
+++ b/drivers/usb/musb/musb_dma.h
@@ -0,0 +1,172 @@
+/*
+ * MUSB OTG driver DMA controller abstraction
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef __MUSB_DMA_H__
+#define __MUSB_DMA_H__
+
+struct musb_hw_ep;
+
+/*
+ * DMA Controller Abstraction
+ *
+ * DMA Controllers are abstracted to allow use of a variety of different
+ * implementations of DMA, as allowed by the Inventra USB cores.  On the
+ * host side, usbcore sets up the DMA mappings and flushes caches; on the
+ * peripheral side, the gadget controller driver does.  Responsibilities
+ * of a DMA controller driver include:
+ *
+ *  - Handling the details of moving multiple USB packets
+ *    in cooperation with the Inventra USB core, including especially
+ *    the correct RX side treatment of short packets and buffer-full
+ *    states (both of which terminate transfers).
+ *
+ *  - Knowing the correlation between dma channels and the
+ *    Inventra core's local endpoint resources and data direction.
+ *
+ *  - Maintaining a list of allocated/available channels.
+ *
+ *  - Updating channel status on interrupts,
+ *    whether shared with the Inventra core or separate.
+ */
+
+#define DMA_ADDR_INVALID        (~(dma_addr_t)0)
+
+#ifndef CONFIG_MUSB_PIO_ONLY
+#define is_dma_capable()        (1)
+#else
+#define is_dma_capable()        (0)
+#endif
+
+#ifdef CONFIG_USB_TI_CPPI_DMA
+#define is_cppi_enabled()       1
+#else
+#define is_cppi_enabled()       0
+#endif
+
+#ifdef CONFIG_USB_TUSB_OMAP_DMA
+#define tusb_dma_omap()                 1
+#else
+#define tusb_dma_omap()                 0
+#endif
+
+/*
+ * DMA channel status ... updated by the dma controller driver whenever that
+ * status changes, and protected by the overall controller spinlock.
+ */
+enum dma_channel_status {
+        /* unallocated */
+        MUSB_DMA_STATUS_UNKNOWN,
+        /* allocated ... but not busy, no errors */
+        MUSB_DMA_STATUS_FREE,
+        /* busy ... transactions are active */
+        MUSB_DMA_STATUS_BUSY,
+        /* transaction(s) aborted due to ... dma or memory bus error */
+        MUSB_DMA_STATUS_BUS_ABORT,
+        /* transaction(s) aborted due to ... core error or USB fault */
+        MUSB_DMA_STATUS_CORE_ABORT
+};
+
+struct dma_controller;
+
+/**
+ * struct dma_channel - A DMA channel.
+ * @private_data: channel-private data
+ * @max_len: the maximum number of bytes the channel can move in one
+ *      transaction (typically representing many USB maximum-sized packets)
+ * @actual_len: how many bytes have been transferred
+ * @status: current channel status (updated e.g. on interrupt)
+ * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
+ *
+ * channels are associated with an endpoint for the duration of at least
+ * one usb transfer.
+ */
+struct dma_channel {
+        void                    *private_data;
+        /* FIXME not void* private_data, but a dma_controller * */
+        size_t                  max_len;
+        size_t                  actual_len;
+        enum dma_channel_status status;
+        bool                    desired_mode;
+};
+
+/*
+ * dma_channel_status - return status of dma channel
+ * @c: the channel
+ *
+ * Returns the software's view of the channel status.  If that status is BUSY
+ * then it's possible that the hardware has completed (or aborted) a transfer,
+ * so the driver needs to update that status.
+ */
+static inline enum dma_channel_status
+dma_channel_status(struct dma_channel *c)
+{
+        return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
+}
+
+/**
+ * struct dma_controller - A DMA Controller.
+ * @start: call this to start a DMA controller;
+ *      return 0 on success, else negative errno
+ * @stop: call this to stop a DMA controller
+ *      return 0 on success, else negative errno
+ * @channel_alloc: call this to allocate a DMA channel
+ * @channel_release: call this to release a DMA channel
+ * @channel_abort: call this to abort a pending DMA transaction,
+ *      returning it to FREE (but allocated) state
+ *
+ * Controllers manage dma channels.
+ */
+struct dma_controller {
+        int                     (*start)(struct dma_controller *);
+        int                     (*stop)(struct dma_controller *);
+        struct dma_channel      *(*channel_alloc)(struct dma_controller *,
+                                        struct musb_hw_ep *, u8 is_tx);
+        void                    (*channel_release)(struct dma_channel *);
+        int                     (*channel_program)(struct dma_channel *channel,
+                                                        u16 maxpacket, u8 mode,
+                                                        dma_addr_t dma_addr,
+                                                        u32 length);
+        int                     (*channel_abort)(struct dma_channel *);
+};
+
+/* called after channel_program(), may indicate a fault */
+extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
+
+
+extern struct dma_controller *__init
+dma_controller_create(struct musb *, void __iomem *);
+
+extern void dma_controller_destroy(struct dma_controller *);
+
+#endif  /* __MUSB_DMA_H__ */
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
new file mode 100644
index 000000000000..d6a802c224fa
--- /dev/null
+++ b/drivers/usb/musb/musb_gadget.c
@@ -0,0 +1,2031 @@
+/*
+ * MUSB OTG driver peripheral support
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/module.h>
+#include <linux/smp.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/moduleparam.h>
+#include <linux/stat.h>
+#include <linux/dma-mapping.h>
+
+#include "musb_core.h"
+
+
+/* MUSB PERIPHERAL status 3-mar-2006:
+ *
+ * - EP0 seems solid.  It passes both USBCV and usbtest control cases.
+ *   Minor glitches:
+ *
+ *     + remote wakeup to Linux hosts work, but saw USBCV failures;
+ *       in one test run (operator error?)
+ *     + endpoint halt tests -- in both usbtest and usbcv -- seem
+ *       to break when dma is enabled ... is something wrongly
+ *       clearing SENDSTALL?
+ *
+ * - Mass storage behaved ok when last tested.  Network traffic patterns
+ *   (with lots of short transfers etc) need retesting; they turn up the
+ *   worst cases of the DMA, since short packets are typical but are not
+ *   required.
+ *
+ * - TX/IN
+ *     + both pio and dma behave in with network and g_zero tests
+ *     + no cppi throughput issues other than no-hw-queueing
+ *     + failed with FLAT_REG (DaVinci)
+ *     + seems to behave with double buffering, PIO -and- CPPI
+ *     + with gadgetfs + AIO, requests got lost?
+ *
+ * - RX/OUT
+ *     + both pio and dma behave in with network and g_zero tests
+ *     + dma is slow in typical case (short_not_ok is clear)
+ *     + double buffering ok with PIO
+ *     + double buffering *FAILS* with CPPI, wrong data bytes sometimes
+ *     + request lossage observed with gadgetfs
+ *
+ * - ISO not tested ... might work, but only weakly isochronous
+ *
+ * - Gadget driver disabling of softconnect during bind() is ignored; so
+ *   drivers can't hold off host requests until userspace is ready.
+ *   (Workaround:  they can turn it off later.)
+ *
+ * - PORTABILITY (assumes PIO works):
+ *     + DaVinci, basically works with cppi dma
+ *     + OMAP 2430, ditto with mentor dma
+ *     + TUSB 6010, platform-specific dma in the works
+ */
+
+/* ----------------------------------------------------------------------- */
+
+/*
+ * Immediately complete a request.
+ *
+ * @param request the request to complete
+ * @param status the status to complete the request with
+ * Context: controller locked, IRQs blocked.
+ */
+void musb_g_giveback(
+        struct musb_ep          *ep,
+        struct usb_request      *request,
+        int                     status)
+__releases(ep->musb->lock)
+__acquires(ep->musb->lock)
+{
+        struct musb_request     *req;
+        struct musb             *musb;
+        int                     busy = ep->busy;
+
+        req = to_musb_request(request);
+
+        list_del(&request->list);
+        if (req->request.status == -EINPROGRESS)
+                req->request.status = status;
+        musb = req->musb;
+
+        ep->busy = 1;
+        spin_unlock(&musb->lock);
+        if (is_dma_capable()) {
+                if (req->mapped) {
+                        dma_unmap_single(musb->controller,
+                                        req->request.dma,
+                                        req->request.length,
+                                        req->tx
+                                                ? DMA_TO_DEVICE
+                                                : DMA_FROM_DEVICE);
+                        req->request.dma = DMA_ADDR_INVALID;
+                        req->mapped = 0;
+                } else if (req->request.dma != DMA_ADDR_INVALID)
+                        dma_sync_single_for_cpu(musb->controller,
+                                        req->request.dma,
+                                        req->request.length,
+                                        req->tx
+                                                ? DMA_TO_DEVICE
+                                                : DMA_FROM_DEVICE);
+        }
+        if (request->status == 0)
+                DBG(5, "%s done request %p,  %d/%d\n",
+                                ep->end_point.name, request,
+                                req->request.actual, req->request.length);
+        else
+                DBG(2, "%s request %p, %d/%d fault %d\n",
+                                ep->end_point.name, request,
+                                req->request.actual, req->request.length,
+                                request->status);
+        req->request.complete(&req->ep->end_point, &req->request);
+        spin_lock(&musb->lock);
+        ep->busy = busy;
+}
+
+/* ----------------------------------------------------------------------- */
+
+/*
+ * Abort requests queued to an endpoint using the status. Synchronous.
+ * caller locked controller and blocked irqs, and selected this ep.
+ */
+static void nuke(struct musb_ep *ep, const int status)
+{
+        struct musb_request     *req = NULL;
+        void __iomem *epio = ep->musb->endpoints[ep->current_epnum].regs;
+
+        ep->busy = 1;
+
+        if (is_dma_capable() && ep->dma) {
+                struct dma_controller   *c = ep->musb->dma_controller;
+                int value;
+                if (ep->is_in) {
+                        musb_writew(epio, MUSB_TXCSR,
+                                        0 | MUSB_TXCSR_FLUSHFIFO);
+                        musb_writew(epio, MUSB_TXCSR,
+                                        0 | MUSB_TXCSR_FLUSHFIFO);
+                } else {
+                        musb_writew(epio, MUSB_RXCSR,
+                                        0 | MUSB_RXCSR_FLUSHFIFO);
+                        musb_writew(epio, MUSB_RXCSR,
+                                        0 | MUSB_RXCSR_FLUSHFIFO);
+                }
+
+                value = c->channel_abort(ep->dma);
+                DBG(value ? 1 : 6, "%s: abort DMA --> %d\n", ep->name, value);
+                c->channel_release(ep->dma);
+                ep->dma = NULL;
+        }
+
+        while (!list_empty(&(ep->req_list))) {
+                req = container_of(ep->req_list.next, struct musb_request,
+                                request.list);
+                musb_g_giveback(ep, &req->request, status);
+        }
+}
+
+/* ----------------------------------------------------------------------- */
+
+/* Data transfers - pure PIO, pure DMA, or mixed mode */
+
+/*
+ * This assumes the separate CPPI engine is responding to DMA requests
+ * from the usb core ... sequenced a bit differently from mentor dma.
+ */
+
+static inline int max_ep_writesize(struct musb *musb, struct musb_ep *ep)
+{
+        if (can_bulk_split(musb, ep->type))
+                return ep->hw_ep->max_packet_sz_tx;
+        else
+                return ep->packet_sz;
+}
+
+
+#ifdef CONFIG_USB_INVENTRA_DMA
+
+/* Peripheral tx (IN) using Mentor DMA works as follows:
+        Only mode 0 is used for transfers <= wPktSize,
+        mode 1 is used for larger transfers,
+
+        One of the following happens:
+        - Host sends IN token which causes an endpoint interrupt
+                -> TxAvail
+                        -> if DMA is currently busy, exit.
+                        -> if queue is non-empty, txstate().
+
+        - Request is queued by the gadget driver.
+                -> if queue was previously empty, txstate()
+
+        txstate()
+                -> start
+                  /\    -> setup DMA
+                  |     (data is transferred to the FIFO, then sent out when
+                  |     IN token(s) are recd from Host.
+                  |             -> DMA interrupt on completion
+                  |                calls TxAvail.
+                  |                   -> stop DMA, ~DmaEenab,
+                  |                   -> set TxPktRdy for last short pkt or zlp
+                  |                   -> Complete Request
+                  |                   -> Continue next request (call txstate)
+                  |___________________________________|
+
+ * Non-Mentor DMA engines can of course work differently, such as by
+ * upleveling from irq-per-packet to irq-per-buffer.
+ */
+
+#endif
+
+/*
+ * An endpoint is transmitting data. This can be called either from
+ * the IRQ routine or from ep.queue() to kickstart a request on an
+ * endpoint.
+ *
+ * Context: controller locked, IRQs blocked, endpoint selected
+ */
+static void txstate(struct musb *musb, struct musb_request *req)
+{
+        u8                      epnum = req->epnum;
+        struct musb_ep          *musb_ep;
+        void __iomem            *epio = musb->endpoints[epnum].regs;
+        struct usb_request      *request;
+        u16                     fifo_count = 0, csr;
+        int                     use_dma = 0;
+
+        musb_ep = req->ep;
+
+        /* we shouldn't get here while DMA is active ... but we do ... */
+        if (dma_channel_status(musb_ep->dma) == MUSB_DMA_STATUS_BUSY) {
+                DBG(4, "dma pending...\n");
+                return;
+        }
+
+        /* read TXCSR before */
+        csr = musb_readw(epio, MUSB_TXCSR);
+
+        request = &req->request;
+        fifo_count = min(max_ep_writesize(musb, musb_ep),
+                        (int)(request->length - request->actual));
+
+        if (csr & MUSB_TXCSR_TXPKTRDY) {
+                DBG(5, "%s old packet still ready , txcsr %03x\n",
+                                musb_ep->end_point.name, csr);
+                return;
+        }
+
+        if (csr & MUSB_TXCSR_P_SENDSTALL) {
+                DBG(5, "%s stalling, txcsr %03x\n",
+                                musb_ep->end_point.name, csr);
+                return;
+        }
+
+        DBG(4, "hw_ep%d, maxpacket %d, fifo count %d, txcsr %03x\n",
+                        epnum, musb_ep->packet_sz, fifo_count,
+                        csr);
+
+#ifndef CONFIG_MUSB_PIO_ONLY
+        if (is_dma_capable() && musb_ep->dma) {
+                struct dma_controller   *c = musb->dma_controller;
+
+                use_dma = (request->dma != DMA_ADDR_INVALID);
+
+                /* MUSB_TXCSR_P_ISO is still set correctly */
+
+#ifdef CONFIG_USB_INVENTRA_DMA
+                {
+                        size_t request_size;
+
+                        /* setup DMA, then program endpoint CSR */
+                        request_size = min(request->length,
+                                                musb_ep->dma->max_len);
+                        if (request_size <= musb_ep->packet_sz)
+                                musb_ep->dma->desired_mode = 0;
+                        else
+                                musb_ep->dma->desired_mode = 1;
+
+                        use_dma = use_dma && c->channel_program(
+                                        musb_ep->dma, musb_ep->packet_sz,
+                                        musb_ep->dma->desired_mode,
+                                        request->dma, request_size);
+                        if (use_dma) {
+                                if (musb_ep->dma->desired_mode == 0) {
+                                        /* ASSERT: DMAENAB is clear */
+                                        csr &= ~(MUSB_TXCSR_AUTOSET |
+                                                        MUSB_TXCSR_DMAMODE);
+                                        csr |= (MUSB_TXCSR_DMAENAB |
+                                                        MUSB_TXCSR_MODE);
+                                        /* against programming guide */
+                                } else
+                                        csr |= (MUSB_TXCSR_AUTOSET
+                                                        | MUSB_TXCSR_DMAENAB
+                                                        | MUSB_TXCSR_DMAMODE
+                                                        | MUSB_TXCSR_MODE);
+
+                                csr &= ~MUSB_TXCSR_P_UNDERRUN;
+                                musb_writew(epio, MUSB_TXCSR, csr);
+                        }
+                }
+
+#elif defined(CONFIG_USB_TI_CPPI_DMA)
+                /* program endpoint CSR first, then setup DMA */
+                csr &= ~(MUSB_TXCSR_AUTOSET
+                                | MUSB_TXCSR_DMAMODE
+                                | MUSB_TXCSR_P_UNDERRUN
+                                | MUSB_TXCSR_TXPKTRDY);
+                csr |= MUSB_TXCSR_MODE | MUSB_TXCSR_DMAENAB;
+                musb_writew(epio, MUSB_TXCSR,
+                        (MUSB_TXCSR_P_WZC_BITS & ~MUSB_TXCSR_P_UNDERRUN)
+                                | csr);
+
+                /* ensure writebuffer is empty */
+                csr = musb_readw(epio, MUSB_TXCSR);
+
+                /* NOTE host side sets DMAENAB later than this; both are
+                 * OK since the transfer dma glue (between CPPI and Mentor
+                 * fifos) just tells CPPI it could start.  Data only moves
+                 * to the USB TX fifo when both fifos are ready.
+                 */
+
+                /* "mode" is irrelevant here; handle terminating ZLPs like
+                 * PIO does, since the hardware RNDIS mode seems unreliable
+                 * except for the last-packet-is-already-short case.
+                 */
+                use_dma = use_dma && c->channel_program(
+                                musb_ep->dma, musb_ep->packet_sz,
+                                0,
+                                request->dma,
+                                request->length);
+                if (!use_dma) {
+                        c->channel_release(musb_ep->dma);
+                        musb_ep->dma = NULL;
+                        /* ASSERT: DMAENAB clear */
+                        csr &= ~(MUSB_TXCSR_DMAMODE | MUSB_TXCSR_MODE);
+                        /* invariant: prequest->buf is non-null */
+                }
+#elif defined(CONFIG_USB_TUSB_OMAP_DMA)
+                use_dma = use_dma && c->channel_program(
+                                musb_ep->dma, musb_ep->packet_sz,
+                                request->zero,
+                                request->dma,
+                                request->length);
+#endif
+        }
+#endif
+
+        if (!use_dma) {
+                musb_write_fifo(musb_ep->hw_ep, fifo_count,
+                                (u8 *) (request->buf + request->actual));
+                request->actual += fifo_count;
+                csr |= MUSB_TXCSR_TXPKTRDY;
+                csr &= ~MUSB_TXCSR_P_UNDERRUN;
+                musb_writew(epio, MUSB_TXCSR, csr);
+        }
+
+        /* host may already have the data when this message shows... */
+        DBG(3, "%s TX/IN %s len %d/%d, txcsr %04x, fifo %d/%d\n",
+                        musb_ep->end_point.name, use_dma ? "dma" : "pio",
+                        request->actual, request->length,
+                        musb_readw(epio, MUSB_TXCSR),
+                        fifo_count,
+                        musb_readw(epio, MUSB_TXMAXP));
+}
+
+/*
+ * FIFO state update (e.g. data ready).
+ * Called from IRQ,  with controller locked.
+ */
+void musb_g_tx(struct musb *musb, u8 epnum)
+{
+        u16                     csr;
+        struct usb_request      *request;
+        u8 __iomem              *mbase = musb->mregs;
+        struct musb_ep          *musb_ep = &musb->endpoints[epnum].ep_in;
+        void __iomem            *epio = musb->endpoints[epnum].regs;
+        struct dma_channel      *dma;
+
+        musb_ep_select(mbase, epnum);
+        request = next_request(musb_ep);
+
+        csr = musb_readw(epio, MUSB_TXCSR);
+        DBG(4, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr);
+
+        dma = is_dma_capable() ? musb_ep->dma : NULL;
+        do {
+                /* REVISIT for high bandwidth, MUSB_TXCSR_P_INCOMPTX
+                 * probably rates reporting as a host error
+                 */
+                if (csr & MUSB_TXCSR_P_SENTSTALL) {
+                        csr |= MUSB_TXCSR_P_WZC_BITS;
+                        csr &= ~MUSB_TXCSR_P_SENTSTALL;
+                        musb_writew(epio, MUSB_TXCSR, csr);
+                        if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
+                                dma->status = MUSB_DMA_STATUS_CORE_ABORT;
+                                musb->dma_controller->channel_abort(dma);
+                        }
+
+                        if (request)
+                                musb_g_giveback(musb_ep, request, -EPIPE);
+
+                        break;
+                }
+
+                if (csr & MUSB_TXCSR_P_UNDERRUN) {
+                        /* we NAKed, no big deal ... little reason to care */
+                        csr |= MUSB_TXCSR_P_WZC_BITS;
+                        csr &= ~(MUSB_TXCSR_P_UNDERRUN
+                                        | MUSB_TXCSR_TXPKTRDY);
+                        musb_writew(epio, MUSB_TXCSR, csr);
+                        DBG(20, "underrun on ep%d, req %p\n", epnum, request);
+                }
+
+                if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
+                        /* SHOULD NOT HAPPEN ... has with cppi though, after
+                         * changing SENDSTALL (and other cases); harmless?
+                         */
+                        DBG(5, "%s dma still busy?\n", musb_ep->end_point.name);
+                        break;
+                }
+
+                if (request) {
+                        u8      is_dma = 0;
+
+                        if (dma && (csr & MUSB_TXCSR_DMAENAB)) {
+                                is_dma = 1;
+                                csr |= MUSB_TXCSR_P_WZC_BITS;
+                                csr &= ~(MUSB_TXCSR_DMAENAB
+                                                | MUSB_TXCSR_P_UNDERRUN
+                                                | MUSB_TXCSR_TXPKTRDY);
+                                musb_writew(epio, MUSB_TXCSR, csr);
+                                /* ensure writebuffer is empty */
+                                csr = musb_readw(epio, MUSB_TXCSR);
+                                request->actual += musb_ep->dma->actual_len;
+                                DBG(4, "TXCSR%d %04x, dma off, "
+                                                "len %zu, req %p\n",
+                                        epnum, csr,
+                                        musb_ep->dma->actual_len,
+                                        request);
+                        }
+
+                        if (is_dma || request->actual == request->length) {
+
+                                /* First, maybe a terminating short packet.
+                                 * Some DMA engines might handle this by
+                                 * themselves.
+                                 */
+                                if ((request->zero
+                                                && request->length
+                                                && (request->length
+                                                        % musb_ep->packet_sz)
+                                                        == 0)
+#ifdef CONFIG_USB_INVENTRA_DMA
+                                        || (is_dma &&
+                                                ((!dma->desired_mode) ||
+                                                    (request->actual &
+                                                    (musb_ep->packet_sz - 1))))
+#endif
+                                ) {
+                                        /* on dma completion, fifo may not
+                                         * be available yet ...
+                                         */
+                                        if (csr & MUSB_TXCSR_TXPKTRDY)
+                                                break;
+
+                                        DBG(4, "sending zero pkt\n");
+                                        musb_writew(epio, MUSB_TXCSR,
+                                                        MUSB_TXCSR_MODE
+                                                        | MUSB_TXCSR_TXPKTRDY);
+                                        request->zero = 0;
+                                }
+
+                                /* ... or if not, then complete it */
+                                musb_g_giveback(musb_ep, request, 0);
+
+                                /* kickstart next transfer if appropriate;
+                                 * the packet that just completed might not
+                                 * be transmitted for hours or days.
+                                 * REVISIT for double buffering...
+                                 * FIXME revisit for stalls too...
+                                 */
+                                musb_ep_select(mbase, epnum);
+                                csr = musb_readw(epio, MUSB_TXCSR);
+                                if (csr & MUSB_TXCSR_FIFONOTEMPTY)
+                                        break;
+                                request = musb_ep->desc
+                                                ? next_request(musb_ep)
+                                                : NULL;
+                                if (!request) {
+                                        DBG(4, "%s idle now\n",
+                                                musb_ep->end_point.name);
+                                        break;
+                                }
+                        }
+
+                        txstate(musb, to_musb_request(request));
+                }
+
+        } while (0);
+}
+
+/* ------------------------------------------------------------ */
+
+#ifdef CONFIG_USB_INVENTRA_DMA
+
+/* Peripheral rx (OUT) using Mentor DMA works as follows:
+        - Only mode 0 is used.
+
+        - Request is queued by the gadget class driver.
+                -> if queue was previously empty, rxstate()
+
+        - Host sends OUT token which causes an endpoint interrupt
+          /\      -> RxReady
+          |           -> if request queued, call rxstate
+          |             /\      -> setup DMA
+          |             |            -> DMA interrupt on completion
+          |             |               -> RxReady
+          |             |                     -> stop DMA
+          |             |                     -> ack the read
+          |             |                     -> if data recd = max expected
+          |             |                               by the request, or host
+          |             |                               sent a short packet,
+          |             |                               complete the request,
+          |             |                               and start the next one.
+          |             |_____________________________________|
+          |                                      else just wait for the host
+          |                                         to send the next OUT token.
+          |__________________________________________________|
+
+ * Non-Mentor DMA engines can of course work differently.
+ */
+
+#endif
+
+/*
+ * Context: controller locked, IRQs blocked, endpoint selected
+ */
+static void rxstate(struct musb *musb, struct musb_request *req)
+{
+        u16                     csr = 0;
+        const u8                epnum = req->epnum;
+        struct usb_request      *request = &req->request;
+        struct musb_ep          *musb_ep = &musb->endpoints[epnum].ep_out;
+        void __iomem            *epio = musb->endpoints[epnum].regs;
+        u16                     fifo_count = 0;
+        u16                     len = musb_ep->packet_sz;
+
+        csr = musb_readw(epio, MUSB_RXCSR);
+
+        if (is_cppi_enabled() && musb_ep->dma) {
+                struct dma_controller   *c = musb->dma_controller;
+                struct dma_channel      *channel = musb_ep->dma;
+
+                /* NOTE:  CPPI won't actually stop advancing the DMA
+                 * queue after short packet transfers, so this is almost
+                 * always going to run as IRQ-per-packet DMA so that
+                 * faults will be handled correctly.
+                 */
+                if (c->channel_program(channel,
+                                musb_ep->packet_sz,
+                                !request->short_not_ok,
+                                request->dma + request->actual,
+                                request->length - request->actual)) {
+
+                        /* make sure that if an rxpkt arrived after the irq,
+                         * the cppi engine will be ready to take it as soon
+                         * as DMA is enabled
+                         */
+                        csr &= ~(MUSB_RXCSR_AUTOCLEAR
+                                        | MUSB_RXCSR_DMAMODE);
+                        csr |= MUSB_RXCSR_DMAENAB | MUSB_RXCSR_P_WZC_BITS;
+                        musb_writew(epio, MUSB_RXCSR, csr);
+                        return;
+                }
+        }
+
+        if (csr & MUSB_RXCSR_RXPKTRDY) {
+                len = musb_readw(epio, MUSB_RXCOUNT);
+                if (request->actual < request->length) {
+#ifdef CONFIG_USB_INVENTRA_DMA
+                        if (is_dma_capable() && musb_ep->dma) {
+                                struct dma_controller   *c;
+                                struct dma_channel      *channel;
+                                int                     use_dma = 0;
+
+                                c = musb->dma_controller;
+                                channel = musb_ep->dma;
+
+        /* We use DMA Req mode 0 in rx_csr, and DMA controller operates in
+         * mode 0 only. So we do not get endpoint interrupts due to DMA
+         * completion. We only get interrupts from DMA controller.
+         *
+         * We could operate in DMA mode 1 if we knew the size of the tranfer
+         * in advance. For mass storage class, request->length = what the host
+         * sends, so that'd work.  But for pretty much everything else,
+         * request->length is routinely more than what the host sends. For
+         * most these gadgets, end of is signified either by a short packet,
+         * or filling the last byte of the buffer.  (Sending extra data in
+         * that last pckate should trigger an overflow fault.)  But in mode 1,
+         * we don't get DMA completion interrrupt for short packets.
+         *
+         * Theoretically, we could enable DMAReq irq (MUSB_RXCSR_DMAMODE = 1),
+         * to get endpoint interrupt on every DMA req, but that didn't seem
+         * to work reliably.
+         *
+         * REVISIT an updated g_file_storage can set req->short_not_ok, which
+         * then becomes usable as a runtime "use mode 1" hint...
+         */
+
+                                csr |= MUSB_RXCSR_DMAENAB;
+#ifdef USE_MODE1
+                                csr |= MUSB_RXCSR_AUTOCLEAR;
+                                /* csr |= MUSB_RXCSR_DMAMODE; */
+
+                                /* this special sequence (enabling and then
+                                 * disabling MUSB_RXCSR_DMAMODE) is required
+                                 * to get DMAReq to activate
+                                 */
+                                musb_writew(epio, MUSB_RXCSR,
+                                        csr | MUSB_RXCSR_DMAMODE);
+#endif
+                                musb_writew(epio, MUSB_RXCSR, csr);
+
+                                if (request->actual < request->length) {
+                                        int transfer_size = 0;
+#ifdef USE_MODE1
+                                        transfer_size = min(request->length,
+                                                        channel->max_len);
+#else
+                                        transfer_size = len;
+#endif
+                                        if (transfer_size <= musb_ep->packet_sz)
+                                                musb_ep->dma->desired_mode = 0;
+                                        else
+                                                musb_ep->dma->desired_mode = 1;
+
+                                        use_dma = c->channel_program(
+                                                        channel,
+                                                        musb_ep->packet_sz,
+                                                        channel->desired_mode,
+                                                        request->dma
+                                                        + request->actual,
+                                                        transfer_size);
+                                }
+
+                                if (use_dma)
+                                        return;
+                        }
+#endif  /* Mentor's DMA */
+
+                        fifo_count = request->length - request->actual;
+                        DBG(3, "%s OUT/RX pio fifo %d/%d, maxpacket %d\n",
+                                        musb_ep->end_point.name,
+                                        len, fifo_count,
+                                        musb_ep->packet_sz);
+
+                        fifo_count = min(len, fifo_count);
+
+#ifdef  CONFIG_USB_TUSB_OMAP_DMA
+                        if (tusb_dma_omap() && musb_ep->dma) {
+                                struct dma_controller *c = musb->dma_controller;
+                                struct dma_channel *channel = musb_ep->dma;
+                                u32 dma_addr = request->dma + request->actual;
+                                int ret;
+
+                                ret = c->channel_program(channel,
+                                                musb_ep->packet_sz,
+                                                channel->desired_mode,
+                                                dma_addr,
+                                                fifo_count);
+                                if (ret)
+                                        return;
+                        }
+#endif
+
+                        musb_read_fifo(musb_ep->hw_ep, fifo_count, (u8 *)
+                                        (request->buf + request->actual));
+                        request->actual += fifo_count;
+
+                        /* REVISIT if we left anything in the fifo, flush
+                         * it and report -EOVERFLOW
+                         */
+
+                        /* ack the read! */
+                        csr |= MUSB_RXCSR_P_WZC_BITS;
+                        csr &= ~MUSB_RXCSR_RXPKTRDY;
+                        musb_writew(epio, MUSB_RXCSR, csr);
+                }
+        }
+
+        /* reach the end or short packet detected */
+        if (request->actual == request->length || len < musb_ep->packet_sz)
+                musb_g_giveback(musb_ep, request, 0);
+}
+
+/*
+ * Data ready for a request; called from IRQ
+ */
+void musb_g_rx(struct musb *musb, u8 epnum)
+{
+        u16                     csr;
+        struct usb_request      *request;
+        void __iomem            *mbase = musb->mregs;
+        struct musb_ep          *musb_ep = &musb->endpoints[epnum].ep_out;
+        void __iomem            *epio = musb->endpoints[epnum].regs;
+        struct dma_channel      *dma;
+
+        musb_ep_select(mbase, epnum);
+
+        request = next_request(musb_ep);
+
+        csr = musb_readw(epio, MUSB_RXCSR);
+        dma = is_dma_capable() ? musb_ep->dma : NULL;
+
+        DBG(4, "<== %s, rxcsr %04x%s %p\n", musb_ep->end_point.name,
+                        csr, dma ? " (dma)" : "", request);
+
+        if (csr & MUSB_RXCSR_P_SENTSTALL) {
+                if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
+                        dma->status = MUSB_DMA_STATUS_CORE_ABORT;
+                        (void) musb->dma_controller->channel_abort(dma);
+                        request->actual += musb_ep->dma->actual_len;
+                }
+
+                csr |= MUSB_RXCSR_P_WZC_BITS;
+                csr &= ~MUSB_RXCSR_P_SENTSTALL;
+                musb_writew(epio, MUSB_RXCSR, csr);
+
+                if (request)
+                        musb_g_giveback(musb_ep, request, -EPIPE);
+                goto done;
+        }
+
+        if (csr & MUSB_RXCSR_P_OVERRUN) {
+                /* csr |= MUSB_RXCSR_P_WZC_BITS; */
+                csr &= ~MUSB_RXCSR_P_OVERRUN;
+                musb_writew(epio, MUSB_RXCSR, csr);
+
+                DBG(3, "%s iso overrun on %p\n", musb_ep->name, request);
+                if (request && request->status == -EINPROGRESS)
+                        request->status = -EOVERFLOW;
+        }
+        if (csr & MUSB_RXCSR_INCOMPRX) {
+                /* REVISIT not necessarily an error */
+                DBG(4, "%s, incomprx\n", musb_ep->end_point.name);
+        }
+
+        if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
+                /* "should not happen"; likely RXPKTRDY pending for DMA */
+                DBG((csr & MUSB_RXCSR_DMAENAB) ? 4 : 1,
+                        "%s busy, csr %04x\n",
+                        musb_ep->end_point.name, csr);
+                goto done;
+        }
+
+        if (dma && (csr & MUSB_RXCSR_DMAENAB)) {
+                csr &= ~(MUSB_RXCSR_AUTOCLEAR
+                                | MUSB_RXCSR_DMAENAB
+                                | MUSB_RXCSR_DMAMODE);
+                musb_writew(epio, MUSB_RXCSR,
+                        MUSB_RXCSR_P_WZC_BITS | csr);
+
+                request->actual += musb_ep->dma->actual_len;
+
+                DBG(4, "RXCSR%d %04x, dma off, %04x, len %zu, req %p\n",
+                        epnum, csr,
+                        musb_readw(epio, MUSB_RXCSR),
+                        musb_ep->dma->actual_len, request);
+
+#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_TUSB_OMAP_DMA)
+                /* Autoclear doesn't clear RxPktRdy for short packets */
+                if ((dma->desired_mode == 0)
+                                || (dma->actual_len
+                                        & (musb_ep->packet_sz - 1))) {
+                        /* ack the read! */
+                        csr &= ~MUSB_RXCSR_RXPKTRDY;
+                        musb_writew(epio, MUSB_RXCSR, csr);
+                }
+
+                /* incomplete, and not short? wait for next IN packet */
+                if ((request->actual < request->length)
+                                && (musb_ep->dma->actual_len
+                                        == musb_ep->packet_sz))
+                        goto done;
+#endif
+                musb_g_giveback(musb_ep, request, 0);
+
+                request = next_request(musb_ep);
+                if (!request)
+                        goto done;
+
+                /* don't start more i/o till the stall clears */
+                musb_ep_select(mbase, epnum);
+                csr = musb_readw(epio, MUSB_RXCSR);
+                if (csr & MUSB_RXCSR_P_SENDSTALL)
+                        goto done;
+        }
+
+
+        /* analyze request if the ep is hot */
+        if (request)
+                rxstate(musb, to_musb_request(request));
+        else
+                DBG(3, "packet waiting for %s%s request\n",
+                                musb_ep->desc ? "" : "inactive ",
+                                musb_ep->end_point.name);
+
+done:
+        return;
+}
+
+/* ------------------------------------------------------------ */
+
+static int musb_gadget_enable(struct usb_ep *ep,
+                        const struct usb_endpoint_descriptor *desc)
+{
+        unsigned long           flags;
+        struct musb_ep          *musb_ep;
+        struct musb_hw_ep       *hw_ep;
+        void __iomem            *regs;
+        struct musb             *musb;
+        void __iomem    *mbase;
+        u8              epnum;
+        u16             csr;
+        unsigned        tmp;
+        int             status = -EINVAL;
+
+        if (!ep || !desc)
+                return -EINVAL;
+
+        musb_ep = to_musb_ep(ep);
+        hw_ep = musb_ep->hw_ep;
+        regs = hw_ep->regs;
+        musb = musb_ep->musb;
+        mbase = musb->mregs;
+        epnum = musb_ep->current_epnum;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if (musb_ep->desc) {
+                status = -EBUSY;
+                goto fail;
+        }
+        musb_ep->type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
+
+        /* check direction and (later) maxpacket size against endpoint */
+        if ((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != epnum)
+                goto fail;
+
+        /* REVISIT this rules out high bandwidth periodic transfers */
+        tmp = le16_to_cpu(desc->wMaxPacketSize);
+        if (tmp & ~0x07ff)
+                goto fail;
+        musb_ep->packet_sz = tmp;
+
+        /* enable the interrupts for the endpoint, set the endpoint
+         * packet size (or fail), set the mode, clear the fifo
+         */
+        musb_ep_select(mbase, epnum);
+        if (desc->bEndpointAddress & USB_DIR_IN) {
+                u16 int_txe = musb_readw(mbase, MUSB_INTRTXE);
+
+                if (hw_ep->is_shared_fifo)
+                        musb_ep->is_in = 1;
+                if (!musb_ep->is_in)
+                        goto fail;
+                if (tmp > hw_ep->max_packet_sz_tx)
+                        goto fail;
+
+                int_txe |= (1 << epnum);
+                musb_writew(mbase, MUSB_INTRTXE, int_txe);
+
+                /* REVISIT if can_bulk_split(), use by updating "tmp";
+                 * likewise high bandwidth periodic tx
+                 */
+                musb_writew(regs, MUSB_TXMAXP, tmp);
+
+                csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG;
+                if (musb_readw(regs, MUSB_TXCSR)
+                                & MUSB_TXCSR_FIFONOTEMPTY)
+                        csr |= MUSB_TXCSR_FLUSHFIFO;
+                if (musb_ep->type == USB_ENDPOINT_XFER_ISOC)
+                        csr |= MUSB_TXCSR_P_ISO;
+
+                /* set twice in case of double buffering */
+                musb_writew(regs, MUSB_TXCSR, csr);
+                /* REVISIT may be inappropriate w/o FIFONOTEMPTY ... */
+                musb_writew(regs, MUSB_TXCSR, csr);
+
+        } else {
+                u16 int_rxe = musb_readw(mbase, MUSB_INTRRXE);
+
+                if (hw_ep->is_shared_fifo)
+                        musb_ep->is_in = 0;
+                if (musb_ep->is_in)
+                        goto fail;
+                if (tmp > hw_ep->max_packet_sz_rx)
+                        goto fail;
+
+                int_rxe |= (1 << epnum);
+                musb_writew(mbase, MUSB_INTRRXE, int_rxe);
+
+                /* REVISIT if can_bulk_combine() use by updating "tmp"
+                 * likewise high bandwidth periodic rx
+                 */
+                musb_writew(regs, MUSB_RXMAXP, tmp);
+
+                /* force shared fifo to OUT-only mode */
+                if (hw_ep->is_shared_fifo) {
+                        csr = musb_readw(regs, MUSB_TXCSR);
+                        csr &= ~(MUSB_TXCSR_MODE | MUSB_TXCSR_TXPKTRDY);
+                        musb_writew(regs, MUSB_TXCSR, csr);
+                }
+
+                csr = MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_CLRDATATOG;
+                if (musb_ep->type == USB_ENDPOINT_XFER_ISOC)
+                        csr |= MUSB_RXCSR_P_ISO;
+                else if (musb_ep->type == USB_ENDPOINT_XFER_INT)
+                        csr |= MUSB_RXCSR_DISNYET;
+
+                /* set twice in case of double buffering */
+                musb_writew(regs, MUSB_RXCSR, csr);
+                musb_writew(regs, MUSB_RXCSR, csr);
+        }
+
+        /* NOTE:  all the I/O code _should_ work fine without DMA, in case
+         * for some reason you run out of channels here.
+         */
+        if (is_dma_capable() && musb->dma_controller) {
+                struct dma_controller   *c = musb->dma_controller;
+
+                musb_ep->dma = c->channel_alloc(c, hw_ep,
+                                (desc->bEndpointAddress & USB_DIR_IN));
+        } else
+                musb_ep->dma = NULL;
+
+        musb_ep->desc = desc;
+        musb_ep->busy = 0;
+        status = 0;
+
+        pr_debug("%s periph: enabled %s for %s %s, %smaxpacket %d\n",
+                        musb_driver_name, musb_ep->end_point.name,
+                        ({ char *s; switch (musb_ep->type) {
+                        case USB_ENDPOINT_XFER_BULK:    s = "bulk"; break;
+                        case USB_ENDPOINT_XFER_INT:     s = "int"; break;
+                        default:                        s = "iso"; break;
+                        }; s; }),
+                        musb_ep->is_in ? "IN" : "OUT",
+                        musb_ep->dma ? "dma, " : "",
+                        musb_ep->packet_sz);
+
+        schedule_work(&musb->irq_work);
+
+fail:
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return status;
+}
+
+/*
+ * Disable an endpoint flushing all requests queued.
+ */
+static int musb_gadget_disable(struct usb_ep *ep)
+{
+        unsigned long   flags;
+        struct musb     *musb;
+        u8              epnum;
+        struct musb_ep  *musb_ep;
+        void __iomem    *epio;
+        int             status = 0;
+
+        musb_ep = to_musb_ep(ep);
+        musb = musb_ep->musb;
+        epnum = musb_ep->current_epnum;
+        epio = musb->endpoints[epnum].regs;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        musb_ep_select(musb->mregs, epnum);
+
+        /* zero the endpoint sizes */
+        if (musb_ep->is_in) {
+                u16 int_txe = musb_readw(musb->mregs, MUSB_INTRTXE);
+                int_txe &= ~(1 << epnum);
+                musb_writew(musb->mregs, MUSB_INTRTXE, int_txe);
+                musb_writew(epio, MUSB_TXMAXP, 0);
+        } else {
+                u16 int_rxe = musb_readw(musb->mregs, MUSB_INTRRXE);
+                int_rxe &= ~(1 << epnum);
+                musb_writew(musb->mregs, MUSB_INTRRXE, int_rxe);
+                musb_writew(epio, MUSB_RXMAXP, 0);
+        }
+
+        musb_ep->desc = NULL;
+
+        /* abort all pending DMA and requests */
+        nuke(musb_ep, -ESHUTDOWN);
+
+        schedule_work(&musb->irq_work);
+
+        spin_unlock_irqrestore(&(musb->lock), flags);
+
+        DBG(2, "%s\n", musb_ep->end_point.name);
+
+        return status;
+}
+
+/*
+ * Allocate a request for an endpoint.
+ * Reused by ep0 code.
+ */
+struct usb_request *musb_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
+{
+        struct musb_ep          *musb_ep = to_musb_ep(ep);
+        struct musb_request     *request = NULL;
+
+        request = kzalloc(sizeof *request, gfp_flags);
+        if (request) {
+                INIT_LIST_HEAD(&request->request.list);
+                request->request.dma = DMA_ADDR_INVALID;
+                request->epnum = musb_ep->current_epnum;
+                request->ep = musb_ep;
+        }
+
+        return &request->request;
+}
+
+/*
+ * Free a request
+ * Reused by ep0 code.
+ */
+void musb_free_request(struct usb_ep *ep, struct usb_request *req)
+{
+        kfree(to_musb_request(req));
+}
+
+static LIST_HEAD(buffers);
+
+struct free_record {
+        struct list_head        list;
+        struct device           *dev;
+        unsigned                bytes;
+        dma_addr_t              dma;
+};
+
+/*
+ * Context: controller locked, IRQs blocked.
+ */
+static void musb_ep_restart(struct musb *musb, struct musb_request *req)
+{
+        DBG(3, "<== %s request %p len %u on hw_ep%d\n",
+                req->tx ? "TX/IN" : "RX/OUT",
+                &req->request, req->request.length, req->epnum);
+
+        musb_ep_select(musb->mregs, req->epnum);
+        if (req->tx)
+                txstate(musb, req);
+        else
+                rxstate(musb, req);
+}
+
+static int musb_gadget_queue(struct usb_ep *ep, struct usb_request *req,
+                        gfp_t gfp_flags)
+{
+        struct musb_ep          *musb_ep;
+        struct musb_request     *request;
+        struct musb             *musb;
+        int                     status = 0;
+        unsigned long           lockflags;
+
+        if (!ep || !req)
+                return -EINVAL;
+        if (!req->buf)
+                return -ENODATA;
+
+        musb_ep = to_musb_ep(ep);
+        musb = musb_ep->musb;
+
+        request = to_musb_request(req);
+        request->musb = musb;
+
+        if (request->ep != musb_ep)
+                return -EINVAL;
+
+        DBG(4, "<== to %s request=%p\n", ep->name, req);
+
+        /* request is mine now... */
+        request->request.actual = 0;
+        request->request.status = -EINPROGRESS;
+        request->epnum = musb_ep->current_epnum;
+        request->tx = musb_ep->is_in;
+
+        if (is_dma_capable() && musb_ep->dma) {
+                if (request->request.dma == DMA_ADDR_INVALID) {
+                        request->request.dma = dma_map_single(
+                                        musb->controller,
+                                        request->request.buf,
+                                        request->request.length,
+                                        request->tx
+                                                ? DMA_TO_DEVICE
+                                                : DMA_FROM_DEVICE);
+                        request->mapped = 1;
+                } else {
+                        dma_sync_single_for_device(musb->controller,
+                                        request->request.dma,
+                                        request->request.length,
+                                        request->tx
+                                                ? DMA_TO_DEVICE
+                                                : DMA_FROM_DEVICE);
+                        request->mapped = 0;
+                }
+        } else if (!req->buf) {
+                return -ENODATA;
+        } else
+                request->mapped = 0;
+
+        spin_lock_irqsave(&musb->lock, lockflags);
+
+        /* don't queue if the ep is down */
+        if (!musb_ep->desc) {
+                DBG(4, "req %p queued to %s while ep %s\n",
+                                req, ep->name, "disabled");
+                status = -ESHUTDOWN;
+                goto cleanup;
+        }
+
+        /* add request to the list */
+        list_add_tail(&(request->request.list), &(musb_ep->req_list));
+
+        /* it this is the head of the queue, start i/o ... */
+        if (!musb_ep->busy && &request->request.list == musb_ep->req_list.next)
+                musb_ep_restart(musb, request);
+
+cleanup:
+        spin_unlock_irqrestore(&musb->lock, lockflags);
+        return status;
+}
+
+static int musb_gadget_dequeue(struct usb_ep *ep, struct usb_request *request)
+{
+        struct musb_ep          *musb_ep = to_musb_ep(ep);
+        struct usb_request      *r;
+        unsigned long           flags;
+        int                     status = 0;
+        struct musb             *musb = musb_ep->musb;
+
+        if (!ep || !request || to_musb_request(request)->ep != musb_ep)
+                return -EINVAL;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        list_for_each_entry(r, &musb_ep->req_list, list) {
+                if (r == request)
+                        break;
+        }
+        if (r != request) {
+                DBG(3, "request %p not queued to %s\n", request, ep->name);
+                status = -EINVAL;
+                goto done;
+        }
+
+        /* if the hardware doesn't have the request, easy ... */
+        if (musb_ep->req_list.next != &request->list || musb_ep->busy)
+                musb_g_giveback(musb_ep, request, -ECONNRESET);
+
+        /* ... else abort the dma transfer ... */
+        else if (is_dma_capable() && musb_ep->dma) {
+                struct dma_controller   *c = musb->dma_controller;
+
+                musb_ep_select(musb->mregs, musb_ep->current_epnum);
+                if (c->channel_abort)
+                        status = c->channel_abort(musb_ep->dma);
+                else
+                        status = -EBUSY;
+                if (status == 0)
+                        musb_g_giveback(musb_ep, request, -ECONNRESET);
+        } else {
+                /* NOTE: by sticking to easily tested hardware/driver states,
+                 * we leave counting of in-flight packets imprecise.
+                 */
+                musb_g_giveback(musb_ep, request, -ECONNRESET);
+        }
+
+done:
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return status;
+}
+
+/*
+ * Set or clear the halt bit of an endpoint. A halted enpoint won't tx/rx any
+ * data but will queue requests.
+ *
+ * exported to ep0 code
+ */
+int musb_gadget_set_halt(struct usb_ep *ep, int value)
+{
+        struct musb_ep          *musb_ep = to_musb_ep(ep);
+        u8                      epnum = musb_ep->current_epnum;
+        struct musb             *musb = musb_ep->musb;
+        void __iomem            *epio = musb->endpoints[epnum].regs;
+        void __iomem            *mbase;
+        unsigned long           flags;
+        u16                     csr;
+        struct musb_request     *request = NULL;
+        int                     status = 0;
+
+        if (!ep)
+                return -EINVAL;
+        mbase = musb->mregs;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if ((USB_ENDPOINT_XFER_ISOC == musb_ep->type)) {
+                status = -EINVAL;
+                goto done;
+        }
+
+        musb_ep_select(mbase, epnum);
+
+        /* cannot portably stall with non-empty FIFO */
+        request = to_musb_request(next_request(musb_ep));
+        if (value && musb_ep->is_in) {
+                csr = musb_readw(epio, MUSB_TXCSR);
+                if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
+                        DBG(3, "%s fifo busy, cannot halt\n", ep->name);
+                        spin_unlock_irqrestore(&musb->lock, flags);
+                        return -EAGAIN;
+                }
+
+        }
+
+        /* set/clear the stall and toggle bits */
+        DBG(2, "%s: %s stall\n", ep->name, value ? "set" : "clear");
+        if (musb_ep->is_in) {
+                csr = musb_readw(epio, MUSB_TXCSR);
+                if (csr & MUSB_TXCSR_FIFONOTEMPTY)
+                        csr |= MUSB_TXCSR_FLUSHFIFO;
+                csr |= MUSB_TXCSR_P_WZC_BITS
+                        | MUSB_TXCSR_CLRDATATOG;
+                if (value)
+                        csr |= MUSB_TXCSR_P_SENDSTALL;
+                else
+                        csr &= ~(MUSB_TXCSR_P_SENDSTALL
+                                | MUSB_TXCSR_P_SENTSTALL);
+                csr &= ~MUSB_TXCSR_TXPKTRDY;
+                musb_writew(epio, MUSB_TXCSR, csr);
+        } else {
+                csr = musb_readw(epio, MUSB_RXCSR);
+                csr |= MUSB_RXCSR_P_WZC_BITS
+                        | MUSB_RXCSR_FLUSHFIFO
+                        | MUSB_RXCSR_CLRDATATOG;
+                if (value)
+                        csr |= MUSB_RXCSR_P_SENDSTALL;
+                else
+                        csr &= ~(MUSB_RXCSR_P_SENDSTALL
+                                | MUSB_RXCSR_P_SENTSTALL);
+                musb_writew(epio, MUSB_RXCSR, csr);
+        }
+
+done:
+
+        /* maybe start the first request in the queue */
+        if (!musb_ep->busy && !value && request) {
+                DBG(3, "restarting the request\n");
+                musb_ep_restart(musb, request);
+        }
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return status;
+}
+
+static int musb_gadget_fifo_status(struct usb_ep *ep)
+{
+        struct musb_ep          *musb_ep = to_musb_ep(ep);
+        void __iomem            *epio = musb_ep->hw_ep->regs;
+        int                     retval = -EINVAL;
+
+        if (musb_ep->desc && !musb_ep->is_in) {
+                struct musb             *musb = musb_ep->musb;
+                int                     epnum = musb_ep->current_epnum;
+                void __iomem            *mbase = musb->mregs;
+                unsigned long           flags;
+
+                spin_lock_irqsave(&musb->lock, flags);
+
+                musb_ep_select(mbase, epnum);
+                /* FIXME return zero unless RXPKTRDY is set */
+                retval = musb_readw(epio, MUSB_RXCOUNT);
+
+                spin_unlock_irqrestore(&musb->lock, flags);
+        }
+        return retval;
+}
+
+static void musb_gadget_fifo_flush(struct usb_ep *ep)
+{
+        struct musb_ep  *musb_ep = to_musb_ep(ep);
+        struct musb     *musb = musb_ep->musb;
+        u8              epnum = musb_ep->current_epnum;
+        void __iomem    *epio = musb->endpoints[epnum].regs;
+        void __iomem    *mbase;
+        unsigned long   flags;
+        u16             csr, int_txe;
+
+        mbase = musb->mregs;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        musb_ep_select(mbase, (u8) epnum);
+
+        /* disable interrupts */
+        int_txe = musb_readw(mbase, MUSB_INTRTXE);
+        musb_writew(mbase, MUSB_INTRTXE, int_txe & ~(1 << epnum));
+
+        if (musb_ep->is_in) {
+                csr = musb_readw(epio, MUSB_TXCSR);
+                if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
+                        csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS;
+                        musb_writew(epio, MUSB_TXCSR, csr);
+                        /* REVISIT may be inappropriate w/o FIFONOTEMPTY ... */
+                        musb_writew(epio, MUSB_TXCSR, csr);
+                }
+        } else {
+                csr = musb_readw(epio, MUSB_RXCSR);
+                csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_P_WZC_BITS;
+                musb_writew(epio, MUSB_RXCSR, csr);
+                musb_writew(epio, MUSB_RXCSR, csr);
+        }
+
+        /* re-enable interrupt */
+        musb_writew(mbase, MUSB_INTRTXE, int_txe);
+        spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+static const struct usb_ep_ops musb_ep_ops = {
+        .enable         = musb_gadget_enable,
+        .disable        = musb_gadget_disable,
+        .alloc_request  = musb_alloc_request,
+        .free_request   = musb_free_request,
+        .queue          = musb_gadget_queue,
+        .dequeue        = musb_gadget_dequeue,
+        .set_halt       = musb_gadget_set_halt,
+        .fifo_status    = musb_gadget_fifo_status,
+        .fifo_flush     = musb_gadget_fifo_flush
+};
+
+/* ----------------------------------------------------------------------- */
+
+static int musb_gadget_get_frame(struct usb_gadget *gadget)
+{
+        struct musb     *musb = gadget_to_musb(gadget);
+
+        return (int)musb_readw(musb->mregs, MUSB_FRAME);
+}
+
+static int musb_gadget_wakeup(struct usb_gadget *gadget)
+{
+        struct musb     *musb = gadget_to_musb(gadget);
+        void __iomem    *mregs = musb->mregs;
+        unsigned long   flags;
+        int             status = -EINVAL;
+        u8              power, devctl;
+        int             retries;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        switch (musb->xceiv.state) {
+        case OTG_STATE_B_PERIPHERAL:
+                /* NOTE:  OTG state machine doesn't include B_SUSPENDED;
+                 * that's part of the standard usb 1.1 state machine, and
+                 * doesn't affect OTG transitions.
+                 */
+                if (musb->may_wakeup && musb->is_suspended)
+                        break;
+                goto done;
+        case OTG_STATE_B_IDLE:
+                /* Start SRP ... OTG not required. */
+                devctl = musb_readb(mregs, MUSB_DEVCTL);
+                DBG(2, "Sending SRP: devctl: %02x\n", devctl);
+                devctl |= MUSB_DEVCTL_SESSION;
+                musb_writeb(mregs, MUSB_DEVCTL, devctl);
+                devctl = musb_readb(mregs, MUSB_DEVCTL);
+                retries = 100;
+                while (!(devctl & MUSB_DEVCTL_SESSION)) {
+                        devctl = musb_readb(mregs, MUSB_DEVCTL);
+                        if (retries-- < 1)
+                                break;
+                }
+                retries = 10000;
+                while (devctl & MUSB_DEVCTL_SESSION) {
+                        devctl = musb_readb(mregs, MUSB_DEVCTL);
+                        if (retries-- < 1)
+                                break;
+                }
+
+                /* Block idling for at least 1s */
+                musb_platform_try_idle(musb,
+                        jiffies + msecs_to_jiffies(1 * HZ));
+
+                status = 0;
+                goto done;
+        default:
+                DBG(2, "Unhandled wake: %s\n", otg_state_string(musb));
+                goto done;
+        }
+
+        status = 0;
+
+        power = musb_readb(mregs, MUSB_POWER);
+        power |= MUSB_POWER_RESUME;
+        musb_writeb(mregs, MUSB_POWER, power);
+        DBG(2, "issue wakeup\n");
+
+        /* FIXME do this next chunk in a timer callback, no udelay */
+        mdelay(2);
+
+        power = musb_readb(mregs, MUSB_POWER);
+        power &= ~MUSB_POWER_RESUME;
+        musb_writeb(mregs, MUSB_POWER, power);
+done:
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return status;
+}
+
+static int
+musb_gadget_set_self_powered(struct usb_gadget *gadget, int is_selfpowered)
+{
+        struct musb     *musb = gadget_to_musb(gadget);
+
+        musb->is_self_powered = !!is_selfpowered;
+        return 0;
+}
+
+static void musb_pullup(struct musb *musb, int is_on)
+{
+        u8 power;
+
+        power = musb_readb(musb->mregs, MUSB_POWER);
+        if (is_on)
+                power |= MUSB_POWER_SOFTCONN;
+        else
+                power &= ~MUSB_POWER_SOFTCONN;
+
+        /* FIXME if on, HdrcStart; if off, HdrcStop */
+
+        DBG(3, "gadget %s D+ pullup %s\n",
+                musb->gadget_driver->function, is_on ? "on" : "off");
+        musb_writeb(musb->mregs, MUSB_POWER, power);
+}
+
+#if 0
+static int musb_gadget_vbus_session(struct usb_gadget *gadget, int is_active)
+{
+        DBG(2, "<= %s =>\n", __func__);
+
+        /*
+         * FIXME iff driver's softconnect flag is set (as it is during probe,
+         * though that can clear it), just musb_pullup().
+         */
+
+        return -EINVAL;
+}
+#endif
+
+static int musb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA)
+{
+        struct musb     *musb = gadget_to_musb(gadget);
+
+        if (!musb->xceiv.set_power)
+                return -EOPNOTSUPP;
+        return otg_set_power(&musb->xceiv, mA);
+}
+
+static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on)
+{
+        struct musb     *musb = gadget_to_musb(gadget);
+        unsigned long   flags;
+
+        is_on = !!is_on;
+
+        /* NOTE: this assumes we are sensing vbus; we'd rather
+         * not pullup unless the B-session is active.
+         */
+        spin_lock_irqsave(&musb->lock, flags);
+        if (is_on != musb->softconnect) {
+                musb->softconnect = is_on;
+                musb_pullup(musb, is_on);
+        }
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return 0;
+}
+
+static const struct usb_gadget_ops musb_gadget_operations = {
+        .get_frame              = musb_gadget_get_frame,
+        .wakeup                 = musb_gadget_wakeup,
+        .set_selfpowered        = musb_gadget_set_self_powered,
+        /* .vbus_session                = musb_gadget_vbus_session, */
+        .vbus_draw              = musb_gadget_vbus_draw,
+        .pullup                 = musb_gadget_pullup,
+};
+
+/* ----------------------------------------------------------------------- */
+
+/* Registration */
+
+/* Only this registration code "knows" the rule (from USB standards)
+ * about there being only one external upstream port.  It assumes
+ * all peripheral ports are external...
+ */
+static struct musb *the_gadget;
+
+static void musb_gadget_release(struct device *dev)
+{
+        /* kref_put(WHAT) */
+        dev_dbg(dev, "%s\n", __func__);
+}
+
+
+static void __init
+init_peripheral_ep(struct musb *musb, struct musb_ep *ep, u8 epnum, int is_in)
+{
+        struct musb_hw_ep       *hw_ep = musb->endpoints + epnum;
+
+        memset(ep, 0, sizeof *ep);
+
+        ep->current_epnum = epnum;
+        ep->musb = musb;
+        ep->hw_ep = hw_ep;
+        ep->is_in = is_in;
+
+        INIT_LIST_HEAD(&ep->req_list);
+
+        sprintf(ep->name, "ep%d%s", epnum,
+                        (!epnum || hw_ep->is_shared_fifo) ? "" : (
+                                is_in ? "in" : "out"));
+        ep->end_point.name = ep->name;
+        INIT_LIST_HEAD(&ep->end_point.ep_list);
+        if (!epnum) {
+                ep->end_point.maxpacket = 64;
+                ep->end_point.ops = &musb_g_ep0_ops;
+                musb->g.ep0 = &ep->end_point;
+        } else {
+                if (is_in)
+                        ep->end_point.maxpacket = hw_ep->max_packet_sz_tx;
+                else
+                        ep->end_point.maxpacket = hw_ep->max_packet_sz_rx;
+                ep->end_point.ops = &musb_ep_ops;
+                list_add_tail(&ep->end_point.ep_list, &musb->g.ep_list);
+        }
+}
+
+/*
+ * Initialize the endpoints exposed to peripheral drivers, with backlinks
+ * to the rest of the driver state.
+ */
+static inline void __init musb_g_init_endpoints(struct musb *musb)
+{
+        u8                      epnum;
+        struct musb_hw_ep       *hw_ep;
+        unsigned                count = 0;
+
+        /* intialize endpoint list just once */
+        INIT_LIST_HEAD(&(musb->g.ep_list));
+
+        for (epnum = 0, hw_ep = musb->endpoints;
+                        epnum < musb->nr_endpoints;
+                        epnum++, hw_ep++) {
+                if (hw_ep->is_shared_fifo /* || !epnum */) {
+                        init_peripheral_ep(musb, &hw_ep->ep_in, epnum, 0);
+                        count++;
+                } else {
+                        if (hw_ep->max_packet_sz_tx) {
+                                init_peripheral_ep(musb, &hw_ep->ep_in,
+                                                        epnum, 1);
+                                count++;
+                        }
+                        if (hw_ep->max_packet_sz_rx) {
+                                init_peripheral_ep(musb, &hw_ep->ep_out,
+                                                        epnum, 0);
+                                count++;
+                        }
+                }
+        }
+}
+
+/* called once during driver setup to initialize and link into
+ * the driver model; memory is zeroed.
+ */
+int __init musb_gadget_setup(struct musb *musb)
+{
+        int status;
+
+        /* REVISIT minor race:  if (erroneously) setting up two
+         * musb peripherals at the same time, only the bus lock
+         * is probably held.
+         */
+        if (the_gadget)
+                return -EBUSY;
+        the_gadget = musb;
+
+        musb->g.ops = &musb_gadget_operations;
+        musb->g.is_dualspeed = 1;
+        musb->g.speed = USB_SPEED_UNKNOWN;
+
+        /* this "gadget" abstracts/virtualizes the controller */
+        strcpy(musb->g.dev.bus_id, "gadget");
+        musb->g.dev.parent = musb->controller;
+        musb->g.dev.dma_mask = musb->controller->dma_mask;
+        musb->g.dev.release = musb_gadget_release;
+        musb->g.name = musb_driver_name;
+
+        if (is_otg_enabled(musb))
+                musb->g.is_otg = 1;
+
+        musb_g_init_endpoints(musb);
+
+        musb->is_active = 0;
+        musb_platform_try_idle(musb, 0);
+
+        status = device_register(&musb->g.dev);
+        if (status != 0)
+                the_gadget = NULL;
+        return status;
+}
+
+void musb_gadget_cleanup(struct musb *musb)
+{
+        if (musb != the_gadget)
+                return;
+
+        device_unregister(&musb->g.dev);
+        the_gadget = NULL;
+}
+
+/*
+ * Register the gadget driver. Used by gadget drivers when
+ * registering themselves with the controller.
+ *
+ * -EINVAL something went wrong (not driver)
+ * -EBUSY another gadget is already using the controller
+ * -ENOMEM no memeory to perform the operation
+ *
+ * @param driver the gadget driver
+ * @return <0 if error, 0 if everything is fine
+ */
+int usb_gadget_register_driver(struct usb_gadget_driver *driver)
+{
+        int retval;
+        unsigned long flags;
+        struct musb *musb = the_gadget;
+
+        if (!driver
+                        || driver->speed != USB_SPEED_HIGH
+                        || !driver->bind
+                        || !driver->setup)
+                return -EINVAL;
+
+        /* driver must be initialized to support peripheral mode */
+        if (!musb || !(musb->board_mode == MUSB_OTG
+                                || musb->board_mode != MUSB_OTG)) {
+                DBG(1, "%s, no dev??\n", __func__);
+                return -ENODEV;
+        }
+
+        DBG(3, "registering driver %s\n", driver->function);
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if (musb->gadget_driver) {
+                DBG(1, "%s is already bound to %s\n",
+                                musb_driver_name,
+                                musb->gadget_driver->driver.name);
+                retval = -EBUSY;
+        } else {
+                musb->gadget_driver = driver;
+                musb->g.dev.driver = &driver->driver;
+                driver->driver.bus = NULL;
+                musb->softconnect = 1;
+                retval = 0;
+        }
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        if (retval == 0) {
+                retval = driver->bind(&musb->g);
+                if (retval != 0) {
+                        DBG(3, "bind to driver %s failed --> %d\n",
+                                        driver->driver.name, retval);
+                        musb->gadget_driver = NULL;
+                        musb->g.dev.driver = NULL;
+                }
+
+                spin_lock_irqsave(&musb->lock, flags);
+
+                /* REVISIT always use otg_set_peripheral(), handling
+                 * issues including the root hub one below ...
+                 */
+                musb->xceiv.gadget = &musb->g;
+                musb->xceiv.state = OTG_STATE_B_IDLE;
+                musb->is_active = 1;
+
+                /* FIXME this ignores the softconnect flag.  Drivers are
+                 * allowed hold the peripheral inactive until for example
+                 * userspace hooks up printer hardware or DSP codecs, so
+                 * hosts only see fully functional devices.
+                 */
+
+                if (!is_otg_enabled(musb))
+                        musb_start(musb);
+
+                spin_unlock_irqrestore(&musb->lock, flags);
+
+                if (is_otg_enabled(musb)) {
+                        DBG(3, "OTG startup...\n");
+
+                        /* REVISIT:  funcall to other code, which also
+                         * handles power budgeting ... this way also
+                         * ensures HdrcStart is indirectly called.
+                         */
+                        retval = usb_add_hcd(musb_to_hcd(musb), -1, 0);
+                        if (retval < 0) {
+                                DBG(1, "add_hcd failed, %d\n", retval);
+                                spin_lock_irqsave(&musb->lock, flags);
+                                musb->xceiv.gadget = NULL;
+                                musb->xceiv.state = OTG_STATE_UNDEFINED;
+                                musb->gadget_driver = NULL;
+                                musb->g.dev.driver = NULL;
+                                spin_unlock_irqrestore(&musb->lock, flags);
+                        }
+                }
+        }
+
+        return retval;
+}
+EXPORT_SYMBOL(usb_gadget_register_driver);
+
+static void stop_activity(struct musb *musb, struct usb_gadget_driver *driver)
+{
+        int                     i;
+        struct musb_hw_ep       *hw_ep;
+
+        /* don't disconnect if it's not connected */
+        if (musb->g.speed == USB_SPEED_UNKNOWN)
+                driver = NULL;
+        else
+                musb->g.speed = USB_SPEED_UNKNOWN;
+
+        /* deactivate the hardware */
+        if (musb->softconnect) {
+                musb->softconnect = 0;
+                musb_pullup(musb, 0);
+        }
+        musb_stop(musb);
+
+        /* killing any outstanding requests will quiesce the driver;
+         * then report disconnect
+         */
+        if (driver) {
+                for (i = 0, hw_ep = musb->endpoints;
+                                i < musb->nr_endpoints;
+                                i++, hw_ep++) {
+                        musb_ep_select(musb->mregs, i);
+                        if (hw_ep->is_shared_fifo /* || !epnum */) {
+                                nuke(&hw_ep->ep_in, -ESHUTDOWN);
+                        } else {
+                                if (hw_ep->max_packet_sz_tx)
+                                        nuke(&hw_ep->ep_in, -ESHUTDOWN);
+                                if (hw_ep->max_packet_sz_rx)
+                                        nuke(&hw_ep->ep_out, -ESHUTDOWN);
+                        }
+                }
+
+                spin_unlock(&musb->lock);
+                driver->disconnect(&musb->g);
+                spin_lock(&musb->lock);
+        }
+}
+
+/*
+ * Unregister the gadget driver. Used by gadget drivers when
+ * unregistering themselves from the controller.
+ *
+ * @param driver the gadget driver to unregister
+ */
+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+{
+        unsigned long   flags;
+        int             retval = 0;
+        struct musb     *musb = the_gadget;
+
+        if (!driver || !driver->unbind || !musb)
+                return -EINVAL;
+
+        /* REVISIT always use otg_set_peripheral() here too;
+         * this needs to shut down the OTG engine.
+         */
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+#ifdef  CONFIG_USB_MUSB_OTG
+        musb_hnp_stop(musb);
+#endif
+
+        if (musb->gadget_driver == driver) {
+
+                (void) musb_gadget_vbus_draw(&musb->g, 0);
+
+                musb->xceiv.state = OTG_STATE_UNDEFINED;
+                stop_activity(musb, driver);
+
+                DBG(3, "unregistering driver %s\n", driver->function);
+                spin_unlock_irqrestore(&musb->lock, flags);
+                driver->unbind(&musb->g);
+                spin_lock_irqsave(&musb->lock, flags);
+
+                musb->gadget_driver = NULL;
+                musb->g.dev.driver = NULL;
+
+                musb->is_active = 0;
+                musb_platform_try_idle(musb, 0);
+        } else
+                retval = -EINVAL;
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        if (is_otg_enabled(musb) && retval == 0) {
+                usb_remove_hcd(musb_to_hcd(musb));
+                /* FIXME we need to be able to register another
+                 * gadget driver here and have everything work;
+                 * that currently misbehaves.
+                 */
+        }
+
+        return retval;
+}
+EXPORT_SYMBOL(usb_gadget_unregister_driver);
+
+
+/* ----------------------------------------------------------------------- */
+
+/* lifecycle operations called through plat_uds.c */
+
+void musb_g_resume(struct musb *musb)
+{
+        musb->is_suspended = 0;
+        switch (musb->xceiv.state) {
+        case OTG_STATE_B_IDLE:
+                break;
+        case OTG_STATE_B_WAIT_ACON:
+        case OTG_STATE_B_PERIPHERAL:
+                musb->is_active = 1;
+                if (musb->gadget_driver && musb->gadget_driver->resume) {
+                        spin_unlock(&musb->lock);
+                        musb->gadget_driver->resume(&musb->g);
+                        spin_lock(&musb->lock);
+                }
+                break;
+        default:
+                WARNING("unhandled RESUME transition (%s)\n",
+                                otg_state_string(musb));
+        }
+}
+
+/* called when SOF packets stop for 3+ msec */
+void musb_g_suspend(struct musb *musb)
+{
+        u8      devctl;
+
+        devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+        DBG(3, "devctl %02x\n", devctl);
+
+        switch (musb->xceiv.state) {
+        case OTG_STATE_B_IDLE:
+                if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
+                        musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
+                break;
+        case OTG_STATE_B_PERIPHERAL:
+                musb->is_suspended = 1;
+                if (musb->gadget_driver && musb->gadget_driver->suspend) {
+                        spin_unlock(&musb->lock);
+                        musb->gadget_driver->suspend(&musb->g);
+                        spin_lock(&musb->lock);
+                }
+                break;
+        default:
+                /* REVISIT if B_HOST, clear DEVCTL.HOSTREQ;
+                 * A_PERIPHERAL may need care too
+                 */
+                WARNING("unhandled SUSPEND transition (%s)\n",
+                                otg_state_string(musb));
+        }
+}
+
+/* Called during SRP */
+void musb_g_wakeup(struct musb *musb)
+{
+        musb_gadget_wakeup(&musb->g);
+}
+
+/* called when VBUS drops below session threshold, and in other cases */
+void musb_g_disconnect(struct musb *musb)
+{
+        void __iomem    *mregs = musb->mregs;
+        u8      devctl = musb_readb(mregs, MUSB_DEVCTL);
+
+        DBG(3, "devctl %02x\n", devctl);
+
+        /* clear HR */
+        musb_writeb(mregs, MUSB_DEVCTL, devctl & MUSB_DEVCTL_SESSION);
+
+        /* don't draw vbus until new b-default session */
+        (void) musb_gadget_vbus_draw(&musb->g, 0);
+
+        musb->g.speed = USB_SPEED_UNKNOWN;
+        if (musb->gadget_driver && musb->gadget_driver->disconnect) {
+                spin_unlock(&musb->lock);
+                musb->gadget_driver->disconnect(&musb->g);
+                spin_lock(&musb->lock);
+        }
+
+        switch (musb->xceiv.state) {
+        default:
+#ifdef  CONFIG_USB_MUSB_OTG
+                DBG(2, "Unhandled disconnect %s, setting a_idle\n",
+                        otg_state_string(musb));
+                musb->xceiv.state = OTG_STATE_A_IDLE;
+                break;
+        case OTG_STATE_A_PERIPHERAL:
+                musb->xceiv.state = OTG_STATE_A_WAIT_VFALL;
+                break;
+        case OTG_STATE_B_WAIT_ACON:
+        case OTG_STATE_B_HOST:
+#endif
+        case OTG_STATE_B_PERIPHERAL:
+        case OTG_STATE_B_IDLE:
+                musb->xceiv.state = OTG_STATE_B_IDLE;
+                break;
+        case OTG_STATE_B_SRP_INIT:
+                break;
+        }
+
+        musb->is_active = 0;
+}
+
+void musb_g_reset(struct musb *musb)
+__releases(musb->lock)
+__acquires(musb->lock)
+{
+        void __iomem    *mbase = musb->mregs;
+        u8              devctl = musb_readb(mbase, MUSB_DEVCTL);
+        u8              power;
+
+        DBG(3, "<== %s addr=%x driver '%s'\n",
+                        (devctl & MUSB_DEVCTL_BDEVICE)
+                                ? "B-Device" : "A-Device",
+                        musb_readb(mbase, MUSB_FADDR),
+                        musb->gadget_driver
+                                ? musb->gadget_driver->driver.name
+                                : NULL
+                        );
+
+        /* report disconnect, if we didn't already (flushing EP state) */
+        if (musb->g.speed != USB_SPEED_UNKNOWN)
+                musb_g_disconnect(musb);
+
+        /* clear HR */
+        else if (devctl & MUSB_DEVCTL_HR)
+                musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
+
+
+        /* what speed did we negotiate? */
+        power = musb_readb(mbase, MUSB_POWER);
+        musb->g.speed = (power & MUSB_POWER_HSMODE)
+                        ? USB_SPEED_HIGH : USB_SPEED_FULL;
+
+        /* start in USB_STATE_DEFAULT */
+        musb->is_active = 1;
+        musb->is_suspended = 0;
+        MUSB_DEV_MODE(musb);
+        musb->address = 0;
+        musb->ep0_state = MUSB_EP0_STAGE_SETUP;
+
+        musb->may_wakeup = 0;
+        musb->g.b_hnp_enable = 0;
+        musb->g.a_alt_hnp_support = 0;
+        musb->g.a_hnp_support = 0;
+
+        /* Normal reset, as B-Device;
+         * or else after HNP, as A-Device
+         */
+        if (devctl & MUSB_DEVCTL_BDEVICE) {
+                musb->xceiv.state = OTG_STATE_B_PERIPHERAL;
+                musb->g.is_a_peripheral = 0;
+        } else if (is_otg_enabled(musb)) {
+                musb->xceiv.state = OTG_STATE_A_PERIPHERAL;
+                musb->g.is_a_peripheral = 1;
+        } else
+                WARN_ON(1);
+
+        /* start with default limits on VBUS power draw */
+        (void) musb_gadget_vbus_draw(&musb->g,
+                        is_otg_enabled(musb) ? 8 : 100);
+}
diff --git a/drivers/usb/musb/musb_gadget.h b/drivers/usb/musb/musb_gadget.h
new file mode 100644
index 000000000000..59502da9f739
--- /dev/null
+++ b/drivers/usb/musb/musb_gadget.h
@@ -0,0 +1,108 @@
+/*
+ * MUSB OTG driver peripheral defines
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef __MUSB_GADGET_H
+#define __MUSB_GADGET_H
+
+struct musb_request {
+        struct usb_request      request;
+        struct musb_ep          *ep;
+        struct musb             *musb;
+        u8 tx;                  /* endpoint direction */
+        u8 epnum;
+        u8 mapped;
+};
+
+static inline struct musb_request *to_musb_request(struct usb_request *req)
+{
+        return req ? container_of(req, struct musb_request, request) : NULL;
+}
+
+extern struct usb_request *
+musb_alloc_request(struct usb_ep *ep, gfp_t gfp_flags);
+extern void musb_free_request(struct usb_ep *ep, struct usb_request *req);
+
+
+/*
+ * struct musb_ep - peripheral side view of endpoint rx or tx side
+ */
+struct musb_ep {
+        /* stuff towards the head is basically write-once. */
+        struct usb_ep                   end_point;
+        char                            name[12];
+        struct musb_hw_ep               *hw_ep;
+        struct musb                     *musb;
+        u8                              current_epnum;
+
+        /* ... when enabled/disabled ... */
+        u8                              type;
+        u8                              is_in;
+        u16                             packet_sz;
+        const struct usb_endpoint_descriptor    *desc;
+        struct dma_channel              *dma;
+
+        /* later things are modified based on usage */
+        struct list_head                req_list;
+
+        /* true if lock must be dropped but req_list may not be advanced */
+        u8                              busy;
+};
+
+static inline struct musb_ep *to_musb_ep(struct usb_ep *ep)
+{
+        return ep ? container_of(ep, struct musb_ep, end_point) : NULL;
+}
+
+static inline struct usb_request *next_request(struct musb_ep *ep)
+{
+        struct list_head        *queue = &ep->req_list;
+
+        if (list_empty(queue))
+                return NULL;
+        return container_of(queue->next, struct usb_request, list);
+}
+
+extern void musb_g_tx(struct musb *musb, u8 epnum);
+extern void musb_g_rx(struct musb *musb, u8 epnum);
+
+extern const struct usb_ep_ops musb_g_ep0_ops;
+
+extern int musb_gadget_setup(struct musb *);
+extern void musb_gadget_cleanup(struct musb *);
+
+extern void musb_g_giveback(struct musb_ep *, struct usb_request *, int);
+
+extern int musb_gadget_set_halt(struct usb_ep *ep, int value);
+
+#endif          /* __MUSB_GADGET_H */
diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c
new file mode 100644
index 000000000000..48d7d3ccb243
--- /dev/null
+++ b/drivers/usb/musb/musb_gadget_ep0.c
@@ -0,0 +1,981 @@
+/*
+ * MUSB OTG peripheral driver ep0 handling
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/spinlock.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+
+#include "musb_core.h"
+
+/* ep0 is always musb->endpoints[0].ep_in */
+#define next_ep0_request(musb)  next_in_request(&(musb)->endpoints[0])
+
+/*
+ * locking note:  we use only the controller lock, for simpler correctness.
+ * It's always held with IRQs blocked.
+ *
+ * It protects the ep0 request queue as well as ep0_state, not just the
+ * controller and indexed registers.  And that lock stays held unless it
+ * needs to be dropped to allow reentering this driver ... like upcalls to
+ * the gadget driver, or adjusting endpoint halt status.
+ */
+
+static char *decode_ep0stage(u8 stage)
+{
+        switch (stage) {
+        case MUSB_EP0_STAGE_SETUP:      return "idle";
+        case MUSB_EP0_STAGE_TX:         return "in";
+        case MUSB_EP0_STAGE_RX:         return "out";
+        case MUSB_EP0_STAGE_ACKWAIT:    return "wait";
+        case MUSB_EP0_STAGE_STATUSIN:   return "in/status";
+        case MUSB_EP0_STAGE_STATUSOUT:  return "out/status";
+        default:                        return "?";
+        }
+}
+
+/* handle a standard GET_STATUS request
+ * Context:  caller holds controller lock
+ */
+static int service_tx_status_request(
+        struct musb *musb,
+        const struct usb_ctrlrequest *ctrlrequest)
+{
+        void __iomem    *mbase = musb->mregs;
+        int handled = 1;
+        u8 result[2], epnum = 0;
+        const u8 recip = ctrlrequest->bRequestType & USB_RECIP_MASK;
+
+        result[1] = 0;
+
+        switch (recip) {
+        case USB_RECIP_DEVICE:
+                result[0] = musb->is_self_powered << USB_DEVICE_SELF_POWERED;
+                result[0] |= musb->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
+#ifdef CONFIG_USB_MUSB_OTG
+                if (musb->g.is_otg) {
+                        result[0] |= musb->g.b_hnp_enable
+                                << USB_DEVICE_B_HNP_ENABLE;
+                        result[0] |= musb->g.a_alt_hnp_support
+                                << USB_DEVICE_A_ALT_HNP_SUPPORT;
+                        result[0] |= musb->g.a_hnp_support
+                                << USB_DEVICE_A_HNP_SUPPORT;
+                }
+#endif
+                break;
+
+        case USB_RECIP_INTERFACE:
+                result[0] = 0;
+                break;
+
+        case USB_RECIP_ENDPOINT: {
+                int             is_in;
+                struct musb_ep  *ep;
+                u16             tmp;
+                void __iomem    *regs;
+
+                epnum = (u8) ctrlrequest->wIndex;
+                if (!epnum) {
+                        result[0] = 0;
+                        break;
+                }
+
+                is_in = epnum & USB_DIR_IN;
+                if (is_in) {
+                        epnum &= 0x0f;
+                        ep = &musb->endpoints[epnum].ep_in;
+                } else {
+                        ep = &musb->endpoints[epnum].ep_out;
+                }
+                regs = musb->endpoints[epnum].regs;
+
+                if (epnum >= MUSB_C_NUM_EPS || !ep->desc) {
+                        handled = -EINVAL;
+                        break;
+                }
+
+                musb_ep_select(mbase, epnum);
+                if (is_in)
+                        tmp = musb_readw(regs, MUSB_TXCSR)
+                                                & MUSB_TXCSR_P_SENDSTALL;
+                else
+                        tmp = musb_readw(regs, MUSB_RXCSR)
+                                                & MUSB_RXCSR_P_SENDSTALL;
+                musb_ep_select(mbase, 0);
+
+                result[0] = tmp ? 1 : 0;
+                } break;
+
+        default:
+                /* class, vendor, etc ... delegate */
+                handled = 0;
+                break;
+        }
+
+        /* fill up the fifo; caller updates csr0 */
+        if (handled > 0) {
+                u16     len = le16_to_cpu(ctrlrequest->wLength);
+
+                if (len > 2)
+                        len = 2;
+                musb_write_fifo(&musb->endpoints[0], len, result);
+        }
+
+        return handled;
+}
+
+/*
+ * handle a control-IN request, the end0 buffer contains the current request
+ * that is supposed to be a standard control request. Assumes the fifo to
+ * be at least 2 bytes long.
+ *
+ * @return 0 if the request was NOT HANDLED,
+ * < 0 when error
+ * > 0 when the request is processed
+ *
+ * Context:  caller holds controller lock
+ */
+static int
+service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)
+{
+        int handled = 0;        /* not handled */
+
+        if ((ctrlrequest->bRequestType & USB_TYPE_MASK)
+                        == USB_TYPE_STANDARD) {
+                switch (ctrlrequest->bRequest) {
+                case USB_REQ_GET_STATUS:
+                        handled = service_tx_status_request(musb,
+                                        ctrlrequest);
+                        break;
+
+                /* case USB_REQ_SYNC_FRAME: */
+
+                default:
+                        break;
+                }
+        }
+        return handled;
+}
+
+/*
+ * Context:  caller holds controller lock
+ */
+static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req)
+{
+        musb_g_giveback(&musb->endpoints[0].ep_in, req, 0);
+        musb->ep0_state = MUSB_EP0_STAGE_SETUP;
+}
+
+/*
+ * Tries to start B-device HNP negotiation if enabled via sysfs
+ */
+static inline void musb_try_b_hnp_enable(struct musb *musb)
+{
+        void __iomem    *mbase = musb->mregs;
+        u8              devctl;
+
+        DBG(1, "HNP: Setting HR\n");
+        devctl = musb_readb(mbase, MUSB_DEVCTL);
+        musb_writeb(mbase, MUSB_DEVCTL, devctl | MUSB_DEVCTL_HR);
+}
+
+/*
+ * Handle all control requests with no DATA stage, including standard
+ * requests such as:
+ * USB_REQ_SET_CONFIGURATION, USB_REQ_SET_INTERFACE, unrecognized
+ *      always delegated to the gadget driver
+ * USB_REQ_SET_ADDRESS, USB_REQ_CLEAR_FEATURE, USB_REQ_SET_FEATURE
+ *      always handled here, except for class/vendor/... features
+ *
+ * Context:  caller holds controller lock
+ */
+static int
+service_zero_data_request(struct musb *musb,
+                struct usb_ctrlrequest *ctrlrequest)
+__releases(musb->lock)
+__acquires(musb->lock)
+{
+        int handled = -EINVAL;
+        void __iomem *mbase = musb->mregs;
+        const u8 recip = ctrlrequest->bRequestType & USB_RECIP_MASK;
+
+        /* the gadget driver handles everything except what we MUST handle */
+        if ((ctrlrequest->bRequestType & USB_TYPE_MASK)
+                        == USB_TYPE_STANDARD) {
+                switch (ctrlrequest->bRequest) {
+                case USB_REQ_SET_ADDRESS:
+                        /* change it after the status stage */
+                        musb->set_address = true;
+                        musb->address = (u8) (ctrlrequest->wValue & 0x7f);
+                        handled = 1;
+                        break;
+
+                case USB_REQ_CLEAR_FEATURE:
+                        switch (recip) {
+                        case USB_RECIP_DEVICE:
+                                if (ctrlrequest->wValue
+                                                != USB_DEVICE_REMOTE_WAKEUP)
+                                        break;
+                                musb->may_wakeup = 0;
+                                handled = 1;
+                                break;
+                        case USB_RECIP_INTERFACE:
+                                break;
+                        case USB_RECIP_ENDPOINT:{
+                                const u8 num = ctrlrequest->wIndex & 0x0f;
+                                struct musb_ep *musb_ep;
+
+                                if (num == 0
+                                                || num >= MUSB_C_NUM_EPS
+                                                || ctrlrequest->wValue
+                                                        != USB_ENDPOINT_HALT)
+                                        break;
+
+                                if (ctrlrequest->wIndex & USB_DIR_IN)
+                                        musb_ep = &musb->endpoints[num].ep_in;
+                                else
+                                        musb_ep = &musb->endpoints[num].ep_out;
+                                if (!musb_ep->desc)
+                                        break;
+
+                                /* REVISIT do it directly, no locking games */
+                                spin_unlock(&musb->lock);
+                                musb_gadget_set_halt(&musb_ep->end_point, 0);
+                                spin_lock(&musb->lock);
+
+                                /* select ep0 again */
+                                musb_ep_select(mbase, 0);
+                                handled = 1;
+                                } break;
+                        default:
+                                /* class, vendor, etc ... delegate */
+                                handled = 0;
+                                break;
+                        }
+                        break;
+
+                case USB_REQ_SET_FEATURE:
+                        switch (recip) {
+                        case USB_RECIP_DEVICE:
+                                handled = 1;
+                                switch (ctrlrequest->wValue) {
+                                case USB_DEVICE_REMOTE_WAKEUP:
+                                        musb->may_wakeup = 1;
+                                        break;
+                                case USB_DEVICE_TEST_MODE:
+                                        if (musb->g.speed != USB_SPEED_HIGH)
+                                                goto stall;
+                                        if (ctrlrequest->wIndex & 0xff)
+                                                goto stall;
+
+                                        switch (ctrlrequest->wIndex >> 8) {
+                                        case 1:
+                                                pr_debug("TEST_J\n");
+                                                /* TEST_J */
+                                                musb->test_mode_nr =
+                                                        MUSB_TEST_J;
+                                                break;
+                                        case 2:
+                                                /* TEST_K */
+                                                pr_debug("TEST_K\n");
+                                                musb->test_mode_nr =
+                                                        MUSB_TEST_K;
+                                                break;
+                                        case 3:
+                                                /* TEST_SE0_NAK */
+                                                pr_debug("TEST_SE0_NAK\n");
+                                                musb->test_mode_nr =
+                                                        MUSB_TEST_SE0_NAK;
+                                                break;
+                                        case 4:
+                                                /* TEST_PACKET */
+                                                pr_debug("TEST_PACKET\n");
+                                                musb->test_mode_nr =
+                                                        MUSB_TEST_PACKET;
+                                                break;
+                                        default:
+                                                goto stall;
+                                        }
+
+                                        /* enter test mode after irq */
+                                        if (handled > 0)
+                                                musb->test_mode = true;
+                                        break;
+#ifdef CONFIG_USB_MUSB_OTG
+                                case USB_DEVICE_B_HNP_ENABLE:
+                                        if (!musb->g.is_otg)
+                                                goto stall;
+                                        musb->g.b_hnp_enable = 1;
+                                        musb_try_b_hnp_enable(musb);
+                                        break;
+                                case USB_DEVICE_A_HNP_SUPPORT:
+                                        if (!musb->g.is_otg)
+                                                goto stall;
+                                        musb->g.a_hnp_support = 1;
+                                        break;
+                                case USB_DEVICE_A_ALT_HNP_SUPPORT:
+                                        if (!musb->g.is_otg)
+                                                goto stall;
+                                        musb->g.a_alt_hnp_support = 1;
+                                        break;
+#endif
+stall:
+                                default:
+                                        handled = -EINVAL;
+                                        break;
+                                }
+                                break;
+
+                        case USB_RECIP_INTERFACE:
+                                break;
+
+                        case USB_RECIP_ENDPOINT:{
+                                const u8                epnum =
+                                        ctrlrequest->wIndex & 0x0f;
+                                struct musb_ep          *musb_ep;
+                                struct musb_hw_ep       *ep;
+                                void __iomem            *regs;
+                                int                     is_in;
+                                u16                     csr;
+
+                                if (epnum == 0
+                                                || epnum >= MUSB_C_NUM_EPS
+                                                || ctrlrequest->wValue
+                                                        != USB_ENDPOINT_HALT)
+                                        break;
+
+                                ep = musb->endpoints + epnum;
+                                regs = ep->regs;
+                                is_in = ctrlrequest->wIndex & USB_DIR_IN;
+                                if (is_in)
+                                        musb_ep = &ep->ep_in;
+                                else
+                                        musb_ep = &ep->ep_out;
+                                if (!musb_ep->desc)
+                                        break;
+
+                                musb_ep_select(mbase, epnum);
+                                if (is_in) {
+                                        csr = musb_readw(regs,
+                                                        MUSB_TXCSR);
+                                        if (csr & MUSB_TXCSR_FIFONOTEMPTY)
+                                                csr |= MUSB_TXCSR_FLUSHFIFO;
+                                        csr |= MUSB_TXCSR_P_SENDSTALL
+                                                | MUSB_TXCSR_CLRDATATOG
+                                                | MUSB_TXCSR_P_WZC_BITS;
+                                        musb_writew(regs, MUSB_TXCSR,
+                                                        csr);
+                                } else {
+                                        csr = musb_readw(regs,
+                                                        MUSB_RXCSR);
+                                        csr |= MUSB_RXCSR_P_SENDSTALL
+                                                | MUSB_RXCSR_FLUSHFIFO
+                                                | MUSB_RXCSR_CLRDATATOG
+                                                | MUSB_TXCSR_P_WZC_BITS;
+                                        musb_writew(regs, MUSB_RXCSR,
+                                                        csr);
+                                }
+
+                                /* select ep0 again */
+                                musb_ep_select(mbase, 0);
+                                handled = 1;
+                                } break;
+
+                        default:
+                                /* class, vendor, etc ... delegate */
+                                handled = 0;
+                                break;
+                        }
+                        break;
+                default:
+                        /* delegate SET_CONFIGURATION, etc */
+                        handled = 0;
+                }
+        } else
+                handled = 0;
+        return handled;
+}
+
+/* we have an ep0out data packet
+ * Context:  caller holds controller lock
+ */
+static void ep0_rxstate(struct musb *musb)
+{
+        void __iomem            *regs = musb->control_ep->regs;
+        struct usb_request      *req;
+        u16                     tmp;
+
+        req = next_ep0_request(musb);
+
+        /* read packet and ack; or stall because of gadget driver bug:
+         * should have provided the rx buffer before setup() returned.
+         */
+        if (req) {
+                void            *buf = req->buf + req->actual;
+                unsigned        len = req->length - req->actual;
+
+                /* read the buffer */
+                tmp = musb_readb(regs, MUSB_COUNT0);
+                if (tmp > len) {
+                        req->status = -EOVERFLOW;
+                        tmp = len;
+                }
+                musb_read_fifo(&musb->endpoints[0], tmp, buf);
+                req->actual += tmp;
+                tmp = MUSB_CSR0_P_SVDRXPKTRDY;
+                if (tmp < 64 || req->actual == req->length) {
+                        musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
+                        tmp |= MUSB_CSR0_P_DATAEND;
+                } else
+                        req = NULL;
+        } else
+                tmp = MUSB_CSR0_P_SVDRXPKTRDY | MUSB_CSR0_P_SENDSTALL;
+
+
+        /* Completion handler may choose to stall, e.g. because the
+         * message just received holds invalid data.
+         */
+        if (req) {
+                musb->ackpend = tmp;
+                musb_g_ep0_giveback(musb, req);
+                if (!musb->ackpend)
+                        return;
+                musb->ackpend = 0;
+        }
+        musb_writew(regs, MUSB_CSR0, tmp);
+}
+
+/*
+ * transmitting to the host (IN), this code might be called from IRQ
+ * and from kernel thread.
+ *
+ * Context:  caller holds controller lock
+ */
+static void ep0_txstate(struct musb *musb)
+{
+        void __iomem            *regs = musb->control_ep->regs;
+        struct usb_request      *request = next_ep0_request(musb);
+        u16                     csr = MUSB_CSR0_TXPKTRDY;
+        u8                      *fifo_src;
+        u8                      fifo_count;
+
+        if (!request) {
+                /* WARN_ON(1); */
+                DBG(2, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0));
+                return;
+        }
+
+        /* load the data */
+        fifo_src = (u8 *) request->buf + request->actual;
+        fifo_count = min((unsigned) MUSB_EP0_FIFOSIZE,
+                request->length - request->actual);
+        musb_write_fifo(&musb->endpoints[0], fifo_count, fifo_src);
+        request->actual += fifo_count;
+
+        /* update the flags */
+        if (fifo_count < MUSB_MAX_END0_PACKET
+                        || request->actual == request->length) {
+                musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT;
+                csr |= MUSB_CSR0_P_DATAEND;
+        } else
+                request = NULL;
+
+        /* report completions as soon as the fifo's loaded; there's no
+         * win in waiting till this last packet gets acked.  (other than
+         * very precise fault reporting, needed by USB TMC; possible with
+         * this hardware, but not usable from portable gadget drivers.)
+         */
+        if (request) {
+                musb->ackpend = csr;
+                musb_g_ep0_giveback(musb, request);
+                if (!musb->ackpend)
+                        return;
+                musb->ackpend = 0;
+        }
+
+        /* send it out, triggering a "txpktrdy cleared" irq */
+        musb_writew(regs, MUSB_CSR0, csr);
+}
+
+/*
+ * Read a SETUP packet (struct usb_ctrlrequest) from the hardware.
+ * Fields are left in USB byte-order.
+ *
+ * Context:  caller holds controller lock.
+ */
+static void
+musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req)
+{
+        struct usb_request      *r;
+        void __iomem            *regs = musb->control_ep->regs;
+
+        musb_read_fifo(&musb->endpoints[0], sizeof *req, (u8 *)req);
+
+        /* NOTE:  earlier 2.6 versions changed setup packets to host
+         * order, but now USB packets always stay in USB byte order.
+         */
+        DBG(3, "SETUP req%02x.%02x v%04x i%04x l%d\n",
+                req->bRequestType,
+                req->bRequest,
+                le16_to_cpu(req->wValue),
+                le16_to_cpu(req->wIndex),
+                le16_to_cpu(req->wLength));
+
+        /* clean up any leftover transfers */
+        r = next_ep0_request(musb);
+        if (r)
+                musb_g_ep0_giveback(musb, r);
+
+        /* For zero-data requests we want to delay the STATUS stage to
+         * avoid SETUPEND errors.  If we read data (OUT), delay accepting
+         * packets until there's a buffer to store them in.
+         *
+         * If we write data, the controller acts happier if we enable
+         * the TX FIFO right away, and give the controller a moment
+         * to switch modes...
+         */
+        musb->set_address = false;
+        musb->ackpend = MUSB_CSR0_P_SVDRXPKTRDY;
+        if (req->wLength == 0) {
+                if (req->bRequestType & USB_DIR_IN)
+                        musb->ackpend |= MUSB_CSR0_TXPKTRDY;
+                musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT;
+        } else if (req->bRequestType & USB_DIR_IN) {
+                musb->ep0_state = MUSB_EP0_STAGE_TX;
+                musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDRXPKTRDY);
+                while ((musb_readw(regs, MUSB_CSR0)
+                                & MUSB_CSR0_RXPKTRDY) != 0)
+                        cpu_relax();
+                musb->ackpend = 0;
+        } else
+                musb->ep0_state = MUSB_EP0_STAGE_RX;
+}
+
+static int
+forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)
+__releases(musb->lock)
+__acquires(musb->lock)
+{
+        int retval;
+        if (!musb->gadget_driver)
+                return -EOPNOTSUPP;
+        spin_unlock(&musb->lock);
+        retval = musb->gadget_driver->setup(&musb->g, ctrlrequest);
+        spin_lock(&musb->lock);
+        return retval;
+}
+
+/*
+ * Handle peripheral ep0 interrupt
+ *
+ * Context: irq handler; we won't re-enter the driver that way.
+ */
+irqreturn_t musb_g_ep0_irq(struct musb *musb)
+{
+        u16             csr;
+        u16             len;
+        void __iomem    *mbase = musb->mregs;
+        void __iomem    *regs = musb->endpoints[0].regs;
+        irqreturn_t     retval = IRQ_NONE;
+
+        musb_ep_select(mbase, 0);       /* select ep0 */
+        csr = musb_readw(regs, MUSB_CSR0);
+        len = musb_readb(regs, MUSB_COUNT0);
+
+        DBG(4, "csr %04x, count %d, myaddr %d, ep0stage %s\n",
+                        csr, len,
+                        musb_readb(mbase, MUSB_FADDR),
+                        decode_ep0stage(musb->ep0_state));
+
+        /* I sent a stall.. need to acknowledge it now.. */
+        if (csr & MUSB_CSR0_P_SENTSTALL) {
+                musb_writew(regs, MUSB_CSR0,
+                                csr & ~MUSB_CSR0_P_SENTSTALL);
+                retval = IRQ_HANDLED;
+                musb->ep0_state = MUSB_EP0_STAGE_SETUP;
+                csr = musb_readw(regs, MUSB_CSR0);
+        }
+
+        /* request ended "early" */
+        if (csr & MUSB_CSR0_P_SETUPEND) {
+                musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDSETUPEND);
+                retval = IRQ_HANDLED;
+                musb->ep0_state = MUSB_EP0_STAGE_SETUP;
+                csr = musb_readw(regs, MUSB_CSR0);
+                /* NOTE:  request may need completion */
+        }
+
+        /* docs from Mentor only describe tx, rx, and idle/setup states.
+         * we need to handle nuances around status stages, and also the
+         * case where status and setup stages come back-to-back ...
+         */
+        switch (musb->ep0_state) {
+
+        case MUSB_EP0_STAGE_TX:
+                /* irq on clearing txpktrdy */
+                if ((csr & MUSB_CSR0_TXPKTRDY) == 0) {
+                        ep0_txstate(musb);
+                        retval = IRQ_HANDLED;
+                }
+                break;
+
+        case MUSB_EP0_STAGE_RX:
+                /* irq on set rxpktrdy */
+                if (csr & MUSB_CSR0_RXPKTRDY) {
+                        ep0_rxstate(musb);
+                        retval = IRQ_HANDLED;
+                }
+                break;
+
+        case MUSB_EP0_STAGE_STATUSIN:
+                /* end of sequence #2 (OUT/RX state) or #3 (no data) */
+
+                /* update address (if needed) only @ the end of the
+                 * status phase per usb spec, which also guarantees
+                 * we get 10 msec to receive this irq... until this
+                 * is done we won't see the next packet.
+                 */
+                if (musb->set_address) {
+                        musb->set_address = false;
+                        musb_writeb(mbase, MUSB_FADDR, musb->address);
+                }
+
+                /* enter test mode if needed (exit by reset) */
+                else if (musb->test_mode) {
+                        DBG(1, "entering TESTMODE\n");
+
+                        if (MUSB_TEST_PACKET == musb->test_mode_nr)
+                                musb_load_testpacket(musb);
+
+                        musb_writeb(mbase, MUSB_TESTMODE,
+                                        musb->test_mode_nr);
+                }
+                /* FALLTHROUGH */
+
+        case MUSB_EP0_STAGE_STATUSOUT:
+                /* end of sequence #1: write to host (TX state) */
+                {
+                        struct usb_request      *req;
+
+                        req = next_ep0_request(musb);
+                        if (req)
+                                musb_g_ep0_giveback(musb, req);
+                }
+                retval = IRQ_HANDLED;
+                musb->ep0_state = MUSB_EP0_STAGE_SETUP;
+                /* FALLTHROUGH */
+
+        case MUSB_EP0_STAGE_SETUP:
+                if (csr & MUSB_CSR0_RXPKTRDY) {
+                        struct usb_ctrlrequest  setup;
+                        int                     handled = 0;
+
+                        if (len != 8) {
+                                ERR("SETUP packet len %d != 8 ?\n", len);
+                                break;
+                        }
+                        musb_read_setup(musb, &setup);
+                        retval = IRQ_HANDLED;
+
+                        /* sometimes the RESET won't be reported */
+                        if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) {
+                                u8      power;
+
+                                printk(KERN_NOTICE "%s: peripheral reset "
+                                                "irq lost!\n",
+                                                musb_driver_name);
+                                power = musb_readb(mbase, MUSB_POWER);
+                                musb->g.speed = (power & MUSB_POWER_HSMODE)
+                                        ? USB_SPEED_HIGH : USB_SPEED_FULL;
+
+                        }
+
+                        switch (musb->ep0_state) {
+
+                        /* sequence #3 (no data stage), includes requests
+                         * we can't forward (notably SET_ADDRESS and the
+                         * device/endpoint feature set/clear operations)
+                         * plus SET_CONFIGURATION and others we must
+                         */
+                        case MUSB_EP0_STAGE_ACKWAIT:
+                                handled = service_zero_data_request(
+                                                musb, &setup);
+
+                                /* status stage might be immediate */
+                                if (handled > 0) {
+                                        musb->ackpend |= MUSB_CSR0_P_DATAEND;
+                                        musb->ep0_state =
+                                                MUSB_EP0_STAGE_STATUSIN;
+                                }
+                                break;
+
+                        /* sequence #1 (IN to host), includes GET_STATUS
+                         * requests that we can't forward, GET_DESCRIPTOR
+                         * and others that we must
+                         */
+                        case MUSB_EP0_STAGE_TX:
+                                handled = service_in_request(musb, &setup);
+                                if (handled > 0) {
+                                        musb->ackpend = MUSB_CSR0_TXPKTRDY
+                                                | MUSB_CSR0_P_DATAEND;
+                                        musb->ep0_state =
+                                                MUSB_EP0_STAGE_STATUSOUT;
+                                }
+                                break;
+
+                        /* sequence #2 (OUT from host), always forward */
+                        default:                /* MUSB_EP0_STAGE_RX */
+                                break;
+                        }
+
+                        DBG(3, "handled %d, csr %04x, ep0stage %s\n",
+                                handled, csr,
+                                decode_ep0stage(musb->ep0_state));
+
+                        /* unless we need to delegate this to the gadget
+                         * driver, we know how to wrap this up:  csr0 has
+                         * not yet been written.
+                         */
+                        if (handled < 0)
+                                goto stall;
+                        else if (handled > 0)
+                                goto finish;
+
+                        handled = forward_to_driver(musb, &setup);
+                        if (handled < 0) {
+                                musb_ep_select(mbase, 0);
+stall:
+                                DBG(3, "stall (%d)\n", handled);
+                                musb->ackpend |= MUSB_CSR0_P_SENDSTALL;
+                                musb->ep0_state = MUSB_EP0_STAGE_SETUP;
+finish:
+                                musb_writew(regs, MUSB_CSR0,
+                                                musb->ackpend);
+                                musb->ackpend = 0;
+                        }
+                }
+                break;
+
+        case MUSB_EP0_STAGE_ACKWAIT:
+                /* This should not happen. But happens with tusb6010 with
+                 * g_file_storage and high speed. Do nothing.
+                 */
+                retval = IRQ_HANDLED;
+                break;
+
+        default:
+                /* "can't happen" */
+                WARN_ON(1);
+                musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SENDSTALL);
+                musb->ep0_state = MUSB_EP0_STAGE_SETUP;
+                break;
+        }
+
+        return retval;
+}
+
+
+static int
+musb_g_ep0_enable(struct usb_ep *ep, const struct usb_endpoint_descriptor *desc)
+{
+        /* always enabled */
+        return -EINVAL;
+}
+
+static int musb_g_ep0_disable(struct usb_ep *e)
+{
+        /* always enabled */
+        return -EINVAL;
+}
+
+static int
+musb_g_ep0_queue(struct usb_ep *e, struct usb_request *r, gfp_t gfp_flags)
+{
+        struct musb_ep          *ep;
+        struct musb_request     *req;
+        struct musb             *musb;
+        int                     status;
+        unsigned long           lockflags;
+        void __iomem            *regs;
+
+        if (!e || !r)
+                return -EINVAL;
+
+        ep = to_musb_ep(e);
+        musb = ep->musb;
+        regs = musb->control_ep->regs;
+
+        req = to_musb_request(r);
+        req->musb = musb;
+        req->request.actual = 0;
+        req->request.status = -EINPROGRESS;
+        req->tx = ep->is_in;
+
+        spin_lock_irqsave(&musb->lock, lockflags);
+
+        if (!list_empty(&ep->req_list)) {
+                status = -EBUSY;
+                goto cleanup;
+        }
+
+        switch (musb->ep0_state) {
+        case MUSB_EP0_STAGE_RX:         /* control-OUT data */
+        case MUSB_EP0_STAGE_TX:         /* control-IN data */
+        case MUSB_EP0_STAGE_ACKWAIT:    /* zero-length data */
+                status = 0;
+                break;
+        default:
+                DBG(1, "ep0 request queued in state %d\n",
+                                musb->ep0_state);
+                status = -EINVAL;
+                goto cleanup;
+        }
+
+        /* add request to the list */
+        list_add_tail(&(req->request.list), &(ep->req_list));
+
+        DBG(3, "queue to %s (%s), length=%d\n",
+                        ep->name, ep->is_in ? "IN/TX" : "OUT/RX",
+                        req->request.length);
+
+        musb_ep_select(musb->mregs, 0);
+
+        /* sequence #1, IN ... start writing the data */
+        if (musb->ep0_state == MUSB_EP0_STAGE_TX)
+                ep0_txstate(musb);
+
+        /* sequence #3, no-data ... issue IN status */
+        else if (musb->ep0_state == MUSB_EP0_STAGE_ACKWAIT) {
+                if (req->request.length)
+                        status = -EINVAL;
+                else {
+                        musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
+                        musb_writew(regs, MUSB_CSR0,
+                                        musb->ackpend | MUSB_CSR0_P_DATAEND);
+                        musb->ackpend = 0;
+                        musb_g_ep0_giveback(ep->musb, r);
+                }
+
+        /* else for sequence #2 (OUT), caller provides a buffer
+         * before the next packet arrives.  deferred responses
+         * (after SETUP is acked) are racey.
+         */
+        } else if (musb->ackpend) {
+                musb_writew(regs, MUSB_CSR0, musb->ackpend);
+                musb->ackpend = 0;
+        }
+
+cleanup:
+        spin_unlock_irqrestore(&musb->lock, lockflags);
+        return status;
+}
+
+static int musb_g_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
+{
+        /* we just won't support this */
+        return -EINVAL;
+}
+
+static int musb_g_ep0_halt(struct usb_ep *e, int value)
+{
+        struct musb_ep          *ep;
+        struct musb             *musb;
+        void __iomem            *base, *regs;
+        unsigned long           flags;
+        int                     status;
+        u16                     csr;
+
+        if (!e || !value)
+                return -EINVAL;
+
+        ep = to_musb_ep(e);
+        musb = ep->musb;
+        base = musb->mregs;
+        regs = musb->control_ep->regs;
+        status = 0;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if (!list_empty(&ep->req_list)) {
+                status = -EBUSY;
+                goto cleanup;
+        }
+
+        musb_ep_select(base, 0);
+        csr = musb->ackpend;
+
+        switch (musb->ep0_state) {
+
+        /* Stalls are usually issued after parsing SETUP packet, either
+         * directly in irq context from setup() or else later.
+         */
+        case MUSB_EP0_STAGE_TX:         /* control-IN data */
+        case MUSB_EP0_STAGE_ACKWAIT:    /* STALL for zero-length data */
+        case MUSB_EP0_STAGE_RX:         /* control-OUT data */
+                csr = musb_readw(regs, MUSB_CSR0);
+                /* FALLTHROUGH */
+
+        /* It's also OK to issue stalls during callbacks when a non-empty
+         * DATA stage buffer has been read (or even written).
+         */
+        case MUSB_EP0_STAGE_STATUSIN:   /* control-OUT status */
+        case MUSB_EP0_STAGE_STATUSOUT:  /* control-IN status */
+
+                csr |= MUSB_CSR0_P_SENDSTALL;
+                musb_writew(regs, MUSB_CSR0, csr);
+                musb->ep0_state = MUSB_EP0_STAGE_SETUP;
+                musb->ackpend = 0;
+                break;
+        default:
+                DBG(1, "ep0 can't halt in state %d\n", musb->ep0_state);
+                status = -EINVAL;
+        }
+
+cleanup:
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return status;
+}
+
+const struct usb_ep_ops musb_g_ep0_ops = {
+        .enable         = musb_g_ep0_enable,
+        .disable        = musb_g_ep0_disable,
+        .alloc_request  = musb_alloc_request,
+        .free_request   = musb_free_request,
+        .queue          = musb_g_ep0_queue,
+        .dequeue        = musb_g_ep0_dequeue,
+        .set_halt       = musb_g_ep0_halt,
+};
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
new file mode 100644
index 000000000000..8b4be012669a
--- /dev/null
+++ b/drivers/usb/musb/musb_host.c
@@ -0,0 +1,2170 @@
+/*
+ * MUSB OTG driver host support
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/list.h>
+
+#include "musb_core.h"
+#include "musb_host.h"
+
+
+/* MUSB HOST status 22-mar-2006
+ *
+ * - There's still lots of partial code duplication for fault paths, so
+ *   they aren't handled as consistently as they need to be.
+ *
+ * - PIO mostly behaved when last tested.
+ *     + including ep0, with all usbtest cases 9, 10
+ *     + usbtest 14 (ep0out) doesn't seem to run at all
+ *     + double buffered OUT/TX endpoints saw stalls(!) with certain usbtest
+ *       configurations, but otherwise double buffering passes basic tests.
+ *     + for 2.6.N, for N > ~10, needs API changes for hcd framework.
+ *
+ * - DMA (CPPI) ... partially behaves, not currently recommended
+ *     + about 1/15 the speed of typical EHCI implementations (PCI)
+ *     + RX, all too often reqpkt seems to misbehave after tx
+ *     + TX, no known issues (other than evident silicon issue)
+ *
+ * - DMA (Mentor/OMAP) ...has at least toggle update problems
+ *
+ * - Still no traffic scheduling code to make NAKing for bulk or control
+ *   transfers unable to starve other requests; or to make efficient use
+ *   of hardware with periodic transfers.  (Note that network drivers
+ *   commonly post bulk reads that stay pending for a long time; these
+ *   would make very visible trouble.)
+ *
+ * - Not tested with HNP, but some SRP paths seem to behave.
+ *
+ * NOTE 24-August-2006:
+ *
+ * - Bulk traffic finally uses both sides of hardware ep1, freeing up an
+ *   extra endpoint for periodic use enabling hub + keybd + mouse.  That
+ *   mostly works, except that with "usbnet" it's easy to trigger cases
+ *   with "ping" where RX loses.  (a) ping to davinci, even "ping -f",
+ *   fine; but (b) ping _from_ davinci, even "ping -c 1", ICMP RX loses
+ *   although ARP RX wins.  (That test was done with a full speed link.)
+ */
+
+
+/*
+ * NOTE on endpoint usage:
+ *
+ * CONTROL transfers all go through ep0.  BULK ones go through dedicated IN
+ * and OUT endpoints ... hardware is dedicated for those "async" queue(s).
+ *
+ * (Yes, bulk _could_ use more of the endpoints than that, and would even
+ * benefit from it ... one remote device may easily be NAKing while others
+ * need to perform transfers in that same direction.  The same thing could
+ * be done in software though, assuming dma cooperates.)
+ *
+ * INTERUPPT and ISOCHRONOUS transfers are scheduled to the other endpoints.
+ * So far that scheduling is both dumb and optimistic:  the endpoint will be
+ * "claimed" until its software queue is no longer refilled.  No multiplexing
+ * of transfers between endpoints, or anything clever.
+ */
+
+
+static void musb_ep_program(struct musb *musb, u8 epnum,
+                        struct urb *urb, unsigned int nOut,
+                        u8 *buf, u32 len);
+
+/*
+ * Clear TX fifo. Needed to avoid BABBLE errors.
+ */
+static inline void musb_h_tx_flush_fifo(struct musb_hw_ep *ep)
+{
+        void __iomem    *epio = ep->regs;
+        u16             csr;
+        int             retries = 1000;
+
+        csr = musb_readw(epio, MUSB_TXCSR);
+        while (csr & MUSB_TXCSR_FIFONOTEMPTY) {
+                DBG(5, "Host TX FIFONOTEMPTY csr: %02x\n", csr);
+                csr |= MUSB_TXCSR_FLUSHFIFO;
+                musb_writew(epio, MUSB_TXCSR, csr);
+                csr = musb_readw(epio, MUSB_TXCSR);
+                if (retries-- < 1) {
+                        ERR("Could not flush host TX fifo: csr: %04x\n", csr);
+                        return;
+                }
+                mdelay(1);
+        }
+}
+
+/*
+ * Start transmit. Caller is responsible for locking shared resources.
+ * musb must be locked.
+ */
+static inline void musb_h_tx_start(struct musb_hw_ep *ep)
+{
+        u16     txcsr;
+
+        /* NOTE: no locks here; caller should lock and select EP */
+        if (ep->epnum) {
+                txcsr = musb_readw(ep->regs, MUSB_TXCSR);
+                txcsr |= MUSB_TXCSR_TXPKTRDY | MUSB_TXCSR_H_WZC_BITS;
+                musb_writew(ep->regs, MUSB_TXCSR, txcsr);
+        } else {
+                txcsr = MUSB_CSR0_H_SETUPPKT | MUSB_CSR0_TXPKTRDY;
+                musb_writew(ep->regs, MUSB_CSR0, txcsr);
+        }
+
+}
+
+static inline void cppi_host_txdma_start(struct musb_hw_ep *ep)
+{
+        u16     txcsr;
+
+        /* NOTE: no locks here; caller should lock and select EP */
+        txcsr = musb_readw(ep->regs, MUSB_TXCSR);
+        txcsr |= MUSB_TXCSR_DMAENAB | MUSB_TXCSR_H_WZC_BITS;
+        musb_writew(ep->regs, MUSB_TXCSR, txcsr);
+}
+
+/*
+ * Start the URB at the front of an endpoint's queue
+ * end must be claimed from the caller.
+ *
+ * Context: controller locked, irqs blocked
+ */
+static void
+musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh)
+{
+        u16                     frame;
+        u32                     len;
+        void                    *buf;
+        void __iomem            *mbase =  musb->mregs;
+        struct urb              *urb = next_urb(qh);
+        struct musb_hw_ep       *hw_ep = qh->hw_ep;
+        unsigned                pipe = urb->pipe;
+        u8                      address = usb_pipedevice(pipe);
+        int                     epnum = hw_ep->epnum;
+
+        /* initialize software qh state */
+        qh->offset = 0;
+        qh->segsize = 0;
+
+        /* gather right source of data */
+        switch (qh->type) {
+        case USB_ENDPOINT_XFER_CONTROL:
+                /* control transfers always start with SETUP */
+                is_in = 0;
+                hw_ep->out_qh = qh;
+                musb->ep0_stage = MUSB_EP0_START;
+                buf = urb->setup_packet;
+                len = 8;
+                break;
+        case USB_ENDPOINT_XFER_ISOC:
+                qh->iso_idx = 0;
+                qh->frame = 0;
+                buf = urb->transfer_buffer + urb->iso_frame_desc[0].offset;
+                len = urb->iso_frame_desc[0].length;
+                break;
+        default:                /* bulk, interrupt */
+                buf = urb->transfer_buffer;
+                len = urb->transfer_buffer_length;
+        }
+
+        DBG(4, "qh %p urb %p dev%d ep%d%s%s, hw_ep %d, %p/%d\n",
+                        qh, urb, address, qh->epnum,
+                        is_in ? "in" : "out",
+                        ({char *s; switch (qh->type) {
+                        case USB_ENDPOINT_XFER_CONTROL: s = ""; break;
+                        case USB_ENDPOINT_XFER_BULK:    s = "-bulk"; break;
+                        case USB_ENDPOINT_XFER_ISOC:    s = "-iso"; break;
+                        default:                        s = "-intr"; break;
+                        }; s; }),
+                        epnum, buf, len);
+
+        /* Configure endpoint */
+        if (is_in || hw_ep->is_shared_fifo)
+                hw_ep->in_qh = qh;
+        else
+                hw_ep->out_qh = qh;
+        musb_ep_program(musb, epnum, urb, !is_in, buf, len);
+
+        /* transmit may have more work: start it when it is time */
+        if (is_in)
+                return;
+
+        /* determine if the time is right for a periodic transfer */
+        switch (qh->type) {
+        case USB_ENDPOINT_XFER_ISOC:
+        case USB_ENDPOINT_XFER_INT:
+                DBG(3, "check whether there's still time for periodic Tx\n");
+                qh->iso_idx = 0;
+                frame = musb_readw(mbase, MUSB_FRAME);
+                /* FIXME this doesn't implement that scheduling policy ...
+                 * or handle framecounter wrapping
+                 */
+                if ((urb->transfer_flags & URB_ISO_ASAP)
+                                || (frame >= urb->start_frame)) {
+                        /* REVISIT the SOF irq handler shouldn't duplicate
+                         * this code; and we don't init urb->start_frame...
+                         */
+                        qh->frame = 0;
+                        goto start;
+                } else {
+                        qh->frame = urb->start_frame;
+                        /* enable SOF interrupt so we can count down */
+                        DBG(1, "SOF for %d\n", epnum);
+#if 1 /* ifndef CONFIG_ARCH_DAVINCI */
+                        musb_writeb(mbase, MUSB_INTRUSBE, 0xff);
+#endif
+                }
+                break;
+        default:
+start:
+                DBG(4, "Start TX%d %s\n", epnum,
+                        hw_ep->tx_channel ? "dma" : "pio");
+
+                if (!hw_ep->tx_channel)
+                        musb_h_tx_start(hw_ep);
+                else if (is_cppi_enabled() || tusb_dma_omap())
+                        cppi_host_txdma_start(hw_ep);
+        }
+}
+
+/* caller owns controller lock, irqs are blocked */
+static void
+__musb_giveback(struct musb *musb, struct urb *urb, int status)
+__releases(musb->lock)
+__acquires(musb->lock)
+{
+        DBG(({ int level; switch (urb->status) {
+                                case 0:
+                                        level = 4;
+                                        break;
+                                /* common/boring faults */
+                                case -EREMOTEIO:
+                                case -ESHUTDOWN:
+                                case -ECONNRESET:
+                                case -EPIPE:
+                                        level = 3;
+                                        break;
+                                default:
+                                        level = 2;
+                                        break;
+                                }; level; }),
+                        "complete %p (%d), dev%d ep%d%s, %d/%d\n",
+                        urb, urb->status,
+                        usb_pipedevice(urb->pipe),
+                        usb_pipeendpoint(urb->pipe),
+                        usb_pipein(urb->pipe) ? "in" : "out",
+                        urb->actual_length, urb->transfer_buffer_length
+                        );
+
+        spin_unlock(&musb->lock);
+        usb_hcd_giveback_urb(musb_to_hcd(musb), urb, status);
+        spin_lock(&musb->lock);
+}
+
+/* for bulk/interrupt endpoints only */
+static inline void
+musb_save_toggle(struct musb_hw_ep *ep, int is_in, struct urb *urb)
+{
+        struct usb_device       *udev = urb->dev;
+        u16                     csr;
+        void __iomem            *epio = ep->regs;
+        struct musb_qh          *qh;
+
+        /* FIXME:  the current Mentor DMA code seems to have
+         * problems getting toggle correct.
+         */
+
+        if (is_in || ep->is_shared_fifo)
+                qh = ep->in_qh;
+        else
+                qh = ep->out_qh;
+
+        if (!is_in) {
+                csr = musb_readw(epio, MUSB_TXCSR);
+                usb_settoggle(udev, qh->epnum, 1,
+                        (csr & MUSB_TXCSR_H_DATATOGGLE)
+                                ? 1 : 0);
+        } else {
+                csr = musb_readw(epio, MUSB_RXCSR);
+                usb_settoggle(udev, qh->epnum, 0,
+                        (csr & MUSB_RXCSR_H_DATATOGGLE)
+                                ? 1 : 0);
+        }
+}
+
+/* caller owns controller lock, irqs are blocked */
+static struct musb_qh *
+musb_giveback(struct musb_qh *qh, struct urb *urb, int status)
+{
+        int                     is_in;
+        struct musb_hw_ep       *ep = qh->hw_ep;
+        struct musb             *musb = ep->musb;
+        int                     ready = qh->is_ready;
+
+        if (ep->is_shared_fifo)
+                is_in = 1;
+        else
+                is_in = usb_pipein(urb->pipe);
+
+        /* save toggle eagerly, for paranoia */
+        switch (qh->type) {
+        case USB_ENDPOINT_XFER_BULK:
+        case USB_ENDPOINT_XFER_INT:
+                musb_save_toggle(ep, is_in, urb);
+                break;
+        case USB_ENDPOINT_XFER_ISOC:
+                if (status == 0 && urb->error_count)
+                        status = -EXDEV;
+                break;
+        }
+
+        usb_hcd_unlink_urb_from_ep(musb_to_hcd(musb), urb);
+
+        qh->is_ready = 0;
+        __musb_giveback(musb, urb, status);
+        qh->is_ready = ready;
+
+        /* reclaim resources (and bandwidth) ASAP; deschedule it, and
+         * invalidate qh as soon as list_empty(&hep->urb_list)
+         */
+        if (list_empty(&qh->hep->urb_list)) {
+                struct list_head        *head;
+
+                if (is_in)
+                        ep->rx_reinit = 1;
+                else
+                        ep->tx_reinit = 1;
+
+                /* clobber old pointers to this qh */
+                if (is_in || ep->is_shared_fifo)
+                        ep->in_qh = NULL;
+                else
+                        ep->out_qh = NULL;
+                qh->hep->hcpriv = NULL;
+
+                switch (qh->type) {
+
+                case USB_ENDPOINT_XFER_ISOC:
+                case USB_ENDPOINT_XFER_INT:
+                        /* this is where periodic bandwidth should be
+                         * de-allocated if it's tracked and allocated;
+                         * and where we'd update the schedule tree...
+                         */
+                        musb->periodic[ep->epnum] = NULL;
+                        kfree(qh);
+                        qh = NULL;
+                        break;
+
+                case USB_ENDPOINT_XFER_CONTROL:
+                case USB_ENDPOINT_XFER_BULK:
+                        /* fifo policy for these lists, except that NAKing
+                         * should rotate a qh to the end (for fairness).
+                         */
+                        head = qh->ring.prev;
+                        list_del(&qh->ring);
+                        kfree(qh);
+                        qh = first_qh(head);
+                        break;
+                }
+        }
+        return qh;
+}
+
+/*
+ * Advance this hardware endpoint's queue, completing the specified urb and
+ * advancing to either the next urb queued to that qh, or else invalidating
+ * that qh and advancing to the next qh scheduled after the current one.
+ *
+ * Context: caller owns controller lock, irqs are blocked
+ */
+static void
+musb_advance_schedule(struct musb *musb, struct urb *urb,
+                struct musb_hw_ep *hw_ep, int is_in)
+{
+        struct musb_qh  *qh;
+
+        if (is_in || hw_ep->is_shared_fifo)
+                qh = hw_ep->in_qh;
+        else
+                qh = hw_ep->out_qh;
+
+        if (urb->status == -EINPROGRESS)
+                qh = musb_giveback(qh, urb, 0);
+        else
+                qh = musb_giveback(qh, urb, urb->status);
+
+        if (qh && qh->is_ready && !list_empty(&qh->hep->urb_list)) {
+                DBG(4, "... next ep%d %cX urb %p\n",
+                                hw_ep->epnum, is_in ? 'R' : 'T',
+                                next_urb(qh));
+                musb_start_urb(musb, is_in, qh);
+        }
+}
+
+static inline u16 musb_h_flush_rxfifo(struct musb_hw_ep *hw_ep, u16 csr)
+{
+        /* we don't want fifo to fill itself again;
+         * ignore dma (various models),
+         * leave toggle alone (may not have been saved yet)
+         */
+        csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_RXPKTRDY;
+        csr &= ~(MUSB_RXCSR_H_REQPKT
+                | MUSB_RXCSR_H_AUTOREQ
+                | MUSB_RXCSR_AUTOCLEAR);
+
+        /* write 2x to allow double buffering */
+        musb_writew(hw_ep->regs, MUSB_RXCSR, csr);
+        musb_writew(hw_ep->regs, MUSB_RXCSR, csr);
+
+        /* flush writebuffer */
+        return musb_readw(hw_ep->regs, MUSB_RXCSR);
+}
+
+/*
+ * PIO RX for a packet (or part of it).
+ */
+static bool
+musb_host_packet_rx(struct musb *musb, struct urb *urb, u8 epnum, u8 iso_err)
+{
+        u16                     rx_count;
+        u8                      *buf;
+        u16                     csr;
+        bool                    done = false;
+        u32                     length;
+        int                     do_flush = 0;
+        struct musb_hw_ep       *hw_ep = musb->endpoints + epnum;
+        void __iomem            *epio = hw_ep->regs;
+        struct musb_qh          *qh = hw_ep->in_qh;
+        int                     pipe = urb->pipe;
+        void                    *buffer = urb->transfer_buffer;
+
+        /* musb_ep_select(mbase, epnum); */
+        rx_count = musb_readw(epio, MUSB_RXCOUNT);
+        DBG(3, "RX%d count %d, buffer %p len %d/%d\n", epnum, rx_count,
+                        urb->transfer_buffer, qh->offset,
+                        urb->transfer_buffer_length);
+
+        /* unload FIFO */
+        if (usb_pipeisoc(pipe)) {
+                int                                     status = 0;
+                struct usb_iso_packet_descriptor        *d;
+
+                if (iso_err) {
+                        status = -EILSEQ;
+                        urb->error_count++;
+                }
+
+                d = urb->iso_frame_desc + qh->iso_idx;
+                buf = buffer + d->offset;
+                length = d->length;
+                if (rx_count > length) {
+                        if (status == 0) {
+                                status = -EOVERFLOW;
+                                urb->error_count++;
+                        }
+                        DBG(2, "** OVERFLOW %d into %d\n", rx_count, length);
+                        do_flush = 1;
+                } else
+                        length = rx_count;
+                urb->actual_length += length;
+                d->actual_length = length;
+
+                d->status = status;
+
+                /* see if we are done */
+                done = (++qh->iso_idx >= urb->number_of_packets);
+        } else {
+                /* non-isoch */
+                buf = buffer + qh->offset;
+                length = urb->transfer_buffer_length - qh->offset;
+                if (rx_count > length) {
+                        if (urb->status == -EINPROGRESS)
+                                urb->status = -EOVERFLOW;
+                        DBG(2, "** OVERFLOW %d into %d\n", rx_count, length);
+                        do_flush = 1;
+                } else
+                        length = rx_count;
+                urb->actual_length += length;
+                qh->offset += length;
+
+                /* see if we are done */
+                done = (urb->actual_length == urb->transfer_buffer_length)
+                        || (rx_count < qh->maxpacket)
+                        || (urb->status != -EINPROGRESS);
+                if (done
+                                && (urb->status == -EINPROGRESS)
+                                && (urb->transfer_flags & URB_SHORT_NOT_OK)
+                                && (urb->actual_length
+                                        < urb->transfer_buffer_length))
+                        urb->status = -EREMOTEIO;
+        }
+
+        musb_read_fifo(hw_ep, length, buf);
+
+        csr = musb_readw(epio, MUSB_RXCSR);
+        csr |= MUSB_RXCSR_H_WZC_BITS;
+        if (unlikely(do_flush))
+                musb_h_flush_rxfifo(hw_ep, csr);
+        else {
+                /* REVISIT this assumes AUTOCLEAR is never set */
+                csr &= ~(MUSB_RXCSR_RXPKTRDY | MUSB_RXCSR_H_REQPKT);
+                if (!done)
+                        csr |= MUSB_RXCSR_H_REQPKT;
+                musb_writew(epio, MUSB_RXCSR, csr);
+        }
+
+        return done;
+}
+
+/* we don't always need to reinit a given side of an endpoint...
+ * when we do, use tx/rx reinit routine and then construct a new CSR
+ * to address data toggle, NYET, and DMA or PIO.
+ *
+ * it's possible that driver bugs (especially for DMA) or aborting a
+ * transfer might have left the endpoint busier than it should be.
+ * the busy/not-empty tests are basically paranoia.
+ */
+static void
+musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep)
+{
+        u16     csr;
+
+        /* NOTE:  we know the "rx" fifo reinit never triggers for ep0.
+         * That always uses tx_reinit since ep0 repurposes TX register
+         * offsets; the initial SETUP packet is also a kind of OUT.
+         */
+
+        /* if programmed for Tx, put it in RX mode */
+        if (ep->is_shared_fifo) {
+                csr = musb_readw(ep->regs, MUSB_TXCSR);
+                if (csr & MUSB_TXCSR_MODE) {
+                        musb_h_tx_flush_fifo(ep);
+                        musb_writew(ep->regs, MUSB_TXCSR,
+                                        MUSB_TXCSR_FRCDATATOG);
+                }
+                /* clear mode (and everything else) to enable Rx */
+                musb_writew(ep->regs, MUSB_TXCSR, 0);
+
+        /* scrub all previous state, clearing toggle */
+        } else {
+                csr = musb_readw(ep->regs, MUSB_RXCSR);
+                if (csr & MUSB_RXCSR_RXPKTRDY)
+                        WARNING("rx%d, packet/%d ready?\n", ep->epnum,
+                                musb_readw(ep->regs, MUSB_RXCOUNT));
+
+                musb_h_flush_rxfifo(ep, MUSB_RXCSR_CLRDATATOG);
+        }
+
+        /* target addr and (for multipoint) hub addr/port */
+        if (musb->is_multipoint) {
+                musb_writeb(ep->target_regs, MUSB_RXFUNCADDR,
+                        qh->addr_reg);
+                musb_writeb(ep->target_regs, MUSB_RXHUBADDR,
+                        qh->h_addr_reg);
+                musb_writeb(ep->target_regs, MUSB_RXHUBPORT,
+                        qh->h_port_reg);
+        } else
+                musb_writeb(musb->mregs, MUSB_FADDR, qh->addr_reg);
+
+        /* protocol/endpoint, interval/NAKlimit, i/o size */
+        musb_writeb(ep->regs, MUSB_RXTYPE, qh->type_reg);
+        musb_writeb(ep->regs, MUSB_RXINTERVAL, qh->intv_reg);
+        /* NOTE: bulk combining rewrites high bits of maxpacket */
+        musb_writew(ep->regs, MUSB_RXMAXP, qh->maxpacket);
+
+        ep->rx_reinit = 0;
+}
+
+
+/*
+ * Program an HDRC endpoint as per the given URB
+ * Context: irqs blocked, controller lock held
+ */
+static void musb_ep_program(struct musb *musb, u8 epnum,
+                        struct urb *urb, unsigned int is_out,
+                        u8 *buf, u32 len)
+{
+        struct dma_controller   *dma_controller;
+        struct dma_channel      *dma_channel;
+        u8                      dma_ok;
+        void __iomem            *mbase = musb->mregs;
+        struct musb_hw_ep       *hw_ep = musb->endpoints + epnum;
+        void __iomem            *epio = hw_ep->regs;
+        struct musb_qh          *qh;
+        u16                     packet_sz;
+
+        if (!is_out || hw_ep->is_shared_fifo)
+                qh = hw_ep->in_qh;
+        else
+                qh = hw_ep->out_qh;
+
+        packet_sz = qh->maxpacket;
+
+        DBG(3, "%s hw%d urb %p spd%d dev%d ep%d%s "
+                                "h_addr%02x h_port%02x bytes %d\n",
+                        is_out ? "-->" : "<--",
+                        epnum, urb, urb->dev->speed,
+                        qh->addr_reg, qh->epnum, is_out ? "out" : "in",
+                        qh->h_addr_reg, qh->h_port_reg,
+                        len);
+
+        musb_ep_select(mbase, epnum);
+
+        /* candidate for DMA? */
+        dma_controller = musb->dma_controller;
+        if (is_dma_capable() && epnum && dma_controller) {
+                dma_channel = is_out ? hw_ep->tx_channel : hw_ep->rx_channel;
+                if (!dma_channel) {
+                        dma_channel = dma_controller->channel_alloc(
+                                        dma_controller, hw_ep, is_out);
+                        if (is_out)
+                                hw_ep->tx_channel = dma_channel;
+                        else
+                                hw_ep->rx_channel = dma_channel;
+                }
+        } else
+                dma_channel = NULL;
+
+        /* make sure we clear DMAEnab, autoSet bits from previous run */
+
+        /* OUT/transmit/EP0 or IN/receive? */
+        if (is_out) {
+                u16     csr;
+                u16     int_txe;
+                u16     load_count;
+
+                csr = musb_readw(epio, MUSB_TXCSR);
+
+                /* disable interrupt in case we flush */
+                int_txe = musb_readw(mbase, MUSB_INTRTXE);
+                musb_writew(mbase, MUSB_INTRTXE, int_txe & ~(1 << epnum));
+
+                /* general endpoint setup */
+                if (epnum) {
+                        /* ASSERT:  TXCSR_DMAENAB was already cleared */
+
+                        /* flush all old state, set default */
+                        musb_h_tx_flush_fifo(hw_ep);
+                        csr &= ~(MUSB_TXCSR_H_NAKTIMEOUT
+                                        | MUSB_TXCSR_DMAMODE
+                                        | MUSB_TXCSR_FRCDATATOG
+                                        | MUSB_TXCSR_H_RXSTALL
+                                        | MUSB_TXCSR_H_ERROR
+                                        | MUSB_TXCSR_TXPKTRDY
+                                        );
+                        csr |= MUSB_TXCSR_MODE;
+
+                        if (usb_gettoggle(urb->dev,
+                                        qh->epnum, 1))
+                                csr |= MUSB_TXCSR_H_WR_DATATOGGLE
+                                        | MUSB_TXCSR_H_DATATOGGLE;
+                        else
+                                csr |= MUSB_TXCSR_CLRDATATOG;
+
+                        /* twice in case of double packet buffering */
+                        musb_writew(epio, MUSB_TXCSR, csr);
+                        /* REVISIT may need to clear FLUSHFIFO ... */
+                        musb_writew(epio, MUSB_TXCSR, csr);
+                        csr = musb_readw(epio, MUSB_TXCSR);
+                } else {
+                        /* endpoint 0: just flush */
+                        musb_writew(epio, MUSB_CSR0,
+                                csr | MUSB_CSR0_FLUSHFIFO);
+                        musb_writew(epio, MUSB_CSR0,
+                                csr | MUSB_CSR0_FLUSHFIFO);
+                }
+
+                /* target addr and (for multipoint) hub addr/port */
+                if (musb->is_multipoint) {
+                        musb_writeb(mbase,
+                                MUSB_BUSCTL_OFFSET(epnum, MUSB_TXFUNCADDR),
+                                qh->addr_reg);
+                        musb_writeb(mbase,
+                                MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBADDR),
+                                qh->h_addr_reg);
+                        musb_writeb(mbase,
+                                MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBPORT),
+                                qh->h_port_reg);
+/* FIXME if !epnum, do the same for RX ... */
+                } else
+                        musb_writeb(mbase, MUSB_FADDR, qh->addr_reg);
+
+                /* protocol/endpoint/interval/NAKlimit */
+                if (epnum) {
+                        musb_writeb(epio, MUSB_TXTYPE, qh->type_reg);
+                        if (can_bulk_split(musb, qh->type))
+                                musb_writew(epio, MUSB_TXMAXP,
+                                        packet_sz
+                                        | ((hw_ep->max_packet_sz_tx /
+                                                packet_sz) - 1) << 11);
+                        else
+                                musb_writew(epio, MUSB_TXMAXP,
+                                        packet_sz);
+                        musb_writeb(epio, MUSB_TXINTERVAL, qh->intv_reg);
+                } else {
+                        musb_writeb(epio, MUSB_NAKLIMIT0, qh->intv_reg);
+                        if (musb->is_multipoint)
+                                musb_writeb(epio, MUSB_TYPE0,
+                                                qh->type_reg);
+                }
+
+                if (can_bulk_split(musb, qh->type))
+                        load_count = min((u32) hw_ep->max_packet_sz_tx,
+                                                len);
+                else
+                        load_count = min((u32) packet_sz, len);
+
+#ifdef CONFIG_USB_INVENTRA_DMA
+                if (dma_channel) {
+
+                        /* clear previous state */
+                        csr = musb_readw(epio, MUSB_TXCSR);
+                        csr &= ~(MUSB_TXCSR_AUTOSET
+                                | MUSB_TXCSR_DMAMODE
+                                | MUSB_TXCSR_DMAENAB);
+                        csr |= MUSB_TXCSR_MODE;
+                        musb_writew(epio, MUSB_TXCSR,
+                                csr | MUSB_TXCSR_MODE);
+
+                        qh->segsize = min(len, dma_channel->max_len);
+
+                        if (qh->segsize <= packet_sz)
+                                dma_channel->desired_mode = 0;
+                        else
+                                dma_channel->desired_mode = 1;
+
+
+                        if (dma_channel->desired_mode == 0) {
+                                csr &= ~(MUSB_TXCSR_AUTOSET
+                                        | MUSB_TXCSR_DMAMODE);
+                                csr |= (MUSB_TXCSR_DMAENAB);
+                                        /* against programming guide */
+                        } else
+                                csr |= (MUSB_TXCSR_AUTOSET
+                                        | MUSB_TXCSR_DMAENAB
+                                        | MUSB_TXCSR_DMAMODE);
+
+                        musb_writew(epio, MUSB_TXCSR, csr);
+
+                        dma_ok = dma_controller->channel_program(
+                                        dma_channel, packet_sz,
+                                        dma_channel->desired_mode,
+                                        urb->transfer_dma,
+                                        qh->segsize);
+                        if (dma_ok) {
+                                load_count = 0;
+                        } else {
+                                dma_controller->channel_release(dma_channel);
+                                if (is_out)
+                                        hw_ep->tx_channel = NULL;
+                                else
+                                        hw_ep->rx_channel = NULL;
+                                dma_channel = NULL;
+                        }
+                }
+#endif
+
+                /* candidate for DMA */
+                if ((is_cppi_enabled() || tusb_dma_omap()) && dma_channel) {
+
+                        /* program endpoint CSRs first, then setup DMA.
+                         * assume CPPI setup succeeds.
+                         * defer enabling dma.
+                         */
+                        csr = musb_readw(epio, MUSB_TXCSR);
+                        csr &= ~(MUSB_TXCSR_AUTOSET
+                                        | MUSB_TXCSR_DMAMODE
+                                        | MUSB_TXCSR_DMAENAB);
+                        csr |= MUSB_TXCSR_MODE;
+                        musb_writew(epio, MUSB_TXCSR,
+                                csr | MUSB_TXCSR_MODE);
+
+                        dma_channel->actual_len = 0L;
+                        qh->segsize = len;
+
+                        /* TX uses "rndis" mode automatically, but needs help
+                         * to identify the zero-length-final-packet case.
+                         */
+                        dma_ok = dma_controller->channel_program(
+                                        dma_channel, packet_sz,
+                                        (urb->transfer_flags
+                                                        & URB_ZERO_PACKET)
+                                                == URB_ZERO_PACKET,
+                                        urb->transfer_dma,
+                                        qh->segsize);
+                        if (dma_ok) {
+                                load_count = 0;
+                        } else {
+                                dma_controller->channel_release(dma_channel);
+                                hw_ep->tx_channel = NULL;
+                                dma_channel = NULL;
+
+                                /* REVISIT there's an error path here that
+                                 * needs handling:  can't do dma, but
+                                 * there's no pio buffer address...
+                                 */
+                        }
+                }
+
+                if (load_count) {
+                        /* ASSERT:  TXCSR_DMAENAB was already cleared */
+
+                        /* PIO to load FIFO */
+                        qh->segsize = load_count;
+                        musb_write_fifo(hw_ep, load_count, buf);
+                        csr = musb_readw(epio, MUSB_TXCSR);
+                        csr &= ~(MUSB_TXCSR_DMAENAB
+                                | MUSB_TXCSR_DMAMODE
+                                | MUSB_TXCSR_AUTOSET);
+                        /* write CSR */
+                        csr |= MUSB_TXCSR_MODE;
+
+                        if (epnum)
+                                musb_writew(epio, MUSB_TXCSR, csr);
+                }
+
+                /* re-enable interrupt */
+                musb_writew(mbase, MUSB_INTRTXE, int_txe);
+
+        /* IN/receive */
+        } else {
+                u16     csr;
+
+                if (hw_ep->rx_reinit) {
+                        musb_rx_reinit(musb, qh, hw_ep);
+
+                        /* init new state: toggle and NYET, maybe DMA later */
+                        if (usb_gettoggle(urb->dev, qh->epnum, 0))
+                                csr = MUSB_RXCSR_H_WR_DATATOGGLE
+                                        | MUSB_RXCSR_H_DATATOGGLE;
+                        else
+                                csr = 0;
+                        if (qh->type == USB_ENDPOINT_XFER_INT)
+                                csr |= MUSB_RXCSR_DISNYET;
+
+                } else {
+                        csr = musb_readw(hw_ep->regs, MUSB_RXCSR);
+
+                        if (csr & (MUSB_RXCSR_RXPKTRDY
+                                        | MUSB_RXCSR_DMAENAB
+                                        | MUSB_RXCSR_H_REQPKT))
+                                ERR("broken !rx_reinit, ep%d csr %04x\n",
+                                                hw_ep->epnum, csr);
+
+                        /* scrub any stale state, leaving toggle alone */
+                        csr &= MUSB_RXCSR_DISNYET;
+                }
+
+                /* kick things off */
+
+                if ((is_cppi_enabled() || tusb_dma_omap()) && dma_channel) {
+                        /* candidate for DMA */
+                        if (dma_channel) {
+                                dma_channel->actual_len = 0L;
+                                qh->segsize = len;
+
+                                /* AUTOREQ is in a DMA register */
+                                musb_writew(hw_ep->regs, MUSB_RXCSR, csr);
+                                csr = musb_readw(hw_ep->regs,
+                                                MUSB_RXCSR);
+
+                                /* unless caller treats short rx transfers as
+                                 * errors, we dare not queue multiple transfers.
+                                 */
+                                dma_ok = dma_controller->channel_program(
+                                                dma_channel, packet_sz,
+                                                !(urb->transfer_flags
+                                                        & URB_SHORT_NOT_OK),
+                                                urb->transfer_dma,
+                                                qh->segsize);
+                                if (!dma_ok) {
+                                        dma_controller->channel_release(
+                                                        dma_channel);
+                                        hw_ep->rx_channel = NULL;
+                                        dma_channel = NULL;
+                                } else
+                                        csr |= MUSB_RXCSR_DMAENAB;
+                        }
+                }
+
+                csr |= MUSB_RXCSR_H_REQPKT;
+                DBG(7, "RXCSR%d := %04x\n", epnum, csr);
+                musb_writew(hw_ep->regs, MUSB_RXCSR, csr);
+                csr = musb_readw(hw_ep->regs, MUSB_RXCSR);
+        }
+}
+
+
+/*
+ * Service the default endpoint (ep0) as host.
+ * Return true until it's time to start the status stage.
+ */
+static bool musb_h_ep0_continue(struct musb *musb, u16 len, struct urb *urb)
+{
+        bool                     more = false;
+        u8                      *fifo_dest = NULL;
+        u16                     fifo_count = 0;
+        struct musb_hw_ep       *hw_ep = musb->control_ep;
+        struct musb_qh          *qh = hw_ep->in_qh;
+        struct usb_ctrlrequest  *request;
+
+        switch (musb->ep0_stage) {
+        case MUSB_EP0_IN:
+                fifo_dest = urb->transfer_buffer + urb->actual_length;
+                fifo_count = min(len, ((u16) (urb->transfer_buffer_length
+                                        - urb->actual_length)));
+                if (fifo_count < len)
+                        urb->status = -EOVERFLOW;
+
+                musb_read_fifo(hw_ep, fifo_count, fifo_dest);
+
+                urb->actual_length += fifo_count;
+                if (len < qh->maxpacket) {
+                        /* always terminate on short read; it's
+                         * rarely reported as an error.
+                         */
+                } else if (urb->actual_length <
+                                urb->transfer_buffer_length)
+                        more = true;
+                break;
+        case MUSB_EP0_START:
+                request = (struct usb_ctrlrequest *) urb->setup_packet;
+
+                if (!request->wLength) {
+                        DBG(4, "start no-DATA\n");
+                        break;
+                } else if (request->bRequestType & USB_DIR_IN) {
+                        DBG(4, "start IN-DATA\n");
+                        musb->ep0_stage = MUSB_EP0_IN;
+                        more = true;
+                        break;
+                } else {
+                        DBG(4, "start OUT-DATA\n");
+                        musb->ep0_stage = MUSB_EP0_OUT;
+                        more = true;
+                }
+                /* FALLTHROUGH */
+        case MUSB_EP0_OUT:
+                fifo_count = min(qh->maxpacket, ((u16)
+                                (urb->transfer_buffer_length
+                                - urb->actual_length)));
+
+                if (fifo_count) {
+                        fifo_dest = (u8 *) (urb->transfer_buffer
+                                        + urb->actual_length);
+                        DBG(3, "Sending %d bytes to %p\n",
+                                        fifo_count, fifo_dest);
+                        musb_write_fifo(hw_ep, fifo_count, fifo_dest);
+
+                        urb->actual_length += fifo_count;
+                        more = true;
+                }
+                break;
+        default:
+                ERR("bogus ep0 stage %d\n", musb->ep0_stage);
+                break;
+        }
+
+        return more;
+}
+
+/*
+ * Handle default endpoint interrupt as host. Only called in IRQ time
+ * from the LinuxIsr() interrupt service routine.
+ *
+ * called with controller irqlocked
+ */
+irqreturn_t musb_h_ep0_irq(struct musb *musb)
+{
+        struct urb              *urb;
+        u16                     csr, len;
+        int                     status = 0;
+        void __iomem            *mbase = musb->mregs;
+        struct musb_hw_ep       *hw_ep = musb->control_ep;
+        void __iomem            *epio = hw_ep->regs;
+        struct musb_qh          *qh = hw_ep->in_qh;
+        bool                    complete = false;
+        irqreturn_t             retval = IRQ_NONE;
+
+        /* ep0 only has one queue, "in" */
+        urb = next_urb(qh);
+
+        musb_ep_select(mbase, 0);
+        csr = musb_readw(epio, MUSB_CSR0);
+        len = (csr & MUSB_CSR0_RXPKTRDY)
+                        ? musb_readb(epio, MUSB_COUNT0)
+                        : 0;
+
+        DBG(4, "<== csr0 %04x, qh %p, count %d, urb %p, stage %d\n",
+                csr, qh, len, urb, musb->ep0_stage);
+
+        /* if we just did status stage, we are done */
+        if (MUSB_EP0_STATUS == musb->ep0_stage) {
+                retval = IRQ_HANDLED;
+                complete = true;
+        }
+
+        /* prepare status */
+        if (csr & MUSB_CSR0_H_RXSTALL) {
+                DBG(6, "STALLING ENDPOINT\n");
+                status = -EPIPE;
+
+        } else if (csr & MUSB_CSR0_H_ERROR) {
+                DBG(2, "no response, csr0 %04x\n", csr);
+                status = -EPROTO;
+
+        } else if (csr & MUSB_CSR0_H_NAKTIMEOUT) {
+                DBG(2, "control NAK timeout\n");
+
+                /* NOTE:  this code path would be a good place to PAUSE a
+                 * control transfer, if another one is queued, so that
+                 * ep0 is more likely to stay busy.
+                 *
+                 * if (qh->ring.next != &musb->control), then
+                 * we have a candidate... NAKing is *NOT* an error
+                 */
+                musb_writew(epio, MUSB_CSR0, 0);
+                retval = IRQ_HANDLED;
+        }
+
+        if (status) {
+                DBG(6, "aborting\n");
+                retval = IRQ_HANDLED;
+                if (urb)
+                        urb->status = status;
+                complete = true;
+
+                /* use the proper sequence to abort the transfer */
+                if (csr & MUSB_CSR0_H_REQPKT) {
+                        csr &= ~MUSB_CSR0_H_REQPKT;
+                        musb_writew(epio, MUSB_CSR0, csr);
+                        csr &= ~MUSB_CSR0_H_NAKTIMEOUT;
+                        musb_writew(epio, MUSB_CSR0, csr);
+                } else {
+                        csr |= MUSB_CSR0_FLUSHFIFO;
+                        musb_writew(epio, MUSB_CSR0, csr);
+                        musb_writew(epio, MUSB_CSR0, csr);
+                        csr &= ~MUSB_CSR0_H_NAKTIMEOUT;
+                        musb_writew(epio, MUSB_CSR0, csr);
+                }
+
+                musb_writeb(epio, MUSB_NAKLIMIT0, 0);
+
+                /* clear it */
+                musb_writew(epio, MUSB_CSR0, 0);
+        }
+
+        if (unlikely(!urb)) {
+                /* stop endpoint since we have no place for its data, this
+                 * SHOULD NEVER HAPPEN! */
+                ERR("no URB for end 0\n");
+
+                musb_writew(epio, MUSB_CSR0, MUSB_CSR0_FLUSHFIFO);
+                musb_writew(epio, MUSB_CSR0, MUSB_CSR0_FLUSHFIFO);
+                musb_writew(epio, MUSB_CSR0, 0);
+
+                goto done;
+        }
+
+        if (!complete) {
+                /* call common logic and prepare response */
+                if (musb_h_ep0_continue(musb, len, urb)) {
+                        /* more packets required */
+                        csr = (MUSB_EP0_IN == musb->ep0_stage)
+                                ?  MUSB_CSR0_H_REQPKT : MUSB_CSR0_TXPKTRDY;
+                } else {
+                        /* data transfer complete; perform status phase */
+                        if (usb_pipeout(urb->pipe)
+                                        || !urb->transfer_buffer_length)
+                                csr = MUSB_CSR0_H_STATUSPKT
+                                        | MUSB_CSR0_H_REQPKT;
+                        else
+                                csr = MUSB_CSR0_H_STATUSPKT
+                                        | MUSB_CSR0_TXPKTRDY;
+
+                        /* flag status stage */
+                        musb->ep0_stage = MUSB_EP0_STATUS;
+
+                        DBG(5, "ep0 STATUS, csr %04x\n", csr);
+
+                }
+                musb_writew(epio, MUSB_CSR0, csr);
+                retval = IRQ_HANDLED;
+        } else
+                musb->ep0_stage = MUSB_EP0_IDLE;
+
+        /* call completion handler if done */
+        if (complete)
+                musb_advance_schedule(musb, urb, hw_ep, 1);
+done:
+        return retval;
+}
+
+
+#ifdef CONFIG_USB_INVENTRA_DMA
+
+/* Host side TX (OUT) using Mentor DMA works as follows:
+        submit_urb ->
+                - if queue was empty, Program Endpoint
+                - ... which starts DMA to fifo in mode 1 or 0
+
+        DMA Isr (transfer complete) -> TxAvail()
+                - Stop DMA (~DmaEnab)   (<--- Alert ... currently happens
+                                        only in musb_cleanup_urb)
+                - TxPktRdy has to be set in mode 0 or for
+                        short packets in mode 1.
+*/
+
+#endif
+
+/* Service a Tx-Available or dma completion irq for the endpoint */
+void musb_host_tx(struct musb *musb, u8 epnum)
+{
+        int                     pipe;
+        bool                    done = false;
+        u16                     tx_csr;
+        size_t                  wLength = 0;
+        u8                      *buf = NULL;
+        struct urb              *urb;
+        struct musb_hw_ep       *hw_ep = musb->endpoints + epnum;
+        void __iomem            *epio = hw_ep->regs;
+        struct musb_qh          *qh = hw_ep->out_qh;
+        u32                     status = 0;
+        void __iomem            *mbase = musb->mregs;
+        struct dma_channel      *dma;
+
+        urb = next_urb(qh);
+
+        musb_ep_select(mbase, epnum);
+        tx_csr = musb_readw(epio, MUSB_TXCSR);
+
+        /* with CPPI, DMA sometimes triggers "extra" irqs */
+        if (!urb) {
+                DBG(4, "extra TX%d ready, csr %04x\n", epnum, tx_csr);
+                goto finish;
+        }
+
+        pipe = urb->pipe;
+        dma = is_dma_capable() ? hw_ep->tx_channel : NULL;
+        DBG(4, "OUT/TX%d end, csr %04x%s\n", epnum, tx_csr,
+                        dma ? ", dma" : "");
+
+        /* check for errors */
+        if (tx_csr & MUSB_TXCSR_H_RXSTALL) {
+                /* dma was disabled, fifo flushed */
+                DBG(3, "TX end %d stall\n", epnum);
+
+                /* stall; record URB status */
+                status = -EPIPE;
+
+        } else if (tx_csr & MUSB_TXCSR_H_ERROR) {
+                /* (NON-ISO) dma was disabled, fifo flushed */
+                DBG(3, "TX 3strikes on ep=%d\n", epnum);
+
+                status = -ETIMEDOUT;
+
+        } else if (tx_csr & MUSB_TXCSR_H_NAKTIMEOUT) {
+                DBG(6, "TX end=%d device not responding\n", epnum);
+
+                /* NOTE:  this code path would be a good place to PAUSE a
+                 * transfer, if there's some other (nonperiodic) tx urb
+                 * that could use this fifo.  (dma complicates it...)
+                 *
+                 * if (bulk && qh->ring.next != &musb->out_bulk), then
+                 * we have a candidate... NAKing is *NOT* an error
+                 */
+                musb_ep_select(mbase, epnum);
+                musb_writew(epio, MUSB_TXCSR,
+                                MUSB_TXCSR_H_WZC_BITS
+                                | MUSB_TXCSR_TXPKTRDY);
+                goto finish;
+        }
+
+        if (status) {
+                if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
+                        dma->status = MUSB_DMA_STATUS_CORE_ABORT;
+                        (void) musb->dma_controller->channel_abort(dma);
+                }
+
+                /* do the proper sequence to abort the transfer in the
+                 * usb core; the dma engine should already be stopped.
+                 */
+                musb_h_tx_flush_fifo(hw_ep);
+                tx_csr &= ~(MUSB_TXCSR_AUTOSET
+                                | MUSB_TXCSR_DMAENAB
+                                | MUSB_TXCSR_H_ERROR
+                                | MUSB_TXCSR_H_RXSTALL
+                                | MUSB_TXCSR_H_NAKTIMEOUT
+                                );
+
+                musb_ep_select(mbase, epnum);
+                musb_writew(epio, MUSB_TXCSR, tx_csr);
+                /* REVISIT may need to clear FLUSHFIFO ... */
+                musb_writew(epio, MUSB_TXCSR, tx_csr);
+                musb_writeb(epio, MUSB_TXINTERVAL, 0);
+
+                done = true;
+        }
+
+        /* second cppi case */
+        if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
+                DBG(4, "extra TX%d ready, csr %04x\n", epnum, tx_csr);
+                goto finish;
+
+        }
+
+        /* REVISIT this looks wrong... */
+        if (!status || dma || usb_pipeisoc(pipe)) {
+                if (dma)
+                        wLength = dma->actual_len;
+                else
+                        wLength = qh->segsize;
+                qh->offset += wLength;
+
+                if (usb_pipeisoc(pipe)) {
+                        struct usb_iso_packet_descriptor        *d;
+
+                        d = urb->iso_frame_desc + qh->iso_idx;
+                        d->actual_length = qh->segsize;
+                        if (++qh->iso_idx >= urb->number_of_packets) {
+                                done = true;
+                        } else {
+                                d++;
+                                buf = urb->transfer_buffer + d->offset;
+                                wLength = d->length;
+                        }
+                } else if (dma) {
+                        done = true;
+                } else {
+                        /* see if we need to send more data, or ZLP */
+                        if (qh->segsize < qh->maxpacket)
+                                done = true;
+                        else if (qh->offset == urb->transfer_buffer_length
+                                        && !(urb->transfer_flags
+                                                & URB_ZERO_PACKET))
+                                done = true;
+                        if (!done) {
+                                buf = urb->transfer_buffer
+                                                + qh->offset;
+                                wLength = urb->transfer_buffer_length
+                                                - qh->offset;
+                        }
+                }
+        }
+
+        /* urb->status != -EINPROGRESS means request has been faulted,
+         * so we must abort this transfer after cleanup
+         */
+        if (urb->status != -EINPROGRESS) {
+                done = true;
+                if (status == 0)
+                        status = urb->status;
+        }
+
+        if (done) {
+                /* set status */
+                urb->status = status;
+                urb->actual_length = qh->offset;
+                musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT);
+
+        } else if (!(tx_csr & MUSB_TXCSR_DMAENAB)) {
+                /* WARN_ON(!buf); */
+
+                /* REVISIT:  some docs say that when hw_ep->tx_double_buffered,
+                 * (and presumably, fifo is not half-full) we should write TWO
+                 * packets before updating TXCSR ... other docs disagree ...
+                 */
+                /* PIO:  start next packet in this URB */
+                wLength = min(qh->maxpacket, (u16) wLength);
+                musb_write_fifo(hw_ep, wLength, buf);
+                qh->segsize = wLength;
+
+                musb_ep_select(mbase, epnum);
+                musb_writew(epio, MUSB_TXCSR,
+                                MUSB_TXCSR_H_WZC_BITS | MUSB_TXCSR_TXPKTRDY);
+        } else
+                DBG(1, "not complete, but dma enabled?\n");
+
+finish:
+        return;
+}
+
+
+#ifdef CONFIG_USB_INVENTRA_DMA
+
+/* Host side RX (IN) using Mentor DMA works as follows:
+        submit_urb ->
+                - if queue was empty, ProgramEndpoint
+                - first IN token is sent out (by setting ReqPkt)
+        LinuxIsr -> RxReady()
+        /\      => first packet is received
+        |       - Set in mode 0 (DmaEnab, ~ReqPkt)
+        |               -> DMA Isr (transfer complete) -> RxReady()
+        |                   - Ack receive (~RxPktRdy), turn off DMA (~DmaEnab)
+        |                   - if urb not complete, send next IN token (ReqPkt)
+        |                          |            else complete urb.
+        |                          |
+        ---------------------------
+ *
+ * Nuances of mode 1:
+ *      For short packets, no ack (+RxPktRdy) is sent automatically
+ *      (even if AutoClear is ON)
+ *      For full packets, ack (~RxPktRdy) and next IN token (+ReqPkt) is sent
+ *      automatically => major problem, as collecting the next packet becomes
+ *      difficult. Hence mode 1 is not used.
+ *
+ * REVISIT
+ *      All we care about at this driver level is that
+ *       (a) all URBs terminate with REQPKT cleared and fifo(s) empty;
+ *       (b) termination conditions are: short RX, or buffer full;
+ *       (c) fault modes include
+ *           - iff URB_SHORT_NOT_OK, short RX status is -EREMOTEIO.
+ *             (and that endpoint's dma queue stops immediately)
+ *           - overflow (full, PLUS more bytes in the terminal packet)
+ *
+ *      So for example, usb-storage sets URB_SHORT_NOT_OK, and would
+ *      thus be a great candidate for using mode 1 ... for all but the
+ *      last packet of one URB's transfer.
+ */
+
+#endif
+
+/*
+ * Service an RX interrupt for the given IN endpoint; docs cover bulk, iso,
+ * and high-bandwidth IN transfer cases.
+ */
+void musb_host_rx(struct musb *musb, u8 epnum)
+{
+        struct urb              *urb;
+        struct musb_hw_ep       *hw_ep = musb->endpoints + epnum;
+        void __iomem            *epio = hw_ep->regs;
+        struct musb_qh          *qh = hw_ep->in_qh;
+        size_t                  xfer_len;
+        void __iomem            *mbase = musb->mregs;
+        int                     pipe;
+        u16                     rx_csr, val;
+        bool                    iso_err = false;
+        bool                    done = false;
+        u32                     status;
+        struct dma_channel      *dma;
+
+        musb_ep_select(mbase, epnum);
+
+        urb = next_urb(qh);
+        dma = is_dma_capable() ? hw_ep->rx_channel : NULL;
+        status = 0;
+        xfer_len = 0;
+
+        rx_csr = musb_readw(epio, MUSB_RXCSR);
+        val = rx_csr;
+
+        if (unlikely(!urb)) {
+                /* REVISIT -- THIS SHOULD NEVER HAPPEN ... but, at least
+                 * usbtest #11 (unlinks) triggers it regularly, sometimes
+                 * with fifo full.  (Only with DMA??)
+                 */
+                DBG(3, "BOGUS RX%d ready, csr %04x, count %d\n", epnum, val,
+                        musb_readw(epio, MUSB_RXCOUNT));
+                musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG);
+                return;
+        }
+
+        pipe = urb->pipe;
+
+        DBG(5, "<== hw %d rxcsr %04x, urb actual %d (+dma %zu)\n",
+                epnum, rx_csr, urb->actual_length,
+                dma ? dma->actual_len : 0);
+
+        /* check for errors, concurrent stall & unlink is not really
+         * handled yet! */
+        if (rx_csr & MUSB_RXCSR_H_RXSTALL) {
+                DBG(3, "RX end %d STALL\n", epnum);
+
+                /* stall; record URB status */
+                status = -EPIPE;
+
+        } else if (rx_csr & MUSB_RXCSR_H_ERROR) {
+                DBG(3, "end %d RX proto error\n", epnum);
+
+                status = -EPROTO;
+                musb_writeb(epio, MUSB_RXINTERVAL, 0);
+
+        } else if (rx_csr & MUSB_RXCSR_DATAERROR) {
+
+                if (USB_ENDPOINT_XFER_ISOC != qh->type) {
+                        /* NOTE this code path would be a good place to PAUSE a
+                         * transfer, if there's some other (nonperiodic) rx urb
+                         * that could use this fifo.  (dma complicates it...)
+                         *
+                         * if (bulk && qh->ring.next != &musb->in_bulk), then
+                         * we have a candidate... NAKing is *NOT* an error
+                         */
+                        DBG(6, "RX end %d NAK timeout\n", epnum);
+                        musb_ep_select(mbase, epnum);
+                        musb_writew(epio, MUSB_RXCSR,
+                                        MUSB_RXCSR_H_WZC_BITS
+                                        | MUSB_RXCSR_H_REQPKT);
+
+                        goto finish;
+                } else {
+                        DBG(4, "RX end %d ISO data error\n", epnum);
+                        /* packet error reported later */
+                        iso_err = true;
+                }
+        }
+
+        /* faults abort the transfer */
+        if (status) {
+                /* clean up dma and collect transfer count */
+                if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
+                        dma->status = MUSB_DMA_STATUS_CORE_ABORT;
+                        (void) musb->dma_controller->channel_abort(dma);
+                        xfer_len = dma->actual_len;
+                }
+                musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG);
+                musb_writeb(epio, MUSB_RXINTERVAL, 0);
+                done = true;
+                goto finish;
+        }
+
+        if (unlikely(dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY)) {
+                /* SHOULD NEVER HAPPEN ... but at least DaVinci has done it */
+                ERR("RX%d dma busy, csr %04x\n", epnum, rx_csr);
+                goto finish;
+        }
+
+        /* thorough shutdown for now ... given more precise fault handling
+         * and better queueing support, we might keep a DMA pipeline going
+         * while processing this irq for earlier completions.
+         */
+
+        /* FIXME this is _way_ too much in-line logic for Mentor DMA */
+
+#ifndef CONFIG_USB_INVENTRA_DMA
+        if (rx_csr & MUSB_RXCSR_H_REQPKT)  {
+                /* REVISIT this happened for a while on some short reads...
+                 * the cleanup still needs investigation... looks bad...
+                 * and also duplicates dma cleanup code above ... plus,
+                 * shouldn't this be the "half full" double buffer case?
+                 */
+                if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
+                        dma->status = MUSB_DMA_STATUS_CORE_ABORT;
+                        (void) musb->dma_controller->channel_abort(dma);
+                        xfer_len = dma->actual_len;
+                        done = true;
+                }
+
+                DBG(2, "RXCSR%d %04x, reqpkt, len %zu%s\n", epnum, rx_csr,
+                                xfer_len, dma ? ", dma" : "");
+                rx_csr &= ~MUSB_RXCSR_H_REQPKT;
+
+                musb_ep_select(mbase, epnum);
+                musb_writew(epio, MUSB_RXCSR,
+                                MUSB_RXCSR_H_WZC_BITS | rx_csr);
+        }
+#endif
+        if (dma && (rx_csr & MUSB_RXCSR_DMAENAB)) {
+                xfer_len = dma->actual_len;
+
+                val &= ~(MUSB_RXCSR_DMAENAB
+                        | MUSB_RXCSR_H_AUTOREQ
+                        | MUSB_RXCSR_AUTOCLEAR
+                        | MUSB_RXCSR_RXPKTRDY);
+                musb_writew(hw_ep->regs, MUSB_RXCSR, val);
+
+#ifdef CONFIG_USB_INVENTRA_DMA
+                /* done if urb buffer is full or short packet is recd */
+                done = (urb->actual_length + xfer_len >=
+                                urb->transfer_buffer_length
+                        || dma->actual_len < qh->maxpacket);
+
+                /* send IN token for next packet, without AUTOREQ */
+                if (!done) {
+                        val |= MUSB_RXCSR_H_REQPKT;
+                        musb_writew(epio, MUSB_RXCSR,
+                                MUSB_RXCSR_H_WZC_BITS | val);
+                }
+
+                DBG(4, "ep %d dma %s, rxcsr %04x, rxcount %d\n", epnum,
+                        done ? "off" : "reset",
+                        musb_readw(epio, MUSB_RXCSR),
+                        musb_readw(epio, MUSB_RXCOUNT));
+#else
+                done = true;
+#endif
+        } else if (urb->status == -EINPROGRESS) {
+                /* if no errors, be sure a packet is ready for unloading */
+                if (unlikely(!(rx_csr & MUSB_RXCSR_RXPKTRDY))) {
+                        status = -EPROTO;
+                        ERR("Rx interrupt with no errors or packet!\n");
+
+                        /* FIXME this is another "SHOULD NEVER HAPPEN" */
+
+/* SCRUB (RX) */
+                        /* do the proper sequence to abort the transfer */
+                        musb_ep_select(mbase, epnum);
+                        val &= ~MUSB_RXCSR_H_REQPKT;
+                        musb_writew(epio, MUSB_RXCSR, val);
+                        goto finish;
+                }
+
+                /* we are expecting IN packets */
+#ifdef CONFIG_USB_INVENTRA_DMA
+                if (dma) {
+                        struct dma_controller   *c;
+                        u16                     rx_count;
+                        int                     ret;
+
+                        rx_count = musb_readw(epio, MUSB_RXCOUNT);
+
+                        DBG(2, "RX%d count %d, buffer 0x%x len %d/%d\n",
+                                        epnum, rx_count,
+                                        urb->transfer_dma
+                                                + urb->actual_length,
+                                        qh->offset,
+                                        urb->transfer_buffer_length);
+
+                        c = musb->dma_controller;
+
+                        dma->desired_mode = 0;
+#ifdef USE_MODE1
+                        /* because of the issue below, mode 1 will
+                         * only rarely behave with correct semantics.
+                         */
+                        if ((urb->transfer_flags &
+                                                URB_SHORT_NOT_OK)
+                                && (urb->transfer_buffer_length -
+                                                urb->actual_length)
+                                        > qh->maxpacket)
+                                dma->desired_mode = 1;
+#endif
+
+/* Disadvantage of using mode 1:
+ *      It's basically usable only for mass storage class; essentially all
+ *      other protocols also terminate transfers on short packets.
+ *
+ * Details:
+ *      An extra IN token is sent at the end of the transfer (due to AUTOREQ)
+ *      If you try to use mode 1 for (transfer_buffer_length - 512), and try
+ *      to use the extra IN token to grab the last packet using mode 0, then
+ *      the problem is that you cannot be sure when the device will send the
+ *      last packet and RxPktRdy set. Sometimes the packet is recd too soon
+ *      such that it gets lost when RxCSR is re-set at the end of the mode 1
+ *      transfer, while sometimes it is recd just a little late so that if you
+ *      try to configure for mode 0 soon after the mode 1 transfer is
+ *      completed, you will find rxcount 0. Okay, so you might think why not
+ *      wait for an interrupt when the pkt is recd. Well, you won't get any!
+ */
+
+                        val = musb_readw(epio, MUSB_RXCSR);
+                        val &= ~MUSB_RXCSR_H_REQPKT;
+
+                        if (dma->desired_mode == 0)
+                                val &= ~MUSB_RXCSR_H_AUTOREQ;
+                        else
+                                val |= MUSB_RXCSR_H_AUTOREQ;
+                        val |= MUSB_RXCSR_AUTOCLEAR | MUSB_RXCSR_DMAENAB;
+
+                        musb_writew(epio, MUSB_RXCSR,
+                                MUSB_RXCSR_H_WZC_BITS | val);
+
+                        /* REVISIT if when actual_length != 0,
+                         * transfer_buffer_length needs to be
+                         * adjusted first...
+                         */
+                        ret = c->channel_program(
+                                dma, qh->maxpacket,
+                                dma->desired_mode,
+                                urb->transfer_dma
+                                        + urb->actual_length,
+                                (dma->desired_mode == 0)
+                                        ? rx_count
+                                        : urb->transfer_buffer_length);
+
+                        if (!ret) {
+                                c->channel_release(dma);
+                                hw_ep->rx_channel = NULL;
+                                dma = NULL;
+                                /* REVISIT reset CSR */
+                        }
+                }
+#endif  /* Mentor DMA */
+
+                if (!dma) {
+                        done = musb_host_packet_rx(musb, urb,
+                                        epnum, iso_err);
+                        DBG(6, "read %spacket\n", done ? "last " : "");
+                }
+        }
+
+        if (dma && usb_pipeisoc(pipe)) {
+                struct usb_iso_packet_descriptor        *d;
+                int                                     iso_stat = status;
+
+                d = urb->iso_frame_desc + qh->iso_idx;
+                d->actual_length += xfer_len;
+                if (iso_err) {
+                        iso_stat = -EILSEQ;
+                        urb->error_count++;
+                }
+                d->status = iso_stat;
+        }
+
+finish:
+        urb->actual_length += xfer_len;
+        qh->offset += xfer_len;
+        if (done) {
+                if (urb->status == -EINPROGRESS)
+                        urb->status = status;
+                musb_advance_schedule(musb, urb, hw_ep, USB_DIR_IN);
+        }
+}
+
+/* schedule nodes correspond to peripheral endpoints, like an OHCI QH.
+ * the software schedule associates multiple such nodes with a given
+ * host side hardware endpoint + direction; scheduling may activate
+ * that hardware endpoint.
+ */
+static int musb_schedule(
+        struct musb             *musb,
+        struct musb_qh          *qh,
+        int                     is_in)
+{
+        int                     idle;
+        int                     best_diff;
+        int                     best_end, epnum;
+        struct musb_hw_ep       *hw_ep = NULL;
+        struct list_head        *head = NULL;
+
+        /* use fixed hardware for control and bulk */
+        switch (qh->type) {
+        case USB_ENDPOINT_XFER_CONTROL:
+                head = &musb->control;
+                hw_ep = musb->control_ep;
+                break;
+        case USB_ENDPOINT_XFER_BULK:
+                hw_ep = musb->bulk_ep;
+                if (is_in)
+                        head = &musb->in_bulk;
+                else
+                        head = &musb->out_bulk;
+                break;
+        }
+        if (head) {
+                idle = list_empty(head);
+                list_add_tail(&qh->ring, head);
+                goto success;
+        }
+
+        /* else, periodic transfers get muxed to other endpoints */
+
+        /* FIXME this doesn't consider direction, so it can only
+         * work for one half of the endpoint hardware, and assumes
+         * the previous cases handled all non-shared endpoints...
+         */
+
+        /* we know this qh hasn't been scheduled, so all we need to do
+         * is choose which hardware endpoint to put it on ...
+         *
+         * REVISIT what we really want here is a regular schedule tree
+         * like e.g. OHCI uses, but for now musb->periodic is just an
+         * array of the _single_ logical endpoint associated with a
+         * given physical one (identity mapping logical->physical).
+         *
+         * that simplistic approach makes TT scheduling a lot simpler;
+         * there is none, and thus none of its complexity...
+         */
+        best_diff = 4096;
+        best_end = -1;
+
+        for (epnum = 1; epnum < musb->nr_endpoints; epnum++) {
+                int     diff;
+
+                if (musb->periodic[epnum])
+                        continue;
+                hw_ep = &musb->endpoints[epnum];
+                if (hw_ep == musb->bulk_ep)
+                        continue;
+
+                if (is_in)
+                        diff = hw_ep->max_packet_sz_rx - qh->maxpacket;
+                else
+                        diff = hw_ep->max_packet_sz_tx - qh->maxpacket;
+
+                if (diff > 0 && best_diff > diff) {
+                        best_diff = diff;
+                        best_end = epnum;
+                }
+        }
+        if (best_end < 0)
+                return -ENOSPC;
+
+        idle = 1;
+        hw_ep = musb->endpoints + best_end;
+        musb->periodic[best_end] = qh;
+        DBG(4, "qh %p periodic slot %d\n", qh, best_end);
+success:
+        qh->hw_ep = hw_ep;
+        qh->hep->hcpriv = qh;
+        if (idle)
+                musb_start_urb(musb, is_in, qh);
+        return 0;
+}
+
+static int musb_urb_enqueue(
+        struct usb_hcd                  *hcd,
+        struct urb                      *urb,
+        gfp_t                           mem_flags)
+{
+        unsigned long                   flags;
+        struct musb                     *musb = hcd_to_musb(hcd);
+        struct usb_host_endpoint        *hep = urb->ep;
+        struct musb_qh                  *qh = hep->hcpriv;
+        struct usb_endpoint_descriptor  *epd = &hep->desc;
+        int                             ret;
+        unsigned                        type_reg;
+        unsigned                        interval;
+
+        /* host role must be active */
+        if (!is_host_active(musb) || !musb->is_active)
+                return -ENODEV;
+
+        spin_lock_irqsave(&musb->lock, flags);
+        ret = usb_hcd_link_urb_to_ep(hcd, urb);
+        spin_unlock_irqrestore(&musb->lock, flags);
+        if (ret)
+                return ret;
+
+        /* DMA mapping was already done, if needed, and this urb is on
+         * hep->urb_list ... so there's little to do unless hep wasn't
+         * yet scheduled onto a live qh.
+         *
+         * REVISIT best to keep hep->hcpriv valid until the endpoint gets
+         * disabled, testing for empty qh->ring and avoiding qh setup costs
+         * except for the first urb queued after a config change.
+         */
+        if (qh) {
+                urb->hcpriv = qh;
+                return 0;
+        }
+
+        /* Allocate and initialize qh, minimizing the work done each time
+         * hw_ep gets reprogrammed, or with irqs blocked.  Then schedule it.
+         *
+         * REVISIT consider a dedicated qh kmem_cache, so it's harder
+         * for bugs in other kernel code to break this driver...
+         */
+        qh = kzalloc(sizeof *qh, mem_flags);
+        if (!qh) {
+                usb_hcd_unlink_urb_from_ep(hcd, urb);
+                return -ENOMEM;
+        }
+
+        qh->hep = hep;
+        qh->dev = urb->dev;
+        INIT_LIST_HEAD(&qh->ring);
+        qh->is_ready = 1;
+
+        qh->maxpacket = le16_to_cpu(epd->wMaxPacketSize);
+
+        /* no high bandwidth support yet */
+        if (qh->maxpacket & ~0x7ff) {
+                ret = -EMSGSIZE;
+                goto done;
+        }
+
+        qh->epnum = epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
+        qh->type = epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
+
+        /* NOTE: urb->dev->devnum is wrong during SET_ADDRESS */
+        qh->addr_reg = (u8) usb_pipedevice(urb->pipe);
+
+        /* precompute rxtype/txtype/type0 register */
+        type_reg = (qh->type << 4) | qh->epnum;
+        switch (urb->dev->speed) {
+        case USB_SPEED_LOW:
+                type_reg |= 0xc0;
+                break;
+        case USB_SPEED_FULL:
+                type_reg |= 0x80;
+                break;
+        default:
+                type_reg |= 0x40;
+        }
+        qh->type_reg = type_reg;
+
+        /* precompute rxinterval/txinterval register */
+        interval = min((u8)16, epd->bInterval); /* log encoding */
+        switch (qh->type) {
+        case USB_ENDPOINT_XFER_INT:
+                /* fullspeed uses linear encoding */
+                if (USB_SPEED_FULL == urb->dev->speed) {
+                        interval = epd->bInterval;
+                        if (!interval)
+                                interval = 1;
+                }
+                /* FALLTHROUGH */
+        case USB_ENDPOINT_XFER_ISOC:
+                /* iso always uses log encoding */
+                break;
+        default:
+                /* REVISIT we actually want to use NAK limits, hinting to the
+                 * transfer scheduling logic to try some other qh, e.g. try
+                 * for 2 msec first:
+                 *
+                 * interval = (USB_SPEED_HIGH == urb->dev->speed) ? 16 : 2;
+                 *
+                 * The downside of disabling this is that transfer scheduling
+                 * gets VERY unfair for nonperiodic transfers; a misbehaving
+                 * peripheral could make that hurt.  Or for reads, one that's
+                 * perfectly normal:  network and other drivers keep reads
+                 * posted at all times, having one pending for a week should
+                 * be perfectly safe.
+                 *
+                 * The upside of disabling it is avoidng transfer scheduling
+                 * code to put this aside for while.
+                 */
+                interval = 0;
+        }
+        qh->intv_reg = interval;
+
+        /* precompute addressing for external hub/tt ports */
+        if (musb->is_multipoint) {
+                struct usb_device       *parent = urb->dev->parent;
+
+                if (parent != hcd->self.root_hub) {
+                        qh->h_addr_reg = (u8) parent->devnum;
+
+                        /* set up tt info if needed */
+                        if (urb->dev->tt) {
+                                qh->h_port_reg = (u8) urb->dev->ttport;
+                                qh->h_addr_reg |= 0x80;
+                        }
+                }
+        }
+
+        /* invariant: hep->hcpriv is null OR the qh that's already scheduled.
+         * until we get real dma queues (with an entry for each urb/buffer),
+         * we only have work to do in the former case.
+         */
+        spin_lock_irqsave(&musb->lock, flags);
+        if (hep->hcpriv) {
+                /* some concurrent activity submitted another urb to hep...
+                 * odd, rare, error prone, but legal.
+                 */
+                kfree(qh);
+                ret = 0;
+        } else
+                ret = musb_schedule(musb, qh,
+                                epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK);
+
+        if (ret == 0) {
+                urb->hcpriv = qh;
+                /* FIXME set urb->start_frame for iso/intr, it's tested in
+                 * musb_start_urb(), but otherwise only konicawc cares ...
+                 */
+        }
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+done:
+        if (ret != 0) {
+                usb_hcd_unlink_urb_from_ep(hcd, urb);
+                kfree(qh);
+        }
+        return ret;
+}
+
+
+/*
+ * abort a transfer that's at the head of a hardware queue.
+ * called with controller locked, irqs blocked
+ * that hardware queue advances to the next transfer, unless prevented
+ */
+static int musb_cleanup_urb(struct urb *urb, struct musb_qh *qh, int is_in)
+{
+        struct musb_hw_ep       *ep = qh->hw_ep;
+        void __iomem            *epio = ep->regs;
+        unsigned                hw_end = ep->epnum;
+        void __iomem            *regs = ep->musb->mregs;
+        u16                     csr;
+        int                     status = 0;
+
+        musb_ep_select(regs, hw_end);
+
+        if (is_dma_capable()) {
+                struct dma_channel      *dma;
+
+                dma = is_in ? ep->rx_channel : ep->tx_channel;
+                if (dma) {
+                        status = ep->musb->dma_controller->channel_abort(dma);
+                        DBG(status ? 1 : 3,
+                                "abort %cX%d DMA for urb %p --> %d\n",
+                                is_in ? 'R' : 'T', ep->epnum,
+                                urb, status);
+                        urb->actual_length += dma->actual_len;
+                }
+        }
+
+        /* turn off DMA requests, discard state, stop polling ... */
+        if (is_in) {
+                /* giveback saves bulk toggle */
+                csr = musb_h_flush_rxfifo(ep, 0);
+
+                /* REVISIT we still get an irq; should likely clear the
+                 * endpoint's irq status here to avoid bogus irqs.
+                 * clearing that status is platform-specific...
+                 */
+        } else {
+                musb_h_tx_flush_fifo(ep);
+                csr = musb_readw(epio, MUSB_TXCSR);
+                csr &= ~(MUSB_TXCSR_AUTOSET
+                        | MUSB_TXCSR_DMAENAB
+                        | MUSB_TXCSR_H_RXSTALL
+                        | MUSB_TXCSR_H_NAKTIMEOUT
+                        | MUSB_TXCSR_H_ERROR
+                        | MUSB_TXCSR_TXPKTRDY);
+                musb_writew(epio, MUSB_TXCSR, csr);
+                /* REVISIT may need to clear FLUSHFIFO ... */
+                musb_writew(epio, MUSB_TXCSR, csr);
+                /* flush cpu writebuffer */
+                csr = musb_readw(epio, MUSB_TXCSR);
+        }
+        if (status == 0)
+                musb_advance_schedule(ep->musb, urb, ep, is_in);
+        return status;
+}
+
+static int musb_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
+{
+        struct musb             *musb = hcd_to_musb(hcd);
+        struct musb_qh          *qh;
+        struct list_head        *sched;
+        unsigned long           flags;
+        int                     ret;
+
+        DBG(4, "urb=%p, dev%d ep%d%s\n", urb,
+                        usb_pipedevice(urb->pipe),
+                        usb_pipeendpoint(urb->pipe),
+                        usb_pipein(urb->pipe) ? "in" : "out");
+
+        spin_lock_irqsave(&musb->lock, flags);
+        ret = usb_hcd_check_unlink_urb(hcd, urb, status);
+        if (ret)
+                goto done;
+
+        qh = urb->hcpriv;
+        if (!qh)
+                goto done;
+
+        /* Any URB not actively programmed into endpoint hardware can be
+         * immediately given back.  Such an URB must be at the head of its
+         * endpoint queue, unless someday we get real DMA queues.  And even
+         * then, it might not be known to the hardware...
+         *
+         * Otherwise abort current transfer, pending dma, etc.; urb->status
+         * has already been updated.  This is a synchronous abort; it'd be
+         * OK to hold off until after some IRQ, though.
+         */
+        if (!qh->is_ready || urb->urb_list.prev != &qh->hep->urb_list)
+                ret = -EINPROGRESS;
+        else {
+                switch (qh->type) {
+                case USB_ENDPOINT_XFER_CONTROL:
+                        sched = &musb->control;
+                        break;
+                case USB_ENDPOINT_XFER_BULK:
+                        if (usb_pipein(urb->pipe))
+                                sched = &musb->in_bulk;
+                        else
+                                sched = &musb->out_bulk;
+                        break;
+                default:
+                        /* REVISIT when we get a schedule tree, periodic
+                         * transfers won't always be at the head of a
+                         * singleton queue...
+                         */
+                        sched = NULL;
+                        break;
+                }
+        }
+
+        /* NOTE:  qh is invalid unless !list_empty(&hep->urb_list) */
+        if (ret < 0 || (sched && qh != first_qh(sched))) {
+                int     ready = qh->is_ready;
+
+                ret = 0;
+                qh->is_ready = 0;
+                __musb_giveback(musb, urb, 0);
+                qh->is_ready = ready;
+        } else
+                ret = musb_cleanup_urb(urb, qh, urb->pipe & USB_DIR_IN);
+done:
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return ret;
+}
+
+/* disable an endpoint */
+static void
+musb_h_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
+{
+        u8                      epnum = hep->desc.bEndpointAddress;
+        unsigned long           flags;
+        struct musb             *musb = hcd_to_musb(hcd);
+        u8                      is_in = epnum & USB_DIR_IN;
+        struct musb_qh          *qh = hep->hcpriv;
+        struct urb              *urb, *tmp;
+        struct list_head        *sched;
+
+        if (!qh)
+                return;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        switch (qh->type) {
+        case USB_ENDPOINT_XFER_CONTROL:
+                sched = &musb->control;
+                break;
+        case USB_ENDPOINT_XFER_BULK:
+                if (is_in)
+                        sched = &musb->in_bulk;
+                else
+                        sched = &musb->out_bulk;
+                break;
+        default:
+                /* REVISIT when we get a schedule tree, periodic transfers
+                 * won't always be at the head of a singleton queue...
+                 */
+                sched = NULL;
+                break;
+        }
+
+        /* NOTE:  qh is invalid unless !list_empty(&hep->urb_list) */
+
+        /* kick first urb off the hardware, if needed */
+        qh->is_ready = 0;
+        if (!sched || qh == first_qh(sched)) {
+                urb = next_urb(qh);
+
+                /* make software (then hardware) stop ASAP */
+                if (!urb->unlinked)
+                        urb->status = -ESHUTDOWN;
+
+                /* cleanup */
+                musb_cleanup_urb(urb, qh, urb->pipe & USB_DIR_IN);
+        } else
+                urb = NULL;
+
+        /* then just nuke all the others */
+        list_for_each_entry_safe_from(urb, tmp, &hep->urb_list, urb_list)
+                musb_giveback(qh, urb, -ESHUTDOWN);
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+static int musb_h_get_frame_number(struct usb_hcd *hcd)
+{
+        struct musb     *musb = hcd_to_musb(hcd);
+
+        return musb_readw(musb->mregs, MUSB_FRAME);
+}
+
+static int musb_h_start(struct usb_hcd *hcd)
+{
+        struct musb     *musb = hcd_to_musb(hcd);
+
+        /* NOTE: musb_start() is called when the hub driver turns
+         * on port power, or when (OTG) peripheral starts.
+         */
+        hcd->state = HC_STATE_RUNNING;
+        musb->port1_status = 0;
+        return 0;
+}
+
+static void musb_h_stop(struct usb_hcd *hcd)
+{
+        musb_stop(hcd_to_musb(hcd));
+        hcd->state = HC_STATE_HALT;
+}
+
+static int musb_bus_suspend(struct usb_hcd *hcd)
+{
+        struct musb     *musb = hcd_to_musb(hcd);
+
+        if (musb->xceiv.state == OTG_STATE_A_SUSPEND)
+                return 0;
+
+        if (is_host_active(musb) && musb->is_active) {
+                WARNING("trying to suspend as %s is_active=%i\n",
+                        otg_state_string(musb), musb->is_active);
+                return -EBUSY;
+        } else
+                return 0;
+}
+
+static int musb_bus_resume(struct usb_hcd *hcd)
+{
+        /* resuming child port does the work */
+        return 0;
+}
+
+const struct hc_driver musb_hc_driver = {
+        .description            = "musb-hcd",
+        .product_desc           = "MUSB HDRC host driver",
+        .hcd_priv_size          = sizeof(struct musb),
+        .flags                  = HCD_USB2 | HCD_MEMORY,
+
+        /* not using irq handler or reset hooks from usbcore, since
+         * those must be shared with peripheral code for OTG configs
+         */
+
+        .start                  = musb_h_start,
+        .stop                   = musb_h_stop,
+
+        .get_frame_number       = musb_h_get_frame_number,
+
+        .urb_enqueue            = musb_urb_enqueue,
+        .urb_dequeue            = musb_urb_dequeue,
+        .endpoint_disable       = musb_h_disable,
+
+        .hub_status_data        = musb_hub_status_data,
+        .hub_control            = musb_hub_control,
+        .bus_suspend            = musb_bus_suspend,
+        .bus_resume             = musb_bus_resume,
+        /* .start_port_reset    = NULL, */
+        /* .hub_irq_enable      = NULL, */
+};
diff --git a/drivers/usb/musb/musb_host.h b/drivers/usb/musb/musb_host.h
new file mode 100644
index 000000000000..77bcdb9d5b32
--- /dev/null
+++ b/drivers/usb/musb/musb_host.h
@@ -0,0 +1,110 @@
+/*
+ * MUSB OTG driver host defines
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MUSB_HOST_H
+#define _MUSB_HOST_H
+
+static inline struct usb_hcd *musb_to_hcd(struct musb *musb)
+{
+        return container_of((void *) musb, struct usb_hcd, hcd_priv);
+}
+
+static inline struct musb *hcd_to_musb(struct usb_hcd *hcd)
+{
+        return (struct musb *) (hcd->hcd_priv);
+}
+
+/* stored in "usb_host_endpoint.hcpriv" for scheduled endpoints */
+struct musb_qh {
+        struct usb_host_endpoint *hep;          /* usbcore info */
+        struct usb_device       *dev;
+        struct musb_hw_ep       *hw_ep;         /* current binding */
+
+        struct list_head        ring;           /* of musb_qh */
+        /* struct musb_qh               *next; */       /* for periodic tree */
+
+        unsigned                offset;         /* in urb->transfer_buffer */
+        unsigned                segsize;        /* current xfer fragment */
+
+        u8                      type_reg;       /* {rx,tx} type register */
+        u8                      intv_reg;       /* {rx,tx} interval register */
+        u8                      addr_reg;       /* device address register */
+        u8                      h_addr_reg;     /* hub address register */
+        u8                      h_port_reg;     /* hub port register */
+
+        u8                      is_ready;       /* safe to modify hw_ep */
+        u8                      type;           /* XFERTYPE_* */
+        u8                      epnum;
+        u16                     maxpacket;
+        u16                     frame;          /* for periodic schedule */
+        unsigned                iso_idx;        /* in urb->iso_frame_desc[] */
+};
+
+/* map from control or bulk queue head to the first qh on that ring */
+static inline struct musb_qh *first_qh(struct list_head *q)
+{
+        if (list_empty(q))
+                return NULL;
+        return list_entry(q->next, struct musb_qh, ring);
+}
+
+
+extern void musb_root_disconnect(struct musb *musb);
+
+struct usb_hcd;
+
+extern int musb_hub_status_data(struct usb_hcd *hcd, char *buf);
+extern int musb_hub_control(struct usb_hcd *hcd,
+                        u16 typeReq, u16 wValue, u16 wIndex,
+                        char *buf, u16 wLength);
+
+extern const struct hc_driver musb_hc_driver;
+
+static inline struct urb *next_urb(struct musb_qh *qh)
+{
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        struct list_head        *queue;
+
+        if (!qh)
+                return NULL;
+        queue = &qh->hep->urb_list;
+        if (list_empty(queue))
+                return NULL;
+        return list_entry(queue->next, struct urb, urb_list);
+#else
+        return NULL;
+#endif
+}
+
+#endif                          /* _MUSB_HOST_H */
diff --git a/drivers/usb/musb/musb_io.h b/drivers/usb/musb/musb_io.h
new file mode 100644
index 000000000000..6bbedae83af8
--- /dev/null
+++ b/drivers/usb/musb/musb_io.h
@@ -0,0 +1,115 @@
+/*
+ * MUSB OTG driver register I/O
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef __MUSB_LINUX_PLATFORM_ARCH_H__
+#define __MUSB_LINUX_PLATFORM_ARCH_H__
+
+#include <linux/io.h>
+
+#ifndef CONFIG_ARM
+static inline void readsl(const void __iomem *addr, void *buf, int len)
+        { insl((unsigned long)addr, buf, len); }
+static inline void readsw(const void __iomem *addr, void *buf, int len)
+        { insw((unsigned long)addr, buf, len); }
+static inline void readsb(const void __iomem *addr, void *buf, int len)
+        { insb((unsigned long)addr, buf, len); }
+
+static inline void writesl(const void __iomem *addr, const void *buf, int len)
+        { outsl((unsigned long)addr, buf, len); }
+static inline void writesw(const void __iomem *addr, const void *buf, int len)
+        { outsw((unsigned long)addr, buf, len); }
+static inline void writesb(const void __iomem *addr, const void *buf, int len)
+        { outsb((unsigned long)addr, buf, len); }
+
+#endif
+
+/* NOTE:  these offsets are all in bytes */
+
+static inline u16 musb_readw(const void __iomem *addr, unsigned offset)
+        { return __raw_readw(addr + offset); }
+
+static inline u32 musb_readl(const void __iomem *addr, unsigned offset)
+        { return __raw_readl(addr + offset); }
+
+
+static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data)
+        { __raw_writew(data, addr + offset); }
+
+static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data)
+        { __raw_writel(data, addr + offset); }
+
+
+#ifdef CONFIG_USB_TUSB6010
+
+/*
+ * TUSB6010 doesn't allow 8-bit access; 16-bit access is the minimum.
+ */
+static inline u8 musb_readb(const void __iomem *addr, unsigned offset)
+{
+        u16 tmp;
+        u8 val;
+
+        tmp = __raw_readw(addr + (offset & ~1));
+        if (offset & 1)
+                val = (tmp >> 8);
+        else
+                val = tmp & 0xff;
+
+        return val;
+}
+
+static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data)
+{
+        u16 tmp;
+
+        tmp = __raw_readw(addr + (offset & ~1));
+        if (offset & 1)
+                tmp = (data << 8) | (tmp & 0xff);
+        else
+                tmp = (tmp & 0xff00) | data;
+
+        __raw_writew(tmp, addr + (offset & ~1));
+}
+
+#else
+
+static inline u8 musb_readb(const void __iomem *addr, unsigned offset)
+        { return __raw_readb(addr + offset); }
+
+static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data)
+        { __raw_writeb(data, addr + offset); }
+
+#endif  /* CONFIG_USB_TUSB6010 */
+
+#endif
diff --git a/drivers/usb/musb/musb_procfs.c b/drivers/usb/musb/musb_procfs.c
new file mode 100644
index 000000000000..55e6b78bdccc
--- /dev/null
+++ b/drivers/usb/musb/musb_procfs.c
@@ -0,0 +1,830 @@
+/*
+ * MUSB OTG driver debug support
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/uaccess.h>      /* FIXME remove procfs writes */
+#include <asm/arch/hardware.h>
+
+#include "musb_core.h"
+
+#include "davinci.h"
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+
+static int dump_qh(struct musb_qh *qh, char *buf, unsigned max)
+{
+        int                             count;
+        int                             tmp;
+        struct usb_host_endpoint        *hep = qh->hep;
+        struct urb                      *urb;
+
+        count = snprintf(buf, max, "    qh %p dev%d ep%d%s max%d\n",
+                        qh, qh->dev->devnum, qh->epnum,
+                        ({ char *s; switch (qh->type) {
+                        case USB_ENDPOINT_XFER_BULK:
+                                s = "-bulk"; break;
+                        case USB_ENDPOINT_XFER_INT:
+                                s = "-int"; break;
+                        case USB_ENDPOINT_XFER_CONTROL:
+                                s = ""; break;
+                        default:
+                                s = "iso"; break;
+                        }; s; }),
+                        qh->maxpacket);
+        if (count <= 0)
+                return 0;
+        buf += count;
+        max -= count;
+
+        list_for_each_entry(urb, &hep->urb_list, urb_list) {
+                tmp = snprintf(buf, max, "\t%s urb %p %d/%d\n",
+                                usb_pipein(urb->pipe) ? "in" : "out",
+                                urb, urb->actual_length,
+                                urb->transfer_buffer_length);
+                if (tmp <= 0)
+                        break;
+                tmp = min(tmp, (int)max);
+                count += tmp;
+                buf += tmp;
+                max -= tmp;
+        }
+        return count;
+}
+
+static int
+dump_queue(struct list_head *q, char *buf, unsigned max)
+{
+        int             count = 0;
+        struct musb_qh  *qh;
+
+        list_for_each_entry(qh, q, ring) {
+                int     tmp;
+
+                tmp = dump_qh(qh, buf, max);
+                if (tmp <= 0)
+                        break;
+                tmp = min(tmp, (int)max);
+                count += tmp;
+                buf += tmp;
+                max -= tmp;
+        }
+        return count;
+}
+
+#endif  /* HCD */
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+static int dump_ep(struct musb_ep *ep, char *buffer, unsigned max)
+{
+        char            *buf = buffer;
+        int             code = 0;
+        void __iomem    *regs = ep->hw_ep->regs;
+        char            *mode = "1buf";
+
+        if (ep->is_in) {
+                if (ep->hw_ep->tx_double_buffered)
+                        mode = "2buf";
+        } else {
+                if (ep->hw_ep->rx_double_buffered)
+                        mode = "2buf";
+        }
+
+        do {
+                struct usb_request      *req;
+
+                code = snprintf(buf, max,
+                                "\n%s (hw%d): %s%s, csr %04x maxp %04x\n",
+                                ep->name, ep->current_epnum,
+                                mode, ep->dma ? " dma" : "",
+                                musb_readw(regs,
+                                        (ep->is_in || !ep->current_epnum)
+                                                ? MUSB_TXCSR
+                                                : MUSB_RXCSR),
+                                musb_readw(regs, ep->is_in
+                                                ? MUSB_TXMAXP
+                                                : MUSB_RXMAXP)
+                                );
+                if (code <= 0)
+                        break;
+                code = min(code, (int) max);
+                buf += code;
+                max -= code;
+
+                if (is_cppi_enabled() && ep->current_epnum) {
+                        unsigned        cppi = ep->current_epnum - 1;
+                        void __iomem    *base = ep->musb->ctrl_base;
+                        unsigned        off1 = cppi << 2;
+                        void __iomem    *ram = base;
+                        char            tmp[16];
+
+                        if (ep->is_in) {
+                                ram += DAVINCI_TXCPPI_STATERAM_OFFSET(cppi);
+                                tmp[0] = 0;
+                        } else {
+                                ram += DAVINCI_RXCPPI_STATERAM_OFFSET(cppi);
+                                snprintf(tmp, sizeof tmp, "%d left, ",
+                                        musb_readl(base,
+                                        DAVINCI_RXCPPI_BUFCNT0_REG + off1));
+                        }
+
+                        code = snprintf(buf, max, "%cX DMA%d: %s"
+                                        "%08x %08x, %08x %08x; "
+                                        "%08x %08x %08x .. %08x\n",
+                                ep->is_in ? 'T' : 'R',
+                                ep->current_epnum - 1, tmp,
+                                musb_readl(ram, 0 * 4),
+                                musb_readl(ram, 1 * 4),
+                                musb_readl(ram, 2 * 4),
+                                musb_readl(ram, 3 * 4),
+                                musb_readl(ram, 4 * 4),
+                                musb_readl(ram, 5 * 4),
+                                musb_readl(ram, 6 * 4),
+                                musb_readl(ram, 7 * 4));
+                        if (code <= 0)
+                                break;
+                        code = min(code, (int) max);
+                        buf += code;
+                        max -= code;
+                }
+
+                if (list_empty(&ep->req_list)) {
+                        code = snprintf(buf, max, "\t(queue empty)\n");
+                        if (code <= 0)
+                                break;
+                        code = min(code, (int) max);
+                        buf += code;
+                        max -= code;
+                        break;
+                }
+                list_for_each_entry(req, &ep->req_list, list) {
+                        code = snprintf(buf, max, "\treq %p, %s%s%d/%d\n",
+                                        req,
+                                        req->zero ? "zero, " : "",
+                                        req->short_not_ok ? "!short, " : "",
+                                        req->actual, req->length);
+                        if (code <= 0)
+                                break;
+                        code = min(code, (int) max);
+                        buf += code;
+                        max -= code;
+                }
+        } while (0);
+        return buf - buffer;
+}
+#endif
+
+static int
+dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max)
+{
+        int                     code = 0;
+        char                    *buf = aBuffer;
+        struct musb_hw_ep       *hw_ep = &musb->endpoints[epnum];
+
+        do {
+                musb_ep_select(musb->mregs, epnum);
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+                if (is_host_active(musb)) {
+                        int             dump_rx, dump_tx;
+                        void __iomem    *regs = hw_ep->regs;
+
+                        /* TEMPORARY (!) until we have a real periodic
+                         * schedule tree ...
+                         */
+                        if (!epnum) {
+                                /* control is shared, uses RX queue
+                                 * but (mostly) shadowed tx registers
+                                 */
+                                dump_tx = !list_empty(&musb->control);
+                                dump_rx = 0;
+                        } else if (hw_ep == musb->bulk_ep) {
+                                dump_tx = !list_empty(&musb->out_bulk);
+                                dump_rx = !list_empty(&musb->in_bulk);
+                        } else if (musb->periodic[epnum]) {
+                                struct usb_host_endpoint        *hep;
+
+                                hep = musb->periodic[epnum]->hep;
+                                dump_rx = hep->desc.bEndpointAddress
+                                                & USB_ENDPOINT_DIR_MASK;
+                                dump_tx = !dump_rx;
+                        } else
+                                break;
+                        /* END TEMPORARY */
+
+
+                        if (dump_rx) {
+                                code = snprintf(buf, max,
+                                        "\nRX%d: %s rxcsr %04x interval %02x "
+                                        "max %04x type %02x; "
+                                        "dev %d hub %d port %d"
+                                        "\n",
+                                        epnum,
+                                        hw_ep->rx_double_buffered
+                                                ? "2buf" : "1buf",
+                                        musb_readw(regs, MUSB_RXCSR),
+                                        musb_readb(regs, MUSB_RXINTERVAL),
+                                        musb_readw(regs, MUSB_RXMAXP),
+                                        musb_readb(regs, MUSB_RXTYPE),
+                                        /* FIXME:  assumes multipoint */
+                                        musb_readb(musb->mregs,
+                                                MUSB_BUSCTL_OFFSET(epnum,
+                                                MUSB_RXFUNCADDR)),
+                                        musb_readb(musb->mregs,
+                                                MUSB_BUSCTL_OFFSET(epnum,
+                                                MUSB_RXHUBADDR)),
+                                        musb_readb(musb->mregs,
+                                                MUSB_BUSCTL_OFFSET(epnum,
+                                                MUSB_RXHUBPORT))
+                                        );
+                                if (code <= 0)
+                                        break;
+                                code = min(code, (int) max);
+                                buf += code;
+                                max -= code;
+
+                                if (is_cppi_enabled()
+                                                && epnum
+                                                && hw_ep->rx_channel) {
+                                        unsigned        cppi = epnum - 1;
+                                        unsigned        off1 = cppi << 2;
+                                        void __iomem    *base;
+                                        void __iomem    *ram;
+                                        char            tmp[16];
+
+                                        base = musb->ctrl_base;
+                                        ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
+                                                        cppi) + base;
+                                        snprintf(tmp, sizeof tmp, "%d left, ",
+                                                musb_readl(base,
+                                                DAVINCI_RXCPPI_BUFCNT0_REG
+                                                                + off1));
+
+                                        code = snprintf(buf, max,
+                                                "    rx dma%d: %s"
+                                                "%08x %08x, %08x %08x; "
+                                                "%08x %08x %08x .. %08x\n",
+                                                cppi, tmp,
+                                                musb_readl(ram, 0 * 4),
+                                                musb_readl(ram, 1 * 4),
+                                                musb_readl(ram, 2 * 4),
+                                                musb_readl(ram, 3 * 4),
+                                                musb_readl(ram, 4 * 4),
+                                                musb_readl(ram, 5 * 4),
+                                                musb_readl(ram, 6 * 4),
+                                                musb_readl(ram, 7 * 4));
+                                        if (code <= 0)
+                                                break;
+                                        code = min(code, (int) max);
+                                        buf += code;
+                                        max -= code;
+                                }
+
+                                if (hw_ep == musb->bulk_ep
+                                                && !list_empty(
+                                                        &musb->in_bulk)) {
+                                        code = dump_queue(&musb->in_bulk,
+                                                        buf, max);
+                                        if (code <= 0)
+                                                break;
+                                        code = min(code, (int) max);
+                                        buf += code;
+                                        max -= code;
+                                } else if (musb->periodic[epnum]) {
+                                        code = dump_qh(musb->periodic[epnum],
+                                                        buf, max);
+                                        if (code <= 0)
+                                                break;
+                                        code = min(code, (int) max);
+                                        buf += code;
+                                        max -= code;
+                                }
+                        }
+
+                        if (dump_tx) {
+                                code = snprintf(buf, max,
+                                        "\nTX%d: %s txcsr %04x interval %02x "
+                                        "max %04x type %02x; "
+                                        "dev %d hub %d port %d"
+                                        "\n",
+                                        epnum,
+                                        hw_ep->tx_double_buffered
+                                                ? "2buf" : "1buf",
+                                        musb_readw(regs, MUSB_TXCSR),
+                                        musb_readb(regs, MUSB_TXINTERVAL),
+                                        musb_readw(regs, MUSB_TXMAXP),
+                                        musb_readb(regs, MUSB_TXTYPE),
+                                        /* FIXME:  assumes multipoint */
+                                        musb_readb(musb->mregs,
+                                                MUSB_BUSCTL_OFFSET(epnum,
+                                                MUSB_TXFUNCADDR)),
+                                        musb_readb(musb->mregs,
+                                                MUSB_BUSCTL_OFFSET(epnum,
+                                                MUSB_TXHUBADDR)),
+                                        musb_readb(musb->mregs,
+                                                MUSB_BUSCTL_OFFSET(epnum,
+                                                MUSB_TXHUBPORT))
+                                        );
+                                if (code <= 0)
+                                        break;
+                                code = min(code, (int) max);
+                                buf += code;
+                                max -= code;
+
+                                if (is_cppi_enabled()
+                                                && epnum
+                                                && hw_ep->tx_channel) {
+                                        unsigned        cppi = epnum - 1;
+                                        void __iomem    *base;
+                                        void __iomem    *ram;
+
+                                        base = musb->ctrl_base;
+                                        ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
+                                                        cppi) + base;
+                                        code = snprintf(buf, max,
+                                                "    tx dma%d: "
+                                                "%08x %08x, %08x %08x; "
+                                                "%08x %08x %08x .. %08x\n",
+                                                cppi,
+                                                musb_readl(ram, 0 * 4),
+                                                musb_readl(ram, 1 * 4),
+                                                musb_readl(ram, 2 * 4),
+                                                musb_readl(ram, 3 * 4),
+                                                musb_readl(ram, 4 * 4),
+                                                musb_readl(ram, 5 * 4),
+                                                musb_readl(ram, 6 * 4),
+                                                musb_readl(ram, 7 * 4));
+                                        if (code <= 0)
+                                                break;
+                                        code = min(code, (int) max);
+                                        buf += code;
+                                        max -= code;
+                                }
+
+                                if (hw_ep == musb->control_ep
+                                                && !list_empty(
+                                                        &musb->control)) {
+                                        code = dump_queue(&musb->control,
+                                                        buf, max);
+                                        if (code <= 0)
+                                                break;
+                                        code = min(code, (int) max);
+                                        buf += code;
+                                        max -= code;
+                                } else if (hw_ep == musb->bulk_ep
+                                                && !list_empty(
+                                                        &musb->out_bulk)) {
+                                        code = dump_queue(&musb->out_bulk,
+                                                        buf, max);
+                                        if (code <= 0)
+                                                break;
+                                        code = min(code, (int) max);
+                                        buf += code;
+                                        max -= code;
+                                } else if (musb->periodic[epnum]) {
+                                        code = dump_qh(musb->periodic[epnum],
+                                                        buf, max);
+                                        if (code <= 0)
+                                                break;
+                                        code = min(code, (int) max);
+                                        buf += code;
+                                        max -= code;
+                                }
+                        }
+                }
+#endif
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+                if (is_peripheral_active(musb)) {
+                        code = 0;
+
+                        if (hw_ep->ep_in.desc || !epnum) {
+                                code = dump_ep(&hw_ep->ep_in, buf, max);
+                                if (code <= 0)
+                                        break;
+                                code = min(code, (int) max);
+                                buf += code;
+                                max -= code;
+                        }
+                        if (hw_ep->ep_out.desc) {
+                                code = dump_ep(&hw_ep->ep_out, buf, max);
+                                if (code <= 0)
+                                        break;
+                                code = min(code, (int) max);
+                                buf += code;
+                                max -= code;
+                        }
+                }
+#endif
+        } while (0);
+
+        return buf - aBuffer;
+}
+
+/* Dump the current status and compile options.
+ * @param musb the device driver instance
+ * @param buffer where to dump the status; it must be big enough to hold the
+ * result otherwise "BAD THINGS HAPPENS(TM)".
+ */
+static int dump_header_stats(struct musb *musb, char *buffer)
+{
+        int code, count = 0;
+        const void __iomem *mbase = musb->mregs;
+
+        *buffer = 0;
+        count = sprintf(buffer, "Status: %sHDRC, Mode=%s "
+                                "(Power=%02x, DevCtl=%02x)\n",
+                        (musb->is_multipoint ? "M" : ""), MUSB_MODE(musb),
+                        musb_readb(mbase, MUSB_POWER),
+                        musb_readb(mbase, MUSB_DEVCTL));
+        if (count <= 0)
+                return 0;
+        buffer += count;
+
+        code = sprintf(buffer, "OTG state: %s; %sactive\n",
+                        otg_state_string(musb),
+                        musb->is_active ? "" : "in");
+        if (code <= 0)
+                goto done;
+        buffer += code;
+        count += code;
+
+        code = sprintf(buffer,
+                        "Options: "
+#ifdef CONFIG_MUSB_PIO_ONLY
+                        "pio"
+#elif defined(CONFIG_USB_TI_CPPI_DMA)
+                        "cppi-dma"
+#elif defined(CONFIG_USB_INVENTRA_DMA)
+                        "musb-dma"
+#elif defined(CONFIG_USB_TUSB_OMAP_DMA)
+                        "tusb-omap-dma"
+#else
+                        "?dma?"
+#endif
+                        ", "
+#ifdef CONFIG_USB_MUSB_OTG
+                        "otg (peripheral+host)"
+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
+                        "peripheral"
+#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
+                        "host"
+#endif
+                        ", debug=%d [eps=%d]\n",
+                debug,
+                musb->nr_endpoints);
+        if (code <= 0)
+                goto done;
+        count += code;
+        buffer += code;
+
+#ifdef  CONFIG_USB_GADGET_MUSB_HDRC
+        code = sprintf(buffer, "Peripheral address: %02x\n",
+                        musb_readb(musb->ctrl_base, MUSB_FADDR));
+        if (code <= 0)
+                goto done;
+        buffer += code;
+        count += code;
+#endif
+
+#ifdef  CONFIG_USB_MUSB_HDRC_HCD
+        code = sprintf(buffer, "Root port status: %08x\n",
+                        musb->port1_status);
+        if (code <= 0)
+                goto done;
+        buffer += code;
+        count += code;
+#endif
+
+#ifdef  CONFIG_ARCH_DAVINCI
+        code = sprintf(buffer,
+                        "DaVinci: ctrl=%02x stat=%1x phy=%03x\n"
+                        "\trndis=%05x auto=%04x intsrc=%08x intmsk=%08x"
+                        "\n",
+                        musb_readl(musb->ctrl_base, DAVINCI_USB_CTRL_REG),
+                        musb_readl(musb->ctrl_base, DAVINCI_USB_STAT_REG),
+                        __raw_readl((void __force __iomem *)
+                                        IO_ADDRESS(USBPHY_CTL_PADDR)),
+                        musb_readl(musb->ctrl_base, DAVINCI_RNDIS_REG),
+                        musb_readl(musb->ctrl_base, DAVINCI_AUTOREQ_REG),
+                        musb_readl(musb->ctrl_base,
+                                        DAVINCI_USB_INT_SOURCE_REG),
+                        musb_readl(musb->ctrl_base,
+                                        DAVINCI_USB_INT_MASK_REG));
+        if (code <= 0)
+                goto done;
+        count += code;
+        buffer += code;
+#endif  /* DAVINCI */
+
+#ifdef CONFIG_USB_TUSB6010
+        code = sprintf(buffer,
+                        "TUSB6010: devconf %08x, phy enable %08x drive %08x"
+                        "\n\totg %03x timer %08x"
+                        "\n\tprcm conf %08x mgmt %08x; int src %08x mask %08x"
+                        "\n",
+                        musb_readl(musb->ctrl_base, TUSB_DEV_CONF),
+                        musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL_ENABLE),
+                        musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL),
+                        musb_readl(musb->ctrl_base, TUSB_DEV_OTG_STAT),
+                        musb_readl(musb->ctrl_base, TUSB_DEV_OTG_TIMER),
+                        musb_readl(musb->ctrl_base, TUSB_PRCM_CONF),
+                        musb_readl(musb->ctrl_base, TUSB_PRCM_MNGMT),
+                        musb_readl(musb->ctrl_base, TUSB_INT_SRC),
+                        musb_readl(musb->ctrl_base, TUSB_INT_MASK));
+        if (code <= 0)
+                goto done;
+        count += code;
+        buffer += code;
+#endif  /* DAVINCI */
+
+        if (is_cppi_enabled() && musb->dma_controller) {
+                code = sprintf(buffer,
+                                "CPPI: txcr=%d txsrc=%01x txena=%01x; "
+                                "rxcr=%d rxsrc=%01x rxena=%01x "
+                                "\n",
+                                musb_readl(musb->ctrl_base,
+                                                DAVINCI_TXCPPI_CTRL_REG),
+                                musb_readl(musb->ctrl_base,
+                                                DAVINCI_TXCPPI_RAW_REG),
+                                musb_readl(musb->ctrl_base,
+                                                DAVINCI_TXCPPI_INTENAB_REG),
+                                musb_readl(musb->ctrl_base,
+                                                DAVINCI_RXCPPI_CTRL_REG),
+                                musb_readl(musb->ctrl_base,
+                                                DAVINCI_RXCPPI_RAW_REG),
+                                musb_readl(musb->ctrl_base,
+                                                DAVINCI_RXCPPI_INTENAB_REG));
+                if (code <= 0)
+                        goto done;
+                count += code;
+                buffer += code;
+        }
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+        if (is_peripheral_enabled(musb)) {
+                code = sprintf(buffer, "Gadget driver: %s\n",
+                                musb->gadget_driver
+                                        ? musb->gadget_driver->driver.name
+                                        : "(none)");
+                if (code <= 0)
+                        goto done;
+                count += code;
+                buffer += code;
+        }
+#endif
+
+done:
+        return count;
+}
+
+/* Write to ProcFS
+ *
+ * C soft-connect
+ * c soft-disconnect
+ * I enable HS
+ * i disable HS
+ * s stop session
+ * F force session (OTG-unfriendly)
+ * E rElinquish bus (OTG)
+ * H request host mode
+ * h cancel host request
+ * T start sending TEST_PACKET
+ * D<num> set/query the debug level
+ */
+static int musb_proc_write(struct file *file, const char __user *buffer,
+                        unsigned long count, void *data)
+{
+        char cmd;
+        u8 reg;
+        struct musb *musb = (struct musb *)data;
+        void __iomem *mbase = musb->mregs;
+
+        /* MOD_INC_USE_COUNT; */
+
+        if (unlikely(copy_from_user(&cmd, buffer, 1)))
+                return -EFAULT;
+
+        switch (cmd) {
+        case 'C':
+                if (mbase) {
+                        reg = musb_readb(mbase, MUSB_POWER)
+                                        | MUSB_POWER_SOFTCONN;
+                        musb_writeb(mbase, MUSB_POWER, reg);
+                }
+                break;
+
+        case 'c':
+                if (mbase) {
+                        reg = musb_readb(mbase, MUSB_POWER)
+                                        & ~MUSB_POWER_SOFTCONN;
+                        musb_writeb(mbase, MUSB_POWER, reg);
+                }
+                break;
+
+        case 'I':
+                if (mbase) {
+                        reg = musb_readb(mbase, MUSB_POWER)
+                                        | MUSB_POWER_HSENAB;
+                        musb_writeb(mbase, MUSB_POWER, reg);
+                }
+                break;
+
+        case 'i':
+                if (mbase) {
+                        reg = musb_readb(mbase, MUSB_POWER)
+                                        & ~MUSB_POWER_HSENAB;
+                        musb_writeb(mbase, MUSB_POWER, reg);
+                }
+                break;
+
+        case 'F':
+                reg = musb_readb(mbase, MUSB_DEVCTL);
+                reg |= MUSB_DEVCTL_SESSION;
+                musb_writeb(mbase, MUSB_DEVCTL, reg);
+                break;
+
+        case 'H':
+                if (mbase) {
+                        reg = musb_readb(mbase, MUSB_DEVCTL);
+                        reg |= MUSB_DEVCTL_HR;
+                        musb_writeb(mbase, MUSB_DEVCTL, reg);
+                        /* MUSB_HST_MODE( ((struct musb*)data) ); */
+                        /* WARNING("Host Mode\n"); */
+                }
+                break;
+
+        case 'h':
+                if (mbase) {
+                        reg = musb_readb(mbase, MUSB_DEVCTL);
+                        reg &= ~MUSB_DEVCTL_HR;
+                        musb_writeb(mbase, MUSB_DEVCTL, reg);
+                }
+                break;
+
+        case 'T':
+                if (mbase) {
+                        musb_load_testpacket(musb);
+                        musb_writeb(mbase, MUSB_TESTMODE,
+                                        MUSB_TEST_PACKET);
+                }
+                break;
+
+#if (MUSB_DEBUG > 0)
+                /* set/read debug level */
+        case 'D':{
+                        if (count > 1) {
+                                char digits[8], *p = digits;
+                                int i = 0, level = 0, sign = 1;
+                                int len = min(count - 1, (unsigned long)8);
+
+                                if (copy_from_user(&digits, &buffer[1], len))
+                                        return -EFAULT;
+
+                                /* optional sign */
+                                if (*p == '-') {
+                                        len -= 1;
+                                        sign = -sign;
+                                        p++;
+                                }
+
+                                /* read it */
+                                while (i++ < len && *p > '0' && *p < '9') {
+                                        level = level * 10 + (*p - '0');
+                                        p++;
+                                }
+
+                                level *= sign;
+                                DBG(1, "debug level %d\n", level);
+                                debug = level;
+                        }
+                }
+                break;
+
+
+        case '?':
+                INFO("?: you are seeing it\n");
+                INFO("C/c: soft connect enable/disable\n");
+                INFO("I/i: hispeed enable/disable\n");
+                INFO("F: force session start\n");
+                INFO("H: host mode\n");
+                INFO("T: start sending TEST_PACKET\n");
+                INFO("D: set/read dbug level\n");
+                break;
+#endif
+
+        default:
+                ERR("Command %c not implemented\n", cmd);
+                break;
+        }
+
+        musb_platform_try_idle(musb, 0);
+
+        return count;
+}
+
+static int musb_proc_read(char *page, char **start,
+                        off_t off, int count, int *eof, void *data)
+{
+        char *buffer = page;
+        int code = 0;
+        unsigned long   flags;
+        struct musb     *musb = data;
+        unsigned        epnum;
+
+        count -= off;
+        count -= 1;             /* for NUL at end */
+        if (count <= 0)
+                return -EINVAL;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        code = dump_header_stats(musb, buffer);
+        if (code > 0) {
+                buffer += code;
+                count -= code;
+        }
+
+        /* generate the report for the end points */
+        /* REVISIT ... not unless something's connected! */
+        for (epnum = 0; count >= 0 && epnum < musb->nr_endpoints;
+                        epnum++) {
+                code = dump_end_info(musb, epnum, buffer, count);
+                if (code > 0) {
+                        buffer += code;
+                        count -= code;
+                }
+        }
+
+        musb_platform_try_idle(musb, 0);
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+        *eof = 1;
+
+        return buffer - page;
+}
+
+void __devexit musb_debug_delete(char *name, struct musb *musb)
+{
+        if (musb->proc_entry)
+                remove_proc_entry(name, NULL);
+}
+
+struct proc_dir_entry *__init
+musb_debug_create(char *name, struct musb *data)
+{
+        struct proc_dir_entry   *pde;
+
+        /* FIXME convert everything to seq_file; then later, debugfs */
+
+        if (!name)
+                return NULL;
+
+        pde = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, NULL);
+        data->proc_entry = pde;
+        if (pde) {
+                pde->data = data;
+                /* pde->owner = THIS_MODULE; */
+
+                pde->read_proc = musb_proc_read;
+                pde->write_proc = musb_proc_write;
+
+                pde->size = 0;
+
+                pr_debug("Registered /proc/%s\n", name);
+        } else {
+                pr_debug("Cannot create a valid proc file entry");
+        }
+
+        return pde;
+}
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
new file mode 100644
index 000000000000..9c228661aa5a
--- /dev/null
+++ b/drivers/usb/musb/musb_regs.h
@@ -0,0 +1,300 @@
+/*
+ * MUSB OTG driver register defines
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef __MUSB_REGS_H__
+#define __MUSB_REGS_H__
+
+#define MUSB_EP0_FIFOSIZE       64      /* This is non-configurable */
+
+/*
+ * Common USB registers
+ */
+
+#define MUSB_FADDR              0x00    /* 8-bit */
+#define MUSB_POWER              0x01    /* 8-bit */
+
+#define MUSB_INTRTX             0x02    /* 16-bit */
+#define MUSB_INTRRX             0x04
+#define MUSB_INTRTXE            0x06
+#define MUSB_INTRRXE            0x08
+#define MUSB_INTRUSB            0x0A    /* 8 bit */
+#define MUSB_INTRUSBE           0x0B    /* 8 bit */
+#define MUSB_FRAME              0x0C
+#define MUSB_INDEX              0x0E    /* 8 bit */
+#define MUSB_TESTMODE           0x0F    /* 8 bit */
+
+/* Get offset for a given FIFO from musb->mregs */
+#ifdef  CONFIG_USB_TUSB6010
+#define MUSB_FIFO_OFFSET(epnum) (0x200 + ((epnum) * 0x20))
+#else
+#define MUSB_FIFO_OFFSET(epnum) (0x20 + ((epnum) * 4))
+#endif
+
+/*
+ * Additional Control Registers
+ */
+
+#define MUSB_DEVCTL             0x60    /* 8 bit */
+
+/* These are always controlled through the INDEX register */
+#define MUSB_TXFIFOSZ           0x62    /* 8-bit (see masks) */
+#define MUSB_RXFIFOSZ           0x63    /* 8-bit (see masks) */
+#define MUSB_TXFIFOADD          0x64    /* 16-bit offset shifted right 3 */
+#define MUSB_RXFIFOADD          0x66    /* 16-bit offset shifted right 3 */
+
+/* REVISIT: vctrl/vstatus: optional vendor utmi+phy register at 0x68 */
+#define MUSB_HWVERS             0x6C    /* 8 bit */
+
+#define MUSB_EPINFO             0x78    /* 8 bit */
+#define MUSB_RAMINFO            0x79    /* 8 bit */
+#define MUSB_LINKINFO           0x7a    /* 8 bit */
+#define MUSB_VPLEN              0x7b    /* 8 bit */
+#define MUSB_HS_EOF1            0x7c    /* 8 bit */
+#define MUSB_FS_EOF1            0x7d    /* 8 bit */
+#define MUSB_LS_EOF1            0x7e    /* 8 bit */
+
+/* Offsets to endpoint registers */
+#define MUSB_TXMAXP             0x00
+#define MUSB_TXCSR              0x02
+#define MUSB_CSR0               MUSB_TXCSR      /* Re-used for EP0 */
+#define MUSB_RXMAXP             0x04
+#define MUSB_RXCSR              0x06
+#define MUSB_RXCOUNT            0x08
+#define MUSB_COUNT0             MUSB_RXCOUNT    /* Re-used for EP0 */
+#define MUSB_TXTYPE             0x0A
+#define MUSB_TYPE0              MUSB_TXTYPE     /* Re-used for EP0 */
+#define MUSB_TXINTERVAL         0x0B
+#define MUSB_NAKLIMIT0          MUSB_TXINTERVAL /* Re-used for EP0 */
+#define MUSB_RXTYPE             0x0C
+#define MUSB_RXINTERVAL         0x0D
+#define MUSB_FIFOSIZE           0x0F
+#define MUSB_CONFIGDATA         MUSB_FIFOSIZE   /* Re-used for EP0 */
+
+/* Offsets to endpoint registers in indexed model (using INDEX register) */
+#define MUSB_INDEXED_OFFSET(_epnum, _offset)    \
+        (0x10 + (_offset))
+
+/* Offsets to endpoint registers in flat models */
+#define MUSB_FLAT_OFFSET(_epnum, _offset)       \
+        (0x100 + (0x10*(_epnum)) + (_offset))
+
+#ifdef CONFIG_USB_TUSB6010
+/* TUSB6010 EP0 configuration register is special */
+#define MUSB_TUSB_OFFSET(_epnum, _offset)       \
+        (0x10 + _offset)
+#include "tusb6010.h"           /* Needed "only" for TUSB_EP0_CONF */
+#endif
+
+/* "bus control"/target registers, for host side multipoint (external hubs) */
+#define MUSB_TXFUNCADDR         0x00
+#define MUSB_TXHUBADDR          0x02
+#define MUSB_TXHUBPORT          0x03
+
+#define MUSB_RXFUNCADDR         0x04
+#define MUSB_RXHUBADDR          0x06
+#define MUSB_RXHUBPORT          0x07
+
+#define MUSB_BUSCTL_OFFSET(_epnum, _offset) \
+        (0x80 + (8*(_epnum)) + (_offset))
+
+/*
+ * MUSB Register bits
+ */
+
+/* POWER */
+#define MUSB_POWER_ISOUPDATE    0x80
+#define MUSB_POWER_SOFTCONN     0x40
+#define MUSB_POWER_HSENAB       0x20
+#define MUSB_POWER_HSMODE       0x10
+#define MUSB_POWER_RESET        0x08
+#define MUSB_POWER_RESUME       0x04
+#define MUSB_POWER_SUSPENDM     0x02
+#define MUSB_POWER_ENSUSPEND    0x01
+
+/* INTRUSB */
+#define MUSB_INTR_SUSPEND       0x01
+#define MUSB_INTR_RESUME        0x02
+#define MUSB_INTR_RESET         0x04
+#define MUSB_INTR_BABBLE        0x04
+#define MUSB_INTR_SOF           0x08
+#define MUSB_INTR_CONNECT       0x10
+#define MUSB_INTR_DISCONNECT    0x20
+#define MUSB_INTR_SESSREQ       0x40
+#define MUSB_INTR_VBUSERROR     0x80    /* For SESSION end */
+
+/* DEVCTL */
+#define MUSB_DEVCTL_BDEVICE     0x80
+#define MUSB_DEVCTL_FSDEV       0x40
+#define MUSB_DEVCTL_LSDEV       0x20
+#define MUSB_DEVCTL_VBUS        0x18
+#define MUSB_DEVCTL_VBUS_SHIFT  3
+#define MUSB_DEVCTL_HM          0x04
+#define MUSB_DEVCTL_HR          0x02
+#define MUSB_DEVCTL_SESSION     0x01
+
+/* TESTMODE */
+#define MUSB_TEST_FORCE_HOST    0x80
+#define MUSB_TEST_FIFO_ACCESS   0x40
+#define MUSB_TEST_FORCE_FS      0x20
+#define MUSB_TEST_FORCE_HS      0x10
+#define MUSB_TEST_PACKET        0x08
+#define MUSB_TEST_K             0x04
+#define MUSB_TEST_J             0x02
+#define MUSB_TEST_SE0_NAK       0x01
+
+/* Allocate for double-packet buffering (effectively doubles assigned _SIZE) */
+#define MUSB_FIFOSZ_DPB 0x10
+/* Allocation size (8, 16, 32, ... 4096) */
+#define MUSB_FIFOSZ_SIZE        0x0f
+
+/* CSR0 */
+#define MUSB_CSR0_FLUSHFIFO     0x0100
+#define MUSB_CSR0_TXPKTRDY      0x0002
+#define MUSB_CSR0_RXPKTRDY      0x0001
+
+/* CSR0 in Peripheral mode */
+#define MUSB_CSR0_P_SVDSETUPEND 0x0080
+#define MUSB_CSR0_P_SVDRXPKTRDY 0x0040
+#define MUSB_CSR0_P_SENDSTALL   0x0020
+#define MUSB_CSR0_P_SETUPEND    0x0010
+#define MUSB_CSR0_P_DATAEND     0x0008
+#define MUSB_CSR0_P_SENTSTALL   0x0004
+
+/* CSR0 in Host mode */
+#define MUSB_CSR0_H_DIS_PING            0x0800
+#define MUSB_CSR0_H_WR_DATATOGGLE       0x0400  /* Set to allow setting: */
+#define MUSB_CSR0_H_DATATOGGLE          0x0200  /* Data toggle control */
+#define MUSB_CSR0_H_NAKTIMEOUT          0x0080
+#define MUSB_CSR0_H_STATUSPKT           0x0040
+#define MUSB_CSR0_H_REQPKT              0x0020
+#define MUSB_CSR0_H_ERROR               0x0010
+#define MUSB_CSR0_H_SETUPPKT            0x0008
+#define MUSB_CSR0_H_RXSTALL             0x0004
+
+/* CSR0 bits to avoid zeroing (write zero clears, write 1 ignored) */
+#define MUSB_CSR0_P_WZC_BITS    \
+        (MUSB_CSR0_P_SENTSTALL)
+#define MUSB_CSR0_H_WZC_BITS    \
+        (MUSB_CSR0_H_NAKTIMEOUT | MUSB_CSR0_H_RXSTALL \
+        | MUSB_CSR0_RXPKTRDY)
+
+/* TxType/RxType */
+#define MUSB_TYPE_SPEED         0xc0
+#define MUSB_TYPE_SPEED_SHIFT   6
+#define MUSB_TYPE_PROTO         0x30    /* Implicitly zero for ep0 */
+#define MUSB_TYPE_PROTO_SHIFT   4
+#define MUSB_TYPE_REMOTE_END    0xf     /* Implicitly zero for ep0 */
+
+/* CONFIGDATA */
+#define MUSB_CONFIGDATA_MPRXE           0x80    /* Auto bulk pkt combining */
+#define MUSB_CONFIGDATA_MPTXE           0x40    /* Auto bulk pkt splitting */
+#define MUSB_CONFIGDATA_BIGENDIAN       0x20
+#define MUSB_CONFIGDATA_HBRXE           0x10    /* HB-ISO for RX */
+#define MUSB_CONFIGDATA_HBTXE           0x08    /* HB-ISO for TX */
+#define MUSB_CONFIGDATA_DYNFIFO         0x04    /* Dynamic FIFO sizing */
+#define MUSB_CONFIGDATA_SOFTCONE        0x02    /* SoftConnect */
+#define MUSB_CONFIGDATA_UTMIDW          0x01    /* Data width 0/1 => 8/16bits */
+
+/* TXCSR in Peripheral and Host mode */
+#define MUSB_TXCSR_AUTOSET              0x8000
+#define MUSB_TXCSR_MODE                 0x2000
+#define MUSB_TXCSR_DMAENAB              0x1000
+#define MUSB_TXCSR_FRCDATATOG           0x0800
+#define MUSB_TXCSR_DMAMODE              0x0400
+#define MUSB_TXCSR_CLRDATATOG           0x0040
+#define MUSB_TXCSR_FLUSHFIFO            0x0008
+#define MUSB_TXCSR_FIFONOTEMPTY         0x0002
+#define MUSB_TXCSR_TXPKTRDY             0x0001
+
+/* TXCSR in Peripheral mode */
+#define MUSB_TXCSR_P_ISO                0x4000
+#define MUSB_TXCSR_P_INCOMPTX           0x0080
+#define MUSB_TXCSR_P_SENTSTALL          0x0020
+#define MUSB_TXCSR_P_SENDSTALL          0x0010
+#define MUSB_TXCSR_P_UNDERRUN           0x0004
+
+/* TXCSR in Host mode */
+#define MUSB_TXCSR_H_WR_DATATOGGLE      0x0200
+#define MUSB_TXCSR_H_DATATOGGLE         0x0100
+#define MUSB_TXCSR_H_NAKTIMEOUT         0x0080
+#define MUSB_TXCSR_H_RXSTALL            0x0020
+#define MUSB_TXCSR_H_ERROR              0x0004
+
+/* TXCSR bits to avoid zeroing (write zero clears, write 1 ignored) */
+#define MUSB_TXCSR_P_WZC_BITS   \
+        (MUSB_TXCSR_P_INCOMPTX | MUSB_TXCSR_P_SENTSTALL \
+        | MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_FIFONOTEMPTY)
+#define MUSB_TXCSR_H_WZC_BITS   \
+        (MUSB_TXCSR_H_NAKTIMEOUT | MUSB_TXCSR_H_RXSTALL \
+        | MUSB_TXCSR_H_ERROR | MUSB_TXCSR_FIFONOTEMPTY)
+
+/* RXCSR in Peripheral and Host mode */
+#define MUSB_RXCSR_AUTOCLEAR            0x8000
+#define MUSB_RXCSR_DMAENAB              0x2000
+#define MUSB_RXCSR_DISNYET              0x1000
+#define MUSB_RXCSR_PID_ERR              0x1000
+#define MUSB_RXCSR_DMAMODE              0x0800
+#define MUSB_RXCSR_INCOMPRX             0x0100
+#define MUSB_RXCSR_CLRDATATOG           0x0080
+#define MUSB_RXCSR_FLUSHFIFO            0x0010
+#define MUSB_RXCSR_DATAERROR            0x0008
+#define MUSB_RXCSR_FIFOFULL             0x0002
+#define MUSB_RXCSR_RXPKTRDY             0x0001
+
+/* RXCSR in Peripheral mode */
+#define MUSB_RXCSR_P_ISO                0x4000
+#define MUSB_RXCSR_P_SENTSTALL          0x0040
+#define MUSB_RXCSR_P_SENDSTALL          0x0020
+#define MUSB_RXCSR_P_OVERRUN            0x0004
+
+/* RXCSR in Host mode */
+#define MUSB_RXCSR_H_AUTOREQ            0x4000
+#define MUSB_RXCSR_H_WR_DATATOGGLE      0x0400
+#define MUSB_RXCSR_H_DATATOGGLE         0x0200
+#define MUSB_RXCSR_H_RXSTALL            0x0040
+#define MUSB_RXCSR_H_REQPKT             0x0020
+#define MUSB_RXCSR_H_ERROR              0x0004
+
+/* RXCSR bits to avoid zeroing (write zero clears, write 1 ignored) */
+#define MUSB_RXCSR_P_WZC_BITS   \
+        (MUSB_RXCSR_P_SENTSTALL | MUSB_RXCSR_P_OVERRUN \
+        | MUSB_RXCSR_RXPKTRDY)
+#define MUSB_RXCSR_H_WZC_BITS   \
+        (MUSB_RXCSR_H_RXSTALL | MUSB_RXCSR_H_ERROR \
+        | MUSB_RXCSR_DATAERROR | MUSB_RXCSR_RXPKTRDY)
+
+/* HUBADDR */
+#define MUSB_HUBADDR_MULTI_TT           0x80
+
+#endif  /* __MUSB_REGS_H__ */
diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c
new file mode 100644
index 000000000000..e0e9ce584175
--- /dev/null
+++ b/drivers/usb/musb/musb_virthub.c
@@ -0,0 +1,425 @@
+/*
+ * MUSB OTG driver virtual root hub support
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2006 by Texas Instruments
+ * Copyright (C) 2006-2007 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/time.h>
+#include <linux/timer.h>
+
+#include <asm/unaligned.h>
+
+#include "musb_core.h"
+
+
+static void musb_port_suspend(struct musb *musb, bool do_suspend)
+{
+        u8              power;
+        void __iomem    *mbase = musb->mregs;
+
+        if (!is_host_active(musb))
+                return;
+
+        /* NOTE:  this doesn't necessarily put PHY into low power mode,
+         * turning off its clock; that's a function of PHY integration and
+         * MUSB_POWER_ENSUSPEND.  PHY may need a clock (sigh) to detect
+         * SE0 changing to connect (J) or wakeup (K) states.
+         */
+        power = musb_readb(mbase, MUSB_POWER);
+        if (do_suspend) {
+                int retries = 10000;
+
+                power &= ~MUSB_POWER_RESUME;
+                power |= MUSB_POWER_SUSPENDM;
+                musb_writeb(mbase, MUSB_POWER, power);
+
+                /* Needed for OPT A tests */
+                power = musb_readb(mbase, MUSB_POWER);
+                while (power & MUSB_POWER_SUSPENDM) {
+                        power = musb_readb(mbase, MUSB_POWER);
+                        if (retries-- < 1)
+                                break;
+                }
+
+                DBG(3, "Root port suspended, power %02x\n", power);
+
+                musb->port1_status |= USB_PORT_STAT_SUSPEND;
+                switch (musb->xceiv.state) {
+                case OTG_STATE_A_HOST:
+                        musb->xceiv.state = OTG_STATE_A_SUSPEND;
+                        musb->is_active = is_otg_enabled(musb)
+                                        && musb->xceiv.host->b_hnp_enable;
+                        musb_platform_try_idle(musb, 0);
+                        break;
+#ifdef  CONFIG_USB_MUSB_OTG
+                case OTG_STATE_B_HOST:
+                        musb->xceiv.state = OTG_STATE_B_WAIT_ACON;
+                        musb->is_active = is_otg_enabled(musb)
+                                        && musb->xceiv.host->b_hnp_enable;
+                        musb_platform_try_idle(musb, 0);
+                        break;
+#endif
+                default:
+                        DBG(1, "bogus rh suspend? %s\n",
+                                otg_state_string(musb));
+                }
+        } else if (power & MUSB_POWER_SUSPENDM) {
+                power &= ~MUSB_POWER_SUSPENDM;
+                power |= MUSB_POWER_RESUME;
+                musb_writeb(mbase, MUSB_POWER, power);
+
+                DBG(3, "Root port resuming, power %02x\n", power);
+
+                /* later, GetPortStatus will stop RESUME signaling */
+                musb->port1_status |= MUSB_PORT_STAT_RESUME;
+                musb->rh_timer = jiffies + msecs_to_jiffies(20);
+        }
+}
+
+static void musb_port_reset(struct musb *musb, bool do_reset)
+{
+        u8              power;
+        void __iomem    *mbase = musb->mregs;
+
+#ifdef CONFIG_USB_MUSB_OTG
+        if (musb->xceiv.state == OTG_STATE_B_IDLE) {
+                DBG(2, "HNP: Returning from HNP; no hub reset from b_idle\n");
+                musb->port1_status &= ~USB_PORT_STAT_RESET;
+                return;
+        }
+#endif
+
+        if (!is_host_active(musb))
+                return;
+
+        /* NOTE:  caller guarantees it will turn off the reset when
+         * the appropriate amount of time has passed
+         */
+        power = musb_readb(mbase, MUSB_POWER);
+        if (do_reset) {
+
+                /*
+                 * If RESUME is set, we must make sure it stays minimum 20 ms.
+                 * Then we must clear RESUME and wait a bit to let musb start
+                 * generating SOFs. If we don't do this, OPT HS A 6.8 tests
+                 * fail with "Error! Did not receive an SOF before suspend
+                 * detected".
+                 */
+                if (power &  MUSB_POWER_RESUME) {
+                        while (time_before(jiffies, musb->rh_timer))
+                                msleep(1);
+                        musb_writeb(mbase, MUSB_POWER,
+                                power & ~MUSB_POWER_RESUME);
+                        msleep(1);
+                }
+
+                musb->ignore_disconnect = true;
+                power &= 0xf0;
+                musb_writeb(mbase, MUSB_POWER,
+                                power | MUSB_POWER_RESET);
+
+                musb->port1_status |= USB_PORT_STAT_RESET;
+                musb->port1_status &= ~USB_PORT_STAT_ENABLE;
+                musb->rh_timer = jiffies + msecs_to_jiffies(50);
+        } else {
+                DBG(4, "root port reset stopped\n");
+                musb_writeb(mbase, MUSB_POWER,
+                                power & ~MUSB_POWER_RESET);
+
+                musb->ignore_disconnect = false;
+
+                power = musb_readb(mbase, MUSB_POWER);
+                if (power & MUSB_POWER_HSMODE) {
+                        DBG(4, "high-speed device connected\n");
+                        musb->port1_status |= USB_PORT_STAT_HIGH_SPEED;
+                }
+
+                musb->port1_status &= ~USB_PORT_STAT_RESET;
+                musb->port1_status |= USB_PORT_STAT_ENABLE
+                                        | (USB_PORT_STAT_C_RESET << 16)
+                                        | (USB_PORT_STAT_C_ENABLE << 16);
+                usb_hcd_poll_rh_status(musb_to_hcd(musb));
+
+                musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
+        }
+}
+
+void musb_root_disconnect(struct musb *musb)
+{
+        musb->port1_status = (1 << USB_PORT_FEAT_POWER)
+                        | (1 << USB_PORT_FEAT_C_CONNECTION);
+
+        usb_hcd_poll_rh_status(musb_to_hcd(musb));
+        musb->is_active = 0;
+
+        switch (musb->xceiv.state) {
+        case OTG_STATE_A_HOST:
+        case OTG_STATE_A_SUSPEND:
+                musb->xceiv.state = OTG_STATE_A_WAIT_BCON;
+                musb->is_active = 0;
+                break;
+        case OTG_STATE_A_WAIT_VFALL:
+                musb->xceiv.state = OTG_STATE_B_IDLE;
+                break;
+        default:
+                DBG(1, "host disconnect (%s)\n", otg_state_string(musb));
+        }
+}
+
+
+/*---------------------------------------------------------------------*/
+
+/* Caller may or may not hold musb->lock */
+int musb_hub_status_data(struct usb_hcd *hcd, char *buf)
+{
+        struct musb     *musb = hcd_to_musb(hcd);
+        int             retval = 0;
+
+        /* called in_irq() via usb_hcd_poll_rh_status() */
+        if (musb->port1_status & 0xffff0000) {
+                *buf = 0x02;
+                retval = 1;
+        }
+        return retval;
+}
+
+int musb_hub_control(
+        struct usb_hcd  *hcd,
+        u16             typeReq,
+        u16             wValue,
+        u16             wIndex,
+        char            *buf,
+        u16             wLength)
+{
+        struct musb     *musb = hcd_to_musb(hcd);
+        u32             temp;
+        int             retval = 0;
+        unsigned long   flags;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))) {
+                spin_unlock_irqrestore(&musb->lock, flags);
+                return -ESHUTDOWN;
+        }
+
+        /* hub features:  always zero, setting is a NOP
+         * port features: reported, sometimes updated when host is active
+         * no indicators
+         */
+        switch (typeReq) {
+        case ClearHubFeature:
+        case SetHubFeature:
+                switch (wValue) {
+                case C_HUB_OVER_CURRENT:
+                case C_HUB_LOCAL_POWER:
+                        break;
+                default:
+                        goto error;
+                }
+                break;
+        case ClearPortFeature:
+                if ((wIndex & 0xff) != 1)
+                        goto error;
+
+                switch (wValue) {
+                case USB_PORT_FEAT_ENABLE:
+                        break;
+                case USB_PORT_FEAT_SUSPEND:
+                        musb_port_suspend(musb, false);
+                        break;
+                case USB_PORT_FEAT_POWER:
+                        if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
+                                musb_set_vbus(musb, 0);
+                        break;
+                case USB_PORT_FEAT_C_CONNECTION:
+                case USB_PORT_FEAT_C_ENABLE:
+                case USB_PORT_FEAT_C_OVER_CURRENT:
+                case USB_PORT_FEAT_C_RESET:
+                case USB_PORT_FEAT_C_SUSPEND:
+                        break;
+                default:
+                        goto error;
+                }
+                DBG(5, "clear feature %d\n", wValue);
+                musb->port1_status &= ~(1 << wValue);
+                break;
+        case GetHubDescriptor:
+                {
+                struct usb_hub_descriptor *desc = (void *)buf;
+
+                desc->bDescLength = 9;
+                desc->bDescriptorType = 0x29;
+                desc->bNbrPorts = 1;
+                desc->wHubCharacteristics = __constant_cpu_to_le16(
+                                  0x0001        /* per-port power switching */
+                                | 0x0010        /* no overcurrent reporting */
+                                );
+                desc->bPwrOn2PwrGood = 5;       /* msec/2 */
+                desc->bHubContrCurrent = 0;
+
+                /* workaround bogus struct definition */
+                desc->DeviceRemovable[0] = 0x02;        /* port 1 */
+                desc->DeviceRemovable[1] = 0xff;
+                }
+                break;
+        case GetHubStatus:
+                temp = 0;
+                *(__le32 *) buf = cpu_to_le32(temp);
+                break;
+        case GetPortStatus:
+                if (wIndex != 1)
+                        goto error;
+
+                /* finish RESET signaling? */
+                if ((musb->port1_status & USB_PORT_STAT_RESET)
+                                && time_after_eq(jiffies, musb->rh_timer))
+                        musb_port_reset(musb, false);
+
+                /* finish RESUME signaling? */
+                if ((musb->port1_status & MUSB_PORT_STAT_RESUME)
+                                && time_after_eq(jiffies, musb->rh_timer)) {
+                        u8              power;
+
+                        power = musb_readb(musb->mregs, MUSB_POWER);
+                        power &= ~MUSB_POWER_RESUME;
+                        DBG(4, "root port resume stopped, power %02x\n",
+                                        power);
+                        musb_writeb(musb->mregs, MUSB_POWER, power);
+
+                        /* ISSUE:  DaVinci (RTL 1.300) disconnects after
+                         * resume of high speed peripherals (but not full
+                         * speed ones).
+                         */
+
+                        musb->is_active = 1;
+                        musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
+                                        | MUSB_PORT_STAT_RESUME);
+                        musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
+                        usb_hcd_poll_rh_status(musb_to_hcd(musb));
+                        /* NOTE: it might really be A_WAIT_BCON ... */
+                        musb->xceiv.state = OTG_STATE_A_HOST;
+                }
+
+                put_unaligned(cpu_to_le32(musb->port1_status
+                                        & ~MUSB_PORT_STAT_RESUME),
+                                (__le32 *) buf);
+
+                /* port change status is more interesting */
+                DBG(get_unaligned((u16 *)(buf+2)) ? 2 : 5, "port status %08x\n",
+                                musb->port1_status);
+                break;
+        case SetPortFeature:
+                if ((wIndex & 0xff) != 1)
+                        goto error;
+
+                switch (wValue) {
+                case USB_PORT_FEAT_POWER:
+                        /* NOTE: this controller has a strange state machine
+                         * that involves "requesting sessions" according to
+                         * magic side effects from incompletely-described
+                         * rules about startup...
+                         *
+                         * This call is what really starts the host mode; be
+                         * very careful about side effects if you reorder any
+                         * initialization logic, e.g. for OTG, or change any
+                         * logic relating to VBUS power-up.
+                         */
+                        if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
+                                musb_start(musb);
+                        break;
+                case USB_PORT_FEAT_RESET:
+                        musb_port_reset(musb, true);
+                        break;
+                case USB_PORT_FEAT_SUSPEND:
+                        musb_port_suspend(musb, true);
+                        break;
+                case USB_PORT_FEAT_TEST:
+                        if (unlikely(is_host_active(musb)))
+                                goto error;
+
+                        wIndex >>= 8;
+                        switch (wIndex) {
+                        case 1:
+                                pr_debug("TEST_J\n");
+                                temp = MUSB_TEST_J;
+                                break;
+                        case 2:
+                                pr_debug("TEST_K\n");
+                                temp = MUSB_TEST_K;
+                                break;
+                        case 3:
+                                pr_debug("TEST_SE0_NAK\n");
+                                temp = MUSB_TEST_SE0_NAK;
+                                break;
+                        case 4:
+                                pr_debug("TEST_PACKET\n");
+                                temp = MUSB_TEST_PACKET;
+                                musb_load_testpacket(musb);
+                                break;
+                        case 5:
+                                pr_debug("TEST_FORCE_ENABLE\n");
+                                temp = MUSB_TEST_FORCE_HOST
+                                        | MUSB_TEST_FORCE_HS;
+
+                                musb_writeb(musb->mregs, MUSB_DEVCTL,
+                                                MUSB_DEVCTL_SESSION);
+                                break;
+                        case 6:
+                                pr_debug("TEST_FIFO_ACCESS\n");
+                                temp = MUSB_TEST_FIFO_ACCESS;
+                                break;
+                        default:
+                                goto error;
+                        }
+                        musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
+                        break;
+                default:
+                        goto error;
+                }
+                DBG(5, "set feature %d\n", wValue);
+                musb->port1_status |= 1 << wValue;
+                break;
+
+        default:
+error:
+                /* "protocol stall" on error */
+                retval = -EPIPE;
+        }
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return retval;
+}
diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c
new file mode 100644
index 000000000000..9ba8fb7fcd24
--- /dev/null
+++ b/drivers/usb/musb/musbhsdma.c
@@ -0,0 +1,433 @@
+/*
+ * MUSB OTG driver - support for Mentor's DMA controller
+ *
+ * Copyright 2005 Mentor Graphics Corporation
+ * Copyright (C) 2005-2007 by Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include "musb_core.h"
+
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
+#include "omap2430.h"
+#endif
+
+#define MUSB_HSDMA_BASE         0x200
+#define MUSB_HSDMA_INTR         (MUSB_HSDMA_BASE + 0)
+#define MUSB_HSDMA_CONTROL              0x4
+#define MUSB_HSDMA_ADDRESS              0x8
+#define MUSB_HSDMA_COUNT                0xc
+
+#define MUSB_HSDMA_CHANNEL_OFFSET(_bChannel, _offset)           \
+                (MUSB_HSDMA_BASE + (_bChannel << 4) + _offset)
+
+/* control register (16-bit): */
+#define MUSB_HSDMA_ENABLE_SHIFT         0
+#define MUSB_HSDMA_TRANSMIT_SHIFT               1
+#define MUSB_HSDMA_MODE1_SHIFT          2
+#define MUSB_HSDMA_IRQENABLE_SHIFT              3
+#define MUSB_HSDMA_ENDPOINT_SHIFT               4
+#define MUSB_HSDMA_BUSERROR_SHIFT               8
+#define MUSB_HSDMA_BURSTMODE_SHIFT              9
+#define MUSB_HSDMA_BURSTMODE            (3 << MUSB_HSDMA_BURSTMODE_SHIFT)
+#define MUSB_HSDMA_BURSTMODE_UNSPEC     0
+#define MUSB_HSDMA_BURSTMODE_INCR4      1
+#define MUSB_HSDMA_BURSTMODE_INCR8      2
+#define MUSB_HSDMA_BURSTMODE_INCR16     3
+
+#define MUSB_HSDMA_CHANNELS             8
+
+struct musb_dma_controller;
+
+struct musb_dma_channel {
+        struct dma_channel              Channel;
+        struct musb_dma_controller      *controller;
+        u32                             dwStartAddress;
+        u32                             len;
+        u16                             wMaxPacketSize;
+        u8                              bIndex;
+        u8                              epnum;
+        u8                              transmit;
+};
+
+struct musb_dma_controller {
+        struct dma_controller           Controller;
+        struct musb_dma_channel         aChannel[MUSB_HSDMA_CHANNELS];
+        void                            *pDmaPrivate;
+        void __iomem                    *pCoreBase;
+        u8                              bChannelCount;
+        u8                              bmUsedChannels;
+        u8                              irq;
+};
+
+static int dma_controller_start(struct dma_controller *c)
+{
+        /* nothing to do */
+        return 0;
+}
+
+static void dma_channel_release(struct dma_channel *pChannel);
+
+static int dma_controller_stop(struct dma_controller *c)
+{
+        struct musb_dma_controller *controller =
+                container_of(c, struct musb_dma_controller, Controller);
+        struct musb *musb = (struct musb *) controller->pDmaPrivate;
+        struct dma_channel *pChannel;
+        u8 bBit;
+
+        if (controller->bmUsedChannels != 0) {
+                dev_err(musb->controller,
+                        "Stopping DMA controller while channel active\n");
+
+                for (bBit = 0; bBit < MUSB_HSDMA_CHANNELS; bBit++) {
+                        if (controller->bmUsedChannels & (1 << bBit)) {
+                                pChannel = &controller->aChannel[bBit].Channel;
+                                dma_channel_release(pChannel);
+
+                                if (!controller->bmUsedChannels)
+                                        break;
+                        }
+                }
+        }
+        return 0;
+}
+
+static struct dma_channel *dma_channel_allocate(struct dma_controller *c,
+                                struct musb_hw_ep *hw_ep, u8 transmit)
+{
+        u8 bBit;
+        struct dma_channel *pChannel = NULL;
+        struct musb_dma_channel *pImplChannel = NULL;
+        struct musb_dma_controller *controller =
+                        container_of(c, struct musb_dma_controller, Controller);
+
+        for (bBit = 0; bBit < MUSB_HSDMA_CHANNELS; bBit++) {
+                if (!(controller->bmUsedChannels & (1 << bBit))) {
+                        controller->bmUsedChannels |= (1 << bBit);
+                        pImplChannel = &(controller->aChannel[bBit]);
+                        pImplChannel->controller = controller;
+                        pImplChannel->bIndex = bBit;
+                        pImplChannel->epnum = hw_ep->epnum;
+                        pImplChannel->transmit = transmit;
+                        pChannel = &(pImplChannel->Channel);
+                        pChannel->private_data = pImplChannel;
+                        pChannel->status = MUSB_DMA_STATUS_FREE;
+                        pChannel->max_len = 0x10000;
+                        /* Tx => mode 1; Rx => mode 0 */
+                        pChannel->desired_mode = transmit;
+                        pChannel->actual_len = 0;
+                        break;
+                }
+        }
+        return pChannel;
+}
+
+static void dma_channel_release(struct dma_channel *pChannel)
+{
+        struct musb_dma_channel *pImplChannel =
+                (struct musb_dma_channel *) pChannel->private_data;
+
+        pChannel->actual_len = 0;
+        pImplChannel->dwStartAddress = 0;
+        pImplChannel->len = 0;
+
+        pImplChannel->controller->bmUsedChannels &=
+                ~(1 << pImplChannel->bIndex);
+
+        pChannel->status = MUSB_DMA_STATUS_UNKNOWN;
+}
+
+static void configure_channel(struct dma_channel *pChannel,
+                                u16 packet_sz, u8 mode,
+                                dma_addr_t dma_addr, u32 len)
+{
+        struct musb_dma_channel *pImplChannel =
+                (struct musb_dma_channel *) pChannel->private_data;
+        struct musb_dma_controller *controller = pImplChannel->controller;
+        void __iomem *mbase = controller->pCoreBase;
+        u8 bChannel = pImplChannel->bIndex;
+        u16 csr = 0;
+
+        DBG(4, "%p, pkt_sz %d, addr 0x%x, len %d, mode %d\n",
+                        pChannel, packet_sz, dma_addr, len, mode);
+
+        if (mode) {
+                csr |= 1 << MUSB_HSDMA_MODE1_SHIFT;
+                BUG_ON(len < packet_sz);
+
+                if (packet_sz >= 64) {
+                        csr |= MUSB_HSDMA_BURSTMODE_INCR16
+                                        << MUSB_HSDMA_BURSTMODE_SHIFT;
+                } else if (packet_sz >= 32) {
+                        csr |= MUSB_HSDMA_BURSTMODE_INCR8
+                                        << MUSB_HSDMA_BURSTMODE_SHIFT;
+                } else if (packet_sz >= 16) {
+                        csr |= MUSB_HSDMA_BURSTMODE_INCR4
+                                        << MUSB_HSDMA_BURSTMODE_SHIFT;
+                }
+        }
+
+        csr |= (pImplChannel->epnum << MUSB_HSDMA_ENDPOINT_SHIFT)
+                | (1 << MUSB_HSDMA_ENABLE_SHIFT)
+                | (1 << MUSB_HSDMA_IRQENABLE_SHIFT)
+                | (pImplChannel->transmit
+                                ? (1 << MUSB_HSDMA_TRANSMIT_SHIFT)
+                                : 0);
+
+        /* address/count */
+        musb_writel(mbase,
+                MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_ADDRESS),
+                dma_addr);
+        musb_writel(mbase,
+                MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_COUNT),
+                len);
+
+        /* control (this should start things) */
+        musb_writew(mbase,
+                MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_CONTROL),
+                csr);
+}
+
+static int dma_channel_program(struct dma_channel *pChannel,
+                                u16 packet_sz, u8 mode,
+                                dma_addr_t dma_addr, u32 len)
+{
+        struct musb_dma_channel *pImplChannel =
+                        (struct musb_dma_channel *) pChannel->private_data;
+
+        DBG(2, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n",
+                pImplChannel->epnum,
+                pImplChannel->transmit ? "Tx" : "Rx",
+                packet_sz, dma_addr, len, mode);
+
+        BUG_ON(pChannel->status == MUSB_DMA_STATUS_UNKNOWN ||
+                pChannel->status == MUSB_DMA_STATUS_BUSY);
+
+        pChannel->actual_len = 0;
+        pImplChannel->dwStartAddress = dma_addr;
+        pImplChannel->len = len;
+        pImplChannel->wMaxPacketSize = packet_sz;
+        pChannel->status = MUSB_DMA_STATUS_BUSY;
+
+        if ((mode == 1) && (len >= packet_sz))
+                configure_channel(pChannel, packet_sz, 1, dma_addr, len);
+        else
+                configure_channel(pChannel, packet_sz, 0, dma_addr, len);
+
+        return true;
+}
+
+static int dma_channel_abort(struct dma_channel *pChannel)
+{
+        struct musb_dma_channel *pImplChannel =
+                (struct musb_dma_channel *) pChannel->private_data;
+        u8 bChannel = pImplChannel->bIndex;
+        void __iomem *mbase = pImplChannel->controller->pCoreBase;
+        u16 csr;
+
+        if (pChannel->status == MUSB_DMA_STATUS_BUSY) {
+                if (pImplChannel->transmit) {
+
+                        csr = musb_readw(mbase,
+                                MUSB_EP_OFFSET(pImplChannel->epnum,
+                                                MUSB_TXCSR));
+                        csr &= ~(MUSB_TXCSR_AUTOSET |
+                                 MUSB_TXCSR_DMAENAB |
+                                 MUSB_TXCSR_DMAMODE);
+                        musb_writew(mbase,
+                                MUSB_EP_OFFSET(pImplChannel->epnum,
+                                                MUSB_TXCSR),
+                                csr);
+                } else {
+                        csr = musb_readw(mbase,
+                                MUSB_EP_OFFSET(pImplChannel->epnum,
+                                                MUSB_RXCSR));
+                        csr &= ~(MUSB_RXCSR_AUTOCLEAR |
+                                 MUSB_RXCSR_DMAENAB |
+                                 MUSB_RXCSR_DMAMODE);
+                        musb_writew(mbase,
+                                MUSB_EP_OFFSET(pImplChannel->epnum,
+                                                MUSB_RXCSR),
+                                csr);
+                }
+
+                musb_writew(mbase,
+                        MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_CONTROL),
+                        0);
+                musb_writel(mbase,
+                        MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_ADDRESS),
+                        0);
+                musb_writel(mbase,
+                        MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_COUNT),
+                        0);
+
+                pChannel->status = MUSB_DMA_STATUS_FREE;
+        }
+        return 0;
+}
+
+static irqreturn_t dma_controller_irq(int irq, void *private_data)
+{
+        struct musb_dma_controller *controller =
+                (struct musb_dma_controller *)private_data;
+        struct musb_dma_channel *pImplChannel;
+        struct musb *musb = controller->pDmaPrivate;
+        void __iomem *mbase = controller->pCoreBase;
+        struct dma_channel *pChannel;
+        u8 bChannel;
+        u16 csr;
+        u32 dwAddress;
+        u8 int_hsdma;
+        irqreturn_t retval = IRQ_NONE;
+        unsigned long flags;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        int_hsdma = musb_readb(mbase, MUSB_HSDMA_INTR);
+        if (!int_hsdma)
+                goto done;
+
+        for (bChannel = 0; bChannel < MUSB_HSDMA_CHANNELS; bChannel++) {
+                if (int_hsdma & (1 << bChannel)) {
+                        pImplChannel = (struct musb_dma_channel *)
+                                        &(controller->aChannel[bChannel]);
+                        pChannel = &pImplChannel->Channel;
+
+                        csr = musb_readw(mbase,
+                                        MUSB_HSDMA_CHANNEL_OFFSET(bChannel,
+                                                        MUSB_HSDMA_CONTROL));
+
+                        if (csr & (1 << MUSB_HSDMA_BUSERROR_SHIFT))
+                                pImplChannel->Channel.status =
+                                        MUSB_DMA_STATUS_BUS_ABORT;
+                        else {
+                                u8 devctl;
+
+                                dwAddress = musb_readl(mbase,
+                                                MUSB_HSDMA_CHANNEL_OFFSET(
+                                                        bChannel,
+                                                        MUSB_HSDMA_ADDRESS));
+                                pChannel->actual_len = dwAddress
+                                        - pImplChannel->dwStartAddress;
+
+                                DBG(2, "ch %p, 0x%x -> 0x%x (%d / %d) %s\n",
+                                        pChannel, pImplChannel->dwStartAddress,
+                                        dwAddress, pChannel->actual_len,
+                                        pImplChannel->len,
+                                        (pChannel->actual_len
+                                                < pImplChannel->len) ?
+                                        "=> reconfig 0" : "=> complete");
+
+                                devctl = musb_readb(mbase, MUSB_DEVCTL);
+
+                                pChannel->status = MUSB_DMA_STATUS_FREE;
+
+                                /* completed */
+                                if ((devctl & MUSB_DEVCTL_HM)
+                                        && (pImplChannel->transmit)
+                                        && ((pChannel->desired_mode == 0)
+                                            || (pChannel->actual_len &
+                                            (pImplChannel->wMaxPacketSize - 1)))
+                                         ) {
+                                        /* Send out the packet */
+                                        musb_ep_select(mbase,
+                                                pImplChannel->epnum);
+                                        musb_writew(mbase, MUSB_EP_OFFSET(
+                                                        pImplChannel->epnum,
+                                                        MUSB_TXCSR),
+                                                MUSB_TXCSR_TXPKTRDY);
+                                } else
+                                        musb_dma_completion(
+                                                musb,
+                                                pImplChannel->epnum,
+                                                pImplChannel->transmit);
+                        }
+                }
+        }
+        retval = IRQ_HANDLED;
+done:
+        spin_unlock_irqrestore(&musb->lock, flags);
+        return retval;
+}
+
+void dma_controller_destroy(struct dma_controller *c)
+{
+        struct musb_dma_controller *controller;
+
+        controller = container_of(c, struct musb_dma_controller, Controller);
+        if (!controller)
+                return;
+
+        if (controller->irq)
+                free_irq(controller->irq, c);
+
+        kfree(controller);
+}
+
+struct dma_controller *__init
+dma_controller_create(struct musb *musb, void __iomem *pCoreBase)
+{
+        struct musb_dma_controller *controller;
+        struct device *dev = musb->controller;
+        struct platform_device *pdev = to_platform_device(dev);
+        int irq = platform_get_irq(pdev, 1);
+
+        if (irq == 0) {
+                dev_err(dev, "No DMA interrupt line!\n");
+                return NULL;
+        }
+
+        controller = kzalloc(sizeof(struct musb_dma_controller), GFP_KERNEL);
+        if (!controller)
+                return NULL;
+
+        controller->bChannelCount = MUSB_HSDMA_CHANNELS;
+        controller->pDmaPrivate = musb;
+        controller->pCoreBase = pCoreBase;
+
+        controller->Controller.start = dma_controller_start;
+        controller->Controller.stop = dma_controller_stop;
+        controller->Controller.channel_alloc = dma_channel_allocate;
+        controller->Controller.channel_release = dma_channel_release;
+        controller->Controller.channel_program = dma_channel_program;
+        controller->Controller.channel_abort = dma_channel_abort;
+
+        if (request_irq(irq, dma_controller_irq, IRQF_DISABLED,
+                        musb->controller->bus_id, &controller->Controller)) {
+                dev_err(dev, "request_irq %d failed!\n", irq);
+                dma_controller_destroy(&controller->Controller);
+                return NULL;
+        }
+
+        controller->irq = irq;
+
+        return &controller->Controller;
+}
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
new file mode 100644
index 000000000000..298b22e6ad0d
--- /dev/null
+++ b/drivers/usb/musb/omap2430.c
@@ -0,0 +1,324 @@
+/*
+ * Copyright (C) 2005-2007 by Texas Instruments
+ * Some code has been taken from tusb6010.c
+ * Copyrights for that are attributable to:
+ * Copyright (C) 2006 Nokia Corporation
+ * Jarkko Nikula <jarkko.nikula@nokia.com>
+ * Tony Lindgren <tony@atomide.com>
+ *
+ * This file is part of the Inventra Controller Driver for Linux.
+ *
+ * The Inventra Controller Driver for Linux is free software; you
+ * can redistribute it and/or modify it under the terms of the GNU
+ * General Public License version 2 as published by the Free Software
+ * Foundation.
+ *
+ * The Inventra Controller Driver for Linux is distributed in
+ * the hope that it will be useful, but WITHOUT ANY WARRANTY;
+ * without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+ * License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with The Inventra Controller Driver for Linux ; if not,
+ * write to the Free Software Foundation, Inc., 59 Temple Place,
+ * Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <asm/mach-types.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/mux.h>
+
+#include "musb_core.h"
+#include "omap2430.h"
+
+#ifdef CONFIG_ARCH_OMAP3430
+#define get_cpu_rev()   2
+#endif
+
+#define MUSB_TIMEOUT_A_WAIT_BCON        1100
+
+static struct timer_list musb_idle_timer;
+
+static void musb_do_idle(unsigned long _musb)
+{
+        struct musb     *musb = (void *)_musb;
+        unsigned long   flags;
+        u8      power;
+        u8      devctl;
+
+        devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        switch (musb->xceiv.state) {
+        case OTG_STATE_A_WAIT_BCON:
+                devctl &= ~MUSB_DEVCTL_SESSION;
+                musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
+
+                devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+                if (devctl & MUSB_DEVCTL_BDEVICE) {
+                        musb->xceiv.state = OTG_STATE_B_IDLE;
+                        MUSB_DEV_MODE(musb);
+                } else {
+                        musb->xceiv.state = OTG_STATE_A_IDLE;
+                        MUSB_HST_MODE(musb);
+                }
+                break;
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        case OTG_STATE_A_SUSPEND:
+                /* finish RESUME signaling? */
+                if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
+                        power = musb_readb(musb->mregs, MUSB_POWER);
+                        power &= ~MUSB_POWER_RESUME;
+                        DBG(1, "root port resume stopped, power %02x\n", power);
+                        musb_writeb(musb->mregs, MUSB_POWER, power);
+                        musb->is_active = 1;
+                        musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
+                                                | MUSB_PORT_STAT_RESUME);
+                        musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
+                        usb_hcd_poll_rh_status(musb_to_hcd(musb));
+                        /* NOTE: it might really be A_WAIT_BCON ... */
+                        musb->xceiv.state = OTG_STATE_A_HOST;
+                }
+                break;
+#endif
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        case OTG_STATE_A_HOST:
+                devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+                if (devctl &  MUSB_DEVCTL_BDEVICE)
+                        musb->xceiv.state = OTG_STATE_B_IDLE;
+                else
+                        musb->xceiv.state = OTG_STATE_A_WAIT_BCON;
+#endif
+        default:
+                break;
+        }
+        spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+
+void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
+{
+        unsigned long           default_timeout = jiffies + msecs_to_jiffies(3);
+        static unsigned long    last_timer;
+
+        if (timeout == 0)
+                timeout = default_timeout;
+
+        /* Never idle if active, or when VBUS timeout is not set as host */
+        if (musb->is_active || ((musb->a_wait_bcon == 0)
+                        && (musb->xceiv.state == OTG_STATE_A_WAIT_BCON))) {
+                DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
+                del_timer(&musb_idle_timer);
+                last_timer = jiffies;
+                return;
+        }
+
+        if (time_after(last_timer, timeout)) {
+                if (!timer_pending(&musb_idle_timer))
+                        last_timer = timeout;
+                else {
+                        DBG(4, "Longer idle timer already pending, ignoring\n");
+                        return;
+                }
+        }
+        last_timer = timeout;
+
+        DBG(4, "%s inactive, for idle timer for %lu ms\n",
+                otg_state_string(musb),
+                (unsigned long)jiffies_to_msecs(timeout - jiffies));
+        mod_timer(&musb_idle_timer, timeout);
+}
+
+void musb_platform_enable(struct musb *musb)
+{
+}
+void musb_platform_disable(struct musb *musb)
+{
+}
+static void omap_vbus_power(struct musb *musb, int is_on, int sleeping)
+{
+}
+
+static void omap_set_vbus(struct musb *musb, int is_on)
+{
+        u8              devctl;
+        /* HDRC controls CPEN, but beware current surges during device
+         * connect.  They can trigger transient overcurrent conditions
+         * that must be ignored.
+         */
+
+        devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+
+        if (is_on) {
+                musb->is_active = 1;
+                musb->xceiv.default_a = 1;
+                musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
+                devctl |= MUSB_DEVCTL_SESSION;
+
+                MUSB_HST_MODE(musb);
+        } else {
+                musb->is_active = 0;
+
+                /* NOTE:  we're skipping A_WAIT_VFALL -> A_IDLE and
+                 * jumping right to B_IDLE...
+                 */
+
+                musb->xceiv.default_a = 0;
+                musb->xceiv.state = OTG_STATE_B_IDLE;
+                devctl &= ~MUSB_DEVCTL_SESSION;
+
+                MUSB_DEV_MODE(musb);
+        }
+        musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
+
+        DBG(1, "VBUS %s, devctl %02x "
+                /* otg %3x conf %08x prcm %08x */ "\n",
+                otg_state_string(musb),
+                musb_readb(musb->mregs, MUSB_DEVCTL));
+}
+static int omap_set_power(struct otg_transceiver *x, unsigned mA)
+{
+        return 0;
+}
+
+static int musb_platform_resume(struct musb *musb);
+
+void musb_platform_set_mode(struct musb *musb, u8 musb_mode)
+{
+        u8      devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+
+        devctl |= MUSB_DEVCTL_SESSION;
+        musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
+
+        switch (musb_mode) {
+        case MUSB_HOST:
+                otg_set_host(&musb->xceiv, musb->xceiv.host);
+                break;
+        case MUSB_PERIPHERAL:
+                otg_set_peripheral(&musb->xceiv, musb->xceiv.gadget);
+                break;
+        case MUSB_OTG:
+                break;
+        }
+}
+
+int __init musb_platform_init(struct musb *musb)
+{
+        u32 l;
+
+#if defined(CONFIG_ARCH_OMAP2430)
+        omap_cfg_reg(AE5_2430_USB0HS_STP);
+#endif
+
+        musb_platform_resume(musb);
+
+        l = omap_readl(OTG_SYSCONFIG);
+        l &= ~ENABLEWAKEUP;     /* disable wakeup */
+        l &= ~NOSTDBY;          /* remove possible nostdby */
+        l |= SMARTSTDBY;        /* enable smart standby */
+        l &= ~AUTOIDLE;         /* disable auto idle */
+        l &= ~NOIDLE;           /* remove possible noidle */
+        l |= SMARTIDLE;         /* enable smart idle */
+        l |= AUTOIDLE;          /* enable auto idle */
+        omap_writel(l, OTG_SYSCONFIG);
+
+        l = omap_readl(OTG_INTERFSEL);
+        l |= ULPI_12PIN;
+        omap_writel(l, OTG_INTERFSEL);
+
+        pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
+                        "sysstatus 0x%x, intrfsel 0x%x, simenable  0x%x\n",
+                        omap_readl(OTG_REVISION), omap_readl(OTG_SYSCONFIG),
+                        omap_readl(OTG_SYSSTATUS), omap_readl(OTG_INTERFSEL),
+                        omap_readl(OTG_SIMENABLE));
+
+        omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
+
+        if (is_host_enabled(musb))
+                musb->board_set_vbus = omap_set_vbus;
+        if (is_peripheral_enabled(musb))
+                musb->xceiv.set_power = omap_set_power;
+        musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON;
+
+        setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
+
+        return 0;
+}
+
+int musb_platform_suspend(struct musb *musb)
+{
+        u32 l;
+
+        if (!musb->clock)
+                return 0;
+
+        /* in any role */
+        l = omap_readl(OTG_FORCESTDBY);
+        l |= ENABLEFORCE;       /* enable MSTANDBY */
+        omap_writel(l, OTG_FORCESTDBY);
+
+        l = omap_readl(OTG_SYSCONFIG);
+        l |= ENABLEWAKEUP;      /* enable wakeup */
+        omap_writel(l, OTG_SYSCONFIG);
+
+        if (musb->xceiv.set_suspend)
+                musb->xceiv.set_suspend(&musb->xceiv, 1);
+
+        if (musb->set_clock)
+                musb->set_clock(musb->clock, 0);
+        else
+                clk_disable(musb->clock);
+
+        return 0;
+}
+
+static int musb_platform_resume(struct musb *musb)
+{
+        u32 l;
+
+        if (!musb->clock)
+                return 0;
+
+        if (musb->xceiv.set_suspend)
+                musb->xceiv.set_suspend(&musb->xceiv, 0);
+
+        if (musb->set_clock)
+                musb->set_clock(musb->clock, 1);
+        else
+                clk_enable(musb->clock);
+
+        l = omap_readl(OTG_SYSCONFIG);
+        l &= ~ENABLEWAKEUP;     /* disable wakeup */
+        omap_writel(l, OTG_SYSCONFIG);
+
+        l = omap_readl(OTG_FORCESTDBY);
+        l &= ~ENABLEFORCE;      /* disable MSTANDBY */
+        omap_writel(l, OTG_FORCESTDBY);
+
+        return 0;
+}
+
+
+int musb_platform_exit(struct musb *musb)
+{
+
+        omap_vbus_power(musb, 0 /*off*/, 1);
+
+        musb_platform_suspend(musb);
+
+        clk_put(musb->clock);
+        musb->clock = 0;
+
+        return 0;
+}
diff --git a/drivers/usb/musb/omap2430.h b/drivers/usb/musb/omap2430.h
new file mode 100644
index 000000000000..786a62071f72
--- /dev/null
+++ b/drivers/usb/musb/omap2430.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2005-2006 by Texas Instruments
+ *
+ * The Inventra Controller Driver for Linux is free software; you
+ * can redistribute it and/or modify it under the terms of the GNU
+ * General Public License version 2 as published by the Free Software
+ * Foundation.
+ */
+
+#ifndef __MUSB_OMAP243X_H__
+#define __MUSB_OMAP243X_H__
+
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
+#include <asm/arch/hardware.h>
+#include <asm/arch/usb.h>
+
+/*
+ * OMAP2430-specific definitions
+ */
+
+#define MENTOR_BASE_OFFSET      0
+#if     defined(CONFIG_ARCH_OMAP2430)
+#define OMAP_HSOTG_BASE         (OMAP243X_HS_BASE)
+#elif   defined(CONFIG_ARCH_OMAP3430)
+#define OMAP_HSOTG_BASE         (OMAP34XX_HSUSB_OTG_BASE)
+#endif
+#define OMAP_HSOTG(offset)      (OMAP_HSOTG_BASE + 0x400 + (offset))
+#define OTG_REVISION            OMAP_HSOTG(0x0)
+#define OTG_SYSCONFIG           OMAP_HSOTG(0x4)
+#       define  MIDLEMODE       12      /* bit position */
+#       define  FORCESTDBY              (0 << MIDLEMODE)
+#       define  NOSTDBY                 (1 << MIDLEMODE)
+#       define  SMARTSTDBY              (2 << MIDLEMODE)
+#       define  SIDLEMODE               3       /* bit position */
+#       define  FORCEIDLE               (0 << SIDLEMODE)
+#       define  NOIDLE                  (1 << SIDLEMODE)
+#       define  SMARTIDLE               (2 << SIDLEMODE)
+#       define  ENABLEWAKEUP            (1 << 2)
+#       define  SOFTRST                 (1 << 1)
+#       define  AUTOIDLE                (1 << 0)
+#define OTG_SYSSTATUS           OMAP_HSOTG(0x8)
+#       define  RESETDONE               (1 << 0)
+#define OTG_INTERFSEL           OMAP_HSOTG(0xc)
+#       define  EXTCP                   (1 << 2)
+#       define  PHYSEL          0       /* bit position */
+#       define  UTMI_8BIT               (0 << PHYSEL)
+#       define  ULPI_12PIN              (1 << PHYSEL)
+#       define  ULPI_8PIN               (2 << PHYSEL)
+#define OTG_SIMENABLE           OMAP_HSOTG(0x10)
+#       define  TM1                     (1 << 0)
+#define OTG_FORCESTDBY          OMAP_HSOTG(0x14)
+#       define  ENABLEFORCE             (1 << 0)
+
+#endif  /* CONFIG_ARCH_OMAP2430 */
+
+#endif  /* __MUSB_OMAP243X_H__ */
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
new file mode 100644
index 000000000000..b73b036f3d77
--- /dev/null
+++ b/drivers/usb/musb/tusb6010.c
@@ -0,0 +1,1151 @@
+/*
+ * TUSB6010 USB 2.0 OTG Dual Role controller
+ *
+ * Copyright (C) 2006 Nokia Corporation
+ * Jarkko Nikula <jarkko.nikula@nokia.com>
+ * Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Notes:
+ * - Driver assumes that interface to external host (main CPU) is
+ *   configured for NOR FLASH interface instead of VLYNQ serial
+ *   interface.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/usb.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+
+#include "musb_core.h"
+
+static void tusb_source_power(struct musb *musb, int is_on);
+
+#define TUSB_REV_MAJOR(reg_val)         ((reg_val >> 4) & 0xf)
+#define TUSB_REV_MINOR(reg_val)         (reg_val & 0xf)
+
+/*
+ * Checks the revision. We need to use the DMA register as 3.0 does not
+ * have correct versions for TUSB_PRCM_REV or TUSB_INT_CTRL_REV.
+ */
+u8 tusb_get_revision(struct musb *musb)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        u32             die_id;
+        u8              rev;
+
+        rev = musb_readl(tbase, TUSB_DMA_CTRL_REV) & 0xff;
+        if (TUSB_REV_MAJOR(rev) == 3) {
+                die_id = TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase,
+                                TUSB_DIDR1_HI));
+                if (die_id >= TUSB_DIDR1_HI_REV_31)
+                        rev |= 1;
+        }
+
+        return rev;
+}
+
+static int __init tusb_print_revision(struct musb *musb)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        u8              rev;
+
+        rev = tusb_get_revision(musb);
+
+        pr_info("tusb: %s%i.%i %s%i.%i %s%i.%i %s%i.%i %s%i %s%i.%i\n",
+                "prcm",
+                TUSB_REV_MAJOR(musb_readl(tbase, TUSB_PRCM_REV)),
+                TUSB_REV_MINOR(musb_readl(tbase, TUSB_PRCM_REV)),
+                "int",
+                TUSB_REV_MAJOR(musb_readl(tbase, TUSB_INT_CTRL_REV)),
+                TUSB_REV_MINOR(musb_readl(tbase, TUSB_INT_CTRL_REV)),
+                "gpio",
+                TUSB_REV_MAJOR(musb_readl(tbase, TUSB_GPIO_REV)),
+                TUSB_REV_MINOR(musb_readl(tbase, TUSB_GPIO_REV)),
+                "dma",
+                TUSB_REV_MAJOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)),
+                TUSB_REV_MINOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)),
+                "dieid",
+                TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase, TUSB_DIDR1_HI)),
+                "rev",
+                TUSB_REV_MAJOR(rev), TUSB_REV_MINOR(rev));
+
+        return tusb_get_revision(musb);
+}
+
+#define WBUS_QUIRK_MASK (TUSB_PHY_OTG_CTRL_TESTM2 | TUSB_PHY_OTG_CTRL_TESTM1 \
+                                | TUSB_PHY_OTG_CTRL_TESTM0)
+
+/*
+ * Workaround for spontaneous WBUS wake-up issue #2 for tusb3.0.
+ * Disables power detection in PHY for the duration of idle.
+ */
+static void tusb_wbus_quirk(struct musb *musb, int enabled)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        static u32      phy_otg_ctrl, phy_otg_ena;
+        u32             tmp;
+
+        if (enabled) {
+                phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
+                phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
+                tmp = TUSB_PHY_OTG_CTRL_WRPROTECT
+                                | phy_otg_ena | WBUS_QUIRK_MASK;
+                musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp);
+                tmp = phy_otg_ena & ~WBUS_QUIRK_MASK;
+                tmp |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_TESTM2;
+                musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp);
+                DBG(2, "Enabled tusb wbus quirk ctrl %08x ena %08x\n",
+                        musb_readl(tbase, TUSB_PHY_OTG_CTRL),
+                        musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
+        } else if (musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)
+                                        & TUSB_PHY_OTG_CTRL_TESTM2) {
+                tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ctrl;
+                musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp);
+                tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ena;
+                musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp);
+                DBG(2, "Disabled tusb wbus quirk ctrl %08x ena %08x\n",
+                        musb_readl(tbase, TUSB_PHY_OTG_CTRL),
+                        musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
+                phy_otg_ctrl = 0;
+                phy_otg_ena = 0;
+        }
+}
+
+/*
+ * TUSB 6010 may use a parallel bus that doesn't support byte ops;
+ * so both loading and unloading FIFOs need explicit byte counts.
+ */
+
+static inline void
+tusb_fifo_write_unaligned(void __iomem *fifo, const u8 *buf, u16 len)
+{
+        u32             val;
+        int             i;
+
+        if (len > 4) {
+                for (i = 0; i < (len >> 2); i++) {
+                        memcpy(&val, buf, 4);
+                        musb_writel(fifo, 0, val);
+                        buf += 4;
+                }
+                len %= 4;
+        }
+        if (len > 0) {
+                /* Write the rest 1 - 3 bytes to FIFO */
+                memcpy(&val, buf, len);
+                musb_writel(fifo, 0, val);
+        }
+}
+
+static inline void tusb_fifo_read_unaligned(void __iomem *fifo,
+                                                void __iomem *buf, u16 len)
+{
+        u32             val;
+        int             i;
+
+        if (len > 4) {
+                for (i = 0; i < (len >> 2); i++) {
+                        val = musb_readl(fifo, 0);
+                        memcpy(buf, &val, 4);
+                        buf += 4;
+                }
+                len %= 4;
+        }
+        if (len > 0) {
+                /* Read the rest 1 - 3 bytes from FIFO */
+                val = musb_readl(fifo, 0);
+                memcpy(buf, &val, len);
+        }
+}
+
+void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf)
+{
+        void __iomem    *ep_conf = hw_ep->conf;
+        void __iomem    *fifo = hw_ep->fifo;
+        u8              epnum = hw_ep->epnum;
+
+        prefetch(buf);
+
+        DBG(4, "%cX ep%d fifo %p count %d buf %p\n",
+                        'T', epnum, fifo, len, buf);
+
+        if (epnum)
+                musb_writel(ep_conf, TUSB_EP_TX_OFFSET,
+                        TUSB_EP_CONFIG_XFR_SIZE(len));
+        else
+                musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_DIR_TX |
+                        TUSB_EP0_CONFIG_XFR_SIZE(len));
+
+        if (likely((0x01 & (unsigned long) buf) == 0)) {
+
+                /* Best case is 32bit-aligned destination address */
+                if ((0x02 & (unsigned long) buf) == 0) {
+                        if (len >= 4) {
+                                writesl(fifo, buf, len >> 2);
+                                buf += (len & ~0x03);
+                                len &= 0x03;
+                        }
+                } else {
+                        if (len >= 2) {
+                                u32 val;
+                                int i;
+
+                                /* Cannot use writesw, fifo is 32-bit */
+                                for (i = 0; i < (len >> 2); i++) {
+                                        val = (u32)(*(u16 *)buf);
+                                        buf += 2;
+                                        val |= (*(u16 *)buf) << 16;
+                                        buf += 2;
+                                        musb_writel(fifo, 0, val);
+                                }
+                                len &= 0x03;
+                        }
+                }
+        }
+
+        if (len > 0)
+                tusb_fifo_write_unaligned(fifo, buf, len);
+}
+
+void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf)
+{
+        void __iomem    *ep_conf = hw_ep->conf;
+        void __iomem    *fifo = hw_ep->fifo;
+        u8              epnum = hw_ep->epnum;
+
+        DBG(4, "%cX ep%d fifo %p count %d buf %p\n",
+                        'R', epnum, fifo, len, buf);
+
+        if (epnum)
+                musb_writel(ep_conf, TUSB_EP_RX_OFFSET,
+                        TUSB_EP_CONFIG_XFR_SIZE(len));
+        else
+                musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_XFR_SIZE(len));
+
+        if (likely((0x01 & (unsigned long) buf) == 0)) {
+
+                /* Best case is 32bit-aligned destination address */
+                if ((0x02 & (unsigned long) buf) == 0) {
+                        if (len >= 4) {
+                                readsl(fifo, buf, len >> 2);
+                                buf += (len & ~0x03);
+                                len &= 0x03;
+                        }
+                } else {
+                        if (len >= 2) {
+                                u32 val;
+                                int i;
+
+                                /* Cannot use readsw, fifo is 32-bit */
+                                for (i = 0; i < (len >> 2); i++) {
+                                        val = musb_readl(fifo, 0);
+                                        *(u16 *)buf = (u16)(val & 0xffff);
+                                        buf += 2;
+                                        *(u16 *)buf = (u16)(val >> 16);
+                                        buf += 2;
+                                }
+                                len &= 0x03;
+                        }
+                }
+        }
+
+        if (len > 0)
+                tusb_fifo_read_unaligned(fifo, buf, len);
+}
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+
+/* This is used by gadget drivers, and OTG transceiver logic, allowing
+ * at most mA current to be drawn from VBUS during a Default-B session
+ * (that is, while VBUS exceeds 4.4V).  In Default-A (including pure host
+ * mode), or low power Default-B sessions, something else supplies power.
+ * Caller must take care of locking.
+ */
+static int tusb_draw_power(struct otg_transceiver *x, unsigned mA)
+{
+        struct musb     *musb = container_of(x, struct musb, xceiv);
+        void __iomem    *tbase = musb->ctrl_base;
+        u32             reg;
+
+        /*
+         * Keep clock active when enabled. Note that this is not tied to
+         * drawing VBUS, as with OTG mA can be less than musb->min_power.
+         */
+        if (musb->set_clock) {
+                if (mA)
+                        musb->set_clock(musb->clock, 1);
+                else
+                        musb->set_clock(musb->clock, 0);
+        }
+
+        /* tps65030 seems to consume max 100mA, with maybe 60mA available
+         * (measured on one board) for things other than tps and tusb.
+         *
+         * Boards sharing the CPU clock with CLKIN will need to prevent
+         * certain idle sleep states while the USB link is active.
+         *
+         * REVISIT we could use VBUS to supply only _one_ of { 1.5V, 3.3V }.
+         * The actual current usage would be very board-specific.  For now,
+         * it's simpler to just use an aggregate (also board-specific).
+         */
+        if (x->default_a || mA < (musb->min_power << 1))
+                mA = 0;
+
+        reg = musb_readl(tbase, TUSB_PRCM_MNGMT);
+        if (mA) {
+                musb->is_bus_powered = 1;
+                reg |= TUSB_PRCM_MNGMT_15_SW_EN | TUSB_PRCM_MNGMT_33_SW_EN;
+        } else {
+                musb->is_bus_powered = 0;
+                reg &= ~(TUSB_PRCM_MNGMT_15_SW_EN | TUSB_PRCM_MNGMT_33_SW_EN);
+        }
+        musb_writel(tbase, TUSB_PRCM_MNGMT, reg);
+
+        DBG(2, "draw max %d mA VBUS\n", mA);
+        return 0;
+}
+
+#else
+#define tusb_draw_power NULL
+#endif
+
+/* workaround for issue 13:  change clock during chip idle
+ * (to be fixed in rev3 silicon) ... symptoms include disconnect
+ * or looping suspend/resume cycles
+ */
+static void tusb_set_clock_source(struct musb *musb, unsigned mode)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        u32             reg;
+
+        reg = musb_readl(tbase, TUSB_PRCM_CONF);
+        reg &= ~TUSB_PRCM_CONF_SYS_CLKSEL(0x3);
+
+        /* 0 = refclk (clkin, XI)
+         * 1 = PHY 60 MHz (internal PLL)
+         * 2 = not supported
+         * 3 = what?
+         */
+        if (mode > 0)
+                reg |= TUSB_PRCM_CONF_SYS_CLKSEL(mode & 0x3);
+
+        musb_writel(tbase, TUSB_PRCM_CONF, reg);
+
+        /* FIXME tusb6010_platform_retime(mode == 0); */
+}
+
+/*
+ * Idle TUSB6010 until next wake-up event; NOR access always wakes.
+ * Other code ensures that we idle unless we're connected _and_ the
+ * USB link is not suspended ... and tells us the relevant wakeup
+ * events.  SW_EN for voltage is handled separately.
+ */
+void tusb_allow_idle(struct musb *musb, u32 wakeup_enables)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        u32             reg;
+
+        if ((wakeup_enables & TUSB_PRCM_WBUS)
+                        && (tusb_get_revision(musb) == TUSB_REV_30))
+                tusb_wbus_quirk(musb, 1);
+
+        tusb_set_clock_source(musb, 0);
+
+        wakeup_enables |= TUSB_PRCM_WNORCS;
+        musb_writel(tbase, TUSB_PRCM_WAKEUP_MASK, ~wakeup_enables);
+
+        /* REVISIT writeup of WID implies that if WID set and ID is grounded,
+         * TUSB_PHY_OTG_CTRL.TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP must be cleared.
+         * Presumably that's mostly to save power, hence WID is immaterial ...
+         */
+
+        reg = musb_readl(tbase, TUSB_PRCM_MNGMT);
+        /* issue 4: when driving vbus, use hipower (vbus_det) comparator */
+        if (is_host_active(musb)) {
+                reg |= TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN;
+                reg &= ~TUSB_PRCM_MNGMT_OTG_SESS_END_EN;
+        } else {
+                reg |= TUSB_PRCM_MNGMT_OTG_SESS_END_EN;
+                reg &= ~TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN;
+        }
+        reg |= TUSB_PRCM_MNGMT_PM_IDLE | TUSB_PRCM_MNGMT_DEV_IDLE;
+        musb_writel(tbase, TUSB_PRCM_MNGMT, reg);
+
+        DBG(6, "idle, wake on %02x\n", wakeup_enables);
+}
+
+/*
+ * Updates cable VBUS status. Caller must take care of locking.
+ */
+int musb_platform_get_vbus_status(struct musb *musb)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        u32             otg_stat, prcm_mngmt;
+        int             ret = 0;
+
+        otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
+        prcm_mngmt = musb_readl(tbase, TUSB_PRCM_MNGMT);
+
+        /* Temporarily enable VBUS detection if it was disabled for
+         * suspend mode. Unless it's enabled otg_stat and devctl will
+         * not show correct VBUS state.
+         */
+        if (!(prcm_mngmt & TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN)) {
+                u32 tmp = prcm_mngmt;
+                tmp |= TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN;
+                musb_writel(tbase, TUSB_PRCM_MNGMT, tmp);
+                otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
+                musb_writel(tbase, TUSB_PRCM_MNGMT, prcm_mngmt);
+        }
+
+        if (otg_stat & TUSB_DEV_OTG_STAT_VBUS_VALID)
+                ret = 1;
+
+        return ret;
+}
+
+static struct timer_list musb_idle_timer;
+
+static void musb_do_idle(unsigned long _musb)
+{
+        struct musb     *musb = (void *)_musb;
+        unsigned long   flags;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        switch (musb->xceiv.state) {
+        case OTG_STATE_A_WAIT_BCON:
+                if ((musb->a_wait_bcon != 0)
+                        && (musb->idle_timeout == 0
+                                || time_after(jiffies, musb->idle_timeout))) {
+                        DBG(4, "Nothing connected %s, turning off VBUS\n",
+                                        otg_state_string(musb));
+                }
+                /* FALLTHROUGH */
+        case OTG_STATE_A_IDLE:
+                tusb_source_power(musb, 0);
+        default:
+                break;
+        }
+
+        if (!musb->is_active) {
+                u32     wakeups;
+
+                /* wait until khubd handles port change status */
+                if (is_host_active(musb) && (musb->port1_status >> 16))
+                        goto done;
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+                if (is_peripheral_enabled(musb) && !musb->gadget_driver)
+                        wakeups = 0;
+                else {
+                        wakeups = TUSB_PRCM_WHOSTDISCON
+                                        | TUSB_PRCM_WBUS
+                                        | TUSB_PRCM_WVBUS;
+                        if (is_otg_enabled(musb))
+                                wakeups |= TUSB_PRCM_WID;
+                }
+#else
+                wakeups = TUSB_PRCM_WHOSTDISCON | TUSB_PRCM_WBUS;
+#endif
+                tusb_allow_idle(musb, wakeups);
+        }
+done:
+        spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+/*
+ * Maybe put TUSB6010 into idle mode mode depending on USB link status,
+ * like "disconnected" or "suspended".  We'll be woken out of it by
+ * connect, resume, or disconnect.
+ *
+ * Needs to be called as the last function everywhere where there is
+ * register access to TUSB6010 because of NOR flash wake-up.
+ * Caller should own controller spinlock.
+ *
+ * Delay because peripheral enables D+ pullup 3msec after SE0, and
+ * we don't want to treat that full speed J as a wakeup event.
+ * ... peripherals must draw only suspend current after 10 msec.
+ */
+void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
+{
+        unsigned long           default_timeout = jiffies + msecs_to_jiffies(3);
+        static unsigned long    last_timer;
+
+        if (timeout == 0)
+                timeout = default_timeout;
+
+        /* Never idle if active, or when VBUS timeout is not set as host */
+        if (musb->is_active || ((musb->a_wait_bcon == 0)
+                        && (musb->xceiv.state == OTG_STATE_A_WAIT_BCON))) {
+                DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
+                del_timer(&musb_idle_timer);
+                last_timer = jiffies;
+                return;
+        }
+
+        if (time_after(last_timer, timeout)) {
+                if (!timer_pending(&musb_idle_timer))
+                        last_timer = timeout;
+                else {
+                        DBG(4, "Longer idle timer already pending, ignoring\n");
+                        return;
+                }
+        }
+        last_timer = timeout;
+
+        DBG(4, "%s inactive, for idle timer for %lu ms\n",
+                otg_state_string(musb),
+                (unsigned long)jiffies_to_msecs(timeout - jiffies));
+        mod_timer(&musb_idle_timer, timeout);
+}
+
+/* ticks of 60 MHz clock */
+#define DEVCLOCK                60000000
+#define OTG_TIMER_MS(msecs)     ((msecs) \
+                ? (TUSB_DEV_OTG_TIMER_VAL((DEVCLOCK/1000)*(msecs)) \
+                                | TUSB_DEV_OTG_TIMER_ENABLE) \
+                : 0)
+
+static void tusb_source_power(struct musb *musb, int is_on)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        u32             conf, prcm, timer;
+        u8              devctl;
+
+        /* HDRC controls CPEN, but beware current surges during device
+         * connect.  They can trigger transient overcurrent conditions
+         * that must be ignored.
+         */
+
+        prcm = musb_readl(tbase, TUSB_PRCM_MNGMT);
+        conf = musb_readl(tbase, TUSB_DEV_CONF);
+        devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+
+        if (is_on) {
+                if (musb->set_clock)
+                        musb->set_clock(musb->clock, 1);
+                timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE);
+                musb->xceiv.default_a = 1;
+                musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
+                devctl |= MUSB_DEVCTL_SESSION;
+
+                conf |= TUSB_DEV_CONF_USB_HOST_MODE;
+                MUSB_HST_MODE(musb);
+        } else {
+                u32     otg_stat;
+
+                timer = 0;
+
+                /* If ID pin is grounded, we want to be a_idle */
+                otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
+                if (!(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
+                        switch (musb->xceiv.state) {
+                        case OTG_STATE_A_WAIT_VRISE:
+                        case OTG_STATE_A_WAIT_BCON:
+                                musb->xceiv.state = OTG_STATE_A_WAIT_VFALL;
+                                break;
+                        case OTG_STATE_A_WAIT_VFALL:
+                                musb->xceiv.state = OTG_STATE_A_IDLE;
+                                break;
+                        default:
+                                musb->xceiv.state = OTG_STATE_A_IDLE;
+                        }
+                        musb->is_active = 0;
+                        musb->xceiv.default_a = 1;
+                        MUSB_HST_MODE(musb);
+                } else {
+                        musb->is_active = 0;
+                        musb->xceiv.default_a = 0;
+                        musb->xceiv.state = OTG_STATE_B_IDLE;
+                        MUSB_DEV_MODE(musb);
+                }
+
+                devctl &= ~MUSB_DEVCTL_SESSION;
+                conf &= ~TUSB_DEV_CONF_USB_HOST_MODE;
+                if (musb->set_clock)
+                        musb->set_clock(musb->clock, 0);
+        }
+        prcm &= ~(TUSB_PRCM_MNGMT_15_SW_EN | TUSB_PRCM_MNGMT_33_SW_EN);
+
+        musb_writel(tbase, TUSB_PRCM_MNGMT, prcm);
+        musb_writel(tbase, TUSB_DEV_OTG_TIMER, timer);
+        musb_writel(tbase, TUSB_DEV_CONF, conf);
+        musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
+
+        DBG(1, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n",
+                otg_state_string(musb),
+                musb_readb(musb->mregs, MUSB_DEVCTL),
+                musb_readl(tbase, TUSB_DEV_OTG_STAT),
+                conf, prcm);
+}
+
+/*
+ * Sets the mode to OTG, peripheral or host by changing the ID detection.
+ * Caller must take care of locking.
+ *
+ * Note that if a mini-A cable is plugged in the ID line will stay down as
+ * the weak ID pull-up is not able to pull the ID up.
+ *
+ * REVISIT: It would be possible to add support for changing between host
+ * and peripheral modes in non-OTG configurations by reconfiguring hardware
+ * and then setting musb->board_mode. For now, only support OTG mode.
+ */
+void musb_platform_set_mode(struct musb *musb, u8 musb_mode)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        u32             otg_stat, phy_otg_ctrl, phy_otg_ena, dev_conf;
+
+        if (musb->board_mode != MUSB_OTG) {
+                ERR("Changing mode currently only supported in OTG mode\n");
+                return;
+        }
+
+        otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
+        phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
+        phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
+        dev_conf = musb_readl(tbase, TUSB_DEV_CONF);
+
+        switch (musb_mode) {
+
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+        case MUSB_HOST:         /* Disable PHY ID detect, ground ID */
+                phy_otg_ctrl &= ~TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
+                phy_otg_ena |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
+                dev_conf |= TUSB_DEV_CONF_ID_SEL;
+                dev_conf &= ~TUSB_DEV_CONF_SOFT_ID;
+                break;
+#endif
+
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+        case MUSB_PERIPHERAL:   /* Disable PHY ID detect, keep ID pull-up on */
+                phy_otg_ctrl |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
+                phy_otg_ena |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
+                dev_conf |= (TUSB_DEV_CONF_ID_SEL | TUSB_DEV_CONF_SOFT_ID);
+                break;
+#endif
+
+#ifdef CONFIG_USB_MUSB_OTG
+        case MUSB_OTG:          /* Use PHY ID detection */
+                phy_otg_ctrl |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
+                phy_otg_ena |= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
+                dev_conf &= ~(TUSB_DEV_CONF_ID_SEL | TUSB_DEV_CONF_SOFT_ID);
+                break;
+#endif
+
+        default:
+                DBG(2, "Trying to set unknown mode %i\n", musb_mode);
+        }
+
+        musb_writel(tbase, TUSB_PHY_OTG_CTRL,
+                        TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ctrl);
+        musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE,
+                        TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ena);
+        musb_writel(tbase, TUSB_DEV_CONF, dev_conf);
+
+        otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
+        if ((musb_mode == MUSB_PERIPHERAL) &&
+                !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS))
+                        INFO("Cannot be peripheral with mini-A cable "
+                        "otg_stat: %08x\n", otg_stat);
+}
+
+static inline unsigned long
+tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
+{
+        u32             otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
+        unsigned long   idle_timeout = 0;
+
+        /* ID pin */
+        if ((int_src & TUSB_INT_SRC_ID_STATUS_CHNG)) {
+                int     default_a;
+
+                if (is_otg_enabled(musb))
+                        default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS);
+                else
+                        default_a = is_host_enabled(musb);
+                DBG(2, "Default-%c\n", default_a ? 'A' : 'B');
+                musb->xceiv.default_a = default_a;
+                tusb_source_power(musb, default_a);
+
+                /* Don't allow idling immediately */
+                if (default_a)
+                        idle_timeout = jiffies + (HZ * 3);
+        }
+
+        /* VBUS state change */
+        if (int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) {
+
+                /* B-dev state machine:  no vbus ~= disconnect */
+                if ((is_otg_enabled(musb) && !musb->xceiv.default_a)
+                                || !is_host_enabled(musb)) {
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+                        /* ? musb_root_disconnect(musb); */
+                        musb->port1_status &=
+                                ~(USB_PORT_STAT_CONNECTION
+                                | USB_PORT_STAT_ENABLE
+                                | USB_PORT_STAT_LOW_SPEED
+                                | USB_PORT_STAT_HIGH_SPEED
+                                | USB_PORT_STAT_TEST
+                                );
+#endif
+
+                        if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) {
+                                DBG(1, "Forcing disconnect (no interrupt)\n");
+                                if (musb->xceiv.state != OTG_STATE_B_IDLE) {
+                                        /* INTR_DISCONNECT can hide... */
+                                        musb->xceiv.state = OTG_STATE_B_IDLE;
+                                        musb->int_usb |= MUSB_INTR_DISCONNECT;
+                                }
+                                musb->is_active = 0;
+                        }
+                        DBG(2, "vbus change, %s, otg %03x\n",
+                                otg_state_string(musb), otg_stat);
+                        idle_timeout = jiffies + (1 * HZ);
+                        schedule_work(&musb->irq_work);
+
+                } else /* A-dev state machine */ {
+                        DBG(2, "vbus change, %s, otg %03x\n",
+                                otg_state_string(musb), otg_stat);
+
+                        switch (musb->xceiv.state) {
+                        case OTG_STATE_A_IDLE:
+                                DBG(2, "Got SRP, turning on VBUS\n");
+                                musb_set_vbus(musb, 1);
+
+                                /* CONNECT can wake if a_wait_bcon is set */
+                                if (musb->a_wait_bcon != 0)
+                                        musb->is_active = 0;
+                                else
+                                        musb->is_active = 1;
+
+                                /*
+                                 * OPT FS A TD.4.6 needs few seconds for
+                                 * A_WAIT_VRISE
+                                 */
+                                idle_timeout = jiffies + (2 * HZ);
+
+                                break;
+                        case OTG_STATE_A_WAIT_VRISE:
+                                /* ignore; A-session-valid < VBUS_VALID/2,
+                                 * we monitor this with the timer
+                                 */
+                                break;
+                        case OTG_STATE_A_WAIT_VFALL:
+                                /* REVISIT this irq triggers during short
+                                 * spikes caused by enumeration ...
+                                 */
+                                if (musb->vbuserr_retry) {
+                                        musb->vbuserr_retry--;
+                                        tusb_source_power(musb, 1);
+                                } else {
+                                        musb->vbuserr_retry
+                                                = VBUSERR_RETRY_COUNT;
+                                        tusb_source_power(musb, 0);
+                                }
+                                break;
+                        default:
+                                break;
+                        }
+                }
+        }
+
+        /* OTG timer expiration */
+        if (int_src & TUSB_INT_SRC_OTG_TIMEOUT) {
+                u8      devctl;
+
+                DBG(4, "%s timer, %03x\n", otg_state_string(musb), otg_stat);
+
+                switch (musb->xceiv.state) {
+                case OTG_STATE_A_WAIT_VRISE:
+                        /* VBUS has probably been valid for a while now,
+                         * but may well have bounced out of range a bit
+                         */
+                        devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+                        if (otg_stat & TUSB_DEV_OTG_STAT_VBUS_VALID) {
+                                if ((devctl & MUSB_DEVCTL_VBUS)
+                                                != MUSB_DEVCTL_VBUS) {
+                                        DBG(2, "devctl %02x\n", devctl);
+                                        break;
+                                }
+                                musb->xceiv.state = OTG_STATE_A_WAIT_BCON;
+                                musb->is_active = 0;
+                                idle_timeout = jiffies
+                                        + msecs_to_jiffies(musb->a_wait_bcon);
+                        } else {
+                                /* REVISIT report overcurrent to hub? */
+                                ERR("vbus too slow, devctl %02x\n", devctl);
+                                tusb_source_power(musb, 0);
+                        }
+                        break;
+                case OTG_STATE_A_WAIT_BCON:
+                        if (musb->a_wait_bcon != 0)
+                                idle_timeout = jiffies
+                                        + msecs_to_jiffies(musb->a_wait_bcon);
+                        break;
+                case OTG_STATE_A_SUSPEND:
+                        break;
+                case OTG_STATE_B_WAIT_ACON:
+                        break;
+                default:
+                        break;
+                }
+        }
+        schedule_work(&musb->irq_work);
+
+        return idle_timeout;
+}
+
+static irqreturn_t tusb_interrupt(int irq, void *__hci)
+{
+        struct musb     *musb = __hci;
+        void __iomem    *tbase = musb->ctrl_base;
+        unsigned long   flags, idle_timeout = 0;
+        u32             int_mask, int_src;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        /* Mask all interrupts to allow using both edge and level GPIO irq */
+        int_mask = musb_readl(tbase, TUSB_INT_MASK);
+        musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS);
+
+        int_src = musb_readl(tbase, TUSB_INT_SRC) & ~TUSB_INT_SRC_RESERVED_BITS;
+        DBG(3, "TUSB IRQ %08x\n", int_src);
+
+        musb->int_usb = (u8) int_src;
+
+        /* Acknowledge wake-up source interrupts */
+        if (int_src & TUSB_INT_SRC_DEV_WAKEUP) {
+                u32     reg;
+                u32     i;
+
+                if (tusb_get_revision(musb) == TUSB_REV_30)
+                        tusb_wbus_quirk(musb, 0);
+
+                /* there are issues re-locking the PLL on wakeup ... */
+
+                /* work around issue 8 */
+                for (i = 0xf7f7f7; i > 0xf7f7f7 - 1000; i--) {
+                        musb_writel(tbase, TUSB_SCRATCH_PAD, 0);
+                        musb_writel(tbase, TUSB_SCRATCH_PAD, i);
+                        reg = musb_readl(tbase, TUSB_SCRATCH_PAD);
+                        if (reg == i)
+                                break;
+                        DBG(6, "TUSB NOR not ready\n");
+                }
+
+                /* work around issue 13 (2nd half) */
+                tusb_set_clock_source(musb, 1);
+
+                reg = musb_readl(tbase, TUSB_PRCM_WAKEUP_SOURCE);
+                musb_writel(tbase, TUSB_PRCM_WAKEUP_CLEAR, reg);
+                if (reg & ~TUSB_PRCM_WNORCS) {
+                        musb->is_active = 1;
+                        schedule_work(&musb->irq_work);
+                }
+                DBG(3, "wake %sactive %02x\n",
+                                musb->is_active ? "" : "in", reg);
+
+                /* REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS */
+        }
+
+        if (int_src & TUSB_INT_SRC_USB_IP_CONN)
+                del_timer(&musb_idle_timer);
+
+        /* OTG state change reports (annoyingly) not issued by Mentor core */
+        if (int_src & (TUSB_INT_SRC_VBUS_SENSE_CHNG
+                                | TUSB_INT_SRC_OTG_TIMEOUT
+                                | TUSB_INT_SRC_ID_STATUS_CHNG))
+                idle_timeout = tusb_otg_ints(musb, int_src, tbase);
+
+        /* TX dma callback must be handled here, RX dma callback is
+         * handled in tusb_omap_dma_cb.
+         */
+        if ((int_src & TUSB_INT_SRC_TXRX_DMA_DONE)) {
+                u32     dma_src = musb_readl(tbase, TUSB_DMA_INT_SRC);
+                u32     real_dma_src = musb_readl(tbase, TUSB_DMA_INT_MASK);
+
+                DBG(3, "DMA IRQ %08x\n", dma_src);
+                real_dma_src = ~real_dma_src & dma_src;
+                if (tusb_dma_omap() && real_dma_src) {
+                        int     tx_source = (real_dma_src & 0xffff);
+                        int     i;
+
+                        for (i = 1; i <= 15; i++) {
+                                if (tx_source & (1 << i)) {
+                                        DBG(3, "completing ep%i %s\n", i, "tx");
+                                        musb_dma_completion(musb, i, 1);
+                                }
+                        }
+                }
+                musb_writel(tbase, TUSB_DMA_INT_CLEAR, dma_src);
+        }
+
+        /* EP interrupts. In OCP mode tusb6010 mirrors the MUSB interrupts */
+        if (int_src & (TUSB_INT_SRC_USB_IP_TX | TUSB_INT_SRC_USB_IP_RX)) {
+                u32     musb_src = musb_readl(tbase, TUSB_USBIP_INT_SRC);
+
+                musb_writel(tbase, TUSB_USBIP_INT_CLEAR, musb_src);
+                musb->int_rx = (((musb_src >> 16) & 0xffff) << 1);
+                musb->int_tx = (musb_src & 0xffff);
+        } else {
+                musb->int_rx = 0;
+                musb->int_tx = 0;
+        }
+
+        if (int_src & (TUSB_INT_SRC_USB_IP_TX | TUSB_INT_SRC_USB_IP_RX | 0xff))
+                musb_interrupt(musb);
+
+        /* Acknowledge TUSB interrupts. Clear only non-reserved bits */
+        musb_writel(tbase, TUSB_INT_SRC_CLEAR,
+                int_src & ~TUSB_INT_MASK_RESERVED_BITS);
+
+        musb_platform_try_idle(musb, idle_timeout);
+
+        musb_writel(tbase, TUSB_INT_MASK, int_mask);
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        return IRQ_HANDLED;
+}
+
+static int dma_off;
+
+/*
+ * Enables TUSB6010. Caller must take care of locking.
+ * REVISIT:
+ * - Check what is unnecessary in MGC_HdrcStart()
+ */
+void musb_platform_enable(struct musb *musb)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+
+        /* Setup TUSB6010 main interrupt mask. Enable all interrupts except SOF.
+         * REVISIT: Enable and deal with TUSB_INT_SRC_USB_IP_SOF */
+        musb_writel(tbase, TUSB_INT_MASK, TUSB_INT_SRC_USB_IP_SOF);
+
+        /* Setup TUSB interrupt, disable DMA and GPIO interrupts */
+        musb_writel(tbase, TUSB_USBIP_INT_MASK, 0);
+        musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff);
+        musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff);
+
+        /* Clear all subsystem interrups */
+        musb_writel(tbase, TUSB_USBIP_INT_CLEAR, 0x7fffffff);
+        musb_writel(tbase, TUSB_DMA_INT_CLEAR, 0x7fffffff);
+        musb_writel(tbase, TUSB_GPIO_INT_CLEAR, 0x1ff);
+
+        /* Acknowledge pending interrupt(s) */
+        musb_writel(tbase, TUSB_INT_SRC_CLEAR, ~TUSB_INT_MASK_RESERVED_BITS);
+
+        /* Only 0 clock cycles for minimum interrupt de-assertion time and
+         * interrupt polarity active low seems to work reliably here */
+        musb_writel(tbase, TUSB_INT_CTRL_CONF,
+                        TUSB_INT_CTRL_CONF_INT_RELCYC(0));
+
+        set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW);
+
+        /* maybe force into the Default-A OTG state machine */
+        if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT)
+                        & TUSB_DEV_OTG_STAT_ID_STATUS))
+                musb_writel(tbase, TUSB_INT_SRC_SET,
+                                TUSB_INT_SRC_ID_STATUS_CHNG);
+
+        if (is_dma_capable() && dma_off)
+                printk(KERN_WARNING "%s %s: dma not reactivated\n",
+                                __FILE__, __func__);
+        else
+                dma_off = 1;
+}
+
+/*
+ * Disables TUSB6010. Caller must take care of locking.
+ */
+void musb_platform_disable(struct musb *musb)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+
+        /* FIXME stop DMA, IRQs, timers, ... */
+
+        /* disable all IRQs */
+        musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS);
+        musb_writel(tbase, TUSB_USBIP_INT_MASK, 0x7fffffff);
+        musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff);
+        musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff);
+
+        del_timer(&musb_idle_timer);
+
+        if (is_dma_capable() && !dma_off) {
+                printk(KERN_WARNING "%s %s: dma still active\n",
+                                __FILE__, __func__);
+                dma_off = 1;
+        }
+}
+
+/*
+ * Sets up TUSB6010 CPU interface specific signals and registers
+ * Note: Settings optimized for OMAP24xx
+ */
+static void __init tusb_setup_cpu_interface(struct musb *musb)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+
+        /*
+         * Disable GPIO[5:0] pullups (used as output DMA requests)
+         * Don't disable GPIO[7:6] as they are needed for wake-up.
+         */
+        musb_writel(tbase, TUSB_PULLUP_1_CTRL, 0x0000003F);
+
+        /* Disable all pullups on NOR IF, DMAREQ0 and DMAREQ1 */
+        musb_writel(tbase, TUSB_PULLUP_2_CTRL, 0x01FFFFFF);
+
+        /* Turn GPIO[5:0] to DMAREQ[5:0] signals */
+        musb_writel(tbase, TUSB_GPIO_CONF, TUSB_GPIO_CONF_DMAREQ(0x3f));
+
+        /* Burst size 16x16 bits, all six DMA requests enabled, DMA request
+         * de-assertion time 2 system clocks p 62 */
+        musb_writel(tbase, TUSB_DMA_REQ_CONF,
+                TUSB_DMA_REQ_CONF_BURST_SIZE(2) |
+                TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f) |
+                TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
+
+        /* Set 0 wait count for synchronous burst access */
+        musb_writel(tbase, TUSB_WAIT_COUNT, 1);
+}
+
+static int __init tusb_start(struct musb *musb)
+{
+        void __iomem    *tbase = musb->ctrl_base;
+        int             ret = 0;
+        unsigned long   flags;
+        u32             reg;
+
+        if (musb->board_set_power)
+                ret = musb->board_set_power(1);
+        if (ret != 0) {
+                printk(KERN_ERR "tusb: Cannot enable TUSB6010\n");
+                return ret;
+        }
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if (musb_readl(tbase, TUSB_PROD_TEST_RESET) !=
+                TUSB_PROD_TEST_RESET_VAL) {
+                printk(KERN_ERR "tusb: Unable to detect TUSB6010\n");
+                goto err;
+        }
+
+        ret = tusb_print_revision(musb);
+        if (ret < 2) {
+                printk(KERN_ERR "tusb: Unsupported TUSB6010 revision %i\n",
+                                ret);
+                goto err;
+        }
+
+        /* The uint bit for "USB non-PDR interrupt enable" has to be 1 when
+         * NOR FLASH interface is used */
+        musb_writel(tbase, TUSB_VLYNQ_CTRL, 8);
+
+        /* Select PHY free running 60MHz as a system clock */
+        tusb_set_clock_source(musb, 1);
+
+        /* VBus valid timer 1us, disable DFT/Debug and VLYNQ clocks for
+         * power saving, enable VBus detect and session end comparators,
+         * enable IDpullup, enable VBus charging */
+        musb_writel(tbase, TUSB_PRCM_MNGMT,
+                TUSB_PRCM_MNGMT_VBUS_VALID_TIMER(0xa) |
+                TUSB_PRCM_MNGMT_VBUS_VALID_FLT_EN |
+                TUSB_PRCM_MNGMT_OTG_SESS_END_EN |
+                TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN |
+                TUSB_PRCM_MNGMT_OTG_ID_PULLUP);
+        tusb_setup_cpu_interface(musb);
+
+        /* simplify:  always sense/pullup ID pins, as if in OTG mode */
+        reg = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
+        reg |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
+        musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, reg);
+
+        reg = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
+        reg |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP;
+        musb_writel(tbase, TUSB_PHY_OTG_CTRL, reg);
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        return 0;
+
+err:
+        spin_unlock_irqrestore(&musb->lock, flags);
+
+        if (musb->board_set_power)
+                musb->board_set_power(0);
+
+        return -ENODEV;
+}
+
+int __init musb_platform_init(struct musb *musb)
+{
+        struct platform_device  *pdev;
+        struct resource         *mem;
+        void __iomem            *sync;
+        int                     ret;
+
+        pdev = to_platform_device(musb->controller);
+
+        /* dma address for async dma */
+        mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        musb->async = mem->start;
+
+        /* dma address for sync dma */
+        mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+        if (!mem) {
+                pr_debug("no sync dma resource?\n");
+                return -ENODEV;
+        }
+        musb->sync = mem->start;
+
+        sync = ioremap(mem->start, mem->end - mem->start + 1);
+        if (!sync) {
+                pr_debug("ioremap for sync failed\n");
+                return -ENOMEM;
+        }
+        musb->sync_va = sync;
+
+        /* Offsets from base: VLYNQ at 0x000, MUSB regs at 0x400,
+         * FIFOs at 0x600, TUSB at 0x800
+         */
+        musb->mregs += TUSB_BASE_OFFSET;
+
+        ret = tusb_start(musb);
+        if (ret) {
+                printk(KERN_ERR "Could not start tusb6010 (%d)\n",
+                                ret);
+                return -ENODEV;
+        }
+        musb->isr = tusb_interrupt;
+
+        if (is_host_enabled(musb))
+                musb->board_set_vbus = tusb_source_power;
+        if (is_peripheral_enabled(musb))
+                musb->xceiv.set_power = tusb_draw_power;
+
+        setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
+
+        return ret;
+}
+
+int musb_platform_exit(struct musb *musb)
+{
+        del_timer_sync(&musb_idle_timer);
+
+        if (musb->board_set_power)
+                musb->board_set_power(0);
+
+        iounmap(musb->sync_va);
+
+        return 0;
+}
diff --git a/drivers/usb/musb/tusb6010.h b/drivers/usb/musb/tusb6010.h
new file mode 100644
index 000000000000..ab8c96286ce6
--- /dev/null
+++ b/drivers/usb/musb/tusb6010.h
@@ -0,0 +1,233 @@
+/*
+ * Definitions for TUSB6010 USB 2.0 OTG Dual Role controller
+ *
+ * Copyright (C) 2006 Nokia Corporation
+ * Jarkko Nikula <jarkko.nikula@nokia.com>
+ * Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __TUSB6010_H__
+#define __TUSB6010_H__
+
+extern u8 tusb_get_revision(struct musb *musb);
+
+#ifdef CONFIG_USB_TUSB6010
+#define musb_in_tusb()                  1
+#else
+#define musb_in_tusb()                  0
+#endif
+
+#ifdef CONFIG_USB_TUSB_OMAP_DMA
+#define tusb_dma_omap()                 1
+#else
+#define tusb_dma_omap()                 0
+#endif
+
+/* VLYNQ control register. 32-bit at offset 0x000 */
+#define TUSB_VLYNQ_CTRL                 0x004
+
+/* Mentor Graphics OTG core registers. 8,- 16- and 32-bit at offset 0x400 */
+#define TUSB_BASE_OFFSET                0x400
+
+/* FIFO registers 32-bit at offset 0x600 */
+#define TUSB_FIFO_BASE                  0x600
+
+/* Device System & Control registers. 32-bit at offset 0x800 */
+#define TUSB_SYS_REG_BASE               0x800
+
+#define TUSB_DEV_CONF                   (TUSB_SYS_REG_BASE + 0x000)
+#define         TUSB_DEV_CONF_USB_HOST_MODE             (1 << 16)
+#define         TUSB_DEV_CONF_PROD_TEST_MODE            (1 << 15)
+#define         TUSB_DEV_CONF_SOFT_ID                   (1 << 1)
+#define         TUSB_DEV_CONF_ID_SEL                    (1 << 0)
+
+#define TUSB_PHY_OTG_CTRL_ENABLE        (TUSB_SYS_REG_BASE + 0x004)
+#define TUSB_PHY_OTG_CTRL               (TUSB_SYS_REG_BASE + 0x008)
+#define         TUSB_PHY_OTG_CTRL_WRPROTECT             (0xa5 << 24)
+#define         TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP         (1 << 23)
+#define         TUSB_PHY_OTG_CTRL_OTG_VBUS_DET_EN       (1 << 19)
+#define         TUSB_PHY_OTG_CTRL_OTG_SESS_END_EN       (1 << 18)
+#define         TUSB_PHY_OTG_CTRL_TESTM2                (1 << 17)
+#define         TUSB_PHY_OTG_CTRL_TESTM1                (1 << 16)
+#define         TUSB_PHY_OTG_CTRL_TESTM0                (1 << 15)
+#define         TUSB_PHY_OTG_CTRL_TX_DATA2              (1 << 14)
+#define         TUSB_PHY_OTG_CTRL_TX_GZ2                (1 << 13)
+#define         TUSB_PHY_OTG_CTRL_TX_ENABLE2            (1 << 12)
+#define         TUSB_PHY_OTG_CTRL_DM_PULLDOWN           (1 << 11)
+#define         TUSB_PHY_OTG_CTRL_DP_PULLDOWN           (1 << 10)
+#define         TUSB_PHY_OTG_CTRL_OSC_EN                (1 << 9)
+#define         TUSB_PHY_OTG_CTRL_PHYREF_CLKSEL(v)      (((v) & 3) << 7)
+#define         TUSB_PHY_OTG_CTRL_PD                    (1 << 6)
+#define         TUSB_PHY_OTG_CTRL_PLL_ON                (1 << 5)
+#define         TUSB_PHY_OTG_CTRL_EXT_RPU               (1 << 4)
+#define         TUSB_PHY_OTG_CTRL_PWR_GOOD              (1 << 3)
+#define         TUSB_PHY_OTG_CTRL_RESET                 (1 << 2)
+#define         TUSB_PHY_OTG_CTRL_SUSPENDM              (1 << 1)
+#define         TUSB_PHY_OTG_CTRL_CLK_MODE              (1 << 0)
+
+/*OTG status register */
+#define TUSB_DEV_OTG_STAT               (TUSB_SYS_REG_BASE + 0x00c)
+#define         TUSB_DEV_OTG_STAT_PWR_CLK_GOOD          (1 << 8)
+#define         TUSB_DEV_OTG_STAT_SESS_END              (1 << 7)
+#define         TUSB_DEV_OTG_STAT_SESS_VALID            (1 << 6)
+#define         TUSB_DEV_OTG_STAT_VBUS_VALID            (1 << 5)
+#define         TUSB_DEV_OTG_STAT_VBUS_SENSE            (1 << 4)
+#define         TUSB_DEV_OTG_STAT_ID_STATUS             (1 << 3)
+#define         TUSB_DEV_OTG_STAT_HOST_DISCON           (1 << 2)
+#define         TUSB_DEV_OTG_STAT_LINE_STATE            (3 << 0)
+#define         TUSB_DEV_OTG_STAT_DP_ENABLE             (1 << 1)
+#define         TUSB_DEV_OTG_STAT_DM_ENABLE             (1 << 0)
+
+#define TUSB_DEV_OTG_TIMER              (TUSB_SYS_REG_BASE + 0x010)
+#       define TUSB_DEV_OTG_TIMER_ENABLE                (1 << 31)
+#       define TUSB_DEV_OTG_TIMER_VAL(v)                ((v) & 0x07ffffff)
+#define TUSB_PRCM_REV                   (TUSB_SYS_REG_BASE + 0x014)
+
+/* PRCM configuration register */
+#define TUSB_PRCM_CONF                  (TUSB_SYS_REG_BASE + 0x018)
+#define         TUSB_PRCM_CONF_SFW_CPEN         (1 << 24)
+#define         TUSB_PRCM_CONF_SYS_CLKSEL(v)    (((v) & 3) << 16)
+
+/* PRCM management register */
+#define TUSB_PRCM_MNGMT                 (TUSB_SYS_REG_BASE + 0x01c)
+#define         TUSB_PRCM_MNGMT_SRP_FIX_TIMER(v)        (((v) & 0xf) << 25)
+#define         TUSB_PRCM_MNGMT_SRP_FIX_EN              (1 << 24)
+#define         TUSB_PRCM_MNGMT_VBUS_VALID_TIMER(v)     (((v) & 0xf) << 20)
+#define         TUSB_PRCM_MNGMT_VBUS_VALID_FLT_EN       (1 << 19)
+#define         TUSB_PRCM_MNGMT_DFT_CLK_DIS             (1 << 18)
+#define         TUSB_PRCM_MNGMT_VLYNQ_CLK_DIS           (1 << 17)
+#define         TUSB_PRCM_MNGMT_OTG_SESS_END_EN         (1 << 10)
+#define         TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN         (1 << 9)
+#define         TUSB_PRCM_MNGMT_OTG_ID_PULLUP           (1 << 8)
+#define         TUSB_PRCM_MNGMT_15_SW_EN                (1 << 4)
+#define         TUSB_PRCM_MNGMT_33_SW_EN                (1 << 3)
+#define         TUSB_PRCM_MNGMT_5V_CPEN                 (1 << 2)
+#define         TUSB_PRCM_MNGMT_PM_IDLE                 (1 << 1)
+#define         TUSB_PRCM_MNGMT_DEV_IDLE                (1 << 0)
+
+/* Wake-up source clear and mask registers */
+#define TUSB_PRCM_WAKEUP_SOURCE         (TUSB_SYS_REG_BASE + 0x020)
+#define TUSB_PRCM_WAKEUP_CLEAR          (TUSB_SYS_REG_BASE + 0x028)
+#define TUSB_PRCM_WAKEUP_MASK           (TUSB_SYS_REG_BASE + 0x02c)
+#define         TUSB_PRCM_WAKEUP_RESERVED_BITS  (0xffffe << 13)
+#define         TUSB_PRCM_WGPIO_7       (1 << 12)
+#define         TUSB_PRCM_WGPIO_6       (1 << 11)
+#define         TUSB_PRCM_WGPIO_5       (1 << 10)
+#define         TUSB_PRCM_WGPIO_4       (1 << 9)
+#define         TUSB_PRCM_WGPIO_3       (1 << 8)
+#define         TUSB_PRCM_WGPIO_2       (1 << 7)
+#define         TUSB_PRCM_WGPIO_1       (1 << 6)
+#define         TUSB_PRCM_WGPIO_0       (1 << 5)
+#define         TUSB_PRCM_WHOSTDISCON   (1 << 4)        /* Host disconnect */
+#define         TUSB_PRCM_WBUS          (1 << 3)        /* USB bus resume */
+#define         TUSB_PRCM_WNORCS        (1 << 2)        /* NOR chip select */
+#define         TUSB_PRCM_WVBUS         (1 << 1)        /* OTG PHY VBUS */
+#define         TUSB_PRCM_WID           (1 << 0)        /* OTG PHY ID detect */
+
+#define TUSB_PULLUP_1_CTRL              (TUSB_SYS_REG_BASE + 0x030)
+#define TUSB_PULLUP_2_CTRL              (TUSB_SYS_REG_BASE + 0x034)
+#define TUSB_INT_CTRL_REV               (TUSB_SYS_REG_BASE + 0x038)
+#define TUSB_INT_CTRL_CONF              (TUSB_SYS_REG_BASE + 0x03c)
+#define TUSB_USBIP_INT_SRC              (TUSB_SYS_REG_BASE + 0x040)
+#define TUSB_USBIP_INT_SET              (TUSB_SYS_REG_BASE + 0x044)
+#define TUSB_USBIP_INT_CLEAR            (TUSB_SYS_REG_BASE + 0x048)
+#define TUSB_USBIP_INT_MASK             (TUSB_SYS_REG_BASE + 0x04c)
+#define TUSB_DMA_INT_SRC                (TUSB_SYS_REG_BASE + 0x050)
+#define TUSB_DMA_INT_SET                (TUSB_SYS_REG_BASE + 0x054)
+#define TUSB_DMA_INT_CLEAR              (TUSB_SYS_REG_BASE + 0x058)
+#define TUSB_DMA_INT_MASK               (TUSB_SYS_REG_BASE + 0x05c)
+#define TUSB_GPIO_INT_SRC               (TUSB_SYS_REG_BASE + 0x060)
+#define TUSB_GPIO_INT_SET               (TUSB_SYS_REG_BASE + 0x064)
+#define TUSB_GPIO_INT_CLEAR             (TUSB_SYS_REG_BASE + 0x068)
+#define TUSB_GPIO_INT_MASK              (TUSB_SYS_REG_BASE + 0x06c)
+
+/* NOR flash interrupt source registers */
+#define TUSB_INT_SRC                    (TUSB_SYS_REG_BASE + 0x070)
+#define TUSB_INT_SRC_SET                (TUSB_SYS_REG_BASE + 0x074)
+#define TUSB_INT_SRC_CLEAR              (TUSB_SYS_REG_BASE + 0x078)
+#define TUSB_INT_MASK                   (TUSB_SYS_REG_BASE + 0x07c)
+#define         TUSB_INT_SRC_TXRX_DMA_DONE              (1 << 24)
+#define         TUSB_INT_SRC_USB_IP_CORE                (1 << 17)
+#define         TUSB_INT_SRC_OTG_TIMEOUT                (1 << 16)
+#define         TUSB_INT_SRC_VBUS_SENSE_CHNG            (1 << 15)
+#define         TUSB_INT_SRC_ID_STATUS_CHNG             (1 << 14)
+#define         TUSB_INT_SRC_DEV_WAKEUP                 (1 << 13)
+#define         TUSB_INT_SRC_DEV_READY                  (1 << 12)
+#define         TUSB_INT_SRC_USB_IP_TX                  (1 << 9)
+#define         TUSB_INT_SRC_USB_IP_RX                  (1 << 8)
+#define         TUSB_INT_SRC_USB_IP_VBUS_ERR            (1 << 7)
+#define         TUSB_INT_SRC_USB_IP_VBUS_REQ            (1 << 6)
+#define         TUSB_INT_SRC_USB_IP_DISCON              (1 << 5)
+#define         TUSB_INT_SRC_USB_IP_CONN                (1 << 4)
+#define         TUSB_INT_SRC_USB_IP_SOF                 (1 << 3)
+#define         TUSB_INT_SRC_USB_IP_RST_BABBLE          (1 << 2)
+#define         TUSB_INT_SRC_USB_IP_RESUME              (1 << 1)
+#define         TUSB_INT_SRC_USB_IP_SUSPEND             (1 << 0)
+
+/* NOR flash interrupt registers reserved bits. Must be written as 0 */
+#define         TUSB_INT_MASK_RESERVED_17               (0x3fff << 17)
+#define         TUSB_INT_MASK_RESERVED_13               (1 << 13)
+#define         TUSB_INT_MASK_RESERVED_8                (0xf << 8)
+#define         TUSB_INT_SRC_RESERVED_26                (0x1f << 26)
+#define         TUSB_INT_SRC_RESERVED_18                (0x3f << 18)
+#define         TUSB_INT_SRC_RESERVED_10                (0x03 << 10)
+
+/* Reserved bits for NOR flash interrupt mask and clear register */
+#define         TUSB_INT_MASK_RESERVED_BITS     (TUSB_INT_MASK_RESERVED_17 | \
+                                                TUSB_INT_MASK_RESERVED_13 | \
+                                                TUSB_INT_MASK_RESERVED_8)
+
+/* Reserved bits for NOR flash interrupt status register */
+#define         TUSB_INT_SRC_RESERVED_BITS      (TUSB_INT_SRC_RESERVED_26 | \
+                                                TUSB_INT_SRC_RESERVED_18 | \
+                                                TUSB_INT_SRC_RESERVED_10)
+
+#define TUSB_GPIO_REV                   (TUSB_SYS_REG_BASE + 0x080)
+#define TUSB_GPIO_CONF                  (TUSB_SYS_REG_BASE + 0x084)
+#define TUSB_DMA_CTRL_REV               (TUSB_SYS_REG_BASE + 0x100)
+#define TUSB_DMA_REQ_CONF               (TUSB_SYS_REG_BASE + 0x104)
+#define TUSB_EP0_CONF                   (TUSB_SYS_REG_BASE + 0x108)
+#define TUSB_DMA_EP_MAP                 (TUSB_SYS_REG_BASE + 0x148)
+
+/* Offsets from each ep base register */
+#define TUSB_EP_TX_OFFSET               0x10c   /* EP_IN in docs */
+#define TUSB_EP_RX_OFFSET               0x14c   /* EP_OUT in docs */
+#define TUSB_EP_MAX_PACKET_SIZE_OFFSET  0x188
+
+#define TUSB_WAIT_COUNT                 (TUSB_SYS_REG_BASE + 0x1c8)
+#define TUSB_SCRATCH_PAD                (TUSB_SYS_REG_BASE + 0x1c4)
+#define TUSB_PROD_TEST_RESET            (TUSB_SYS_REG_BASE + 0x1d8)
+
+/* Device System & Control register bitfields */
+#define TUSB_INT_CTRL_CONF_INT_RELCYC(v)        (((v) & 0x7) << 18)
+#define TUSB_INT_CTRL_CONF_INT_POLARITY         (1 << 17)
+#define TUSB_INT_CTRL_CONF_INT_MODE             (1 << 16)
+#define TUSB_GPIO_CONF_DMAREQ(v)                (((v) & 0x3f) << 24)
+#define TUSB_DMA_REQ_CONF_BURST_SIZE(v)         (((v) & 3) << 26)
+#define TUSB_DMA_REQ_CONF_DMA_REQ_EN(v)         (((v) & 0x3f) << 20)
+#define TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(v)      (((v) & 0xf) << 16)
+#define TUSB_EP0_CONFIG_SW_EN                   (1 << 8)
+#define TUSB_EP0_CONFIG_DIR_TX                  (1 << 7)
+#define TUSB_EP0_CONFIG_XFR_SIZE(v)             ((v) & 0x7f)
+#define TUSB_EP_CONFIG_SW_EN                    (1 << 31)
+#define TUSB_EP_CONFIG_XFR_SIZE(v)              ((v) & 0x7fffffff)
+#define TUSB_PROD_TEST_RESET_VAL                0xa596
+#define TUSB_EP_FIFO(ep)                        (TUSB_FIFO_BASE + (ep) * 0x20)
+
+#define TUSB_DIDR1_LO                           (TUSB_SYS_REG_BASE + 0x1f8)
+#define TUSB_DIDR1_HI                           (TUSB_SYS_REG_BASE + 0x1fc)
+#define         TUSB_DIDR1_HI_CHIP_REV(v)               (((v) >> 17) & 0xf)
+#define                 TUSB_DIDR1_HI_REV_20            0
+#define                 TUSB_DIDR1_HI_REV_30            1
+#define                 TUSB_DIDR1_HI_REV_31            2
+
+#define TUSB_REV_10     0x10
+#define TUSB_REV_20     0x20
+#define TUSB_REV_30     0x30
+#define TUSB_REV_31     0x31
+
+#endif /* __TUSB6010_H__ */
diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
new file mode 100644
index 000000000000..52f7f29cebda
--- /dev/null
+++ b/drivers/usb/musb/tusb6010_omap.c
@@ -0,0 +1,719 @@
+/*
+ * TUSB6010 USB 2.0 OTG Dual Role controller OMAP DMA interface
+ *
+ * Copyright (C) 2006 Nokia Corporation
+ * Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/usb.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <asm/arch/dma.h>
+#include <asm/arch/mux.h>
+
+#include "musb_core.h"
+
+#define to_chdat(c)             ((struct tusb_omap_dma_ch *)(c)->private_data)
+
+#define MAX_DMAREQ              5       /* REVISIT: Really 6, but req5 not OK */
+
+struct tusb_omap_dma_ch {
+        struct musb             *musb;
+        void __iomem            *tbase;
+        unsigned long           phys_offset;
+        int                     epnum;
+        u8                      tx;
+        struct musb_hw_ep       *hw_ep;
+
+        int                     ch;
+        s8                      dmareq;
+        s8                      sync_dev;
+
+        struct tusb_omap_dma    *tusb_dma;
+
+        void __iomem            *dma_addr;
+
+        u32                     len;
+        u16                     packet_sz;
+        u16                     transfer_packet_sz;
+        u32                     transfer_len;
+        u32                     completed_len;
+};
+
+struct tusb_omap_dma {
+        struct dma_controller           controller;
+        struct musb                     *musb;
+        void __iomem                    *tbase;
+
+        int                             ch;
+        s8                              dmareq;
+        s8                              sync_dev;
+        unsigned                        multichannel:1;
+};
+
+static int tusb_omap_dma_start(struct dma_controller *c)
+{
+        struct tusb_omap_dma    *tusb_dma;
+
+        tusb_dma = container_of(c, struct tusb_omap_dma, controller);
+
+        /* DBG(3, "ep%i ch: %i\n", chdat->epnum, chdat->ch); */
+
+        return 0;
+}
+
+static int tusb_omap_dma_stop(struct dma_controller *c)
+{
+        struct tusb_omap_dma    *tusb_dma;
+
+        tusb_dma = container_of(c, struct tusb_omap_dma, controller);
+
+        /* DBG(3, "ep%i ch: %i\n", chdat->epnum, chdat->ch); */
+
+        return 0;
+}
+
+/*
+ * Allocate dmareq0 to the current channel unless it's already taken
+ */
+static inline int tusb_omap_use_shared_dmareq(struct tusb_omap_dma_ch *chdat)
+{
+        u32             reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
+
+        if (reg != 0) {
+                DBG(3, "ep%i dmareq0 is busy for ep%i\n",
+                        chdat->epnum, reg & 0xf);
+                return -EAGAIN;
+        }
+
+        if (chdat->tx)
+                reg = (1 << 4) | chdat->epnum;
+        else
+                reg = chdat->epnum;
+
+        musb_writel(chdat->tbase, TUSB_DMA_EP_MAP, reg);
+
+        return 0;
+}
+
+static inline void tusb_omap_free_shared_dmareq(struct tusb_omap_dma_ch *chdat)
+{
+        u32             reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
+
+        if ((reg & 0xf) != chdat->epnum) {
+                printk(KERN_ERR "ep%i trying to release dmareq0 for ep%i\n",
+                        chdat->epnum, reg & 0xf);
+                return;
+        }
+        musb_writel(chdat->tbase, TUSB_DMA_EP_MAP, 0);
+}
+
+/*
+ * See also musb_dma_completion in plat_uds.c and musb_g_[tx|rx]() in
+ * musb_gadget.c.
+ */
+static void tusb_omap_dma_cb(int lch, u16 ch_status, void *data)
+{
+        struct dma_channel      *channel = (struct dma_channel *)data;
+        struct tusb_omap_dma_ch *chdat = to_chdat(channel);
+        struct tusb_omap_dma    *tusb_dma = chdat->tusb_dma;
+        struct musb             *musb = chdat->musb;
+        struct musb_hw_ep       *hw_ep = chdat->hw_ep;
+        void __iomem            *ep_conf = hw_ep->conf;
+        void __iomem            *mbase = musb->mregs;
+        unsigned long           remaining, flags, pio;
+        int                     ch;
+
+        spin_lock_irqsave(&musb->lock, flags);
+
+        if (tusb_dma->multichannel)
+                ch = chdat->ch;
+        else
+                ch = tusb_dma->ch;
+
+        if (ch_status != OMAP_DMA_BLOCK_IRQ)
+                printk(KERN_ERR "TUSB DMA error status: %i\n", ch_status);
+
+        DBG(3, "ep%i %s dma callback ch: %i status: %x\n",
+                chdat->epnum, chdat->tx ? "tx" : "rx",
+                ch, ch_status);
+
+        if (chdat->tx)
+                remaining = musb_readl(ep_conf, TUSB_EP_TX_OFFSET);
+        else
+                remaining = musb_readl(ep_conf, TUSB_EP_RX_OFFSET);
+
+        remaining = TUSB_EP_CONFIG_XFR_SIZE(remaining);
+
+        /* HW issue #10: XFR_SIZE may get corrupt on DMA (both async & sync) */
+        if (unlikely(remaining > chdat->transfer_len)) {
+                DBG(2, "Corrupt %s dma ch%i XFR_SIZE: 0x%08lx\n",
+                        chdat->tx ? "tx" : "rx", chdat->ch,
+                        remaining);
+                remaining = 0;
+        }
+
+        channel->actual_len = chdat->transfer_len - remaining;
+        pio = chdat->len - channel->actual_len;
+
+        DBG(3, "DMA remaining %lu/%u\n", remaining, chdat->transfer_len);
+
+        /* Transfer remaining 1 - 31 bytes */
+        if (pio > 0 && pio < 32) {
+                u8      *buf;
+
+                DBG(3, "Using PIO for remaining %lu bytes\n", pio);
+                buf = phys_to_virt((u32)chdat->dma_addr) + chdat->transfer_len;
+                if (chdat->tx) {
+                        dma_cache_maint(phys_to_virt((u32)chdat->dma_addr),
+                                        chdat->transfer_len, DMA_TO_DEVICE);
+                        musb_write_fifo(hw_ep, pio, buf);
+                } else {
+                        musb_read_fifo(hw_ep, pio, buf);
+                        dma_cache_maint(phys_to_virt((u32)chdat->dma_addr),
+                                        chdat->transfer_len, DMA_FROM_DEVICE);
+                }
+                channel->actual_len += pio;
+        }
+
+        if (!tusb_dma->multichannel)
+                tusb_omap_free_shared_dmareq(chdat);
+
+        channel->status = MUSB_DMA_STATUS_FREE;
+
+        /* Handle only RX callbacks here. TX callbacks must be handled based
+         * on the TUSB DMA status interrupt.
+         * REVISIT: Use both TUSB DMA status interrupt and OMAP DMA callback
+         * interrupt for RX and TX.
+         */
+        if (!chdat->tx)
+                musb_dma_completion(musb, chdat->epnum, chdat->tx);
+
+        /* We must terminate short tx transfers manually by setting TXPKTRDY.
+         * REVISIT: This same problem may occur with other MUSB dma as well.
+         * Easy to test with g_ether by pinging the MUSB board with ping -s54.
+         */
+        if ((chdat->transfer_len < chdat->packet_sz)
+                        || (chdat->transfer_len % chdat->packet_sz != 0)) {
+                u16     csr;
+
+                if (chdat->tx) {
+                        DBG(3, "terminating short tx packet\n");
+                        musb_ep_select(mbase, chdat->epnum);
+                        csr = musb_readw(hw_ep->regs, MUSB_TXCSR);
+                        csr |= MUSB_TXCSR_MODE | MUSB_TXCSR_TXPKTRDY
+                                | MUSB_TXCSR_P_WZC_BITS;
+                        musb_writew(hw_ep->regs, MUSB_TXCSR, csr);
+                }
+        }
+
+        spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
+                                u8 rndis_mode, dma_addr_t dma_addr, u32 len)
+{
+        struct tusb_omap_dma_ch         *chdat = to_chdat(channel);
+        struct tusb_omap_dma            *tusb_dma = chdat->tusb_dma;
+        struct musb                     *musb = chdat->musb;
+        struct musb_hw_ep               *hw_ep = chdat->hw_ep;
+        void __iomem                    *mbase = musb->mregs;
+        void __iomem                    *ep_conf = hw_ep->conf;
+        dma_addr_t                      fifo = hw_ep->fifo_sync;
+        struct omap_dma_channel_params  dma_params;
+        u32                             dma_remaining;
+        int                             src_burst, dst_burst;
+        u16                             csr;
+        int                             ch;
+        s8                              dmareq;
+        s8                              sync_dev;
+
+        if (unlikely(dma_addr & 0x1) || (len < 32) || (len > packet_sz))
+                return false;
+
+        /*
+         * HW issue #10: Async dma will eventually corrupt the XFR_SIZE
+         * register which will cause missed DMA interrupt. We could try to
+         * use a timer for the callback, but it is unsafe as the XFR_SIZE
+         * register is corrupt, and we won't know if the DMA worked.
+         */
+        if (dma_addr & 0x2)
+                return false;
+
+        /*
+         * Because of HW issue #10, it seems like mixing sync DMA and async
+         * PIO access can confuse the DMA. Make sure XFR_SIZE is reset before
+         * using the channel for DMA.
+         */
+        if (chdat->tx)
+                dma_remaining = musb_readl(ep_conf, TUSB_EP_TX_OFFSET);
+        else
+                dma_remaining = musb_readl(ep_conf, TUSB_EP_RX_OFFSET);
+
+        dma_remaining = TUSB_EP_CONFIG_XFR_SIZE(dma_remaining);
+        if (dma_remaining) {
+                DBG(2, "Busy %s dma ch%i, not using: %08x\n",
+                        chdat->tx ? "tx" : "rx", chdat->ch,
+                        dma_remaining);
+                return false;
+        }
+
+        chdat->transfer_len = len & ~0x1f;
+
+        if (len < packet_sz)
+                chdat->transfer_packet_sz = chdat->transfer_len;
+        else
+                chdat->transfer_packet_sz = packet_sz;
+
+        if (tusb_dma->multichannel) {
+                ch = chdat->ch;
+                dmareq = chdat->dmareq;
+                sync_dev = chdat->sync_dev;
+        } else {
+                if (tusb_omap_use_shared_dmareq(chdat) != 0) {
+                        DBG(3, "could not get dma for ep%i\n", chdat->epnum);
+                        return false;
+                }
+                if (tusb_dma->ch < 0) {
+                        /* REVISIT: This should get blocked earlier, happens
+                         * with MSC ErrorRecoveryTest
+                         */
+                        WARN_ON(1);
+                        return false;
+                }
+
+                ch = tusb_dma->ch;
+                dmareq = tusb_dma->dmareq;
+                sync_dev = tusb_dma->sync_dev;
+                omap_set_dma_callback(ch, tusb_omap_dma_cb, channel);
+        }
+
+        chdat->packet_sz = packet_sz;
+        chdat->len = len;
+        channel->actual_len = 0;
+        chdat->dma_addr = (void __iomem *)dma_addr;
+        channel->status = MUSB_DMA_STATUS_BUSY;
+
+        /* Since we're recycling dma areas, we need to clean or invalidate */
+        if (chdat->tx)
+                dma_cache_maint(phys_to_virt(dma_addr), len, DMA_TO_DEVICE);
+        else
+                dma_cache_maint(phys_to_virt(dma_addr), len, DMA_FROM_DEVICE);
+
+        /* Use 16-bit transfer if dma_addr is not 32-bit aligned */
+        if ((dma_addr & 0x3) == 0) {
+                dma_params.data_type = OMAP_DMA_DATA_TYPE_S32;
+                dma_params.elem_count = 8;              /* Elements in frame */
+        } else {
+                dma_params.data_type = OMAP_DMA_DATA_TYPE_S16;
+                dma_params.elem_count = 16;             /* Elements in frame */
+                fifo = hw_ep->fifo_async;
+        }
+
+        dma_params.frame_count  = chdat->transfer_len / 32; /* Burst sz frame */
+
+        DBG(3, "ep%i %s dma ch%i dma: %08x len: %u(%u) packet_sz: %i(%i)\n",
+                chdat->epnum, chdat->tx ? "tx" : "rx",
+                ch, dma_addr, chdat->transfer_len, len,
+                chdat->transfer_packet_sz, packet_sz);
+
+        /*
+         * Prepare omap DMA for transfer
+         */
+        if (chdat->tx) {
+                dma_params.src_amode    = OMAP_DMA_AMODE_POST_INC;
+                dma_params.src_start    = (unsigned long)dma_addr;
+                dma_params.src_ei       = 0;
+                dma_params.src_fi       = 0;
+
+                dma_params.dst_amode    = OMAP_DMA_AMODE_DOUBLE_IDX;
+                dma_params.dst_start    = (unsigned long)fifo;
+                dma_params.dst_ei       = 1;
+                dma_params.dst_fi       = -31;  /* Loop 32 byte window */
+
+                dma_params.trigger      = sync_dev;
+                dma_params.sync_mode    = OMAP_DMA_SYNC_FRAME;
+                dma_params.src_or_dst_synch     = 0;    /* Dest sync */
+
+                src_burst = OMAP_DMA_DATA_BURST_16;     /* 16x32 read */
+                dst_burst = OMAP_DMA_DATA_BURST_8;      /* 8x32 write */
+        } else {
+                dma_params.src_amode    = OMAP_DMA_AMODE_DOUBLE_IDX;
+                dma_params.src_start    = (unsigned long)fifo;
+                dma_params.src_ei       = 1;
+                dma_params.src_fi       = -31;  /* Loop 32 byte window */
+
+                dma_params.dst_amode    = OMAP_DMA_AMODE_POST_INC;
+                dma_params.dst_start    = (unsigned long)dma_addr;
+                dma_params.dst_ei       = 0;
+                dma_params.dst_fi       = 0;
+
+                dma_params.trigger      = sync_dev;
+                dma_params.sync_mode    = OMAP_DMA_SYNC_FRAME;
+                dma_params.src_or_dst_synch     = 1;    /* Source sync */
+
+                src_burst = OMAP_DMA_DATA_BURST_8;      /* 8x32 read */
+                dst_burst = OMAP_DMA_DATA_BURST_16;     /* 16x32 write */
+        }
+
+        DBG(3, "ep%i %s using %i-bit %s dma from 0x%08lx to 0x%08lx\n",
+                chdat->epnum, chdat->tx ? "tx" : "rx",
+                (dma_params.data_type == OMAP_DMA_DATA_TYPE_S32) ? 32 : 16,
+                ((dma_addr & 0x3) == 0) ? "sync" : "async",
+                dma_params.src_start, dma_params.dst_start);
+
+        omap_set_dma_params(ch, &dma_params);
+        omap_set_dma_src_burst_mode(ch, src_burst);
+        omap_set_dma_dest_burst_mode(ch, dst_burst);
+        omap_set_dma_write_mode(ch, OMAP_DMA_WRITE_LAST_NON_POSTED);
+
+        /*
+         * Prepare MUSB for DMA transfer
+         */
+        if (chdat->tx) {
+                musb_ep_select(mbase, chdat->epnum);
+                csr = musb_readw(hw_ep->regs, MUSB_TXCSR);
+                csr |= (MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAENAB
+                        | MUSB_TXCSR_DMAMODE | MUSB_TXCSR_MODE);
+                csr &= ~MUSB_TXCSR_P_UNDERRUN;
+                musb_writew(hw_ep->regs, MUSB_TXCSR, csr);
+        } else {
+                musb_ep_select(mbase, chdat->epnum);
+                csr = musb_readw(hw_ep->regs, MUSB_RXCSR);
+                csr |= MUSB_RXCSR_DMAENAB;
+                csr &= ~(MUSB_RXCSR_AUTOCLEAR | MUSB_RXCSR_DMAMODE);
+                musb_writew(hw_ep->regs, MUSB_RXCSR,
+                        csr | MUSB_RXCSR_P_WZC_BITS);
+        }
+
+        /*
+         * Start DMA transfer
+         */
+        omap_start_dma(ch);
+
+        if (chdat->tx) {
+                /* Send transfer_packet_sz packets at a time */
+                musb_writel(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET,
+                        chdat->transfer_packet_sz);
+
+                musb_writel(ep_conf, TUSB_EP_TX_OFFSET,
+                        TUSB_EP_CONFIG_XFR_SIZE(chdat->transfer_len));
+        } else {
+                /* Receive transfer_packet_sz packets at a time */
+                musb_writel(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET,
+                        chdat->transfer_packet_sz << 16);
+
+                musb_writel(ep_conf, TUSB_EP_RX_OFFSET,
+                        TUSB_EP_CONFIG_XFR_SIZE(chdat->transfer_len));
+        }
+
+        return true;
+}
+
+static int tusb_omap_dma_abort(struct dma_channel *channel)
+{
+        struct tusb_omap_dma_ch *chdat = to_chdat(channel);
+        struct tusb_omap_dma    *tusb_dma = chdat->tusb_dma;
+
+        if (!tusb_dma->multichannel) {
+                if (tusb_dma->ch >= 0) {
+                        omap_stop_dma(tusb_dma->ch);
+                        omap_free_dma(tusb_dma->ch);
+                        tusb_dma->ch = -1;
+                }
+
+                tusb_dma->dmareq = -1;
+                tusb_dma->sync_dev = -1;
+        }
+
+        channel->status = MUSB_DMA_STATUS_FREE;
+
+        return 0;
+}
+
+static inline int tusb_omap_dma_allocate_dmareq(struct tusb_omap_dma_ch *chdat)
+{
+        u32             reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
+        int             i, dmareq_nr = -1;
+
+        const int sync_dev[6] = {
+                OMAP24XX_DMA_EXT_DMAREQ0,
+                OMAP24XX_DMA_EXT_DMAREQ1,
+                OMAP242X_DMA_EXT_DMAREQ2,
+                OMAP242X_DMA_EXT_DMAREQ3,
+                OMAP242X_DMA_EXT_DMAREQ4,
+                OMAP242X_DMA_EXT_DMAREQ5,
+        };
+
+        for (i = 0; i < MAX_DMAREQ; i++) {
+                int cur = (reg & (0xf << (i * 5))) >> (i * 5);
+                if (cur == 0) {
+                        dmareq_nr = i;
+                        break;
+                }
+        }
+
+        if (dmareq_nr == -1)
+                return -EAGAIN;
+
+        reg |= (chdat->epnum << (dmareq_nr * 5));
+        if (chdat->tx)
+                reg |= ((1 << 4) << (dmareq_nr * 5));
+        musb_writel(chdat->tbase, TUSB_DMA_EP_MAP, reg);
+
+        chdat->dmareq = dmareq_nr;
+        chdat->sync_dev = sync_dev[chdat->dmareq];
+
+        return 0;
+}
+
+static inline void tusb_omap_dma_free_dmareq(struct tusb_omap_dma_ch *chdat)
+{
+        u32 reg;
+
+        if (!chdat || chdat->dmareq < 0)
+                return;
+
+        reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
+        reg &= ~(0x1f << (chdat->dmareq * 5));
+        musb_writel(chdat->tbase, TUSB_DMA_EP_MAP, reg);
+
+        chdat->dmareq = -1;
+        chdat->sync_dev = -1;
+}
+
+static struct dma_channel *dma_channel_pool[MAX_DMAREQ];
+
+static struct dma_channel *
+tusb_omap_dma_allocate(struct dma_controller *c,
+                struct musb_hw_ep *hw_ep,
+                u8 tx)
+{
+        int ret, i;
+        const char              *dev_name;
+        struct tusb_omap_dma    *tusb_dma;
+        struct musb             *musb;
+        void __iomem            *tbase;
+        struct dma_channel      *channel = NULL;
+        struct tusb_omap_dma_ch *chdat = NULL;
+        u32                     reg;
+
+        tusb_dma = container_of(c, struct tusb_omap_dma, controller);
+        musb = tusb_dma->musb;
+        tbase = musb->ctrl_base;
+
+        reg = musb_readl(tbase, TUSB_DMA_INT_MASK);
+        if (tx)
+                reg &= ~(1 << hw_ep->epnum);
+        else
+                reg &= ~(1 << (hw_ep->epnum + 15));
+        musb_writel(tbase, TUSB_DMA_INT_MASK, reg);
+
+        /* REVISIT: Why does dmareq5 not work? */
+        if (hw_ep->epnum == 0) {
+                DBG(3, "Not allowing DMA for ep0 %s\n", tx ? "tx" : "rx");
+                return NULL;
+        }
+
+        for (i = 0; i < MAX_DMAREQ; i++) {
+                struct dma_channel *ch = dma_channel_pool[i];
+                if (ch->status == MUSB_DMA_STATUS_UNKNOWN) {
+                        ch->status = MUSB_DMA_STATUS_FREE;
+                        channel = ch;
+                        chdat = ch->private_data;
+                        break;
+                }
+        }
+
+        if (!channel)
+                return NULL;
+
+        if (tx) {
+                chdat->tx = 1;
+                dev_name = "TUSB transmit";
+        } else {
+                chdat->tx = 0;
+                dev_name = "TUSB receive";
+        }
+
+        chdat->musb = tusb_dma->musb;
+        chdat->tbase = tusb_dma->tbase;
+        chdat->hw_ep = hw_ep;
+        chdat->epnum = hw_ep->epnum;
+        chdat->dmareq = -1;
+        chdat->completed_len = 0;
+        chdat->tusb_dma = tusb_dma;
+
+        channel->max_len = 0x7fffffff;
+        channel->desired_mode = 0;
+        channel->actual_len = 0;
+
+        if (tusb_dma->multichannel) {
+                ret = tusb_omap_dma_allocate_dmareq(chdat);
+                if (ret != 0)
+                        goto free_dmareq;
+
+                ret = omap_request_dma(chdat->sync_dev, dev_name,
+                                tusb_omap_dma_cb, channel, &chdat->ch);
+                if (ret != 0)
+                        goto free_dmareq;
+        } else if (tusb_dma->ch == -1) {
+                tusb_dma->dmareq = 0;
+                tusb_dma->sync_dev = OMAP24XX_DMA_EXT_DMAREQ0;
+
+                /* Callback data gets set later in the shared dmareq case */
+                ret = omap_request_dma(tusb_dma->sync_dev, "TUSB shared",
+                                tusb_omap_dma_cb, NULL, &tusb_dma->ch);
+                if (ret != 0)
+                        goto free_dmareq;
+
+                chdat->dmareq = -1;
+                chdat->ch = -1;
+        }
+
+        DBG(3, "ep%i %s dma: %s dma%i dmareq%i sync%i\n",
+                chdat->epnum,
+                chdat->tx ? "tx" : "rx",
+                chdat->ch >= 0 ? "dedicated" : "shared",
+                chdat->ch >= 0 ? chdat->ch : tusb_dma->ch,
+                chdat->dmareq >= 0 ? chdat->dmareq : tusb_dma->dmareq,
+                chdat->sync_dev >= 0 ? chdat->sync_dev : tusb_dma->sync_dev);
+
+        return channel;
+
+free_dmareq:
+        tusb_omap_dma_free_dmareq(chdat);
+
+        DBG(3, "ep%i: Could not get a DMA channel\n", chdat->epnum);
+        channel->status = MUSB_DMA_STATUS_UNKNOWN;
+
+        return NULL;
+}
+
+static void tusb_omap_dma_release(struct dma_channel *channel)
+{
+        struct tusb_omap_dma_ch *chdat = to_chdat(channel);
+        struct musb             *musb = chdat->musb;
+        void __iomem            *tbase = musb->ctrl_base;
+        u32                     reg;
+
+        DBG(3, "ep%i ch%i\n", chdat->epnum, chdat->ch);
+
+        reg = musb_readl(tbase, TUSB_DMA_INT_MASK);
+        if (chdat->tx)
+                reg |= (1 << chdat->epnum);
+        else
+                reg |= (1 << (chdat->epnum + 15));
+        musb_writel(tbase, TUSB_DMA_INT_MASK, reg);
+
+        reg = musb_readl(tbase, TUSB_DMA_INT_CLEAR);
+        if (chdat->tx)
+                reg |= (1 << chdat->epnum);
+        else
+                reg |= (1 << (chdat->epnum + 15));
+        musb_writel(tbase, TUSB_DMA_INT_CLEAR, reg);
+
+        channel->status = MUSB_DMA_STATUS_UNKNOWN;
+
+        if (chdat->ch >= 0) {
+                omap_stop_dma(chdat->ch);
+                omap_free_dma(chdat->ch);
+                chdat->ch = -1;
+        }
+
+        if (chdat->dmareq >= 0)
+                tusb_omap_dma_free_dmareq(chdat);
+
+        channel = NULL;
+}
+
+void dma_controller_destroy(struct dma_controller *c)
+{
+        struct tusb_omap_dma    *tusb_dma;
+        int                     i;
+
+        tusb_dma = container_of(c, struct tusb_omap_dma, controller);
+        for (i = 0; i < MAX_DMAREQ; i++) {
+                struct dma_channel *ch = dma_channel_pool[i];
+                if (ch) {
+                        kfree(ch->private_data);
+                        kfree(ch);
+                }
+        }
+
+        if (!tusb_dma->multichannel && tusb_dma && tusb_dma->ch >= 0)
+                omap_free_dma(tusb_dma->ch);
+
+        kfree(tusb_dma);
+}
+
+struct dma_controller *__init
+dma_controller_create(struct musb *musb, void __iomem *base)
+{
+        void __iomem            *tbase = musb->ctrl_base;
+        struct tusb_omap_dma    *tusb_dma;
+        int                     i;
+
+        /* REVISIT: Get dmareq lines used from board-*.c */
+
+        musb_writel(musb->ctrl_base, TUSB_DMA_INT_MASK, 0x7fffffff);
+        musb_writel(musb->ctrl_base, TUSB_DMA_EP_MAP, 0);
+
+        musb_writel(tbase, TUSB_DMA_REQ_CONF,
+                TUSB_DMA_REQ_CONF_BURST_SIZE(2)
+                | TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f)
+                | TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
+
+        tusb_dma = kzalloc(sizeof(struct tusb_omap_dma), GFP_KERNEL);
+        if (!tusb_dma)
+                goto cleanup;
+
+        tusb_dma->musb = musb;
+        tusb_dma->tbase = musb->ctrl_base;
+
+        tusb_dma->ch = -1;
+        tusb_dma->dmareq = -1;
+        tusb_dma->sync_dev = -1;
+
+        tusb_dma->controller.start = tusb_omap_dma_start;
+        tusb_dma->controller.stop = tusb_omap_dma_stop;
+        tusb_dma->controller.channel_alloc = tusb_omap_dma_allocate;
+        tusb_dma->controller.channel_release = tusb_omap_dma_release;
+        tusb_dma->controller.channel_program = tusb_omap_dma_program;
+        tusb_dma->controller.channel_abort = tusb_omap_dma_abort;
+
+        if (tusb_get_revision(musb) >= TUSB_REV_30)
+                tusb_dma->multichannel = 1;
+
+        for (i = 0; i < MAX_DMAREQ; i++) {
+                struct dma_channel      *ch;
+                struct tusb_omap_dma_ch *chdat;
+
+                ch = kzalloc(sizeof(struct dma_channel), GFP_KERNEL);
+                if (!ch)
+                        goto cleanup;
+
+                dma_channel_pool[i] = ch;
+
+                chdat = kzalloc(sizeof(struct tusb_omap_dma_ch), GFP_KERNEL);
+                if (!chdat)
+                        goto cleanup;
+
+                ch->status = MUSB_DMA_STATUS_UNKNOWN;
+                ch->private_data = chdat;
+        }
+
+        return &tusb_dma->controller;
+
+cleanup:
+        dma_controller_destroy(&tusb_dma->controller);
+
+        return NULL;
+}
diff --git a/drivers/usb/serial/Kconfig b/drivers/usb/serial/Kconfig
index 8878c1767fc8..70338f4ec918 100644
--- a/drivers/usb/serial/Kconfig
+++ b/drivers/usb/serial/Kconfig
@@ -499,9 +499,10 @@ config USB_SERIAL_SAFE_PADDED
 config USB_SERIAL_SIERRAWIRELESS
         tristate "USB Sierra Wireless Driver"
         help
-          Say M here if you want to use a Sierra Wireless device (if
-          using an PC 5220 or AC580 please use the Airprime driver
-          instead).
+          Say M here if you want to use Sierra Wireless devices.
+
+          Many deviecs have a feature known as TRU-Install, for those devices
+          to work properly the USB Storage Sierra feature must be enabled.
 
           To compile this driver as a module, choose M here: the
           module will be called sierra.
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 838717250145..984f6eff4c47 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -563,6 +563,7 @@ static struct usb_device_id id_table_combined [] = {
         { USB_DEVICE(FTDI_VID, FTDI_ELV_FHZ1300PC_PID) },
         { USB_DEVICE(FTDI_VID, FTDI_ELV_EM1010PC_PID) },
         { USB_DEVICE(FTDI_VID, FTDI_ELV_WS500_PID) },
+        { USB_DEVICE(FTDI_VID, FTDI_ELV_HS485_PID) },
         { USB_DEVICE(FTDI_VID, LINX_SDMUSBQSS_PID) },
         { USB_DEVICE(FTDI_VID, LINX_MASTERDEVEL2_PID) },
         { USB_DEVICE(FTDI_VID, LINX_FUTURE_0_PID) },
@@ -637,6 +638,7 @@ static struct usb_device_id id_table_combined [] = {
         { USB_DEVICE(ELEKTOR_VID, ELEKTOR_FT323R_PID) },
         { USB_DEVICE(TELLDUS_VID, TELLDUS_TELLSTICK_PID) },
         { USB_DEVICE(FTDI_VID, FTDI_MAXSTREAM_PID) },
+        { USB_DEVICE(FTDI_VID, FTDI_PHI_FISCO_PID) },
         { USB_DEVICE(TML_VID, TML_USB_SERIAL_PID) },
         { USB_DEVICE(FTDI_VID, FTDI_ELSTER_UNICOM_PID) },
         { USB_DEVICE(FTDI_VID, FTDI_PROPOX_JTAGCABLEII_PID) },
@@ -646,6 +648,10 @@ static struct usb_device_id id_table_combined [] = {
                 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
         { USB_DEVICE(FTDI_VID, FTDI_OOCDLINK_PID),
                 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+        { USB_DEVICE(FTDI_VID, LMI_LM3S_DEVEL_BOARD_PID),
+                .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+        { USB_DEVICE(FTDI_VID, LMI_LM3S_EVAL_BOARD_PID),
+                .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
         { USB_DEVICE(RATOC_VENDOR_ID, RATOC_PRODUCT_ID_USB60F) },
         { USB_DEVICE(FTDI_VID, FTDI_REU_TINY_PID) },
         { },                                    /* Optional parameter entry */
diff --git a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h
index a577ea44dcf9..382265bba969 100644
--- a/drivers/usb/serial/ftdi_sio.h
+++ b/drivers/usb/serial/ftdi_sio.h
@@ -524,7 +524,9 @@
 #define FTDI_ELV_WS300PC_PID    0xE0F6  /* PC-Wetterstation (WS 300 PC) */
 #define FTDI_ELV_FHZ1300PC_PID  0xE0E8  /* FHZ 1300 PC */
 #define FTDI_ELV_WS500_PID      0xE0E9  /* PC-Wetterstation (WS 500) */
+#define FTDI_ELV_HS485_PID      0xE0EA  /* USB to RS-485 adapter */
 #define FTDI_ELV_EM1010PC_PID   0xE0EF  /* Engery monitor EM 1010 PC */
+#define FTDI_PHI_FISCO_PID      0xE40B  /* PHI Fisco USB to Serial cable */
 
 /*
  * Definitions for ID TECH (www.idt-net.com) devices
@@ -815,6 +817,11 @@
 #define OLIMEX_VID                      0x15BA
 #define OLIMEX_ARM_USB_OCD_PID          0x0003
 
+/* Luminary Micro Stellaris Boards, VID = FTDI_VID */
+/* FTDI 2332C Dual channel device, side A=245 FIFO (JTAG), Side B=RS232 UART */
+#define LMI_LM3S_DEVEL_BOARD_PID        0xbcd8
+#define LMI_LM3S_EVAL_BOARD_PID         0xbcd9
+
 /* www.elsterelectricity.com Elster Unicom III Optical Probe */
 #define FTDI_ELSTER_UNICOM_PID          0xE700 /* Product Id */
 
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index e4eca95f2b0f..e143198aeb02 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -186,6 +186,23 @@ static int  option_send_setup(struct tty_struct *tty, struct usb_serial_port *po
 #define BANDRICH_VENDOR_ID                      0x1A8D
 #define BANDRICH_PRODUCT_C100_1                 0x1002
 #define BANDRICH_PRODUCT_C100_2                 0x1003
+#define BANDRICH_PRODUCT_1004                   0x1004
+#define BANDRICH_PRODUCT_1005                   0x1005
+#define BANDRICH_PRODUCT_1006                   0x1006
+#define BANDRICH_PRODUCT_1007                   0x1007
+#define BANDRICH_PRODUCT_1008                   0x1008
+#define BANDRICH_PRODUCT_1009                   0x1009
+#define BANDRICH_PRODUCT_100A                   0x100a
+
+#define BANDRICH_PRODUCT_100B                   0x100b
+#define BANDRICH_PRODUCT_100C                   0x100c
+#define BANDRICH_PRODUCT_100D                   0x100d
+#define BANDRICH_PRODUCT_100E                   0x100e
+
+#define BANDRICH_PRODUCT_100F                   0x100f
+#define BANDRICH_PRODUCT_1010                   0x1010
+#define BANDRICH_PRODUCT_1011                   0x1011
+#define BANDRICH_PRODUCT_1012                   0x1012
 
 #define AMOI_VENDOR_ID                  0x1614
 #define AMOI_PRODUCT_9508                       0x0800
@@ -197,6 +214,10 @@ static int  option_send_setup(struct tty_struct *tty, struct usb_serial_port *po
 #define TELIT_VENDOR_ID                         0x1bc7
 #define TELIT_PRODUCT_UC864E                    0x1003
 
+/* ZTE PRODUCTS */
+#define ZTE_VENDOR_ID                           0x19d2
+#define ZTE_PRODUCT_MF628                       0x0015
+
 static struct usb_device_id option_ids[] = {
         { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) },
         { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) },
@@ -302,12 +323,28 @@ static struct usb_device_id option_ids[] = {
         { USB_DEVICE(ONDA_VENDOR_ID, ONDA_PRODUCT_ET502HS) },
         { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_C100_1) },
         { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_C100_2) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1004) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1005) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1006) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1007) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1008) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1009) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_100A) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_100B) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_100C) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_100D) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_100E) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_100F) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1010) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1011) },
+        { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_1012) },
         { USB_DEVICE(KYOCERA_VENDOR_ID, KYOCERA_PRODUCT_KPC650) },
         { USB_DEVICE(KYOCERA_VENDOR_ID, KYOCERA_PRODUCT_KPC680) },
         { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6000)}, /* ZTE AC8700 */
         { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */
         { USB_DEVICE(MAXON_VENDOR_ID, 0x6280) }, /* BP3-USB & BP3-EXT HSDPA */
         { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) },
+        { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_MF628) },
         { } /* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, option_ids);
@@ -346,11 +383,7 @@ static struct usb_serial_driver option_1port_device = {
         .read_int_callback = option_instat_callback,
 };
 
-#ifdef CONFIG_USB_DEBUG
 static int debug;
-#else
-#define debug 0
-#endif
 
 /* per port private data */
 
@@ -954,8 +987,5 @@ MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_VERSION(DRIVER_VERSION);
 MODULE_LICENSE("GPL");
 
-#ifdef CONFIG_USB_DEBUG
 module_param(debug, bool, S_IRUGO | S_IWUSR);
 MODULE_PARM_DESC(debug, "Debug messages");
-#endif
-
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index 2c9c446ad625..1ede1441cb1b 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -90,7 +90,6 @@ static struct usb_device_id id_table [] = {
         { USB_DEVICE(ALCOR_VENDOR_ID, ALCOR_PRODUCT_ID) },
         { USB_DEVICE(WS002IN_VENDOR_ID, WS002IN_PRODUCT_ID) },
         { USB_DEVICE(COREGA_VENDOR_ID, COREGA_PRODUCT_ID) },
-        { USB_DEVICE(HL340_VENDOR_ID, HL340_PRODUCT_ID) },
         { USB_DEVICE(YCCABLE_VENDOR_ID, YCCABLE_PRODUCT_ID) },
         { }                                     /* Terminating entry */
 };
diff --git a/drivers/usb/serial/pl2303.h b/drivers/usb/serial/pl2303.h
index 6ac3bbcf7a22..a3bd039c78e9 100644
--- a/drivers/usb/serial/pl2303.h
+++ b/drivers/usb/serial/pl2303.h
@@ -107,10 +107,6 @@
 #define COREGA_VENDOR_ID        0x07aa
 #define COREGA_PRODUCT_ID       0x002a
 
-/* HL HL-340 (ID: 4348:5523) */
-#define HL340_VENDOR_ID         0x4348
-#define HL340_PRODUCT_ID        0x5523
-
 /* Y.C. Cable U.S.A., Inc - USB to RS-232 */
 #define YCCABLE_VENDOR_ID       0x05ad
 #define YCCABLE_PRODUCT_ID      0x0fba
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index 2f6f1523ec56..706033753adb 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -14,7 +14,7 @@
   Whom based his on the Keyspan driver by Hugh Blemings <hugh@blemings.org>
 */
 
-#define DRIVER_VERSION "v.1.2.9c"
+#define DRIVER_VERSION "v.1.2.13a"
 #define DRIVER_AUTHOR "Kevin Lloyd <klloyd@sierrawireless.com>"
 #define DRIVER_DESC "USB Driver for Sierra Wireless USB modems"
 
@@ -31,6 +31,7 @@
 #define SWIMS_USB_REQUEST_SetPower      0x00
 #define SWIMS_USB_REQUEST_SetNmea       0x07
 #define SWIMS_USB_REQUEST_SetMode       0x0B
+#define SWIMS_USB_REQUEST_GetSwocInfo   0x0A
 #define SWIMS_SET_MODE_Modem            0x0001
 
 /* per port private data */
@@ -40,18 +41,11 @@
 
 static int debug;
 static int nmea;
-static int truinstall = 1;
-
-enum devicetype {
-        DEVICE_3_PORT =         0,
-        DEVICE_1_PORT =         1,
-        DEVICE_INSTALLER =      2,
-};
 
 static int sierra_set_power_state(struct usb_device *udev, __u16 swiState)
 {
         int result;
-        dev_dbg(&udev->dev, "%s", "SET POWER STATE\n");
+        dev_dbg(&udev->dev, "%s", __func__);
         result = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
                         SWIMS_USB_REQUEST_SetPower,     /* __u8 request      */
                         USB_TYPE_VENDOR,                /* __u8 request type */
@@ -63,25 +57,10 @@ static int sierra_set_power_state(struct usb_device *udev, __u16 swiState)
         return result;
 }
 
-static int sierra_set_ms_mode(struct usb_device *udev, __u16 eSWocMode)
-{
-        int result;
-        dev_dbg(&udev->dev, "%s", "DEVICE MODE SWITCH\n");
-        result = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
-                        SWIMS_USB_REQUEST_SetMode,      /* __u8 request      */
-                        USB_TYPE_VENDOR,                /* __u8 request type */
-                        eSWocMode,                      /* __u16 value       */
-                        0x0000,                         /* __u16 index       */
-                        NULL,                           /* void *data        */
-                        0,                              /* __u16 size        */
-                        USB_CTRL_SET_TIMEOUT);          /* int timeout       */
-        return result;
-}
-
 static int sierra_vsc_set_nmea(struct usb_device *udev, __u16 enable)
 {
         int result;
-        dev_dbg(&udev->dev, "%s", "NMEA Enable sent\n");
+        dev_dbg(&udev->dev, "%s", __func__);
         result = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
                         SWIMS_USB_REQUEST_SetNmea,      /* __u8 request      */
                         USB_TYPE_VENDOR,                /* __u8 request type */
@@ -97,6 +76,7 @@ static int sierra_calc_num_ports(struct usb_serial *serial)
 {
         int result;
         int *num_ports = usb_get_serial_data(serial);
+        dev_dbg(&serial->dev->dev, "%s", __func__);
 
         result = *num_ports;
 
@@ -110,22 +90,23 @@ static int sierra_calc_num_ports(struct usb_serial *serial)
 
 static int sierra_calc_interface(struct usb_serial *serial)
 {
-                int interface;
-                struct usb_interface *p_interface;
-                struct usb_host_interface *p_host_interface;
+        int interface;
+        struct usb_interface *p_interface;
+        struct usb_host_interface *p_host_interface;
+        dev_dbg(&serial->dev->dev, "%s", __func__);
 
-                /* Get the interface structure pointer from the serial struct */
-                p_interface = serial->interface;
+        /* Get the interface structure pointer from the serial struct */
+        p_interface = serial->interface;
 
-                /* Get a pointer to the host interface structure */
-                p_host_interface = p_interface->cur_altsetting;
+        /* Get a pointer to the host interface structure */
+        p_host_interface = p_interface->cur_altsetting;
 
-                /* read the interface descriptor for this active altsetting
-                 * to find out the interface number we are on
-                */
-                interface = p_host_interface->desc.bInterfaceNumber;
+        /* read the interface descriptor for this active altsetting
+         * to find out the interface number we are on
+        */
+        interface = p_host_interface->desc.bInterfaceNumber;
 
-                return interface;
+        return interface;
 }
 
 static int sierra_probe(struct usb_serial *serial,
@@ -135,43 +116,40 @@ static int sierra_probe(struct usb_serial *serial,
         struct usb_device *udev;
         int *num_ports;
         u8 ifnum;
+        u8 numendpoints;
+
+        dev_dbg(&serial->dev->dev, "%s", __func__);
 
         num_ports = kmalloc(sizeof(*num_ports), GFP_KERNEL);
         if (!num_ports)
                 return -ENOMEM;
 
         ifnum = serial->interface->cur_altsetting->desc.bInterfaceNumber;
+        numendpoints = serial->interface->cur_altsetting->desc.bNumEndpoints;
         udev = serial->dev;
 
-                /* Figure out the interface number from the serial structure */
-                ifnum = sierra_calc_interface(serial);
-
-                /*
-                 * If this interface supports more than 1 alternate
-                 * select the 2nd one
-                 */
-                if (serial->interface->num_altsetting == 2) {
-                        dev_dbg(&udev->dev,
-                                "Selecting alt setting for interface %d\n",
-                                ifnum);
+        /* Figure out the interface number from the serial structure */
+        ifnum = sierra_calc_interface(serial);
 
-                        /* We know the alternate setting is 1 for the MC8785 */
-                        usb_set_interface(udev, ifnum, 1);
-                }
+        /*
+         * If this interface supports more than 1 alternate
+         * select the 2nd one
+         */
+        if (serial->interface->num_altsetting == 2) {
+                dev_dbg(&udev->dev, "Selecting alt setting for interface %d\n",
+                        ifnum);
+                /* We know the alternate setting is 1 for the MC8785 */
+                usb_set_interface(udev, ifnum, 1);
+        }
 
-        /* Check if in installer mode */
-        if (truinstall && id->driver_info == DEVICE_INSTALLER) {
-                dev_dbg(&udev->dev, "%s", "FOUND TRU-INSTALL DEVICE(SW)\n");
-                result = sierra_set_ms_mode(udev, SWIMS_SET_MODE_Modem);
-                /* Don't bind to the device when in installer mode */
-                kfree(num_ports);
-                return -EIO;
-        } else if (id->driver_info == DEVICE_1_PORT)
-                *num_ports = 1;
-        else if (ifnum == 0x99)
+        /* Dummy interface present on some SKUs should be ignored */
+        if (ifnum == 0x99)
                 *num_ports = 0;
+        else if (numendpoints <= 3)
+                *num_ports = 1;
         else
-                *num_ports = 3;
+                *num_ports = (numendpoints-1)/2;
+
         /*
          * save off our num_ports info so that we can use it in the
          * calc_num_ports callback
@@ -187,40 +165,50 @@ static struct usb_device_id id_table [] = {
         { USB_DEVICE(0x1199, 0x0218) }, /* Sierra Wireless MC5720 */
         { USB_DEVICE(0x0f30, 0x1b1d) }, /* Sierra Wireless MC5720 */
         { USB_DEVICE(0x1199, 0x0020) }, /* Sierra Wireless MC5725 */
+        { USB_DEVICE(0x1199, 0x0024) }, /* Sierra Wireless MC5727 */
         { USB_DEVICE(0x1199, 0x0220) }, /* Sierra Wireless MC5725 */
         { USB_DEVICE(0x1199, 0x0019) }, /* Sierra Wireless AirCard 595 */
         { USB_DEVICE(0x1199, 0x0021) }, /* Sierra Wireless AirCard 597E */
         { USB_DEVICE(0x1199, 0x0120) }, /* Sierra Wireless USB Dongle 595U */
-        { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x0023, 0xFF, 0xFF, 0xFF) }, /* Sierra Wireless C597 */
+         /* Sierra Wireless C597 */
+        { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x0023, 0xFF, 0xFF, 0xFF) },
+         /* Sierra Wireless Device */
+        { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x0025, 0xFF, 0xFF, 0xFF) },
+        { USB_DEVICE(0x1199, 0x0026) }, /* Sierra Wireless Device */
 
         { USB_DEVICE(0x1199, 0x6802) }, /* Sierra Wireless MC8755 */
         { USB_DEVICE(0x1199, 0x6804) }, /* Sierra Wireless MC8755 */
         { USB_DEVICE(0x1199, 0x6803) }, /* Sierra Wireless MC8765 */
         { USB_DEVICE(0x1199, 0x6812) }, /* Sierra Wireless MC8775 & AC 875U */
-        { USB_DEVICE(0x1199, 0x6813) }, /* Sierra Wireless MC8775 (Thinkpad internal) */
+        { USB_DEVICE(0x1199, 0x6813) }, /* Sierra Wireless MC8775 (Lenovo) */
         { USB_DEVICE(0x1199, 0x6815) }, /* Sierra Wireless MC8775 */
         { USB_DEVICE(0x03f0, 0x1e1d) }, /* HP hs2300 a.k.a MC8775 */
         { USB_DEVICE(0x1199, 0x6820) }, /* Sierra Wireless AirCard 875 */
         { USB_DEVICE(0x1199, 0x6821) }, /* Sierra Wireless AirCard 875U */
-        { USB_DEVICE(0x1199, 0x6832) }, /* Sierra Wireless MC8780*/
-        { USB_DEVICE(0x1199, 0x6833) }, /* Sierra Wireless MC8781*/
-        { USB_DEVICE(0x1199, 0x683B), .driver_info = DEVICE_1_PORT },   /* Sierra Wireless MC8785 Composite*/
+        { USB_DEVICE(0x1199, 0x6832) }, /* Sierra Wireless MC8780 */
+        { USB_DEVICE(0x1199, 0x6833) }, /* Sierra Wireless MC8781 */
+        { USB_DEVICE(0x1199, 0x683B) }, /* Sierra Wireless MC8785 Composite */
+        { USB_DEVICE(0x1199, 0x683C) }, /* Sierra Wireless MC8790 */
+        { USB_DEVICE(0x1199, 0x683D) }, /* Sierra Wireless MC8790 */
+        { USB_DEVICE(0x1199, 0x683E) }, /* Sierra Wireless MC8790 */
         { USB_DEVICE(0x1199, 0x6850) }, /* Sierra Wireless AirCard 880 */
         { USB_DEVICE(0x1199, 0x6851) }, /* Sierra Wireless AirCard 881 */
         { USB_DEVICE(0x1199, 0x6852) }, /* Sierra Wireless AirCard 880 E */
         { USB_DEVICE(0x1199, 0x6853) }, /* Sierra Wireless AirCard 881 E */
         { USB_DEVICE(0x1199, 0x6855) }, /* Sierra Wireless AirCard 880 U */
         { USB_DEVICE(0x1199, 0x6856) }, /* Sierra Wireless AirCard 881 U */
-        { USB_DEVICE(0x1199, 0x6859), .driver_info = DEVICE_1_PORT },   /* Sierra Wireless AirCard 885 E */
-        { USB_DEVICE(0x1199, 0x685A), .driver_info = DEVICE_1_PORT },   /* Sierra Wireless AirCard 885 E */
-
-        { USB_DEVICE(0x1199, 0x6468) }, /* Sierra Wireless MP3G - EVDO */
-        { USB_DEVICE(0x1199, 0x6469) }, /* Sierra Wireless MP3G - UMTS/HSPA */
-
-        { USB_DEVICE(0x1199, 0x0112), .driver_info = DEVICE_1_PORT }, /* Sierra Wireless AirCard 580 */
-        { USB_DEVICE(0x0F3D, 0x0112), .driver_info = DEVICE_1_PORT }, /* Airprime/Sierra PC 5220 */
+        { USB_DEVICE(0x1199, 0x6859) }, /* Sierra Wireless AirCard 885 E */
+        { USB_DEVICE(0x1199, 0x685A) }, /* Sierra Wireless AirCard 885 E */
+        /* Sierra Wireless C885 */
+        { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x6880, 0xFF, 0xFF, 0xFF)},
+        /* Sierra Wireless Device */
+        { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x6890, 0xFF, 0xFF, 0xFF)},
+        /* Sierra Wireless Device */
+        { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x6892, 0xFF, 0xFF, 0xFF)},
+
+        { USB_DEVICE(0x1199, 0x0112) }, /* Sierra Wireless AirCard 580 */
+        { USB_DEVICE(0x0F3D, 0x0112) }, /* Airprime/Sierra PC 5220 */
 
-        { USB_DEVICE(0x1199, 0x0FFF), .driver_info = DEVICE_INSTALLER},
         { }
 };
 MODULE_DEVICE_TABLE(usb, id_table);
@@ -268,13 +256,19 @@ static int sierra_send_setup(struct tty_struct *tty,
                 if (portdata->rts_state)
                         val |= 0x02;
 
-                /* Determine which port is targeted */
-                if (port->bulk_out_endpointAddress == 2)
-                        interface = 0;
-                else if (port->bulk_out_endpointAddress == 4)
-                        interface = 1;
-                else if (port->bulk_out_endpointAddress == 5)
-                        interface = 2;
+                /* If composite device then properly report interface */
+                if (serial->num_ports == 1)
+                        interface = sierra_calc_interface(serial);
+
+                /* Otherwise the need to do non-composite mapping */
+                else {
+                        if (port->bulk_out_endpointAddress == 2)
+                                interface = 0;
+                        else if (port->bulk_out_endpointAddress == 4)
+                                interface = 1;
+                        else if (port->bulk_out_endpointAddress == 5)
+                                interface = 2;
+                }
 
                 return usb_control_msg(serial->dev,
                                 usb_rcvctrlpipe(serial->dev, 0),
@@ -713,7 +707,7 @@ static void sierra_shutdown(struct usb_serial *serial)
 static struct usb_serial_driver sierra_device = {
         .driver = {
                 .owner =        THIS_MODULE,
-                .name =         "sierra1",
+                .name =         "sierra",
         },
         .description       = "Sierra USB modem",
         .id_table          = id_table,
@@ -769,14 +763,8 @@ MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_VERSION(DRIVER_VERSION);
 MODULE_LICENSE("GPL");
 
-module_param(truinstall, bool, 0);
-MODULE_PARM_DESC(truinstall, "TRU-Install support");
-
-module_param(nmea, bool, 0);
+module_param(nmea, bool, S_IRUGO | S_IWUSR);
 MODULE_PARM_DESC(nmea, "NMEA streaming");
 
-#ifdef CONFIG_USB_DEBUG
 module_param(debug, bool, S_IRUGO | S_IWUSR);
 MODULE_PARM_DESC(debug, "Debug messages");
-#endif
-
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index 8c2d531eedea..b157c48e8b78 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -122,9 +122,6 @@ static void return_serial(struct usb_serial *serial)
 
         dbg("%s", __func__);
 
-        if (serial == NULL)
-                return;
-
         for (i = 0; i < serial->num_ports; ++i)
                 serial_table[serial->minor + i] = NULL;
 }
@@ -142,7 +139,8 @@ static void destroy_serial(struct kref *kref)
         serial->type->shutdown(serial);
 
         /* return the minor range that this device had */
-        return_serial(serial);
+        if (serial->minor != SERIAL_TTY_NO_MINOR)
+                return_serial(serial);
 
         for (i = 0; i < serial->num_ports; ++i)
                 serial->port[i]->port.count = 0;
@@ -575,6 +573,7 @@ static struct usb_serial *create_serial(struct usb_device *dev,
         serial->interface = interface;
         kref_init(&serial->kref);
         mutex_init(&serial->disc_mutex);
+        serial->minor = SERIAL_TTY_NO_MINOR;
 
         return serial;
 }
diff --git a/drivers/usb/storage/Kconfig b/drivers/usb/storage/Kconfig
index 3d9249632ae1..c76034672c18 100644
--- a/drivers/usb/storage/Kconfig
+++ b/drivers/usb/storage/Kconfig
@@ -146,6 +146,18 @@ config USB_STORAGE_KARMA
           on the resulting scsi device node returns the Karma to normal
           operation.
 
+config USB_STORAGE_SIERRA
+        bool "Sierra Wireless TRU-Install Feature Support"
+        depends on USB_STORAGE
+        help
+          Say Y here to include additional code to support Sierra Wireless
+          products with the TRU-Install feature (e.g., AC597E, AC881U).
+
+          This code switches the Sierra Wireless device from being in
+          Mass Storage mode to Modem mode. It also has the ability to
+          support host software upgrades should full Linux support be added
+          to TRU-Install.
+
 config USB_STORAGE_CYPRESS_ATACB
         bool "SAT emulation on Cypress USB/ATA Bridge with ATACB"
         depends on USB_STORAGE
diff --git a/drivers/usb/storage/Makefile b/drivers/usb/storage/Makefile
index 4c596c766c53..bc3415b475c9 100644
--- a/drivers/usb/storage/Makefile
+++ b/drivers/usb/storage/Makefile
@@ -21,6 +21,7 @@ usb-storage-obj-$(CONFIG_USB_STORAGE_JUMPSHOT)	+= jumpshot.o
 usb-storage-obj-$(CONFIG_USB_STORAGE_ALAUDA)    += alauda.o
 usb-storage-obj-$(CONFIG_USB_STORAGE_ONETOUCH)  += onetouch.o
 usb-storage-obj-$(CONFIG_USB_STORAGE_KARMA)     += karma.o
+usb-storage-obj-$(CONFIG_USB_STORAGE_SIERRA)    += sierra_ms.o
 usb-storage-obj-$(CONFIG_USB_STORAGE_CYPRESS_ATACB) += cypress_atacb.o
 
 usb-storage-objs :=     scsiglue.o protocol.o transport.o usb.o \
diff --git a/drivers/usb/storage/sierra_ms.c b/drivers/usb/storage/sierra_ms.c
new file mode 100644
index 000000000000..4359a2cb42df
--- /dev/null
+++ b/drivers/usb/storage/sierra_ms.c
@@ -0,0 +1,207 @@
+#include <scsi/scsi.h>
+#include <scsi/scsi_host.h>
+#include <scsi/scsi_cmnd.h>
+#include <scsi/scsi_device.h>
+#include <linux/usb.h>
+
+#include "usb.h"
+#include "transport.h"
+#include "protocol.h"
+#include "scsiglue.h"
+#include "sierra_ms.h"
+#include "debug.h"
+
+#define SWIMS_USB_REQUEST_SetSwocMode   0x0B
+#define SWIMS_USB_REQUEST_GetSwocInfo   0x0A
+#define SWIMS_USB_INDEX_SetMode         0x0000
+#define SWIMS_SET_MODE_Modem            0x0001
+
+#define TRU_NORMAL                      0x01
+#define TRU_FORCE_MS                    0x02
+#define TRU_FORCE_MODEM                 0x03
+
+static unsigned int swi_tru_install = 1;
+module_param(swi_tru_install, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(swi_tru_install, "TRU-Install mode (1=Full Logic (def),"
+                 " 2=Force CD-Rom, 3=Force Modem)");
+
+struct swoc_info {
+        __u8 rev;
+        __u8 reserved[8];
+        __u16 LinuxSKU;
+        __u16 LinuxVer;
+        __u8 reserved2[47];
+} __attribute__((__packed__));
+
+static bool containsFullLinuxPackage(struct swoc_info *swocInfo)
+{
+        if ((swocInfo->LinuxSKU >= 0x2100 && swocInfo->LinuxSKU <= 0x2FFF) ||
+           (swocInfo->LinuxSKU >= 0x7100 && swocInfo->LinuxSKU <= 0x7FFF))
+                return true;
+        else
+                return false;
+}
+
+static int sierra_set_ms_mode(struct usb_device *udev, __u16 eSWocMode)
+{
+        int result;
+        US_DEBUGP("SWIMS: %s", "DEVICE MODE SWITCH\n");
+        result = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
+                        SWIMS_USB_REQUEST_SetSwocMode,  /* __u8 request      */
+                        USB_TYPE_VENDOR | USB_DIR_OUT,  /* __u8 request type */
+                        eSWocMode,                      /* __u16 value       */
+                        0x0000,                         /* __u16 index       */
+                        NULL,                           /* void *data        */
+                        0,                              /* __u16 size        */
+                        USB_CTRL_SET_TIMEOUT);          /* int timeout       */
+        return result;
+}
+
+
+static int sierra_get_swoc_info(struct usb_device *udev,
+                                struct swoc_info *swocInfo)
+{
+        int result;
+
+        US_DEBUGP("SWIMS: Attempting to get TRU-Install info.\n");
+
+        result = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
+                        SWIMS_USB_REQUEST_GetSwocInfo,  /* __u8 request      */
+                        USB_TYPE_VENDOR | USB_DIR_IN,   /* __u8 request type */
+                        0,                              /* __u16 value       */
+                        0,                              /* __u16 index       */
+                        (void *) swocInfo,              /* void *data        */
+                        sizeof(struct swoc_info),       /* __u16 size        */
+                        USB_CTRL_SET_TIMEOUT);          /* int timeout       */
+
+        swocInfo->LinuxSKU = le16_to_cpu(swocInfo->LinuxSKU);
+        swocInfo->LinuxVer = le16_to_cpu(swocInfo->LinuxVer);
+        return result;
+}
+
+static void debug_swoc(struct swoc_info *swocInfo)
+{
+        US_DEBUGP("SWIMS: SWoC Rev: %02d \n", swocInfo->rev);
+        US_DEBUGP("SWIMS: Linux SKU: %04X \n", swocInfo->LinuxSKU);
+        US_DEBUGP("SWIMS: Linux Version: %04X \n", swocInfo->LinuxVer);
+}
+
+
+static ssize_t show_truinst(struct device *dev, struct device_attribute *attr,
+                        char *buf)
+{
+        struct swoc_info *swocInfo;
+        struct usb_interface *intf = to_usb_interface(dev);
+        struct usb_device *udev = interface_to_usbdev(intf);
+        int result;
+        if (swi_tru_install == TRU_FORCE_MS) {
+                result = snprintf(buf, PAGE_SIZE, "Forced Mass Storage\n");
+        } else {
+                swocInfo = kmalloc(sizeof(struct swoc_info), GFP_KERNEL);
+                if (!swocInfo) {
+                        US_DEBUGP("SWIMS: Allocation failure\n");
+                        snprintf(buf, PAGE_SIZE, "Error\n");
+                        return -ENOMEM;
+                }
+                result = sierra_get_swoc_info(udev, swocInfo);
+                if (result < 0) {
+                        US_DEBUGP("SWIMS: failed SWoC query\n");
+                        kfree(swocInfo);
+                        snprintf(buf, PAGE_SIZE, "Error\n");
+                        return -EIO;
+                }
+                debug_swoc(swocInfo);
+                result = snprintf(buf, PAGE_SIZE,
+                        "REV=%02d SKU=%04X VER=%04X\n",
+                        swocInfo->rev,
+                        swocInfo->LinuxSKU,
+                        swocInfo->LinuxVer);
+                kfree(swocInfo);
+        }
+        return result;
+}
+static DEVICE_ATTR(truinst, S_IWUGO | S_IRUGO, show_truinst, NULL);
+
+int sierra_ms_init(struct us_data *us)
+{
+        int result, retries;
+        signed long delay_t;
+        struct swoc_info *swocInfo;
+        struct usb_device *udev;
+        struct Scsi_Host *sh;
+        struct scsi_device *sd;
+
+        delay_t = 2;
+        retries = 3;
+        result = 0;
+        udev = us->pusb_dev;
+
+        sh = us_to_host(us);
+        sd = scsi_get_host_dev(sh);
+
+        US_DEBUGP("SWIMS: sierra_ms_init called\n");
+
+        /* Force Modem mode */
+        if (swi_tru_install == TRU_FORCE_MODEM) {
+                US_DEBUGP("SWIMS: %s", "Forcing Modem Mode\n");
+                result = sierra_set_ms_mode(udev, SWIMS_SET_MODE_Modem);
+                if (result < 0)
+                        US_DEBUGP("SWIMS: Failed to switch to modem mode.\n");
+                return -EIO;
+        }
+        /* Force Mass Storage mode (keep CD-Rom) */
+        else if (swi_tru_install == TRU_FORCE_MS) {
+                US_DEBUGP("SWIMS: %s", "Forcing Mass Storage Mode\n");
+                goto complete;
+        }
+        /* Normal TRU-Install Logic */
+        else {
+                US_DEBUGP("SWIMS: %s", "Normal SWoC Logic\n");
+
+                swocInfo = kmalloc(sizeof(struct swoc_info),
+                                GFP_KERNEL);
+                if (!swocInfo) {
+                        US_DEBUGP("SWIMS: %s", "Allocation failure\n");
+                        return -ENOMEM;
+                }
+
+                retries = 3;
+                do {
+                        retries--;
+                        result = sierra_get_swoc_info(udev, swocInfo);
+                        if (result < 0) {
+                                US_DEBUGP("SWIMS: %s", "Failed SWoC query\n");
+                                schedule_timeout_uninterruptible(2*HZ);
+                        }
+                } while (retries && result < 0);
+
+                if (result < 0) {
+                        US_DEBUGP("SWIMS: %s",
+                                  "Completely failed SWoC query\n");
+                        kfree(swocInfo);
+                        return -EIO;
+                }
+
+                debug_swoc(swocInfo);
+
+                /* If there is not Linux software on the TRU-Install device
+                 * then switch to modem mode
+                 */
+                if (!containsFullLinuxPackage(swocInfo)) {
+                        US_DEBUGP("SWIMS: %s",
+                                "Switching to Modem Mode\n");
+                        result = sierra_set_ms_mode(udev,
+                                SWIMS_SET_MODE_Modem);
+                        if (result < 0)
+                                US_DEBUGP("SWIMS: Failed to switch modem\n");
+                        kfree(swocInfo);
+                        return -EIO;
+                }
+                kfree(swocInfo);
+        }
+complete:
+        result = device_create_file(&us->pusb_intf->dev, &dev_attr_truinst);
+
+        return USB_STOR_TRANSPORT_GOOD;
+}
+
diff --git a/drivers/usb/storage/sierra_ms.h b/drivers/usb/storage/sierra_ms.h
new file mode 100644
index 000000000000..bb48634ac1fc
--- /dev/null
+++ b/drivers/usb/storage/sierra_ms.h
@@ -0,0 +1,4 @@
+#ifndef _SIERRA_MS_H_
+#define _SIERRA_MS_H_
+extern int sierra_ms_init(struct us_data *us);
+#endif
diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c
index fcbbfdb7b2b0..3523a0bfa0ff 100644
--- a/drivers/usb/storage/transport.c
+++ b/drivers/usb/storage/transport.c
@@ -1032,8 +1032,21 @@ int usb_stor_Bulk_transport(struct scsi_cmnd *srb, struct us_data *us)
 
         /* try to compute the actual residue, based on how much data
          * was really transferred and what the device tells us */
-        if (residue) {
-                if (!(us->fflags & US_FL_IGNORE_RESIDUE)) {
+        if (residue && !(us->fflags & US_FL_IGNORE_RESIDUE)) {
+
+                /* Heuristically detect devices that generate bogus residues
+                 * by seeing what happens with INQUIRY and READ CAPACITY
+                 * commands.
+                 */
+                if (bcs->Status == US_BULK_STAT_OK &&
+                                scsi_get_resid(srb) == 0 &&
+                                        ((srb->cmnd[0] == INQUIRY &&
+                                                transfer_length == 36) ||
+                                        (srb->cmnd[0] == READ_CAPACITY &&
+                                                transfer_length == 8))) {
+                        us->fflags |= US_FL_IGNORE_RESIDUE;
+
+                } else {
                         residue = min(residue, transfer_length);
                         scsi_set_resid(srb, max(scsi_get_resid(srb),
                                                                (int) residue));
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
index 7ae69f55aa96..ba412e68d474 100644
--- a/drivers/usb/storage/unusual_devs.h
+++ b/drivers/usb/storage/unusual_devs.h
@@ -225,6 +225,13 @@ UNUSUAL_DEV(  0x0421, 0x0495, 0x0370, 0x0370,
                 US_SC_DEVICE, US_PR_DEVICE, NULL,
                 US_FL_MAX_SECTORS_64 ),
 
+/* Reported by Cedric Godin <cedric@belbone.be> */
+UNUSUAL_DEV(  0x0421, 0x04b9, 0x0551, 0x0551,
+                "Nokia",
+                "5300",
+                US_SC_DEVICE, US_PR_DEVICE, NULL,
+                US_FL_FIX_CAPACITY ),
+
 /* Reported by Olaf Hering <olh@suse.de> from novell bug #105878 */
 UNUSUAL_DEV(  0x0424, 0x0fdc, 0x0210, 0x0210,
                 "SMSC",
@@ -356,14 +363,14 @@ UNUSUAL_DEV(  0x04b0, 0x040f, 0x0100, 0x0200,
                 US_FL_FIX_CAPACITY),
 
 /* Reported by Emil Larsson <emil@swip.net> */
-UNUSUAL_DEV(  0x04b0, 0x0411, 0x0100, 0x0110,
+UNUSUAL_DEV(  0x04b0, 0x0411, 0x0100, 0x0111,
                 "NIKON",
                 "NIKON DSC D80",
                 US_SC_DEVICE, US_PR_DEVICE, NULL,
                 US_FL_FIX_CAPACITY),
 
 /* Reported by Ortwin Glueck <odi@odi.ch> */
-UNUSUAL_DEV(  0x04b0, 0x0413, 0x0110, 0x0110,
+UNUSUAL_DEV(  0x04b0, 0x0413, 0x0110, 0x0111,
                 "NIKON",
                 "NIKON DSC D40",
                 US_SC_DEVICE, US_PR_DEVICE, NULL,
@@ -1185,6 +1192,13 @@ UNUSUAL_DEV(  0x07c4, 0xa400, 0x0000, 0xffff,
                 US_SC_DEVICE, US_PR_DEVICE, NULL,
                 US_FL_FIX_INQUIRY ),
 
+/* Reported by Rauch Wolke <rauchwolke@gmx.net> */
+UNUSUAL_DEV(  0x07c4, 0xa4a5, 0x0000, 0xffff,
+                "Simple Tech/Datafab",
+                "CF+SM Reader",
+                US_SC_DEVICE, US_PR_DEVICE, NULL,
+                US_FL_IGNORE_RESIDUE ),
+
 /* Casio QV 2x00/3x00/4000/8000 digital still cameras are not conformant
  * to the USB storage specification in two ways:
  * - They tell us they are using transport protocol CBI. In reality they
@@ -1562,6 +1576,7 @@ UNUSUAL_DEV(  0x10d6, 0x2200, 0x0100, 0x0100,
                 US_SC_DEVICE, US_PR_DEVICE, NULL,
                 0),
 
+#ifdef CONFIG_USB_STORAGE_SIERRA
 /* Reported by Kevin Lloyd <linux@sierrawireless.com>
  * Entry is needed for the initializer function override,
  * which instructs the device to load as a modem
@@ -1570,8 +1585,9 @@ UNUSUAL_DEV(  0x10d6, 0x2200, 0x0100, 0x0100,
 UNUSUAL_DEV(  0x1199, 0x0fff, 0x0000, 0x9999,
                 "Sierra Wireless",
                 "USB MMC Storage",
-                US_SC_DEVICE, US_PR_DEVICE, NULL,
-                US_FL_IGNORE_DEVICE),
+                US_SC_DEVICE, US_PR_DEVICE, sierra_ms_init,
+                0),
+#endif
 
 /* Reported by Jaco Kroon <jaco@kroon.co.za>
  * The usb-storage module found on the Digitech GNX4 (and supposedly other
@@ -1743,6 +1759,15 @@ UNUSUAL_DEV(  0x22b8, 0x4810, 0x0001, 0x0002,
                 US_FL_FIX_CAPACITY),
 
 /*
+ * Patch by Jost Diederichs <jost@qdusa.com>
+ */
+UNUSUAL_DEV(0x22b8, 0x6410, 0x0001, 0x9999,
+                "Motorola Inc.",
+                "Motorola Phone (RAZRV3xx)",
+                US_SC_DEVICE, US_PR_DEVICE, NULL,
+                US_FL_FIX_CAPACITY),
+
+/*
  * Patch by Constantin Baranov <const@tltsu.ru>
  * Report by Andreas Koenecke.
  * Motorola ROKR Z6.
@@ -1767,6 +1792,13 @@ UNUSUAL_DEV(  0x2770, 0x915d, 0x0010, 0x0010,
                 US_SC_DEVICE, US_PR_DEVICE, NULL,
                 US_FL_FIX_CAPACITY ),
 
+/* Reported by Andrey Rahmatullin <wrar@altlinux.org> */
+UNUSUAL_DEV(  0x4102, 0x1020, 0x0100,  0x0100,
+                "iRiver",
+                "MP3 T10",
+                US_SC_DEVICE, US_PR_DEVICE, NULL,
+                US_FL_IGNORE_RESIDUE ),
+
 /*
  * David Härdeman <david@2gen.com>
  * The key makes the SCSI stack print confusing (but harmless) messages
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index bfea851be985..73679aa506de 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -102,6 +102,9 @@
 #ifdef CONFIG_USB_STORAGE_CYPRESS_ATACB
 #include "cypress_atacb.h"
 #endif
+#ifdef CONFIG_USB_STORAGE_SIERRA
+#include "sierra_ms.h"
+#endif
 
 /* Some informational data */
 MODULE_AUTHOR("Matthew Dharm <mdharm-usb@one-eyed-alien.net>");
diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c
index 017233d0c481..61c3d3f40fd1 100644
--- a/drivers/video/acornfb.c
+++ b/drivers/video/acornfb.c
@@ -29,7 +29,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -339,7 +339,7 @@ acornfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 #endif
 
 #ifdef HAS_VIDC20
-#include <asm/arch/acornfb.h>
+#include <mach/acornfb.h>
 
 #define MAX_SIZE        2*1024*1024
 
diff --git a/drivers/video/am200epd.c b/drivers/video/am200epd.c
index 32dd85126931..0c35b8b0160e 100644
--- a/drivers/video/am200epd.c
+++ b/drivers/video/am200epd.c
@@ -33,7 +33,7 @@
 
 #include <video/metronomefb.h>
 
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 
 /* register offsets for gpio control */
 #define LED_GPIO_PIN 51
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index 5b3a15dffb5f..9c5925927ece 100644
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -18,9 +18,9 @@
 #include <linux/delay.h>
 #include <linux/backlight.h>
 
-#include <asm/arch/board.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/gpio.h>
+#include <mach/board.h>
+#include <mach/cpu.h>
+#include <mach/gpio.h>
 
 #include <video/atmel_lcdc.h>
 
@@ -39,7 +39,9 @@
 #endif
 
 #if defined(CONFIG_ARCH_AT91)
-#define ATMEL_LCDFB_FBINFO_DEFAULT      FBINFO_DEFAULT
+#define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
+                                         | FBINFO_PARTIAL_PAN_OK \
+                                         | FBINFO_HWACCEL_YPAN)
 
 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
                                         struct fb_var_screeninfo *var)
@@ -177,7 +179,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
         .type           = FB_TYPE_PACKED_PIXELS,
         .visual         = FB_VISUAL_TRUECOLOR,
         .xpanstep       = 0,
-        .ypanstep       = 0,
+        .ypanstep       = 1,
         .ywrapstep      = 0,
         .accel          = FB_ACCEL_NONE,
 };
@@ -240,9 +242,11 @@ static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
 {
         struct fb_info *info = sinfo->info;
         struct fb_var_screeninfo *var = &info->var;
+        unsigned int smem_len;
 
-        info->fix.smem_len = (var->xres_virtual * var->yres_virtual
-                            * ((var->bits_per_pixel + 7) / 8));
+        smem_len = (var->xres_virtual * var->yres_virtual
+                    * ((var->bits_per_pixel + 7) / 8));
+        info->fix.smem_len = max(smem_len, sinfo->smem_len);
 
         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
@@ -794,6 +798,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
                 sinfo->guard_time = pdata_sinfo->guard_time;
+                sinfo->smem_len = pdata_sinfo->smem_len;
                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
         } else {
diff --git a/drivers/video/aty/radeon_accel.c b/drivers/video/aty/radeon_accel.c
index 4d13f68436e6..aa95f8350242 100644
--- a/drivers/video/aty/radeon_accel.c
+++ b/drivers/video/aty/radeon_accel.c
@@ -55,6 +55,10 @@ static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo,
         OUTREG(DP_WRITE_MSK, 0xffffffff);
         OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
 
+        radeon_fifo_wait(2);
+        OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
+        OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
+
         radeon_fifo_wait(2);  
         OUTREG(DST_Y_X, (region->dy << 16) | region->dx);
         OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height);
@@ -116,6 +120,10 @@ static void radeonfb_prim_copyarea(struct radeonfb_info *rinfo,
         OUTREG(DP_CNTL, (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0)
                         | (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0));
 
+        radeon_fifo_wait(2);
+        OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
+        OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
+
         radeon_fifo_wait(3);
         OUTREG(SRC_Y_X, (sy << 16) | sx);
         OUTREG(DST_Y_X, (dy << 16) | dx);
diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c
index 891875d53a49..cbad67e89826 100644
--- a/drivers/video/backlight/omap1_bl.c
+++ b/drivers/video/backlight/omap1_bl.c
@@ -25,9 +25,9 @@
 #include <linux/fb.h>
 #include <linux/backlight.h>
 
-#include <asm/arch/hardware.h>
-#include <asm/arch/board.h>
-#include <asm/arch/mux.h>
+#include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/mux.h>
 
 #define OMAPBL_MAX_INTENSITY            0xff
 
diff --git a/drivers/video/clps711xfb.c b/drivers/video/clps711xfb.c
index 9f8a389dc7ae..16f5db471ab5 100644
--- a/drivers/video/clps711xfb.c
+++ b/drivers/video/clps711xfb.c
@@ -27,12 +27,12 @@
 #include <linux/proc_fs.h>
 #include <linux/delay.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <linux/uaccess.h>
 
 #include <asm/hardware/clps7111.h>
-#include <asm/arch/syspld.h>
+#include <mach/syspld.h>
 
 struct fb_info  *cfb;
 
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index 33859934a8e4..c6299e8a041d 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -2518,7 +2518,7 @@ static int fbcon_do_set_font(struct vc_data *vc, int w, int h,
                         c = vc->vc_video_erase_char;
                         vc->vc_video_erase_char =
                             ((c & 0xfe00) >> 1) | (c & 0xff);
-                        c = vc->vc_def_color;
+                        c = vc->vc_scrl_erase_char;
                         vc->vc_scrl_erase_char =
                             ((c & 0xFE00) >> 1) | (c & 0xFF);
                         vc->vc_attr >>= 1;
@@ -2551,7 +2551,7 @@ static int fbcon_do_set_font(struct vc_data *vc, int w, int h,
                         if (vc->vc_can_do_color) {
                                 vc->vc_video_erase_char =
                                     ((c & 0xff00) << 1) | (c & 0xff);
-                                c = vc->vc_def_color;
+                                c = vc->vc_scrl_erase_char;
                                 vc->vc_scrl_erase_char =
                                     ((c & 0xFF00) << 1) | (c & 0xFF);
                                 vc->vc_attr <<= 1;
diff --git a/drivers/video/console/fbcon.h b/drivers/video/console/fbcon.h
index de1b1365279b..a6e38e9ea73f 100644
--- a/drivers/video/console/fbcon.h
+++ b/drivers/video/console/fbcon.h
@@ -92,7 +92,7 @@ struct fbcon_ops {
 #define attr_fgcol(fgshift,s)    \
         (((s) >> (fgshift)) & 0x0f)
 #define attr_bgcol(bgshift,s)    \
-        (((s) >> (bgshift)) & 0x07)
+        (((s) >> (bgshift)) & 0x0f)
 
 /* Monochrome */
 #define attr_bold(s) \
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c
index d0e4cb618269..41d62632dcdb 100644
--- a/drivers/video/cyber2000fb.c
+++ b/drivers/video/cyber2000fb.c
@@ -1425,7 +1425,7 @@ static void cyberpro_common_resume(struct cfb_info *cfb)
 
 #ifdef CONFIG_ARCH_SHARK
 
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 
 static int __devinit cyberpro_vl_probe(void)
 {
diff --git a/drivers/video/epson1355fb.c b/drivers/video/epson1355fb.c
index cc2810ef5de5..2735b79e52a1 100644
--- a/drivers/video/epson1355fb.c
+++ b/drivers/video/epson1355fb.c
@@ -71,7 +71,7 @@ struct epson1355_par {
 #if defined(CONFIG_ARM)
 
 # ifdef CONFIG_ARCH_CEIVA
-#  include <asm/arch/hardware.h>
+#  include <mach/hardware.h>
 #  define EPSON1355FB_BASE_PHYS (CEIVA_PHYS_SED1355)
 # endif
 
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index bd320a2bfb7c..fb51197d1c98 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -479,6 +479,10 @@ static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
         base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
         base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
 
+        if (mfbi->x_aoi_d < 0)
+                mfbi->x_aoi_d = 0;
+        if (mfbi->y_aoi_d < 0)
+                mfbi->y_aoi_d = 0;
         switch (index) {
         case 0:
                 if (mfbi->x_aoi_d != 0)
@@ -778,6 +782,22 @@ static void unmap_video_memory(struct fb_info *info)
 }
 
 /*
+ * Using the fb_var_screeninfo in fb_info we set the aoi of this
+ * particular framebuffer. It is a light version of fsl_diu_set_par.
+ */
+static int fsl_diu_set_aoi(struct fb_info *info)
+{
+        struct fb_var_screeninfo *var = &info->var;
+        struct mfb_info *mfbi = info->par;
+        struct diu_ad *ad = mfbi->ad;
+
+        /* AOI should not be greater than display size */
+        ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
+        ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
+        return 0;
+}
+
+/*
  * Using the fb_var_screeninfo in fb_info we set the resolution of this
  * particular framebuffer. This function alters the fb_fix_screeninfo stored
  * in fb_info. It does not alter var in fb_info since we are using that
@@ -817,11 +837,11 @@ static int fsl_diu_set_par(struct fb_info *info)
                 diu_ops.get_pixel_format(var->bits_per_pixel,
                                          machine_data->monitor_port);
         ad->addr    = cpu_to_le32(info->fix.smem_start);
-        ad->src_size_g_alpha = cpu_to_le32((var->yres << 12) |
-                                var->xres) | mfbi->g_alpha;
-        /* fix me. AOI should not be greater than display size */
+        ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
+                                var->xres_virtual) | mfbi->g_alpha;
+        /* AOI should not be greater than display size */
         ad->aoi_size    = cpu_to_le32((var->yres << 16) | var->xres);
-        ad->offset_xyi = 0;
+        ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
         ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
 
         /* Disable chroma keying function */
@@ -921,6 +941,8 @@ static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
         else
                 info->var.vmode &= ~FB_VMODE_YWRAP;
 
+        fsl_diu_set_aoi(info);
+
         return 0;
 }
 
@@ -989,7 +1011,7 @@ static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
                 pr_debug("set AOI display offset of index %d to (%d,%d)\n",
                                  mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
                 fsl_diu_check_var(&info->var, info);
-                fsl_diu_set_par(info);
+                fsl_diu_set_aoi(info);
                 break;
         case MFB_GET_AOID:
                 aoi_d.x_aoi_d = mfbi->x_aoi_d;
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c
index 0c5a475c1cae..ccd986140c95 100644
--- a/drivers/video/imxfb.c
+++ b/drivers/video/imxfb.c
@@ -33,9 +33,9 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
-#include <asm/arch/imxfb.h>
+#include <mach/imxfb.h>
 
 /*
  * Complain if VAR is out of range.
diff --git a/drivers/video/matrox/i2c-matroxfb.c b/drivers/video/matrox/i2c-matroxfb.c
index 75ee5a12e549..c14e3e2212b3 100644
--- a/drivers/video/matrox/i2c-matroxfb.c
+++ b/drivers/video/matrox/i2c-matroxfb.c
@@ -87,13 +87,7 @@ static int matroxfb_gpio_getscl(void* data) {
         return (matroxfb_read_gpio(b->minfo) & b->mask.clock) ? 1 : 0;
 }
 
-static struct i2c_adapter matrox_i2c_adapter_template =
-{
-        .owner =        THIS_MODULE,
-        .id =           I2C_HW_B_G400,
-};
-
-static struct i2c_algo_bit_data matrox_i2c_algo_template =
+static const struct i2c_algo_bit_data matrox_i2c_algo_template =
 {
         .setsda         = matroxfb_gpio_setsda,
         .setscl         = matroxfb_gpio_setscl,
@@ -112,7 +106,7 @@ static int i2c_bus_reg(struct i2c_bit_adapter* b, struct matrox_fb_info* minfo,
         b->minfo = minfo;
         b->mask.data = data;
         b->mask.clock = clock;
-        b->adapter = matrox_i2c_adapter_template;
+        b->adapter.owner = THIS_MODULE;
         snprintf(b->adapter.name, sizeof(b->adapter.name), name,
                 minfo->fbcon.node);
         i2c_set_adapdata(&b->adapter, b);
@@ -187,6 +181,17 @@ static void* i2c_matroxfb_probe(struct matrox_fb_info* minfo) {
                                   MAT_DATA, MAT_CLK, "MAVEN:fb%u", 0);
                 if (err)
                         printk(KERN_INFO "i2c-matroxfb: Could not register Maven i2c bus. Continuing anyway.\n");
+                else {
+                        struct i2c_board_info maven_info = {
+                                I2C_BOARD_INFO("maven", 0x1b),
+                        };
+                        unsigned short const addr_list[2] = {
+                                0x1b, I2C_CLIENT_END
+                        };
+
+                        i2c_new_probed_device(&m2info->maven.adapter,
+                                              &maven_info, addr_list);
+                }
         }
         return m2info;
 fail_ddc1:;
diff --git a/drivers/video/matrox/matroxfb_maven.c b/drivers/video/matrox/matroxfb_maven.c
index 89da27bd5c49..042408a8c631 100644
--- a/drivers/video/matrox/matroxfb_maven.c
+++ b/drivers/video/matrox/matroxfb_maven.c
@@ -19,8 +19,6 @@
 #include <linux/matroxfb.h>
 #include <asm/div64.h>
 
-#define MAVEN_I2CID     (0x1B)
-
 #define MGATVO_B        1
 #define MGATVO_C        2
 
@@ -128,7 +126,7 @@ static int get_ctrl_id(__u32 v4l2_id) {
 
 struct maven_data {
         struct matrox_fb_info*          primary_head;
-        struct i2c_client               client;
+        struct i2c_client               *client;
         int                             version;
 };
 
@@ -974,7 +972,7 @@ static inline int maven_compute_timming(struct maven_data* md,
 
 static int maven_program_timming(struct maven_data* md,
                 const struct mavenregs* m) {
-        struct i2c_client* c = &md->client;
+        struct i2c_client *c = md->client;
 
         if (m->mode == MATROXFB_OUTPUT_MODE_MONITOR) {
                 LR(0x80);
@@ -1011,7 +1009,7 @@ static int maven_program_timming(struct maven_data* md,
 }
 
 static inline int maven_resync(struct maven_data* md) {
-        struct i2c_client* c = &md->client;
+        struct i2c_client *c = md->client;
         maven_set_reg(c, 0x95, 0x20);   /* start whole thing */
         return 0;
 }
@@ -1069,48 +1067,48 @@ static int maven_set_control (struct maven_data* md,
                   maven_compute_bwlevel(md, &blacklevel, &whitelevel);
                   blacklevel = (blacklevel >> 2) | ((blacklevel & 3) << 8);
                   whitelevel = (whitelevel >> 2) | ((whitelevel & 3) << 8);
-                  maven_set_reg_pair(&md->client, 0x0e, blacklevel);
-                  maven_set_reg_pair(&md->client, 0x1e, whitelevel);
+                  maven_set_reg_pair(md->client, 0x0e, blacklevel);
+                  maven_set_reg_pair(md->client, 0x1e, whitelevel);
                 }
                 break;
                 case V4L2_CID_SATURATION:
                 {
-                  maven_set_reg(&md->client, 0x20, p->value);
-                  maven_set_reg(&md->client, 0x22, p->value);
+                  maven_set_reg(md->client, 0x20, p->value);
+                  maven_set_reg(md->client, 0x22, p->value);
                 }
                 break;
                 case V4L2_CID_HUE:
                 {
-                  maven_set_reg(&md->client, 0x25, p->value);
+                  maven_set_reg(md->client, 0x25, p->value);
                 }
                 break;
                 case V4L2_CID_GAMMA:
                 {
                   const struct maven_gamma* g;
                   g = maven_compute_gamma(md);
-                  maven_set_reg(&md->client, 0x83, g->reg83);
-                  maven_set_reg(&md->client, 0x84, g->reg84);
-                  maven_set_reg(&md->client, 0x85, g->reg85);
-                  maven_set_reg(&md->client, 0x86, g->reg86);
-                  maven_set_reg(&md->client, 0x87, g->reg87);
-                  maven_set_reg(&md->client, 0x88, g->reg88);
-                  maven_set_reg(&md->client, 0x89, g->reg89);
-                  maven_set_reg(&md->client, 0x8a, g->reg8a);
-                  maven_set_reg(&md->client, 0x8b, g->reg8b);
+                  maven_set_reg(md->client, 0x83, g->reg83);
+                  maven_set_reg(md->client, 0x84, g->reg84);
+                  maven_set_reg(md->client, 0x85, g->reg85);
+                  maven_set_reg(md->client, 0x86, g->reg86);
+                  maven_set_reg(md->client, 0x87, g->reg87);
+                  maven_set_reg(md->client, 0x88, g->reg88);
+                  maven_set_reg(md->client, 0x89, g->reg89);
+                  maven_set_reg(md->client, 0x8a, g->reg8a);
+                  maven_set_reg(md->client, 0x8b, g->reg8b);
                 }
                 break;
                 case MATROXFB_CID_TESTOUT:
                 {
                         unsigned char val 
-                          = maven_get_reg(&md->client,0x8d);
+                          = maven_get_reg(md->client, 0x8d);
                         if (p->value) val |= 0x10;
                         else          val &= ~0x10;
-                        maven_set_reg(&md->client, 0x8d, val);
+                        maven_set_reg(md->client, 0x8d, val);
                 }
                 break;
                 case MATROXFB_CID_DEFLICKER:
                 {
-                  maven_set_reg(&md->client, 0x93, maven_compute_deflicker(md));
+                  maven_set_reg(md->client, 0x93, maven_compute_deflicker(md));
                 }
                 break;
         }
@@ -1189,6 +1187,7 @@ static int maven_init_client(struct i2c_client* clnt) {
         MINFO_FROM(container_of(clnt->adapter, struct i2c_bit_adapter, adapter)->minfo);
 
         md->primary_head = MINFO;
+        md->client = clnt;
         down_write(&ACCESS_FBINFO(altout.lock));
         ACCESS_FBINFO(outputs[1]).output = &maven_altout;
         ACCESS_FBINFO(outputs[1]).src = ACCESS_FBINFO(outputs[1]).default_src;
@@ -1232,14 +1231,11 @@ static int maven_shutdown_client(struct i2c_client* clnt) {
         return 0;
 }
 
-static const unsigned short normal_i2c[] = { MAVEN_I2CID, I2C_CLIENT_END };
-I2C_CLIENT_INSMOD;
-
-static struct i2c_driver maven_driver;
-
-static int maven_detect_client(struct i2c_adapter* adapter, int address, int kind) {
-        int err = 0;
-        struct i2c_client* new_client;
+static int maven_probe(struct i2c_client *client,
+                       const struct i2c_device_id *id)
+{
+        struct i2c_adapter *adapter = client->adapter;
+        int err = -ENODEV;
         struct maven_data* data;
 
         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_WORD_DATA |
@@ -1250,50 +1246,37 @@ static int maven_detect_client(struct i2c_adapter* adapter, int address, int kin
                 err = -ENOMEM;
                 goto ERROR0;
         }
-        new_client = &data->client;
-        i2c_set_clientdata(new_client, data);
-        new_client->addr = address;
-        new_client->adapter = adapter;
-        new_client->driver = &maven_driver;
-        new_client->flags = 0;
-        strlcpy(new_client->name, "maven", I2C_NAME_SIZE);
-        if ((err = i2c_attach_client(new_client)))
-                goto ERROR3;
-        err = maven_init_client(new_client);
+        i2c_set_clientdata(client, data);
+        err = maven_init_client(client);
         if (err)
                 goto ERROR4;
         return 0;
 ERROR4:;
-        i2c_detach_client(new_client);
-ERROR3:;
-        kfree(new_client);
+        kfree(data);
 ERROR0:;
         return err;
 }
 
-static int maven_attach_adapter(struct i2c_adapter* adapter) {
-        if (adapter->id == I2C_HW_B_G400)
-                return i2c_probe(adapter, &addr_data, &maven_detect_client);
-        return 0;
-}
-
-static int maven_detach_client(struct i2c_client* client) {
-        int err;
-
-        if ((err = i2c_detach_client(client)))
-                return err;
+static int maven_remove(struct i2c_client *client)
+{
         maven_shutdown_client(client);
         kfree(i2c_get_clientdata(client));
         return 0;
 }
 
+static const struct i2c_device_id maven_id[] = {
+        { "maven", 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, maven_id);
+
 static struct i2c_driver maven_driver={
         .driver = {
                 .name   = "maven",
         },
-        .id             = I2C_DRIVERID_MGATVO,
-        .attach_adapter = maven_attach_adapter,
-        .detach_client  = maven_detach_client,
+        .probe          = maven_probe,
+        .remove         = maven_remove,
+        .id_table       = maven_id,
 };
 
 static int __init matroxfb_maven_init(void)
diff --git a/drivers/video/omap/blizzard.c b/drivers/video/omap/blizzard.c
index 4d8ad9cd0e19..9dfcf39d3367 100644
--- a/drivers/video/omap/blizzard.c
+++ b/drivers/video/omap/blizzard.c
@@ -26,9 +26,9 @@
 #include <linux/delay.h>
 #include <linux/clk.h>
 
-#include <asm/arch/dma.h>
-#include <asm/arch/omapfb.h>
-#include <asm/arch/blizzard.h>
+#include <mach/dma.h>
+#include <mach/omapfb.h>
+#include <mach/blizzard.h>
 
 #include "dispc.h"
 
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index ab77c51fe9d6..6efcf89e7fbe 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -25,9 +25,9 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <asm/arch/sram.h>
-#include <asm/arch/omapfb.h>
-#include <asm/arch/board.h>
+#include <mach/sram.h>
+#include <mach/omapfb.h>
+#include <mach/board.h>
 
 #include "dispc.h"
 
diff --git a/drivers/video/omap/hwa742.c b/drivers/video/omap/hwa742.c
index 1e642b7a20fe..f24df0b54e1c 100644
--- a/drivers/video/omap/hwa742.c
+++ b/drivers/video/omap/hwa742.c
@@ -26,9 +26,9 @@
 #include <linux/delay.h>
 #include <linux/clk.h>
 
-#include <asm/arch/dma.h>
-#include <asm/arch/omapfb.h>
-#include <asm/arch/hwa742.h>
+#include <mach/dma.h>
+#include <mach/omapfb.h>
+#include <mach/hwa742.h>
 
 #define HWA742_REV_CODE_REG       0x0
 #define HWA742_CONFIG_REG         0x2
diff --git a/drivers/video/omap/lcd_h3.c b/drivers/video/omap/lcd_h3.c
index 31e978349a80..2486237ebba5 100644
--- a/drivers/video/omap/lcd_h3.c
+++ b/drivers/video/omap/lcd_h3.c
@@ -23,8 +23,8 @@
 #include <linux/platform_device.h>
 #include <linux/i2c/tps65010.h>
 
-#include <asm/arch/gpio.h>
-#include <asm/arch/omapfb.h>
+#include <mach/gpio.h>
+#include <mach/omapfb.h>
 
 #define MODULE_NAME     "omapfb-lcd_h3"
 
diff --git a/drivers/video/omap/lcd_h4.c b/drivers/video/omap/lcd_h4.c
index fd6f0eb16de1..88c19d424ef7 100644
--- a/drivers/video/omap/lcd_h4.c
+++ b/drivers/video/omap/lcd_h4.c
@@ -22,7 +22,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 
-#include <asm/arch/omapfb.h>
+#include <mach/omapfb.h>
 
 static int h4_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev)
 {
diff --git a/drivers/video/omap/lcd_inn1510.c b/drivers/video/omap/lcd_inn1510.c
index 551f385861d1..6953ed4b5820 100644
--- a/drivers/video/omap/lcd_inn1510.c
+++ b/drivers/video/omap/lcd_inn1510.c
@@ -23,8 +23,8 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 
-#include <asm/arch/fpga.h>
-#include <asm/arch/omapfb.h>
+#include <mach/fpga.h>
+#include <mach/omapfb.h>
 
 static int innovator1510_panel_init(struct lcd_panel *panel,
                                     struct omapfb_device *fbdev)
diff --git a/drivers/video/omap/lcd_inn1610.c b/drivers/video/omap/lcd_inn1610.c
index 5ef119c813e0..6a42c6a0cd99 100644
--- a/drivers/video/omap/lcd_inn1610.c
+++ b/drivers/video/omap/lcd_inn1610.c
@@ -22,8 +22,8 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 
-#include <asm/arch/gpio.h>
-#include <asm/arch/omapfb.h>
+#include <mach/gpio.h>
+#include <mach/omapfb.h>
 
 #define MODULE_NAME     "omapfb-lcd_h3"
 
diff --git a/drivers/video/omap/lcd_osk.c b/drivers/video/omap/lcd_osk.c
index a38038840fd6..a4a725f427a4 100644
--- a/drivers/video/omap/lcd_osk.c
+++ b/drivers/video/omap/lcd_osk.c
@@ -23,9 +23,9 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 
-#include <asm/arch/gpio.h>
-#include <asm/arch/mux.h>
-#include <asm/arch/omapfb.h>
+#include <mach/gpio.h>
+#include <mach/mux.h>
+#include <mach/omapfb.h>
 
 static int osk_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev)
 {
diff --git a/drivers/video/omap/lcd_palmte.c b/drivers/video/omap/lcd_palmte.c
index 52bdfdac42c9..218317366e6e 100644
--- a/drivers/video/omap/lcd_palmte.c
+++ b/drivers/video/omap/lcd_palmte.c
@@ -23,8 +23,8 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 
-#include <asm/arch/fpga.h>
-#include <asm/arch/omapfb.h>
+#include <mach/fpga.h>
+#include <mach/omapfb.h>
 
 static int palmte_panel_init(struct lcd_panel *panel,
                                 struct omapfb_device *fbdev)
diff --git a/drivers/video/omap/lcd_palmtt.c b/drivers/video/omap/lcd_palmtt.c
index 4bb349f54356..57b0f6cf6a5a 100644
--- a/drivers/video/omap/lcd_palmtt.c
+++ b/drivers/video/omap/lcd_palmtt.c
@@ -29,8 +29,8 @@ GPIO13 - screen blanking
 #include <linux/module.h>
 #include <linux/io.h>
 
-#include <asm/arch/gpio.h>
-#include <asm/arch/omapfb.h>
+#include <mach/gpio.h>
+#include <mach/omapfb.h>
 
 static int palmtt_panel_init(struct lcd_panel *panel,
         struct omapfb_device *fbdev)
diff --git a/drivers/video/omap/lcd_palmz71.c b/drivers/video/omap/lcd_palmz71.c
index ea6170ddff35..d33d78b11723 100644
--- a/drivers/video/omap/lcd_palmz71.c
+++ b/drivers/video/omap/lcd_palmz71.c
@@ -24,7 +24,7 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 
-#include <asm/arch/omapfb.h>
+#include <mach/omapfb.h>
 
 static int palmz71_panel_init(struct lcd_panel *panel,
                               struct omapfb_device *fbdev)
diff --git a/drivers/video/omap/lcd_sx1.c b/drivers/video/omap/lcd_sx1.c
index c4f306a4e5c9..caa6a896cb8b 100644
--- a/drivers/video/omap/lcd_sx1.c
+++ b/drivers/video/omap/lcd_sx1.c
@@ -23,10 +23,10 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 
-#include <asm/arch/gpio.h>
-#include <asm/arch/omapfb.h>
-#include <asm/arch/mcbsp.h>
-#include <asm/arch/mux.h>
+#include <mach/gpio.h>
+#include <mach/omapfb.h>
+#include <mach/mcbsp.h>
+#include <mach/mux.h>
 
 /*
  * OMAP310 GPIO registers
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c
index fb19ed4992db..83514f066712 100644
--- a/drivers/video/omap/lcdc.c
+++ b/drivers/video/omap/lcdc.c
@@ -29,8 +29,8 @@
 #include <linux/vmalloc.h>
 #include <linux/clk.h>
 
-#include <asm/arch/dma.h>
-#include <asm/arch/omapfb.h>
+#include <mach/dma.h>
+#include <mach/omapfb.h>
 
 #include <asm/mach-types.h>
 
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index f85af5c4fa68..51a138bd113c 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -28,9 +28,8 @@
 #include <linux/mm.h>
 #include <linux/uaccess.h>
 
-#include <asm/mach-types.h>
-#include <asm/arch/dma.h>
-#include <asm/arch/omapfb.h>
+#include <mach/dma.h>
+#include <mach/omapfb.h>
 
 #define MODULE_NAME     "omapfb"
 
diff --git a/drivers/video/omap/rfbi.c b/drivers/video/omap/rfbi.c
index 789cfd23c36b..4a6f13d3facf 100644
--- a/drivers/video/omap/rfbi.c
+++ b/drivers/video/omap/rfbi.c
@@ -27,7 +27,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <asm/arch/omapfb.h>
+#include <mach/omapfb.h>
 
 #include "dispc.h"
 
diff --git a/drivers/video/omap/sossi.c b/drivers/video/omap/sossi.c
index fafd0f26b90f..6359353c2c67 100644
--- a/drivers/video/omap/sossi.c
+++ b/drivers/video/omap/sossi.c
@@ -24,8 +24,8 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 
-#include <asm/arch/dma.h>
-#include <asm/arch/omapfb.h>
+#include <mach/dma.h>
+#include <mach/omapfb.h>
 
 #include "lcdc.h"
 
diff --git a/drivers/video/pnx4008/dum.h b/drivers/video/pnx4008/dum.h
index d80a614d89ed..1234d4375d92 100644
--- a/drivers/video/pnx4008/dum.h
+++ b/drivers/video/pnx4008/dum.h
@@ -12,7 +12,7 @@
 #ifndef __PNX008_DUM_H__
 #define __PNX008_DUM_H__
 
-#include <asm/arch/platform.h>
+#include <mach/platform.h>
 
 #define PNX4008_DUMCONF_VA_BASE         IO_ADDRESS(PNX4008_DUMCONF_BASE)
 #define PNX4008_DUM_MAIN_VA_BASE        IO_ADDRESS(PNX4008_DUM_MAINCFG_BASE)
diff --git a/drivers/video/pnx4008/sdum.c b/drivers/video/pnx4008/sdum.c
index d23bf0d659b6..2aa09bce3944 100644
--- a/drivers/video/pnx4008/sdum.c
+++ b/drivers/video/pnx4008/sdum.c
@@ -30,7 +30,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/clk.h>
 #include <asm/uaccess.h>
-#include <asm/arch/gpio.h>
+#include <mach/gpio.h>
 
 #include "sdum.h"
 #include "fbcommon.h"
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 69de2fed6c58..97204497d9f7 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -45,14 +45,14 @@
 #include <linux/kthread.h>
 #include <linux/freezer.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/div64.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
-#include <asm/arch/bitfield.h>
-#include <asm/arch/pxafb.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-gpio.h>
+#include <mach/bitfield.h>
+#include <mach/pxafb.h>
 
 /*
  * Complain if VAR is out of range.
@@ -1031,7 +1031,9 @@ static void pxafb_setup_gpio(struct pxafb_info *fbi)
         pxa_gpio_mode(GPIO74_LCD_FCLK_MD);
         pxa_gpio_mode(GPIO75_LCD_LCLK_MD);
         pxa_gpio_mode(GPIO76_LCD_PCLK_MD);
-        pxa_gpio_mode(GPIO77_LCD_ACBIAS_MD);
+
+        if ((lccr0 & LCCR0_PAS) == 0)
+                pxa_gpio_mode(GPIO77_LCD_ACBIAS_MD);
 }
 
 static void pxafb_enable_controller(struct pxafb_info *fbi)
@@ -1400,6 +1402,8 @@ static void pxafb_decode_mach_info(struct pxafb_info *fbi,
         if (lcd_conn == LCD_MONO_STN_8BPP)
                 fbi->lccr0 |= LCCR0_DPD;
 
+        fbi->lccr0 |= (lcd_conn & LCD_ALTERNATE_MAPPING) ? LCCR0_LDDALT : 0;
+
         fbi->lccr3 = LCCR3_Acb((inf->lcd_conn >> 10) & 0xff);
         fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0;
         fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL)  ? LCCR3_PCP : 0;
@@ -1673,53 +1677,63 @@ MODULE_PARM_DESC(options, "LCD parameters (see Documentation/fb/pxafb.txt)");
 #define pxafb_setup_options()           (0)
 #endif
 
-static int __devinit pxafb_probe(struct platform_device *dev)
-{
-        struct pxafb_info *fbi;
-        struct pxafb_mach_info *inf;
-        struct resource *r;
-        int irq, ret;
-
-        dev_dbg(&dev->dev, "pxafb_probe\n");
-
-        inf = dev->dev.platform_data;
-        ret = -ENOMEM;
-        fbi = NULL;
-        if (!inf)
-                goto failed;
-
-        ret = pxafb_parse_options(&dev->dev, g_options);
-        if (ret < 0)
-                goto failed;
-
 #ifdef DEBUG_VAR
-        /* Check for various illegal bit-combinations. Currently only
-         * a warning is given. */
+/* Check for various illegal bit-combinations. Currently only
+ * a warning is given. */
+static void __devinit pxafb_check_options(struct device *dev,
+                                          struct pxafb_mach_info *inf)
+{
+        if (inf->lcd_conn)
+                return;
 
         if (inf->lccr0 & LCCR0_INVALID_CONFIG_MASK)
-                dev_warn(&dev->dev, "machine LCCR0 setting contains "
+                dev_warn(dev, "machine LCCR0 setting contains "
                                 "illegal bits: %08x\n",
                         inf->lccr0 & LCCR0_INVALID_CONFIG_MASK);
         if (inf->lccr3 & LCCR3_INVALID_CONFIG_MASK)
-                dev_warn(&dev->dev, "machine LCCR3 setting contains "
+                dev_warn(dev, "machine LCCR3 setting contains "
                                 "illegal bits: %08x\n",
                         inf->lccr3 & LCCR3_INVALID_CONFIG_MASK);
         if (inf->lccr0 & LCCR0_DPD &&
             ((inf->lccr0 & LCCR0_PAS) != LCCR0_Pas ||
              (inf->lccr0 & LCCR0_SDS) != LCCR0_Sngl ||
              (inf->lccr0 & LCCR0_CMS) != LCCR0_Mono))
-                dev_warn(&dev->dev, "Double Pixel Data (DPD) mode is "
+                dev_warn(dev, "Double Pixel Data (DPD) mode is "
                                 "only valid in passive mono"
                                 " single panel mode\n");
         if ((inf->lccr0 & LCCR0_PAS) == LCCR0_Act &&
             (inf->lccr0 & LCCR0_SDS) == LCCR0_Dual)
-                dev_warn(&dev->dev, "Dual panel only valid in passive mode\n");
+                dev_warn(dev, "Dual panel only valid in passive mode\n");
         if ((inf->lccr0 & LCCR0_PAS) == LCCR0_Pas &&
              (inf->modes->upper_margin || inf->modes->lower_margin))
-                dev_warn(&dev->dev, "Upper and lower margins must be 0 in "
+                dev_warn(dev, "Upper and lower margins must be 0 in "
                                 "passive mode\n");
+}
+#else
+#define pxafb_check_options(...)        do {} while (0)
 #endif
 
+static int __devinit pxafb_probe(struct platform_device *dev)
+{
+        struct pxafb_info *fbi;
+        struct pxafb_mach_info *inf;
+        struct resource *r;
+        int irq, ret;
+
+        dev_dbg(&dev->dev, "pxafb_probe\n");
+
+        inf = dev->dev.platform_data;
+        ret = -ENOMEM;
+        fbi = NULL;
+        if (!inf)
+                goto failed;
+
+        ret = pxafb_parse_options(&dev->dev, g_options);
+        if (ret < 0)
+                goto failed;
+
+        pxafb_check_options(&dev->dev, inf);
+
         dev_dbg(&dev->dev, "got a %dx%dx%d LCD\n",
                         inf->modes->xres,
                         inf->modes->yres,
diff --git a/drivers/video/s3c2410fb.c b/drivers/video/s3c2410fb.c
index f0598961c6b0..79cf0b1976aa 100644
--- a/drivers/video/s3c2410fb.c
+++ b/drivers/video/s3c2410fb.c
@@ -29,9 +29,9 @@
 #include <asm/div64.h>
 
 #include <asm/mach/map.h>
-#include <asm/arch/regs-lcd.h>
-#include <asm/arch/regs-gpio.h>
-#include <asm/arch/fb.h>
+#include <mach/regs-lcd.h>
+#include <mach/regs-gpio.h>
+#include <mach/fb.h>
 
 #ifdef CONFIG_PM
 #include <linux/pm.h>
diff --git a/drivers/video/sa1100fb.c b/drivers/video/sa1100fb.c
index 78bcdbc3f484..c052bd4c0b06 100644
--- a/drivers/video/sa1100fb.c
+++ b/drivers/video/sa1100fb.c
@@ -177,11 +177,11 @@
 #include <linux/dma-mapping.h>
 #include <linux/mutex.h>
 
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 #include <asm/mach-types.h>
-#include <asm/arch/assabet.h>
-#include <asm/arch/shannon.h>
+#include <mach/assabet.h>
+#include <mach/shannon.h>
 
 /*
  * debugging?
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 48399e134c0d..db20542796bf 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -285,10 +285,11 @@ config ALIM1535_WDT
 
 config ALIM7101_WDT
         tristate "ALi M7101 PMU Computer Watchdog"
-        depends on X86 && PCI
+        depends on PCI
         help
           This is the driver for the hardware watchdog on the ALi M7101 PMU
-          as used in the x86 Cobalt servers.
+          as used in the x86 Cobalt servers and also found in some
+          SPARC Netra servers too.
 
           To compile this driver as a module, choose M here: the
           module will be called alim7101_wdt.
@@ -463,7 +464,7 @@ config PC87413_WDT
           module will be called pc87413_wdt.
 
           Most people will say N.
- 
+
 config 60XX_WDT
         tristate "SBC-60XX Watchdog Timer"
         depends on X86
@@ -695,9 +696,17 @@ config 8xx_WDT
         tristate "MPC8xx Watchdog Timer"
         depends on 8xx
 
-config 83xx_WDT
-        tristate "MPC83xx Watchdog Timer"
-        depends on PPC_83xx
+config 8xxx_WDT
+        tristate "MPC8xxx Platform Watchdog Timer"
+        depends on PPC_8xx || PPC_83xx || PPC_86xx
+        help
+          This driver is for a SoC level watchdog that exists on some
+          Freescale PowerPC processors. So far this driver supports:
+          - MPC8xx watchdogs
+          - MPC83xx watchdogs
+          - MPC86xx watchdogs
+
+          For BookE processors (MPC85xx) use the BOOKE_WDT driver instead.
 
 config MV64X60_WDT
         tristate "MV64X60 (Marvell Discovery) Watchdog Timer"
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index edd305a64e63..ca3dc043d786 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -66,7 +66,10 @@ obj-$(CONFIG_IB700_WDT) += ib700wdt.o
 obj-$(CONFIG_IBMASR) += ibmasr.o
 obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o
 obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o
-obj-$(CONFIG_ITCO_WDT) += iTCO_wdt.o iTCO_vendor_support.o
+obj-$(CONFIG_ITCO_WDT) += iTCO_wdt.o
+ifeq ($(CONFIG_ITCO_VENDOR_SUPPORT),y)
+obj-$(CONFIG_ITCO_WDT) += iTCO_vendor_support.o
+endif
 obj-$(CONFIG_IT8712F_WDT) += it8712f_wdt.o
 obj-$(CONFIG_HP_WATCHDOG) += hpwdt.o
 obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
@@ -92,7 +95,7 @@ obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc_epx_c3.o
 
 # MIPS Architecture
 obj-$(CONFIG_INDYDOG) += indydog.o
-obj-$(CONFIG_WDT_MTX1)  += mtx-1_wdt.o
+obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
 obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
 obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
 obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
@@ -103,7 +106,7 @@ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
 # POWERPC Architecture
 obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o
 obj-$(CONFIG_MPC5200_WDT) += mpc5200_wdt.o
-obj-$(CONFIG_83xx_WDT) += mpc83xx_wdt.o
+obj-$(CONFIG_8xxx_WDT) += mpc8xxx_wdt.o
 obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o
 obj-$(CONFIG_BOOKE_WDT) += booke_wdt.o
 
diff --git a/drivers/watchdog/acquirewdt.c b/drivers/watchdog/acquirewdt.c
index 85269c365a10..6e46a551395c 100644
--- a/drivers/watchdog/acquirewdt.c
+++ b/drivers/watchdog/acquirewdt.c
@@ -58,39 +58,45 @@
 #include <linux/types.h>                /* For standard types (like size_t) */
 #include <linux/errno.h>                /* For the -ENODEV/... values */
 #include <linux/kernel.h>               /* For printk/panic/... */
-#include <linux/miscdevice.h>           /* For MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR) */
+#include <linux/miscdevice.h>           /* For MODULE_ALIAS_MISCDEV
+                                                        (WATCHDOG_MINOR) */
 #include <linux/watchdog.h>             /* For the watchdog specific items */
 #include <linux/fs.h>                   /* For file operations */
 #include <linux/ioport.h>               /* For io-port access */
 #include <linux/platform_device.h>      /* For platform_driver framework */
 #include <linux/init.h>                 /* For __init/__exit/... */
-
-#include <asm/uaccess.h>                /* For copy_to_user/put_user/... */
-#include <asm/io.h>                     /* For inb/outb/... */
+#include <linux/uaccess.h>              /* For copy_to_user/put_user/... */
+#include <linux/io.h>                   /* For inb/outb/... */
 
 /* Module information */
 #define DRV_NAME "acquirewdt"
 #define PFX DRV_NAME ": "
 #define WATCHDOG_NAME "Acquire WDT"
-#define WATCHDOG_HEARTBEAT 0    /* There is no way to see what the correct time-out period is */
+/* There is no way to see what the correct time-out period is */
+#define WATCHDOG_HEARTBEAT 0
 
 /* internal variables */
-static struct platform_device *acq_platform_device;     /* the watchdog platform device */
+/* the watchdog platform device */
+static struct platform_device *acq_platform_device;
 static unsigned long acq_is_open;
 static char expect_close;
 
 /* module parameters */
-static int wdt_stop = 0x43;     /* You must set this - there is no sane way to probe for this board. */
+/* You must set this - there is no sane way to probe for this board. */
+static int wdt_stop = 0x43;
 module_param(wdt_stop, int, 0);
 MODULE_PARM_DESC(wdt_stop, "Acquire WDT 'stop' io port (default 0x43)");
 
-static int wdt_start = 0x443;   /* You must set this - there is no sane way to probe for this board. */
+/* You must set this - there is no sane way to probe for this board. */
+static int wdt_start = 0x443;
 module_param(wdt_start, int, 0);
 MODULE_PARM_DESC(wdt_start, "Acquire WDT 'start' io port (default 0x443)");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+        __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  *      Watchdog Operations
@@ -112,18 +118,18 @@ static void acq_stop(void)
  *      /dev/watchdog handling
  */
 
-static ssize_t acq_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
+static ssize_t acq_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
-        if(count) {
+        if (count) {
                 if (!nowayout) {
                         size_t i;
-
                         /* note: just in case someone wrote the magic character
-                         * five months ago... */
+                           five months ago... */
                         expect_close = 0;
-
-                        /* scan to see whether or not we got the magic character */
+                        /* scan to see whether or not we got the
+                           magic character */
                         for (i = 0; i != count; i++) {
                                 char c;
                                 if (get_user(c, buf + i))
@@ -132,64 +138,55 @@ static ssize_t acq_write(struct file *file, const char __user *buf, size_t count
                                         expect_close = 42;
                         }
                 }
-
-                /* Well, anyhow someone wrote to us, we should return that favour */
+                /* Well, anyhow someone wrote to us, we should
+                                return that favour */
                 acq_keepalive();
         }
         return count;
 }
 
-static int acq_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-        unsigned long arg)
+static long acq_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         int options, retval = -EINVAL;
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
-        static struct watchdog_info ident =
-        {
+        static struct watchdog_info ident = {
                 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = WATCHDOG_NAME,
         };
 
-        switch(cmd)
-        {
+        switch (cmd) {
         case WDIOC_GETSUPPORT:
-          return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
 
         case WDIOC_GETSTATUS:
         case WDIOC_GETBOOTSTATUS:
-          return put_user(0, p);
-
-        case WDIOC_KEEPALIVE:
-          acq_keepalive();
-          return 0;
-
-        case WDIOC_GETTIMEOUT:
-          return put_user(WATCHDOG_HEARTBEAT, p);
+                return put_user(0, p);
 
         case WDIOC_SETOPTIONS:
         {
-            if (get_user(options, p))
-              return -EFAULT;
-
-            if (options & WDIOS_DISABLECARD)
-            {
-              acq_stop();
-              retval = 0;
-            }
-
-            if (options & WDIOS_ENABLECARD)
-            {
-              acq_keepalive();
-              retval = 0;
-            }
-
-            return retval;
+                if (get_user(options, p))
+                        return -EFAULT;
+                if (options & WDIOS_DISABLECARD) {
+                        acq_stop();
+                        retval = 0;
+                }
+                if (options & WDIOS_ENABLECARD) {
+                        acq_keepalive();
+                        retval = 0;
+                }
+                return retval;
         }
+        case WDIOC_KEEPALIVE:
+                acq_keepalive();
+                return 0;
+
+        case WDIOC_GETTIMEOUT:
+                return put_user(WATCHDOG_HEARTBEAT, p);
 
         default:
-          return -ENOTTY;
+                return -ENOTTY;
         }
 }
 
@@ -211,7 +208,8 @@ static int acq_close(struct inode *inode, struct file *file)
         if (expect_close == 42) {
                 acq_stop();
         } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
                 acq_keepalive();
         }
         clear_bit(0, &acq_is_open);
@@ -227,7 +225,7 @@ static const struct file_operations acq_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = acq_write,
-        .ioctl          = acq_ioctl,
+        .unlocked_ioctl = acq_ioctl,
         .open           = acq_open,
         .release        = acq_close,
 };
@@ -248,32 +246,29 @@ static int __devinit acq_probe(struct platform_device *dev)
 
         if (wdt_stop != wdt_start) {
                 if (!request_region(wdt_stop, 1, WATCHDOG_NAME)) {
-                        printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
-                                wdt_stop);
+                        printk(KERN_ERR PFX
+                            "I/O address 0x%04x already in use\n", wdt_stop);
                         ret = -EIO;
                         goto out;
                 }
         }
 
         if (!request_region(wdt_start, 1, WATCHDOG_NAME)) {
-                printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
+                printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
                         wdt_start);
                 ret = -EIO;
                 goto unreg_stop;
         }
-
         ret = misc_register(&acq_miscdev);
         if (ret != 0) {
-                printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        WATCHDOG_MINOR, ret);
                 goto unreg_regions;
         }
-
-        printk (KERN_INFO PFX "initialized. (nowayout=%d)\n",
-                nowayout);
+        printk(KERN_INFO PFX "initialized. (nowayout=%d)\n", nowayout);
 
         return 0;
-
 unreg_regions:
         release_region(wdt_start, 1);
 unreg_stop:
@@ -286,9 +281,9 @@ out:
 static int __devexit acq_remove(struct platform_device *dev)
 {
         misc_deregister(&acq_miscdev);
-        release_region(wdt_start,1);
-        if(wdt_stop != wdt_start)
-                release_region(wdt_stop,1);
+        release_region(wdt_start, 1);
+        if (wdt_stop != wdt_start)
+                release_region(wdt_stop, 1);
 
         return 0;
 }
@@ -313,18 +308,19 @@ static int __init acq_init(void)
 {
         int err;
 
-        printk(KERN_INFO "WDT driver for Acquire single board computer initialising.\n");
+        printk(KERN_INFO
+              "WDT driver for Acquire single board computer initialising.\n");
 
         err = platform_driver_register(&acquirewdt_driver);
         if (err)
                 return err;
 
-        acq_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0);
+        acq_platform_device = platform_device_register_simple(DRV_NAME,
+                                                                -1, NULL, 0);
         if (IS_ERR(acq_platform_device)) {
                 err = PTR_ERR(acq_platform_device);
                 goto unreg_platform_driver;
         }
-
         return 0;
 
 unreg_platform_driver:
diff --git a/drivers/watchdog/advantechwdt.c b/drivers/watchdog/advantechwdt.c
index 8121cc247343..a5110f93a755 100644
--- a/drivers/watchdog/advantechwdt.c
+++ b/drivers/watchdog/advantechwdt.c
@@ -37,9 +37,9 @@
 #include <linux/ioport.h>
 #include <linux/platform_device.h>
 #include <linux/init.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 #define DRV_NAME "advantechwdt"
@@ -47,7 +47,8 @@
 #define WATCHDOG_NAME "Advantech WDT"
 #define WATCHDOG_TIMEOUT 60             /* 60 sec default timeout */
 
-static struct platform_device *advwdt_platform_device;  /* the watchdog platform device */
+/* the watchdog platform device */
+static struct platform_device *advwdt_platform_device;
 static unsigned long advwdt_is_open;
 static char adv_expect_close;
 
@@ -72,35 +73,35 @@ MODULE_PARM_DESC(wdt_start, "Advantech WDT 'start' io port (default 0x443)");
 
 static int timeout = WATCHDOG_TIMEOUT;  /* in seconds */
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=63, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
+MODULE_PARM_DESC(timeout,
+        "Watchdog timeout in seconds. 1<= timeout <=63, default="
+                __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  *      Watchdog Operations
  */
 
-static void
-advwdt_ping(void)
+static void advwdt_ping(void)
 {
         /* Write a watchdog value */
         outb_p(timeout, wdt_start);
 }
 
-static void
-advwdt_disable(void)
+static void advwdt_disable(void)
 {
         inb_p(wdt_stop);
 }
 
-static int
-advwdt_set_heartbeat(int t)
+static int advwdt_set_heartbeat(int t)
 {
-        if ((t < 1) || (t > 63))
+        if (t < 1 || t > 63)
                 return -EINVAL;
-
         timeout = t;
         return 0;
 }
@@ -109,8 +110,8 @@ advwdt_set_heartbeat(int t)
  *      /dev/watchdog handling
  */
 
-static ssize_t
-advwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
+static ssize_t advwdt_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         if (count) {
                 if (!nowayout) {
@@ -120,7 +121,7 @@ advwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *pp
 
                         for (i = 0; i != count; i++) {
                                 char c;
-                                if (get_user(c, buf+i))
+                                if (get_user(c, buf + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         adv_expect_close = 42;
@@ -131,9 +132,7 @@ advwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *pp
         return count;
 }
 
-static int
-advwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-          unsigned long arg)
+static long advwdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         int new_timeout;
         void __user *argp = (void __user *)arg;
@@ -146,57 +145,50 @@ advwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 
         switch (cmd) {
         case WDIOC_GETSUPPORT:
-          if (copy_to_user(argp, &ident, sizeof(ident)))
-            return -EFAULT;
-          break;
+                if (copy_to_user(argp, &ident, sizeof(ident)))
+                        return -EFAULT;
+                break;
 
         case WDIOC_GETSTATUS:
         case WDIOC_GETBOOTSTATUS:
-          return put_user(0, p);
-
-        case WDIOC_KEEPALIVE:
-          advwdt_ping();
-          break;
-
-        case WDIOC_SETTIMEOUT:
-          if (get_user(new_timeout, p))
-                  return -EFAULT;
-          if (advwdt_set_heartbeat(new_timeout))
-                  return -EINVAL;
-          advwdt_ping();
-          /* Fall */
-
-        case WDIOC_GETTIMEOUT:
-          return put_user(timeout, p);
+                return put_user(0, p);
 
         case WDIOC_SETOPTIONS:
         {
-          int options, retval = -EINVAL;
-
-          if (get_user(options, p))
-            return -EFAULT;
-
-          if (options & WDIOS_DISABLECARD) {
-            advwdt_disable();
-            retval = 0;
-          }
+                int options, retval = -EINVAL;
 
-          if (options & WDIOS_ENABLECARD) {
-            advwdt_ping();
-            retval = 0;
-          }
-
-          return retval;
+                if (get_user(options, p))
+                        return -EFAULT;
+                if (options & WDIOS_DISABLECARD) {
+                        advwdt_disable();
+                        retval = 0;
+                }
+                if (options & WDIOS_ENABLECARD) {
+                        advwdt_ping();
+                        retval = 0;
+                }
+                return retval;
         }
+        case WDIOC_KEEPALIVE:
+                advwdt_ping();
+                break;
 
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                if (advwdt_set_heartbeat(new_timeout))
+                        return -EINVAL;
+                advwdt_ping();
+                /* Fall */
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
         default:
-          return -ENOTTY;
+                return -ENOTTY;
         }
         return 0;
 }
 
-static int
-advwdt_open(struct inode *inode, struct file *file)
+static int advwdt_open(struct inode *inode, struct file *file)
 {
         if (test_and_set_bit(0, &advwdt_is_open))
                 return -EBUSY;
@@ -208,13 +200,13 @@ advwdt_open(struct inode *inode, struct file *file)
         return nonseekable_open(inode, file);
 }
 
-static int
-advwdt_close(struct inode *inode, struct file *file)
+static int advwdt_close(struct inode *inode, struct file *file)
 {
         if (adv_expect_close == 42) {
                 advwdt_disable();
         } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+                printk(KERN_CRIT PFX
+                                "Unexpected close, not stopping watchdog!\n");
                 advwdt_ping();
         }
         clear_bit(0, &advwdt_is_open);
@@ -230,7 +222,7 @@ static const struct file_operations advwdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = advwdt_write,
-        .ioctl          = advwdt_ioctl,
+        .unlocked_ioctl = advwdt_ioctl,
         .open           = advwdt_open,
         .release        = advwdt_close,
 };
@@ -245,23 +237,24 @@ static struct miscdevice advwdt_miscdev = {
  *      Init & exit routines
  */
 
-static int __devinit
-advwdt_probe(struct platform_device *dev)
+static int __devinit advwdt_probe(struct platform_device *dev)
 {
         int ret;
 
         if (wdt_stop != wdt_start) {
                 if (!request_region(wdt_stop, 1, WATCHDOG_NAME)) {
-                        printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
-                                wdt_stop);
+                        printk(KERN_ERR PFX
+                                "I/O address 0x%04x already in use\n",
+                                                                wdt_stop);
                         ret = -EIO;
                         goto out;
                 }
         }
 
         if (!request_region(wdt_start, 1, WATCHDOG_NAME)) {
-                printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
-                        wdt_start);
+                printk(KERN_ERR PFX
+                                "I/O address 0x%04x already in use\n",
+                                                                wdt_start);
                 ret = -EIO;
                 goto unreg_stop;
         }
@@ -269,20 +262,19 @@ advwdt_probe(struct platform_device *dev)
         /* Check that the heartbeat value is within it's range ; if not reset to the default */
         if (advwdt_set_heartbeat(timeout)) {
                 advwdt_set_heartbeat(WATCHDOG_TIMEOUT);
-                printk (KERN_INFO PFX "timeout value must be 1<=x<=63, using %d\n",
-                        timeout);
+                printk(KERN_INFO PFX
+                        "timeout value must be 1<=x<=63, using %d\n", timeout);
         }
 
         ret = misc_register(&advwdt_miscdev);
         if (ret != 0) {
-                printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        WATCHDOG_MINOR, ret);
                 goto unreg_regions;
         }
-
-        printk (KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n",
+        printk(KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n",
                 timeout, nowayout);
-
 out:
         return ret;
 unreg_regions:
@@ -293,19 +285,17 @@ unreg_stop:
         goto out;
 }
 
-static int __devexit
-advwdt_remove(struct platform_device *dev)
+static int __devexit advwdt_remove(struct platform_device *dev)
 {
         misc_deregister(&advwdt_miscdev);
-        release_region(wdt_start,1);
-        if(wdt_stop != wdt_start)
-                release_region(wdt_stop,1);
+        release_region(wdt_start, 1);
+        if (wdt_stop != wdt_start)
+                release_region(wdt_stop, 1);
 
         return 0;
 }
 
-static void
-advwdt_shutdown(struct platform_device *dev)
+static void advwdt_shutdown(struct platform_device *dev)
 {
         /* Turn the WDT off if we have a soft shutdown */
         advwdt_disable();
@@ -321,18 +311,19 @@ static struct platform_driver advwdt_driver = {
         },
 };
 
-static int __init
-advwdt_init(void)
+static int __init advwdt_init(void)
 {
         int err;
 
-        printk(KERN_INFO "WDT driver for Advantech single board computer initialising.\n");
+        printk(KERN_INFO
+             "WDT driver for Advantech single board computer initialising.\n");
 
         err = platform_driver_register(&advwdt_driver);
         if (err)
                 return err;
 
-        advwdt_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0);
+        advwdt_platform_device = platform_device_register_simple(DRV_NAME,
+                                                                -1, NULL, 0);
         if (IS_ERR(advwdt_platform_device)) {
                 err = PTR_ERR(advwdt_platform_device);
                 goto unreg_platform_driver;
@@ -345,8 +336,7 @@ unreg_platform_driver:
         return err;
 }
 
-static void __exit
-advwdt_exit(void)
+static void __exit advwdt_exit(void)
 {
         platform_device_unregister(advwdt_platform_device);
         platform_driver_unregister(&advwdt_driver);
diff --git a/drivers/watchdog/alim1535_wdt.c b/drivers/watchdog/alim1535_wdt.c
index 2b1fbdb2fcf7..2a7690ecf97d 100644
--- a/drivers/watchdog/alim1535_wdt.c
+++ b/drivers/watchdog/alim1535_wdt.c
@@ -18,9 +18,8 @@
 #include <linux/init.h>
 #include <linux/fs.h>
 #include <linux/pci.h>
-
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
 
 #define WATCHDOG_NAME "ALi_M1535"
 #define PFX WATCHDOG_NAME ": "
@@ -30,17 +29,21 @@
 static unsigned long ali_is_open;
 static char ali_expect_release;
 static struct pci_dev *ali_pci;
-static u32 ali_timeout_bits;    /* stores the computed timeout */
+static u32 ali_timeout_bits;            /* stores the computed timeout */
 static DEFINE_SPINLOCK(ali_lock);       /* Guards the hardware */
 
 /* module parameters */
 static int timeout = WATCHDOG_TIMEOUT;
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (0<timeout<18000, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+                "Watchdog timeout in seconds. (0 < timeout < 18000, default="
+                                __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  *      ali_start       -       start watchdog countdown
@@ -103,15 +106,16 @@ static void ali_keepalive(void)
 
 static int ali_settimer(int t)
 {
-        if(t < 0)
+        if (t < 0)
                 return -EINVAL;
-        else if(t < 60)
+        else if (t < 60)
                 ali_timeout_bits = t|(1<<6);
-        else if(t < 3600)
+        else if (t < 3600)
                 ali_timeout_bits = (t/60)|(1<<7);
-        else if(t < 18000)
+        else if (t < 18000)
                 ali_timeout_bits = (t/300)|(1<<6)|(1<<7);
-        else return -EINVAL;
+        else
+                return -EINVAL;
 
         timeout = t;
         return 0;
@@ -134,21 +138,22 @@ static int ali_settimer(int t)
  */
 
 static ssize_t ali_write(struct file *file, const char __user *data,
-                              size_t len, loff_t * ppos)
+                              size_t len, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
         if (len) {
                 if (!nowayout) {
                         size_t i;
 
-                        /* note: just in case someone wrote the magic character
-                         * five months ago... */
+                        /* note: just in case someone wrote the
+                           magic character five months ago... */
                         ali_expect_release = 0;
 
-                        /* scan to see whether or not we got the magic character */
+                        /* scan to see whether or not we got
+                           the magic character */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if(get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         ali_expect_release = 42;
@@ -163,7 +168,6 @@ static ssize_t ali_write(struct file *file, const char __user *data,
 
 /*
  *      ali_ioctl       -       handle watchdog ioctls
- *      @inode: VFS inode
  *      @file: VFS file pointer
  *      @cmd: ioctl number
  *      @arg: arguments to the ioctl
@@ -172,8 +176,7 @@ static ssize_t ali_write(struct file *file, const char __user *data,
  *      we want an extension to enable irq ack monitoring and the like
  */
 
-static int ali_ioctl(struct inode *inode, struct file *file,
-                          unsigned int cmd, unsigned long arg)
+static long ali_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
@@ -186,57 +189,45 @@ static int ali_ioctl(struct inode *inode, struct file *file,
         };
 
         switch (cmd) {
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident,
-                                sizeof (ident)) ? -EFAULT : 0;
-
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-
-                case WDIOC_KEEPALIVE:
-                        ali_keepalive();
-                        return 0;
-
-                case WDIOC_SETOPTIONS:
-                {
-                        int new_options, retval = -EINVAL;
-
-                        if (get_user (new_options, p))
-                                return -EFAULT;
-
-                        if (new_options & WDIOS_DISABLECARD) {
-                                ali_stop();
-                                retval = 0;
-                        }
-
-                        if (new_options & WDIOS_ENABLECARD) {
-                                ali_start();
-                                retval = 0;
-                        }
-
-                        return retval;
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
+        {
+                int new_options, retval = -EINVAL;
+
+                if (get_user(new_options, p))
+                        return -EFAULT;
+                if (new_options & WDIOS_DISABLECARD) {
+                        ali_stop();
+                        retval = 0;
                 }
-
-                case WDIOC_SETTIMEOUT:
-                {
-                        int new_timeout;
-
-                        if (get_user(new_timeout, p))
-                                return -EFAULT;
-
-                        if (ali_settimer(new_timeout))
-                            return -EINVAL;
-
-                        ali_keepalive();
-                        /* Fall */
+                if (new_options & WDIOS_ENABLECARD) {
+                        ali_start();
+                        retval = 0;
                 }
-
-                case WDIOC_GETTIMEOUT:
-                        return put_user(timeout, p);
-
-                default:
-                        return -ENOTTY;
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                ali_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+        {
+                int new_timeout;
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                if (ali_settimer(new_timeout))
+                        return -EINVAL;
+                ali_keepalive();
+                /* Fall */
+        }
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -274,10 +265,11 @@ static int ali_release(struct inode *inode, struct file *file)
         /*
          *      Shut off the timer.
          */
-        if (ali_expect_release == 42) {
+        if (ali_expect_release == 42)
                 ali_stop();
-        } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+        else {
+                printk(KERN_CRIT PFX
+                                "Unexpected close, not stopping watchdog!\n");
                 ali_keepalive();
         }
         clear_bit(0, &ali_is_open);
@@ -292,13 +284,11 @@ static int ali_release(struct inode *inode, struct file *file)
  */
 
 
-static int ali_notify_sys(struct notifier_block *this, unsigned long code, void *unused)
+static int ali_notify_sys(struct notifier_block *this,
+                                        unsigned long code, void *unused)
 {
-        if (code==SYS_DOWN || code==SYS_HALT) {
-                /* Turn the WDT off */
-                ali_stop();
-        }
-
+        if (code == SYS_DOWN || code == SYS_HALT)
+                ali_stop();             /* Turn the WDT off */
         return NOTIFY_DONE;
 }
 
@@ -340,10 +330,10 @@ static int __init ali_find_watchdog(void)
 
         /* Check for the a 7101 PMU */
         pdev = pci_get_device(PCI_VENDOR_ID_AL, 0x7101, NULL);
-        if(pdev == NULL)
+        if (pdev == NULL)
                 return -ENODEV;
 
-        if(pci_enable_device(pdev)) {
+        if (pci_enable_device(pdev)) {
                 pci_dev_put(pdev);
                 return -EIO;
         }
@@ -355,9 +345,12 @@ static int __init ali_find_watchdog(void)
          */
         pci_read_config_dword(pdev, 0xCC, &wdog);
 
-        wdog &= ~0x3F;          /* Timer bits */
-        wdog &= ~((1<<27)|(1<<26)|(1<<25)|(1<<24));     /* Issued events */
-        wdog &= ~((1<<16)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9));      /* No monitor bits */
+        /* Timer bits */
+        wdog &= ~0x3F;
+        /* Issued events */
+        wdog &= ~((1<<27)|(1<<26)|(1<<25)|(1<<24));
+        /* No monitor bits */
+        wdog &= ~((1<<16)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9));
 
         pci_write_config_dword(pdev, 0xCC, wdog);
 
@@ -369,12 +362,12 @@ static int __init ali_find_watchdog(void)
  */
 
 static const struct file_operations ali_fops = {
-        .owner =        THIS_MODULE,
-        .llseek =       no_llseek,
-        .write =        ali_write,
-        .ioctl =        ali_ioctl,
-        .open =         ali_open,
-        .release =      ali_release,
+        .owner          =       THIS_MODULE,
+        .llseek         =       no_llseek,
+        .write          =       ali_write,
+        .unlocked_ioctl =       ali_ioctl,
+        .open           =       ali_open,
+        .release        =       ali_release,
 };
 
 static struct miscdevice ali_miscdev = {
@@ -399,15 +392,16 @@ static int __init watchdog_init(void)
         int ret;
 
         /* Check whether or not the hardware watchdog is there */
-        if (ali_find_watchdog() != 0) {
+        if (ali_find_watchdog() != 0)
                 return -ENODEV;
-        }
 
-        /* Check that the timeout value is within it's range ; if not reset to the default */
+        /* Check that the timeout value is within it's range;
+           if not reset to the default */
         if (timeout < 1 || timeout >= 18000) {
                 timeout = WATCHDOG_TIMEOUT;
-                printk(KERN_INFO PFX "timeout value must be 0<timeout<18000, using %d\n",
-                        timeout);
+                printk(KERN_INFO PFX
+                     "timeout value must be 0 < timeout < 18000, using %d\n",
+                                                        timeout);
         }
 
         /* Calculate the watchdog's timeout */
@@ -415,15 +409,16 @@ static int __init watchdog_init(void)
 
         ret = register_reboot_notifier(&ali_notifier);
         if (ret != 0) {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        ret);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
                 goto out;
         }
 
         ret = misc_register(&ali_miscdev);
         if (ret != 0) {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                WATCHDOG_MINOR, ret);
                 goto unreg_reboot;
         }
 
diff --git a/drivers/watchdog/alim7101_wdt.c b/drivers/watchdog/alim7101_wdt.c
index 238273c98656..a045ef869439 100644
--- a/drivers/watchdog/alim7101_wdt.c
+++ b/drivers/watchdog/alim7101_wdt.c
@@ -31,9 +31,9 @@
 #include <linux/init.h>
 #include <linux/fs.h>
 #include <linux/pci.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 #define OUR_NAME "alim7101_wdt"
@@ -60,13 +60,17 @@
  */
 
 #define WATCHDOG_TIMEOUT 30            /* 30 sec default timeout */
-static int timeout = WATCHDOG_TIMEOUT; /* in seconds, will be multiplied by HZ to get seconds to wait for a ping */
+/* in seconds, will be multiplied by HZ to get seconds to wait for a ping */
+static int timeout = WATCHDOG_TIMEOUT;
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=3600, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+                "Watchdog timeout in seconds. (1<=timeout<=3600, default="
+                                __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 
-static int use_gpio = 0; /* Use the pic (for a1d revision alim7101) */
+static int use_gpio; /* Use the pic (for a1d revision alim7101) */
 module_param(use_gpio, int, 0);
-MODULE_PARM_DESC(use_gpio, "Use the gpio watchdog.  (required by old cobalt boards)");
+MODULE_PARM_DESC(use_gpio,
+                "Use the gpio watchdog (required by old cobalt boards).");
 
 static void wdt_timer_ping(unsigned long);
 static DEFINE_TIMER(timer, wdt_timer_ping, 0, 1);
@@ -77,8 +81,9 @@ static struct pci_dev *alim7101_pmu;
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
-                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  *      Whack the dog
@@ -89,23 +94,26 @@ static void wdt_timer_ping(unsigned long data)
         /* If we got a heartbeat pulse within the WDT_US_INTERVAL
          * we agree to ping the WDT
          */
-        char    tmp;
+        char tmp;
 
-        if(time_before(jiffies, next_heartbeat))
-        {
+        if (time_before(jiffies, next_heartbeat)) {
                 /* Ping the WDT (this is actually a disarm/arm sequence) */
                 pci_read_config_byte(alim7101_pmu, 0x92, &tmp);
-                pci_write_config_byte(alim7101_pmu, ALI_7101_WDT, (tmp & ~ALI_WDT_ARM));
-                pci_write_config_byte(alim7101_pmu, ALI_7101_WDT, (tmp | ALI_WDT_ARM));
+                pci_write_config_byte(alim7101_pmu,
+                                        ALI_7101_WDT, (tmp & ~ALI_WDT_ARM));
+                pci_write_config_byte(alim7101_pmu,
+                                        ALI_7101_WDT, (tmp | ALI_WDT_ARM));
                 if (use_gpio) {
-                        pci_read_config_byte(alim7101_pmu, ALI_7101_GPIO_O, &tmp);
-                        pci_write_config_byte(alim7101_pmu, ALI_7101_GPIO_O, tmp
-                                        | 0x20);
-                        pci_write_config_byte(alim7101_pmu, ALI_7101_GPIO_O, tmp
-                                        & ~0x20);
+                        pci_read_config_byte(alim7101_pmu,
+                                        ALI_7101_GPIO_O, &tmp);
+                        pci_write_config_byte(alim7101_pmu,
+                                        ALI_7101_GPIO_O, tmp | 0x20);
+                        pci_write_config_byte(alim7101_pmu,
+                                        ALI_7101_GPIO_O, tmp & ~0x20);
                 }
         } else {
-                printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n");
+                printk(KERN_WARNING PFX
+                        "Heartbeat lost! Will not ping the watchdog\n");
         }
         /* Re-set the timer interval */
         mod_timer(&timer, jiffies + WDT_INTERVAL);
@@ -117,21 +125,27 @@ static void wdt_timer_ping(unsigned long data)
 
 static void wdt_change(int writeval)
 {
-        char    tmp;
+        char tmp;
 
         pci_read_config_byte(alim7101_pmu, ALI_7101_WDT, &tmp);
         if (writeval == WDT_ENABLE) {
-                pci_write_config_byte(alim7101_pmu, ALI_7101_WDT, (tmp | ALI_WDT_ARM));
+                pci_write_config_byte(alim7101_pmu,
+                                        ALI_7101_WDT, (tmp | ALI_WDT_ARM));
                 if (use_gpio) {
-                        pci_read_config_byte(alim7101_pmu, ALI_7101_GPIO_O, &tmp);
-                        pci_write_config_byte(alim7101_pmu, ALI_7101_GPIO_O, tmp & ~0x20);
+                        pci_read_config_byte(alim7101_pmu,
+                                        ALI_7101_GPIO_O, &tmp);
+                        pci_write_config_byte(alim7101_pmu,
+                                        ALI_7101_GPIO_O, tmp & ~0x20);
                 }
 
         } else {
-                pci_write_config_byte(alim7101_pmu, ALI_7101_WDT, (tmp & ~ALI_WDT_ARM));
+                pci_write_config_byte(alim7101_pmu,
+                                        ALI_7101_WDT, (tmp & ~ALI_WDT_ARM));
                 if (use_gpio) {
-                        pci_read_config_byte(alim7101_pmu, ALI_7101_GPIO_O, &tmp);
-                        pci_write_config_byte(alim7101_pmu, ALI_7101_GPIO_O, tmp | 0x20);
+                        pci_read_config_byte(alim7101_pmu,
+                                        ALI_7101_GPIO_O, &tmp);
+                        pci_write_config_byte(alim7101_pmu,
+                                        ALI_7101_GPIO_O, tmp | 0x20);
                 }
         }
 }
@@ -169,10 +183,11 @@ static void wdt_keepalive(void)
  * /dev/watchdog handling
  */
 
-static ssize_t fop_write(struct file * file, const char __user * buf, size_t count, loff_t * ppos)
+static ssize_t fop_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
-        if(count) {
+        if (count) {
                 if (!nowayout) {
                         size_t ofs;
 
@@ -183,7 +198,7 @@ static ssize_t fop_write(struct file * file, const char __user * buf, size_t cou
                         /* now scan */
                         for (ofs = 0; ofs != count; ofs++) {
                                 char c;
-                                if (get_user(c, buf+ofs))
+                                if (get_user(c, buf + ofs))
                                         return -EFAULT;
                                 if (c == 'V')
                                         wdt_expect_close = 42;
@@ -195,119 +210,116 @@ static ssize_t fop_write(struct file * file, const char __user * buf, size_t cou
         return count;
 }
 
-static int fop_open(struct inode * inode, struct file * file)
+static int fop_open(struct inode *inode, struct file *file)
 {
         /* Just in case we're already talking to someone... */
-        if(test_and_set_bit(0, &wdt_is_open))
+        if (test_and_set_bit(0, &wdt_is_open))
                 return -EBUSY;
         /* Good, fire up the show */
         wdt_startup();
         return nonseekable_open(inode, file);
 }
 
-static int fop_close(struct inode * inode, struct file * file)
+static int fop_close(struct inode *inode, struct file *file)
 {
-        if(wdt_expect_close == 42)
+        if (wdt_expect_close == 42)
                 wdt_turnoff();
         else {
                 /* wim: shouldn't there be a: del_timer(&timer); */
-                printk(KERN_CRIT PFX "device file closed unexpectedly. Will not stop the WDT!\n");
+                printk(KERN_CRIT PFX
+                  "device file closed unexpectedly. Will not stop the WDT!\n");
         }
         clear_bit(0, &wdt_is_open);
         wdt_expect_close = 0;
         return 0;
 }
 
-static int fop_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
+static long fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
-        static struct watchdog_info ident =
-        {
-                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+        static struct watchdog_info ident = {
+                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
+                                                        | WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = "ALiM7101",
         };
 
-        switch(cmd)
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
         {
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident, sizeof(ident))?-EFAULT:0;
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-                case WDIOC_KEEPALIVE:
-                        wdt_keepalive();
-                        return 0;
-                case WDIOC_SETOPTIONS:
-                {
-                        int new_options, retval = -EINVAL;
-
-                        if(get_user(new_options, p))
-                                return -EFAULT;
-
-                        if(new_options & WDIOS_DISABLECARD) {
-                                wdt_turnoff();
-                                retval = 0;
-                        }
+                int new_options, retval = -EINVAL;
 
-                        if(new_options & WDIOS_ENABLECARD) {
-                                wdt_startup();
-                                retval = 0;
-                        }
-
-                        return retval;
+                if (get_user(new_options, p))
+                        return -EFAULT;
+                if (new_options & WDIOS_DISABLECARD) {
+                        wdt_turnoff();
+                        retval = 0;
                 }
-                case WDIOC_SETTIMEOUT:
-                {
-                        int new_timeout;
-
-                        if(get_user(new_timeout, p))
-                                return -EFAULT;
-
-                        if(new_timeout < 1 || new_timeout > 3600) /* arbitrary upper limit */
-                                return -EINVAL;
-
-                        timeout = new_timeout;
-                        wdt_keepalive();
-                        /* Fall through */
+                if (new_options & WDIOS_ENABLECARD) {
+                        wdt_startup();
+                        retval = 0;
                 }
-                case WDIOC_GETTIMEOUT:
-                        return put_user(timeout, p);
-                default:
-                        return -ENOTTY;
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                wdt_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+        {
+                int new_timeout;
+
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                /* arbitrary upper limit */
+                if (new_timeout < 1 || new_timeout > 3600)
+                        return -EINVAL;
+                timeout = new_timeout;
+                wdt_keepalive();
+                /* Fall through */
+        }
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+        default:
+                return -ENOTTY;
         }
 }
 
 static const struct file_operations wdt_fops = {
-        .owner=         THIS_MODULE,
-        .llseek=        no_llseek,
-        .write=         fop_write,
-        .open=          fop_open,
-        .release=       fop_close,
-        .ioctl=         fop_ioctl,
+        .owner          =       THIS_MODULE,
+        .llseek         =       no_llseek,
+        .write          =       fop_write,
+        .open           =       fop_open,
+        .release        =       fop_close,
+        .unlocked_ioctl =       fop_ioctl,
 };
 
 static struct miscdevice wdt_miscdev = {
-        .minor=WATCHDOG_MINOR,
-        .name="watchdog",
-        .fops=&wdt_fops,
+        .minor  =       WATCHDOG_MINOR,
+        .name   =       "watchdog",
+        .fops   =       &wdt_fops,
 };
 
 /*
  *      Notifier for system down
  */
 
-static int wdt_notify_sys(struct notifier_block *this, unsigned long code, void *unused)
+static int wdt_notify_sys(struct notifier_block *this,
+                                        unsigned long code, void *unused)
 {
-        if (code==SYS_DOWN || code==SYS_HALT)
+        if (code == SYS_DOWN || code == SYS_HALT)
                 wdt_turnoff();
 
-        if (code==SYS_RESTART) {
+        if (code == SYS_RESTART) {
                 /*
-                 * Cobalt devices have no way of rebooting themselves other than
-                 * getting the watchdog to pull reset, so we restart the watchdog on
-                 * reboot with no heartbeat
+                 * Cobalt devices have no way of rebooting themselves other
+                 * than getting the watchdog to pull reset, so we restart the
+                 * watchdog on reboot with no heartbeat
                  */
                 wdt_change(WDT_ENABLE);
                 printk(KERN_INFO PFX "Watchdog timer is now enabled with no heartbeat - should reboot in ~1 second.\n");
@@ -320,8 +332,7 @@ static int wdt_notify_sys(struct notifier_block *this, unsigned long code, void
  *      turn the timebomb registers off.
  */
 
-static struct notifier_block wdt_notifier=
-{
+static struct notifier_block wdt_notifier = {
         .notifier_call = wdt_notify_sys,
 };
 
@@ -354,7 +365,8 @@ static int __init alim7101_wdt_init(void)
         ali1543_south = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
                 NULL);
         if (!ali1543_south) {
-                printk(KERN_INFO PFX "ALi 1543 South-Bridge not present - WDT not set\n");
+                printk(KERN_INFO PFX
+                        "ALi 1543 South-Bridge not present - WDT not set\n");
                 goto err_out;
         }
         pci_read_config_byte(ali1543_south, 0x5e, &tmp);
@@ -363,24 +375,25 @@ static int __init alim7101_wdt_init(void)
                 if (!use_gpio) {
                         printk(KERN_INFO PFX "Detected old alim7101 revision 'a1d'.  If this is a cobalt board, set the 'use_gpio' module parameter.\n");
                         goto err_out;
-                } 
+                }
                 nowayout = 1;
         } else if ((tmp & 0x1e) != 0x12 && (tmp & 0x1e) != 0x00) {
                 printk(KERN_INFO PFX "ALi 1543 South-Bridge does not have the correct revision number (???1001?) - WDT not set\n");
                 goto err_out;
         }
 
-        if(timeout < 1 || timeout > 3600) /* arbitrary upper limit */
-        {
+        if (timeout < 1 || timeout > 3600) {
+                /* arbitrary upper limit */
                 timeout = WATCHDOG_TIMEOUT;
-                printk(KERN_INFO PFX "timeout value must be 1<=x<=3600, using %d\n",
-                        timeout);
+                printk(KERN_INFO PFX
+                        "timeout value must be 1 <= x <= 3600, using %d\n",
+                                                                timeout);
         }
 
         rc = register_reboot_notifier(&wdt_notifier);
         if (rc) {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        rc);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", rc);
                 goto err_out;
         }
 
@@ -391,9 +404,8 @@ static int __init alim7101_wdt_init(void)
                 goto err_out_reboot;
         }
 
-        if (nowayout) {
+        if (nowayout)
                 __module_get(THIS_MODULE);
-        }
 
         printk(KERN_INFO PFX "WDT driver for ALi M7101 initialised. timeout=%d sec (nowayout=%d)\n",
                 timeout, nowayout);
diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c
index ef7b0d67095e..55dcbfe2bb72 100644
--- a/drivers/watchdog/ar7_wdt.c
+++ b/drivers/watchdog/ar7_wdt.c
@@ -213,7 +213,7 @@ static int ar7_wdt_notify_sys(struct notifier_block *this,
 }
 
 static struct notifier_block ar7_wdt_notifier = {
-        .notifier_call = ar7_wdt_notify_sys
+        .notifier_call = ar7_wdt_notify_sys,
 };
 
 static ssize_t ar7_wdt_write(struct file *file, const char *data,
@@ -230,7 +230,7 @@ static ssize_t ar7_wdt_write(struct file *file, const char *data,
                 expect_close = 0;
                 for (i = 0; i < len; ++i) {
                         char c;
-                        if (get_user(c, data+i))
+                        if (get_user(c, data + i))
                                 return -EFAULT;
                         if (c == 'V')
                                 expect_close = 1;
@@ -251,8 +251,6 @@ static long ar7_wdt_ioctl(struct file *file,
         int new_margin;
 
         switch (cmd) {
-        default:
-                return -ENOTTY;
         case WDIOC_GETSUPPORT:
                 if (copy_to_user((struct watchdog_info *)arg, &ident,
                                 sizeof(ident)))
@@ -281,6 +279,8 @@ static long ar7_wdt_ioctl(struct file *file,
                 if (put_user(margin, (int *)arg))
                         return -EFAULT;
                 return 0;
+        default:
+                return -ENOTTY;
         }
 }
 
diff --git a/drivers/watchdog/at32ap700x_wdt.c b/drivers/watchdog/at32ap700x_wdt.c
index ae0fca5e8749..e8ae638e5804 100644
--- a/drivers/watchdog/at32ap700x_wdt.c
+++ b/drivers/watchdog/at32ap700x_wdt.c
@@ -212,8 +212,8 @@ static struct watchdog_info at32_wdt_info = {
 /*
  * Handle commands from user-space.
  */
-static int at32_wdt_ioctl(struct inode *inode, struct file *file,
-                unsigned int cmd, unsigned long arg)
+static long at32_wdt_ioctl(struct file *file,
+                                unsigned int cmd, unsigned long arg)
 {
         int ret = -ENOTTY;
         int time;
@@ -221,27 +221,10 @@ static int at32_wdt_ioctl(struct inode *inode, struct file *file,
         int __user *p = argp;
 
         switch (cmd) {
-        case WDIOC_KEEPALIVE:
-                at32_wdt_pat();
-                ret = 0;
-                break;
         case WDIOC_GETSUPPORT:
                 ret = copy_to_user(argp, &at32_wdt_info,
                                 sizeof(at32_wdt_info)) ? -EFAULT : 0;
                 break;
-        case WDIOC_SETTIMEOUT:
-                ret = get_user(time, p);
-                if (ret)
-                        break;
-                ret = at32_wdt_settimeout(time);
-                if (ret)
-                        break;
-                /* Enable new time value */
-                at32_wdt_start();
-                /* fall through */
-        case WDIOC_GETTIMEOUT:
-                ret = put_user(wdt->timeout, p);
-                break;
         case WDIOC_GETSTATUS:
                 ret = put_user(0, p);
                 break;
@@ -258,6 +241,23 @@ static int at32_wdt_ioctl(struct inode *inode, struct file *file,
                         at32_wdt_start();
                 ret = 0;
                 break;
+        case WDIOC_KEEPALIVE:
+                at32_wdt_pat();
+                ret = 0;
+                break;
+        case WDIOC_SETTIMEOUT:
+                ret = get_user(time, p);
+                if (ret)
+                        break;
+                ret = at32_wdt_settimeout(time);
+                if (ret)
+                        break;
+                /* Enable new time value */
+                at32_wdt_start();
+                /* fall through */
+        case WDIOC_GETTIMEOUT:
+                ret = put_user(wdt->timeout, p);
+                break;
         }
 
         return ret;
@@ -283,7 +283,7 @@ static ssize_t at32_wdt_write(struct file *file, const char __user *data,
                          */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if (get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_release = 42;
@@ -298,7 +298,7 @@ static ssize_t at32_wdt_write(struct file *file, const char __user *data,
 static const struct file_operations at32_wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
-        .ioctl          = at32_wdt_ioctl,
+        .unlocked_ioctl = at32_wdt_ioctl,
         .open           = at32_wdt_open,
         .release        = at32_wdt_close,
         .write          = at32_wdt_write,
@@ -391,7 +391,6 @@ static int __exit at32_wdt_remove(struct platform_device *pdev)
                 wdt = NULL;
                 platform_set_drvdata(pdev, NULL);
         }
-
         return 0;
 }
 
diff --git a/drivers/watchdog/at91rm9200_wdt.c b/drivers/watchdog/at91rm9200_wdt.c
index 9ff9a9565320..d061f0ad2d20 100644
--- a/drivers/watchdog/at91rm9200_wdt.c
+++ b/drivers/watchdog/at91rm9200_wdt.c
@@ -20,9 +20,8 @@
 #include <linux/platform_device.h>
 #include <linux/types.h>
 #include <linux/watchdog.h>
-#include <asm/uaccess.h>
-#include <asm/arch/at91_st.h>
-
+#include <linux/uaccess.h>
+#include <mach/at91_st.h>
 
 #define WDT_DEFAULT_TIME        5       /* seconds */
 #define WDT_MAX_TIME            256     /* seconds */
@@ -31,11 +30,14 @@ static int wdt_time = WDT_DEFAULT_TIME;
 static int nowayout = WATCHDOG_NOWAYOUT;
 
 module_param(wdt_time, int, 0);
-MODULE_PARM_DESC(wdt_time, "Watchdog time in seconds. (default="__MODULE_STRING(WDT_DEFAULT_TIME) ")");
+MODULE_PARM_DESC(wdt_time, "Watchdog time in seconds. (default="
+                                __MODULE_STRING(WDT_DEFAULT_TIME) ")");
 
 #ifdef CONFIG_WATCHDOG_NOWAYOUT
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 #endif
 
 
@@ -46,7 +48,7 @@ static unsigned long at91wdt_busy;
 /*
  * Disable the watchdog.
  */
-static void inline at91_wdt_stop(void)
+static inline void at91_wdt_stop(void)
 {
         at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN);
 }
@@ -54,16 +56,17 @@ static void inline at91_wdt_stop(void)
 /*
  * Enable and reset the watchdog.
  */
-static void inline at91_wdt_start(void)
+static inline void at91_wdt_start(void)
 {
-        at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN | (((65536 * wdt_time) >> 8) & AT91_ST_WDV));
+        at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN |
+                                (((65536 * wdt_time) >> 8) & AT91_ST_WDV));
         at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
 }
 
 /*
  * Reload the watchdog timer.  (ie, pat the watchdog)
  */
-static void inline at91_wdt_reload(void)
+static inline void at91_wdt_reload(void)
 {
         at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
 }
@@ -89,8 +92,9 @@ static int at91_wdt_open(struct inode *inode, struct file *file)
  */
 static int at91_wdt_close(struct inode *inode, struct file *file)
 {
+        /* Disable the watchdog when file is closed */
         if (!nowayout)
-                at91_wdt_stop();        /* Disable the watchdog when file is closed */
+                at91_wdt_stop();
 
         clear_bit(0, &at91wdt_busy);
         return 0;
@@ -110,7 +114,8 @@ static int at91_wdt_settimeout(int new_time)
         if ((new_time <= 0) || (new_time > WDT_MAX_TIME))
                 return -EINVAL;
 
-        /* Set new watchdog time. It will be used when at91_wdt_start() is called. */
+        /* Set new watchdog time. It will be used when
+           at91_wdt_start() is called. */
         wdt_time = new_time;
         return 0;
 }
@@ -123,60 +128,52 @@ static struct watchdog_info at91_wdt_info = {
 /*
  * Handle commands from user-space.
  */
-static int at91_wdt_ioctl(struct inode *inode, struct file *file,
-                unsigned int cmd, unsigned long arg)
+static long at91_wdt_ioctl(struct file *file,
+                                        unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         int new_value;
 
-        switch(cmd) {
-                case WDIOC_KEEPALIVE:
-                        at91_wdt_reload();      /* pat the watchdog */
-                        return 0;
-
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &at91_wdt_info, sizeof(at91_wdt_info)) ? -EFAULT : 0;
-
-                case WDIOC_SETTIMEOUT:
-                        if (get_user(new_value, p))
-                                return -EFAULT;
-
-                        if (at91_wdt_settimeout(new_value))
-                                return -EINVAL;
-
-                        /* Enable new time value */
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &at91_wdt_info,
+                                sizeof(at91_wdt_info)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
+                if (get_user(new_value, p))
+                        return -EFAULT;
+                if (new_value & WDIOS_DISABLECARD)
+                        at91_wdt_stop();
+                if (new_value & WDIOS_ENABLECARD)
                         at91_wdt_start();
-
-                        /* Return current value */
-                        return put_user(wdt_time, p);
-
-                case WDIOC_GETTIMEOUT:
-                        return put_user(wdt_time, p);
-
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-
-                case WDIOC_SETOPTIONS:
-                        if (get_user(new_value, p))
-                                return -EFAULT;
-
-                        if (new_value & WDIOS_DISABLECARD)
-                                at91_wdt_stop();
-                        if (new_value & WDIOS_ENABLECARD)
-                                at91_wdt_start();
-                        return 0;
-
-                default:
-                        return -ENOTTY;
+                return 0;
+        case WDIOC_KEEPALIVE:
+                at91_wdt_reload();      /* pat the watchdog */
+                return 0;
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_value, p))
+                        return -EFAULT;
+                if (at91_wdt_settimeout(new_value))
+                        return -EINVAL;
+                /* Enable new time value */
+                at91_wdt_start();
+                /* Return current value */
+                return put_user(wdt_time, p);
+        case WDIOC_GETTIMEOUT:
+                return put_user(wdt_time, p);
+        default:
+                return -ENOTTY;
         }
 }
 
 /*
  * Pat the watchdog whenever device is written to.
  */
-static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
+static ssize_t at91_wdt_write(struct file *file, const char *data,
+                                                size_t len, loff_t *ppos)
 {
         at91_wdt_reload();              /* pat the watchdog */
         return len;
@@ -187,7 +184,7 @@ static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len, l
 static const struct file_operations at91wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
-        .ioctl          = at91_wdt_ioctl,
+        .unlocked_ioctl = at91_wdt_ioctl,
         .open           = at91_wdt_open,
         .release        = at91_wdt_close,
         .write          = at91_wdt_write,
@@ -211,7 +208,8 @@ static int __init at91wdt_probe(struct platform_device *pdev)
         if (res)
                 return res;
 
-        printk("AT91 Watchdog Timer enabled (%d seconds%s)\n", wdt_time, nowayout ? ", nowayout" : "");
+        printk(KERN_INFO "AT91 Watchdog Timer enabled (%d seconds%s)\n",
+                                wdt_time, nowayout ? ", nowayout" : "");
         return 0;
 }
 
@@ -265,7 +263,8 @@ static struct platform_driver at91wdt_driver = {
 
 static int __init at91_wdt_init(void)
 {
-        /* Check that the heartbeat value is within range; if not reset to the default */
+        /* Check that the heartbeat value is within range;
+           if not reset to the default */
         if (at91_wdt_settimeout(wdt_time)) {
                 at91_wdt_settimeout(WDT_DEFAULT_TIME);
                 pr_info("at91_wdt: wdt_time value must be 1 <= wdt_time <= 256, using %d\n", wdt_time);
diff --git a/drivers/watchdog/bfin_wdt.c b/drivers/watchdog/bfin_wdt.c
index 03b3e3d91e7c..31b42253054e 100644
--- a/drivers/watchdog/bfin_wdt.c
+++ b/drivers/watchdog/bfin_wdt.c
@@ -24,8 +24,8 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/uaccess.h>
 #include <asm/blackfin.h>
-#include <asm/uaccess.h>
 
 #define stamp(fmt, args...) pr_debug("%s:%i: " fmt "\n", __func__, __LINE__, ## args)
 #define stampit() stamp("here i am")
@@ -148,7 +148,8 @@ static int bfin_wdt_set_timeout(unsigned long t)
                 int run = bfin_wdt_running();
                 bfin_wdt_stop();
                 bfin_write_WDOG_CNT(cnt);
-                if (run) bfin_wdt_start();
+                if (run)
+                        bfin_wdt_start();
         }
         spin_unlock_irqrestore(&bfin_wdt_spinlock, flags);
 
@@ -191,16 +192,15 @@ static int bfin_wdt_release(struct inode *inode, struct file *file)
 {
         stampit();
 
-        if (expect_close == 42) {
+        if (expect_close == 42)
                 bfin_wdt_stop();
-        } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+        else {
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
                 bfin_wdt_keepalive();
         }
-
         expect_close = 0;
         clear_bit(0, &open_check);
-
         return 0;
 }
 
@@ -214,7 +214,7 @@ static int bfin_wdt_release(struct inode *inode, struct file *file)
  *      Pings the watchdog on write.
  */
 static ssize_t bfin_wdt_write(struct file *file, const char __user *data,
-                              size_t len, loff_t *ppos)
+                                                size_t len, loff_t *ppos)
 {
         stampit();
 
@@ -241,7 +241,6 @@ static ssize_t bfin_wdt_write(struct file *file, const char __user *data,
 
 /**
  *      bfin_wdt_ioctl - Query Device
- *      @inode: inode of device
  *      @file: file handle of device
  *      @cmd: watchdog command
  *      @arg: argument
@@ -249,8 +248,8 @@ static ssize_t bfin_wdt_write(struct file *file, const char __user *data,
  *      Query basic information from the device or ping it, as outlined by the
  *      watchdog API.
  */
-static int bfin_wdt_ioctl(struct inode *inode, struct file *file,
-                          unsigned int cmd, unsigned long arg)
+static long bfin_wdt_ioctl(struct file *file,
+                                unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
@@ -258,59 +257,49 @@ static int bfin_wdt_ioctl(struct inode *inode, struct file *file,
         stampit();
 
         switch (cmd) {
-                default:
-                        return -ENOTTY;
-
-                case WDIOC_GETSUPPORT:
-                        if (copy_to_user(argp, &bfin_wdt_info, sizeof(bfin_wdt_info)))
-                                return -EFAULT;
-                        else
-                                return 0;
-
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(!!(_bfin_swrst & SWRST_RESET_WDOG), p);
-
-                case WDIOC_KEEPALIVE:
-                        bfin_wdt_keepalive();
+        case WDIOC_GETSUPPORT:
+                if (copy_to_user(argp, &bfin_wdt_info, sizeof(bfin_wdt_info)))
+                        return -EFAULT;
+                else
                         return 0;
-
-                case WDIOC_SETTIMEOUT: {
-                        int new_timeout;
-
-                        if (get_user(new_timeout, p))
-                                return -EFAULT;
-
-                        if (bfin_wdt_set_timeout(new_timeout))
-                                return -EINVAL;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(!!(_bfin_swrst & SWRST_RESET_WDOG), p);
+        case WDIOC_SETOPTIONS: {
+                unsigned long flags;
+                int options, ret = -EINVAL;
+
+                if (get_user(options, p))
+                        return -EFAULT;
+
+                spin_lock_irqsave(&bfin_wdt_spinlock, flags);
+                if (options & WDIOS_DISABLECARD) {
+                        bfin_wdt_stop();
+                        ret = 0;
                 }
-                        /* Fall */
-                case WDIOC_GETTIMEOUT:
-                        return put_user(timeout, p);
-
-                case WDIOC_SETOPTIONS: {
-                        unsigned long flags;
-                        int options, ret = -EINVAL;
-
-                        if (get_user(options, p))
-                                return -EFAULT;
-
-                        spin_lock_irqsave(&bfin_wdt_spinlock, flags);
-
-                        if (options & WDIOS_DISABLECARD) {
-                                bfin_wdt_stop();
-                                ret = 0;
-                        }
-
-                        if (options & WDIOS_ENABLECARD) {
-                                bfin_wdt_start();
-                                ret = 0;
-                        }
-
-                        spin_unlock_irqrestore(&bfin_wdt_spinlock, flags);
-
-                        return ret;
+                if (options & WDIOS_ENABLECARD) {
+                        bfin_wdt_start();
+                        ret = 0;
                 }
+                spin_unlock_irqrestore(&bfin_wdt_spinlock, flags);
+                return ret;
+        }
+        case WDIOC_KEEPALIVE:
+                bfin_wdt_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT: {
+                int new_timeout;
+
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                if (bfin_wdt_set_timeout(new_timeout))
+                        return -EINVAL;
+        }
+        /* Fall */
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -323,8 +312,8 @@ static int bfin_wdt_ioctl(struct inode *inode, struct file *file,
  *      Handles specific events, such as turning off the watchdog during a
  *      shutdown event.
  */
-static int bfin_wdt_notify_sys(struct notifier_block *this, unsigned long code,
-                               void *unused)
+static int bfin_wdt_notify_sys(struct notifier_block *this,
+                                        unsigned long code, void *unused)
 {
         stampit();
 
@@ -379,12 +368,12 @@ static int bfin_wdt_resume(struct platform_device *pdev)
 #endif
 
 static const struct file_operations bfin_wdt_fops = {
-        .owner    = THIS_MODULE,
-        .llseek   = no_llseek,
-        .write    = bfin_wdt_write,
-        .ioctl    = bfin_wdt_ioctl,
-        .open     = bfin_wdt_open,
-        .release  = bfin_wdt_release,
+        .owner          = THIS_MODULE,
+        .llseek         = no_llseek,
+        .write          = bfin_wdt_write,
+        .unlocked_ioctl = bfin_wdt_ioctl,
+        .open           = bfin_wdt_open,
+        .release        = bfin_wdt_release,
 };
 
 static struct miscdevice bfin_wdt_miscdev = {
@@ -396,8 +385,8 @@ static struct miscdevice bfin_wdt_miscdev = {
 static struct watchdog_info bfin_wdt_info = {
         .identity = "Blackfin Watchdog",
         .options  = WDIOF_SETTIMEOUT |
-                    WDIOF_KEEPALIVEPING |
-                    WDIOF_MAGICCLOSE,
+                    WDIOF_KEEPALIVEPING |
+                    WDIOF_MAGICCLOSE,
 };
 
 static struct notifier_block bfin_wdt_notifier = {
@@ -416,14 +405,16 @@ static int __devinit bfin_wdt_probe(struct platform_device *pdev)
 
         ret = register_reboot_notifier(&bfin_wdt_notifier);
         if (ret) {
-                pr_devinit(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n", ret);
+                pr_devinit(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
                 return ret;
         }
 
         ret = misc_register(&bfin_wdt_miscdev);
         if (ret) {
-                pr_devinit(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                       WATCHDOG_MINOR, ret);
+                pr_devinit(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                WATCHDOG_MINOR, ret);
                 unregister_reboot_notifier(&bfin_wdt_notifier);
                 return ret;
         }
@@ -516,7 +507,11 @@ MODULE_LICENSE("GPL");
 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 
 module_param(timeout, uint, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=((2^32)/SCLK), default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+        "Watchdog timeout in seconds. (1<=timeout<=((2^32)/SCLK), default="
+                __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index 770824458d45..c3b78a76f173 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -18,9 +18,9 @@
 #include <linux/miscdevice.h>
 #include <linux/notifier.h>
 #include <linux/watchdog.h>
+#include <linux/uaccess.h>
 
 #include <asm/reg_booke.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 /* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
@@ -32,7 +32,7 @@
  */
 
 #ifdef  CONFIG_FSL_BOOKE
-#define WDT_PERIOD_DEFAULT 63   /* Ex. wdt_period=28 bus=333Mhz , reset=~40sec */
+#define WDT_PERIOD_DEFAULT 63   /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */
 #else
 #define WDT_PERIOD_DEFAULT 3    /* Refer to the PPC40x and PPC4xx manuals */
 #endif                          /* for timing information */
@@ -82,16 +82,15 @@ static struct watchdog_info ident = {
         .identity = "PowerPC Book-E Watchdog",
 };
 
-static int booke_wdt_ioctl(struct inode *inode, struct file *file,
-                            unsigned int cmd, unsigned long arg)
+static long booke_wdt_ioctl(struct file *file,
+                                unsigned int cmd, unsigned long arg)
 {
         u32 tmp = 0;
         u32 __user *p = (u32 __user *)arg;
 
         switch (cmd) {
         case WDIOC_GETSUPPORT:
-                if (copy_to_user((struct watchdog_info __user *)arg, &ident,
-                                sizeof(struct watchdog_info)))
+                if (copy_to_user(arg, &ident, sizeof(struct watchdog_info)))
                         return -EFAULT;
         case WDIOC_GETSTATUS:
                 return put_user(ident.options, p);
@@ -100,16 +99,6 @@ static int booke_wdt_ioctl(struct inode *inode, struct file *file,
                 tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
                 /* returns 1 if last reset was caused by the WDT */
                 return (tmp ? 1 : 0);
-        case WDIOC_KEEPALIVE:
-                booke_wdt_ping();
-                return 0;
-        case WDIOC_SETTIMEOUT:
-                if (get_user(booke_wdt_period, p))
-                        return -EFAULT;
-                mtspr(SPRN_TCR, (mfspr(SPRN_TCR)&~WDTP(0))|WDTP(booke_wdt_period));
-                return 0;
-        case WDIOC_GETTIMEOUT:
-                return put_user(booke_wdt_period, p);
         case WDIOC_SETOPTIONS:
                 if (get_user(tmp, p))
                         return -EINVAL;
@@ -119,6 +108,17 @@ static int booke_wdt_ioctl(struct inode *inode, struct file *file,
                 } else
                         return -EINVAL;
                 return 0;
+        case WDIOC_KEEPALIVE:
+                booke_wdt_ping();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+                if (get_user(booke_wdt_period, p))
+                        return -EFAULT;
+                mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP(0)) |
+                                                WDTP(booke_wdt_period));
+                return 0;
+        case WDIOC_GETTIMEOUT:
+                return put_user(booke_wdt_period, p);
         default:
                 return -ENOTTY;
         }
@@ -132,8 +132,9 @@ static int booke_wdt_open(struct inode *inode, struct file *file)
         if (booke_wdt_enabled == 0) {
                 booke_wdt_enabled = 1;
                 on_each_cpu(__booke_wdt_enable, NULL, 0);
-                printk(KERN_INFO "PowerPC Book-E Watchdog Timer Enabled "
-                                "(wdt_period=%d)\n", booke_wdt_period);
+                printk(KERN_INFO
+                      "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
+                                booke_wdt_period);
         }
         spin_unlock(&booke_wdt_lock);
 
@@ -144,7 +145,7 @@ static const struct file_operations booke_wdt_fops = {
         .owner = THIS_MODULE,
         .llseek = no_llseek,
         .write = booke_wdt_write,
-        .ioctl = booke_wdt_ioctl,
+        .unlocked_ioctl = booke_wdt_ioctl,
         .open = booke_wdt_open,
 };
 
@@ -175,8 +176,9 @@ static int __init booke_wdt_init(void)
 
         spin_lock(&booke_wdt_lock);
         if (booke_wdt_enabled == 1) {
-                printk(KERN_INFO "PowerPC Book-E Watchdog Timer Enabled "
-                                "(wdt_period=%d)\n", booke_wdt_period);
+                printk(KERN_INFO
+                      "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
+                                booke_wdt_period);
                 on_each_cpu(__booke_wdt_enable, NULL, 0);
         }
         spin_unlock(&booke_wdt_lock);
diff --git a/drivers/watchdog/cpu5wdt.c b/drivers/watchdog/cpu5wdt.c
index df72f90123df..71f6d7eec9a8 100644
--- a/drivers/watchdog/cpu5wdt.c
+++ b/drivers/watchdog/cpu5wdt.c
@@ -30,16 +30,16 @@
 #include <linux/timer.h>
 #include <linux/completion.h>
 #include <linux/jiffies.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-
+#include <linux/io.h>
+#include <linux/uaccess.h>
 #include <linux/watchdog.h>
 
 /* adjustable parameters */
 
-static int verbose = 0;
+static int verbose;
 static int port = 0x91;
 static int ticks = 10000;
+static spinlock_t cpu5wdt_lock;
 
 #define PFX                     "cpu5wdt: "
 
@@ -70,12 +70,13 @@ static struct {
 
 static void cpu5wdt_trigger(unsigned long unused)
 {
-        if ( verbose > 2 )
+        if (verbose > 2)
                 printk(KERN_DEBUG PFX "trigger at %i ticks\n", ticks);
 
-        if( cpu5wdt_device.running )
+        if (cpu5wdt_device.running)
                 ticks--;
 
+        spin_lock(&cpu5wdt_lock);
         /* keep watchdog alive */
         outb(1, port + CPU5WDT_TRIGGER_REG);
 
@@ -86,6 +87,7 @@ static void cpu5wdt_trigger(unsigned long unused)
                 /* ticks doesn't matter anyway */
                 complete(&cpu5wdt_device.stop);
         }
+        spin_unlock(&cpu5wdt_lock);
 
 }
 
@@ -93,14 +95,17 @@ static void cpu5wdt_reset(void)
 {
         ticks = cpu5wdt_device.default_ticks;
 
-        if ( verbose )
+        if (verbose)
                 printk(KERN_DEBUG PFX "reset (%i ticks)\n", (int) ticks);
 
 }
 
 static void cpu5wdt_start(void)
 {
-        if ( !cpu5wdt_device.queue ) {
+        unsigned long flags;
+
+        spin_lock_irqsave(&cpu5wdt_lock, flags);
+        if (!cpu5wdt_device.queue) {
                 cpu5wdt_device.queue = 1;
                 outb(0, port + CPU5WDT_TIME_A_REG);
                 outb(0, port + CPU5WDT_TIME_B_REG);
@@ -111,18 +116,20 @@ static void cpu5wdt_start(void)
         }
         /* if process dies, counter is not decremented */
         cpu5wdt_device.running++;
+        spin_unlock_irqrestore(&cpu5wdt_lock, flags);
 }
 
 static int cpu5wdt_stop(void)
 {
-        if ( cpu5wdt_device.running )
-                cpu5wdt_device.running = 0;
+        unsigned long flags;
 
+        spin_lock_irqsave(&cpu5wdt_lock, flags);
+        if (cpu5wdt_device.running)
+                cpu5wdt_device.running = 0;
         ticks = cpu5wdt_device.default_ticks;
-
-        if ( verbose )
+        spin_unlock_irqrestore(&cpu5wdt_lock, flags);
+        if (verbose)
                 printk(KERN_CRIT PFX "stop not possible\n");
-
         return -EIO;
 }
 
@@ -130,9 +137,8 @@ static int cpu5wdt_stop(void)
 
 static int cpu5wdt_open(struct inode *inode, struct file *file)
 {
-        if ( test_and_set_bit(0, &cpu5wdt_device.inuse) )
+        if (test_and_set_bit(0, &cpu5wdt_device.inuse))
                 return -EBUSY;
-
         return nonseekable_open(inode, file);
 }
 
@@ -142,67 +148,58 @@ static int cpu5wdt_release(struct inode *inode, struct file *file)
         return 0;
 }
 
-static int cpu5wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
+static long cpu5wdt_ioctl(struct file *file, unsigned int cmd,
+                                                unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
+        int __user *p = argp;
         unsigned int value;
-        static struct watchdog_info ident =
-        {
+        static struct watchdog_info ident = {
                 .options = WDIOF_CARDRESET,
                 .identity = "CPU5 WDT",
         };
 
-        switch(cmd) {
-                case WDIOC_KEEPALIVE:
-                        cpu5wdt_reset();
-                        break;
-                case WDIOC_GETSTATUS:
-                        value = inb(port + CPU5WDT_STATUS_REG);
-                        value = (value >> 2) & 1;
-                        if ( copy_to_user(argp, &value, sizeof(int)) )
-                                return -EFAULT;
-                        break;
-                case WDIOC_GETBOOTSTATUS:
-                        if ( copy_to_user(argp, &value, sizeof(int)) )
-                                return -EFAULT;
-                        break;
-                case WDIOC_GETSUPPORT:
-                        if ( copy_to_user(argp, &ident, sizeof(ident)) )
-                                return -EFAULT;
-                        break;
-                case WDIOC_SETOPTIONS:
-                        if ( copy_from_user(&value, argp, sizeof(int)) )
-                                return -EFAULT;
-                        switch(value) {
-                                case WDIOS_ENABLECARD:
-                                        cpu5wdt_start();
-                                        break;
-                                case WDIOS_DISABLECARD:
-                                        return cpu5wdt_stop();
-                                default:
-                                        return -EINVAL;
-                        }
-                        break;
-                default:
-                        return -ENOTTY;
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                if (copy_to_user(argp, &ident, sizeof(ident)))
+                        return -EFAULT;
+                break;
+        case WDIOC_GETSTATUS:
+                value = inb(port + CPU5WDT_STATUS_REG);
+                value = (value >> 2) & 1;
+                return put_user(value, p);
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
+                if (get_user(value, p))
+                        return -EFAULT;
+                if (value & WDIOS_ENABLECARD)
+                        cpu5wdt_start();
+                if (value & WDIOS_DISABLECARD)
+                        cpu5wdt_stop();
+                break;
+        case WDIOC_KEEPALIVE:
+                cpu5wdt_reset();
+                break;
+        default:
+                return -ENOTTY;
         }
         return 0;
 }
 
-static ssize_t cpu5wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
+static ssize_t cpu5wdt_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
-        if ( !count )
+        if (!count)
                 return -EIO;
-
         cpu5wdt_reset();
-
         return count;
 }
 
 static const struct file_operations cpu5wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
-        .ioctl          = cpu5wdt_ioctl,
+        .unlocked_ioctl = cpu5wdt_ioctl,
         .open           = cpu5wdt_open,
         .write          = cpu5wdt_write,
         .release        = cpu5wdt_release,
@@ -221,37 +218,36 @@ static int __devinit cpu5wdt_init(void)
         unsigned int val;
         int err;
 
-        if ( verbose )
-                printk(KERN_DEBUG PFX "port=0x%x, verbose=%i\n", port, verbose);
+        if (verbose)
+                printk(KERN_DEBUG PFX
+                                "port=0x%x, verbose=%i\n", port, verbose);
 
-        if ( !request_region(port, CPU5WDT_EXTENT, PFX) ) {
+        init_completion(&cpu5wdt_device.stop);
+        spin_lock_init(&cpu5wdt_lock);
+        cpu5wdt_device.queue = 0;
+        setup_timer(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
+        cpu5wdt_device.default_ticks = ticks;
+
+        if (!request_region(port, CPU5WDT_EXTENT, PFX)) {
                 printk(KERN_ERR PFX "request_region failed\n");
                 err = -EBUSY;
                 goto no_port;
         }
 
-        if ( (err = misc_register(&cpu5wdt_misc)) < 0 ) {
-                printk(KERN_ERR PFX "misc_register failed\n");
-                goto no_misc;
-        }
-
         /* watchdog reboot? */
         val = inb(port + CPU5WDT_STATUS_REG);
         val = (val >> 2) & 1;
-        if ( !val )
+        if (!val)
                 printk(KERN_INFO PFX "sorry, was my fault\n");
 
-        init_completion(&cpu5wdt_device.stop);
-        cpu5wdt_device.queue = 0;
-
-        clear_bit(0, &cpu5wdt_device.inuse);
-
-        setup_timer(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
+        err = misc_register(&cpu5wdt_misc);
+        if (err < 0) {
+                printk(KERN_ERR PFX "misc_register failed\n");
+                goto no_misc;
+        }
 
-        cpu5wdt_device.default_ticks = ticks;
 
         printk(KERN_INFO PFX "init success\n");
-
         return 0;
 
 no_misc:
@@ -267,7 +263,7 @@ static int __devinit cpu5wdt_init_module(void)
 
 static void __devexit cpu5wdt_exit(void)
 {
-        if ( cpu5wdt_device.queue ) {
+        if (cpu5wdt_device.queue) {
                 cpu5wdt_device.queue = 0;
                 wait_for_completion(&cpu5wdt_device.stop);
         }
diff --git a/drivers/watchdog/davinci_wdt.c b/drivers/watchdog/davinci_wdt.c
index 1782c79eff06..2e1360286732 100644
--- a/drivers/watchdog/davinci_wdt.c
+++ b/drivers/watchdog/davinci_wdt.c
@@ -22,10 +22,9 @@
 #include <linux/bitops.h>
 #include <linux/platform_device.h>
 #include <linux/spinlock.h>
-
-#include <asm/hardware.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <mach/hardware.h>
 
 #define MODULE_NAME "DAVINCI-WDT: "
 
@@ -143,9 +142,8 @@ static struct watchdog_info ident = {
         .identity = "DaVinci Watchdog",
 };
 
-static int
-davinci_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-                  unsigned long arg)
+static long davinci_wdt_ioctl(struct file *file,
+                                        unsigned int cmd, unsigned long arg)
 {
         int ret = -ENOTTY;
 
@@ -160,14 +158,14 @@ davinci_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                 ret = put_user(0, (int *)arg);
                 break;
 
-        case WDIOC_GETTIMEOUT:
-                ret = put_user(heartbeat, (int *)arg);
-                break;
-
         case WDIOC_KEEPALIVE:
                 wdt_service();
                 ret = 0;
                 break;
+
+        case WDIOC_GETTIMEOUT:
+                ret = put_user(heartbeat, (int *)arg);
+                break;
         }
         return ret;
 }
@@ -184,7 +182,7 @@ static const struct file_operations davinci_wdt_fops = {
         .owner = THIS_MODULE,
         .llseek = no_llseek,
         .write = davinci_wdt_write,
-        .ioctl = davinci_wdt_ioctl,
+        .unlocked_ioctl = davinci_wdt_ioctl,
         .open = davinci_wdt_open,
         .release = davinci_wdt_release,
 };
diff --git a/drivers/watchdog/ep93xx_wdt.c b/drivers/watchdog/ep93xx_wdt.c
index 0e4787a0bb87..e9f950ff86ea 100644
--- a/drivers/watchdog/ep93xx_wdt.c
+++ b/drivers/watchdog/ep93xx_wdt.c
@@ -28,9 +28,8 @@
 #include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/timer.h>
-
-#include <asm/hardware.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
+#include <mach/hardware.h>
 
 #define WDT_VERSION     "0.3"
 #define PFX             "ep93xx_wdt: "
@@ -136,9 +135,8 @@ static struct watchdog_info ident = {
         .identity = "EP93xx Watchdog",
 };
 
-static int
-ep93xx_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-                 unsigned long arg)
+static long ep93xx_wdt_ioctl(struct file *file,
+                                        unsigned int cmd, unsigned long arg)
 {
         int ret = -ENOTTY;
 
@@ -156,15 +154,15 @@ ep93xx_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                 ret = put_user(boot_status, (int __user *)arg);
                 break;
 
-        case WDIOC_GETTIMEOUT:
-                /* actually, it is 0.250 seconds.... */
-                ret = put_user(1, (int __user *)arg);
-                break;
-
         case WDIOC_KEEPALIVE:
                 wdt_keepalive();
                 ret = 0;
                 break;
+
+        case WDIOC_GETTIMEOUT:
+                /* actually, it is 0.250 seconds.... */
+                ret = put_user(1, (int __user *)arg);
+                break;
         }
         return ret;
 }
@@ -174,8 +172,8 @@ static int ep93xx_wdt_release(struct inode *inode, struct file *file)
         if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
                 wdt_shutdown();
         else
-                printk(KERN_CRIT PFX "Device closed unexpectedly - "
-                        "timer will not stop\n");
+                printk(KERN_CRIT PFX
+                        "Device closed unexpectedly - timer will not stop\n");
 
         clear_bit(WDT_IN_USE, &wdt_status);
         clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
@@ -186,7 +184,7 @@ static int ep93xx_wdt_release(struct inode *inode, struct file *file)
 static const struct file_operations ep93xx_wdt_fops = {
         .owner          = THIS_MODULE,
         .write          = ep93xx_wdt_write,
-        .ioctl          = ep93xx_wdt_ioctl,
+        .unlocked_ioctl = ep93xx_wdt_ioctl,
         .open           = ep93xx_wdt_open,
         .release        = ep93xx_wdt_release,
 };
@@ -243,7 +241,9 @@ module_param(nowayout, int, 0);
 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
 
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=3600, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+        "Watchdog timeout in seconds. (1<=timeout<=3600, default="
+                                __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 
 MODULE_AUTHOR("Ray Lehtiniemi <rayl@mail.com>,"
                 "Alessandro Zummo <a.zummo@towertech.it>");
diff --git a/drivers/watchdog/eurotechwdt.c b/drivers/watchdog/eurotechwdt.c
index b14e9d1f164d..bbd14e34319f 100644
--- a/drivers/watchdog/eurotechwdt.c
+++ b/drivers/watchdog/eurotechwdt.c
@@ -56,14 +56,15 @@
 #include <linux/notifier.h>
 #include <linux/reboot.h>
 #include <linux/init.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 static unsigned long eurwdt_is_open;
 static int eurwdt_timeout;
 static char eur_expect_close;
+static spinlock_t eurwdt_lock;
 
 /*
  * You must set these - there is no sane way to probe for this board.
@@ -78,7 +79,9 @@ static char *ev = "int";
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  * Some symbolic names
@@ -137,7 +140,8 @@ static void eurwdt_activate_timer(void)
 {
         eurwdt_disable_timer();
         eurwdt_write_reg(WDT_CTRL_REG, 0x01);   /* activate the WDT */
-        eurwdt_write_reg(WDT_OUTPIN_CFG, !strcmp("int", ev) ? WDT_EVENT_INT : WDT_EVENT_REBOOT);
+        eurwdt_write_reg(WDT_OUTPIN_CFG,
+                !strcmp("int", ev) ? WDT_EVENT_INT : WDT_EVENT_REBOOT);
 
         /* Setting interrupt line */
         if (irq == 2 || irq > 15 || irq < 0) {
@@ -206,21 +210,21 @@ size_t count, loff_t *ppos)
 
                         for (i = 0; i != count; i++) {
                                 char c;
-                                if(get_user(c, buf+i))
+                                if (get_user(c, buf + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         eur_expect_close = 42;
                         }
                 }
+                spin_lock(&eurwdt_lock);
                 eurwdt_ping();  /* the default timeout */
+                spin_unlock(&eurwdt_lock);
         }
-
         return count;
 }
 
 /**
  * eurwdt_ioctl:
- * @inode: inode of the device
  * @file: file handle to the device
  * @cmd: watchdog command
  * @arg: argument pointer
@@ -229,13 +233,14 @@ size_t count, loff_t *ppos)
  * according to their available features.
  */
 
-static int eurwdt_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long eurwdt_ioctl(struct file *file,
+                                        unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         static struct watchdog_info ident = {
-                .options          = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+                .options          = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
+                                                        | WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity         = "WDT Eurotech CPU-1220/1410",
         };
@@ -243,10 +248,7 @@ static int eurwdt_ioctl(struct inode *inode, struct file *file,
         int time;
         int options, retval = -EINVAL;
 
-        switch(cmd) {
-        default:
-                return -ENOTTY;
-
+        switch (cmd) {
         case WDIOC_GETSUPPORT:
                 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
 
@@ -254,8 +256,26 @@ static int eurwdt_ioctl(struct inode *inode, struct file *file,
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, p);
 
+        case WDIOC_SETOPTIONS:
+                if (get_user(options, p))
+                        return -EFAULT;
+                spin_lock(&eurwdt_lock);
+                if (options & WDIOS_DISABLECARD) {
+                        eurwdt_disable_timer();
+                        retval = 0;
+                }
+                if (options & WDIOS_ENABLECARD) {
+                        eurwdt_activate_timer();
+                        eurwdt_ping();
+                        retval = 0;
+                }
+                spin_unlock(&eurwdt_lock);
+                return retval;
+
         case WDIOC_KEEPALIVE:
+                spin_lock(&eurwdt_lock);
                 eurwdt_ping();
+                spin_unlock(&eurwdt_lock);
                 return 0;
 
         case WDIOC_SETTIMEOUT:
@@ -266,26 +286,17 @@ static int eurwdt_ioctl(struct inode *inode, struct file *file,
                 if (time < 0 || time > 255)
                         return -EINVAL;
 
+                spin_lock(&eurwdt_lock);
                 eurwdt_timeout = time;
                 eurwdt_set_timeout(time);
+                spin_unlock(&eurwdt_lock);
                 /* Fall */
 
         case WDIOC_GETTIMEOUT:
                 return put_user(eurwdt_timeout, p);
 
-        case WDIOC_SETOPTIONS:
-                if (get_user(options, p))
-                        return -EFAULT;
-                if (options & WDIOS_DISABLECARD) {
-                        eurwdt_disable_timer();
-                        retval = 0;
-                }
-                if (options & WDIOS_ENABLECARD) {
-                        eurwdt_activate_timer();
-                        eurwdt_ping();
-                        retval = 0;
-                }
-                return retval;
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -322,10 +333,11 @@ static int eurwdt_open(struct inode *inode, struct file *file)
 
 static int eurwdt_release(struct inode *inode, struct file *file)
 {
-        if (eur_expect_close == 42) {
+        if (eur_expect_close == 42)
                 eurwdt_disable_timer();
-        } else {
-                printk(KERN_CRIT "eurwdt: Unexpected close, not stopping watchdog!\n");
+        else {
+                printk(KERN_CRIT
+                        "eurwdt: Unexpected close, not stopping watchdog!\n");
                 eurwdt_ping();
         }
         clear_bit(0, &eurwdt_is_open);
@@ -348,10 +360,8 @@ static int eurwdt_release(struct inode *inode, struct file *file)
 static int eurwdt_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if (code == SYS_DOWN || code == SYS_HALT) {
-                /* Turn the card off */
-                eurwdt_disable_timer();
-        }
+        if (code == SYS_DOWN || code == SYS_HALT)
+                eurwdt_disable_timer(); /* Turn the card off */
 
         return NOTIFY_DONE;
 }
@@ -362,11 +372,11 @@ static int eurwdt_notify_sys(struct notifier_block *this, unsigned long code,
 
 
 static const struct file_operations eurwdt_fops = {
-        .owner  = THIS_MODULE,
-        .llseek = no_llseek,
-        .write  = eurwdt_write,
-        .ioctl  = eurwdt_ioctl,
-        .open   = eurwdt_open,
+        .owner          = THIS_MODULE,
+        .llseek         = no_llseek,
+        .write          = eurwdt_write,
+        .unlocked_ioctl = eurwdt_ioctl,
+        .open           = eurwdt_open,
         .release        = eurwdt_release,
 };
 
@@ -419,7 +429,7 @@ static int __init eurwdt_init(void)
         int ret;
 
         ret = request_irq(irq, eurwdt_interrupt, IRQF_DISABLED, "eurwdt", NULL);
-        if(ret) {
+        if (ret) {
                 printk(KERN_ERR "eurwdt: IRQ %d is not free.\n", irq);
                 goto out;
         }
@@ -432,10 +442,13 @@ static int __init eurwdt_init(void)
 
         ret = register_reboot_notifier(&eurwdt_notifier);
         if (ret) {
-                printk(KERN_ERR "eurwdt: can't register reboot notifier (err=%d)\n", ret);
+                printk(KERN_ERR
+                    "eurwdt: can't register reboot notifier (err=%d)\n", ret);
                 goto outreg;
         }
 
+        spin_lock_init(&eurwdt_lock);
+
         ret = misc_register(&eurwdt_miscdev);
         if (ret) {
                 printk(KERN_ERR "eurwdt: can't misc_register on minor=%d\n",
diff --git a/drivers/watchdog/geodewdt.c b/drivers/watchdog/geodewdt.c
index 30d09cbbad94..614a5c7017b6 100644
--- a/drivers/watchdog/geodewdt.c
+++ b/drivers/watchdog/geodewdt.c
@@ -17,8 +17,8 @@
 #include <linux/fs.h>
 #include <linux/platform_device.h>
 #include <linux/reboot.h>
+#include <linux/uaccess.h>
 
-#include <asm/uaccess.h>
 #include <asm/geode.h>
 
 #define GEODEWDT_HZ 500
@@ -77,27 +77,24 @@ static int geodewdt_set_heartbeat(int val)
         return 0;
 }
 
-static int
-geodewdt_open(struct inode *inode, struct file *file)
+static int geodewdt_open(struct inode *inode, struct file *file)
 {
-        if (test_and_set_bit(WDT_FLAGS_OPEN, &wdt_flags))
-                return -EBUSY;
+        if (test_and_set_bit(WDT_FLAGS_OPEN, &wdt_flags))
+                return -EBUSY;
 
-        if (!test_and_clear_bit(WDT_FLAGS_ORPHAN, &wdt_flags))
-                __module_get(THIS_MODULE);
+        if (!test_and_clear_bit(WDT_FLAGS_ORPHAN, &wdt_flags))
+                __module_get(THIS_MODULE);
 
         geodewdt_ping();
-        return nonseekable_open(inode, file);
+        return nonseekable_open(inode, file);
 }
 
-static int
-geodewdt_release(struct inode *inode, struct file *file)
+static int geodewdt_release(struct inode *inode, struct file *file)
 {
         if (safe_close) {
                 geodewdt_disable();
                 module_put(THIS_MODULE);
-        }
-        else {
+        } else {
                 printk(KERN_CRIT "Unexpected close - watchdog is not stopping.\n");
                 geodewdt_ping();
 
@@ -109,11 +106,10 @@ geodewdt_release(struct inode *inode, struct file *file)
         return 0;
 }
 
-static ssize_t
-geodewdt_write(struct file *file, const char __user *data, size_t len,
-               loff_t *ppos)
+static ssize_t geodewdt_write(struct file *file, const char __user *data,
+                                size_t len, loff_t *ppos)
 {
-        if(len) {
+        if (len) {
                 if (!nowayout) {
                         size_t i;
                         safe_close = 0;
@@ -134,9 +130,8 @@ geodewdt_write(struct file *file, const char __user *data, size_t len,
         return len;
 }
 
-static int
-geodewdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-               unsigned long arg)
+static int geodewdt_ioctl(struct inode *inode, struct file *file,
+                                unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
@@ -147,9 +142,9 @@ geodewdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                 | WDIOF_MAGICCLOSE,
                 .firmware_version =     1,
                 .identity =             WATCHDOG_NAME,
-        };
+        };
 
-        switch(cmd) {
+        switch (cmd) {
         case WDIOC_GETSUPPORT:
                 return copy_to_user(argp, &ident,
                                     sizeof(ident)) ? -EFAULT : 0;
@@ -159,22 +154,6 @@ geodewdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, p);
 
-        case WDIOC_KEEPALIVE:
-                geodewdt_ping();
-                return 0;
-
-        case WDIOC_SETTIMEOUT:
-                if (get_user(interval, p))
-                        return -EFAULT;
-
-                if (geodewdt_set_heartbeat(interval))
-                        return -EINVAL;
-
-/* Fall through */
-
-        case WDIOC_GETTIMEOUT:
-                return put_user(timeout, p);
-
         case WDIOC_SETOPTIONS:
         {
                 int options, ret = -EINVAL;
@@ -194,6 +173,20 @@ geodewdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 
                 return ret;
         }
+        case WDIOC_KEEPALIVE:
+                geodewdt_ping();
+                return 0;
+
+        case WDIOC_SETTIMEOUT:
+                if (get_user(interval, p))
+                        return -EFAULT;
+
+                if (geodewdt_set_heartbeat(interval))
+                        return -EINVAL;
+        /* Fall through */
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+
         default:
                 return -ENOTTY;
         }
@@ -202,22 +195,21 @@ geodewdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 }
 
 static const struct file_operations geodewdt_fops = {
-        .owner          = THIS_MODULE,
-        .llseek         = no_llseek,
-        .write          = geodewdt_write,
-        .ioctl          = geodewdt_ioctl,
-        .open           = geodewdt_open,
-        .release        = geodewdt_release,
+        .owner          = THIS_MODULE,
+        .llseek         = no_llseek,
+        .write          = geodewdt_write,
+        .ioctl          = geodewdt_ioctl,
+        .open           = geodewdt_open,
+        .release        = geodewdt_release,
 };
 
 static struct miscdevice geodewdt_miscdev = {
         .minor = WATCHDOG_MINOR,
         .name = "watchdog",
-        .fops = &geodewdt_fops
+        .fops = &geodewdt_fops,
 };
 
-static int __devinit
-geodewdt_probe(struct platform_device *dev)
+static int __devinit geodewdt_probe(struct platform_device *dev)
 {
         int ret, timer;
 
@@ -248,15 +240,13 @@ geodewdt_probe(struct platform_device *dev)
         return ret;
 }
 
-static int __devexit
-geodewdt_remove(struct platform_device *dev)
+static int __devexit geodewdt_remove(struct platform_device *dev)
 {
         misc_deregister(&geodewdt_miscdev);
         return 0;
 }
 
-static void
-geodewdt_shutdown(struct platform_device *dev)
+static void geodewdt_shutdown(struct platform_device *dev)
 {
         geodewdt_disable();
 }
@@ -271,8 +261,7 @@ static struct platform_driver geodewdt_driver = {
         },
 };
 
-static int __init
-geodewdt_init(void)
+static int __init geodewdt_init(void)
 {
         int ret;
 
@@ -292,8 +281,7 @@ err:
         return ret;
 }
 
-static void __exit
-geodewdt_exit(void)
+static void __exit geodewdt_exit(void)
 {
         platform_device_unregister(geodewdt_platform_device);
         platform_driver_unregister(&geodewdt_driver);
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index ccd6c530782d..d039d5f2fd1c 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -39,9 +39,7 @@
 #include <linux/string.h>
 #include <linux/bootmem.h>
 #include <linux/slab.h>
-#include <asm/dmi.h>
 #include <asm/desc.h>
-#include <asm/kdebug.h>
 
 #define PCI_BIOS32_SD_VALUE             0x5F32335F      /* "_32_" */
 #define CRU_BIOS_SIGNATURE_VALUE        0x55524324
@@ -407,7 +405,7 @@ static int __devinit detect_cru_service(void)
         dmi_walk(dmi_find_cru);
 
         /* if cru_rom_addr has been set then we found a CRU service */
-        return ((cru_rom_addr != NULL)? 0: -ENODEV);
+        return ((cru_rom_addr != NULL) ? 0: -ENODEV);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -535,7 +533,7 @@ static ssize_t hpwdt_write(struct file *file, const char __user *data,
                         /* scan to see whether or not we got the magic char. */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if (get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_release = 42;
diff --git a/drivers/watchdog/i6300esb.c b/drivers/watchdog/i6300esb.c
index ca44fd9b19bb..c13383f7fcb9 100644
--- a/drivers/watchdog/i6300esb.c
+++ b/drivers/watchdog/i6300esb.c
@@ -9,18 +9,18 @@
  *      as published by the Free Software Foundation; either version
  *      2 of the License, or (at your option) any later version.
  *
- *      based on i810-tco.c which is in turn based on softdog.c
+ *      based on i810-tco.c which is in turn based on softdog.c
  *
- *      The timer is implemented in the following I/O controller hubs:
- *      (See the intel documentation on http://developer.intel.com.)
- *      6300ESB chip : document number 300641-003
+ *      The timer is implemented in the following I/O controller hubs:
+ *      (See the intel documentation on http://developer.intel.com.)
+ *      6300ESB chip : document number 300641-003
  *
  *  2004YYZZ Ross Biro
  *      Initial version 0.01
  *  2004YYZZ Ross Biro
- *      Version 0.02
+ *      Version 0.02
  *  20050210 David Härdeman <david@2gen.com>
- *      Ported driver to kernel 2.6
+ *      Ported driver to kernel 2.6
  */
 
 /*
@@ -38,9 +38,8 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/ioport.h>
-
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
 
 /* Module and version information */
 #define ESB_VERSION "0.03"
@@ -59,17 +58,17 @@
 #define ESB_RELOAD_REG  BASEADDR + 0x0c /* Reload register                   */
 
 /* Lock register bits */
-#define ESB_WDT_FUNC    ( 0x01 << 2 )   /* Watchdog functionality            */
-#define ESB_WDT_ENABLE  ( 0x01 << 1 )   /* Enable WDT                        */
-#define ESB_WDT_LOCK    ( 0x01 << 0 )   /* Lock (nowayout)                   */
+#define ESB_WDT_FUNC    (0x01 << 2)   /* Watchdog functionality            */
+#define ESB_WDT_ENABLE  (0x01 << 1)   /* Enable WDT                        */
+#define ESB_WDT_LOCK    (0x01 << 0)   /* Lock (nowayout)                   */
 
 /* Config register bits */
-#define ESB_WDT_REBOOT  ( 0x01 << 5 )   /* Enable reboot on timeout          */
-#define ESB_WDT_FREQ    ( 0x01 << 2 )   /* Decrement frequency               */
-#define ESB_WDT_INTTYPE ( 0x11 << 0 )   /* Interrupt type on timer1 timeout  */
+#define ESB_WDT_REBOOT  (0x01 << 5)   /* Enable reboot on timeout          */
+#define ESB_WDT_FREQ    (0x01 << 2)   /* Decrement frequency               */
+#define ESB_WDT_INTTYPE (0x11 << 0)   /* Interrupt type on timer1 timeout  */
 
 /* Reload register bits */
-#define ESB_WDT_RELOAD ( 0x01 << 8 )    /* prevent timeout                   */
+#define ESB_WDT_RELOAD  (0x01 << 8)    /* prevent timeout                   */
 
 /* Magic constants */
 #define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
@@ -84,14 +83,20 @@ static unsigned short triggered; /* The status of the watchdog upon boot */
 static char esb_expect_close;
 
 /* module parameters */
-#define WATCHDOG_HEARTBEAT 30   /* 30 sec default heartbeat (1<heartbeat<2*1023) */
+/* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
+#define WATCHDOG_HEARTBEAT 30
 static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */
+
 module_param(heartbeat, int, 0);
-MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
+MODULE_PARM_DESC(heartbeat,
+                "Watchdog heartbeat in seconds. (1<heartbeat<2046, default="
+                                __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  * Some i6300ESB specific functions
@@ -103,9 +108,10 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" _
  * reload register. After this the appropriate registers can be written
  * to once before they need to be unlocked again.
  */
-static inline void esb_unlock_registers(void) {
-        writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
-        writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
+static inline void esb_unlock_registers(void)
+{
+        writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
+        writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
 }
 
 static void esb_timer_start(void)
@@ -114,8 +120,7 @@ static void esb_timer_start(void)
 
         /* Enable or Enable + Lock? */
         val = 0x02 | (nowayout ? 0x01 : 0x00);
-
-        pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
+        pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
 }
 
 static int esb_timer_stop(void)
@@ -140,7 +145,7 @@ static void esb_timer_keepalive(void)
         spin_lock(&esb_lock);
         esb_unlock_registers();
         writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
-        /* FIXME: Do we need to flush anything here? */
+        /* FIXME: Do we need to flush anything here? */
         spin_unlock(&esb_lock);
 }
 
@@ -165,9 +170,9 @@ static int esb_timer_set_heartbeat(int time)
 
         /* Write timer 2 */
         esb_unlock_registers();
-        writel(val, ESB_TIMER2_REG);
+        writel(val, ESB_TIMER2_REG);
 
-        /* Reload */
+        /* Reload */
         esb_unlock_registers();
         writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
 
@@ -179,54 +184,55 @@ static int esb_timer_set_heartbeat(int time)
         return 0;
 }
 
-static int esb_timer_read (void)
+static int esb_timer_read(void)
 {
-        u32 count;
+        u32 count;
 
         /* This isn't documented, and doesn't take into
-         * acount which stage is running, but it looks
-         * like a 20 bit count down, so we might as well report it.
-         */
-        pci_read_config_dword(esb_pci, 0x64, &count);
-        return (int)count;
+         * acount which stage is running, but it looks
+         * like a 20 bit count down, so we might as well report it.
+         */
+        pci_read_config_dword(esb_pci, 0x64, &count);
+        return (int)count;
 }
 
 /*
- *      /dev/watchdog handling
+ *      /dev/watchdog handling
  */
 
-static int esb_open (struct inode *inode, struct file *file)
+static int esb_open(struct inode *inode, struct file *file)
 {
-        /* /dev/watchdog can only be opened once */
-        if (test_and_set_bit(0, &timer_alive))
-                return -EBUSY;
+        /* /dev/watchdog can only be opened once */
+        if (test_and_set_bit(0, &timer_alive))
+                return -EBUSY;
 
-        /* Reload and activate timer */
-        esb_timer_keepalive ();
-        esb_timer_start ();
+        /* Reload and activate timer */
+        esb_timer_keepalive();
+        esb_timer_start();
 
         return nonseekable_open(inode, file);
 }
 
-static int esb_release (struct inode *inode, struct file *file)
+static int esb_release(struct inode *inode, struct file *file)
 {
-        /* Shut off the timer. */
-        if (esb_expect_close == 42) {
-                esb_timer_stop ();
-        } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
-                esb_timer_keepalive ();
-        }
-        clear_bit(0, &timer_alive);
-        esb_expect_close = 0;
-        return 0;
+        /* Shut off the timer. */
+        if (esb_expect_close == 42)
+                esb_timer_stop();
+        else {
+                printk(KERN_CRIT PFX
+                                "Unexpected close, not stopping watchdog!\n");
+                esb_timer_keepalive();
+        }
+        clear_bit(0, &timer_alive);
+        esb_expect_close = 0;
+        return 0;
 }
 
-static ssize_t esb_write (struct file *file, const char __user *data,
-                          size_t len, loff_t * ppos)
+static ssize_t esb_write(struct file *file, const char __user *data,
+                          size_t len, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
-        if (len) {
+        if (len) {
                 if (!nowayout) {
                         size_t i;
 
@@ -237,7 +243,7 @@ static ssize_t esb_write (struct file *file, const char __user *data,
                         /* scan to see whether or not we got the magic character */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if(get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         esb_expect_close = 42;
@@ -245,92 +251,84 @@ static ssize_t esb_write (struct file *file, const char __user *data,
                 }
 
                 /* someone wrote to us, we should reload the timer */
-                esb_timer_keepalive ();
+                esb_timer_keepalive();
         }
         return len;
 }
 
-static int esb_ioctl (struct inode *inode, struct file *file,
-                      unsigned int cmd, unsigned long arg)
+static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         int new_options, retval = -EINVAL;
         int new_heartbeat;
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         static struct watchdog_info ident = {
-                .options =              WDIOF_SETTIMEOUT |
+                .options =              WDIOF_SETTIMEOUT |
                                         WDIOF_KEEPALIVEPING |
                                         WDIOF_MAGICCLOSE,
-                .firmware_version =     0,
-                .identity =             ESB_MODULE_NAME,
+                .firmware_version =     0,
+                .identity =             ESB_MODULE_NAME,
         };
 
         switch (cmd) {
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident,
-                                            sizeof (ident)) ? -EFAULT : 0;
-
-                case WDIOC_GETSTATUS:
-                        return put_user (esb_timer_read(), p);
-
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user (triggered, p);
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident,
+                                        sizeof(ident)) ? -EFAULT : 0;
 
-                case WDIOC_KEEPALIVE:
-                        esb_timer_keepalive ();
-                        return 0;
+        case WDIOC_GETSTATUS:
+                return put_user(esb_timer_read(), p);
 
-                case WDIOC_SETOPTIONS:
-                {
-                        if (get_user (new_options, p))
-                                return -EFAULT;
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(triggered, p);
 
-                        if (new_options & WDIOS_DISABLECARD) {
-                                esb_timer_stop ();
-                                retval = 0;
-                        }
+        case WDIOC_SETOPTIONS:
+        {
+                if (get_user(new_options, p))
+                        return -EFAULT;
 
-                        if (new_options & WDIOS_ENABLECARD) {
-                                esb_timer_keepalive ();
-                                esb_timer_start ();
-                                retval = 0;
-                        }
-
-                        return retval;
-                }
-
-                case WDIOC_SETTIMEOUT:
-                {
-                        if (get_user(new_heartbeat, p))
-                                return -EFAULT;
-
-                        if (esb_timer_set_heartbeat(new_heartbeat))
-                            return -EINVAL;
-
-                        esb_timer_keepalive ();
-                        /* Fall */
-                }
-
-                case WDIOC_GETTIMEOUT:
-                        return put_user(heartbeat, p);
+                if (new_options & WDIOS_DISABLECARD) {
+                        esb_timer_stop();
+                        retval = 0;
+                }
 
-                default:
-                        return -ENOTTY;
-        }
+                if (new_options & WDIOS_ENABLECARD) {
+                        esb_timer_keepalive();
+                        esb_timer_start();
+                        retval = 0;
+                }
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                esb_timer_keepalive();
+                return 0;
+
+        case WDIOC_SETTIMEOUT:
+        {
+                if (get_user(new_heartbeat, p))
+                        return -EFAULT;
+                if (esb_timer_set_heartbeat(new_heartbeat))
+                        return -EINVAL;
+                esb_timer_keepalive();
+                /* Fall */
+        }
+        case WDIOC_GETTIMEOUT:
+                return put_user(heartbeat, p);
+        default:
+                return -ENOTTY;
+        }
 }
 
 /*
  *      Notify system
  */
 
-static int esb_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
+static int esb_notify_sys(struct notifier_block *this,
+                                        unsigned long code, void *unused)
 {
-        if (code==SYS_DOWN || code==SYS_HALT) {
-                /* Turn the WDT off */
-                esb_timer_stop ();
-        }
+        if (code == SYS_DOWN || code == SYS_HALT)
+                esb_timer_stop();       /* Turn the WDT off */
 
-        return NOTIFY_DONE;
+        return NOTIFY_DONE;
 }
 
 /*
@@ -338,22 +336,22 @@ static int esb_notify_sys (struct notifier_block *this, unsigned long code, void
  */
 
 static const struct file_operations esb_fops = {
-        .owner =        THIS_MODULE,
-        .llseek =       no_llseek,
-        .write =        esb_write,
-        .ioctl =        esb_ioctl,
-        .open =         esb_open,
-        .release =      esb_release,
+        .owner = THIS_MODULE,
+        .llseek = no_llseek,
+        .write = esb_write,
+        .unlocked_ioctl = esb_ioctl,
+        .open = esb_open,
+        .release = esb_release,
 };
 
 static struct miscdevice esb_miscdev = {
-        .minor =        WATCHDOG_MINOR,
-        .name =         "watchdog",
-        .fops =         &esb_fops,
+        .minor = WATCHDOG_MINOR,
+        .name = "watchdog",
+        .fops = &esb_fops,
 };
 
 static struct notifier_block esb_notifier = {
-        .notifier_call =        esb_notify_sys,
+        .notifier_call = esb_notify_sys,
 };
 
 /*
@@ -365,50 +363,44 @@ static struct notifier_block esb_notifier = {
  * want to register another driver on the same PCI id.
  */
 static struct pci_device_id esb_pci_tbl[] = {
-        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
-        { 0, },                 /* End of list */
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
+        { 0, },                 /* End of list */
 };
-MODULE_DEVICE_TABLE (pci, esb_pci_tbl);
+MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
 
 /*
  *      Init & exit routines
  */
 
-static unsigned char __init esb_getdevice (void)
+static unsigned char __init esb_getdevice(void)
 {
         u8 val1;
         unsigned short val2;
+        /*
+         *      Find the PCI device
+         */
 
-        struct pci_dev *dev = NULL;
-        /*
-         *      Find the PCI device
-         */
-
-        for_each_pci_dev(dev) {
-                if (pci_match_id(esb_pci_tbl, dev)) {
-                        esb_pci = dev;
-                        break;
-                }
-        }
+        esb_pci = pci_get_device(PCI_VENDOR_ID_INTEL,
+                                        PCI_DEVICE_ID_INTEL_ESB_9, NULL);
 
-        if (esb_pci) {
-                if (pci_enable_device(esb_pci)) {
-                        printk (KERN_ERR PFX "failed to enable device\n");
+        if (esb_pci) {
+                if (pci_enable_device(esb_pci)) {
+                        printk(KERN_ERR PFX "failed to enable device\n");
                         goto err_devput;
                 }
 
                 if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
-                        printk (KERN_ERR PFX "failed to request region\n");
+                        printk(KERN_ERR PFX "failed to request region\n");
                         goto err_disable;
                 }
 
                 BASEADDR = ioremap(pci_resource_start(esb_pci, 0),
                                    pci_resource_len(esb_pci, 0));
                 if (BASEADDR == NULL) {
-                        /* Something's wrong here, BASEADDR has to be set */
-                        printk (KERN_ERR PFX "failed to get BASEADDR\n");
-                        goto err_release;
-                }
+                        /* Something's wrong here, BASEADDR has to be set */
+                        printk(KERN_ERR PFX "failed to get BASEADDR\n");
+                        goto err_release;
+                }
 
                 /*
                  * The watchdog has two timers, it can be setup so that the
@@ -425,7 +417,7 @@ static unsigned char __init esb_getdevice (void)
                 /* Check that the WDT isn't already locked */
                 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
                 if (val1 & ESB_WDT_LOCK)
-                        printk (KERN_WARNING PFX "nowayout already set\n");
+                        printk(KERN_WARNING PFX "nowayout already set\n");
 
                 /* Set the timer to watchdog mode and disable it for now */
                 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
@@ -452,44 +444,44 @@ err_devput:
         return 0;
 }
 
-static int __init watchdog_init (void)
+static int __init watchdog_init(void)
 {
-        int ret;
-
-        /* Check whether or not the hardware watchdog is there */
-        if (!esb_getdevice () || esb_pci == NULL)
-                return -ENODEV;
-
-        /* Check that the heartbeat value is within it's range ; if not reset to the default */
-        if (esb_timer_set_heartbeat (heartbeat)) {
-                esb_timer_set_heartbeat (WATCHDOG_HEARTBEAT);
-                printk(KERN_INFO PFX "heartbeat value must be 1<heartbeat<2046, using %d\n",
-                       heartbeat);
-        }
-
-        ret = register_reboot_notifier(&esb_notifier);
-        if (ret != 0) {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        ret);
-                goto err_unmap;
-        }
-
-        ret = misc_register(&esb_miscdev);
-        if (ret != 0) {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
-                goto err_notifier;
-        }
-
-        esb_timer_stop ();
-
-        printk (KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
-                BASEADDR, heartbeat, nowayout);
+        int ret;
+
+        /* Check whether or not the hardware watchdog is there */
+        if (!esb_getdevice() || esb_pci == NULL)
+                return -ENODEV;
+
+        /* Check that the heartbeat value is within it's range;
+           if not reset to the default */
+        if (esb_timer_set_heartbeat(heartbeat)) {
+                esb_timer_set_heartbeat(WATCHDOG_HEARTBEAT);
+                printk(KERN_INFO PFX
+                        "heartbeat value must be 1<heartbeat<2046, using %d\n",
+                                                                heartbeat);
+        }
+        ret = register_reboot_notifier(&esb_notifier);
+        if (ret != 0) {
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
+                goto err_unmap;
+        }
 
-        return 0;
+        ret = misc_register(&esb_miscdev);
+        if (ret != 0) {
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        WATCHDOG_MINOR, ret);
+                goto err_notifier;
+        }
+        esb_timer_stop();
+        printk(KERN_INFO PFX
+                "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
+                                                BASEADDR, heartbeat, nowayout);
+        return 0;
 
 err_notifier:
-        unregister_reboot_notifier(&esb_notifier);
+        unregister_reboot_notifier(&esb_notifier);
 err_unmap:
         iounmap(BASEADDR);
 /* err_release: */
@@ -498,18 +490,18 @@ err_unmap:
         pci_disable_device(esb_pci);
 /* err_devput: */
         pci_dev_put(esb_pci);
-        return ret;
+        return ret;
 }
 
-static void __exit watchdog_cleanup (void)
+static void __exit watchdog_cleanup(void)
 {
         /* Stop the timer before we leave */
         if (!nowayout)
-                esb_timer_stop ();
+                esb_timer_stop();
 
         /* Deregister */
         misc_deregister(&esb_miscdev);
-        unregister_reboot_notifier(&esb_notifier);
+        unregister_reboot_notifier(&esb_notifier);
         iounmap(BASEADDR);
         pci_release_region(esb_pci, 0);
         pci_disable_device(esb_pci);
diff --git a/drivers/watchdog/iTCO_vendor.h b/drivers/watchdog/iTCO_vendor.h
new file mode 100644
index 000000000000..9e27e6422f66
--- /dev/null
+++ b/drivers/watchdog/iTCO_vendor.h
@@ -0,0 +1,15 @@
+/* iTCO Vendor Specific Support hooks */
+#ifdef CONFIG_ITCO_VENDOR_SUPPORT
+extern void iTCO_vendor_pre_start(unsigned long, unsigned int);
+extern void iTCO_vendor_pre_stop(unsigned long);
+extern void iTCO_vendor_pre_keepalive(unsigned long, unsigned int);
+extern void iTCO_vendor_pre_set_heartbeat(unsigned int);
+extern int iTCO_vendor_check_noreboot_on(void);
+#else
+#define iTCO_vendor_pre_start(acpibase, heartbeat)      {}
+#define iTCO_vendor_pre_stop(acpibase)                  {}
+#define iTCO_vendor_pre_keepalive(acpibase, heartbeat)  {}
+#define iTCO_vendor_pre_set_heartbeat(heartbeat)        {}
+#define iTCO_vendor_check_noreboot_on()                 1
+                                /* 1=check noreboot; 0=don't check */
+#endif
diff --git a/drivers/watchdog/iTCO_vendor_support.c b/drivers/watchdog/iTCO_vendor_support.c
index cafc465f2ae3..ca344a85eb95 100644
--- a/drivers/watchdog/iTCO_vendor_support.c
+++ b/drivers/watchdog/iTCO_vendor_support.c
@@ -18,9 +18,9 @@
  */
 
 /* Module and version information */
-#define DRV_NAME        "iTCO_vendor_support"
-#define DRV_VERSION     "1.01"
-#define DRV_RELDATE     "11-Nov-2006"
+#define DRV_NAME        "iTCO_vendor_support"
+#define DRV_VERSION     "1.01"
+#define DRV_RELDATE     "11-Nov-2006"
 #define PFX             DRV_NAME ": "
 
 /* Includes */
@@ -31,19 +31,22 @@
 #include <linux/kernel.h>               /* For printk/panic/... */
 #include <linux/init.h>                 /* For __init/__exit/... */
 #include <linux/ioport.h>               /* For io-port access */
+#include <linux/io.h>                   /* For inb/outb/... */
 
-#include <asm/io.h>                     /* For inb/outb/... */
+#include "iTCO_vendor.h"
 
 /* iTCO defines */
 #define SMI_EN          acpibase + 0x30 /* SMI Control and Enable Register */
-#define TCOBASE         acpibase + 0x60 /* TCO base address             */
-#define TCO1_STS        TCOBASE + 0x04  /* TCO1 Status Register         */
+#define TCOBASE         acpibase + 0x60 /* TCO base address */
+#define TCO1_STS        TCOBASE + 0x04  /* TCO1 Status Register */
 
 /* List of vendor support modes */
-#define SUPERMICRO_OLD_BOARD    1       /* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
-#define SUPERMICRO_NEW_BOARD    2       /* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
+/* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
+#define SUPERMICRO_OLD_BOARD    1
+/* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
+#define SUPERMICRO_NEW_BOARD    2
 
-static int vendorsupport = 0;
+static int vendorsupport;
 module_param(vendorsupport, int, 0);
 MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+");
 
@@ -143,34 +146,35 @@ static void supermicro_old_pre_keepalive(unsigned long acpibase)
  */
 
 /* I/O Port's */
-#define SM_REGINDEX     0x2e            /* SuperMicro ICH4+ Register Index */
-#define SM_DATAIO       0x2f            /* SuperMicro ICH4+ Register Data I/O */
+#define SM_REGINDEX     0x2e    /* SuperMicro ICH4+ Register Index */
+#define SM_DATAIO       0x2f    /* SuperMicro ICH4+ Register Data I/O */
 
 /* Control Register's */
-#define SM_CTLPAGESW    0x07            /* SuperMicro ICH4+ Control Page Switch */
-#define SM_CTLPAGE              0x08    /* SuperMicro ICH4+ Control Page Num */
+#define SM_CTLPAGESW    0x07    /* SuperMicro ICH4+ Control Page Switch */
+#define SM_CTLPAGE      0x08    /* SuperMicro ICH4+ Control Page Num */
 
-#define SM_WATCHENABLE  0x30            /* Watchdog enable: Bit 0: 0=off, 1=on */
+#define SM_WATCHENABLE  0x30    /* Watchdog enable: Bit 0: 0=off, 1=on */
 
-#define SM_WATCHPAGE    0x87            /* Watchdog unlock control page */
+#define SM_WATCHPAGE    0x87    /* Watchdog unlock control page */
 
-#define SM_ENDWATCH     0xAA            /* Watchdog lock control page */
+#define SM_ENDWATCH     0xAA    /* Watchdog lock control page */
 
-#define SM_COUNTMODE    0xf5            /* Watchdog count mode select */
-                                        /* (Bit 3: 0 = seconds, 1 = minutes */
+#define SM_COUNTMODE    0xf5    /* Watchdog count mode select */
+                                /* (Bit 3: 0 = seconds, 1 = minutes */
 
-#define SM_WATCHTIMER   0xf6            /* 8-bits, Watchdog timer counter (RW) */
+#define SM_WATCHTIMER   0xf6    /* 8-bits, Watchdog timer counter (RW) */
 
-#define SM_RESETCONTROL 0xf7            /* Watchdog reset control */
-                                        /* Bit 6: timer is reset by kbd interrupt */
-                                        /* Bit 7: timer is reset by mouse interrupt */
+#define SM_RESETCONTROL 0xf7    /* Watchdog reset control */
+                                /* Bit 6: timer is reset by kbd interrupt */
+                                /* Bit 7: timer is reset by mouse interrupt */
 
 static void supermicro_new_unlock_watchdog(void)
 {
-        outb(SM_WATCHPAGE, SM_REGINDEX);        /* Write 0x87 to port 0x2e twice */
+        /* Write 0x87 to port 0x2e twice */
         outb(SM_WATCHPAGE, SM_REGINDEX);
-
-        outb(SM_CTLPAGESW, SM_REGINDEX);        /* Switch to watchdog control page */
+        outb(SM_WATCHPAGE, SM_REGINDEX);
+        /* Switch to watchdog control page */
+        outb(SM_CTLPAGESW, SM_REGINDEX);
         outb(SM_CTLPAGE, SM_DATAIO);
 }
 
@@ -192,7 +196,7 @@ static void supermicro_new_pre_start(unsigned int heartbeat)
         outb(val, SM_DATAIO);
 
         /* Write heartbeat interval to WDOG */
-        outb (SM_WATCHTIMER, SM_REGINDEX);
+        outb(SM_WATCHTIMER, SM_REGINDEX);
         outb((heartbeat & 255), SM_DATAIO);
 
         /* Make sure keyboard/mouse interrupts don't interfere */
@@ -277,7 +281,7 @@ EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat);
 
 int iTCO_vendor_check_noreboot_on(void)
 {
-        switch(vendorsupport) {
+        switch (vendorsupport) {
         case SUPERMICRO_OLD_BOARD:
                 return 0;
         default:
@@ -288,13 +292,13 @@ EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on);
 
 static int __init iTCO_vendor_init_module(void)
 {
-        printk (KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
+        printk(KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
         return 0;
 }
 
 static void __exit iTCO_vendor_exit_module(void)
 {
-        printk (KERN_INFO PFX "Module Unloaded\n");
+        printk(KERN_INFO PFX "Module Unloaded\n");
 }
 
 module_init(iTCO_vendor_init_module);
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index 95ba985bd341..bfb93bc2ca9f 100644
--- a/drivers/watchdog/iTCO_wdt.c
+++ b/drivers/watchdog/iTCO_wdt.c
@@ -55,9 +55,9 @@
  */
 
 /* Module and version information */
-#define DRV_NAME        "iTCO_wdt"
-#define DRV_VERSION     "1.03"
-#define DRV_RELDATE     "30-Apr-2008"
+#define DRV_NAME        "iTCO_wdt"
+#define DRV_VERSION     "1.03"
+#define DRV_RELDATE     "30-Apr-2008"
 #define PFX             DRV_NAME ": "
 
 /* Includes */
@@ -66,7 +66,8 @@
 #include <linux/types.h>                /* For standard types (like size_t) */
 #include <linux/errno.h>                /* For the -ENODEV/... values */
 #include <linux/kernel.h>               /* For printk/panic/... */
-#include <linux/miscdevice.h>           /* For MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR) */
+#include <linux/miscdevice.h>           /* For MODULE_ALIAS_MISCDEV
+                                                        (WATCHDOG_MINOR) */
 #include <linux/watchdog.h>             /* For the watchdog specific items */
 #include <linux/init.h>                 /* For __init/__exit/... */
 #include <linux/fs.h>                   /* For file operations */
@@ -74,9 +75,10 @@
 #include <linux/pci.h>                  /* For pci functions */
 #include <linux/ioport.h>               /* For io-port access */
 #include <linux/spinlock.h>             /* For spin_lock/spin_unlock/... */
+#include <linux/uaccess.h>              /* For copy_to_user/put_user/... */
+#include <linux/io.h>                   /* For inb/outb/... */
 
-#include <asm/uaccess.h>                /* For copy_to_user/put_user/... */
-#include <asm/io.h>                     /* For inb/outb/... */
+#include "iTCO_vendor.h"
 
 /* TCO related info */
 enum iTCO_chipsets {
@@ -105,7 +107,7 @@ enum iTCO_chipsets {
         TCO_ICH9,       /* ICH9 */
         TCO_ICH9R,      /* ICH9R */
         TCO_ICH9DH,     /* ICH9DH */
-        TCO_ICH9DO,     /* ICH9DO */
+        TCO_ICH9DO,     /* ICH9DO */
         TCO_631XESB,    /* 631xESB/632xESB */
 };
 
@@ -140,7 +142,7 @@ static struct {
         {"ICH9DH", 2},
         {"ICH9DO", 2},
         {"631xESB/632xESB", 2},
-        {NULL,0}
+        {NULL, 0}
 };
 
 #define ITCO_PCI_DEVICE(dev, data)      \
@@ -159,32 +161,32 @@ static struct {
  * functions that probably will be registered by other drivers.
  */
 static struct pci_device_id iTCO_wdt_pci_tbl[] = {
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AA_0,        TCO_ICH    )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AB_0,        TCO_ICH0   )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_0,        TCO_ICH2   )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_10,       TCO_ICH2M  )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_0,        TCO_ICH3   )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_12,       TCO_ICH3M  )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_0,        TCO_ICH4   )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_12,       TCO_ICH4M  )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801E_0,         TCO_CICH   )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801EB_0,        TCO_ICH5   )},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AA_0,        TCO_ICH)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AB_0,        TCO_ICH0)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_0,        TCO_ICH2)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_10,       TCO_ICH2M)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_0,        TCO_ICH3)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_12,       TCO_ICH3M)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_0,        TCO_ICH4)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_12,       TCO_ICH4M)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801E_0,         TCO_CICH)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801EB_0,        TCO_ICH5)},
         { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB_1,            TCO_6300ESB)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_0,           TCO_ICH6   )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_1,           TCO_ICH6M  )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_2,           TCO_ICH6W  )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0,           TCO_ICH7   )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1,           TCO_ICH7M  )},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_0,           TCO_ICH6)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_1,           TCO_ICH6M)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_2,           TCO_ICH6W)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0,           TCO_ICH7)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1,           TCO_ICH7M)},
         { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_31,          TCO_ICH7MDH)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0,           TCO_ICH8   )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1,           TCO_ICH8ME )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2,           TCO_ICH8DH )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3,           TCO_ICH8DO )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4,           TCO_ICH8M  )},
-        { ITCO_PCI_DEVICE(0x2918,                               TCO_ICH9   )},
-        { ITCO_PCI_DEVICE(0x2916,                               TCO_ICH9R  )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2,           TCO_ICH9DH )},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4,           TCO_ICH9DO )},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0,           TCO_ICH8)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1,           TCO_ICH8ME)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2,           TCO_ICH8DH)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3,           TCO_ICH8DO)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4,           TCO_ICH8M)},
+        { ITCO_PCI_DEVICE(0x2918,                               TCO_ICH9)},
+        { ITCO_PCI_DEVICE(0x2916,                               TCO_ICH9R)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2,           TCO_ICH9DH)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4,           TCO_ICH9DO)},
         { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB2_0,           TCO_631XESB)},
         { ITCO_PCI_DEVICE(0x2671,                               TCO_631XESB)},
         { ITCO_PCI_DEVICE(0x2672,                               TCO_631XESB)},
@@ -203,13 +205,15 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
         { ITCO_PCI_DEVICE(0x267f,                               TCO_631XESB)},
         { 0, },                 /* End of list */
 };
-MODULE_DEVICE_TABLE (pci, iTCO_wdt_pci_tbl);
+MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl);
 
 /* Address definitions for the TCO */
-#define TCOBASE         iTCO_wdt_private.ACPIBASE + 0x60        /* TCO base address                */
-#define SMI_EN          iTCO_wdt_private.ACPIBASE + 0x30        /* SMI Control and Enable Register */
+/* TCO base address */
+#define TCOBASE         iTCO_wdt_private.ACPIBASE + 0x60
+/* SMI Control and Enable Register */
+#define SMI_EN          iTCO_wdt_private.ACPIBASE + 0x30
 
-#define TCO_RLD         TCOBASE + 0x00  /* TCO Timer Reload and Current Value */
+#define TCO_RLD         TCOBASE + 0x00  /* TCO Timer Reload and Curr. Value */
 #define TCOv1_TMR       TCOBASE + 0x01  /* TCOv1 Timer Initial Value    */
 #define TCO_DAT_IN      TCOBASE + 0x02  /* TCO Data In Register         */
 #define TCO_DAT_OUT     TCOBASE + 0x03  /* TCO Data Out Register        */
@@ -222,15 +226,21 @@ MODULE_DEVICE_TABLE (pci, iTCO_wdt_pci_tbl);
 /* internal variables */
 static unsigned long is_active;
 static char expect_release;
-static struct {                         /* this is private data for the iTCO_wdt device */
-        unsigned int iTCO_version;      /* TCO version/generation */
-        unsigned long ACPIBASE;         /* The cards ACPIBASE address (TCOBASE = ACPIBASE+0x60) */
-        unsigned long __iomem *gcs;     /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2) */
-        spinlock_t io_lock;             /* the lock for io operations */
-        struct pci_dev *pdev;           /* the PCI-device */
+static struct {         /* this is private data for the iTCO_wdt device */
+        /* TCO version/generation */
+        unsigned int iTCO_version;
+        /* The cards ACPIBASE address (TCOBASE = ACPIBASE+0x60) */
+        unsigned long ACPIBASE;
+        /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2)*/
+        unsigned long __iomem *gcs;
+        /* the lock for io operations */
+        spinlock_t io_lock;
+        /* the PCI-device */
+        struct pci_dev *pdev;
 } iTCO_wdt_private;
 
-static struct platform_device *iTCO_wdt_platform_device;        /* the watchdog platform device */
+/* the watchdog platform device */
+static struct platform_device *iTCO_wdt_platform_device;
 
 /* module parameters */
 #define WATCHDOG_HEARTBEAT 30   /* 30 sec default heartbeat */
@@ -240,22 +250,9 @@ MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39 (TCO
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-
-/* iTCO Vendor Specific Support hooks */
-#ifdef CONFIG_ITCO_VENDOR_SUPPORT
-extern void iTCO_vendor_pre_start(unsigned long, unsigned int);
-extern void iTCO_vendor_pre_stop(unsigned long);
-extern void iTCO_vendor_pre_keepalive(unsigned long, unsigned int);
-extern void iTCO_vendor_pre_set_heartbeat(unsigned int);
-extern int iTCO_vendor_check_noreboot_on(void);
-#else
-#define iTCO_vendor_pre_start(acpibase, heartbeat)      {}
-#define iTCO_vendor_pre_stop(acpibase)                  {}
-#define iTCO_vendor_pre_keepalive(acpibase,heartbeat)   {}
-#define iTCO_vendor_pre_set_heartbeat(heartbeat)        {}
-#define iTCO_vendor_check_noreboot_on()                 1       /* 1=check noreboot; 0=don't check */
-#endif
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  * Some TCO specific functions
@@ -369,11 +366,10 @@ static int iTCO_wdt_keepalive(void)
         iTCO_vendor_pre_keepalive(iTCO_wdt_private.ACPIBASE, heartbeat);
 
         /* Reload the timer by writing to the TCO Timer Counter register */
-        if (iTCO_wdt_private.iTCO_version == 2) {
+        if (iTCO_wdt_private.iTCO_version == 2)
                 outw(0x01, TCO_RLD);
-        } else if (iTCO_wdt_private.iTCO_version == 1) {
+        else if (iTCO_wdt_private.iTCO_version == 1)
                 outb(0x01, TCO_RLD);
-        }
 
         spin_unlock(&iTCO_wdt_private.io_lock);
         return 0;
@@ -425,7 +421,7 @@ static int iTCO_wdt_set_heartbeat(int t)
         return 0;
 }
 
-static int iTCO_wdt_get_timeleft (int *time_left)
+static int iTCO_wdt_get_timeleft(int *time_left)
 {
         unsigned int val16;
         unsigned char val8;
@@ -454,7 +450,7 @@ static int iTCO_wdt_get_timeleft (int *time_left)
  *      /dev/watchdog handling
  */
 
-static int iTCO_wdt_open (struct inode *inode, struct file *file)
+static int iTCO_wdt_open(struct inode *inode, struct file *file)
 {
         /* /dev/watchdog can only be opened once */
         if (test_and_set_bit(0, &is_active))
@@ -468,7 +464,7 @@ static int iTCO_wdt_open (struct inode *inode, struct file *file)
         return nonseekable_open(inode, file);
 }
 
-static int iTCO_wdt_release (struct inode *inode, struct file *file)
+static int iTCO_wdt_release(struct inode *inode, struct file *file)
 {
         /*
          *      Shut off the timer.
@@ -476,7 +472,8 @@ static int iTCO_wdt_release (struct inode *inode, struct file *file)
         if (expect_release == 42) {
                 iTCO_wdt_stop();
         } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
                 iTCO_wdt_keepalive();
         }
         clear_bit(0, &is_active);
@@ -484,22 +481,23 @@ static int iTCO_wdt_release (struct inode *inode, struct file *file)
         return 0;
 }
 
-static ssize_t iTCO_wdt_write (struct file *file, const char __user *data,
-                              size_t len, loff_t * ppos)
+static ssize_t iTCO_wdt_write(struct file *file, const char __user *data,
+                              size_t len, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
         if (len) {
                 if (!nowayout) {
                         size_t i;
 
-                        /* note: just in case someone wrote the magic character
-                         * five months ago... */
+                        /* note: just in case someone wrote the magic
+                           character five months ago... */
                         expect_release = 0;
 
-                        /* scan to see whether or not we got the magic character */
+                        /* scan to see whether or not we got the
+                           magic character */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if (get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_release = 42;
@@ -512,8 +510,8 @@ static ssize_t iTCO_wdt_write (struct file *file, const char __user *data,
         return len;
 }
 
-static int iTCO_wdt_ioctl (struct inode *inode, struct file *file,
-                          unsigned int cmd, unsigned long arg)
+static long iTCO_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int new_options, retval = -EINVAL;
         int new_heartbeat;
@@ -528,64 +526,52 @@ static int iTCO_wdt_ioctl (struct inode *inode, struct file *file,
         };
 
         switch (cmd) {
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident,
-                                sizeof (ident)) ? -EFAULT : 0;
-
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-
-                case WDIOC_KEEPALIVE:
-                        iTCO_wdt_keepalive();
-                        return 0;
-
-                case WDIOC_SETOPTIONS:
-                {
-                        if (get_user(new_options, p))
-                                return -EFAULT;
-
-                        if (new_options & WDIOS_DISABLECARD) {
-                                iTCO_wdt_stop();
-                                retval = 0;
-                        }
-
-                        if (new_options & WDIOS_ENABLECARD) {
-                                iTCO_wdt_keepalive();
-                                iTCO_wdt_start();
-                                retval = 0;
-                        }
-
-                        return retval;
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+
+        case WDIOC_SETOPTIONS:
+        {
+                if (get_user(new_options, p))
+                        return -EFAULT;
+
+                if (new_options & WDIOS_DISABLECARD) {
+                        iTCO_wdt_stop();
+                        retval = 0;
                 }
-
-                case WDIOC_SETTIMEOUT:
-                {
-                        if (get_user(new_heartbeat, p))
-                                return -EFAULT;
-
-                        if (iTCO_wdt_set_heartbeat(new_heartbeat))
-                                return -EINVAL;
-
+                if (new_options & WDIOS_ENABLECARD) {
                         iTCO_wdt_keepalive();
-                        /* Fall */
-                }
-
-                case WDIOC_GETTIMEOUT:
-                        return put_user(heartbeat, p);
-
-                case WDIOC_GETTIMELEFT:
-                {
-                        int time_left;
-
-                        if (iTCO_wdt_get_timeleft(&time_left))
-                                return -EINVAL;
-
-                        return put_user(time_left, p);
+                        iTCO_wdt_start();
+                        retval = 0;
                 }
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                iTCO_wdt_keepalive();
+                return 0;
 
-                default:
-                        return -ENOTTY;
+        case WDIOC_SETTIMEOUT:
+        {
+                if (get_user(new_heartbeat, p))
+                        return -EFAULT;
+                if (iTCO_wdt_set_heartbeat(new_heartbeat))
+                        return -EINVAL;
+                iTCO_wdt_keepalive();
+                /* Fall */
+        }
+        case WDIOC_GETTIMEOUT:
+                return put_user(heartbeat, p);
+        case WDIOC_GETTIMELEFT:
+        {
+                int time_left;
+                if (iTCO_wdt_get_timeleft(&time_left))
+                        return -EINVAL;
+                return put_user(time_left, p);
+        }
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -594,12 +580,12 @@ static int iTCO_wdt_ioctl (struct inode *inode, struct file *file,
  */
 
 static const struct file_operations iTCO_wdt_fops = {
-        .owner =        THIS_MODULE,
-        .llseek =       no_llseek,
-        .write =        iTCO_wdt_write,
-        .ioctl =        iTCO_wdt_ioctl,
-        .open =         iTCO_wdt_open,
-        .release =      iTCO_wdt_release,
+        .owner =                THIS_MODULE,
+        .llseek =               no_llseek,
+        .write =                iTCO_wdt_write,
+        .unlocked_ioctl =       iTCO_wdt_ioctl,
+        .open =                 iTCO_wdt_open,
+        .release =              iTCO_wdt_release,
 };
 
 static struct miscdevice iTCO_wdt_miscdev = {
@@ -612,7 +598,8 @@ static struct miscdevice iTCO_wdt_miscdev = {
  *      Init & exit routines
  */
 
-static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device_id *ent, struct platform_device *dev)
+static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
+                const struct pci_device_id *ent, struct platform_device *dev)
 {
         int ret;
         u32 base_address;
@@ -632,17 +619,19 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device
                 pci_dev_put(pdev);
                 return -ENODEV;
         }
-        iTCO_wdt_private.iTCO_version = iTCO_chipset_info[ent->driver_data].iTCO_version;
+        iTCO_wdt_private.iTCO_version =
+                        iTCO_chipset_info[ent->driver_data].iTCO_version;
         iTCO_wdt_private.ACPIBASE = base_address;
         iTCO_wdt_private.pdev = pdev;
 
-        /* Get the Memory-Mapped GCS register, we need it for the NO_REBOOT flag (TCO v2) */
-        /* To get access to it you have to read RCBA from PCI Config space 0xf0
-           and use it as base. GCS = RCBA + ICH6_GCS(0x3410). */
+        /* Get the Memory-Mapped GCS register, we need it for the
+           NO_REBOOT flag (TCO v2). To get access to it you have to
+           read RCBA from PCI Config space 0xf0 and use it as base.
+           GCS = RCBA + ICH6_GCS(0x3410). */
         if (iTCO_wdt_private.iTCO_version == 2) {
                 pci_read_config_dword(pdev, 0xf0, &base_address);
                 RCBA = base_address & 0xffffc000;
-                iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410),4);
+                iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410), 4);
         }
 
         /* Check chipset's NO_REBOOT bit */
@@ -657,8 +646,8 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device
 
         /* Set the TCO_EN bit in SMI_EN register */
         if (!request_region(SMI_EN, 4, "iTCO_wdt")) {
-                printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
-                        SMI_EN );
+                printk(KERN_ERR PFX
+                        "I/O address 0x%04lx already in use\n", SMI_EN);
                 ret = -EIO;
                 goto out;
         }
@@ -667,18 +656,20 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device
         outl(val32, SMI_EN);
         release_region(SMI_EN, 4);
 
-        /* The TCO I/O registers reside in a 32-byte range pointed to by the TCOBASE value */
-        if (!request_region (TCOBASE, 0x20, "iTCO_wdt")) {
-                printk (KERN_ERR PFX "I/O address 0x%04lx already in use\n",
+        /* The TCO I/O registers reside in a 32-byte range pointed to
+           by the TCOBASE value */
+        if (!request_region(TCOBASE, 0x20, "iTCO_wdt")) {
+                printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
                         TCOBASE);
                 ret = -EIO;
                 goto out;
         }
 
-        printk(KERN_INFO PFX "Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n",
-                iTCO_chipset_info[ent->driver_data].name,
-                iTCO_chipset_info[ent->driver_data].iTCO_version,
-                TCOBASE);
+        printk(KERN_INFO PFX
+                "Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n",
+                        iTCO_chipset_info[ent->driver_data].name,
+                        iTCO_chipset_info[ent->driver_data].iTCO_version,
+                        TCOBASE);
 
         /* Clear out the (probably old) status */
         outb(0, TCO1_STS);
@@ -687,27 +678,29 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device
         /* Make sure the watchdog is not running */
         iTCO_wdt_stop();
 
-        /* Check that the heartbeat value is within it's range ; if not reset to the default */
+        /* Check that the heartbeat value is within it's range;
+           if not reset to the default */
         if (iTCO_wdt_set_heartbeat(heartbeat)) {
                 iTCO_wdt_set_heartbeat(WATCHDOG_HEARTBEAT);
-                printk(KERN_INFO PFX "heartbeat value must be 2<heartbeat<39 (TCO v1) or 613 (TCO v2), using %d\n",
-                        heartbeat);
+                printk(KERN_INFO PFX "heartbeat value must be 2 < heartbeat < 39 (TCO v1) or 613 (TCO v2), using %d\n",
+                                                        heartbeat);
         }
 
         ret = misc_register(&iTCO_wdt_miscdev);
         if (ret != 0) {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        WATCHDOG_MINOR, ret);
                 goto unreg_region;
         }
 
-        printk (KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n",
-                heartbeat, nowayout);
+        printk(KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n",
+                                                        heartbeat, nowayout);
 
         return 0;
 
 unreg_region:
-        release_region (TCOBASE, 0x20);
+        release_region(TCOBASE, 0x20);
 out:
         if (iTCO_wdt_private.iTCO_version == 2)
                 iounmap(iTCO_wdt_private.gcs);
@@ -796,7 +789,8 @@ static int __init iTCO_wdt_init_module(void)
         if (err)
                 return err;
 
-        iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0);
+        iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME,
+                                                                -1, NULL, 0);
         if (IS_ERR(iTCO_wdt_platform_device)) {
                 err = PTR_ERR(iTCO_wdt_platform_device);
                 goto unreg_platform_driver;
diff --git a/drivers/watchdog/ib700wdt.c b/drivers/watchdog/ib700wdt.c
index 4b89f401691a..05a28106e8eb 100644
--- a/drivers/watchdog/ib700wdt.c
+++ b/drivers/watchdog/ib700wdt.c
@@ -41,9 +41,9 @@
 #include <linux/spinlock.h>
 #include <linux/moduleparam.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 static struct platform_device *ibwdt_platform_device;
@@ -120,15 +120,16 @@ static int wd_margin = WD_TIMO;
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 
 /*
  *      Watchdog Operations
  */
 
-static void
-ibwdt_ping(void)
+static void ibwdt_ping(void)
 {
         spin_lock(&ibwdt_lock);
 
@@ -138,16 +139,14 @@ ibwdt_ping(void)
         spin_unlock(&ibwdt_lock);
 }
 
-static void
-ibwdt_disable(void)
+static void ibwdt_disable(void)
 {
         spin_lock(&ibwdt_lock);
         outb_p(0, WDT_STOP);
         spin_unlock(&ibwdt_lock);
 }
 
-static int
-ibwdt_set_heartbeat(int t)
+static int ibwdt_set_heartbeat(int t)
 {
         int i;
 
@@ -165,8 +164,8 @@ ibwdt_set_heartbeat(int t)
  *      /dev/watchdog handling
  */
 
-static ssize_t
-ibwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
+static ssize_t ibwdt_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         if (count) {
                 if (!nowayout) {
@@ -188,77 +187,71 @@ ibwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppo
         return count;
 }
 
-static int
-ibwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-          unsigned long arg)
+static long ibwdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         int new_margin;
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
 
         static struct watchdog_info ident = {
-                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
+                                                        | WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = "IB700 WDT",
         };
 
         switch (cmd) {
         case WDIOC_GETSUPPORT:
-          if (copy_to_user(argp, &ident, sizeof(ident)))
-            return -EFAULT;
-          break;
+                if (copy_to_user(argp, &ident, sizeof(ident)))
+                        return -EFAULT;
+                break;
 
         case WDIOC_GETSTATUS:
         case WDIOC_GETBOOTSTATUS:
-          return put_user(0, p);
-
-        case WDIOC_KEEPALIVE:
-          ibwdt_ping();
-          break;
-
-        case WDIOC_SETTIMEOUT:
-          if (get_user(new_margin, p))
-                  return -EFAULT;
-          if (ibwdt_set_heartbeat(new_margin))
-                  return -EINVAL;
-          ibwdt_ping();
-          /* Fall */
-
-        case WDIOC_GETTIMEOUT:
-          return put_user(wd_times[wd_margin], p);
+                return put_user(0, p);
 
         case WDIOC_SETOPTIONS:
         {
-          int options, retval = -EINVAL;
+                int options, retval = -EINVAL;
 
-          if (get_user(options, p))
-            return -EFAULT;
+                if (get_user(options, p))
+                        return -EFAULT;
 
-          if (options & WDIOS_DISABLECARD) {
-            ibwdt_disable();
-            retval = 0;
-          }
+                if (options & WDIOS_DISABLECARD) {
+                        ibwdt_disable();
+                        retval = 0;
+                }
+                if (options & WDIOS_ENABLECARD) {
+                        ibwdt_ping();
+                        retval = 0;
+                }
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                ibwdt_ping();
+                break;
 
-          if (options & WDIOS_ENABLECARD) {
-            ibwdt_ping();
-            retval = 0;
-          }
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_margin, p))
+                        return -EFAULT;
+                if (ibwdt_set_heartbeat(new_margin))
+                        return -EINVAL;
+                ibwdt_ping();
+                /* Fall */
 
-          return retval;
-        }
+        case WDIOC_GETTIMEOUT:
+                return put_user(wd_times[wd_margin], p);
 
         default:
-          return -ENOTTY;
+                return -ENOTTY;
         }
         return 0;
 }
 
-static int
-ibwdt_open(struct inode *inode, struct file *file)
+static int ibwdt_open(struct inode *inode, struct file *file)
 {
-        if (test_and_set_bit(0, &ibwdt_is_open)) {
+        if (test_and_set_bit(0, &ibwdt_is_open))
                 return -EBUSY;
-        }
         if (nowayout)
                 __module_get(THIS_MODULE);
 
@@ -267,13 +260,13 @@ ibwdt_open(struct inode *inode, struct file *file)
         return nonseekable_open(inode, file);
 }
 
-static int
-ibwdt_close(struct inode *inode, struct file *file)
+static int ibwdt_close(struct inode *inode, struct file *file)
 {
         if (expect_close == 42) {
                 ibwdt_disable();
         } else {
-                printk(KERN_CRIT PFX "WDT device closed unexpectedly.  WDT will not stop!\n");
+                printk(KERN_CRIT PFX
+                     "WDT device closed unexpectedly.  WDT will not stop!\n");
                 ibwdt_ping();
         }
         clear_bit(0, &ibwdt_is_open);
@@ -289,7 +282,7 @@ static const struct file_operations ibwdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = ibwdt_write,
-        .ioctl          = ibwdt_ioctl,
+        .unlocked_ioctl = ibwdt_ioctl,
         .open           = ibwdt_open,
         .release        = ibwdt_close,
 };
@@ -310,21 +303,23 @@ static int __devinit ibwdt_probe(struct platform_device *dev)
 
 #if WDT_START != WDT_STOP
         if (!request_region(WDT_STOP, 1, "IB700 WDT")) {
-                printk (KERN_ERR PFX "STOP method I/O %X is not available.\n", WDT_STOP);
+                printk(KERN_ERR PFX "STOP method I/O %X is not available.\n",
+                                                                WDT_STOP);
                 res = -EIO;
                 goto out_nostopreg;
         }
 #endif
 
         if (!request_region(WDT_START, 1, "IB700 WDT")) {
-                printk (KERN_ERR PFX "START method I/O %X is not available.\n", WDT_START);
+                printk(KERN_ERR PFX "START method I/O %X is not available.\n",
+                                                                WDT_START);
                 res = -EIO;
                 goto out_nostartreg;
         }
 
         res = misc_register(&ibwdt_miscdev);
         if (res) {
-                printk (KERN_ERR PFX "failed to register misc device\n");
+                printk(KERN_ERR PFX "failed to register misc device\n");
                 goto out_nomisc;
         }
         return 0;
@@ -342,9 +337,9 @@ out_nostopreg:
 static int __devexit ibwdt_remove(struct platform_device *dev)
 {
         misc_deregister(&ibwdt_miscdev);
-        release_region(WDT_START,1);
+        release_region(WDT_START, 1);
 #if WDT_START != WDT_STOP
-        release_region(WDT_STOP,1);
+        release_region(WDT_STOP, 1);
 #endif
         return 0;
 }
@@ -369,13 +364,15 @@ static int __init ibwdt_init(void)
 {
         int err;
 
-        printk(KERN_INFO PFX "WDT driver for IB700 single board computer initialising.\n");
+        printk(KERN_INFO PFX
+                "WDT driver for IB700 single board computer initialising.\n");
 
         err = platform_driver_register(&ibwdt_driver);
         if (err)
                 return err;
 
-        ibwdt_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0);
+        ibwdt_platform_device = platform_device_register_simple(DRV_NAME,
+                                                                -1, NULL, 0);
         if (IS_ERR(ibwdt_platform_device)) {
                 err = PTR_ERR(ibwdt_platform_device);
                 goto unreg_platform_driver;
diff --git a/drivers/watchdog/ibmasr.c b/drivers/watchdog/ibmasr.c
index 94155f6136c2..b82405cfb4cd 100644
--- a/drivers/watchdog/ibmasr.c
+++ b/drivers/watchdog/ibmasr.c
@@ -19,9 +19,8 @@
 #include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/dmi.h>
-
-#include <asm/io.h>
-#include <asm/uaccess.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
 
 enum {
@@ -70,10 +69,13 @@ static char asr_expect_close;
 static unsigned int asr_type, asr_base, asr_length;
 static unsigned int asr_read_addr, asr_write_addr;
 static unsigned char asr_toggle_mask, asr_disable_mask;
+static spinlock_t asr_lock;
 
-static void asr_toggle(void)
+static void __asr_toggle(void)
 {
-        unsigned char reg = inb(asr_read_addr);
+        unsigned char reg;
+
+        reg = inb(asr_read_addr);
 
         outb(reg & ~asr_toggle_mask, asr_write_addr);
         reg = inb(asr_read_addr);
@@ -83,12 +85,21 @@ static void asr_toggle(void)
 
         outb(reg & ~asr_toggle_mask, asr_write_addr);
         reg = inb(asr_read_addr);
+        spin_unlock(&asr_lock);
+}
+
+static void asr_toggle(void)
+{
+        spin_lock(&asr_lock);
+        __asr_toggle();
+        spin_unlock(&asr_lock);
 }
 
 static void asr_enable(void)
 {
         unsigned char reg;
 
+        spin_lock(&asr_lock);
         if (asr_type == ASMTYPE_TOPAZ) {
                 /* asr_write_addr == asr_read_addr */
                 reg = inb(asr_read_addr);
@@ -99,17 +110,21 @@ static void asr_enable(void)
                  * First make sure the hardware timer is reset by toggling
                  * ASR hardware timer line.
                  */
-                asr_toggle();
+                __asr_toggle();
 
                 reg = inb(asr_read_addr);
                 outb(reg & ~asr_disable_mask, asr_write_addr);
         }
         reg = inb(asr_read_addr);
+        spin_unlock(&asr_lock);
 }
 
 static void asr_disable(void)
 {
-        unsigned char reg = inb(asr_read_addr);
+        unsigned char reg;
+
+        spin_lock(&asr_lock);
+        reg = inb(asr_read_addr);
 
         if (asr_type == ASMTYPE_TOPAZ)
                 /* asr_write_addr == asr_read_addr */
@@ -122,6 +137,7 @@ static void asr_disable(void)
                 outb(reg | asr_disable_mask, asr_write_addr);
         }
         reg = inb(asr_read_addr);
+        spin_unlock(&asr_lock);
 }
 
 static int __init asr_get_base_address(void)
@@ -133,7 +149,8 @@ static int __init asr_get_base_address(void)
 
         switch (asr_type) {
         case ASMTYPE_TOPAZ:
-                /* SELECT SuperIO CHIP FOR QUERYING (WRITE 0x07 TO BOTH 0x2E and 0x2F) */
+                /* SELECT SuperIO CHIP FOR QUERYING
+                   (WRITE 0x07 TO BOTH 0x2E and 0x2F) */
                 outb(0x07, 0x2e);
                 outb(0x07, 0x2f);
 
@@ -154,14 +171,26 @@ static int __init asr_get_base_address(void)
 
         case ASMTYPE_JASPER:
                 type = "Jaspers ";
-
-                /* FIXME: need to use pci_config_lock here, but it's not exported */
+#if 0
+                u32 r;
+                /* Suggested fix */
+                pdev = pci_get_bus_and_slot(0, DEVFN(0x1f, 0));
+                if (pdev == NULL)
+                        return -ENODEV;
+                pci_read_config_dword(pdev, 0x58, &r);
+                asr_base = r & 0xFFFE;
+                pci_dev_put(pdev);
+#else
+                /* FIXME: need to use pci_config_lock here,
+                   but it's not exported */
 
 /*              spin_lock_irqsave(&pci_config_lock, flags);*/
 
                 /* Select the SuperIO chip in the PCI I/O port register */
                 outl(0x8000f858, 0xcf8);
 
+                /* BUS 0, Slot 1F, fnc 0, offset 58 */
+
                 /*
                  * Read the base address for the SuperIO chip.
                  * Only the lower 16 bits are valid, but the address is word
@@ -170,7 +199,7 @@ static int __init asr_get_base_address(void)
                 asr_base = inl(0xcfc) & 0xfffe;
 
 /*              spin_unlock_irqrestore(&pci_config_lock, flags);*/
-
+#endif
                 asr_read_addr = asr_write_addr =
                         asr_base + JASPER_ASR_REG_OFFSET;
                 asr_toggle_mask = JASPER_ASR_TOGGLE_MASK;
@@ -241,66 +270,57 @@ static ssize_t asr_write(struct file *file, const char __user *buf,
         return count;
 }
 
-static int asr_ioctl(struct inode *inode, struct file *file,
-                     unsigned int cmd, unsigned long arg)
+static long asr_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         static const struct watchdog_info ident = {
-                .options =      WDIOF_KEEPALIVEPING | 
+                .options =      WDIOF_KEEPALIVEPING |
                                 WDIOF_MAGICCLOSE,
-                .identity =     "IBM ASR"
+                .identity =     "IBM ASR",
         };
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         int heartbeat;
 
         switch (cmd) {
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident, sizeof(ident)) ?
-                                -EFAULT : 0;
-
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-
-                case WDIOC_KEEPALIVE:
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
+        {
+                int new_options, retval = -EINVAL;
+                if (get_user(new_options, p))
+                        return -EFAULT;
+                if (new_options & WDIOS_DISABLECARD) {
+                        asr_disable();
+                        retval = 0;
+                }
+                if (new_options & WDIOS_ENABLECARD) {
+                        asr_enable();
                         asr_toggle();
-                        return 0;
-
-                /*
-                 * The hardware has a fixed timeout value, so no WDIOC_SETTIMEOUT
-                 * and WDIOC_GETTIMEOUT always returns 256.
-                 */
-                case WDIOC_GETTIMEOUT:
-                        heartbeat = 256;
-                        return put_user(heartbeat, p);
-
-                case WDIOC_SETOPTIONS: {
-                        int new_options, retval = -EINVAL;
-
-                        if (get_user(new_options, p))
-                                return -EFAULT;
-
-                        if (new_options & WDIOS_DISABLECARD) {
-                                asr_disable();
-                                retval = 0;
-                        }
-
-                        if (new_options & WDIOS_ENABLECARD) {
-                                asr_enable();
-                                asr_toggle();
-                                retval = 0;
-                        }
-
-                        return retval;
+                        retval = 0;
                 }
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                asr_toggle();
+                return 0;
+        /*
+         * The hardware has a fixed timeout value, so no WDIOC_SETTIMEOUT
+         * and WDIOC_GETTIMEOUT always returns 256.
+         */
+        case WDIOC_GETTIMEOUT:
+                heartbeat = 256;
+                return put_user(heartbeat, p);
+        default:
+                return -ENOTTY;
         }
-
-        return -ENOTTY;
 }
 
 static int asr_open(struct inode *inode, struct file *file)
 {
-        if(test_and_set_bit(0, &asr_is_open))
+        if (test_and_set_bit(0, &asr_is_open))
                 return -EBUSY;
 
         asr_toggle();
@@ -314,7 +334,8 @@ static int asr_release(struct inode *inode, struct file *file)
         if (asr_expect_close == 42)
                 asr_disable();
         else {
-                printk(KERN_CRIT PFX "unexpected close, not stopping watchdog!\n");
+                printk(KERN_CRIT PFX
+                                "unexpected close, not stopping watchdog!\n");
                 asr_toggle();
         }
         clear_bit(0, &asr_is_open);
@@ -323,12 +344,12 @@ static int asr_release(struct inode *inode, struct file *file)
 }
 
 static const struct file_operations asr_fops = {
-        .owner =        THIS_MODULE,
-        .llseek =       no_llseek,
-        .write =        asr_write,
-        .ioctl =        asr_ioctl,
-        .open =         asr_open,
-        .release =      asr_release,
+        .owner =                THIS_MODULE,
+        .llseek =               no_llseek,
+        .write =                asr_write,
+        .unlocked_ioctl =       asr_ioctl,
+        .open =                 asr_open,
+        .release =              asr_release,
 };
 
 static struct miscdevice asr_miscdev = {
@@ -367,6 +388,8 @@ static int __init ibmasr_init(void)
         if (!asr_type)
                 return -ENODEV;
 
+        spin_lock_init(&asr_lock);
+
         rc = asr_get_base_address();
         if (rc)
                 return rc;
@@ -395,7 +418,9 @@ module_init(ibmasr_init);
 module_exit(ibmasr_exit);
 
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 MODULE_DESCRIPTION("IBM Automatic Server Restart driver");
 MODULE_AUTHOR("Andrey Panin");
diff --git a/drivers/watchdog/indydog.c b/drivers/watchdog/indydog.c
index 788245bdaa7f..73c9e7992feb 100644
--- a/drivers/watchdog/indydog.c
+++ b/drivers/watchdog/indydog.c
@@ -1,7 +1,8 @@
 /*
  *      IndyDog 0.3     A Hardware Watchdog Device for SGI IP22
  *
- *      (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
+ *      (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>,
+ *                                              All Rights Reserved.
  *
  *      This program is free software; you can redistribute it and/or
  *      modify it under the terms of the GNU General Public License
@@ -22,32 +23,42 @@
 #include <linux/notifier.h>
 #include <linux/reboot.h>
 #include <linux/init.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
 #include <asm/sgi/mc.h>
 
 #define PFX "indydog: "
-static int indydog_alive;
+static unsigned long indydog_alive;
+static spinlock_t indydog_lock;
 
 #define WATCHDOG_TIMEOUT 30             /* 30 sec default timeout */
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 static void indydog_start(void)
 {
-        u32 mc_ctrl0 = sgimc->cpuctrl0;
+        u32 mc_ctrl0;
 
+        spin_lock(&indydog_lock);
+        mc_ctrl0 = sgimc->cpuctrl0;
         mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
         sgimc->cpuctrl0 = mc_ctrl0;
+        spin_unlock(&indydog_lock);
 }
 
 static void indydog_stop(void)
 {
-        u32 mc_ctrl0 = sgimc->cpuctrl0;
+        u32 mc_ctrl0;
 
+        spin_lock(&indydog_lock);
+
+        mc_ctrl0 = sgimc->cpuctrl0;
         mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
         sgimc->cpuctrl0 = mc_ctrl0;
+        spin_unlock(&indydog_lock);
 
         printk(KERN_INFO PFX "Stopped watchdog timer.\n");
 }
@@ -62,7 +73,7 @@ static void indydog_ping(void)
  */
 static int indydog_open(struct inode *inode, struct file *file)
 {
-        if (indydog_alive)
+        if (test_and_set_bit(0, &indydog_alive))
                 return -EBUSY;
 
         if (nowayout)
@@ -84,23 +95,21 @@ static int indydog_release(struct inode *inode, struct file *file)
          * Lock it in if it's a module and we defined ...NOWAYOUT */
         if (!nowayout)
                 indydog_stop();         /* Turn the WDT off */
-
-        indydog_alive = 0;
-
+        clear_bit(0, &indydog_alive);
         return 0;
 }
 
-static ssize_t indydog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
+static ssize_t indydog_write(struct file *file, const char *data,
+                                                size_t len, loff_t *ppos)
 {
         /* Refresh the timer. */
-        if (len) {
+        if (len)
                 indydog_ping();
-        }
         return len;
 }
 
-static int indydog_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long indydog_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int options, retval = -EINVAL;
         static struct watchdog_info ident = {
@@ -111,42 +120,40 @@ static int indydog_ioctl(struct inode *inode, struct file *file,
         };
 
         switch (cmd) {
-                default:
-                        return -ENOTTY;
-                case WDIOC_GETSUPPORT:
-                        if (copy_to_user((struct watchdog_info *)arg,
-                                         &ident, sizeof(ident)))
-                                return -EFAULT;
-                        return 0;
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0,(int *)arg);
-                case WDIOC_KEEPALIVE:
-                        indydog_ping();
-                        return 0;
-                case WDIOC_GETTIMEOUT:
-                        return put_user(WATCHDOG_TIMEOUT,(int *)arg);
-                case WDIOC_SETOPTIONS:
-                {
-                        if (get_user(options, (int *)arg))
-                                return -EFAULT;
-
-                        if (options & WDIOS_DISABLECARD) {
-                                indydog_stop();
-                                retval = 0;
-                        }
-
-                        if (options & WDIOS_ENABLECARD) {
-                                indydog_start();
-                                retval = 0;
-                        }
-
-                        return retval;
+        case WDIOC_GETSUPPORT:
+                if (copy_to_user((struct watchdog_info *)arg,
+                                 &ident, sizeof(ident)))
+                        return -EFAULT;
+                return 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, (int *)arg);
+        case WDIOC_SETOPTIONS:
+        {
+                if (get_user(options, (int *)arg))
+                        return -EFAULT;
+                if (options & WDIOS_DISABLECARD) {
+                        indydog_stop();
+                        retval = 0;
                 }
+                if (options & WDIOS_ENABLECARD) {
+                        indydog_start();
+                        retval = 0;
+                }
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                indydog_ping();
+                return 0;
+        case WDIOC_GETTIMEOUT:
+                return put_user(WATCHDOG_TIMEOUT, (int *)arg);
+        default:
+                return -ENOTTY;
         }
 }
 
-static int indydog_notify_sys(struct notifier_block *this, unsigned long code, void *unused)
+static int indydog_notify_sys(struct notifier_block *this,
+                                        unsigned long code, void *unused)
 {
         if (code == SYS_DOWN || code == SYS_HALT)
                 indydog_stop();         /* Turn the WDT off */
@@ -158,7 +165,7 @@ static const struct file_operations indydog_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = indydog_write,
-        .ioctl          = indydog_ioctl,
+        .unlocked_ioctl = indydog_ioctl,
         .open           = indydog_open,
         .release        = indydog_release,
 };
@@ -180,17 +187,20 @@ static int __init watchdog_init(void)
 {
         int ret;
 
+        spin_lock_init(&indydog_lock);
+
         ret = register_reboot_notifier(&indydog_notifier);
         if (ret) {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        ret);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
                 return ret;
         }
 
         ret = misc_register(&indydog_miscdev);
         if (ret) {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        WATCHDOG_MINOR, ret);
                 unregister_reboot_notifier(&indydog_notifier);
                 return ret;
         }
diff --git a/drivers/watchdog/iop_wdt.c b/drivers/watchdog/iop_wdt.c
index bbbd91af754d..96eb2cbe5874 100644
--- a/drivers/watchdog/iop_wdt.c
+++ b/drivers/watchdog/iop_wdt.c
@@ -32,11 +32,12 @@
 #include <linux/miscdevice.h>
 #include <linux/watchdog.h>
 #include <linux/uaccess.h>
-#include <asm/hardware.h>
+#include <mach/hardware.h>
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 static unsigned long wdt_status;
 static unsigned long boot_status;
+static spinlock_t wdt_lock;
 
 #define WDT_IN_USE              0
 #define WDT_OK_TO_CLOSE         1
@@ -68,8 +69,10 @@ static void wdt_enable(void)
         /* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF
          * Takes approx. 10.7s to timeout
          */
+        spin_lock(&wdt_lock);
         write_wdtcr(IOP_WDTCR_EN_ARM);
         write_wdtcr(IOP_WDTCR_EN);
+        spin_unlock(&wdt_lock);
 }
 
 /* returns 0 if the timer was successfully disabled */
@@ -77,9 +80,11 @@ static int wdt_disable(void)
 {
         /* Stop Counting */
         if (wdt_supports_disable()) {
+                spin_lock(&wdt_lock);
                 write_wdtcr(IOP_WDTCR_DIS_ARM);
                 write_wdtcr(IOP_WDTCR_DIS);
                 clear_bit(WDT_ENABLED, &wdt_status);
+                spin_unlock(&wdt_lock);
                 printk(KERN_INFO "WATCHDOG: Disabled\n");
                 return 0;
         } else
@@ -92,16 +97,12 @@ static int iop_wdt_open(struct inode *inode, struct file *file)
                 return -EBUSY;
 
         clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
-
         wdt_enable();
-
         set_bit(WDT_ENABLED, &wdt_status);
-
         return nonseekable_open(inode, file);
 }
 
-static ssize_t
-iop_wdt_write(struct file *file, const char *data, size_t len,
+static ssize_t iop_wdt_write(struct file *file, const char *data, size_t len,
                   loff_t *ppos)
 {
         if (len) {
@@ -121,46 +122,35 @@ iop_wdt_write(struct file *file, const char *data, size_t len,
                 }
                 wdt_enable();
         }
-
         return len;
 }
 
-static struct watchdog_info ident = {
+static const struct watchdog_info ident = {
         .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
         .identity = "iop watchdog",
 };
 
-static int
-iop_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-                  unsigned long arg)
+static long iop_wdt_ioctl(struct file *file,
+                                unsigned int cmd, unsigned long arg)
 {
         int options;
         int ret = -ENOTTY;
+        int __user *argp = (int __user *)arg;
 
         switch (cmd) {
         case WDIOC_GETSUPPORT:
-                if (copy_to_user
-                    ((struct watchdog_info *)arg, &ident, sizeof ident))
+                if (copy_to_user(argp, &ident, sizeof ident))
                         ret = -EFAULT;
                 else
                         ret = 0;
                 break;
 
         case WDIOC_GETSTATUS:
-                ret = put_user(0, (int *)arg);
+                ret = put_user(0, argp);
                 break;
 
         case WDIOC_GETBOOTSTATUS:
-                ret = put_user(boot_status, (int *)arg);
-                break;
-
-        case WDIOC_GETTIMEOUT:
-                ret = put_user(iop_watchdog_timeout(), (int *)arg);
-                break;
-
-        case WDIOC_KEEPALIVE:
-                wdt_enable();
-                ret = 0;
+                ret = put_user(boot_status, argp);
                 break;
 
         case WDIOC_SETOPTIONS:
@@ -177,14 +167,21 @@ iop_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                         } else
                                 ret = 0;
                 }
-
                 if (options & WDIOS_ENABLECARD) {
                         wdt_enable();
                         ret = 0;
                 }
                 break;
-        }
 
+        case WDIOC_KEEPALIVE:
+                wdt_enable();
+                ret = 0;
+                break;
+
+        case WDIOC_GETTIMEOUT:
+                ret = put_user(iop_watchdog_timeout(), argp);
+                break;
+        }
         return ret;
 }
 
@@ -214,7 +211,7 @@ static const struct file_operations iop_wdt_fops = {
         .owner = THIS_MODULE,
         .llseek = no_llseek,
         .write = iop_wdt_write,
-        .ioctl = iop_wdt_ioctl,
+        .unlocked_ioctl = iop_wdt_ioctl,
         .open = iop_wdt_open,
         .release = iop_wdt_release,
 };
@@ -229,10 +226,8 @@ static int __init iop_wdt_init(void)
 {
         int ret;
 
-        ret = misc_register(&iop_wdt_miscdev);
-        if (ret == 0)
-                printk("iop watchdog timer: timeout %lu sec\n",
-                       iop_watchdog_timeout());
+        spin_lock_init(&wdt_lock);
+
 
         /* check if the reset was caused by the watchdog timer */
         boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0;
@@ -242,6 +237,13 @@ static int __init iop_wdt_init(void)
          */
         write_wdtsr(IOP13XX_WDTCR_IB_RESET);
 
+        /* Register after we have the device set up so we cannot race
+           with an open */
+        ret = misc_register(&iop_wdt_miscdev);
+        if (ret == 0)
+                printk(KERN_INFO "iop watchdog timer: timeout %lu sec\n",
+                       iop_watchdog_timeout());
+
         return ret;
 }
 
diff --git a/drivers/watchdog/it8712f_wdt.c b/drivers/watchdog/it8712f_wdt.c
index 51bfd5721833..2270ee07c01b 100644
--- a/drivers/watchdog/it8712f_wdt.c
+++ b/drivers/watchdog/it8712f_wdt.c
@@ -221,7 +221,7 @@ static ssize_t it8712f_wdt_write(struct file *file, const char __user *data,
                 expect_close = 0;
                 for (i = 0; i < len; ++i) {
                         char c;
-                        if (get_user(c, data+i))
+                        if (get_user(c, data + i))
                                 return -EFAULT;
                         if (c == 'V')
                                 expect_close = 42;
@@ -244,8 +244,6 @@ static long it8712f_wdt_ioctl(struct file *file, unsigned int cmd,
         int value;
 
         switch (cmd) {
-        default:
-                return -ENOTTY;
         case WDIOC_GETSUPPORT:
                 if (copy_to_user(argp, &ident, sizeof(ident)))
                         return -EFAULT;
@@ -284,6 +282,8 @@ static long it8712f_wdt_ioctl(struct file *file, unsigned int cmd,
                 if (put_user(margin, p))
                         return -EFAULT;
                 return 0;
+        default:
+                return -ENOTTY;
         }
 }
 
diff --git a/drivers/watchdog/ixp2000_wdt.c b/drivers/watchdog/ixp2000_wdt.c
index dc7548dcaf35..4f4b35a20d84 100644
--- a/drivers/watchdog/ixp2000_wdt.c
+++ b/drivers/watchdog/ixp2000_wdt.c
@@ -25,42 +25,44 @@
 #include <linux/watchdog.h>
 #include <linux/init.h>
 #include <linux/bitops.h>
-
-#include <asm/hardware.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
+#include <mach/hardware.h>
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 static unsigned int heartbeat = 60;     /* (secs) Default is 1 minute */
 static unsigned long wdt_status;
+static spinlock_t wdt_lock;
 
 #define WDT_IN_USE              0
 #define WDT_OK_TO_CLOSE         1
 
 static unsigned long wdt_tick_rate;
 
-static void
-wdt_enable(void)
+static void wdt_enable(void)
 {
+        spin_lock(&wdt_lock);
         ixp2000_reg_write(IXP2000_RESET0, *(IXP2000_RESET0) | WDT_RESET_ENABLE);
         ixp2000_reg_write(IXP2000_TWDE, WDT_ENABLE);
         ixp2000_reg_write(IXP2000_T4_CLD, heartbeat * wdt_tick_rate);
         ixp2000_reg_write(IXP2000_T4_CTL, TIMER_DIVIDER_256 | TIMER_ENABLE);
+        spin_unlock(&wdt_lock);
 }
 
-static void
-wdt_disable(void)
+static void wdt_disable(void)
 {
+        spin_lock(&wdt_lock);
         ixp2000_reg_write(IXP2000_T4_CTL, 0);
+        spin_unlock(&wdt_lock);
 }
 
-static void
-wdt_keepalive(void)
+static void wdt_keepalive(void)
 {
+        spin_lock(&wdt_lock);
         ixp2000_reg_write(IXP2000_T4_CLD, heartbeat * wdt_tick_rate);
+        spin_unlock(&wdt_lock);
 }
 
-static int
-ixp2000_wdt_open(struct inode *inode, struct file *file)
+static int ixp2000_wdt_open(struct inode *inode, struct file *file)
 {
         if (test_and_set_bit(WDT_IN_USE, &wdt_status))
                 return -EBUSY;
@@ -72,8 +74,8 @@ ixp2000_wdt_open(struct inode *inode, struct file *file)
         return nonseekable_open(inode, file);
 }
 
-static ssize_t
-ixp2000_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
+static ssize_t ixp2000_wdt_write(struct file *file, const char *data,
+                                                size_t len, loff_t *ppos)
 {
         if (len) {
                 if (!nowayout) {
@@ -103,9 +105,8 @@ static struct watchdog_info ident = {
         .identity       = "IXP2000 Watchdog",
 };
 
-static int
-ixp2000_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-                        unsigned long arg)
+static long ixp2000_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int ret = -ENOTTY;
         int time;
@@ -124,6 +125,11 @@ ixp2000_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                 ret = put_user(0, (int *)arg);
                 break;
 
+        case WDIOC_KEEPALIVE:
+                wdt_enable();
+                ret = 0;
+                break;
+
         case WDIOC_SETTIMEOUT:
                 ret = get_user(time, (int *)arg);
                 if (ret)
@@ -141,26 +147,18 @@ ixp2000_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
         case WDIOC_GETTIMEOUT:
                 ret = put_user(heartbeat, (int *)arg);
                 break;
-
-        case WDIOC_KEEPALIVE:
-                wdt_enable();
-                ret = 0;
-                break;
         }
 
         return ret;
 }
 
-static int
-ixp2000_wdt_release(struct inode *inode, struct file *file)
+static int ixp2000_wdt_release(struct inode *inode, struct file *file)
 {
-        if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) {
+        if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
                 wdt_disable();
-        } else {
+        else
                 printk(KERN_CRIT "WATCHDOG: Device closed unexpectedly - "
                                         "timer will not stop\n");
-        }
-
         clear_bit(WDT_IN_USE, &wdt_status);
         clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
 
@@ -168,18 +166,16 @@ ixp2000_wdt_release(struct inode *inode, struct file *file)
 }
 
 
-static const struct file_operations ixp2000_wdt_fops =
-{
+static const struct file_operations ixp2000_wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = ixp2000_wdt_write,
-        .ioctl          = ixp2000_wdt_ioctl,
+        .unlocked_ioctl = ixp2000_wdt_ioctl,
         .open           = ixp2000_wdt_open,
         .release        = ixp2000_wdt_release,
 };
 
-static struct miscdevice ixp2000_wdt_miscdev =
-{
+static struct miscdevice ixp2000_wdt_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
         .fops           = &ixp2000_wdt_fops,
@@ -191,9 +187,8 @@ static int __init ixp2000_wdt_init(void)
                 printk(KERN_INFO "Unable to use IXP2000 watchdog due to IXP2800 erratum #25.\n");
                 return -EIO;
         }
-
         wdt_tick_rate = (*IXP2000_T1_CLD * HZ) / 256;
-
+        spin_lock_init(&wdt_lock);
         return misc_register(&ixp2000_wdt_miscdev);
 }
 
diff --git a/drivers/watchdog/ixp4xx_wdt.c b/drivers/watchdog/ixp4xx_wdt.c
index 5864bb865cfe..8302ef005be7 100644
--- a/drivers/watchdog/ixp4xx_wdt.c
+++ b/drivers/watchdog/ixp4xx_wdt.c
@@ -22,48 +22,47 @@
 #include <linux/watchdog.h>
 #include <linux/init.h>
 #include <linux/bitops.h>
-
-#include <asm/hardware.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
+#include <mach/hardware.h>
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 static int heartbeat = 60;      /* (secs) Default is 1 minute */
 static unsigned long wdt_status;
 static unsigned long boot_status;
+static DEFINE_SPINLOCK(wdt_lock);
 
 #define WDT_TICK_RATE (IXP4XX_PERIPHERAL_BUS_CLOCK * 1000000UL)
 
 #define WDT_IN_USE              0
 #define WDT_OK_TO_CLOSE         1
 
-static void
-wdt_enable(void)
+static void wdt_enable(void)
 {
+        spin_lock(&wdt_lock);
         *IXP4XX_OSWK = IXP4XX_WDT_KEY;
         *IXP4XX_OSWE = 0;
         *IXP4XX_OSWT = WDT_TICK_RATE * heartbeat;
         *IXP4XX_OSWE = IXP4XX_WDT_COUNT_ENABLE | IXP4XX_WDT_RESET_ENABLE;
         *IXP4XX_OSWK = 0;
+        spin_unlock(&wdt_lock);
 }
 
-static void
-wdt_disable(void)
+static void wdt_disable(void)
 {
+        spin_lock(&wdt_lock);
         *IXP4XX_OSWK = IXP4XX_WDT_KEY;
         *IXP4XX_OSWE = 0;
         *IXP4XX_OSWK = 0;
+        spin_unlock(&wdt_lock);
 }
 
-static int
-ixp4xx_wdt_open(struct inode *inode, struct file *file)
+static int ixp4xx_wdt_open(struct inode *inode, struct file *file)
 {
         if (test_and_set_bit(WDT_IN_USE, &wdt_status))
                 return -EBUSY;
 
         clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
-
         wdt_enable();
-
         return nonseekable_open(inode, file);
 }
 
@@ -87,7 +86,6 @@ ixp4xx_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
                 }
                 wdt_enable();
         }
-
         return len;
 }
 
@@ -98,9 +96,8 @@ static struct watchdog_info ident = {
 };
 
 
-static int
-ixp4xx_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-                        unsigned long arg)
+static long ixp4xx_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int ret = -ENOTTY;
         int time;
@@ -119,6 +116,11 @@ ixp4xx_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                 ret = put_user(boot_status, (int *)arg);
                 break;
 
+        case WDIOC_KEEPALIVE:
+                wdt_enable();
+                ret = 0;
+                break;
+
         case WDIOC_SETTIMEOUT:
                 ret = get_user(time, (int *)arg);
                 if (ret)
@@ -136,25 +138,17 @@ ixp4xx_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
         case WDIOC_GETTIMEOUT:
                 ret = put_user(heartbeat, (int *)arg);
                 break;
-
-        case WDIOC_KEEPALIVE:
-                wdt_enable();
-                ret = 0;
-                break;
         }
         return ret;
 }
 
-static int
-ixp4xx_wdt_release(struct inode *inode, struct file *file)
+static int ixp4xx_wdt_release(struct inode *inode, struct file *file)
 {
-        if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) {
+        if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
                 wdt_disable();
-        } else {
+        else
                 printk(KERN_CRIT "WATCHDOG: Device closed unexpectedly - "
                                         "timer will not stop\n");
-        }
-
         clear_bit(WDT_IN_USE, &wdt_status);
         clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
 
@@ -162,18 +156,16 @@ ixp4xx_wdt_release(struct inode *inode, struct file *file)
 }
 
 
-static const struct file_operations ixp4xx_wdt_fops =
-{
+static const struct file_operations ixp4xx_wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = ixp4xx_wdt_write,
-        .ioctl          = ixp4xx_wdt_ioctl,
+        .unlocked_ioctl = ixp4xx_wdt_ioctl,
         .open           = ixp4xx_wdt_open,
         .release        = ixp4xx_wdt_release,
 };
 
-static struct miscdevice ixp4xx_wdt_miscdev =
-{
+static struct miscdevice ixp4xx_wdt_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
         .fops           = &ixp4xx_wdt_fops,
@@ -186,19 +178,18 @@ static int __init ixp4xx_wdt_init(void)
 
         asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
         if (!(processor_id & 0xf) && !cpu_is_ixp46x()) {
-                printk("IXP4XXX Watchdog: Rev. A0 IXP42x CPU detected - "
-                        "watchdog disabled\n");
+                printk(KERN_ERR "IXP4XXX Watchdog: Rev. A0 IXP42x CPU detected"
+                        " - watchdog disabled\n");
 
                 return -ENODEV;
         }
-
-        ret = misc_register(&ixp4xx_wdt_miscdev);
-        if (ret == 0)
-                printk("IXP4xx Watchdog Timer: heartbeat %d sec\n", heartbeat);
-
+        spin_lock_init(&wdt_lock);
         boot_status = (*IXP4XX_OSST & IXP4XX_OSST_TIMER_WARM_RESET) ?
                         WDIOF_CARDRESET : 0;
-
+        ret = misc_register(&ixp4xx_wdt_miscdev);
+        if (ret == 0)
+                printk(KERN_INFO "IXP4xx Watchdog Timer: heartbeat %d sec\n",
+                        heartbeat);
         return ret;
 }
 
diff --git a/drivers/watchdog/ks8695_wdt.c b/drivers/watchdog/ks8695_wdt.c
index df5a6b811ccd..0b798fdaa378 100644
--- a/drivers/watchdog/ks8695_wdt.c
+++ b/drivers/watchdog/ks8695_wdt.c
@@ -19,10 +19,9 @@
 #include <linux/platform_device.h>
 #include <linux/types.h>
 #include <linux/watchdog.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/arch/regs-timer.h>
-
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <mach/regs-timer.h>
 
 #define WDT_DEFAULT_TIME        5       /* seconds */
 #define WDT_MAX_TIME            171     /* seconds */
@@ -31,38 +30,44 @@ static int wdt_time = WDT_DEFAULT_TIME;
 static int nowayout = WATCHDOG_NOWAYOUT;
 
 module_param(wdt_time, int, 0);
-MODULE_PARM_DESC(wdt_time, "Watchdog time in seconds. (default="__MODULE_STRING(WDT_DEFAULT_TIME) ")");
+MODULE_PARM_DESC(wdt_time, "Watchdog time in seconds. (default="
+                                        __MODULE_STRING(WDT_DEFAULT_TIME) ")");
 
 #ifdef CONFIG_WATCHDOG_NOWAYOUT
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 #endif
 
 
 static unsigned long ks8695wdt_busy;
+static spinlock_t ks8695_lock;
 
 /* ......................................................................... */
 
 /*
  * Disable the watchdog.
  */
-static void inline ks8695_wdt_stop(void)
+static inline void ks8695_wdt_stop(void)
 {
         unsigned long tmcon;
 
+        spin_lock(&ks8695_lock);
         /* disable timer0 */
         tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
         __raw_writel(tmcon & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+        spin_unlock(&ks8695_lock);
 }
 
 /*
  * Enable and reset the watchdog.
  */
-static void inline ks8695_wdt_start(void)
+static inline void ks8695_wdt_start(void)
 {
         unsigned long tmcon;
         unsigned long tval = wdt_time * CLOCK_TICK_RATE;
 
+        spin_lock(&ks8695_lock);
         /* disable timer0 */
         tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
         __raw_writel(tmcon & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
@@ -73,19 +78,22 @@ static void inline ks8695_wdt_start(void)
         /* re-enable timer0 */
         tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
         __raw_writel(tmcon | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+        spin_unlock(&ks8695_lock);
 }
 
 /*
  * Reload the watchdog timer.  (ie, pat the watchdog)
  */
-static void inline ks8695_wdt_reload(void)
+static inline void ks8695_wdt_reload(void)
 {
         unsigned long tmcon;
 
+        spin_lock(&ks8695_lock);
         /* disable, then re-enable timer0 */
         tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
         __raw_writel(tmcon & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
         __raw_writel(tmcon | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+        spin_unlock(&ks8695_lock);
 }
 
 /*
@@ -102,7 +110,8 @@ static int ks8695_wdt_settimeout(int new_time)
         if ((new_time <= 0) || (new_time > WDT_MAX_TIME))
                 return -EINVAL;
 
-        /* Set new watchdog time. It will be used when ks8695_wdt_start() is called. */
+        /* Set new watchdog time. It will be used when
+           ks8695_wdt_start() is called. */
         wdt_time = new_time;
         return 0;
 }
@@ -128,9 +137,9 @@ static int ks8695_wdt_open(struct inode *inode, struct file *file)
  */
 static int ks8695_wdt_close(struct inode *inode, struct file *file)
 {
+        /* Disable the watchdog when file is closed */
         if (!nowayout)
-                ks8695_wdt_stop();      /* Disable the watchdog when file is closed */
-
+                ks8695_wdt_stop();
         clear_bit(0, &ks8695wdt_busy);
         return 0;
 }
@@ -143,60 +152,52 @@ static struct watchdog_info ks8695_wdt_info = {
 /*
  * Handle commands from user-space.
  */
-static int ks8695_wdt_ioctl(struct inode *inode, struct file *file,
-                unsigned int cmd, unsigned long arg)
+static long ks8695_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         int new_value;
 
-        switch(cmd) {
-                case WDIOC_KEEPALIVE:
-                        ks8695_wdt_reload();    /* pat the watchdog */
-                        return 0;
-
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ks8695_wdt_info, sizeof(ks8695_wdt_info)) ? -EFAULT : 0;
-
-                case WDIOC_SETTIMEOUT:
-                        if (get_user(new_value, p))
-                                return -EFAULT;
-
-                        if (ks8695_wdt_settimeout(new_value))
-                                return -EINVAL;
-
-                        /* Enable new time value */
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ks8695_wdt_info,
+                                        sizeof(ks8695_wdt_info)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
+                if (get_user(new_value, p))
+                        return -EFAULT;
+                if (new_value & WDIOS_DISABLECARD)
+                        ks8695_wdt_stop();
+                if (new_value & WDIOS_ENABLECARD)
                         ks8695_wdt_start();
-
-                        /* Return current value */
-                        return put_user(wdt_time, p);
-
-                case WDIOC_GETTIMEOUT:
-                        return put_user(wdt_time, p);
-
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-
-                case WDIOC_SETOPTIONS:
-                        if (get_user(new_value, p))
-                                return -EFAULT;
-
-                        if (new_value & WDIOS_DISABLECARD)
-                                ks8695_wdt_stop();
-                        if (new_value & WDIOS_ENABLECARD)
-                                ks8695_wdt_start();
-                        return 0;
-
-                default:
-                        return -ENOTTY;
+                return 0;
+        case WDIOC_KEEPALIVE:
+                ks8695_wdt_reload();    /* pat the watchdog */
+                return 0;
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_value, p))
+                        return -EFAULT;
+                if (ks8695_wdt_settimeout(new_value))
+                        return -EINVAL;
+                /* Enable new time value */
+                ks8695_wdt_start();
+                /* Return current value */
+                return put_user(wdt_time, p);
+        case WDIOC_GETTIMEOUT:
+                return put_user(wdt_time, p);
+        default:
+                return -ENOTTY;
         }
 }
 
 /*
  * Pat the watchdog whenever device is written to.
  */
-static ssize_t ks8695_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
+static ssize_t ks8695_wdt_write(struct file *file, const char *data,
+                                                size_t len, loff_t *ppos)
 {
         ks8695_wdt_reload();            /* pat the watchdog */
         return len;
@@ -207,7 +208,7 @@ static ssize_t ks8695_wdt_write(struct file *file, const char *data, size_t len,
 static const struct file_operations ks8695wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
-        .ioctl          = ks8695_wdt_ioctl,
+        .unlocked_ioctl = ks8695_wdt_ioctl,
         .open           = ks8695_wdt_open,
         .release        = ks8695_wdt_close,
         .write          = ks8695_wdt_write,
@@ -231,7 +232,8 @@ static int __init ks8695wdt_probe(struct platform_device *pdev)
         if (res)
                 return res;
 
-        printk("KS8695 Watchdog Timer enabled (%d seconds%s)\n", wdt_time, nowayout ? ", nowayout" : "");
+        printk(KERN_INFO "KS8695 Watchdog Timer enabled (%d seconds%s)\n",
+                                wdt_time, nowayout ? ", nowayout" : "");
         return 0;
 }
 
@@ -285,12 +287,14 @@ static struct platform_driver ks8695wdt_driver = {
 
 static int __init ks8695_wdt_init(void)
 {
-        /* Check that the heartbeat value is within range; if not reset to the default */
+        spin_lock_init(&ks8695_lock);
+        /* Check that the heartbeat value is within range;
+           if not reset to the default */
         if (ks8695_wdt_settimeout(wdt_time)) {
                 ks8695_wdt_settimeout(WDT_DEFAULT_TIME);
-                pr_info("ks8695_wdt: wdt_time value must be 1 <= wdt_time <= %i, using %d\n", wdt_time, WDT_MAX_TIME);
+                pr_info("ks8695_wdt: wdt_time value must be 1 <= wdt_time <= %i, using %d\n",
+                                                        wdt_time, WDT_MAX_TIME);
         }
-
         return platform_driver_register(&ks8695wdt_driver);
 }
 
diff --git a/drivers/watchdog/machzwd.c b/drivers/watchdog/machzwd.c
index 6905135a776c..2dfc27559bf7 100644
--- a/drivers/watchdog/machzwd.c
+++ b/drivers/watchdog/machzwd.c
@@ -40,9 +40,9 @@
 #include <linux/notifier.h>
 #include <linux/reboot.h>
 #include <linux/init.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 /* ports */
@@ -95,7 +95,9 @@ MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 #define PFX "machzwd"
 
@@ -114,7 +116,7 @@ static struct watchdog_info zf_info = {
  * 3 = GEN_SCI
  * defaults to GEN_RESET (0)
  */
-static int action = 0;
+static int action;
 module_param(action, int, 0);
 MODULE_PARM_DESC(action, "after watchdog resets, generate: 0 = RESET(*)  1 = SMI  2 = NMI  3 = SCI");
 
@@ -123,10 +125,9 @@ static void zf_ping(unsigned long data);
 static int zf_action = GEN_RESET;
 static unsigned long zf_is_open;
 static char zf_expect_close;
-static DEFINE_SPINLOCK(zf_lock);
 static DEFINE_SPINLOCK(zf_port_lock);
 static DEFINE_TIMER(zf_timer, zf_ping, 0, 0);
-static unsigned long next_heartbeat = 0;
+static unsigned long next_heartbeat;
 
 
 /* timeout for user land heart beat (10 seconds) */
@@ -171,13 +172,13 @@ static inline void zf_set_control(unsigned short new)
 
 static inline void zf_set_timer(unsigned short new, unsigned char n)
 {
-        switch(n){
-                case WD1:
-                        zf_writew(COUNTER_1, new);
-                case WD2:
-                        zf_writeb(COUNTER_2, new > 0xff ? 0xff : new);
-                default:
-                        return;
+        switch (n) {
+        case WD1:
+                zf_writew(COUNTER_1, new);
+        case WD2:
+                zf_writeb(COUNTER_2, new > 0xff ? 0xff : new);
+        default:
+                return;
         }
 }
 
@@ -241,10 +242,8 @@ static void zf_ping(unsigned long data)
 
         zf_writeb(COUNTER_2, 0xff);
 
-        if(time_before(jiffies, next_heartbeat)){
-
+        if (time_before(jiffies, next_heartbeat)) {
                 dprintk("time_before: %ld\n", next_heartbeat - jiffies);
-
                 /*
                  * reset event is activated by transition from 0 to 1 on
                  * RESET_WD1 bit and we assume that it is already zero...
@@ -261,24 +260,21 @@ static void zf_ping(unsigned long data)
                 spin_unlock_irqrestore(&zf_port_lock, flags);
 
                 mod_timer(&zf_timer, jiffies + ZF_HW_TIMEO);
-        }else{
+        } else
                 printk(KERN_CRIT PFX ": I will reset your machine\n");
-        }
 }
 
 static ssize_t zf_write(struct file *file, const char __user *buf, size_t count,
                                                                 loff_t *ppos)
 {
         /* See if we got the magic character */
-        if(count){
-
+        if (count) {
                 /*
                  * no need to check for close confirmation
                  * no way to disable watchdog ;)
                  */
                 if (!nowayout) {
                         size_t ofs;
-
                         /*
                          * note: just in case someone wrote the magic character
                          * five months ago...
@@ -286,11 +282,11 @@ static ssize_t zf_write(struct file *file, const char __user *buf, size_t count,
                         zf_expect_close = 0;
 
                         /* now scan */
-                        for (ofs = 0; ofs != count; ofs++){
+                        for (ofs = 0; ofs != count; ofs++) {
                                 char c;
                                 if (get_user(c, buf + ofs))
                                         return -EFAULT;
-                                if (c == 'V'){
+                                if (c == 'V') {
                                         zf_expect_close = 42;
                                         dprintk("zf_expect_close = 42\n");
                                 }
@@ -303,14 +299,11 @@ static ssize_t zf_write(struct file *file, const char __user *buf, size_t count,
                  */
                 next_heartbeat = jiffies + ZF_USER_TIMEO;
                 dprintk("user ping at %ld\n", jiffies);
-
         }
-
         return count;
 }
 
-static int zf_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-        unsigned long arg)
+static long zf_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
@@ -319,55 +312,38 @@ static int zf_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                 if (copy_to_user(argp, &zf_info, sizeof(zf_info)))
                         return -EFAULT;
                 break;
-
         case WDIOC_GETSTATUS:
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, p);
-
         case WDIOC_KEEPALIVE:
                 zf_ping(0);
                 break;
-
         default:
                 return -ENOTTY;
         }
-
         return 0;
 }
 
 static int zf_open(struct inode *inode, struct file *file)
 {
-        spin_lock(&zf_lock);
-        if(test_and_set_bit(0, &zf_is_open)) {
-                spin_unlock(&zf_lock);
+        if (test_and_set_bit(0, &zf_is_open))
                 return -EBUSY;
-        }
-
         if (nowayout)
                 __module_get(THIS_MODULE);
-
-        spin_unlock(&zf_lock);
-
         zf_timer_on();
-
         return nonseekable_open(inode, file);
 }
 
 static int zf_close(struct inode *inode, struct file *file)
 {
-        if(zf_expect_close == 42){
+        if (zf_expect_close == 42)
                 zf_timer_off();
-        } else {
+        else {
                 del_timer(&zf_timer);
                 printk(KERN_ERR PFX ": device file closed unexpectedly. Will not stop the WDT!\n");
         }
-
-        spin_lock(&zf_lock);
         clear_bit(0, &zf_is_open);
-        spin_unlock(&zf_lock);
-
         zf_expect_close = 0;
-
         return 0;
 }
 
@@ -378,23 +354,18 @@ static int zf_close(struct inode *inode, struct file *file)
 static int zf_notify_sys(struct notifier_block *this, unsigned long code,
                                                                 void *unused)
 {
-        if(code == SYS_DOWN || code == SYS_HALT){
+        if (code == SYS_DOWN || code == SYS_HALT)
                 zf_timer_off();
-        }
-
         return NOTIFY_DONE;
 }
 
-
-
-
 static const struct file_operations zf_fops = {
-        .owner          = THIS_MODULE,
-        .llseek         = no_llseek,
-        .write          = zf_write,
-        .ioctl          = zf_ioctl,
-        .open           = zf_open,
-        .release        = zf_close,
+        .owner          = THIS_MODULE,
+        .llseek         = no_llseek,
+        .write          = zf_write,
+        .unlocked_ioctl = zf_ioctl,
+        .open           = zf_open,
+        .release        = zf_close,
 };
 
 static struct miscdevice zf_miscdev = {
@@ -402,7 +373,7 @@ static struct miscdevice zf_miscdev = {
         .name = "watchdog",
         .fops = &zf_fops,
 };
- 
+
 
 /*
  * The device needs to learn about soft shutdowns in order to
@@ -423,22 +394,23 @@ static int __init zf_init(void)
 {
         int ret;
 
-        printk(KERN_INFO PFX ": MachZ ZF-Logic Watchdog driver initializing.\n");
+        printk(KERN_INFO PFX
+                ": MachZ ZF-Logic Watchdog driver initializing.\n");
 
         ret = zf_get_ZFL_version();
-        if ((!ret) || (ret == 0xffff)) {
+        if (!ret || ret == 0xffff) {
                 printk(KERN_WARNING PFX ": no ZF-Logic found\n");
                 return -ENODEV;
         }
 
-        if((action <= 3) && (action >= 0)){
-                zf_action = zf_action>>action;
-        } else
+        if (action <= 3 && action >= 0)
+                zf_action = zf_action >> action;
+        else
                 action = 0;
 
         zf_show_action(action);
 
-        if(!request_region(ZF_IOBASE, 3, "MachZ ZFL WDT")){
+        if (!request_region(ZF_IOBASE, 3, "MachZ ZFL WDT")) {
                 printk(KERN_ERR "cannot reserve I/O ports at %d\n",
                                                         ZF_IOBASE);
                 ret = -EBUSY;
@@ -446,14 +418,14 @@ static int __init zf_init(void)
         }
 
         ret = register_reboot_notifier(&zf_notifier);
-        if(ret){
+        if (ret) {
                 printk(KERN_ERR "can't register reboot notifier (err=%d)\n",
                                                                         ret);
                 goto no_reboot;
         }
 
         ret = misc_register(&zf_miscdev);
-        if (ret){
+        if (ret) {
                 printk(KERN_ERR "can't misc_register on minor=%d\n",
                                                         WATCHDOG_MINOR);
                 goto no_misc;
diff --git a/drivers/watchdog/mixcomwd.c b/drivers/watchdog/mixcomwd.c
index 1adf1d56027d..407b025cb104 100644
--- a/drivers/watchdog/mixcomwd.c
+++ b/drivers/watchdog/mixcomwd.c
@@ -29,7 +29,8 @@
  *              - support for one more type board
  *
  * Version 0.5 (2001/12/14) Matt Domsch <Matt_Domsch@dell.com>
- *              - added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
+ *              - added nowayout module option to override
+ *                CONFIG_WATCHDOG_NOWAYOUT
  *
  * Version 0.6 (2002/04/12): Rob Radez <rob@osinvestor.com>
  *              - make mixcomwd_opened unsigned,
@@ -53,8 +54,8 @@
 #include <linux/init.h>
 #include <linux/jiffies.h>
 #include <linux/timer.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
 
 /*
  * We have two types of cards that can be probed:
@@ -108,18 +109,19 @@ static char expect_close;
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 static void mixcomwd_ping(void)
 {
-        outb_p(55,watchdog_port);
+        outb_p(55, watchdog_port);
         return;
 }
 
 static void mixcomwd_timerfun(unsigned long d)
 {
         mixcomwd_ping();
-
         mod_timer(&mixcomwd_timer, jiffies + 5 * HZ);
 }
 
@@ -129,22 +131,22 @@ static void mixcomwd_timerfun(unsigned long d)
 
 static int mixcomwd_open(struct inode *inode, struct file *file)
 {
-        if(test_and_set_bit(0,&mixcomwd_opened)) {
+        if (test_and_set_bit(0, &mixcomwd_opened))
                 return -EBUSY;
-        }
+
         mixcomwd_ping();
 
-        if (nowayout) {
+        if (nowayout)
                 /*
                  * fops_get() code via open() has already done
                  * a try_module_get() so it is safe to do the
                  * __module_get().
                  */
                 __module_get(THIS_MODULE);
-        } else {
-                if(mixcomwd_timer_alive) {
+        else {
+                if (mixcomwd_timer_alive) {
                         del_timer(&mixcomwd_timer);
-                        mixcomwd_timer_alive=0;
+                        mixcomwd_timer_alive = 0;
                 }
         }
         return nonseekable_open(inode, file);
@@ -153,26 +155,27 @@ static int mixcomwd_open(struct inode *inode, struct file *file)
 static int mixcomwd_release(struct inode *inode, struct file *file)
 {
         if (expect_close == 42) {
-                if(mixcomwd_timer_alive) {
-                        printk(KERN_ERR PFX "release called while internal timer alive");
+                if (mixcomwd_timer_alive) {
+                        printk(KERN_ERR PFX
+                                "release called while internal timer alive");
                         return -EBUSY;
                 }
-                mixcomwd_timer_alive=1;
+                mixcomwd_timer_alive = 1;
                 mod_timer(&mixcomwd_timer, jiffies + 5 * HZ);
-        } else {
-                printk(KERN_CRIT PFX "WDT device closed unexpectedly.  WDT will not stop!\n");
-        }
+        } else
+                printk(KERN_CRIT PFX
+                    "WDT device closed unexpectedly.  WDT will not stop!\n");
 
-        clear_bit(0,&mixcomwd_opened);
-        expect_close=0;
+        clear_bit(0, &mixcomwd_opened);
+        expect_close = 0;
         return 0;
 }
 
 
-static ssize_t mixcomwd_write(struct file *file, const char __user *data, size_t len, loff_t *ppos)
+static ssize_t mixcomwd_write(struct file *file, const char __user *data,
+                                                size_t len, loff_t *ppos)
 {
-        if(len)
-        {
+        if (len) {
                 if (!nowayout) {
                         size_t i;
 
@@ -192,8 +195,8 @@ static ssize_t mixcomwd_write(struct file *file, const char __user *data, size_t
         return len;
 }
 
-static int mixcomwd_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long mixcomwd_ioctl(struct file *file,
+                                unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
@@ -204,32 +207,23 @@ static int mixcomwd_ioctl(struct inode *inode, struct file *file,
                 .identity = "MixCOM watchdog",
         };
 
-        switch(cmd)
-        {
-                case WDIOC_GETSTATUS:
-                        status=mixcomwd_opened;
-                        if (!nowayout) {
-                                status|=mixcomwd_timer_alive;
-                        }
-                        if (copy_to_user(p, &status, sizeof(int))) {
-                                return -EFAULT;
-                        }
-                        break;
-                case WDIOC_GETBOOTSTATUS:
-                        if (copy_to_user(p, &status, sizeof(int))) {
-                                return -EFAULT;
-                        }
-                        break;
-                case WDIOC_GETSUPPORT:
-                        if (copy_to_user(argp, &ident, sizeof(ident))) {
-                                return -EFAULT;
-                        }
-                        break;
-                case WDIOC_KEEPALIVE:
-                        mixcomwd_ping();
-                        break;
-                default:
-                        return -ENOTTY;
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                if (copy_to_user(argp, &ident, sizeof(ident)))
+                        return -EFAULT;
+                break;
+        case WDIOC_GETSTATUS:
+                status = mixcomwd_opened;
+                if (!nowayout)
+                        status |= mixcomwd_timer_alive;
+                return put_user(status, p);
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_KEEPALIVE:
+                mixcomwd_ping();
+                break;
+        default:
+                return -ENOTTY;
         }
         return 0;
 }
@@ -238,7 +232,7 @@ static const struct file_operations mixcomwd_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = mixcomwd_write,
-        .ioctl          = mixcomwd_ioctl,
+        .unlocked_ioctl = mixcomwd_ioctl,
         .open           = mixcomwd_open,
         .release        = mixcomwd_release,
 };
@@ -253,15 +247,14 @@ static int __init checkcard(int port, int card_id)
 {
         int id;
 
-        if (!request_region(port, 1, "MixCOM watchdog")) {
+        if (!request_region(port, 1, "MixCOM watchdog"))
                 return 0;
-        }
 
-        id=inb_p(port);
-        if (card_id==MIXCOM_ID)
+        id = inb_p(port);
+        if (card_id == MIXCOM_ID)
                 id &= 0x3f;
 
-        if (id!=card_id) {
+        if (id != card_id) {
                 release_region(port, 1);
                 return 0;
         }
@@ -270,9 +263,7 @@ static int __init checkcard(int port, int card_id)
 
 static int __init mixcomwd_init(void)
 {
-        int i;
-        int ret;
-        int found=0;
+        int i, ret, found = 0;
 
         for (i = 0; !found && mixcomwd_io_info[i].ioport != 0; i++) {
                 if (checkcard(mixcomwd_io_info[i].ioport,
@@ -283,20 +274,22 @@ static int __init mixcomwd_init(void)
         }
 
         if (!found) {
-                printk(KERN_ERR PFX "No card detected, or port not available.\n");
+                printk(KERN_ERR PFX
+                        "No card detected, or port not available.\n");
                 return -ENODEV;
         }
 
         ret = misc_register(&mixcomwd_miscdev);
-        if (ret)
-        {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+        if (ret) {
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                        WATCHDOG_MINOR, ret);
                 goto error_misc_register_watchdog;
         }
 
-        printk(KERN_INFO "MixCOM watchdog driver v%s, watchdog port at 0x%3x\n",
-                VERSION, watchdog_port);
+        printk(KERN_INFO
+                "MixCOM watchdog driver v%s, watchdog port at 0x%3x\n",
+                                        VERSION, watchdog_port);
 
         return 0;
 
@@ -309,15 +302,15 @@ error_misc_register_watchdog:
 static void __exit mixcomwd_exit(void)
 {
         if (!nowayout) {
-                if(mixcomwd_timer_alive) {
+                if (mixcomwd_timer_alive) {
                         printk(KERN_WARNING PFX "I quit now, hardware will"
                                " probably reboot!\n");
                         del_timer_sync(&mixcomwd_timer);
-                        mixcomwd_timer_alive=0;
+                        mixcomwd_timer_alive = 0;
                 }
         }
         misc_deregister(&mixcomwd_miscdev);
-        release_region(watchdog_port,1);
+        release_region(watchdog_port, 1);
 }
 
 module_init(mixcomwd_init);
diff --git a/drivers/watchdog/mpc5200_wdt.c b/drivers/watchdog/mpc5200_wdt.c
index 77c1c2ae2cc2..db91892558f2 100644
--- a/drivers/watchdog/mpc5200_wdt.c
+++ b/drivers/watchdog/mpc5200_wdt.c
@@ -5,7 +5,7 @@
 #include <linux/io.h>
 #include <linux/spinlock.h>
 #include <linux/of_platform.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
 #include <asm/mpc52xx.h>
 
 
@@ -57,7 +57,8 @@ static int mpc5200_wdt_start(struct mpc5200_wdt *wdt)
         /* set timeout, with maximum prescaler */
         out_be32(&wdt->regs->count, 0x0 | wdt->count);
         /* enable watchdog */
-        out_be32(&wdt->regs->mode, GPT_MODE_CE | GPT_MODE_WDT | GPT_MODE_MS_TIMER);
+        out_be32(&wdt->regs->mode, GPT_MODE_CE | GPT_MODE_WDT |
+                                                GPT_MODE_MS_TIMER);
         spin_unlock(&wdt->io_lock);
 
         return 0;
@@ -66,7 +67,8 @@ static int mpc5200_wdt_ping(struct mpc5200_wdt *wdt)
 {
         spin_lock(&wdt->io_lock);
         /* writing A5 to OCPW resets the watchdog */
-        out_be32(&wdt->regs->mode, 0xA5000000 | (0xffffff & in_be32(&wdt->regs->mode)));
+        out_be32(&wdt->regs->mode, 0xA5000000 |
+                                (0xffffff & in_be32(&wdt->regs->mode)));
         spin_unlock(&wdt->io_lock);
         return 0;
 }
@@ -92,8 +94,8 @@ static struct watchdog_info mpc5200_wdt_info = {
         .options        = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
         .identity       = "mpc5200 watchdog on GPT0",
 };
-static int mpc5200_wdt_ioctl(struct inode *inode, struct file *file,
-                unsigned int cmd, unsigned long arg)
+static long mpc5200_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         struct mpc5200_wdt *wdt = file->private_data;
         int __user *data = (int __user *)arg;
@@ -103,7 +105,7 @@ static int mpc5200_wdt_ioctl(struct inode *inode, struct file *file,
         switch (cmd) {
         case WDIOC_GETSUPPORT:
                 ret = copy_to_user(data, &mpc5200_wdt_info,
-                        sizeof(mpc5200_wdt_info));
+                                                sizeof(mpc5200_wdt_info));
                 if (ret)
                         ret = -EFAULT;
                 break;
@@ -135,6 +137,7 @@ static int mpc5200_wdt_ioctl(struct inode *inode, struct file *file,
         }
         return ret;
 }
+
 static int mpc5200_wdt_open(struct inode *inode, struct file *file)
 {
         /* /dev/watchdog can only be opened once */
@@ -161,13 +164,14 @@ static int mpc5200_wdt_release(struct inode *inode, struct file *file)
 static const struct file_operations mpc5200_wdt_fops = {
         .owner  = THIS_MODULE,
         .write  = mpc5200_wdt_write,
-        .ioctl  = mpc5200_wdt_ioctl,
+        .unlocked_ioctl = mpc5200_wdt_ioctl,
         .open   = mpc5200_wdt_open,
         .release = mpc5200_wdt_release,
 };
 
 /* module operations */
-static int mpc5200_wdt_probe(struct of_device *op, const struct of_device_id *match)
+static int mpc5200_wdt_probe(struct of_device *op,
+                                        const struct of_device_id *match)
 {
         struct mpc5200_wdt *wdt;
         int err;
@@ -215,9 +219,9 @@ static int mpc5200_wdt_probe(struct of_device *op, const struct of_device_id *ma
                 return 0;
 
         iounmap(wdt->regs);
- out_release:
+out_release:
         release_mem_region(wdt->mem.start, size);
- out_free:
+out_free:
         kfree(wdt);
         return err;
 }
diff --git a/drivers/watchdog/mpc83xx_wdt.c b/drivers/watchdog/mpc83xx_wdt.c
deleted file mode 100644
index b16c5cd972eb..000000000000
--- a/drivers/watchdog/mpc83xx_wdt.c
+++ /dev/null
@@ -1,230 +0,0 @@
-/*
- * mpc83xx_wdt.c - MPC83xx watchdog userspace interface
- *
- * Authors: Dave Updegraff <dave@cray.org>
- *          Kumar Gala <galak@kernel.crashing.org>
- *              Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
- *                              ..and from sc520_wdt
- *
- * Note: it appears that you can only actually ENABLE or DISABLE the thing
- * once after POR. Once enabled, you cannot disable, and vice versa.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/fs.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/miscdevice.h>
-#include <linux/platform_device.h>
-#include <linux/module.h>
-#include <linux/watchdog.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-
-struct mpc83xx_wdt {
-        __be32 res0;
-        __be32 swcrr; /* System watchdog control register */
-#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
-#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
-#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
-#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
-        __be32 swcnr; /* System watchdog count register */
-        u8 res1[2];
-        __be16 swsrr; /* System watchdog service register */
-        u8 res2[0xF0];
-};
-
-static struct mpc83xx_wdt __iomem *wd_base;
-
-static u16 timeout = 0xffff;
-module_param(timeout, ushort, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in ticks. (0<timeout<65536, default=65535");
-
-static int reset = 1;
-module_param(reset, bool, 0);
-MODULE_PARM_DESC(reset, "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
-
-/*
- * We always prescale, but if someone really doesn't want to they can set this
- * to 0
- */
-static int prescale = 1;
-static unsigned int timeout_sec;
-
-static unsigned long wdt_is_open;
-static DEFINE_SPINLOCK(wdt_spinlock);
-
-static void mpc83xx_wdt_keepalive(void)
-{
-        /* Ping the WDT */
-        spin_lock(&wdt_spinlock);
-        out_be16(&wd_base->swsrr, 0x556c);
-        out_be16(&wd_base->swsrr, 0xaa39);
-        spin_unlock(&wdt_spinlock);
-}
-
-static ssize_t mpc83xx_wdt_write(struct file *file, const char __user *buf,
-                                 size_t count, loff_t *ppos)
-{
-        if (count)
-                mpc83xx_wdt_keepalive();
-        return count;
-}
-
-static int mpc83xx_wdt_open(struct inode *inode, struct file *file)
-{
-        u32 tmp = SWCRR_SWEN;
-        if (test_and_set_bit(0, &wdt_is_open))
-                return -EBUSY;
-
-        /* Once we start the watchdog we can't stop it */
-        __module_get(THIS_MODULE);
-
-        /* Good, fire up the show */
-        if (prescale)
-                tmp |= SWCRR_SWPR;
-        if (reset)
-                tmp |= SWCRR_SWRI;
-
-        tmp |= timeout << 16;
-
-        out_be32(&wd_base->swcrr, tmp);
-
-        return nonseekable_open(inode, file);
-}
-
-static int mpc83xx_wdt_release(struct inode *inode, struct file *file)
-{
-        printk(KERN_CRIT "Unexpected close, not stopping watchdog!\n");
-        mpc83xx_wdt_keepalive();
-        clear_bit(0, &wdt_is_open);
-        return 0;
-}
-
-static int mpc83xx_wdt_ioctl(struct inode *inode, struct file *file,
-                                unsigned int cmd, unsigned long arg)
-{
-        void __user *argp = (void __user *)arg;
-        int __user *p = argp;
-        static struct watchdog_info ident = {
-                .options = WDIOF_KEEPALIVEPING,
-                .firmware_version = 1,
-                .identity = "MPC83xx",
-        };
-
-        switch (cmd) {
-        case WDIOC_GETSUPPORT:
-                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
-        case WDIOC_GETSTATUS:
-        case WDIOC_GETBOOTSTATUS:
-                return put_user(0, p);
-        case WDIOC_KEEPALIVE:
-                mpc83xx_wdt_keepalive();
-                return 0;
-        case WDIOC_GETTIMEOUT:
-                return put_user(timeout_sec, p);
-        default:
-                return -ENOTTY;
-        }
-}
-
-static const struct file_operations mpc83xx_wdt_fops = {
-        .owner          = THIS_MODULE,
-        .llseek         = no_llseek,
-        .write          = mpc83xx_wdt_write,
-        .ioctl          = mpc83xx_wdt_ioctl,
-        .open           = mpc83xx_wdt_open,
-        .release        = mpc83xx_wdt_release,
-};
-
-static struct miscdevice mpc83xx_wdt_miscdev = {
-        .minor  = WATCHDOG_MINOR,
-        .name   = "watchdog",
-        .fops   = &mpc83xx_wdt_fops,
-};
-
-static int __devinit mpc83xx_wdt_probe(struct platform_device *dev)
-{
-        struct resource *r;
-        int ret;
-        unsigned int *freq = dev->dev.platform_data;
-
-        /* get a pointer to the register memory */
-        r = platform_get_resource(dev, IORESOURCE_MEM, 0);
-
-        if (!r) {
-                ret = -ENODEV;
-                goto err_out;
-        }
-
-        wd_base = ioremap(r->start, sizeof (struct mpc83xx_wdt));
-
-        if (wd_base == NULL) {
-                ret = -ENOMEM;
-                goto err_out;
-        }
-
-        ret = misc_register(&mpc83xx_wdt_miscdev);
-        if (ret) {
-                printk(KERN_ERR "cannot register miscdev on minor=%d "
-                                "(err=%d)\n",
-                                WATCHDOG_MINOR, ret);
-                goto err_unmap;
-        }
-
-        /* Calculate the timeout in seconds */
-        if (prescale)
-                timeout_sec = (timeout * 0x10000) / (*freq);
-        else
-                timeout_sec = timeout / (*freq);
-
-        printk(KERN_INFO "WDT driver for MPC83xx initialized. "
-                "mode:%s timeout=%d (%d seconds)\n",
-                reset ? "reset":"interrupt", timeout, timeout_sec);
-        return 0;
-
-err_unmap:
-        iounmap(wd_base);
-err_out:
-        return ret;
-}
-
-static int __devexit mpc83xx_wdt_remove(struct platform_device *dev)
-{
-        misc_deregister(&mpc83xx_wdt_miscdev);
-        iounmap(wd_base);
-
-        return 0;
-}
-
-static struct platform_driver mpc83xx_wdt_driver = {
-        .probe          = mpc83xx_wdt_probe,
-        .remove         = __devexit_p(mpc83xx_wdt_remove),
-        .driver         = {
-                .name   = "mpc83xx_wdt",
-                .owner  = THIS_MODULE,
-        },
-};
-
-static int __init mpc83xx_wdt_init(void)
-{
-        return platform_driver_register(&mpc83xx_wdt_driver);
-}
-
-static void __exit mpc83xx_wdt_exit(void)
-{
-        platform_driver_unregister(&mpc83xx_wdt_driver);
-}
-
-module_init(mpc83xx_wdt_init);
-module_exit(mpc83xx_wdt_exit);
-
-MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
-MODULE_DESCRIPTION("Driver for watchdog timer in MPC83xx uProcessor");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
-MODULE_ALIAS("platform:mpc83xx_wdt");
diff --git a/drivers/watchdog/mpc8xx_wdt.c b/drivers/watchdog/mpc8xx_wdt.c
index 85b5734403a5..1336425acf20 100644
--- a/drivers/watchdog/mpc8xx_wdt.c
+++ b/drivers/watchdog/mpc8xx_wdt.c
@@ -16,36 +16,35 @@
 #include <linux/module.h>
 #include <linux/watchdog.h>
 #include <asm/8xx_immap.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
 #include <syslib/m8xx_wdt.h>
 
 static unsigned long wdt_opened;
 static int wdt_status;
+static spinlock_t wdt_lock;
 
 static void mpc8xx_wdt_handler_disable(void)
 {
         volatile uint __iomem *piscr;
-        piscr = (uint *)&((immap_t*)IMAP_ADDR)->im_sit.sit_piscr;
+        piscr = (uint *)&((immap_t *)IMAP_ADDR)->im_sit.sit_piscr;
 
         if (!m8xx_has_internal_rtc)
                 m8xx_wdt_stop_timer();
         else
                 out_be32(piscr, in_be32(piscr) & ~(PISCR_PIE | PISCR_PTE));
-
         printk(KERN_NOTICE "mpc8xx_wdt: keep-alive handler deactivated\n");
 }
 
 static void mpc8xx_wdt_handler_enable(void)
 {
         volatile uint __iomem *piscr;
-        piscr = (uint *)&((immap_t*)IMAP_ADDR)->im_sit.sit_piscr;
+        piscr = (uint *)&((immap_t *)IMAP_ADDR)->im_sit.sit_piscr;
 
         if (!m8xx_has_internal_rtc)
                 m8xx_wdt_install_timer();
         else
                 out_be32(piscr, in_be32(piscr) | PISCR_PIE | PISCR_PTE);
-
         printk(KERN_NOTICE "mpc8xx_wdt: keep-alive handler activated\n");
 }
 
@@ -53,37 +52,34 @@ static int mpc8xx_wdt_open(struct inode *inode, struct file *file)
 {
         if (test_and_set_bit(0, &wdt_opened))
                 return -EBUSY;
-
         m8xx_wdt_reset();
         mpc8xx_wdt_handler_disable();
-
         return nonseekable_open(inode, file);
 }
 
 static int mpc8xx_wdt_release(struct inode *inode, struct file *file)
 {
         m8xx_wdt_reset();
-
 #if !defined(CONFIG_WATCHDOG_NOWAYOUT)
         mpc8xx_wdt_handler_enable();
 #endif
-
         clear_bit(0, &wdt_opened);
-
         return 0;
 }
 
-static ssize_t mpc8xx_wdt_write(struct file *file, const char *data, size_t len,
-                                loff_t * ppos)
+static ssize_t mpc8xx_wdt_write(struct file *file, const char *data,
+                                                size_t len, loff_t *ppos)
 {
-        if (len)
+        if (len) {
+                spin_lock(&wdt_lock);
                 m8xx_wdt_reset();
-
+                spin_unlock(&wdt_lock);
+        }
         return len;
 }
 
-static int mpc8xx_wdt_ioctl(struct inode *inode, struct file *file,
-                            unsigned int cmd, unsigned long arg)
+static long mpc8xx_wdt_ioctl(struct file *file,
+                                        unsigned int cmd, unsigned long arg)
 {
         int timeout;
         static struct watchdog_info info = {
@@ -112,15 +108,19 @@ static int mpc8xx_wdt_ioctl(struct inode *inode, struct file *file,
                 return -EOPNOTSUPP;
 
         case WDIOC_KEEPALIVE:
+                spin_lock(&wdt_lock);
                 m8xx_wdt_reset();
                 wdt_status |= WDIOF_KEEPALIVEPING;
+                spin_unlock(&wdt_lock);
                 break;
 
         case WDIOC_SETTIMEOUT:
                 return -EOPNOTSUPP;
 
         case WDIOC_GETTIMEOUT:
+                spin_lock(&wdt_lock);
                 timeout = m8xx_wdt_get_timeout();
+                spin_unlock(&wdt_lock);
                 if (put_user(timeout, (int *)arg))
                         return -EFAULT;
                 break;
@@ -136,7 +136,7 @@ static const struct file_operations mpc8xx_wdt_fops = {
         .owner = THIS_MODULE,
         .llseek = no_llseek,
         .write = mpc8xx_wdt_write,
-        .ioctl = mpc8xx_wdt_ioctl,
+        .unlocked_ioctl = mpc8xx_wdt_ioctl,
         .open = mpc8xx_wdt_open,
         .release = mpc8xx_wdt_release,
 };
@@ -149,6 +149,7 @@ static struct miscdevice mpc8xx_wdt_miscdev = {
 
 static int __init mpc8xx_wdt_init(void)
 {
+        spin_lock_init(&wdt_lock);
         return misc_register(&mpc8xx_wdt_miscdev);
 }
 
diff --git a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
new file mode 100644
index 000000000000..f2094960e662
--- /dev/null
+++ b/drivers/watchdog/mpc8xxx_wdt.c
@@ -0,0 +1,316 @@
+/*
+ * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
+ *
+ * Authors: Dave Updegraff <dave@cray.org>
+ *          Kumar Gala <galak@kernel.crashing.org>
+ *              Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
+ *                              ..and from sc520_wdt
+ * Copyright (c) 2008  MontaVista Software, Inc.
+ *                     Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * Note: it appears that you can only actually ENABLE or DISABLE the thing
+ * once after POR. Once enabled, you cannot disable, and vice versa.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/timer.h>
+#include <linux/miscdevice.h>
+#include <linux/of_platform.h>
+#include <linux/module.h>
+#include <linux/watchdog.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <sysdev/fsl_soc.h>
+
+struct mpc8xxx_wdt {
+        __be32 res0;
+        __be32 swcrr; /* System watchdog control register */
+#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
+#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
+#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
+#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
+        __be32 swcnr; /* System watchdog count register */
+        u8 res1[2];
+        __be16 swsrr; /* System watchdog service register */
+        u8 res2[0xF0];
+};
+
+struct mpc8xxx_wdt_type {
+        int prescaler;
+        bool hw_enabled;
+};
+
+static struct mpc8xxx_wdt __iomem *wd_base;
+
+static u16 timeout = 0xffff;
+module_param(timeout, ushort, 0);
+MODULE_PARM_DESC(timeout,
+        "Watchdog timeout in ticks. (0<timeout<65536, default=65535");
+
+static int reset = 1;
+module_param(reset, bool, 0);
+MODULE_PARM_DESC(reset,
+        "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
+
+static int nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, int, 0);
+MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
+                 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+
+/*
+ * We always prescale, but if someone really doesn't want to they can set this
+ * to 0
+ */
+static int prescale = 1;
+static unsigned int timeout_sec;
+
+static unsigned long wdt_is_open;
+static DEFINE_SPINLOCK(wdt_spinlock);
+
+static void mpc8xxx_wdt_keepalive(void)
+{
+        /* Ping the WDT */
+        spin_lock(&wdt_spinlock);
+        out_be16(&wd_base->swsrr, 0x556c);
+        out_be16(&wd_base->swsrr, 0xaa39);
+        spin_unlock(&wdt_spinlock);
+}
+
+static void mpc8xxx_wdt_timer_ping(unsigned long arg);
+static DEFINE_TIMER(wdt_timer, mpc8xxx_wdt_timer_ping, 0, 0);
+
+static void mpc8xxx_wdt_timer_ping(unsigned long arg)
+{
+        mpc8xxx_wdt_keepalive();
+        /* We're pinging it twice faster than needed, just to be sure. */
+        mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
+}
+
+static void mpc8xxx_wdt_pr_warn(const char *msg)
+{
+        pr_crit("mpc8xxx_wdt: %s, expect the %s soon!\n", msg,
+                reset ? "reset" : "machine check exception");
+}
+
+static ssize_t mpc8xxx_wdt_write(struct file *file, const char __user *buf,
+                                 size_t count, loff_t *ppos)
+{
+        if (count)
+                mpc8xxx_wdt_keepalive();
+        return count;
+}
+
+static int mpc8xxx_wdt_open(struct inode *inode, struct file *file)
+{
+        u32 tmp = SWCRR_SWEN;
+        if (test_and_set_bit(0, &wdt_is_open))
+                return -EBUSY;
+
+        /* Once we start the watchdog we can't stop it */
+        if (nowayout)
+                __module_get(THIS_MODULE);
+
+        /* Good, fire up the show */
+        if (prescale)
+                tmp |= SWCRR_SWPR;
+        if (reset)
+                tmp |= SWCRR_SWRI;
+
+        tmp |= timeout << 16;
+
+        out_be32(&wd_base->swcrr, tmp);
+
+        del_timer_sync(&wdt_timer);
+
+        return nonseekable_open(inode, file);
+}
+
+static int mpc8xxx_wdt_release(struct inode *inode, struct file *file)
+{
+        if (!nowayout)
+                mpc8xxx_wdt_timer_ping(0);
+        else
+                mpc8xxx_wdt_pr_warn("watchdog closed");
+        clear_bit(0, &wdt_is_open);
+        return 0;
+}
+
+static long mpc8xxx_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
+{
+        void __user *argp = (void __user *)arg;
+        int __user *p = argp;
+        static struct watchdog_info ident = {
+                .options = WDIOF_KEEPALIVEPING,
+                .firmware_version = 1,
+                .identity = "MPC8xxx",
+        };
+
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_KEEPALIVE:
+                mpc8xxx_wdt_keepalive();
+                return 0;
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout_sec, p);
+        default:
+                return -ENOTTY;
+        }
+}
+
+static const struct file_operations mpc8xxx_wdt_fops = {
+        .owner          = THIS_MODULE,
+        .llseek         = no_llseek,
+        .write          = mpc8xxx_wdt_write,
+        .unlocked_ioctl = mpc8xxx_wdt_ioctl,
+        .open           = mpc8xxx_wdt_open,
+        .release        = mpc8xxx_wdt_release,
+};
+
+static struct miscdevice mpc8xxx_wdt_miscdev = {
+        .minor  = WATCHDOG_MINOR,
+        .name   = "watchdog",
+        .fops   = &mpc8xxx_wdt_fops,
+};
+
+static int __devinit mpc8xxx_wdt_probe(struct of_device *ofdev,
+                                       const struct of_device_id *match)
+{
+        int ret;
+        struct device_node *np = ofdev->node;
+        struct mpc8xxx_wdt_type *wdt_type = match->data;
+        u32 freq = fsl_get_sys_freq();
+        bool enabled;
+
+        if (!freq || freq == -1)
+                return -EINVAL;
+
+        wd_base = of_iomap(np, 0);
+        if (!wd_base)
+                return -ENOMEM;
+
+        enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN;
+        if (!enabled && wdt_type->hw_enabled) {
+                pr_info("mpc8xxx_wdt: could not be enabled in software\n");
+                ret = -ENOSYS;
+                goto err_unmap;
+        }
+
+        /* Calculate the timeout in seconds */
+        if (prescale)
+                timeout_sec = (timeout * wdt_type->prescaler) / freq;
+        else
+                timeout_sec = timeout / freq;
+
+        pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d "
+                "(%d seconds)\n", reset ? "reset" : "interrupt", timeout,
+                timeout_sec);
+
+        /*
+         * If the watchdog was previously enabled or we're running on
+         * MPC8xxx, we should ping the wdt from the kernel until the
+         * userspace handles it.
+         */
+        if (enabled)
+                mpc8xxx_wdt_timer_ping(0);
+        return 0;
+err_unmap:
+        iounmap(wd_base);
+        wd_base = NULL;
+        return ret;
+}
+
+static int __devexit mpc8xxx_wdt_remove(struct of_device *ofdev)
+{
+        mpc8xxx_wdt_pr_warn("watchdog removed");
+        del_timer_sync(&wdt_timer);
+        misc_deregister(&mpc8xxx_wdt_miscdev);
+        iounmap(wd_base);
+
+        return 0;
+}
+
+static const struct of_device_id mpc8xxx_wdt_match[] = {
+        {
+                .compatible = "mpc83xx_wdt",
+                .data = &(struct mpc8xxx_wdt_type) {
+                        .prescaler = 0x10000,
+                },
+        },
+        {
+                .compatible = "fsl,mpc8610-wdt",
+                .data = &(struct mpc8xxx_wdt_type) {
+                        .prescaler = 0x10000,
+                        .hw_enabled = true,
+                },
+        },
+        {
+                .compatible = "fsl,mpc823-wdt",
+                .data = &(struct mpc8xxx_wdt_type) {
+                        .prescaler = 0x800,
+                },
+        },
+        {},
+};
+MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);
+
+static struct of_platform_driver mpc8xxx_wdt_driver = {
+        .match_table    = mpc8xxx_wdt_match,
+        .probe          = mpc8xxx_wdt_probe,
+        .remove         = __devexit_p(mpc8xxx_wdt_remove),
+        .driver         = {
+                .name   = "mpc8xxx_wdt",
+                .owner  = THIS_MODULE,
+        },
+};
+
+/*
+ * We do wdt initialization in two steps: arch_initcall probes the wdt
+ * very early to start pinging the watchdog (misc devices are not yet
+ * available), and later module_init() just registers the misc device.
+ */
+static int __init mpc8xxx_wdt_init_late(void)
+{
+        int ret;
+
+        if (!wd_base)
+                return -ENODEV;
+
+        ret = misc_register(&mpc8xxx_wdt_miscdev);
+        if (ret) {
+                pr_err("cannot register miscdev on minor=%d (err=%d)\n",
+                        WATCHDOG_MINOR, ret);
+                return ret;
+        }
+        return 0;
+}
+module_init(mpc8xxx_wdt_init_late);
+
+static int __init mpc8xxx_wdt_init(void)
+{
+        return of_register_platform_driver(&mpc8xxx_wdt_driver);
+}
+arch_initcall(mpc8xxx_wdt_init);
+
+static void __exit mpc8xxx_wdt_exit(void)
+{
+        of_unregister_platform_driver(&mpc8xxx_wdt_driver);
+}
+module_exit(mpc8xxx_wdt_exit);
+
+MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
+MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
+                   "uProcessors");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
diff --git a/drivers/watchdog/mpcore_wdt.c b/drivers/watchdog/mpcore_wdt.c
index 009573b81496..2a9bfa81f9d6 100644
--- a/drivers/watchdog/mpcore_wdt.c
+++ b/drivers/watchdog/mpcore_wdt.c
@@ -29,9 +29,9 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/uaccess.h>
 
 #include <asm/hardware/arm_twd.h>
-#include <asm/uaccess.h>
 
 struct mpcore_wdt {
         unsigned long   timer_alive;
@@ -43,17 +43,20 @@ struct mpcore_wdt {
 };
 
 static struct platform_device *mpcore_wdt_dev;
-
 extern unsigned int mpcore_timer_rate;
 
 #define TIMER_MARGIN    60
 static int mpcore_margin = TIMER_MARGIN;
 module_param(mpcore_margin, int, 0);
-MODULE_PARM_DESC(mpcore_margin, "MPcore timer margin in seconds. (0<mpcore_margin<65536, default=" __MODULE_STRING(TIMER_MARGIN) ")");
+MODULE_PARM_DESC(mpcore_margin,
+        "MPcore timer margin in seconds. (0 < mpcore_margin < 65536, default="
+                                __MODULE_STRING(TIMER_MARGIN) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 #define ONLY_TESTING    0
 static int mpcore_noboot = ONLY_TESTING;
@@ -70,14 +73,12 @@ static irqreturn_t mpcore_wdt_fire(int irq, void *arg)
 
         /* Check it really was our interrupt */
         if (readl(wdt->base + TWD_WDOG_INTSTAT)) {
-                dev_printk(KERN_CRIT, wdt->dev, "Triggered - Reboot ignored.\n");
-
+                dev_printk(KERN_CRIT, wdt->dev,
+                                        "Triggered - Reboot ignored.\n");
                 /* Clear the interrupt on the watchdog */
                 writel(1, wdt->base + TWD_WDOG_INTSTAT);
-
                 return IRQ_HANDLED;
         }
-
         return IRQ_NONE;
 }
 
@@ -96,22 +97,26 @@ static void mpcore_wdt_keepalive(struct mpcore_wdt *wdt)
         count = (mpcore_timer_rate / 256) * mpcore_margin;
 
         /* Reload the counter */
+        spin_lock(&wdt_lock);
         writel(count + wdt->perturb, wdt->base + TWD_WDOG_LOAD);
-
         wdt->perturb = wdt->perturb ? 0 : 1;
+        spin_unlock(&wdt_lock);
 }
 
 static void mpcore_wdt_stop(struct mpcore_wdt *wdt)
 {
+        spin_lock(&wdt_lock);
         writel(0x12345678, wdt->base + TWD_WDOG_DISABLE);
         writel(0x87654321, wdt->base + TWD_WDOG_DISABLE);
         writel(0x0, wdt->base + TWD_WDOG_CONTROL);
+        spin_unlock(&wdt_lock);
 }
 
 static void mpcore_wdt_start(struct mpcore_wdt *wdt)
 {
         dev_printk(KERN_INFO, wdt->dev, "enabling watchdog.\n");
 
+        spin_lock(&wdt_lock);
         /* This loads the count register but does NOT start the count yet */
         mpcore_wdt_keepalive(wdt);
 
@@ -122,6 +127,7 @@ static void mpcore_wdt_start(struct mpcore_wdt *wdt)
                 /* Enable watchdog - prescale=256, watchdog mode=1, enable=1 */
                 writel(0x0000FF09, wdt->base + TWD_WDOG_CONTROL);
         }
+        spin_unlock(&wdt_lock);
 }
 
 static int mpcore_wdt_set_heartbeat(int t)
@@ -164,10 +170,11 @@ static int mpcore_wdt_release(struct inode *inode, struct file *file)
          *      Shut off the timer.
          *      Lock it in if it's a module and we set nowayout
          */
-        if (wdt->expect_close == 42) {
+        if (wdt->expect_close == 42)
                 mpcore_wdt_stop(wdt);
-        } else {
-                dev_printk(KERN_CRIT, wdt->dev, "unexpected close, not stopping watchdog!\n");
+        else {
+                dev_printk(KERN_CRIT, wdt->dev,
+                                "unexpected close, not stopping watchdog!\n");
                 mpcore_wdt_keepalive(wdt);
         }
         clear_bit(0, &wdt->timer_alive);
@@ -175,7 +182,8 @@ static int mpcore_wdt_release(struct inode *inode, struct file *file)
         return 0;
 }
 
-static ssize_t mpcore_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
+static ssize_t mpcore_wdt_write(struct file *file, const char *data,
+                                                size_t len, loff_t *ppos)
 {
         struct mpcore_wdt *wdt = file->private_data;
 
@@ -210,8 +218,8 @@ static struct watchdog_info ident = {
         .identity               = "MPcore Watchdog",
 };
 
-static int mpcore_wdt_ioctl(struct inode *inode, struct file *file,
-                             unsigned int cmd, unsigned long arg)
+static long mpcore_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         struct mpcore_wdt *wdt = file->private_data;
         int ret;
@@ -235,6 +243,12 @@ static int mpcore_wdt_ioctl(struct inode *inode, struct file *file,
                 ret = 0;
                 break;
 
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                uarg.i = 0;
+                ret = 0;
+                break;
+
         case WDIOC_SETOPTIONS:
                 ret = -EINVAL;
                 if (uarg.i & WDIOS_DISABLECARD) {
@@ -247,12 +261,6 @@ static int mpcore_wdt_ioctl(struct inode *inode, struct file *file,
                 }
                 break;
 
-        case WDIOC_GETSTATUS:
-        case WDIOC_GETBOOTSTATUS:
-                uarg.i = 0;
-                ret = 0;
-                break;
-
         case WDIOC_KEEPALIVE:
                 mpcore_wdt_keepalive(wdt);
                 ret = 0;
@@ -301,7 +309,7 @@ static const struct file_operations mpcore_wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = mpcore_wdt_write,
-        .ioctl          = mpcore_wdt_ioctl,
+        .unlocked_ioctl = mpcore_wdt_ioctl,
         .open           = mpcore_wdt_open,
         .release        = mpcore_wdt_release,
 };
@@ -349,14 +357,17 @@ static int __devinit mpcore_wdt_probe(struct platform_device *dev)
         mpcore_wdt_miscdev.parent = &dev->dev;
         ret = misc_register(&mpcore_wdt_miscdev);
         if (ret) {
-                dev_printk(KERN_ERR, _dev, "cannot register miscdev on minor=%d (err=%d)\n",
-                           WATCHDOG_MINOR, ret);
+                dev_printk(KERN_ERR, _dev,
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        WATCHDOG_MINOR, ret);
                 goto err_misc;
         }
 
-        ret = request_irq(wdt->irq, mpcore_wdt_fire, IRQF_DISABLED, "mpcore_wdt", wdt);
+        ret = request_irq(wdt->irq, mpcore_wdt_fire, IRQF_DISABLED,
+                                                        "mpcore_wdt", wdt);
         if (ret) {
-                dev_printk(KERN_ERR, _dev, "cannot register IRQ%d for watchdog\n", wdt->irq);
+                dev_printk(KERN_ERR, _dev,
+                        "cannot register IRQ%d for watchdog\n", wdt->irq);
                 goto err_irq;
         }
 
@@ -366,13 +377,13 @@ static int __devinit mpcore_wdt_probe(struct platform_device *dev)
 
         return 0;
 
- err_irq:
+err_irq:
         misc_deregister(&mpcore_wdt_miscdev);
- err_misc:
+err_misc:
         iounmap(wdt->base);
- err_free:
+err_free:
         kfree(wdt);
- err_out:
+err_out:
         return ret;
 }
 
@@ -415,7 +426,7 @@ static int __init mpcore_wdt_init(void)
          */
         if (mpcore_wdt_set_heartbeat(mpcore_margin)) {
                 mpcore_wdt_set_heartbeat(TIMER_MARGIN);
-                printk(KERN_INFO "mpcore_margin value must be 0<mpcore_margin<65536, using %d\n",
+                printk(KERN_INFO "mpcore_margin value must be 0 < mpcore_margin < 65536, using %d\n",
                         TIMER_MARGIN);
         }
 
diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c
index a8e67383784e..b4b7b0a4c119 100644
--- a/drivers/watchdog/mtx-1_wdt.c
+++ b/drivers/watchdog/mtx-1_wdt.c
@@ -1,7 +1,8 @@
 /*
  *      Driver for the MTX-1 Watchdog.
  *
- *      (C) Copyright 2005 4G Systems <info@4g-systems.biz>, All Rights Reserved.
+ *      (C) Copyright 2005 4G Systems <info@4g-systems.biz>,
+ *                                                      All Rights Reserved.
  *                              http://www.4g-systems.biz
  *
  *      (C) Copyright 2007 OpenWrt.org, Florian Fainelli <florian@openwrt.org>
@@ -46,12 +47,11 @@
 #include <linux/jiffies.h>
 #include <linux/watchdog.h>
 #include <linux/platform_device.h>
-
-#include <asm/io.h>
-#include <asm/uaccess.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/gpio.h>
 
 #include <asm/mach-au1x00/au1000.h>
-#include <asm/gpio.h>
 
 #define MTX1_WDT_INTERVAL       (5 * HZ)
 
@@ -59,6 +59,7 @@ static int ticks = 100 * HZ;
 
 static struct {
         struct completion stop;
+        spinlock_t lock;
         int running;
         struct timer_list timer;
         int queue;
@@ -71,6 +72,7 @@ static void mtx1_wdt_trigger(unsigned long unused)
 {
         u32 tmp;
 
+        spin_lock(&mtx1_wdt_device.lock);
         if (mtx1_wdt_device.running)
                 ticks--;
         /*
@@ -79,13 +81,13 @@ static void mtx1_wdt_trigger(unsigned long unused)
         tmp = au_readl(GPIO2_DIR);
         tmp = (tmp & ~(1 << mtx1_wdt_device.gpio)) |
               ((~tmp) & (1 << mtx1_wdt_device.gpio));
-        au_writel (tmp, GPIO2_DIR);
+        au_writel(tmp, GPIO2_DIR);
 
         if (mtx1_wdt_device.queue && ticks)
                 mod_timer(&mtx1_wdt_device.timer, jiffies + MTX1_WDT_INTERVAL);
-        else {
+        else
                 complete(&mtx1_wdt_device.stop);
-        }
+        spin_unlock(&mtx1_wdt_device.lock);
 }
 
 static void mtx1_wdt_reset(void)
@@ -96,23 +98,25 @@ static void mtx1_wdt_reset(void)
 
 static void mtx1_wdt_start(void)
 {
+        spin_lock_irqsave(&mtx1_wdt_device.lock, flags);
         if (!mtx1_wdt_device.queue) {
                 mtx1_wdt_device.queue = 1;
                 gpio_set_value(mtx1_wdt_device.gpio, 1);
                 mod_timer(&mtx1_wdt_device.timer, jiffies + MTX1_WDT_INTERVAL);
         }
         mtx1_wdt_device.running++;
+        spin_unlock_irqrestore(&mtx1_wdt_device.lock, flags);
 }
 
 static int mtx1_wdt_stop(void)
 {
+        spin_lock_irqsave(&mtx1_wdt_device.lock, flags);
         if (mtx1_wdt_device.queue) {
                 mtx1_wdt_device.queue = 0;
                 gpio_set_value(mtx1_wdt_device.gpio, 0);
         }
-
         ticks = mtx1_wdt_device.default_ticks;
-
+        spin_unlock_irqrestore(&mtx1_wdt_device.lock, flags);
         return 0;
 }
 
@@ -122,7 +126,6 @@ static int mtx1_wdt_open(struct inode *inode, struct file *file)
 {
         if (test_and_set_bit(0, &mtx1_wdt_device.inuse))
                 return -EBUSY;
-
         return nonseekable_open(inode, file);
 }
 
@@ -133,54 +136,51 @@ static int mtx1_wdt_release(struct inode *inode, struct file *file)
         return 0;
 }
 
-static int mtx1_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
+static long mtx1_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
+        int __user *p = (int __user *)argp;
         unsigned int value;
-        static struct watchdog_info ident =
-        {
+        static const struct watchdog_info ident = {
                 .options = WDIOF_CARDRESET,
                 .identity = "MTX-1 WDT",
         };
 
-        switch(cmd) {
-                case WDIOC_KEEPALIVE:
-                        mtx1_wdt_reset();
-                        break;
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        if ( copy_to_user(argp, &value, sizeof(int)) )
-                                return -EFAULT;
-                        break;
-                case WDIOC_GETSUPPORT:
-                        if ( copy_to_user(argp, &ident, sizeof(ident)) )
-                                return -EFAULT;
-                        break;
-                case WDIOC_SETOPTIONS:
-                        if ( copy_from_user(&value, argp, sizeof(int)) )
-                                return -EFAULT;
-                        switch(value) {
-                                case WDIOS_ENABLECARD:
-                                        mtx1_wdt_start();
-                                        break;
-                                case WDIOS_DISABLECARD:
-                                        return mtx1_wdt_stop();
-                                default:
-                                        return -EINVAL;
-                        }
-                        break;
-                default:
-                        return -ENOTTY;
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                if (copy_to_user(argp, &ident, sizeof(ident)))
+                        return -EFAULT;
+                break;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                put_user(0, p);
+                break;
+        case WDIOC_SETOPTIONS:
+                if (get_user(value, p))
+                        return -EFAULT;
+                if (value & WDIOS_ENABLECARD)
+                        mtx1_wdt_start();
+                else if (value & WDIOS_DISABLECARD)
+                        mtx1_wdt_stop();
+                else
+                        return -EINVAL;
+                return 0;
+        case WDIOC_KEEPALIVE:
+                mtx1_wdt_reset();
+                break;
+        default:
+                return -ENOTTY;
         }
         return 0;
 }
 
 
-static ssize_t mtx1_wdt_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
+static ssize_t mtx1_wdt_write(struct file *file, const char *buf,
+                                                size_t count, loff_t *ppos)
 {
         if (!count)
                 return -EIO;
-
         mtx1_wdt_reset();
         return count;
 }
@@ -188,17 +188,17 @@ static ssize_t mtx1_wdt_write(struct file *file, const char *buf, size_t count,
 static const struct file_operations mtx1_wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
-        .ioctl          = mtx1_wdt_ioctl,
+        .unlocked_ioctl = mtx1_wdt_ioctl,
         .open           = mtx1_wdt_open,
         .write          = mtx1_wdt_write,
-        .release        = mtx1_wdt_release
+        .release        = mtx1_wdt_release,
 };
 
 
 static struct miscdevice mtx1_wdt_misc = {
         .minor  = WATCHDOG_MINOR,
         .name   = "watchdog",
-        .fops   = &mtx1_wdt_fops
+        .fops   = &mtx1_wdt_fops,
 };
 
 
@@ -208,29 +208,26 @@ static int mtx1_wdt_probe(struct platform_device *pdev)
 
         mtx1_wdt_device.gpio = pdev->resource[0].start;
 
-        if ((ret = misc_register(&mtx1_wdt_misc)) < 0) {
-                printk(KERN_ERR " mtx-1_wdt : failed to register\n");
-                return ret;
-        }
-
+        spin_lock_init(&mtx1_wdt_device.lock);
         init_completion(&mtx1_wdt_device.stop);
         mtx1_wdt_device.queue = 0;
-
         clear_bit(0, &mtx1_wdt_device.inuse);
-
         setup_timer(&mtx1_wdt_device.timer, mtx1_wdt_trigger, 0L);
-
         mtx1_wdt_device.default_ticks = ticks;
 
+        ret = misc_register(&mtx1_wdt_misc);
+        if (ret < 0) {
+                printk(KERN_ERR " mtx-1_wdt : failed to register\n");
+                return ret;
+        }
         mtx1_wdt_start();
-
         printk(KERN_INFO "MTX-1 Watchdog driver\n");
-
         return 0;
 }
 
 static int mtx1_wdt_remove(struct platform_device *pdev)
 {
+        /* FIXME: do we need to lock this test ? */
         if (mtx1_wdt_device.queue) {
                 mtx1_wdt_device.queue = 0;
                 wait_for_completion(&mtx1_wdt_device.stop);
diff --git a/drivers/watchdog/mv64x60_wdt.c b/drivers/watchdog/mv64x60_wdt.c
index b59ca3273967..acf589dc057c 100644
--- a/drivers/watchdog/mv64x60_wdt.c
+++ b/drivers/watchdog/mv64x60_wdt.c
@@ -8,7 +8,7 @@
  * and services the watchdog.
  *
  * Derived from mpc8xx_wdt.c, with the following copyright.
- * 
+ *
  * 2002 (c) Florian Schirmer <jolt@tuxbox.org> This file is licensed under
  * the terms of the GNU General Public License version 2. This program
  * is licensed "as is" without any warranty of any kind, whether express
@@ -22,10 +22,9 @@
 #include <linux/module.h>
 #include <linux/watchdog.h>
 #include <linux/platform_device.h>
-
 #include <linux/mv643xx.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
 
 #define MV64x60_WDT_WDC_OFFSET  0
 
@@ -61,7 +60,9 @@ static DEFINE_SPINLOCK(mv64x60_wdt_spinlock);
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 static int mv64x60_wdt_toggle_wdc(int enabled_predicate, int field_shift)
 {
@@ -150,7 +151,7 @@ static int mv64x60_wdt_release(struct inode *inode, struct file *file)
 }
 
 static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data,
-                                 size_t len, loff_t * ppos)
+                                 size_t len, loff_t *ppos)
 {
         if (len) {
                 if (!nowayout) {
@@ -160,7 +161,7 @@ static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data,
 
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if(get_user(c, data + i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_close = 42;
@@ -172,8 +173,8 @@ static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data,
         return len;
 }
 
-static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file,
-                             unsigned int cmd, unsigned long arg)
+static long mv64x60_wdt_ioctl(struct file *file,
+                                        unsigned int cmd, unsigned long arg)
 {
         int timeout;
         int options;
@@ -240,7 +241,7 @@ static const struct file_operations mv64x60_wdt_fops = {
         .owner = THIS_MODULE,
         .llseek = no_llseek,
         .write = mv64x60_wdt_write,
-        .ioctl = mv64x60_wdt_ioctl,
+        .unlocked_ioctl = mv64x60_wdt_ioctl,
         .open = mv64x60_wdt_open,
         .release = mv64x60_wdt_release,
 };
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 74bc39aa1ce8..3a11dadfd8e7 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -40,12 +40,10 @@
 #include <linux/moduleparam.h>
 #include <linux/clk.h>
 #include <linux/bitops.h>
-
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/hardware.h>
-
-#include <asm/arch/prcm.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <mach/hardware.h>
+#include <mach/prcm.h>
 
 #include "omap_wdt.h"
 
@@ -54,11 +52,12 @@ module_param(timer_margin, uint, 0);
 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
 
 static int omap_wdt_users;
-static struct clk *armwdt_ck = NULL;
-static struct clk *mpu_wdt_ick = NULL;
-static struct clk *mpu_wdt_fck = NULL;
+static struct clk *armwdt_ck;
+static struct clk *mpu_wdt_ick;
+static struct clk *mpu_wdt_fck;
 
 static unsigned int wdt_trgr_pattern = 0x1234;
+static spinlock_t wdt_lock;
 
 static void omap_wdt_ping(void)
 {
@@ -174,30 +173,29 @@ static int omap_wdt_release(struct inode *inode, struct file *file)
         return 0;
 }
 
-static ssize_t
-omap_wdt_write(struct file *file, const char __user *data,
+static ssize_t omap_wdt_write(struct file *file, const char __user *data,
                 size_t len, loff_t *ppos)
 {
         /* Refresh LOAD_TIME. */
-        if (len)
+        if (len) {
+                spin_lock(&wdt_lock);
                 omap_wdt_ping();
+                spin_unlock(&wdt_lock);
+        }
         return len;
 }
 
-static int
-omap_wdt_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                unsigned long arg)
 {
         int new_margin;
-        static struct watchdog_info ident = {
+        static const struct watchdog_info ident = {
                 .identity = "OMAP Watchdog",
                 .options = WDIOF_SETTIMEOUT,
                 .firmware_version = 0,
         };
 
         switch (cmd) {
-        default:
-                return -ENOTTY;
         case WDIOC_GETSUPPORT:
                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
                                 sizeof(ident));
@@ -211,28 +209,34 @@ omap_wdt_ioctl(struct inode *inode, struct file *file,
                         return put_user(omap_prcm_get_reset_sources(),
                                         (int __user *)arg);
         case WDIOC_KEEPALIVE:
+                spin_lock(&wdt_lock);
                 omap_wdt_ping();
+                spin_unlock(&wdt_lock);
                 return 0;
         case WDIOC_SETTIMEOUT:
                 if (get_user(new_margin, (int __user *)arg))
                         return -EFAULT;
                 omap_wdt_adjust_timeout(new_margin);
 
+                spin_lock(&wdt_lock);
                 omap_wdt_disable();
                 omap_wdt_set_timeout();
                 omap_wdt_enable();
 
                 omap_wdt_ping();
+                spin_unlock(&wdt_lock);
                 /* Fall */
         case WDIOC_GETTIMEOUT:
                 return put_user(timer_margin, (int __user *)arg);
+        default:
+                return -ENOTTY;
         }
 }
 
 static const struct file_operations omap_wdt_fops = {
         .owner = THIS_MODULE,
         .write = omap_wdt_write,
-        .ioctl = omap_wdt_ioctl,
+        .unlocked_ioctl = omap_wdt_ioctl,
         .open = omap_wdt_open,
         .release = omap_wdt_release,
 };
@@ -240,7 +244,7 @@ static const struct file_operations omap_wdt_fops = {
 static struct miscdevice omap_wdt_miscdev = {
         .minor = WATCHDOG_MINOR,
         .name = "watchdog",
-        .fops = &omap_wdt_fops
+        .fops = &omap_wdt_fops,
 };
 
 static int __init omap_wdt_probe(struct platform_device *pdev)
@@ -373,6 +377,7 @@ static struct platform_driver omap_wdt_driver = {
 
 static int __init omap_wdt_init(void)
 {
+        spin_lock_init(&wdt_lock);
         return platform_driver_register(&omap_wdt_driver);
 }
 
diff --git a/drivers/watchdog/pc87413_wdt.c b/drivers/watchdog/pc87413_wdt.c
index 15e4f8887a9e..e91ada72da1d 100644
--- a/drivers/watchdog/pc87413_wdt.c
+++ b/drivers/watchdog/pc87413_wdt.c
@@ -31,14 +31,14 @@
 #include <linux/spinlock.h>
 #include <linux/moduleparam.h>
 #include <linux/version.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 /* #define DEBUG 1 */
 
-#define DEFAULT_TIMEOUT     1            /* 1 minute */
+#define DEFAULT_TIMEOUT     1           /* 1 minute */
 #define MAX_TIMEOUT         255
 
 #define VERSION             "1.1"
@@ -46,22 +46,22 @@
 #define PFX                 MODNAME ": "
 #define DPFX                MODNAME " - DEBUG: "
 
-#define WDT_INDEX_IO_PORT   (io+0)       /* I/O port base (index register) */
+#define WDT_INDEX_IO_PORT   (io+0)      /* I/O port base (index register) */
 #define WDT_DATA_IO_PORT    (WDT_INDEX_IO_PORT+1)
 #define SWC_LDN             0x04
-#define SIOCFG2             0x22         /* Serial IO register */
-#define WDCTL               0x10         /* Watchdog-Timer-Controll-Register */
-#define WDTO                0x11         /* Watchdog timeout register */
-#define WDCFG               0x12         /* Watchdog config register */
+#define SIOCFG2             0x22        /* Serial IO register */
+#define WDCTL               0x10        /* Watchdog-Timer-Controll-Register */
+#define WDTO                0x11        /* Watchdog timeout register */
+#define WDCFG               0x12        /* Watchdog config register */
 
-static int io = 0x2E;                    /* Address used on Portwell Boards */
+static int io = 0x2E;                   /* Address used on Portwell Boards */
 
-static int timeout = DEFAULT_TIMEOUT;    /* timeout value */
-static unsigned long timer_enabled = 0;  /* is the timer enabled? */
+static int timeout = DEFAULT_TIMEOUT;   /* timeout value */
+static unsigned long timer_enabled;     /* is the timer enabled? */
 
-static char expect_close;                /* is the close expected? */
+static char expect_close;               /* is the close expected? */
 
-static DEFINE_SPINLOCK(io_lock);/* to guard the watchdog from io races */
+static DEFINE_SPINLOCK(io_lock);        /* to guard us from io races */
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 
@@ -69,7 +69,7 @@ static int nowayout = WATCHDOG_NOWAYOUT;
 
 /* Select pins for Watchdog output */
 
-static inline void pc87413_select_wdt_out (void)
+static inline void pc87413_select_wdt_out(void)
 {
         unsigned int cr_data = 0;
 
@@ -77,7 +77,7 @@ static inline void pc87413_select_wdt_out (void)
 
         outb_p(SIOCFG2, WDT_INDEX_IO_PORT);
 
-        cr_data = inb (WDT_DATA_IO_PORT);
+        cr_data = inb(WDT_DATA_IO_PORT);
 
         cr_data |= 0x80; /* Set Bit7 to 1*/
         outb_p(SIOCFG2, WDT_INDEX_IO_PORT);
@@ -85,8 +85,9 @@ static inline void pc87413_select_wdt_out (void)
         outb_p(cr_data, WDT_DATA_IO_PORT);
 
 #ifdef DEBUG
-        printk(KERN_INFO DPFX "Select multiple pin,pin55,as WDT output:"
-                              " Bit7 to 1: %d\n", cr_data);
+        printk(KERN_INFO DPFX
+                "Select multiple pin,pin55,as WDT output: Bit7 to 1: %d\n",
+                                                                cr_data);
 #endif
 }
 
@@ -94,18 +95,18 @@ static inline void pc87413_select_wdt_out (void)
 
 static inline void pc87413_enable_swc(void)
 {
-        unsigned int cr_data=0;
+        unsigned int cr_data = 0;
 
         /* Step 2: Enable SWC functions */
 
-        outb_p(0x07, WDT_INDEX_IO_PORT);        /* Point SWC_LDN (LDN=4) */
+        outb_p(0x07, WDT_INDEX_IO_PORT);        /* Point SWC_LDN (LDN=4) */
         outb_p(SWC_LDN, WDT_DATA_IO_PORT);
 
-        outb_p(0x30, WDT_INDEX_IO_PORT);        /* Read Index 0x30 First */
+        outb_p(0x30, WDT_INDEX_IO_PORT);        /* Read Index 0x30 First */
         cr_data = inb(WDT_DATA_IO_PORT);
-        cr_data |= 0x01;                        /* Set Bit0 to 1 */
+        cr_data |= 0x01;                        /* Set Bit0 to 1 */
         outb_p(0x30, WDT_INDEX_IO_PORT);
-        outb_p(cr_data, WDT_DATA_IO_PORT);      /* Index0x30_bit0P1 */
+        outb_p(cr_data, WDT_DATA_IO_PORT);      /* Index0x30_bit0P1 */
 
 #ifdef DEBUG
         printk(KERN_INFO DPFX "pc87413 - Enable SWC functions\n");
@@ -121,20 +122,19 @@ static inline unsigned int pc87413_get_swc_base(void)
 
         /* Step 3: Read SWC I/O Base Address */
 
-        outb_p(0x60, WDT_INDEX_IO_PORT);        /* Read Index 0x60 */
+        outb_p(0x60, WDT_INDEX_IO_PORT);        /* Read Index 0x60 */
         addr_h = inb(WDT_DATA_IO_PORT);
 
-        outb_p(0x61, WDT_INDEX_IO_PORT);        /* Read Index 0x61 */
+        outb_p(0x61, WDT_INDEX_IO_PORT);        /* Read Index 0x61 */
 
         addr_l = inb(WDT_DATA_IO_PORT);
 
         swc_base_addr = (addr_h << 8) + addr_l;
-
 #ifdef DEBUG
-        printk(KERN_INFO DPFX "Read SWC I/O Base Address: low %d, high %d,"
-                              " res %d\n", addr_l, addr_h, swc_base_addr);
+        printk(KERN_INFO DPFX
+                "Read SWC I/O Base Address: low %d, high %d, res %d\n",
+                                                addr_l, addr_h, swc_base_addr);
 #endif
-
         return swc_base_addr;
 }
 
@@ -143,9 +143,7 @@ static inline unsigned int pc87413_get_swc_base(void)
 static inline void pc87413_swc_bank3(unsigned int swc_base_addr)
 {
         /* Step 4: Select Bank3 of SWC */
-
         outb_p(inb(swc_base_addr + 0x0f) | 0x03, swc_base_addr + 0x0f);
-
 #ifdef DEBUG
         printk(KERN_INFO DPFX "Select Bank3 of SWC\n");
 #endif
@@ -157,9 +155,7 @@ static inline void pc87413_programm_wdto(unsigned int swc_base_addr,
                                          char pc87413_time)
 {
         /* Step 5: Programm WDTO, Twd. */
-
         outb_p(pc87413_time, swc_base_addr + WDTO);
-
 #ifdef DEBUG
         printk(KERN_INFO DPFX "Set WDTO to %d minutes\n", pc87413_time);
 #endif
@@ -170,9 +166,7 @@ static inline void pc87413_programm_wdto(unsigned int swc_base_addr,
 static inline void pc87413_enable_wden(unsigned int swc_base_addr)
 {
         /* Step 6: Enable WDEN */
-
-        outb_p(inb (swc_base_addr + WDCTL) | 0x01, swc_base_addr + WDCTL);
-
+        outb_p(inb(swc_base_addr + WDCTL) | 0x01, swc_base_addr + WDCTL);
 #ifdef DEBUG
         printk(KERN_INFO DPFX "Enable WDEN\n");
 #endif
@@ -182,9 +176,7 @@ static inline void pc87413_enable_wden(unsigned int swc_base_addr)
 static inline void pc87413_enable_sw_wd_tren(unsigned int swc_base_addr)
 {
         /* Enable SW_WD_TREN */
-
-        outb_p(inb (swc_base_addr + WDCFG) | 0x80, swc_base_addr + WDCFG);
-
+        outb_p(inb(swc_base_addr + WDCFG) | 0x80, swc_base_addr + WDCFG);
 #ifdef DEBUG
         printk(KERN_INFO DPFX "Enable SW_WD_TREN\n");
 #endif
@@ -195,9 +187,7 @@ static inline void pc87413_enable_sw_wd_tren(unsigned int swc_base_addr)
 static inline void pc87413_disable_sw_wd_tren(unsigned int swc_base_addr)
 {
         /* Disable SW_WD_TREN */
-
-        outb_p(inb (swc_base_addr + WDCFG) & 0x7f, swc_base_addr + WDCFG);
-
+        outb_p(inb(swc_base_addr + WDCFG) & 0x7f, swc_base_addr + WDCFG);
 #ifdef DEBUG
         printk(KERN_INFO DPFX "pc87413 - Disable SW_WD_TREN\n");
 #endif
@@ -208,9 +198,7 @@ static inline void pc87413_disable_sw_wd_tren(unsigned int swc_base_addr)
 static inline void pc87413_enable_sw_wd_trg(unsigned int swc_base_addr)
 {
         /* Enable SW_WD_TRG */
-
-        outb_p(inb (swc_base_addr + WDCTL) | 0x80, swc_base_addr + WDCTL);
-
+        outb_p(inb(swc_base_addr + WDCTL) | 0x80, swc_base_addr + WDCTL);
 #ifdef DEBUG
         printk(KERN_INFO DPFX "pc87413 - Enable SW_WD_TRG\n");
 #endif
@@ -221,9 +209,7 @@ static inline void pc87413_enable_sw_wd_trg(unsigned int swc_base_addr)
 static inline void pc87413_disable_sw_wd_trg(unsigned int swc_base_addr)
 {
         /* Disable SW_WD_TRG */
-
-        outb_p(inb (swc_base_addr + WDCTL) & 0x7f, swc_base_addr + WDCTL);
-
+        outb_p(inb(swc_base_addr + WDCTL) & 0x7f, swc_base_addr + WDCTL);
 #ifdef DEBUG
         printk(KERN_INFO DPFX "Disable SW_WD_TRG\n");
 #endif
@@ -314,8 +300,8 @@ static int pc87413_open(struct inode *inode, struct file *file)
         /* Reload and activate timer */
         pc87413_refresh();
 
-        printk(KERN_INFO MODNAME "Watchdog enabled. Timeout set to"
-                                 " %d minute(s).\n", timeout);
+        printk(KERN_INFO MODNAME
+                "Watchdog enabled. Timeout set to %d minute(s).\n", timeout);
 
         return nonseekable_open(inode, file);
 }
@@ -338,17 +324,15 @@ static int pc87413_release(struct inode *inode, struct file *file)
 
         if (expect_close == 42) {
                 pc87413_disable();
-                printk(KERN_INFO MODNAME "Watchdog disabled,"
-                                         " sleeping again...\n");
+                printk(KERN_INFO MODNAME
+                                "Watchdog disabled, sleeping again...\n");
         } else {
-                printk(KERN_CRIT MODNAME "Unexpected close, not stopping"
-                                         " watchdog!\n");
+                printk(KERN_CRIT MODNAME
+                                "Unexpected close, not stopping watchdog!\n");
                 pc87413_refresh();
         }
-
         clear_bit(0, &timer_enabled);
         expect_close = 0;
-
         return 0;
 }
 
@@ -386,10 +370,11 @@ static ssize_t pc87413_write(struct file *file, const char __user *data,
                         /* reset expect flag */
                         expect_close = 0;
 
-                        /* scan to see whether or not we got the magic character */
+                        /* scan to see whether or not we got the
+                           magic character */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if (get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_close = 42;
@@ -404,7 +389,6 @@ static ssize_t pc87413_write(struct file *file, const char __user *data,
 
 /**
  *      pc87413_ioctl:
- *      @inode: inode of the device
  *      @file: file handle to the device
  *      @cmd: watchdog command
  *      @arg: argument pointer
@@ -414,8 +398,8 @@ static ssize_t pc87413_write(struct file *file, const char __user *data,
  *      querying capabilities and current status.
  */
 
-static int pc87413_ioctl(struct inode *inode, struct file *file,
-                         unsigned int cmd, unsigned long arg)
+static long pc87413_ioctl(struct file *file, unsigned int cmd,
+                                                unsigned long arg)
 {
         int new_timeout;
 
@@ -426,75 +410,58 @@ static int pc87413_ioctl(struct inode *inode, struct file *file,
 
         static struct watchdog_info ident = {
                 .options          = WDIOF_KEEPALIVEPING |
-                                    WDIOF_SETTIMEOUT |
-                                    WDIOF_MAGICCLOSE,
+                                    WDIOF_SETTIMEOUT |
+                                    WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
-                .identity         = "PC87413(HF/F) watchdog"
+                .identity         = "PC87413(HF/F) watchdog",
         };
 
         uarg.i = (int __user *)arg;
 
-        switch(cmd) {
-                default:
-                        return -ENOTTY;
-
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(uarg.ident, &ident,
-                                sizeof(ident)) ? -EFAULT : 0;
-
-                case WDIOC_GETSTATUS:
-                        return put_user(pc87413_status(), uarg.i);
-
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, uarg.i);
-
-                case WDIOC_KEEPALIVE:
-                        pc87413_refresh();
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(uarg.ident, &ident,
+                                        sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+                return put_user(pc87413_status(), uarg.i);
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, uarg.i);
+        case WDIOC_SETOPTIONS:
+        {
+                int options, retval = -EINVAL;
+                if (get_user(options, uarg.i))
+                        return -EFAULT;
+                if (options & WDIOS_DISABLECARD) {
+                        pc87413_disable();
+                        retval = 0;
+                }
+                if (options & WDIOS_ENABLECARD) {
+                        pc87413_enable();
+                        retval = 0;
+                }
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                pc87413_refresh();
 #ifdef DEBUG
-                        printk(KERN_INFO DPFX "keepalive\n");
+                printk(KERN_INFO DPFX "keepalive\n");
 #endif
-                        return 0;
-
-                case WDIOC_SETTIMEOUT:
-                        if (get_user(new_timeout, uarg.i))
-                                return -EFAULT;
-
-                        // the API states this is given in secs
-                        new_timeout /= 60;
-
-                        if (new_timeout < 0 || new_timeout > MAX_TIMEOUT)
-                                return -EINVAL;
-
-                        timeout = new_timeout;
-                        pc87413_refresh();
-
-                        // fall through and return the new timeout...
-
-                case WDIOC_GETTIMEOUT:
-
-                        new_timeout = timeout * 60;
-
-                        return put_user(new_timeout, uarg.i);
-
-                case WDIOC_SETOPTIONS:
-                {
-                        int options, retval = -EINVAL;
-
-                        if (get_user(options, uarg.i))
-                                return -EFAULT;
-
-                        if (options & WDIOS_DISABLECARD) {
-                                pc87413_disable();
-                                retval = 0;
-                        }
-
-                        if (options & WDIOS_ENABLECARD) {
-                                pc87413_enable();
-                                retval = 0;
-                        }
-
-                        return retval;
-                }
+                return 0;
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_timeout, uarg.i))
+                        return -EFAULT;
+                /* the API states this is given in secs */
+                new_timeout /= 60;
+                if (new_timeout < 0 || new_timeout > MAX_TIMEOUT)
+                        return -EINVAL;
+                timeout = new_timeout;
+                pc87413_refresh();
+                /* fall through and return the new timeout... */
+        case WDIOC_GETTIMEOUT:
+                new_timeout = timeout * 60;
+                return put_user(new_timeout, uarg.i);
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -517,10 +484,8 @@ static int pc87413_notify_sys(struct notifier_block *this,
                               void *unused)
 {
         if (code == SYS_DOWN || code == SYS_HALT)
-        {
                 /* Turn the card off */
                 pc87413_disable();
-        }
         return NOTIFY_DONE;
 }
 
@@ -530,21 +495,19 @@ static const struct file_operations pc87413_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = pc87413_write,
-        .ioctl          = pc87413_ioctl,
+        .unlocked_ioctl = pc87413_ioctl,
         .open           = pc87413_open,
         .release        = pc87413_release,
 };
 
-static struct notifier_block pc87413_notifier =
-{
+static struct notifier_block pc87413_notifier = {
         .notifier_call  = pc87413_notify_sys,
 };
 
-static struct miscdevice pc87413_miscdev=
-{
+static struct miscdevice pc87413_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
-        .fops           = &pc87413_fops
+        .fops           = &pc87413_fops,
 };
 
 /* -- Module init functions -------------------------------------*/
@@ -561,29 +524,26 @@ static int __init pc87413_init(void)
 {
         int ret;
 
-        printk(KERN_INFO PFX "Version " VERSION " at io 0x%X\n", WDT_INDEX_IO_PORT);
+        printk(KERN_INFO PFX "Version " VERSION " at io 0x%X\n",
+                                                        WDT_INDEX_IO_PORT);
 
         /* request_region(io, 2, "pc87413"); */
 
         ret = register_reboot_notifier(&pc87413_notifier);
         if (ret != 0) {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        ret);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
         }
 
         ret = misc_register(&pc87413_miscdev);
-
         if (ret != 0) {
                 printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
                         WATCHDOG_MINOR, ret);
                 unregister_reboot_notifier(&pc87413_notifier);
                 return ret;
         }
-
         printk(KERN_INFO PFX "initialized. timeout=%d min \n", timeout);
-
         pc87413_enable();
-
         return 0;
 }
 
@@ -600,17 +560,16 @@ static int __init pc87413_init(void)
 static void __exit pc87413_exit(void)
 {
         /* Stop the timer before we leave */
-        if (!nowayout)
-        {
+        if (!nowayout) {
                 pc87413_disable();
                 printk(KERN_INFO MODNAME "Watchdog disabled.\n");
         }
 
         misc_deregister(&pc87413_miscdev);
         unregister_reboot_notifier(&pc87413_notifier);
-        /* release_region(io,2); */
+        /* release_region(io, 2); */
 
-        printk(MODNAME " watchdog component driver removed.\n");
+        printk(KERN_INFO MODNAME " watchdog component driver removed.\n");
 }
 
 module_init(pc87413_init);
@@ -626,8 +585,12 @@ module_param(io, int, 0);
 MODULE_PARM_DESC(io, MODNAME " I/O port (default: " __MODULE_STRING(io) ").");
 
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in minutes (default=" __MODULE_STRING(timeout) ").");
+MODULE_PARM_DESC(timeout,
+                "Watchdog timeout in minutes (default="
+                                __MODULE_STRING(timeout) ").");
 
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
diff --git a/drivers/watchdog/pcwd.c b/drivers/watchdog/pcwd.c
index 7b41434fac8c..9e1331a3b215 100644
--- a/drivers/watchdog/pcwd.c
+++ b/drivers/watchdog/pcwd.c
@@ -40,13 +40,15 @@
  *              fairly useless proc entry.
  * 990610       removed said useless proc code for the merge <alan>
  * 000403       Removed last traces of proc code. <davej>
- * 011214       Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT <Matt_Domsch@dell.com>
+ * 011214       Added nowayout module option to override
+ *              CONFIG_WATCHDOG_NOWAYOUT <Matt_Domsch@dell.com>
  *              Added timeout module option to override default
  */
 
 /*
  *      A bells and whistles driver is available from http://www.pcwd.de/
- *      More info available at http://www.berkprod.com/ or http://www.pcwatchdog.com/
+ *      More info available at http://www.berkprod.com/ or
+ *      http://www.pcwatchdog.com/
  */
 
 #include <linux/module.h>       /* For module specific items */
@@ -65,9 +67,8 @@
 #include <linux/isa.h>          /* For isa devices */
 #include <linux/ioport.h>       /* For io-port access */
 #include <linux/spinlock.h>     /* For spin_lock/spin_unlock/... */
-
-#include <asm/uaccess.h>        /* For copy_to_user/put_user/... */
-#include <asm/io.h>             /* For inb/outb/... */
+#include <linux/uaccess.h>      /* For copy_to_user/put_user/... */
+#include <linux/io.h>           /* For inb/outb/... */
 
 /* Module and version information */
 #define WATCHDOG_VERSION "1.20"
@@ -111,14 +112,16 @@ static int pcwd_ioports[] = { 0x270, 0x350, 0x370, 0x000 };
 #define WD_REVC_WTRP            0x01    /* Watchdog Trip status */
 #define WD_REVC_HRBT            0x02    /* Watchdog Heartbeat */
 #define WD_REVC_TTRP            0x04    /* Temperature Trip status */
-#define WD_REVC_RL2A            0x08    /* Relay 2 activated by on-board processor */
+#define WD_REVC_RL2A            0x08    /* Relay 2 activated by
+                                                        on-board processor */
 #define WD_REVC_RL1A            0x10    /* Relay 1 active */
 #define WD_REVC_R2DS            0x40    /* Relay 2 disable */
 #define WD_REVC_RLY2            0x80    /* Relay 2 activated? */
 /* Port 2 : Control Status #2 */
 #define WD_WDIS                 0x10    /* Watchdog Disabled */
 #define WD_ENTP                 0x20    /* Watchdog Enable Temperature Trip */
-#define WD_SSEL                 0x40    /* Watchdog Switch Select (1:SW1 <-> 0:SW2) */
+#define WD_SSEL                 0x40    /* Watchdog Switch Select
+                                                        (1:SW1 <-> 0:SW2) */
 #define WD_WCMD                 0x80    /* Watchdog Command Mode */
 
 /* max. time we give an ISA watchdog card to process a command */
@@ -142,7 +145,7 @@ static int pcwd_ioports[] = { 0x270, 0x350, 0x370, 0x000 };
 #define CMD_ISA_RESET_RELAYS            0x0D
 
 /* Watchdog's Dip Switch heartbeat values */
-static const int heartbeat_tbl [] = {
+static const int heartbeat_tbl[] = {
         20,     /* OFF-OFF-OFF  = 20 Sec  */
         40,     /* OFF-OFF-ON   = 40 Sec  */
         60,     /* OFF-ON-OFF   =  1 Min  */
@@ -165,14 +168,18 @@ static const int heartbeat_tbl [] = {
 static int cards_found;
 
 /* internal variables */
-static atomic_t open_allowed = ATOMIC_INIT(1);
+static unsigned long open_allowed;
 static char expect_close;
 static int temp_panic;
-static struct {                         /* this is private data for each ISA-PC watchdog card */
+
+/* this is private data for each ISA-PC watchdog card */
+static struct {
         char fw_ver_str[6];             /* The cards firmware version */
         int revision;                   /* The card's revision */
-        int supports_temp;              /* Wether or not the card has a temperature device */
-        int command_mode;               /* Wether or not the card is in command mode */
+        int supports_temp;              /* Whether or not the card has
+                                                a temperature device */
+        int command_mode;               /* Whether or not the card is in
+                                                command mode */
         int boot_status;                /* The card's boot status */
         int io_addr;                    /* The cards I/O address */
         spinlock_t io_lock;             /* the lock for io operations */
@@ -186,16 +193,20 @@ static struct {				/* this is private data for each ISA-PC watchdog card */
 #define DEBUG   2       /* print fancy stuff too */
 static int debug = QUIET;
 module_param(debug, int, 0);
-MODULE_PARM_DESC(debug, "Debug level: 0=Quiet, 1=Verbose, 2=Debug (default=0)");
+MODULE_PARM_DESC(debug,
+                "Debug level: 0=Quiet, 1=Verbose, 2=Debug (default=0)");
 
-#define WATCHDOG_HEARTBEAT 0            /* default heartbeat = delay-time from dip-switches */
+/* default heartbeat = delay-time from dip-switches */
+#define WATCHDOG_HEARTBEAT 0
 static int heartbeat = WATCHDOG_HEARTBEAT;
 module_param(heartbeat, int, 0);
-MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<=heartbeat<=7200 or 0=delay-time from dip-switches, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
+MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2 <= heartbeat <= 7200 or 0=delay-time from dip-switches, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  *      Internal functions
@@ -224,7 +235,7 @@ static int send_isa_command(int cmd)
                 if (port0 == last_port0)
                         break;  /* Data is stable */
 
-                udelay (250);
+                udelay(250);
         }
 
         if (debug >= DEBUG)
@@ -236,7 +247,7 @@ static int send_isa_command(int cmd)
 
 static int set_command_mode(void)
 {
-        int i, found=0, count=0;
+        int i, found = 0, count = 0;
 
         /* Set the card into command mode */
         spin_lock(&pcwd_private.io_lock);
@@ -261,7 +272,7 @@ static int set_command_mode(void)
                 printk(KERN_DEBUG PFX "command_mode=%d\n",
                                 pcwd_private.command_mode);
 
-        return(found);
+        return found;
 }
 
 static void unset_command_mode(void)
@@ -296,7 +307,8 @@ static inline void pcwd_get_firmware(void)
                 ten = send_isa_command(CMD_ISA_VERSION_TENTH);
                 hund = send_isa_command(CMD_ISA_VERSION_HUNDRETH);
                 minor = send_isa_command(CMD_ISA_VERSION_MINOR);
-                sprintf(pcwd_private.fw_ver_str, "%c.%c%c%c", one, ten, hund, minor);
+                sprintf(pcwd_private.fw_ver_str, "%c.%c%c%c",
+                                        one, ten, hund, minor);
         }
         unset_command_mode();
 
@@ -305,7 +317,7 @@ static inline void pcwd_get_firmware(void)
 
 static inline int pcwd_get_option_switches(void)
 {
-        int option_switches=0;
+        int option_switches = 0;
 
         if (set_command_mode()) {
                 /* Get switch settings */
@@ -313,7 +325,7 @@ static inline int pcwd_get_option_switches(void)
         }
 
         unset_command_mode();
-        return(option_switches);
+        return option_switches;
 }
 
 static void pcwd_show_card_info(void)
@@ -322,7 +334,9 @@ static void pcwd_show_card_info(void)
 
         /* Get some extra info from the hardware (in command/debug/diag mode) */
         if (pcwd_private.revision == PCWD_REVISION_A)
-                printk(KERN_INFO PFX "ISA-PC Watchdog (REV.A) detected at port 0x%04x\n", pcwd_private.io_addr);
+                printk(KERN_INFO PFX
+                        "ISA-PC Watchdog (REV.A) detected at port 0x%04x\n",
+                                                        pcwd_private.io_addr);
         else if (pcwd_private.revision == PCWD_REVISION_C) {
                 pcwd_get_firmware();
                 printk(KERN_INFO PFX "ISA-PC Watchdog (REV.C) detected at port 0x%04x (Firmware version: %s)\n",
@@ -347,12 +361,15 @@ static void pcwd_show_card_info(void)
                 printk(KERN_INFO PFX "Previous reboot was caused by the card\n");
 
         if (pcwd_private.boot_status & WDIOF_OVERHEAT) {
-                printk(KERN_EMERG PFX "Card senses a CPU Overheat. Panicking!\n");
-                printk(KERN_EMERG PFX "CPU Overheat\n");
+                printk(KERN_EMERG PFX
+                        "Card senses a CPU Overheat. Panicking!\n");
+                printk(KERN_EMERG PFX
+                        "CPU Overheat\n");
         }
 
         if (pcwd_private.boot_status == 0)
-                printk(KERN_INFO PFX "No previous trip detected - Cold boot or reset\n");
+                printk(KERN_INFO PFX
+                        "No previous trip detected - Cold boot or reset\n");
 }
 
 static void pcwd_timer_ping(unsigned long data)
@@ -361,11 +378,12 @@ static void pcwd_timer_ping(unsigned long data)
 
         /* If we got a heartbeat pulse within the WDT_INTERVAL
          * we agree to ping the WDT */
-        if(time_before(jiffies, pcwd_private.next_heartbeat)) {
+        if (time_before(jiffies, pcwd_private.next_heartbeat)) {
                 /* Ping the watchdog */
                 spin_lock(&pcwd_private.io_lock);
                 if (pcwd_private.revision == PCWD_REVISION_A) {
-                        /*  Rev A cards are reset by setting the WD_WDRST bit in register 1 */
+                        /*  Rev A cards are reset by setting the
+                            WD_WDRST bit in register 1 */
                         wdrst_stat = inb_p(pcwd_private.io_addr);
                         wdrst_stat &= 0x0F;
                         wdrst_stat |= WD_WDRST;
@@ -381,7 +399,8 @@ static void pcwd_timer_ping(unsigned long data)
 
                 spin_unlock(&pcwd_private.io_lock);
         } else {
-                printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n");
+                printk(KERN_WARNING PFX
+                        "Heartbeat lost! Will not ping the watchdog\n");
         }
 }
 
@@ -454,7 +473,7 @@ static int pcwd_keepalive(void)
 
 static int pcwd_set_heartbeat(int t)
 {
-        if ((t < 2) || (t > 7200)) /* arbitrary upper limit */
+        if (t < 2 || t > 7200) /* arbitrary upper limit */
                 return -EINVAL;
 
         heartbeat = t;
@@ -470,7 +489,7 @@ static int pcwd_get_status(int *status)
 {
         int control_status;
 
-        *status=0;
+        *status = 0;
         spin_lock(&pcwd_private.io_lock);
         if (pcwd_private.revision == PCWD_REVISION_A)
                 /* Rev A cards return status information from
@@ -494,9 +513,9 @@ static int pcwd_get_status(int *status)
                 if (control_status & WD_T110) {
                         *status |= WDIOF_OVERHEAT;
                         if (temp_panic) {
-                                printk(KERN_INFO PFX "Temperature overheat trip!\n");
+                                printk(KERN_INFO PFX
+                                        "Temperature overheat trip!\n");
                                 kernel_power_off();
-                                /* or should we just do a: panic(PFX "Temperature overheat trip!\n"); */
                         }
                 }
         } else {
@@ -506,9 +525,9 @@ static int pcwd_get_status(int *status)
                 if (control_status & WD_REVC_TTRP) {
                         *status |= WDIOF_OVERHEAT;
                         if (temp_panic) {
-                                printk(KERN_INFO PFX "Temperature overheat trip!\n");
+                                printk(KERN_INFO PFX
+                                        "Temperature overheat trip!\n");
                                 kernel_power_off();
-                                /* or should we just do a: panic(PFX "Temperature overheat trip!\n"); */
                         }
                 }
         }
@@ -524,18 +543,21 @@ static int pcwd_clear_status(void)
                 spin_lock(&pcwd_private.io_lock);
 
                 if (debug >= VERBOSE)
-                        printk(KERN_INFO PFX "clearing watchdog trip status\n");
+                        printk(KERN_INFO PFX
+                                        "clearing watchdog trip status\n");
 
                 control_status = inb_p(pcwd_private.io_addr + 1);
 
                 if (debug >= DEBUG) {
-                        printk(KERN_DEBUG PFX "status was: 0x%02x\n", control_status);
+                        printk(KERN_DEBUG PFX "status was: 0x%02x\n",
+                                control_status);
                         printk(KERN_DEBUG PFX "sending: 0x%02x\n",
                                 (control_status & WD_REVC_R2DS));
                 }
 
                 /* clear reset status & Keep Relay 2 disable state as it is */
-                outb_p((control_status & WD_REVC_R2DS), pcwd_private.io_addr + 1);
+                outb_p((control_status & WD_REVC_R2DS),
+                                                pcwd_private.io_addr + 1);
 
                 spin_unlock(&pcwd_private.io_lock);
         }
@@ -572,8 +594,7 @@ static int pcwd_get_temperature(int *temperature)
  *      /dev/watchdog handling
  */
 
-static int pcwd_ioctl(struct inode *inode, struct file *file,
-                      unsigned int cmd, unsigned long arg)
+static long pcwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         int rv;
         int status;
@@ -590,12 +611,9 @@ static int pcwd_ioctl(struct inode *inode, struct file *file,
                 .identity =             "PCWD",
         };
 
-        switch(cmd) {
-        default:
-                return -ENOTTY;
-
+        switch (cmd) {
         case WDIOC_GETSUPPORT:
-                if(copy_to_user(argp, &ident, sizeof(ident)))
+                if (copy_to_user(argp, &ident, sizeof(ident)))
                         return -EFAULT;
                 return 0;
 
@@ -613,25 +631,22 @@ static int pcwd_ioctl(struct inode *inode, struct file *file,
                 return put_user(temperature, argp);
 
         case WDIOC_SETOPTIONS:
-                if (pcwd_private.revision == PCWD_REVISION_C)
-                {
-                        if(copy_from_user(&rv, argp, sizeof(int)))
+                if (pcwd_private.revision == PCWD_REVISION_C) {
+                        if (get_user(rv, argp))
                                 return -EFAULT;
 
-                        if (rv & WDIOS_DISABLECARD)
-                        {
-                                return pcwd_stop();
+                        if (rv & WDIOS_DISABLECARD) {
+                                status = pcwd_stop();
+                                if (status < 0)
+                                        return status;
                         }
-
-                        if (rv & WDIOS_ENABLECARD)
-                        {
-                                return pcwd_start();
+                        if (rv & WDIOS_ENABLECARD) {
+                                status = pcwd_start();
+                                if (status < 0)
+                                        return status;
                         }
-
                         if (rv & WDIOS_TEMPPANIC)
-                        {
                                 temp_panic = 1;
-                        }
                 }
                 return -EINVAL;
 
@@ -651,6 +666,9 @@ static int pcwd_ioctl(struct inode *inode, struct file *file,
 
         case WDIOC_GETTIMEOUT:
                 return put_user(heartbeat, argp);
+
+        default:
+                return -ENOTTY;
         }
 
         return 0;
@@ -682,16 +700,10 @@ static ssize_t pcwd_write(struct file *file, const char __user *buf, size_t len,
 
 static int pcwd_open(struct inode *inode, struct file *file)
 {
-        if (!atomic_dec_and_test(&open_allowed) ) {
-                if (debug >= VERBOSE)
-                        printk(KERN_ERR PFX "Attempt to open already opened device.\n");
-                atomic_inc( &open_allowed );
+        if (test_and_set_bit(0, &open_allowed))
                 return -EBUSY;
-        }
-
         if (nowayout)
                 __module_get(THIS_MODULE);
-
         /* Activate */
         pcwd_start();
         pcwd_keepalive();
@@ -700,14 +712,15 @@ static int pcwd_open(struct inode *inode, struct file *file)
 
 static int pcwd_close(struct inode *inode, struct file *file)
 {
-        if (expect_close == 42) {
+        if (expect_close == 42)
                 pcwd_stop();
-        } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+        else {
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
                 pcwd_keepalive();
         }
         expect_close = 0;
-        atomic_inc( &open_allowed );
+        clear_bit(0, &open_allowed);
         return 0;
 }
 
@@ -750,7 +763,7 @@ static const struct file_operations pcwd_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = pcwd_write,
-        .ioctl          = pcwd_ioctl,
+        .unlocked_ioctl = pcwd_ioctl,
         .open           = pcwd_open,
         .release        = pcwd_close,
 };
@@ -788,7 +801,7 @@ static inline int get_revision(void)
          * presumes a floating bus reads as 0xff. */
         if ((inb(pcwd_private.io_addr + 2) == 0xFF) ||
             (inb(pcwd_private.io_addr + 3) == 0xFF))
-                r=PCWD_REVISION_A;
+                r = PCWD_REVISION_A;
         spin_unlock(&pcwd_private.io_lock);
 
         return r;
@@ -803,7 +816,7 @@ static inline int get_revision(void)
  */
 static int __devinit pcwd_isa_match(struct device *dev, unsigned int id)
 {
-        int base_addr=pcwd_ioports[id];
+        int base_addr = pcwd_ioports[id];
         int port0, last_port0;  /* Reg 0, in case it's REV A */
         int port1, last_port1;  /* Register 1 for REV C cards */
         int i;
@@ -813,7 +826,7 @@ static int __devinit pcwd_isa_match(struct device *dev, unsigned int id)
                 printk(KERN_DEBUG PFX "pcwd_isa_match id=%d\n",
                         id);
 
-        if (!request_region (base_addr, 4, "PCWD")) {
+        if (!request_region(base_addr, 4, "PCWD")) {
                 printk(KERN_INFO PFX "Port 0x%04x unavailable\n", base_addr);
                 return 0;
         }
@@ -842,7 +855,7 @@ static int __devinit pcwd_isa_match(struct device *dev, unsigned int id)
                         }
                 }
         }
-        release_region (base_addr, 4);
+        release_region(base_addr, 4);
 
         return retval;
 }
@@ -857,7 +870,8 @@ static int __devinit pcwd_isa_probe(struct device *dev, unsigned int id)
 
         cards_found++;
         if (cards_found == 1)
-                printk(KERN_INFO PFX "v%s Ken Hollis (kenji@bitgate.com)\n", WD_VER);
+                printk(KERN_INFO PFX "v%s Ken Hollis (kenji@bitgate.com)\n",
+                                                                WD_VER);
 
         if (cards_found > 1) {
                 printk(KERN_ERR PFX "This driver only supports 1 device\n");
@@ -875,10 +889,11 @@ static int __devinit pcwd_isa_probe(struct device *dev, unsigned int id)
         /* Check card's revision */
         pcwd_private.revision = get_revision();
 
-        if (!request_region(pcwd_private.io_addr, (pcwd_private.revision == PCWD_REVISION_A) ? 2 : 4, "PCWD")) {
+        if (!request_region(pcwd_private.io_addr,
+                (pcwd_private.revision == PCWD_REVISION_A) ? 2 : 4, "PCWD")) {
                 printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
                         pcwd_private.io_addr);
-                ret=-EIO;
+                ret = -EIO;
                 goto error_request_region;
         }
 
@@ -908,26 +923,30 @@ static int __devinit pcwd_isa_probe(struct device *dev, unsigned int id)
         if (heartbeat == 0)
                 heartbeat = heartbeat_tbl[(pcwd_get_option_switches() & 0x07)];
 
-        /* Check that the heartbeat value is within it's range ; if not reset to the default */
+        /* Check that the heartbeat value is within it's range;
+           if not reset to the default */
         if (pcwd_set_heartbeat(heartbeat)) {
                 pcwd_set_heartbeat(WATCHDOG_HEARTBEAT);
-                printk(KERN_INFO PFX "heartbeat value must be 2<=heartbeat<=7200, using %d\n",
-                        WATCHDOG_HEARTBEAT);
+                printk(KERN_INFO PFX
+                  "heartbeat value must be 2 <= heartbeat <= 7200, using %d\n",
+                                                        WATCHDOG_HEARTBEAT);
         }
 
         if (pcwd_private.supports_temp) {
                 ret = misc_register(&temp_miscdev);
                 if (ret) {
-                        printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                                TEMP_MINOR, ret);
+                        printk(KERN_ERR PFX
+                            "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        TEMP_MINOR, ret);
                         goto error_misc_register_temp;
                 }
         }
 
         ret = misc_register(&pcwd_miscdev);
         if (ret) {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                        WATCHDOG_MINOR, ret);
                 goto error_misc_register_watchdog;
         }
 
@@ -940,7 +959,8 @@ error_misc_register_watchdog:
         if (pcwd_private.supports_temp)
                 misc_deregister(&temp_miscdev);
 error_misc_register_temp:
-        release_region(pcwd_private.io_addr, (pcwd_private.revision == PCWD_REVISION_A) ? 2 : 4);
+        release_region(pcwd_private.io_addr,
+                        (pcwd_private.revision == PCWD_REVISION_A) ? 2 : 4);
 error_request_region:
         pcwd_private.io_addr = 0x0000;
         cards_found--;
@@ -964,7 +984,8 @@ static int __devexit pcwd_isa_remove(struct device *dev, unsigned int id)
         misc_deregister(&pcwd_miscdev);
         if (pcwd_private.supports_temp)
                 misc_deregister(&temp_miscdev);
-        release_region(pcwd_private.io_addr, (pcwd_private.revision == PCWD_REVISION_A) ? 2 : 4);
+        release_region(pcwd_private.io_addr,
+                        (pcwd_private.revision == PCWD_REVISION_A) ? 2 : 4);
         pcwd_private.io_addr = 0x0000;
         cards_found--;
 
diff --git a/drivers/watchdog/pcwd_pci.c b/drivers/watchdog/pcwd_pci.c
index 61a89e959642..90eb1d4271d7 100644
--- a/drivers/watchdog/pcwd_pci.c
+++ b/drivers/watchdog/pcwd_pci.c
@@ -46,9 +46,8 @@
 #include <linux/pci.h>          /* For pci functions */
 #include <linux/ioport.h>       /* For io-port access */
 #include <linux/spinlock.h>     /* For spin_lock/spin_unlock/... */
-
-#include <asm/uaccess.h>        /* For copy_to_user/put_user/... */
-#include <asm/io.h>             /* For inb/outb/... */
+#include <linux/uaccess.h>      /* For copy_to_user/put_user/... */
+#include <linux/io.h>           /* For inb/outb/... */
 
 /* Module and version information */
 #define WATCHDOG_VERSION "1.03"
@@ -97,7 +96,7 @@
 #define CMD_GET_CLEAR_RESET_COUNT               0x84
 
 /* Watchdog's Dip Switch heartbeat values */
-static const int heartbeat_tbl [] = {
+static const int heartbeat_tbl[] = {
         5,      /* OFF-OFF-OFF  =  5 Sec  */
         10,     /* OFF-OFF-ON   = 10 Sec  */
         30,     /* OFF-ON-OFF   = 30 Sec  */
@@ -220,11 +219,10 @@ static void pcipcwd_show_card_info(void)
         int option_switches;
 
         got_fw_rev = send_command(CMD_GET_FIRMWARE_VERSION, &fw_rev_major, &fw_rev_minor);
-        if (got_fw_rev) {
+        if (got_fw_rev)
                 sprintf(fw_ver_str, "%u.%02u", fw_rev_major, fw_rev_minor);
-        } else {
+        else
                 sprintf(fw_ver_str, "<card no answer>");
-        }
 
         /* Get switch settings */
         option_switches = pcipcwd_get_option_switches();
@@ -331,7 +329,7 @@ static int pcipcwd_get_status(int *status)
 {
         int control_status;
 
-        *status=0;
+        *status = 0;
         control_status = inb_p(pcipcwd_private.io_addr + 1);
         if (control_status & WD_PCI_WTRP)
                 *status |= WDIOF_CARDRESET;
@@ -369,8 +367,8 @@ static int pcipcwd_clear_status(void)
         outb_p((control_status & WD_PCI_R2DS) | WD_PCI_WTRP, pcipcwd_private.io_addr + 1);
 
         /* clear reset counter */
-        msb=0;
-        reset_counter=0xff;
+        msb = 0;
+        reset_counter = 0xff;
         send_command(CMD_GET_CLEAR_RESET_COUNT, &msb, &reset_counter);
 
         if (debug >= DEBUG) {
@@ -442,7 +440,7 @@ static ssize_t pcipcwd_write(struct file *file, const char __user *data,
                         /* scan to see whether or not we got the magic character */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if(get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_release = 42;
@@ -455,8 +453,8 @@ static ssize_t pcipcwd_write(struct file *file, const char __user *data,
         return len;
 }
 
-static int pcipcwd_ioctl(struct inode *inode, struct file *file,
-                          unsigned int cmd, unsigned long arg)
+static long pcipcwd_ioctl(struct file *file, unsigned int cmd,
+                                                unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
@@ -471,92 +469,89 @@ static int pcipcwd_ioctl(struct inode *inode, struct file *file,
         };
 
         switch (cmd) {
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident,
-                                sizeof (ident)) ? -EFAULT : 0;
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+
+        case WDIOC_GETSTATUS:
+        {
+                int status;
+                pcipcwd_get_status(&status);
+                return put_user(status, p);
+        }
 
-                case WDIOC_GETSTATUS:
-                {
-                        int status;
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(pcipcwd_private.boot_status, p);
 
-                        pcipcwd_get_status(&status);
+        case WDIOC_GETTEMP:
+        {
+                int temperature;
 
-                        return put_user(status, p);
-                }
+                if (pcipcwd_get_temperature(&temperature))
+                        return -EFAULT;
 
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(pcipcwd_private.boot_status, p);
+                return put_user(temperature, p);
+        }
 
-                case WDIOC_GETTEMP:
-                {
-                        int temperature;
+        case WDIOC_SETOPTIONS:
+        {
+                int new_options, retval = -EINVAL;
 
-                        if (pcipcwd_get_temperature(&temperature))
-                                return -EFAULT;
+                if (get_user(new_options, p))
+                        return -EFAULT;
 
-                        return put_user(temperature, p);
+                if (new_options & WDIOS_DISABLECARD) {
+                        if (pcipcwd_stop())
+                                return -EIO;
+                        retval = 0;
                 }
 
-                case WDIOC_KEEPALIVE:
-                        pcipcwd_keepalive();
-                        return 0;
-
-                case WDIOC_SETOPTIONS:
-                {
-                        int new_options, retval = -EINVAL;
-
-                        if (get_user (new_options, p))
-                                return -EFAULT;
-
-                        if (new_options & WDIOS_DISABLECARD) {
-                                if (pcipcwd_stop())
-                                        return -EIO;
-                                retval = 0;
-                        }
+                if (new_options & WDIOS_ENABLECARD) {
+                        if (pcipcwd_start())
+                                return -EIO;
+                        retval = 0;
+                }
 
-                        if (new_options & WDIOS_ENABLECARD) {
-                                if (pcipcwd_start())
-                                        return -EIO;
-                                retval = 0;
-                        }
+                if (new_options & WDIOS_TEMPPANIC) {
+                        temp_panic = 1;
+                        retval = 0;
+                }
 
-                        if (new_options & WDIOS_TEMPPANIC) {
-                                temp_panic = 1;
-                                retval = 0;
-                        }
+                return retval;
+        }
 
-                        return retval;
-                }
+        case WDIOC_KEEPALIVE:
+                pcipcwd_keepalive();
+                return 0;
 
-                case WDIOC_SETTIMEOUT:
-                {
-                        int new_heartbeat;
+        case WDIOC_SETTIMEOUT:
+        {
+                int new_heartbeat;
 
-                        if (get_user(new_heartbeat, p))
-                                return -EFAULT;
+                if (get_user(new_heartbeat, p))
+                        return -EFAULT;
 
-                        if (pcipcwd_set_heartbeat(new_heartbeat))
-                            return -EINVAL;
+                if (pcipcwd_set_heartbeat(new_heartbeat))
+                    return -EINVAL;
 
-                        pcipcwd_keepalive();
-                        /* Fall */
-                }
+                pcipcwd_keepalive();
+                /* Fall */
+        }
 
-                case WDIOC_GETTIMEOUT:
-                        return put_user(heartbeat, p);
+        case WDIOC_GETTIMEOUT:
+                return put_user(heartbeat, p);
 
-                case WDIOC_GETTIMELEFT:
-                {
-                        int time_left;
+        case WDIOC_GETTIMELEFT:
+        {
+                int time_left;
 
-                        if (pcipcwd_get_timeleft(&time_left))
-                                return -EFAULT;
+                if (pcipcwd_get_timeleft(&time_left))
+                        return -EFAULT;
 
-                        return put_user(time_left, p);
-                }
+                return put_user(time_left, p);
+        }
 
-                default:
-                        return -ENOTTY;
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -603,7 +598,7 @@ static ssize_t pcipcwd_temp_read(struct file *file, char __user *data,
         if (pcipcwd_get_temperature(&temperature))
                 return -EFAULT;
 
-        if (copy_to_user (data, &temperature, 1))
+        if (copy_to_user(data, &temperature, 1))
                 return -EFAULT;
 
         return 1;
@@ -628,10 +623,8 @@ static int pcipcwd_temp_release(struct inode *inode, struct file *file)
 
 static int pcipcwd_notify_sys(struct notifier_block *this, unsigned long code, void *unused)
 {
-        if (code==SYS_DOWN || code==SYS_HALT) {
-                /* Turn the WDT off */
-                pcipcwd_stop();
-        }
+        if (code == SYS_DOWN || code == SYS_HALT)
+                pcipcwd_stop(); /* Turn the WDT off */
 
         return NOTIFY_DONE;
 }
@@ -644,7 +637,7 @@ static const struct file_operations pcipcwd_fops = {
         .owner =        THIS_MODULE,
         .llseek =       no_llseek,
         .write =        pcipcwd_write,
-        .ioctl =        pcipcwd_ioctl,
+        .unlocked_ioctl = pcipcwd_ioctl,
         .open =         pcipcwd_open,
         .release =      pcipcwd_release,
 };
diff --git a/drivers/watchdog/pcwd_usb.c b/drivers/watchdog/pcwd_usb.c
index bf443d077a1e..c1685c942de6 100644
--- a/drivers/watchdog/pcwd_usb.c
+++ b/drivers/watchdog/pcwd_usb.c
@@ -40,8 +40,7 @@
 #include <linux/slab.h>         /* For kmalloc, ... */
 #include <linux/mutex.h>        /* For mutex locking */
 #include <linux/hid.h>          /* For HID_REQ_SET_REPORT & HID_DT_REPORT */
-
-#include <asm/uaccess.h>        /* For copy_to_user/put_user/... */
+#include <linux/uaccess.h>      /* For copy_to_user/put_user/... */
 
 
 #ifdef CONFIG_USB_DEBUG
@@ -88,7 +87,7 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" _
 #define USB_PCWD_PRODUCT_ID     0x1140
 
 /* table of devices that work with this driver */
-static struct usb_device_id usb_pcwd_table [] = {
+static struct usb_device_id usb_pcwd_table[] = {
         { USB_DEVICE(USB_PCWD_VENDOR_ID, USB_PCWD_PRODUCT_ID) },
         { }                                     /* Terminating entry */
 };
@@ -110,7 +109,7 @@ MODULE_DEVICE_TABLE (usb, usb_pcwd_table);
 #define CMD_DISABLE_WATCHDOG            CMD_ENABLE_WATCHDOG
 
 /* Watchdog's Dip Switch heartbeat values */
-static const int heartbeat_tbl [] = {
+static const int heartbeat_tbl[] = {
         5,      /* OFF-OFF-OFF  =  5 Sec  */
         10,     /* OFF-OFF-ON   = 10 Sec  */
         30,     /* OFF-ON-OFF   = 30 Sec  */
@@ -130,15 +129,15 @@ static char expect_release;
 
 /* Structure to hold all of our device specific stuff */
 struct usb_pcwd_private {
-        struct usb_device *     udev;                   /* save off the usb device pointer */
-        struct usb_interface *  interface;              /* the interface for this device */
+        struct usb_device       *udev;                  /* save off the usb device pointer */
+        struct usb_interface    *interface;             /* the interface for this device */
 
         unsigned int            interface_number;       /* the interface number used for cmd's */
 
-        unsigned char *         intr_buffer;            /* the buffer to intr data */
+        unsigned char           *intr_buffer;           /* the buffer to intr data */
         dma_addr_t              intr_dma;               /* the dma address for the intr buffer */
         size_t                  intr_size;              /* the size of the intr buffer */
-        struct urb *            intr_urb;               /* the urb used for the intr pipe */
+        struct urb              *intr_urb;              /* the urb used for the intr pipe */
 
         unsigned char           cmd_command;            /* The command that is reported back */
         unsigned char           cmd_data_msb;           /* The data MSB that is reported back */
@@ -154,8 +153,8 @@ static struct usb_pcwd_private *usb_pcwd_device;
 static DEFINE_MUTEX(disconnect_mutex);
 
 /* local function prototypes */
-static int usb_pcwd_probe       (struct usb_interface *interface, const struct usb_device_id *id);
-static void usb_pcwd_disconnect (struct usb_interface *interface);
+static int usb_pcwd_probe(struct usb_interface *interface, const struct usb_device_id *id);
+static void usb_pcwd_disconnect(struct usb_interface *interface);
 
 /* usb specific object needed to register this driver with the usb subsystem */
 static struct usb_driver usb_pcwd_driver = {
@@ -195,10 +194,10 @@ static void usb_pcwd_intr_done(struct urb *urb)
         usb_pcwd->cmd_data_lsb = data[2];
 
         /* notify anyone waiting that the cmd has finished */
-        atomic_set (&usb_pcwd->cmd_received, 1);
+        atomic_set(&usb_pcwd->cmd_received, 1);
 
 resubmit:
-        retval = usb_submit_urb (urb, GFP_ATOMIC);
+        retval = usb_submit_urb(urb, GFP_ATOMIC);
         if (retval)
                 printk(KERN_ERR PFX "can't resubmit intr, usb_submit_urb failed with result %d\n",
                         retval);
@@ -224,7 +223,7 @@ static int usb_pcwd_send_command(struct usb_pcwd_private *usb_pcwd, unsigned cha
         dbg("sending following data cmd=0x%02x msb=0x%02x lsb=0x%02x",
                 buf[0], buf[1], buf[2]);
 
-        atomic_set (&usb_pcwd->cmd_received, 0);
+        atomic_set(&usb_pcwd->cmd_received, 0);
 
         if (usb_control_msg(usb_pcwd->udev, usb_sndctrlpipe(usb_pcwd->udev, 0),
                         HID_REQ_SET_REPORT, HID_DT_REPORT,
@@ -237,7 +236,7 @@ static int usb_pcwd_send_command(struct usb_pcwd_private *usb_pcwd, unsigned cha
         got_response = 0;
         for (count = 0; (count < USB_COMMAND_TIMEOUT) && (!got_response); count++) {
                 mdelay(1);
-                if (atomic_read (&usb_pcwd->cmd_received))
+                if (atomic_read(&usb_pcwd->cmd_received))
                         got_response = 1;
         }
 
@@ -356,7 +355,7 @@ static ssize_t usb_pcwd_write(struct file *file, const char __user *data,
                         /* scan to see whether or not we got the magic character */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if(get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_release = 42;
@@ -369,8 +368,8 @@ static ssize_t usb_pcwd_write(struct file *file, const char __user *data,
         return len;
 }
 
-static int usb_pcwd_ioctl(struct inode *inode, struct file *file,
-                          unsigned int cmd, unsigned long arg)
+static long usb_pcwd_ioctl(struct file *file, unsigned int cmd,
+                                                unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
@@ -383,77 +382,76 @@ static int usb_pcwd_ioctl(struct inode *inode, struct file *file,
         };
 
         switch (cmd) {
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident,
-                                sizeof (ident)) ? -EFAULT : 0;
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
 
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
 
-                case WDIOC_GETTEMP:
-                {
-                        int temperature;
+        case WDIOC_GETTEMP:
+        {
+                int temperature;
 
-                        if (usb_pcwd_get_temperature(usb_pcwd_device, &temperature))
-                                return -EFAULT;
+                if (usb_pcwd_get_temperature(usb_pcwd_device, &temperature))
+                        return -EFAULT;
 
-                        return put_user(temperature, p);
-                }
+                return put_user(temperature, p);
+        }
 
-                case WDIOC_KEEPALIVE:
-                        usb_pcwd_keepalive(usb_pcwd_device);
-                        return 0;
+        case WDIOC_SETOPTIONS:
+        {
+                int new_options, retval = -EINVAL;
 
-                case WDIOC_SETOPTIONS:
-                {
-                        int new_options, retval = -EINVAL;
+                if (get_user(new_options, p))
+                        return -EFAULT;
 
-                        if (get_user (new_options, p))
-                                return -EFAULT;
+                if (new_options & WDIOS_DISABLECARD) {
+                        usb_pcwd_stop(usb_pcwd_device);
+                        retval = 0;
+                }
 
-                        if (new_options & WDIOS_DISABLECARD) {
-                                usb_pcwd_stop(usb_pcwd_device);
-                                retval = 0;
-                        }
+                if (new_options & WDIOS_ENABLECARD) {
+                        usb_pcwd_start(usb_pcwd_device);
+                        retval = 0;
+                }
 
-                        if (new_options & WDIOS_ENABLECARD) {
-                                usb_pcwd_start(usb_pcwd_device);
-                                retval = 0;
-                        }
+                return retval;
+        }
 
-                        return retval;
-                }
+        case WDIOC_KEEPALIVE:
+                usb_pcwd_keepalive(usb_pcwd_device);
+                return 0;
 
-                case WDIOC_SETTIMEOUT:
-                {
-                        int new_heartbeat;
+        case WDIOC_SETTIMEOUT:
+        {
+                int new_heartbeat;
 
-                        if (get_user(new_heartbeat, p))
-                                return -EFAULT;
+                if (get_user(new_heartbeat, p))
+                        return -EFAULT;
 
-                        if (usb_pcwd_set_heartbeat(usb_pcwd_device, new_heartbeat))
-                            return -EINVAL;
+                if (usb_pcwd_set_heartbeat(usb_pcwd_device, new_heartbeat))
+                    return -EINVAL;
 
-                        usb_pcwd_keepalive(usb_pcwd_device);
-                        /* Fall */
-                }
+                usb_pcwd_keepalive(usb_pcwd_device);
+                /* Fall */
+        }
 
-                case WDIOC_GETTIMEOUT:
-                        return put_user(heartbeat, p);
+        case WDIOC_GETTIMEOUT:
+                return put_user(heartbeat, p);
 
-                case WDIOC_GETTIMELEFT:
-                {
-                        int time_left;
+        case WDIOC_GETTIMELEFT:
+        {
+                int time_left;
 
-                        if (usb_pcwd_get_timeleft(usb_pcwd_device, &time_left))
-                                return -EFAULT;
+                if (usb_pcwd_get_timeleft(usb_pcwd_device, &time_left))
+                        return -EFAULT;
 
-                        return put_user(time_left, p);
-                }
+                return put_user(time_left, p);
+        }
 
-                default:
-                        return -ENOTTY;
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -519,10 +517,8 @@ static int usb_pcwd_temperature_release(struct inode *inode, struct file *file)
 
 static int usb_pcwd_notify_sys(struct notifier_block *this, unsigned long code, void *unused)
 {
-        if (code==SYS_DOWN || code==SYS_HALT) {
-                /* Turn the WDT off */
-                usb_pcwd_stop(usb_pcwd_device);
-        }
+        if (code == SYS_DOWN || code == SYS_HALT)
+                usb_pcwd_stop(usb_pcwd_device); /* Turn the WDT off */
 
         return NOTIFY_DONE;
 }
@@ -535,7 +531,7 @@ static const struct file_operations usb_pcwd_fops = {
         .owner =        THIS_MODULE,
         .llseek =       no_llseek,
         .write =        usb_pcwd_write,
-        .ioctl =        usb_pcwd_ioctl,
+        .unlocked_ioctl = usb_pcwd_ioctl,
         .open =         usb_pcwd_open,
         .release =      usb_pcwd_release,
 };
@@ -567,13 +563,13 @@ static struct notifier_block usb_pcwd_notifier = {
 /**
  *      usb_pcwd_delete
  */
-static inline void usb_pcwd_delete (struct usb_pcwd_private *usb_pcwd)
+static inline void usb_pcwd_delete(struct usb_pcwd_private *usb_pcwd)
 {
         usb_free_urb(usb_pcwd->intr_urb);
         if (usb_pcwd->intr_buffer != NULL)
                 usb_buffer_free(usb_pcwd->udev, usb_pcwd->intr_size,
                                 usb_pcwd->intr_buffer, usb_pcwd->intr_dma);
-        kfree (usb_pcwd);
+        kfree(usb_pcwd);
 }
 
 /**
@@ -626,7 +622,7 @@ static int usb_pcwd_probe(struct usb_interface *interface, const struct usb_devi
         maxp = usb_maxpacket(udev, pipe, usb_pipeout(pipe));
 
         /* allocate memory for our device and initialize it */
-        usb_pcwd = kzalloc (sizeof(struct usb_pcwd_private), GFP_KERNEL);
+        usb_pcwd = kzalloc(sizeof(struct usb_pcwd_private), GFP_KERNEL);
         if (usb_pcwd == NULL) {
                 printk(KERN_ERR PFX "Out of memory\n");
                 goto error;
@@ -641,7 +637,8 @@ static int usb_pcwd_probe(struct usb_interface *interface, const struct usb_devi
         usb_pcwd->intr_size = (le16_to_cpu(endpoint->wMaxPacketSize) > 8 ? le16_to_cpu(endpoint->wMaxPacketSize) : 8);
 
         /* set up the memory buffer's */
-        if (!(usb_pcwd->intr_buffer = usb_buffer_alloc(udev, usb_pcwd->intr_size, GFP_ATOMIC, &usb_pcwd->intr_dma))) {
+        usb_pcwd->intr_buffer = usb_buffer_alloc(udev, usb_pcwd->intr_size, GFP_ATOMIC, &usb_pcwd->intr_dma);
+        if (!usb_pcwd->intr_buffer) {
                 printk(KERN_ERR PFX "Out of memory\n");
                 goto error;
         }
@@ -675,11 +672,10 @@ static int usb_pcwd_probe(struct usb_interface *interface, const struct usb_devi
 
         /* Get the Firmware Version */
         got_fw_rev = usb_pcwd_send_command(usb_pcwd, CMD_GET_FIRMWARE_VERSION, &fw_rev_major, &fw_rev_minor);
-        if (got_fw_rev) {
+        if (got_fw_rev)
                 sprintf(fw_ver_str, "%u.%02u", fw_rev_major, fw_rev_minor);
-        } else {
+        else
                 sprintf(fw_ver_str, "<card no answer>");
-        }
 
         printk(KERN_INFO PFX "Found card (Firmware: %s) with temp option\n",
                 fw_ver_str);
@@ -725,7 +721,7 @@ static int usb_pcwd_probe(struct usb_interface *interface, const struct usb_devi
         }
 
         /* we can register the device now, as it is ready */
-        usb_set_intfdata (interface, usb_pcwd);
+        usb_set_intfdata(interface, usb_pcwd);
 
         printk(KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n",
                 heartbeat, nowayout);
@@ -759,8 +755,8 @@ static void usb_pcwd_disconnect(struct usb_interface *interface)
         /* prevent races with open() */
         mutex_lock(&disconnect_mutex);
 
-        usb_pcwd = usb_get_intfdata (interface);
-        usb_set_intfdata (interface, NULL);
+        usb_pcwd = usb_get_intfdata(interface);
+        usb_set_intfdata(interface, NULL);
 
         mutex_lock(&usb_pcwd->mtx);
 
@@ -820,5 +816,5 @@ static void __exit usb_pcwd_exit(void)
 }
 
 
-module_init (usb_pcwd_init);
-module_exit (usb_pcwd_exit);
+module_init(usb_pcwd_init);
+module_exit(usb_pcwd_exit);
diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c
index 6b8483d3c783..0ed84162437b 100644
--- a/drivers/watchdog/pnx4008_wdt.c
+++ b/drivers/watchdog/pnx4008_wdt.c
@@ -28,10 +28,9 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/spinlock.h>
-
-#include <asm/hardware.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <mach/hardware.h>
 
 #define MODULE_NAME "PNX4008-WDT: "
 
@@ -144,9 +143,8 @@ static int pnx4008_wdt_open(struct inode *inode, struct file *file)
         return nonseekable_open(inode, file);
 }
 
-static ssize_t
-pnx4008_wdt_write(struct file *file, const char *data, size_t len,
-                  loff_t * ppos)
+static ssize_t pnx4008_wdt_write(struct file *file, const char *data,
+                                        size_t len, loff_t *ppos)
 {
         if (len) {
                 if (!nowayout) {
@@ -169,15 +167,14 @@ pnx4008_wdt_write(struct file *file, const char *data, size_t len,
         return len;
 }
 
-static struct watchdog_info ident = {
+static const struct watchdog_info ident = {
         .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE |
             WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
         .identity = "PNX4008 Watchdog",
 };
 
-static int
-pnx4008_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-                  unsigned long arg)
+static long pnx4008_wdt_ioctl(struct inode *inode, struct file *file,
+                                        unsigned int cmd, unsigned long arg)
 {
         int ret = -ENOTTY;
         int time;
@@ -196,6 +193,11 @@ pnx4008_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                 ret = put_user(boot_status, (int *)arg);
                 break;
 
+        case WDIOC_KEEPALIVE:
+                wdt_enable();
+                ret = 0;
+                break;
+
         case WDIOC_SETTIMEOUT:
                 ret = get_user(time, (int *)arg);
                 if (ret)
@@ -213,11 +215,6 @@ pnx4008_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
         case WDIOC_GETTIMEOUT:
                 ret = put_user(heartbeat, (int *)arg);
                 break;
-
-        case WDIOC_KEEPALIVE:
-                wdt_enable();
-                ret = 0;
-                break;
         }
         return ret;
 }
@@ -238,7 +235,7 @@ static const struct file_operations pnx4008_wdt_fops = {
         .owner = THIS_MODULE,
         .llseek = no_llseek,
         .write = pnx4008_wdt_write,
-        .ioctl = pnx4008_wdt_ioctl,
+        .unlocked_ioctl = pnx4008_wdt_ioctl,
         .open = pnx4008_wdt_open,
         .release = pnx4008_wdt_release,
 };
diff --git a/drivers/watchdog/rm9k_wdt.c b/drivers/watchdog/rm9k_wdt.c
index 5c921e471564..f1ae3729a19e 100644
--- a/drivers/watchdog/rm9k_wdt.c
+++ b/drivers/watchdog/rm9k_wdt.c
@@ -29,10 +29,10 @@
 #include <linux/notifier.h>
 #include <linux/miscdevice.h>
 #include <linux/watchdog.h>
-#include <asm/io.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 #include <asm/atomic.h>
 #include <asm/processor.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 #include <asm/rm9k-ocd.h>
 
@@ -53,10 +53,12 @@ static void wdt_gpi_stop(void);
 static void wdt_gpi_set_timeout(unsigned int);
 static int wdt_gpi_open(struct inode *, struct file *);
 static int wdt_gpi_release(struct inode *, struct file *);
-static ssize_t wdt_gpi_write(struct file *, const char __user *, size_t, loff_t *);
+static ssize_t wdt_gpi_write(struct file *, const char __user *, size_t,
+                                                                loff_t *);
 static long wdt_gpi_ioctl(struct file *, unsigned int, unsigned long);
 static int wdt_gpi_notify(struct notifier_block *, unsigned long, void *);
-static const struct resource *wdt_gpi_get_resource(struct platform_device *, const char *, unsigned int);
+static const struct resource *wdt_gpi_get_resource(struct platform_device *,
+                                                const char *, unsigned int);
 static int __init wdt_gpi_probe(struct device *);
 static int __exit wdt_gpi_remove(struct device *);
 
@@ -68,7 +70,7 @@ static int locked;
 
 
 /* These are set from device resources */
-static void __iomem * wd_regs;
+static void __iomem *wd_regs;
 static unsigned int wd_irq, wd_ctr;
 
 
@@ -216,7 +218,8 @@ static int wdt_gpi_release(struct inode *inode, struct file *file)
                 if (expect_close) {
                         wdt_gpi_stop();
                         free_irq(wd_irq, &miscdev);
-                        printk(KERN_INFO "%s: watchdog stopped\n", wdt_gpi_name);
+                        printk(KERN_INFO "%s: watchdog stopped\n",
+                                                        wdt_gpi_name);
                 } else {
                         printk(KERN_CRIT "%s: unexpected close() -"
                                 " watchdog left running\n",
@@ -231,8 +234,8 @@ static int wdt_gpi_release(struct inode *inode, struct file *file)
         return 0;
 }
 
-static ssize_t
-wdt_gpi_write(struct file *f, const char __user *d, size_t s, loff_t *o)
+static ssize_t wdt_gpi_write(struct file *f, const char __user *d, size_t s,
+                                                                loff_t *o)
 {
         char val;
 
@@ -241,8 +244,7 @@ wdt_gpi_write(struct file *f, const char __user *d, size_t s, loff_t *o)
         return s ? 1 : 0;
 }
 
-static long
-wdt_gpi_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
+static long wdt_gpi_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
 {
         long res = -ENOTTY;
         const long size = _IOC_SIZE(cmd);
@@ -271,7 +273,8 @@ wdt_gpi_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
         case WDIOC_GETSUPPORT:
                 wdinfo.options = nowayout ?
                         WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING :
-                        WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE;
+                        WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
+                        WDIOF_MAGICCLOSE;
                 res = __copy_to_user(argp, &wdinfo, size) ?  -EFAULT : size;
                 break;
 
@@ -322,8 +325,8 @@ wdt_gpi_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
 
 
 /* Shutdown notifier */
-static int
-wdt_gpi_notify(struct notifier_block *this, unsigned long code, void *unused)
+static int wdt_gpi_notify(struct notifier_block *this, unsigned long code,
+                          void *unused)
 {
         if (code == SYS_DOWN || code == SYS_HALT)
                 wdt_gpi_stop();
@@ -333,9 +336,8 @@ wdt_gpi_notify(struct notifier_block *this, unsigned long code, void *unused)
 
 
 /* Init & exit procedures */
-static const struct resource *
-wdt_gpi_get_resource(struct platform_device *pdv, const char *name,
-                      unsigned int type)
+static const struct resource *wdt_gpi_get_resource(struct platform_device *pdv,
+                                        const char *name, unsigned int type)
 {
         char buf[80];
         if (snprintf(buf, sizeof buf, "%s_0", name) >= sizeof buf)
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 97b4a2e8eb09..22715e3be5e7 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -49,7 +49,7 @@
 #include <linux/uaccess.h>
 #include <linux/io.h>
 
-#include <asm/arch/map.h>
+#include <mach/map.h>
 
 #undef S3C_VA_WATCHDOG
 #define S3C_VA_WATCHDOG (0)
@@ -119,17 +119,6 @@ static void __s3c2410wdt_stop(void)
 {
         unsigned long wtcon;
 
-        spin_lock(&wdt_lock);
-        wtcon = readl(wdt_base + S3C2410_WTCON);
-        wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
-        writel(wtcon, wdt_base + S3C2410_WTCON);
-        spin_unlock(&wdt_lock);
-}
-
-static void __s3c2410wdt_stop(void)
-{
-        unsigned long wtcon;
-
         wtcon = readl(wdt_base + S3C2410_WTCON);
         wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
         writel(wtcon, wdt_base + S3C2410_WTCON);
@@ -168,8 +157,6 @@ static void s3c2410wdt_start(void)
         writel(wdt_count, wdt_base + S3C2410_WTCNT);
         writel(wtcon, wdt_base + S3C2410_WTCON);
         spin_unlock(&wdt_lock);
-
-        return 0;
 }
 
 static int s3c2410wdt_set_heartbeat(int timeout)
@@ -305,8 +292,6 @@ static long s3c2410wdt_ioctl(struct file *file,	unsigned int cmd,
         int new_margin;
 
         switch (cmd) {
-        default:
-                return -ENOTTY;
         case WDIOC_GETSUPPORT:
                 return copy_to_user(argp, &s3c2410_wdt_ident,
                         sizeof(s3c2410_wdt_ident)) ? -EFAULT : 0;
@@ -325,6 +310,8 @@ static long s3c2410wdt_ioctl(struct file *file,	unsigned int cmd,
                 return put_user(tmr_margin, p);
         case WDIOC_GETTIMEOUT:
                 return put_user(tmr_margin, p);
+        default:
+                return -ENOTTY;
         }
 }
 
diff --git a/drivers/watchdog/sa1100_wdt.c b/drivers/watchdog/sa1100_wdt.c
index 34a2b3b81800..31a48437dc3d 100644
--- a/drivers/watchdog/sa1100_wdt.c
+++ b/drivers/watchdog/sa1100_wdt.c
@@ -26,13 +26,14 @@
 #include <linux/watchdog.h>
 #include <linux/init.h>
 #include <linux/bitops.h>
+#include <linux/uaccess.h>
 
 #ifdef CONFIG_ARCH_PXA
-#include <asm/arch/pxa-regs.h>
+#include <mach/pxa-regs.h>
 #endif
 
-#include <asm/hardware.h>
-#include <asm/uaccess.h>
+#include <mach/reset.h>
+#include <mach/hardware.h>
 
 #define OSCR_FREQ               CLOCK_TICK_RATE
 
@@ -45,7 +46,7 @@ static int boot_status;
  */
 static int sa1100dog_open(struct inode *inode, struct file *file)
 {
-        if (test_and_set_bit(1,&sa1100wdt_users))
+        if (test_and_set_bit(1, &sa1100wdt_users))
                 return -EBUSY;
 
         /* Activate SA1100 Watchdog timer */
@@ -66,28 +67,27 @@ static int sa1100dog_open(struct inode *inode, struct file *file)
 static int sa1100dog_release(struct inode *inode, struct file *file)
 {
         printk(KERN_CRIT "WATCHDOG: Device closed - timer will not stop\n");
-
         clear_bit(1, &sa1100wdt_users);
-
         return 0;
 }
 
-static ssize_t sa1100dog_write(struct file *file, const char __user *data, size_t len, loff_t *ppos)
+static ssize_t sa1100dog_write(struct file *file, const char __user *data,
+                                                size_t len, loff_t *ppos)
 {
         if (len)
                 /* Refresh OSMR3 timer. */
                 OSMR3 = OSCR + pre_margin;
-
         return len;
 }
 
-static struct watchdog_info ident = {
-        .options        = WDIOF_CARDRESET | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
+static const struct watchdog_info ident = {
+        .options        = WDIOF_CARDRESET | WDIOF_SETTIMEOUT
+                                | WDIOF_KEEPALIVEPING,
         .identity       = "SA1100/PXA255 Watchdog",
 };
 
-static int sa1100dog_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long sa1100dog_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int ret = -ENOTTY;
         int time;
@@ -108,6 +108,11 @@ static int sa1100dog_ioctl(struct inode *inode, struct file *file,
                 ret = put_user(boot_status, p);
                 break;
 
+        case WDIOC_KEEPALIVE:
+                OSMR3 = OSCR + pre_margin;
+                ret = 0;
+                break;
+
         case WDIOC_SETTIMEOUT:
                 ret = get_user(time, p);
                 if (ret)
@@ -125,27 +130,20 @@ static int sa1100dog_ioctl(struct inode *inode, struct file *file,
         case WDIOC_GETTIMEOUT:
                 ret = put_user(pre_margin / OSCR_FREQ, p);
                 break;
-
-        case WDIOC_KEEPALIVE:
-                OSMR3 = OSCR + pre_margin;
-                ret = 0;
-                break;
         }
         return ret;
 }
 
-static const struct file_operations sa1100dog_fops =
-{
+static const struct file_operations sa1100dog_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = sa1100dog_write,
-        .ioctl          = sa1100dog_ioctl,
+        .unlocked_ioctl = sa1100dog_ioctl,
         .open           = sa1100dog_open,
         .release        = sa1100dog_release,
 };
 
-static struct miscdevice sa1100dog_miscdev =
-{
+static struct miscdevice sa1100dog_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
         .fops           = &sa1100dog_fops,
@@ -162,13 +160,15 @@ static int __init sa1100dog_init(void)
          * we suspend, RCSR will be cleared, and the watchdog
          * reset reason will be lost.
          */
-        boot_status = (RCSR & RCSR_WDR) ? WDIOF_CARDRESET : 0;
+        boot_status = (reset_status & RESET_STATUS_WATCHDOG) ?
+                                WDIOF_CARDRESET : 0;
         pre_margin = OSCR_FREQ * margin;
 
         ret = misc_register(&sa1100dog_miscdev);
         if (ret == 0)
-                printk("SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n",
-                       margin);
+                printk(KERN_INFO
+                        "SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n",
+                                                margin);
         return ret;
 }
 
diff --git a/drivers/watchdog/sb_wdog.c b/drivers/watchdog/sb_wdog.c
index b94431433695..27e526a07c9a 100644
--- a/drivers/watchdog/sb_wdog.c
+++ b/drivers/watchdog/sb_wdog.c
@@ -57,6 +57,7 @@
 #include <asm/sibyte/sb1250_int.h>
 #include <asm/sibyte/sb1250_scd.h>
 
+static DEFINE_SPINLOCK(sbwd_lock);
 
 /*
  * set the initial count value of a timer
@@ -65,8 +66,10 @@
  */
 void sbwdog_set(char __iomem *wdog, unsigned long t)
 {
+        spin_lock(&sbwd_lock);
         __raw_writeb(0, wdog - 0x10);
         __raw_writeq(t & 0x7fffffUL, wdog);
+        spin_unlock(&sbwd_lock);
 }
 
 /*
@@ -77,7 +80,9 @@ void sbwdog_set(char __iomem *wdog, unsigned long t)
  */
 void sbwdog_pet(char __iomem *wdog)
 {
+        spin_lock(&sbwd_lock);
         __raw_writeb(__raw_readb(wdog) | 1, wdog);
+        spin_unlock(&sbwd_lock);
 }
 
 static unsigned long sbwdog_gate; /* keeps it to one thread only */
@@ -86,8 +91,9 @@ static char __iomem *user_dog = (char __iomem *)(IO_BASE + (A_SCD_WDOG_CFG_1));
 static unsigned long timeout = 0x7fffffUL;      /* useconds: 8.3ish secs. */
 static int expect_close;
 
-static struct watchdog_info ident = {
-        .options        = WDIOF_CARDRESET | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
+static const struct watchdog_info ident = {
+        .options        = WDIOF_CARDRESET | WDIOF_SETTIMEOUT |
+                                                WDIOF_KEEPALIVEPING,
         .identity       = "SiByte Watchdog",
 };
 
@@ -97,9 +103,8 @@ static struct watchdog_info ident = {
 static int sbwdog_open(struct inode *inode, struct file *file)
 {
         nonseekable_open(inode, file);
-        if (test_and_set_bit(0, &sbwdog_gate)) {
+        if (test_and_set_bit(0, &sbwdog_gate))
                 return -EBUSY;
-        }
         __module_get(THIS_MODULE);
 
         /*
@@ -120,8 +125,9 @@ static int sbwdog_release(struct inode *inode, struct file *file)
                 __raw_writeb(0, user_dog);
                 module_put(THIS_MODULE);
         } else {
-                printk(KERN_CRIT "%s: Unexpected close, not stopping watchdog!\n",
-                        ident.identity);
+                printk(KERN_CRIT
+                        "%s: Unexpected close, not stopping watchdog!\n",
+                                                ident.identity);
                 sbwdog_pet(user_dog);
         }
         clear_bit(0, &sbwdog_gate);
@@ -147,12 +153,10 @@ static ssize_t sbwdog_write(struct file *file, const char __user *data,
                 for (i = 0; i != len; i++) {
                         char c;
 
-                        if (get_user(c, data + i)) {
+                        if (get_user(c, data + i))
                                 return -EFAULT;
-                        }
-                        if (c == 'V') {
+                        if (c == 'V')
                                 expect_close = 42;
-                        }
                 }
                 sbwdog_pet(user_dog);
         }
@@ -160,8 +164,8 @@ static ssize_t sbwdog_write(struct file *file, const char __user *data,
         return len;
 }
 
-static int sbwdog_ioctl(struct inode *inode, struct file *file,
-                        unsigned int cmd, unsigned long arg)
+static long sbwdog_ioctl(struct file *file, unsigned int cmd,
+                                                unsigned long arg)
 {
         int ret = -ENOTTY;
         unsigned long time;
@@ -178,11 +182,15 @@ static int sbwdog_ioctl(struct inode *inode, struct file *file,
                 ret = put_user(0, p);
                 break;
 
+        case WDIOC_KEEPALIVE:
+                sbwdog_pet(user_dog);
+                ret = 0;
+                break;
+
         case WDIOC_SETTIMEOUT:
                 ret = get_user(time, p);
-                if (ret) {
+                if (ret)
                         break;
-                }
 
                 time *= 1000000;
                 if (time > 0x7fffffUL) {
@@ -200,11 +208,6 @@ static int sbwdog_ioctl(struct inode *inode, struct file *file,
                  */
                 ret = put_user(__raw_readq(user_dog - 8) / 1000000, p);
                 break;
-
-        case WDIOC_KEEPALIVE:
-                sbwdog_pet(user_dog);
-                ret = 0;
-                break;
         }
         return ret;
 }
@@ -212,8 +215,8 @@ static int sbwdog_ioctl(struct inode *inode, struct file *file,
 /*
  *      Notifier for system down
  */
-static int
-sbwdog_notify_sys(struct notifier_block *this, unsigned long code, void *erf)
+static int sbwdog_notify_sys(struct notifier_block *this, unsigned long code,
+                                                                void *erf)
 {
         if (code == SYS_DOWN || code == SYS_HALT) {
                 /*
@@ -226,18 +229,16 @@ sbwdog_notify_sys(struct notifier_block *this, unsigned long code, void *erf)
         return NOTIFY_DONE;
 }
 
-static const struct file_operations sbwdog_fops =
-{
+static const struct file_operations sbwdog_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = sbwdog_write,
-        .ioctl          = sbwdog_ioctl,
+        .unlocked_ioctl = sbwdog_ioctl,
         .open           = sbwdog_open,
         .release        = sbwdog_release,
 };
 
-static struct miscdevice sbwdog_miscdev =
-{
+static struct miscdevice sbwdog_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
         .fops           = &sbwdog_fops,
@@ -267,13 +268,12 @@ irqreturn_t sbwdog_interrupt(int irq, void *addr)
         /*
          * if it's the second watchdog timer, it's for those users
          */
-        if (wd_cfg_reg == user_dog) {
+        if (wd_cfg_reg == user_dog)
                 printk(KERN_CRIT
                         "%s in danger of initiating system reset in %ld.%01ld seconds\n",
                         ident.identity, wd_init / 1000000, (wd_init / 100000) % 10);
-        } else {
+        else
                 cfg |= 1;
-        }
 
         __raw_writeb(cfg, wd_cfg_reg);
 
@@ -289,28 +289,31 @@ static int __init sbwdog_init(void)
          */
         ret = register_reboot_notifier(&sbwdog_notifier);
         if (ret) {
-                printk (KERN_ERR "%s: cannot register reboot notifier (err=%d)\n",
-                        ident.identity, ret);
+                printk(KERN_ERR
+                        "%s: cannot register reboot notifier (err=%d)\n",
+                                                ident.identity, ret);
                 return ret;
         }
 
         /*
          * get the resources
          */
-        ret = misc_register(&sbwdog_miscdev);
-        if (ret == 0) {
-                printk(KERN_INFO "%s: timeout is %ld.%ld secs\n", ident.identity,
-                        timeout / 1000000, (timeout / 100000) % 10);
-        }
 
         ret = request_irq(1, sbwdog_interrupt, IRQF_DISABLED | IRQF_SHARED,
                 ident.identity, (void *)user_dog);
         if (ret) {
-                printk(KERN_ERR "%s: failed to request irq 1 - %d\n", ident.identity,
-                        ret);
-                misc_deregister(&sbwdog_miscdev);
+                printk(KERN_ERR "%s: failed to request irq 1 - %d\n",
+                                                ident.identity, ret);
+                return ret;
         }
 
+        ret = misc_register(&sbwdog_miscdev);
+        if (ret == 0) {
+                printk(KERN_INFO "%s: timeout is %ld.%ld secs\n",
+                                ident.identity,
+                                timeout / 1000000, (timeout / 100000) % 10);
+        } else
+                free_irq(1, (void *)user_dog);
         return ret;
 }
 
@@ -327,7 +330,7 @@ MODULE_DESCRIPTION("SiByte Watchdog");
 
 module_param(timeout, ulong, 0);
 MODULE_PARM_DESC(timeout,
-        "Watchdog timeout in microseconds (max/default 8388607 or 8.3ish secs)");
+      "Watchdog timeout in microseconds (max/default 8388607 or 8.3ish secs)");
 
 MODULE_LICENSE("GPL");
 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
@@ -336,16 +339,15 @@ MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  * example code that can be put in a platform code area to utilize the
  * first watchdog timer for the kernels own purpose.
 
- void
-platform_wd_setup(void)
+void platform_wd_setup(void)
 {
         int ret;
 
-        ret = request_irq(0, sbwdog_interrupt, IRQF_DISABLED | IRQF_SHARED,
+        ret = request_irq(1, sbwdog_interrupt, IRQF_DISABLED | IRQF_SHARED,
                 "Kernel Watchdog", IOADDR(A_SCD_WDOG_CFG_0));
         if (ret) {
-                printk(KERN_CRIT "Watchdog IRQ zero(0) failed to be requested - %d\n",
-                        ret);
+                printk(KERN_CRIT
+                  "Watchdog IRQ zero(0) failed to be requested - %d\n", ret);
         }
 }
 
diff --git a/drivers/watchdog/sbc60xxwdt.c b/drivers/watchdog/sbc60xxwdt.c
index ef76f01625e7..3266daaaecf8 100644
--- a/drivers/watchdog/sbc60xxwdt.c
+++ b/drivers/watchdog/sbc60xxwdt.c
@@ -16,19 +16,23 @@
  *
  *           12/4 - 2000      [Initial revision]
  *           25/4 - 2000      Added /dev/watchdog support
- *           09/5 - 2001      [smj@oro.net] fixed fop_write to "return 1" on success
+ *           09/5 - 2001      [smj@oro.net] fixed fop_write to "return 1"
+ *                                      on success
  *           12/4 - 2002      [rob@osinvestor.com] eliminate fop_read
  *                            fix possible wdt_is_open race
  *                            add CONFIG_WATCHDOG_NOWAYOUT support
  *                            remove lock_kernel/unlock_kernel pairs
  *                            added KERN_* to printk's
  *                            got rid of extraneous comments
- *                            changed watchdog_info to correctly reflect what the driver offers
- *                            added WDIOC_GETSTATUS, WDIOC_GETBOOTSTATUS, WDIOC_SETTIMEOUT,
- *                            WDIOC_GETTIMEOUT, and WDIOC_SETOPTIONS ioctls
+ *                            changed watchdog_info to correctly reflect what
+ *                            the driver offers
+ *                            added WDIOC_GETSTATUS, WDIOC_GETBOOTSTATUS,
+ *                            WDIOC_SETTIMEOUT, WDIOC_GETTIMEOUT, and
+ *                            WDIOC_SETOPTIONS ioctls
  *           09/8 - 2003      [wim@iguana.be] cleanup of trailing spaces
  *                            use module_param
- *                            made timeout (the emulated heartbeat) a module_param
+ *                            made timeout (the emulated heartbeat) a
+ *                            module_param
  *                            made the keepalive ping an internal subroutine
  *                            made wdt_stop and wdt_start module params
  *                            added extra printk's for startup problems
@@ -56,9 +60,9 @@
 #include <linux/notifier.h>
 #include <linux/reboot.h>
 #include <linux/init.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 #define OUR_NAME "sbc60xxwdt"
@@ -94,13 +98,18 @@ MODULE_PARM_DESC(wdt_start, "SBC60xx WDT 'start' io port (default 0x443)");
  */
 
 #define WATCHDOG_TIMEOUT 30             /* 30 sec default timeout */
-static int timeout = WATCHDOG_TIMEOUT;  /* in seconds, will be multiplied by HZ to get seconds to wait for a ping */
+static int timeout = WATCHDOG_TIMEOUT;  /* in seconds, multiplied by HZ to
+                                           get seconds to wait for a ping */
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=3600, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+        "Watchdog timeout in seconds. (1<=timeout<=3600, default="
+                                __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 static void wdt_timer_ping(unsigned long);
 static DEFINE_TIMER(timer, wdt_timer_ping, 0, 0);
@@ -117,15 +126,14 @@ static void wdt_timer_ping(unsigned long data)
         /* If we got a heartbeat pulse within the WDT_US_INTERVAL
          * we agree to ping the WDT
          */
-        if(time_before(jiffies, next_heartbeat))
-        {
+        if (time_before(jiffies, next_heartbeat)) {
                 /* Ping the WDT by reading from wdt_start */
                 inb_p(wdt_start);
                 /* Re-set the timer interval */
                 mod_timer(&timer, jiffies + WDT_INTERVAL);
-        } else {
-                printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n");
-        }
+        } else
+                printk(KERN_WARNING PFX
+                        "Heartbeat lost! Will not ping the watchdog\n");
 }
 
 /*
@@ -159,40 +167,40 @@ static void wdt_keepalive(void)
  * /dev/watchdog handling
  */
 
-static ssize_t fop_write(struct file * file, const char __user * buf, size_t count, loff_t * ppos)
+static ssize_t fop_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
-        if(count)
-        {
-                if (!nowayout)
-                {
+        if (count) {
+                if (!nowayout) {
                         size_t ofs;
 
-                        /* note: just in case someone wrote the magic character
-                         * five months ago... */
+                        /* note: just in case someone wrote the
+                           magic character five months ago... */
                         wdt_expect_close = 0;
 
-                        /* scan to see whether or not we got the magic character */
-                        for(ofs = 0; ofs != count; ofs++)
-                        {
+                        /* scan to see whether or not we got the
+                           magic character */
+                        for (ofs = 0; ofs != count; ofs++) {
                                 char c;
-                                if(get_user(c, buf+ofs))
+                                if (get_user(c, buf + ofs))
                                         return -EFAULT;
-                                if(c == 'V')
+                                if (c == 'V')
                                         wdt_expect_close = 42;
                         }
                 }
 
-                /* Well, anyhow someone wrote to us, we should return that favour */
+                /* Well, anyhow someone wrote to us, we should
+                   return that favour */
                 wdt_keepalive();
         }
         return count;
 }
 
-static int fop_open(struct inode * inode, struct file * file)
+static int fop_open(struct inode *inode, struct file *file)
 {
         /* Just in case we're already talking to someone... */
-        if(test_and_set_bit(0, &wdt_is_open))
+        if (test_and_set_bit(0, &wdt_is_open))
                 return -EBUSY;
 
         if (nowayout)
@@ -203,78 +211,72 @@ static int fop_open(struct inode * inode, struct file * file)
         return nonseekable_open(inode, file);
 }
 
-static int fop_close(struct inode * inode, struct file * file)
+static int fop_close(struct inode *inode, struct file *file)
 {
-        if(wdt_expect_close == 42)
+        if (wdt_expect_close == 42)
                 wdt_turnoff();
         else {
                 del_timer(&timer);
-                printk(KERN_CRIT PFX "device file closed unexpectedly. Will not stop the WDT!\n");
+                printk(KERN_CRIT PFX
+                  "device file closed unexpectedly. Will not stop the WDT!\n");
         }
         clear_bit(0, &wdt_is_open);
         wdt_expect_close = 0;
         return 0;
 }
 
-static int fop_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-        unsigned long arg)
+static long fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
-        static struct watchdog_info ident=
-        {
-                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+        static const struct watchdog_info ident = {
+                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
+                                                        WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = "SBC60xx",
         };
 
-        switch(cmd)
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
         {
-                default:
-                        return -ENOTTY;
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident, sizeof(ident))?-EFAULT:0;
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-                case WDIOC_KEEPALIVE:
-                        wdt_keepalive();
-                        return 0;
-                case WDIOC_SETOPTIONS:
-                {
-                        int new_options, retval = -EINVAL;
-
-                        if(get_user(new_options, p))
-                                return -EFAULT;
-
-                        if(new_options & WDIOS_DISABLECARD) {
-                                wdt_turnoff();
-                                retval = 0;
-                        }
-
-                        if(new_options & WDIOS_ENABLECARD) {
-                                wdt_startup();
-                                retval = 0;
-                        }
-
-                        return retval;
+                int new_options, retval = -EINVAL;
+                if (get_user(new_options, p))
+                        return -EFAULT;
+                if (new_options & WDIOS_DISABLECARD) {
+                        wdt_turnoff();
+                        retval = 0;
                 }
-                case WDIOC_SETTIMEOUT:
-                {
-                        int new_timeout;
-
-                        if(get_user(new_timeout, p))
-                                return -EFAULT;
-
-                        if(new_timeout < 1 || new_timeout > 3600) /* arbitrary upper limit */
-                                return -EINVAL;
-
-                        timeout = new_timeout;
-                        wdt_keepalive();
-                        /* Fall through */
+                if (new_options & WDIOS_ENABLECARD) {
+                        wdt_startup();
+                        retval = 0;
                 }
-                case WDIOC_GETTIMEOUT:
-                        return put_user(timeout, p);
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                wdt_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+        {
+                int new_timeout;
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                /* arbitrary upper limit */
+                if (new_timeout < 1 || new_timeout > 3600)
+                        return -EINVAL;
+
+                timeout = new_timeout;
+                wdt_keepalive();
+                /* Fall through */
+        }
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -284,7 +286,7 @@ static const struct file_operations wdt_fops = {
         .write          = fop_write,
         .open           = fop_open,
         .release        = fop_close,
-        .ioctl          = fop_ioctl,
+        .unlocked_ioctl = fop_ioctl,
 };
 
 static struct miscdevice wdt_miscdev = {
@@ -300,7 +302,7 @@ static struct miscdevice wdt_miscdev = {
 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if(code==SYS_DOWN || code==SYS_HALT)
+        if (code == SYS_DOWN || code == SYS_HALT)
                 wdt_turnoff();
         return NOTIFY_DONE;
 }
@@ -310,8 +312,7 @@ static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
  *      turn the timebomb registers off.
  */
 
-static struct notifier_block wdt_notifier=
-{
+static struct notifier_block wdt_notifier = {
         .notifier_call = wdt_notify_sys,
 };
 
@@ -324,23 +325,22 @@ static void __exit sbc60xxwdt_unload(void)
 
         unregister_reboot_notifier(&wdt_notifier);
         if ((wdt_stop != 0x45) && (wdt_stop != wdt_start))
-                release_region(wdt_stop,1);
-        release_region(wdt_start,1);
+                release_region(wdt_stop, 1);
+        release_region(wdt_start, 1);
 }
 
 static int __init sbc60xxwdt_init(void)
 {
         int rc = -EBUSY;
 
-        if(timeout < 1 || timeout > 3600) /* arbitrary upper limit */
-        {
+        if (timeout < 1 || timeout > 3600) { /* arbitrary upper limit */
                 timeout = WATCHDOG_TIMEOUT;
-                printk(KERN_INFO PFX "timeout value must be 1<=x<=3600, using %d\n",
-                        timeout);
-        }
+                printk(KERN_INFO PFX
+                        "timeout value must be 1 <= x <= 3600, using %d\n",
+                                                                timeout);
+        }
 
-        if (!request_region(wdt_start, 1, "SBC 60XX WDT"))
-        {
+        if (!request_region(wdt_start, 1, "SBC 60XX WDT")) {
                 printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
                         wdt_start);
                 rc = -EIO;
@@ -348,33 +348,30 @@ static int __init sbc60xxwdt_init(void)
         }
 
         /* We cannot reserve 0x45 - the kernel already has! */
-        if ((wdt_stop != 0x45) && (wdt_stop != wdt_start))
-        {
-                if (!request_region(wdt_stop, 1, "SBC 60XX WDT"))
-                {
-                        printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
-                                wdt_stop);
+        if (wdt_stop != 0x45 && wdt_stop != wdt_start) {
+                if (!request_region(wdt_stop, 1, "SBC 60XX WDT")) {
+                        printk(KERN_ERR PFX
+                                "I/O address 0x%04x already in use\n",
+                                                        wdt_stop);
                         rc = -EIO;
                         goto err_out_region1;
                 }
         }
 
         rc = register_reboot_notifier(&wdt_notifier);
-        if (rc)
-        {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        rc);
+        if (rc) {
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", rc);
                 goto err_out_region2;
         }
 
         rc = misc_register(&wdt_miscdev);
-        if (rc)
-        {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        wdt_miscdev.minor, rc);
+        if (rc) {
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                wdt_miscdev.minor, rc);
                 goto err_out_reboot;
         }
-
         printk(KERN_INFO PFX "WDT driver for 60XX single board computer initialised. timeout=%d sec (nowayout=%d)\n",
                 timeout, nowayout);
 
@@ -383,10 +380,10 @@ static int __init sbc60xxwdt_init(void)
 err_out_reboot:
         unregister_reboot_notifier(&wdt_notifier);
 err_out_region2:
-        if ((wdt_stop != 0x45) && (wdt_stop != wdt_start))
-                release_region(wdt_stop,1);
+        if (wdt_stop != 0x45 && wdt_stop != wdt_start)
+                release_region(wdt_stop, 1);
 err_out_region1:
-        release_region(wdt_start,1);
+        release_region(wdt_start, 1);
 err_out:
         return rc;
 }
diff --git a/drivers/watchdog/sbc7240_wdt.c b/drivers/watchdog/sbc7240_wdt.c
index 4c8cefbd8627..67ddeb1c830a 100644
--- a/drivers/watchdog/sbc7240_wdt.c
+++ b/drivers/watchdog/sbc7240_wdt.c
@@ -27,10 +27,10 @@
 #include <linux/reboot.h>
 #include <linux/types.h>
 #include <linux/watchdog.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 #include <asm/atomic.h>
-#include <asm/io.h>
 #include <asm/system.h>
-#include <asm/uaccess.h>
 
 #define SBC7240_PREFIX "sbc7240_wdt: "
 
@@ -159,7 +159,7 @@ static int fop_close(struct inode *inode, struct file *file)
         return 0;
 }
 
-static struct watchdog_info ident = {
+static const struct watchdog_info ident = {
         .options = WDIOF_KEEPALIVEPING|
                    WDIOF_SETTIMEOUT|
                    WDIOF_MAGICCLOSE,
@@ -168,50 +168,50 @@ static struct watchdog_info ident = {
 };
 
 
-static int fop_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-                     unsigned long arg)
+static long fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         switch (cmd) {
         case WDIOC_GETSUPPORT:
-                return copy_to_user
-                        ((void __user *)arg, &ident, sizeof(ident))
-                         ? -EFAULT : 0;
+                return copy_to_user((void __user *)arg, &ident, sizeof(ident))
+                                                 ? -EFAULT : 0;
         case WDIOC_GETSTATUS:
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, (int __user *)arg);
-        case WDIOC_KEEPALIVE:
-                wdt_keepalive();
-                return 0;
-        case WDIOC_SETOPTIONS:{
-                        int options;
-                        int retval = -EINVAL;
+        case WDIOC_SETOPTIONS:
+        {
+                int options;
+                int retval = -EINVAL;
 
-                        if (get_user(options, (int __user *)arg))
-                                return -EFAULT;
+                if (get_user(options, (int __user *)arg))
+                        return -EFAULT;
 
-                        if (options & WDIOS_DISABLECARD) {
-                                wdt_disable();
-                                retval = 0;
-                        }
-
-                        if (options & WDIOS_ENABLECARD) {
-                                wdt_enable();
-                                retval = 0;
-                        }
+                if (options & WDIOS_DISABLECARD) {
+                        wdt_disable();
+                        retval = 0;
+                }
 
-                        return retval;
+                if (options & WDIOS_ENABLECARD) {
+                        wdt_enable();
+                        retval = 0;
                 }
-        case WDIOC_SETTIMEOUT:{
-                        int new_timeout;
 
-                        if (get_user(new_timeout, (int __user *)arg))
-                                return -EFAULT;
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                wdt_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+        {
+                int new_timeout;
 
-                        if (wdt_set_timeout(new_timeout))
-                                return -EINVAL;
+                if (get_user(new_timeout, (int __user *)arg))
+                        return -EFAULT;
 
-                        /* Fall through */
-                }
+                if (wdt_set_timeout(new_timeout))
+                        return -EINVAL;
+
+                /* Fall through */
+        }
         case WDIOC_GETTIMEOUT:
                 return put_user(timeout, (int __user *)arg);
         default:
@@ -225,7 +225,7 @@ static const struct file_operations wdt_fops = {
         .write = fop_write,
         .open = fop_open,
         .release = fop_close,
-        .ioctl = fop_ioctl,
+        .unlocked_ioctl = fop_ioctl,
 };
 
 static struct miscdevice wdt_miscdev = {
diff --git a/drivers/watchdog/sbc8360.c b/drivers/watchdog/sbc8360.c
index 2ee2677f3648..fd83dd052d8c 100644
--- a/drivers/watchdog/sbc8360.c
+++ b/drivers/watchdog/sbc8360.c
@@ -48,13 +48,12 @@
 #include <linux/init.h>
 #include <linux/spinlock.h>
 #include <linux/moduleparam.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 static unsigned long sbc8360_is_open;
-static DEFINE_SPINLOCK(sbc8360_lock);
 static char expect_close;
 
 #define PFX "sbc8360: "
@@ -204,7 +203,8 @@ module_param(timeout, int, 0);
 MODULE_PARM_DESC(timeout, "Index into timeout table (0-63) (default=27 (60s))");
 module_param(nowayout, int, 0);
 MODULE_PARM_DESC(nowayout,
-                 "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+                 "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  *      Kernel methods.
@@ -231,9 +231,16 @@ static void sbc8360_ping(void)
         outb(wd_margin, SBC8360_BASETIME);
 }
 
+/* stop watchdog */
+static void sbc8360_stop(void)
+{
+        /* De-activate the watchdog */
+        outb(0, SBC8360_ENABLE);
+}
+
 /* Userspace pings kernel driver, or requests clean close */
-static ssize_t sbc8360_write(struct file *file, const char __user * buf,
-                             size_t count, loff_t * ppos)
+static ssize_t sbc8360_write(struct file *file, const char __user *buf,
+                             size_t count, loff_t *ppos)
 {
         if (count) {
                 if (!nowayout) {
@@ -257,16 +264,12 @@ static ssize_t sbc8360_write(struct file *file, const char __user * buf,
 
 static int sbc8360_open(struct inode *inode, struct file *file)
 {
-        spin_lock(&sbc8360_lock);
-        if (test_and_set_bit(0, &sbc8360_is_open)) {
-                spin_unlock(&sbc8360_lock);
+        if (test_and_set_bit(0, &sbc8360_is_open))
                 return -EBUSY;
-        }
         if (nowayout)
                 __module_get(THIS_MODULE);
 
         /* Activate and ping once to start the countdown */
-        spin_unlock(&sbc8360_lock);
         sbc8360_activate();
         sbc8360_ping();
         return nonseekable_open(inode, file);
@@ -274,16 +277,14 @@ static int sbc8360_open(struct inode *inode, struct file *file)
 
 static int sbc8360_close(struct inode *inode, struct file *file)
 {
-        spin_lock(&sbc8360_lock);
         if (expect_close == 42)
-                outb(0, SBC8360_ENABLE);
+                sbc8360_stop();
         else
                 printk(KERN_CRIT PFX
-                       "SBC8360 device closed unexpectedly.  SBC8360 will not stop!\n");
+                        "SBC8360 device closed unexpectedly.  SBC8360 will not stop!\n");
 
         clear_bit(0, &sbc8360_is_open);
         expect_close = 0;
-        spin_unlock(&sbc8360_lock);
         return 0;
 }
 
@@ -294,10 +295,9 @@ static int sbc8360_close(struct inode *inode, struct file *file)
 static int sbc8360_notify_sys(struct notifier_block *this, unsigned long code,
                               void *unused)
 {
-        if (code == SYS_DOWN || code == SYS_HALT) {
-                /* Disable the SBC8360 Watchdog */
-                outb(0, SBC8360_ENABLE);
-        }
+        if (code == SYS_DOWN || code == SYS_HALT)
+                sbc8360_stop(); /* Disable the SBC8360 Watchdog */
+
         return NOTIFY_DONE;
 }
 
@@ -382,13 +382,13 @@ static int __init sbc8360_init(void)
 
         return 0;
 
-      out_nomisc:
+out_nomisc:
         unregister_reboot_notifier(&sbc8360_notifier);
-      out_noreboot:
+out_noreboot:
         release_region(SBC8360_BASETIME, 1);
-      out_nobasetimereg:
+out_nobasetimereg:
         release_region(SBC8360_ENABLE, 1);
-      out:
+out:
         return res;
 }
 
diff --git a/drivers/watchdog/sbc_epx_c3.c b/drivers/watchdog/sbc_epx_c3.c
index 82cbd8809a69..e5e470ca7759 100644
--- a/drivers/watchdog/sbc_epx_c3.c
+++ b/drivers/watchdog/sbc_epx_c3.c
@@ -25,8 +25,8 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
 
 #define PFX "epx_c3: "
 static int epx_c3_alive;
@@ -100,12 +100,12 @@ static ssize_t epx_c3_write(struct file *file, const char __user *data,
         return len;
 }
 
-static int epx_c3_ioctl(struct inode *inode, struct file *file,
-                        unsigned int cmd, unsigned long arg)
+static long epx_c3_ioctl(struct file *file, unsigned int cmd,
+                                                unsigned long arg)
 {
         int options, retval = -EINVAL;
         int __user *argp = (void __user *)arg;
-        static struct watchdog_info ident = {
+        static const struct watchdog_info ident = {
                 .options                = WDIOF_KEEPALIVEPING |
                                           WDIOF_MAGICCLOSE,
                 .firmware_version       = 0,
@@ -120,11 +120,6 @@ static int epx_c3_ioctl(struct inode *inode, struct file *file,
         case WDIOC_GETSTATUS:
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, argp);
-        case WDIOC_KEEPALIVE:
-                epx_c3_pet();
-                return 0;
-        case WDIOC_GETTIMEOUT:
-                return put_user(WATCHDOG_TIMEOUT, argp);
         case WDIOC_SETOPTIONS:
                 if (get_user(options, argp))
                         return -EFAULT;
@@ -140,6 +135,11 @@ static int epx_c3_ioctl(struct inode *inode, struct file *file,
                 }
 
                 return retval;
+        case WDIOC_KEEPALIVE:
+                epx_c3_pet();
+                return 0;
+        case WDIOC_GETTIMEOUT:
+                return put_user(WATCHDOG_TIMEOUT, argp);
         default:
                 return -ENOTTY;
         }
@@ -158,7 +158,7 @@ static const struct file_operations epx_c3_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = epx_c3_write,
-        .ioctl          = epx_c3_ioctl,
+        .unlocked_ioctl = epx_c3_ioctl,
         .open           = epx_c3_open,
         .release        = epx_c3_release,
 };
diff --git a/drivers/watchdog/sc1200wdt.c b/drivers/watchdog/sc1200wdt.c
index 621ebad56d86..23da3ccd832a 100644
--- a/drivers/watchdog/sc1200wdt.c
+++ b/drivers/watchdog/sc1200wdt.c
@@ -196,7 +196,6 @@ static long sc1200wdt_ioctl(struct file *file, unsigned int cmd,
         };
 
         switch (cmd) {
-
         case WDIOC_GETSUPPORT:
                 if (copy_to_user(argp, &ident, sizeof ident))
                         return -EFAULT;
@@ -208,24 +207,6 @@ static long sc1200wdt_ioctl(struct file *file, unsigned int cmd,
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, p);
 
-        case WDIOC_KEEPALIVE:
-                sc1200wdt_write_data(WDTO, timeout);
-                return 0;
-
-        case WDIOC_SETTIMEOUT:
-                if (get_user(new_timeout, p))
-                        return -EFAULT;
-                /* the API states this is given in secs */
-                new_timeout /= 60;
-                if (new_timeout < 0 || new_timeout > MAX_TIMEOUT)
-                        return -EINVAL;
-                timeout = new_timeout;
-                sc1200wdt_write_data(WDTO, timeout);
-                /* fall through and return the new timeout */
-
-        case WDIOC_GETTIMEOUT:
-                return put_user(timeout * 60, p);
-
         case WDIOC_SETOPTIONS:
         {
                 int options, retval = -EINVAL;
@@ -245,6 +226,24 @@ static long sc1200wdt_ioctl(struct file *file, unsigned int cmd,
 
                 return retval;
         }
+        case WDIOC_KEEPALIVE:
+                sc1200wdt_write_data(WDTO, timeout);
+                return 0;
+
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                /* the API states this is given in secs */
+                new_timeout /= 60;
+                if (new_timeout < 0 || new_timeout > MAX_TIMEOUT)
+                        return -EINVAL;
+                timeout = new_timeout;
+                sc1200wdt_write_data(WDTO, timeout);
+                /* fall through and return the new timeout */
+
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout * 60, p);
+
         default:
                 return -ENOTTY;
         }
@@ -280,7 +279,7 @@ static ssize_t sc1200wdt_write(struct file *file, const char __user *data,
                         for (i = 0; i != len; i++) {
                                 char c;
 
-                                if (get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_close = 42;
diff --git a/drivers/watchdog/sc520_wdt.c b/drivers/watchdog/sc520_wdt.c
index 2847324a2be2..a2b6c1067ec5 100644
--- a/drivers/watchdog/sc520_wdt.c
+++ b/drivers/watchdog/sc520_wdt.c
@@ -64,9 +64,9 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/jiffies.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 #define OUR_NAME "sc520_wdt"
@@ -91,13 +91,18 @@
  */
 
 #define WATCHDOG_TIMEOUT 30             /* 30 sec default timeout */
-static int timeout = WATCHDOG_TIMEOUT;  /* in seconds, will be multiplied by HZ to get seconds to wait for a ping */
+/* in seconds, will be multiplied by HZ to get seconds to wait for a ping */
+static int timeout = WATCHDOG_TIMEOUT;
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=3600, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+        "Watchdog timeout in seconds. (1 <= timeout <= 3600, default="
+                                __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  * AMD Elan SC520 - Watchdog Timer Registers
@@ -136,8 +141,7 @@ static void wdt_timer_ping(unsigned long data)
         /* If we got a heartbeat pulse within the WDT_US_INTERVAL
          * we agree to ping the WDT
          */
-        if(time_before(jiffies, next_heartbeat))
-        {
+        if (time_before(jiffies, next_heartbeat)) {
                 /* Ping the WDT */
                 spin_lock(&wdt_spinlock);
                 writew(0xAAAA, wdtmrctl);
@@ -146,9 +150,9 @@ static void wdt_timer_ping(unsigned long data)
 
                 /* Re-set the timer interval */
                 mod_timer(&timer, jiffies + WDT_INTERVAL);
-        } else {
-                printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n");
-        }
+        } else
+                printk(KERN_WARNING PFX
+                        "Heartbeat lost! Will not ping the watchdog\n");
 }
 
 /*
@@ -162,7 +166,7 @@ static void wdt_config(int writeval)
 
         /* buy some time (ping) */
         spin_lock_irqsave(&wdt_spinlock, flags);
-        dummy=readw(wdtmrctl);  /* ensure write synchronization */
+        dummy = readw(wdtmrctl);        /* ensure write synchronization */
         writew(0xAAAA, wdtmrctl);
         writew(0x5555, wdtmrctl);
         /* unlock WDT = make WDT configuration register writable one time */
@@ -219,10 +223,11 @@ static int wdt_set_heartbeat(int t)
  *      /dev/watchdog handling
  */
 
-static ssize_t fop_write(struct file * file, const char __user * buf, size_t count, loff_t * ppos)
+static ssize_t fop_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
-        if(count) {
+        if (count) {
                 if (!nowayout) {
                         size_t ofs;
 
@@ -231,25 +236,26 @@ static ssize_t fop_write(struct file * file, const char __user * buf, size_t cou
                         wdt_expect_close = 0;
 
                         /* now scan */
-                        for(ofs = 0; ofs != count; ofs++) {
+                        for (ofs = 0; ofs != count; ofs++) {
                                 char c;
                                 if (get_user(c, buf + ofs))
                                         return -EFAULT;
-                                if(c == 'V')
+                                if (c == 'V')
                                         wdt_expect_close = 42;
                         }
                 }
 
-                /* Well, anyhow someone wrote to us, we should return that favour */
+                /* Well, anyhow someone wrote to us, we should
+                   return that favour */
                 wdt_keepalive();
         }
         return count;
 }
 
-static int fop_open(struct inode * inode, struct file * file)
+static int fop_open(struct inode *inode, struct file *file)
 {
         /* Just in case we're already talking to someone... */
-        if(test_and_set_bit(0, &wdt_is_open))
+        if (test_and_set_bit(0, &wdt_is_open))
                 return -EBUSY;
         if (nowayout)
                 __module_get(THIS_MODULE);
@@ -259,12 +265,13 @@ static int fop_open(struct inode * inode, struct file * file)
         return nonseekable_open(inode, file);
 }
 
-static int fop_close(struct inode * inode, struct file * file)
+static int fop_close(struct inode *inode, struct file *file)
 {
-        if(wdt_expect_close == 42) {
+        if (wdt_expect_close == 42)
                 wdt_turnoff();
-        } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+        else {
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
                 wdt_keepalive();
         }
         clear_bit(0, &wdt_is_open);
@@ -272,63 +279,62 @@ static int fop_close(struct inode * inode, struct file * file)
         return 0;
 }
 
-static int fop_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-        unsigned long arg)
+static long fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
-        static struct watchdog_info ident = {
-                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+        static const struct watchdog_info ident = {
+                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
+                                                        | WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = "SC520",
         };
 
-        switch(cmd)
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
         {
-                default:
-                        return -ENOTTY;
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident, sizeof(ident))?-EFAULT:0;
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-                case WDIOC_KEEPALIVE:
-                        wdt_keepalive();
-                        return 0;
-                case WDIOC_SETOPTIONS:
-                {
-                        int new_options, retval = -EINVAL;
-
-                        if(get_user(new_options, p))
-                                return -EFAULT;
-
-                        if(new_options & WDIOS_DISABLECARD) {
-                                wdt_turnoff();
-                                retval = 0;
-                        }
+                int new_options, retval = -EINVAL;
 
-                        if(new_options & WDIOS_ENABLECARD) {
-                                wdt_startup();
-                                retval = 0;
-                        }
+                if (get_user(new_options, p))
+                        return -EFAULT;
 
-                        return retval;
+                if (new_options & WDIOS_DISABLECARD) {
+                        wdt_turnoff();
+                        retval = 0;
                 }
-                case WDIOC_SETTIMEOUT:
-                {
-                        int new_timeout;
 
-                        if(get_user(new_timeout, p))
-                                return -EFAULT;
+                if (new_options & WDIOS_ENABLECARD) {
+                        wdt_startup();
+                        retval = 0;
+                }
 
-                        if(wdt_set_heartbeat(new_timeout))
-                                return -EINVAL;
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                wdt_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+        {
+                int new_timeout;
 
-                        wdt_keepalive();
-                        /* Fall through */
-                }
-                case WDIOC_GETTIMEOUT:
-                        return put_user(timeout, p);
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+
+                if (wdt_set_heartbeat(new_timeout))
+                        return -EINVAL;
+
+                wdt_keepalive();
+                /* Fall through */
+        }
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -338,7 +344,7 @@ static const struct file_operations wdt_fops = {
         .write          = fop_write,
         .open           = fop_open,
         .release        = fop_close,
-        .ioctl          = fop_ioctl,
+        .unlocked_ioctl = fop_ioctl,
 };
 
 static struct miscdevice wdt_miscdev = {
@@ -354,7 +360,7 @@ static struct miscdevice wdt_miscdev = {
 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if(code==SYS_DOWN || code==SYS_HALT)
+        if (code == SYS_DOWN || code == SYS_HALT)
                 wdt_turnoff();
         return NOTIFY_DONE;
 }
@@ -383,11 +389,13 @@ static int __init sc520_wdt_init(void)
 {
         int rc = -EBUSY;
 
-        /* Check that the timeout value is within it's range ; if not reset to the default */
+        /* Check that the timeout value is within it's range ;
+           if not reset to the default */
         if (wdt_set_heartbeat(timeout)) {
                 wdt_set_heartbeat(WATCHDOG_TIMEOUT);
-                printk(KERN_INFO PFX "timeout value must be 1<=timeout<=3600, using %d\n",
-                        WATCHDOG_TIMEOUT);
+                printk(KERN_INFO PFX
+                    "timeout value must be 1 <= timeout <= 3600, using %d\n",
+                                                        WATCHDOG_TIMEOUT);
         }
 
         wdtmrctl = ioremap((unsigned long)(MMCR_BASE + OFFS_WDTMRCTL), 2);
@@ -399,20 +407,22 @@ static int __init sc520_wdt_init(void)
 
         rc = register_reboot_notifier(&wdt_notifier);
         if (rc) {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        rc);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", rc);
                 goto err_out_ioremap;
         }
 
         rc = misc_register(&wdt_miscdev);
         if (rc) {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, rc);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        WATCHDOG_MINOR, rc);
                 goto err_out_notifier;
         }
 
-        printk(KERN_INFO PFX "WDT driver for SC520 initialised. timeout=%d sec (nowayout=%d)\n",
-                timeout,nowayout);
+        printk(KERN_INFO PFX
+           "WDT driver for SC520 initialised. timeout=%d sec (nowayout=%d)\n",
+                                                        timeout, nowayout);
 
         return 0;
 
diff --git a/drivers/watchdog/scx200_wdt.c b/drivers/watchdog/scx200_wdt.c
index d55882bca319..9e19a10a5bb9 100644
--- a/drivers/watchdog/scx200_wdt.c
+++ b/drivers/watchdog/scx200_wdt.c
@@ -27,9 +27,8 @@
 #include <linux/fs.h>
 #include <linux/ioport.h>
 #include <linux/scx200.h>
-
-#include <asm/uaccess.h>
-#include <asm/io.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
 
 #define NAME "scx200_wdt"
 
@@ -47,8 +46,9 @@ module_param(nowayout, int, 0);
 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
 
 static u16 wdto_restart;
-static struct semaphore open_semaphore;
 static char expect_close;
+static unsigned long open_lock;
+static DEFINE_SPINLOCK(scx_lock);
 
 /* Bits of the WDCNFG register */
 #define W_ENABLE 0x00fa         /* Enable watchdog */
@@ -59,7 +59,9 @@ static char expect_close;
 
 static void scx200_wdt_ping(void)
 {
+        spin_lock(&scx_lock);
         outw(wdto_restart, scx200_cb_base + SCx200_WDT_WDTO);
+        spin_unlock(&scx_lock);
 }
 
 static void scx200_wdt_update_margin(void)
@@ -73,9 +75,11 @@ static void scx200_wdt_enable(void)
         printk(KERN_DEBUG NAME ": enabling watchdog timer, wdto_restart = %d\n",
                wdto_restart);
 
+        spin_lock(&scx_lock);
         outw(0, scx200_cb_base + SCx200_WDT_WDTO);
         outb(SCx200_WDT_WDSTS_WDOVF, scx200_cb_base + SCx200_WDT_WDSTS);
         outw(W_ENABLE, scx200_cb_base + SCx200_WDT_WDCNFG);
+        spin_unlock(&scx_lock);
 
         scx200_wdt_ping();
 }
@@ -84,15 +88,17 @@ static void scx200_wdt_disable(void)
 {
         printk(KERN_DEBUG NAME ": disabling watchdog timer\n");
 
+        spin_lock(&scx_lock);
         outw(0, scx200_cb_base + SCx200_WDT_WDTO);
         outb(SCx200_WDT_WDSTS_WDOVF, scx200_cb_base + SCx200_WDT_WDSTS);
         outw(W_DISABLE, scx200_cb_base + SCx200_WDT_WDCNFG);
+        spin_unlock(&scx_lock);
 }
 
 static int scx200_wdt_open(struct inode *inode, struct file *file)
 {
         /* only allow one at a time */
-        if (down_trylock(&open_semaphore))
+        if (test_and_set_bit(0, &open_lock))
                 return -EBUSY;
         scx200_wdt_enable();
 
@@ -101,13 +107,12 @@ static int scx200_wdt_open(struct inode *inode, struct file *file)
 
 static int scx200_wdt_release(struct inode *inode, struct file *file)
 {
-        if (expect_close != 42) {
+        if (expect_close != 42)
                 printk(KERN_WARNING NAME ": watchdog device closed unexpectedly, will not disable the watchdog timer\n");
-        } else if (!nowayout) {
+        else if (!nowayout)
                 scx200_wdt_disable();
-        }
         expect_close = 0;
-        up(&open_semaphore);
+        clear_bit(0, &open_lock);
 
         return 0;
 }
@@ -122,8 +127,7 @@ static int scx200_wdt_notify_sys(struct notifier_block *this,
         return NOTIFY_DONE;
 }
 
-static struct notifier_block scx200_wdt_notifier =
-{
+static struct notifier_block scx200_wdt_notifier = {
         .notifier_call = scx200_wdt_notify_sys,
 };
 
@@ -131,8 +135,7 @@ static ssize_t scx200_wdt_write(struct file *file, const char __user *data,
                                      size_t len, loff_t *ppos)
 {
         /* check for a magic close character */
-        if (len)
-        {
+        if (len) {
                 size_t i;
 
                 scx200_wdt_ping();
@@ -140,7 +143,7 @@ static ssize_t scx200_wdt_write(struct file *file, const char __user *data,
                 expect_close = 0;
                 for (i = 0; i < len; ++i) {
                         char c;
-                        if (get_user(c, data+i))
+                        if (get_user(c, data + i))
                                 return -EFAULT;
                         if (c == 'V')
                                 expect_close = 42;
@@ -152,23 +155,21 @@ static ssize_t scx200_wdt_write(struct file *file, const char __user *data,
         return 0;
 }
 
-static int scx200_wdt_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long scx200_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
-        static struct watchdog_info ident = {
+        static const struct watchdog_info ident = {
                 .identity = "NatSemi SCx200 Watchdog",
                 .firmware_version = 1,
-                .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING),
+                .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
         };
         int new_margin;
 
         switch (cmd) {
-        default:
-                return -ENOTTY;
         case WDIOC_GETSUPPORT:
-                if(copy_to_user(argp, &ident, sizeof(ident)))
+                if (copy_to_user(argp, &ident, sizeof(ident)))
                         return -EFAULT;
                 return 0;
         case WDIOC_GETSTATUS:
@@ -191,22 +192,24 @@ static int scx200_wdt_ioctl(struct inode *inode, struct file *file,
                 if (put_user(margin, p))
                         return -EFAULT;
                 return 0;
+        default:
+                return -ENOTTY;
         }
 }
 
 static const struct file_operations scx200_wdt_fops = {
-        .owner   = THIS_MODULE,
-        .llseek  = no_llseek,
-        .write   = scx200_wdt_write,
-        .ioctl   = scx200_wdt_ioctl,
-        .open    = scx200_wdt_open,
+        .owner = THIS_MODULE,
+        .llseek = no_llseek,
+        .write = scx200_wdt_write,
+        .unlocked_ioctl = scx200_wdt_ioctl,
+        .open = scx200_wdt_open,
         .release = scx200_wdt_release,
 };
 
 static struct miscdevice scx200_wdt_miscdev = {
         .minor = WATCHDOG_MINOR,
-        .name  = "watchdog",
-        .fops  = &scx200_wdt_fops,
+        .name = "watchdog",
+        .fops = &scx200_wdt_fops,
 };
 
 static int __init scx200_wdt_init(void)
@@ -229,8 +232,6 @@ static int __init scx200_wdt_init(void)
         scx200_wdt_update_margin();
         scx200_wdt_disable();
 
-        sema_init(&open_semaphore, 1);
-
         r = register_reboot_notifier(&scx200_wdt_notifier);
         if (r) {
                 printk(KERN_ERR NAME ": unable to register reboot notifier");
@@ -263,7 +264,7 @@ module_exit(scx200_wdt_cleanup);
 
 /*
     Local variables:
-        compile-command: "make -k -C ../.. SUBDIRS=drivers/char modules"
-        c-basic-offset: 8
+        compile-command: "make -k -C ../.. SUBDIRS=drivers/char modules"
+        c-basic-offset: 8
     End:
 */
diff --git a/drivers/watchdog/shwdt.c b/drivers/watchdog/shwdt.c
index 1277f7e9cc54..cdc7138be301 100644
--- a/drivers/watchdog/shwdt.c
+++ b/drivers/watchdog/shwdt.c
@@ -28,8 +28,8 @@
 #include <linux/ioport.h>
 #include <linux/fs.h>
 #include <linux/mm.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 #include <asm/watchdog.h>
 
 #define PFX "shwdt: "
@@ -68,10 +68,11 @@ static int clock_division_ratio = WTCSR_CKS_4096;
 static void sh_wdt_ping(unsigned long data);
 
 static unsigned long shwdt_is_open;
-static struct watchdog_info sh_wdt_info;
+static const struct watchdog_info sh_wdt_info;
 static char shwdt_expect_close;
 static DEFINE_TIMER(timer, sh_wdt_ping, 0, 0);
 static unsigned long next_heartbeat;
+static DEFINE_SPINLOCK(shwdt_lock);
 
 #define WATCHDOG_HEARTBEAT 30                   /* 30 sec default heartbeat */
 static int heartbeat = WATCHDOG_HEARTBEAT;      /* in seconds */
@@ -86,6 +87,9 @@ static int nowayout = WATCHDOG_NOWAYOUT;
 static void sh_wdt_start(void)
 {
         __u8 csr;
+        unsigned long flags;
+
+        spin_lock_irqsave(&shwdt_lock, flags);
 
         next_heartbeat = jiffies + (heartbeat * HZ);
         mod_timer(&timer, next_ping_period(clock_division_ratio));
@@ -123,6 +127,7 @@ static void sh_wdt_start(void)
         csr &= ~RSTCSR_RSTS;
         sh_wdt_write_rstcsr(csr);
 #endif
+        spin_unlock_irqrestore(&shwdt_lock, flags);
 }
 
 /**
@@ -132,12 +137,16 @@ static void sh_wdt_start(void)
 static void sh_wdt_stop(void)
 {
         __u8 csr;
+        unsigned long flags;
+
+        spin_lock_irqsave(&shwdt_lock, flags);
 
         del_timer(&timer);
 
         csr = sh_wdt_read_csr();
         csr &= ~WTCSR_TME;
         sh_wdt_write_csr(csr);
+        spin_unlock_irqrestore(&shwdt_lock, flags);
 }
 
 /**
@@ -146,7 +155,11 @@ static void sh_wdt_stop(void)
  */
 static inline void sh_wdt_keepalive(void)
 {
+        unsigned long flags;
+
+        spin_lock_irqsave(&shwdt_lock, flags);
         next_heartbeat = jiffies + (heartbeat * HZ);
+        spin_unlock_irqrestore(&shwdt_lock, flags);
 }
 
 /**
@@ -155,10 +168,14 @@ static inline void sh_wdt_keepalive(void)
  */
 static int sh_wdt_set_heartbeat(int t)
 {
-        if (unlikely((t < 1) || (t > 3600))) /* arbitrary upper limit */
+        unsigned long flags;
+
+        if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
                 return -EINVAL;
 
+        spin_lock_irqsave(&shwdt_lock, flags);
         heartbeat = t;
+        spin_unlock_irqrestore(&shwdt_lock, flags);
         return 0;
 }
 
@@ -170,6 +187,9 @@ static int sh_wdt_set_heartbeat(int t)
  */
 static void sh_wdt_ping(unsigned long data)
 {
+        unsigned long flags;
+
+        spin_lock_irqsave(&shwdt_lock, flags);
         if (time_before(jiffies, next_heartbeat)) {
                 __u8 csr;
 
@@ -183,6 +203,7 @@ static void sh_wdt_ping(unsigned long data)
         } else
                 printk(KERN_WARNING PFX "Heartbeat lost! Will not ping "
                        "the watchdog\n");
+        spin_unlock_irqrestore(&shwdt_lock, flags);
 }
 
 /**
@@ -310,7 +331,6 @@ static int sh_wdt_mmap(struct file *file, struct vm_area_struct *vma)
 
 /**
  *      sh_wdt_ioctl - Query Device
- *      @inode: inode of device
  *      @file: file handle of device
  *      @cmd: watchdog command
  *      @arg: argument
@@ -318,53 +338,51 @@ static int sh_wdt_mmap(struct file *file, struct vm_area_struct *vma)
  *      Query basic information from the device or ping it, as outlined by the
  *      watchdog API.
  */
-static int sh_wdt_ioctl(struct inode *inode, struct file *file,
-                        unsigned int cmd, unsigned long arg)
+static long sh_wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int new_heartbeat;
         int options, retval = -EINVAL;
 
         switch (cmd) {
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user((struct watchdog_info *)arg,
-                                          &sh_wdt_info,
-                                          sizeof(sh_wdt_info)) ? -EFAULT : 0;
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, (int *)arg);
-                case WDIOC_KEEPALIVE:
-                        sh_wdt_keepalive();
-                        return 0;
-                case WDIOC_SETTIMEOUT:
-                        if (get_user(new_heartbeat, (int *)arg))
-                                return -EFAULT;
-
-                        if (sh_wdt_set_heartbeat(new_heartbeat))
-                                return -EINVAL;
-
-                        sh_wdt_keepalive();
-                        /* Fall */
-                case WDIOC_GETTIMEOUT:
-                        return put_user(heartbeat, (int *)arg);
-                case WDIOC_SETOPTIONS:
-                        if (get_user(options, (int *)arg))
-                                return -EFAULT;
-
-                        if (options & WDIOS_DISABLECARD) {
-                                sh_wdt_stop();
-                                retval = 0;
-                        }
+        case WDIOC_GETSUPPORT:
+                return copy_to_user((struct watchdog_info *)arg,
+                          &sh_wdt_info, sizeof(sh_wdt_info)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, (int *)arg);
+        case WDIOC_SETOPTIONS:
+                if (get_user(options, (int *)arg))
+                        return -EFAULT;
+
+                if (options & WDIOS_DISABLECARD) {
+                        sh_wdt_stop();
+                        retval = 0;
+                }
 
-                        if (options & WDIOS_ENABLECARD) {
-                                sh_wdt_start();
-                                retval = 0;
-                        }
+                if (options & WDIOS_ENABLECARD) {
+                        sh_wdt_start();
+                        retval = 0;
+                }
 
-                        return retval;
-                default:
-                        return -ENOTTY;
-        }
+                return retval;
+        case WDIOC_KEEPALIVE:
+                sh_wdt_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_heartbeat, (int *)arg))
+                        return -EFAULT;
 
+                if (sh_wdt_set_heartbeat(new_heartbeat))
+                        return -EINVAL;
+
+                sh_wdt_keepalive();
+                /* Fall */
+        case WDIOC_GETTIMEOUT:
+                return put_user(heartbeat, (int *)arg);
+        default:
+                return -ENOTTY;
+        }
         return 0;
 }
 
@@ -390,13 +408,13 @@ static const struct file_operations sh_wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = sh_wdt_write,
-        .ioctl          = sh_wdt_ioctl,
+        .unlocked_ioctl = sh_wdt_ioctl,
         .open           = sh_wdt_open,
         .release        = sh_wdt_close,
         .mmap           = sh_wdt_mmap,
 };
 
-static struct watchdog_info sh_wdt_info = {
+static const struct watchdog_info sh_wdt_info = {
         .options                = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
                                   WDIOF_MAGICCLOSE,
         .firmware_version       = 1,
@@ -422,30 +440,33 @@ static int __init sh_wdt_init(void)
 {
         int rc;
 
-        if ((clock_division_ratio < 0x5) || (clock_division_ratio > 0x7)) {
+        if (clock_division_ratio < 0x5 || clock_division_ratio > 0x7) {
                 clock_division_ratio = WTCSR_CKS_4096;
-                printk(KERN_INFO PFX "clock_division_ratio value must "
-                       "be 0x5<=x<=0x7, using %d\n", clock_division_ratio);
+                printk(KERN_INFO PFX
+                  "clock_division_ratio value must be 0x5<=x<=0x7, using %d\n",
+                                clock_division_ratio);
         }
 
         rc = sh_wdt_set_heartbeat(heartbeat);
         if (unlikely(rc)) {
                 heartbeat = WATCHDOG_HEARTBEAT;
-                printk(KERN_INFO PFX "heartbeat value must "
-                       "be 1<=x<=3600, using %d\n", heartbeat);
+                printk(KERN_INFO PFX
+                        "heartbeat value must be 1<=x<=3600, using %d\n",
+                                                                heartbeat);
         }
 
         rc = register_reboot_notifier(&sh_wdt_notifier);
         if (unlikely(rc)) {
-                printk(KERN_ERR PFX "Can't register reboot notifier (err=%d)\n",
-                       rc);
+                printk(KERN_ERR PFX
+                        "Can't register reboot notifier (err=%d)\n", rc);
                 return rc;
         }
 
         rc = misc_register(&sh_wdt_miscdev);
         if (unlikely(rc)) {
-                printk(KERN_ERR PFX "Can't register miscdev on "
-                       "minor=%d (err=%d)\n", sh_wdt_miscdev.minor, rc);
+                printk(KERN_ERR PFX
+                        "Can't register miscdev on minor=%d (err=%d)\n",
+                                                sh_wdt_miscdev.minor, rc);
                 unregister_reboot_notifier(&sh_wdt_notifier);
                 return rc;
         }
@@ -476,10 +497,14 @@ module_param(clock_division_ratio, int, 0);
 MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). (default=" __MODULE_STRING(clock_division_ratio) ")");
 
 module_param(heartbeat, int, 0);
-MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<=heartbeat<=3600, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
+MODULE_PARM_DESC(heartbeat,
+        "Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
+                                __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
 
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 module_init(sh_wdt_init);
 module_exit(sh_wdt_exit);
diff --git a/drivers/watchdog/smsc37b787_wdt.c b/drivers/watchdog/smsc37b787_wdt.c
index 5d2b5ba61414..988ff1d5b4be 100644
--- a/drivers/watchdog/smsc37b787_wdt.c
+++ b/drivers/watchdog/smsc37b787_wdt.c
@@ -18,7 +18,7 @@
  *  History:
  *      2003 - Created version 1.0 for Linux 2.4.x.
  *      2006 - Ported to Linux 2.6, added nowayout and MAGICCLOSE
- *             features. Released version 1.1
+ *             features. Released version 1.1
  *
  *  Theory of operation:
  *
@@ -55,9 +55,9 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 /* enable support for minutes as units? */
@@ -71,15 +71,15 @@
 #define UNIT_MINUTE     1
 
 #define MODNAME         "smsc37b787_wdt: "
-#define VERSION         "1.1"
+#define VERSION         "1.1"
 
-#define IOPORT          0x3F0
+#define IOPORT          0x3F0
 #define IOPORT_SIZE     2
-#define IODEV_NO        8
+#define IODEV_NO        8
 
-static int unit = UNIT_SECOND;  /* timer's unit */
-static int timeout = 60;        /* timeout value: default is 60 "units" */
-static unsigned long timer_enabled = 0;   /* is the timer enabled? */
+static int unit = UNIT_SECOND;  /* timer's unit */
+static int timeout = 60;        /* timeout value: default is 60 "units" */
+static unsigned long timer_enabled;   /* is the timer enabled? */
 
 static char expect_close;       /* is the close expected? */
 
@@ -93,114 +93,121 @@ static int nowayout = WATCHDOG_NOWAYOUT;
 
 static inline void open_io_config(void)
 {
-        outb(0x55, IOPORT);
+        outb(0x55, IOPORT);
         mdelay(1);
-        outb(0x55, IOPORT);
+        outb(0x55, IOPORT);
 }
 
 /* lock the IO chip */
 static inline void close_io_config(void)
 {
-        outb(0xAA, IOPORT);
+        outb(0xAA, IOPORT);
 }
 
 /* select the IO device */
 static inline void select_io_device(unsigned char devno)
 {
-        outb(0x07, IOPORT);
-        outb(devno, IOPORT+1);
+        outb(0x07, IOPORT);
+        outb(devno, IOPORT+1);
 }
 
 /* write to the control register */
 static inline void write_io_cr(unsigned char reg, unsigned char data)
 {
-        outb(reg, IOPORT);
-        outb(data, IOPORT+1);
+        outb(reg, IOPORT);
+        outb(data, IOPORT+1);
 }
 
 /* read from the control register */
 static inline char read_io_cr(unsigned char reg)
 {
-        outb(reg, IOPORT);
-        return inb(IOPORT+1);
+        outb(reg, IOPORT);
+        return inb(IOPORT+1);
 }
 
 /* -- Medium level functions ------------------------------------*/
 
 static inline void gpio_bit12(unsigned char reg)
 {
-        // -- General Purpose I/O Bit 1.2 --
-        // Bit 0,   In/Out: 0 = Output, 1 = Input
-        // Bit 1,   Polarity: 0 = No Invert, 1 = Invert
-        // Bit 2,   Group Enable Intr.: 0 = Disable, 1 = Enable
-        // Bit 3/4, Function select: 00 = GPI/O, 01 = WDT, 10 = P17,
-        //                           11 = Either Edge Triggered Intr. 2
-        // Bit 5/6  (Reserved)
-        // Bit 7,   Output Type: 0 = Push Pull Bit, 1 = Open Drain
-        write_io_cr(0xE2, reg);
+        /* -- General Purpose I/O Bit 1.2 --
+         * Bit 0,   In/Out: 0 = Output, 1 = Input
+         * Bit 1,   Polarity: 0 = No Invert, 1 = Invert
+         * Bit 2,   Group Enable Intr.: 0 = Disable, 1 = Enable
+         * Bit 3/4, Function select: 00 = GPI/O, 01 = WDT, 10 = P17,
+         *                           11 = Either Edge Triggered Intr. 2
+         * Bit 5/6  (Reserved)
+         * Bit 7,   Output Type: 0 = Push Pull Bit, 1 = Open Drain
+         */
+        write_io_cr(0xE2, reg);
 }
 
 static inline void gpio_bit13(unsigned char reg)
 {
-        // -- General Purpose I/O Bit 1.3 --
-        // Bit 0,  In/Out: 0 = Output, 1 = Input
-        // Bit 1,  Polarity: 0 = No Invert, 1 = Invert
-        // Bit 2,  Group Enable Intr.: 0 = Disable, 1 = Enable
-        // Bit 3,  Function select: 0 = GPI/O, 1 = LED
-        // Bit 4-6 (Reserved)
-        // Bit 7,  Output Type: 0 = Push Pull Bit, 1 = Open Drain
-        write_io_cr(0xE3, reg);
+        /* -- General Purpose I/O Bit 1.3 --
+         * Bit 0,  In/Out: 0 = Output, 1 = Input
+         * Bit 1,  Polarity: 0 = No Invert, 1 = Invert
+         * Bit 2,  Group Enable Intr.: 0 = Disable, 1 = Enable
+         * Bit 3,  Function select: 0 = GPI/O, 1 = LED
+         * Bit 4-6 (Reserved)
+         * Bit 7,  Output Type: 0 = Push Pull Bit, 1 = Open Drain
+         */
+        write_io_cr(0xE3, reg);
 }
 
 static inline void wdt_timer_units(unsigned char new_units)
 {
-        // -- Watchdog timer units --
-        // Bit 0-6 (Reserved)
-        // Bit 7,  WDT Time-out Value Units Select
-        //         (0 = Minutes, 1 = Seconds)
-        write_io_cr(0xF1, new_units);
+        /* -- Watchdog timer units --
+         * Bit 0-6 (Reserved)
+         * Bit 7,  WDT Time-out Value Units Select
+         *         (0 = Minutes, 1 = Seconds)
+         */
+        write_io_cr(0xF1, new_units);
 }
 
 static inline void wdt_timeout_value(unsigned char new_timeout)
 {
-        // -- Watchdog Timer Time-out Value --
-        // Bit 0-7 Binary coded units (0=Disabled, 1..255)
-        write_io_cr(0xF2, new_timeout);
+        /* -- Watchdog Timer Time-out Value --
+         * Bit 0-7 Binary coded units (0=Disabled, 1..255)
+         */
+        write_io_cr(0xF2, new_timeout);
 }
 
 static inline void wdt_timer_conf(unsigned char conf)
 {
-        // -- Watchdog timer configuration --
-        // Bit 0   Joystick enable: 0* = No Reset, 1 = Reset WDT upon Gameport I/O
-        // Bit 1   Keyboard enable: 0* = No Reset, 1 = Reset WDT upon KBD Intr.
-        // Bit 2   Mouse enable: 0* = No Reset, 1 = Reset WDT upon Mouse Intr.
-        // Bit 3   Reset the timer
-        //         (Wrong in SMsC documentation? Given as: PowerLED Timout Enabled)
-        // Bit 4-7 WDT Interrupt Mapping: (0000* = Disabled,
-        //            0001=IRQ1, 0010=(Invalid), 0011=IRQ3 to 1111=IRQ15)
-        write_io_cr(0xF3, conf);
+        /* -- Watchdog timer configuration --
+         * Bit 0   Joystick enable: 0* = No Reset, 1 = Reset WDT upon
+         *                                                      Gameport I/O
+         * Bit 1   Keyboard enable: 0* = No Reset, 1 = Reset WDT upon KBD Intr.
+         * Bit 2   Mouse enable: 0* = No Reset, 1 = Reset WDT upon Mouse Intr
+         * Bit 3   Reset the timer
+         *         (Wrong in SMsC documentation? Given as: PowerLED Timout
+         *                                                      Enabled)
+         * Bit 4-7 WDT Interrupt Mapping: (0000* = Disabled,
+         *            0001=IRQ1, 0010=(Invalid), 0011=IRQ3 to 1111=IRQ15)
+         */
+        write_io_cr(0xF3, conf);
 }
 
 static inline void wdt_timer_ctrl(unsigned char reg)
 {
-        // -- Watchdog timer control --
-        // Bit 0   Status Bit: 0 = Timer counting, 1 = Timeout occured
-        // Bit 1   Power LED Toggle: 0 = Disable Toggle, 1 = Toggle at 1 Hz
-        // Bit 2   Force Timeout: 1 = Forces WD timeout event (self-cleaning)
-        // Bit 3   P20 Force Timeout enabled:
-        //          0 = P20 activity does not generate the WD timeout event
-        //          1 = P20 Allows rising edge of P20, from the keyboard
-        //              controller, to force the WD timeout event.
-        // Bit 4   (Reserved)
-        // -- Soft power management --
-        // Bit 5   Stop Counter: 1 = Stop software power down counter
-        //            set via register 0xB8, (self-cleaning)
-        //            (Upon read: 0 = Counter running, 1 = Counter stopped)
-        // Bit 6   Restart Counter: 1 = Restart software power down counter
-        //            set via register 0xB8, (self-cleaning)
-        // Bit 7   SPOFF: 1 = Force software power down (self-cleaning)
-
-        write_io_cr(0xF4, reg);
+        /* -- Watchdog timer control --
+         * Bit 0   Status Bit: 0 = Timer counting, 1 = Timeout occured
+         * Bit 1   Power LED Toggle: 0 = Disable Toggle, 1 = Toggle at 1 Hz
+         * Bit 2   Force Timeout: 1 = Forces WD timeout event (self-cleaning)
+         * Bit 3   P20 Force Timeout enabled:
+         *          0 = P20 activity does not generate the WD timeout event
+         *          1 = P20 Allows rising edge of P20, from the keyboard
+         *              controller, to force the WD timeout event.
+         * Bit 4   (Reserved)
+         * -- Soft power management --
+         * Bit 5   Stop Counter: 1 = Stop software power down counter
+         *            set via register 0xB8, (self-cleaning)
+         *            (Upon read: 0 = Counter running, 1 = Counter stopped)
+         * Bit 6   Restart Counter: 1 = Restart software power down counter
+         *            set via register 0xB8, (self-cleaning)
+         * Bit 7   SPOFF: 1 = Force software power down (self-cleaning)
+         */
+        write_io_cr(0xF4, reg);
 }
 
 /* -- Higher level functions ------------------------------------*/
@@ -209,33 +216,34 @@ static inline void wdt_timer_ctrl(unsigned char reg)
 
 static void wb_smsc_wdt_initialize(void)
 {
-        unsigned char old;
+        unsigned char old;
 
         spin_lock(&io_lock);
-        open_io_config();
-        select_io_device(IODEV_NO);
+        open_io_config();
+        select_io_device(IODEV_NO);
 
-        // enable the watchdog
-        gpio_bit13(0x08);  // Select pin 80 = LED not GPIO
-        gpio_bit12(0x0A);  // Set pin 79 = WDT not GPIO/Output/Polarity=Invert
+        /* enable the watchdog */
+        gpio_bit13(0x08);  /* Select pin 80 = LED not GPIO */
+        gpio_bit12(0x0A);  /* Set pin 79 = WDT not
+                              GPIO/Output/Polarity=Invert */
+        /* disable the timeout */
+        wdt_timeout_value(0);
 
-        // disable the timeout
-        wdt_timeout_value(0);
+        /* reset control register */
+        wdt_timer_ctrl(0x00);
 
-        // reset control register
-        wdt_timer_ctrl(0x00);
-
-        // reset configuration register
+        /* reset configuration register */
         wdt_timer_conf(0x00);
 
-        // read old (timer units) register
-        old = read_io_cr(0xF1) & 0x7F;
-        if (unit == UNIT_SECOND) old |= 0x80; // set to seconds
+        /* read old (timer units) register */
+        old = read_io_cr(0xF1) & 0x7F;
+        if (unit == UNIT_SECOND)
+                old |= 0x80;    /* set to seconds */
 
-        // set the watchdog timer units
-        wdt_timer_units(old);
+        /* set the watchdog timer units */
+        wdt_timer_units(old);
 
-        close_io_config();
+        close_io_config();
         spin_unlock(&io_lock);
 }
 
@@ -244,23 +252,23 @@ static void wb_smsc_wdt_initialize(void)
 static void wb_smsc_wdt_shutdown(void)
 {
         spin_lock(&io_lock);
-        open_io_config();
-        select_io_device(IODEV_NO);
+        open_io_config();
+        select_io_device(IODEV_NO);
 
-        // disable the watchdog
-        gpio_bit13(0x09);
-        gpio_bit12(0x09);
+        /* disable the watchdog */
+        gpio_bit13(0x09);
+        gpio_bit12(0x09);
 
-        // reset watchdog config register
+        /* reset watchdog config register */
         wdt_timer_conf(0x00);
 
-        // reset watchdog control register
-        wdt_timer_ctrl(0x00);
+        /* reset watchdog control register */
+        wdt_timer_ctrl(0x00);
 
-        // disable timeout
-        wdt_timeout_value(0x00);
+        /* disable timeout */
+        wdt_timeout_value(0x00);
 
-        close_io_config();
+        close_io_config();
         spin_unlock(&io_lock);
 }
 
@@ -269,16 +277,16 @@ static void wb_smsc_wdt_shutdown(void)
 static void wb_smsc_wdt_set_timeout(unsigned char new_timeout)
 {
         spin_lock(&io_lock);
-        open_io_config();
-        select_io_device(IODEV_NO);
+        open_io_config();
+        select_io_device(IODEV_NO);
 
-        // set Power LED to blink, if we enable the timeout
-        wdt_timer_ctrl((new_timeout == 0) ? 0x00 : 0x02);
+        /* set Power LED to blink, if we enable the timeout */
+        wdt_timer_ctrl((new_timeout == 0) ? 0x00 : 0x02);
 
-        // set timeout value
-        wdt_timeout_value(new_timeout);
+        /* set timeout value */
+        wdt_timeout_value(new_timeout);
 
-        close_io_config();
+        close_io_config();
         spin_unlock(&io_lock);
 }
 
@@ -286,32 +294,32 @@ static void wb_smsc_wdt_set_timeout(unsigned char new_timeout)
 
 static unsigned char wb_smsc_wdt_get_timeout(void)
 {
-        unsigned char set_timeout;
+        unsigned char set_timeout;
 
         spin_lock(&io_lock);
-        open_io_config();
-        select_io_device(IODEV_NO);
-        set_timeout = read_io_cr(0xF2);
-        close_io_config();
+        open_io_config();
+        select_io_device(IODEV_NO);
+        set_timeout = read_io_cr(0xF2);
+        close_io_config();
         spin_unlock(&io_lock);
 
-        return set_timeout;
+        return set_timeout;
 }
 
 /* disable watchdog */
 
 static void wb_smsc_wdt_disable(void)
 {
-        // set the timeout to 0 to disable the watchdog
-        wb_smsc_wdt_set_timeout(0);
+        /* set the timeout to 0 to disable the watchdog */
+        wb_smsc_wdt_set_timeout(0);
 }
 
 /* enable watchdog by setting the current timeout */
 
 static void wb_smsc_wdt_enable(void)
 {
-        // set the current timeout...
-        wb_smsc_wdt_set_timeout(timeout);
+        /* set the current timeout... */
+        wb_smsc_wdt_set_timeout(timeout);
 }
 
 /* reset the timer */
@@ -319,14 +327,14 @@ static void wb_smsc_wdt_enable(void)
 static void wb_smsc_wdt_reset_timer(void)
 {
         spin_lock(&io_lock);
-        open_io_config();
-        select_io_device(IODEV_NO);
+        open_io_config();
+        select_io_device(IODEV_NO);
 
-        // reset the timer
+        /* reset the timer */
         wdt_timeout_value(timeout);
         wdt_timer_conf(0x08);
 
-        close_io_config();
+        close_io_config();
         spin_unlock(&io_lock);
 }
 
@@ -355,7 +363,9 @@ static int wb_smsc_wdt_open(struct inode *inode, struct file *file)
         /* Reload and activate timer */
         wb_smsc_wdt_enable();
 
-        printk(KERN_INFO MODNAME "Watchdog enabled. Timeout set to %d %s.\n", timeout, (unit == UNIT_SECOND) ? "second(s)" : "minute(s)");
+        printk(KERN_INFO MODNAME
+                "Watchdog enabled. Timeout set to %d %s.\n",
+                timeout, (unit == UNIT_SECOND) ? "second(s)" : "minute(s)");
 
         return nonseekable_open(inode, file);
 }
@@ -367,10 +377,12 @@ static int wb_smsc_wdt_release(struct inode *inode, struct file *file)
         /* Shut off the timer. */
 
         if (expect_close == 42) {
-                wb_smsc_wdt_disable();
-                printk(KERN_INFO MODNAME "Watchdog disabled, sleeping again...\n");
+                wb_smsc_wdt_disable();
+                printk(KERN_INFO MODNAME
+                                "Watchdog disabled, sleeping again...\n");
         } else {
-                printk(KERN_CRIT MODNAME "Unexpected close, not stopping watchdog!\n");
+                printk(KERN_CRIT MODNAME
+                                "Unexpected close, not stopping watchdog!\n");
                 wb_smsc_wdt_reset_timer();
         }
 
@@ -392,10 +404,11 @@ static ssize_t wb_smsc_wdt_write(struct file *file, const char __user *data,
                         /* reset expect flag */
                         expect_close = 0;
 
-                        /* scan to see whether or not we got the magic character */
+                        /* scan to see whether or not we got the
+                           magic character */
                         for (i = 0; i != len; i++) {
                                 char c;
-                                if (get_user(c, data+i))
+                                if (get_user(c, data + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_close = 42;
@@ -410,8 +423,8 @@ static ssize_t wb_smsc_wdt_write(struct file *file, const char __user *data,
 
 /* ioctl => control interface */
 
-static int wb_smsc_wdt_ioctl(struct inode *inode, struct file *file,
-                             unsigned int cmd, unsigned long arg)
+static long wb_smsc_wdt_ioctl(struct file *file,
+                                        unsigned int cmd, unsigned long arg)
 {
         int new_timeout;
 
@@ -420,89 +433,73 @@ static int wb_smsc_wdt_ioctl(struct inode *inode, struct file *file,
                 int __user *i;
         } uarg;
 
-        static struct watchdog_info ident = {
+        static const struct watchdog_info ident = {
                 .options =              WDIOF_KEEPALIVEPING |
-                                        WDIOF_SETTIMEOUT |
+                                        WDIOF_SETTIMEOUT |
                                         WDIOF_MAGICCLOSE,
                 .firmware_version =     0,
-                .identity =             "SMsC 37B787 Watchdog"
+                .identity =             "SMsC 37B787 Watchdog",
         };
 
         uarg.i = (int __user *)arg;
 
         switch (cmd) {
-                default:
-                        return -ENOTTY;
-
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(uarg.ident, &ident,
-                                sizeof(ident)) ? -EFAULT : 0;
-
-                case WDIOC_GETSTATUS:
-                        return put_user(wb_smsc_wdt_status(), uarg.i);
-
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, uarg.i);
-
-                case WDIOC_KEEPALIVE:
-                        wb_smsc_wdt_reset_timer();
-                        return 0;
-
-                case WDIOC_SETTIMEOUT:
-                        if (get_user(new_timeout, uarg.i))
-                                return -EFAULT;
-
-                        // the API states this is given in secs
-                        if (unit == UNIT_MINUTE)
-                          new_timeout /= 60;
-
-                        if (new_timeout < 0 || new_timeout > MAX_TIMEOUT)
-                                return -EINVAL;
-
-                        timeout = new_timeout;
-                        wb_smsc_wdt_set_timeout(timeout);
-
-                        // fall through and return the new timeout...
-
-                case WDIOC_GETTIMEOUT:
-
-                        new_timeout = timeout;
-
-                        if (unit == UNIT_MINUTE)
-                          new_timeout *= 60;
-
-                        return put_user(new_timeout, uarg.i);
-
-                case WDIOC_SETOPTIONS:
-                {
-                        int options, retval = -EINVAL;
-
-                        if (get_user(options, uarg.i))
-                                return -EFAULT;
-
-                        if (options & WDIOS_DISABLECARD) {
-                                wb_smsc_wdt_disable();
-                                retval = 0;
-                        }
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(uarg.ident, &ident, sizeof(ident))
+                                                                ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+                return put_user(wb_smsc_wdt_status(), uarg.i);
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, uarg.i);
+        case WDIOC_SETOPTIONS:
+        {
+                int options, retval = -EINVAL;
 
-                        if (options & WDIOS_ENABLECARD) {
-                                wb_smsc_wdt_enable();
-                                retval = 0;
-                        }
+                if (get_user(options, uarg.i))
+                        return -EFAULT;
 
-                        return retval;
+                if (options & WDIOS_DISABLECARD) {
+                        wb_smsc_wdt_disable();
+                        retval = 0;
+                }
+                if (options & WDIOS_ENABLECARD) {
+                        wb_smsc_wdt_enable();
+                        retval = 0;
                 }
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                wb_smsc_wdt_reset_timer();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_timeout, uarg.i))
+                        return -EFAULT;
+                /* the API states this is given in secs */
+                if (unit == UNIT_MINUTE)
+                        new_timeout /= 60;
+                if (new_timeout < 0 || new_timeout > MAX_TIMEOUT)
+                        return -EINVAL;
+                timeout = new_timeout;
+                wb_smsc_wdt_set_timeout(timeout);
+                /* fall through and return the new timeout... */
+        case WDIOC_GETTIMEOUT:
+                new_timeout = timeout;
+                if (unit == UNIT_MINUTE)
+                          new_timeout *= 60;
+                return put_user(new_timeout, uarg.i);
+        default:
+                return -ENOTTY;
         }
 }
 
 /* -- Notifier funtions -----------------------------------------*/
 
-static int wb_smsc_wdt_notify_sys(struct notifier_block *this, unsigned long code, void *unused)
+static int wb_smsc_wdt_notify_sys(struct notifier_block *this,
+                                        unsigned long code, void *unused)
 {
-        if (code == SYS_DOWN || code == SYS_HALT)
-        {
-                // set timeout to 0, to avoid possible race-condition
-                timeout = 0;
+        if (code == SYS_DOWN || code == SYS_HALT) {
+                /* set timeout to 0, to avoid possible race-condition */
+                timeout = 0;
                 wb_smsc_wdt_disable();
         }
         return NOTIFY_DONE;
@@ -510,23 +507,20 @@ static int wb_smsc_wdt_notify_sys(struct notifier_block *this, unsigned long cod
 
 /* -- Module's structures ---------------------------------------*/
 
-static const struct file_operations wb_smsc_wdt_fops =
-{
-        .owner          = THIS_MODULE,
+static const struct file_operations wb_smsc_wdt_fops = {
+        .owner    = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = wb_smsc_wdt_write,
-        .ioctl          = wb_smsc_wdt_ioctl,
+        .unlocked_ioctl = wb_smsc_wdt_ioctl,
         .open           = wb_smsc_wdt_open,
         .release        = wb_smsc_wdt_release,
 };
 
-static struct notifier_block wb_smsc_wdt_notifier =
-{
+static struct notifier_block wb_smsc_wdt_notifier = {
         .notifier_call  = wb_smsc_wdt_notify_sys,
 };
 
-static struct miscdevice wb_smsc_wdt_miscdev =
-{
+static struct miscdevice wb_smsc_wdt_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
         .fops           = &wb_smsc_wdt_fops,
@@ -540,39 +534,44 @@ static int __init wb_smsc_wdt_init(void)
 {
         int ret;
 
-        printk("SMsC 37B787 watchdog component driver " VERSION " initialising...\n");
+        printk(KERN_INFO "SMsC 37B787 watchdog component driver "
+                                        VERSION " initialising...\n");
 
         if (!request_region(IOPORT, IOPORT_SIZE, "SMsC 37B787 watchdog")) {
-                printk(KERN_ERR MODNAME "Unable to register IO port %#x\n", IOPORT);
+                printk(KERN_ERR MODNAME "Unable to register IO port %#x\n",
+                                                                IOPORT);
                 ret = -EBUSY;
                 goto out_pnp;
         }
 
-        // set new maximum, if it's too big
-        if (timeout > MAX_TIMEOUT)
-               timeout = MAX_TIMEOUT;
+        /* set new maximum, if it's too big */
+        if (timeout > MAX_TIMEOUT)
+                timeout = MAX_TIMEOUT;
 
-        // init the watchdog timer
-        wb_smsc_wdt_initialize();
+        /* init the watchdog timer */
+        wb_smsc_wdt_initialize();
 
         ret = register_reboot_notifier(&wb_smsc_wdt_notifier);
         if (ret) {
-                printk(KERN_ERR MODNAME "Unable to register reboot notifier err = %d\n", ret);
+                printk(KERN_ERR MODNAME
+                        "Unable to register reboot notifier err = %d\n", ret);
                 goto out_io;
         }
 
         ret = misc_register(&wb_smsc_wdt_miscdev);
         if (ret) {
-                printk(KERN_ERR MODNAME "Unable to register miscdev on minor %d\n", WATCHDOG_MINOR);
+                printk(KERN_ERR MODNAME
+                        "Unable to register miscdev on minor %d\n",
+                                                        WATCHDOG_MINOR);
                 goto out_rbt;
         }
 
-        // output info
-        printk(KERN_INFO MODNAME "Timeout set to %d %s.\n", timeout, (unit == UNIT_SECOND) ? "second(s)" : "minute(s)");
-        printk(KERN_INFO MODNAME "Watchdog initialized and sleeping (nowayout=%d)...\n", nowayout);
-
-        // ret = 0
-
+        /* output info */
+        printk(KERN_INFO MODNAME "Timeout set to %d %s.\n",
+                timeout, (unit == UNIT_SECOND) ? "second(s)" : "minute(s)");
+        printk(KERN_INFO MODNAME
+                "Watchdog initialized and sleeping (nowayout=%d)...\n",
+                                                                nowayout);
 out_clean:
         return ret;
 
@@ -591,8 +590,7 @@ out_pnp:
 static void __exit wb_smsc_wdt_exit(void)
 {
         /* Stop the timer before we leave */
-        if (!nowayout)
-        {
+        if (!nowayout) {
                 wb_smsc_wdt_shutdown();
                 printk(KERN_INFO MODNAME "Watchdog disabled.\n");
         }
@@ -601,25 +599,29 @@ static void __exit wb_smsc_wdt_exit(void)
         unregister_reboot_notifier(&wb_smsc_wdt_notifier);
         release_region(IOPORT, IOPORT_SIZE);
 
-        printk("SMsC 37B787 watchdog component driver removed.\n");
+        printk(KERN_INFO "SMsC 37B787 watchdog component driver removed.\n");
 }
 
 module_init(wb_smsc_wdt_init);
 module_exit(wb_smsc_wdt_exit);
 
 MODULE_AUTHOR("Sven Anders <anders@anduras.de>");
-MODULE_DESCRIPTION("Driver for SMsC 37B787 watchdog component (Version " VERSION ")");
+MODULE_DESCRIPTION("Driver for SMsC 37B787 watchdog component (Version "
+                                                                VERSION ")");
 MODULE_LICENSE("GPL");
 
 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 
 #ifdef SMSC_SUPPORT_MINUTES
 module_param(unit, int, 0);
-MODULE_PARM_DESC(unit, "set unit to use, 0=seconds or 1=minutes, default is 0");
+MODULE_PARM_DESC(unit,
+                "set unit to use, 0=seconds or 1=minutes, default is 0");
 #endif
 
 module_param(timeout, int, 0);
 MODULE_PARM_DESC(timeout, "range is 1-255 units, default is 60");
 
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
diff --git a/drivers/watchdog/softdog.c b/drivers/watchdog/softdog.c
index 9c3694909243..c650464c5c63 100644
--- a/drivers/watchdog/softdog.c
+++ b/drivers/watchdog/softdog.c
@@ -47,19 +47,22 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/jiffies.h>
-
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
 
 #define PFX "SoftDog: "
 
 #define TIMER_MARGIN    60              /* Default is 60 seconds */
 static int soft_margin = TIMER_MARGIN;  /* in seconds */
 module_param(soft_margin, int, 0);
-MODULE_PARM_DESC(soft_margin, "Watchdog soft_margin in seconds. (0<soft_margin<65536, default=" __MODULE_STRING(TIMER_MARGIN) ")");
+MODULE_PARM_DESC(soft_margin,
+        "Watchdog soft_margin in seconds. (0 < soft_margin < 65536, default="
+                                        __MODULE_STRING(TIMER_MARGIN) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 #ifdef ONLY_TESTING
 static int soft_noboot = 1;
@@ -93,8 +96,7 @@ static void watchdog_fire(unsigned long data)
 
         if (soft_noboot)
                 printk(KERN_CRIT PFX "Triggered - Reboot ignored.\n");
-        else
-        {
+        else {
                 printk(KERN_CRIT PFX "Initiating system reboot.\n");
                 emergency_restart();
                 printk(KERN_CRIT PFX "Reboot didn't ?????\n");
@@ -153,7 +155,8 @@ static int softdog_release(struct inode *inode, struct file *file)
                 softdog_stop();
                 module_put(THIS_MODULE);
         } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
                 set_bit(0, &orphan_timer);
                 softdog_keepalive();
         }
@@ -162,12 +165,13 @@ static int softdog_release(struct inode *inode, struct file *file)
         return 0;
 }
 
-static ssize_t softdog_write(struct file *file, const char __user *data, size_t len, loff_t *ppos)
+static ssize_t softdog_write(struct file *file, const char __user *data,
+                                                size_t len, loff_t *ppos)
 {
         /*
          *      Refresh the timer.
          */
-        if(len) {
+        if (len) {
                 if (!nowayout) {
                         size_t i;
 
@@ -188,13 +192,13 @@ static ssize_t softdog_write(struct file *file, const char __user *data, size_t
         return len;
 }
 
-static int softdog_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long softdog_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         int new_margin;
-        static struct watchdog_info ident = {
+        static const struct watchdog_info ident = {
                 .options =              WDIOF_SETTIMEOUT |
                                         WDIOF_KEEPALIVEPING |
                                         WDIOF_MAGICCLOSE,
@@ -202,26 +206,25 @@ static int softdog_ioctl(struct inode *inode, struct file *file,
                 .identity =             "Software Watchdog",
         };
         switch (cmd) {
-                default:
-                        return -ENOTTY;
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident,
-                                sizeof(ident)) ? -EFAULT : 0;
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-                case WDIOC_KEEPALIVE:
-                        softdog_keepalive();
-                        return 0;
-                case WDIOC_SETTIMEOUT:
-                        if (get_user(new_margin, p))
-                                return -EFAULT;
-                        if (softdog_set_heartbeat(new_margin))
-                                return -EINVAL;
-                        softdog_keepalive();
-                        /* Fall */
-                case WDIOC_GETTIMEOUT:
-                        return put_user(soft_margin, p);
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_KEEPALIVE:
+                softdog_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_margin, p))
+                        return -EFAULT;
+                if (softdog_set_heartbeat(new_margin))
+                        return -EINVAL;
+                softdog_keepalive();
+                /* Fall */
+        case WDIOC_GETTIMEOUT:
+                return put_user(soft_margin, p);
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -232,10 +235,9 @@ static int softdog_ioctl(struct inode *inode, struct file *file,
 static int softdog_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if(code==SYS_DOWN || code==SYS_HALT) {
+        if (code == SYS_DOWN || code == SYS_HALT)
                 /* Turn the WDT off */
                 softdog_stop();
-        }
         return NOTIFY_DONE;
 }
 
@@ -247,7 +249,7 @@ static const struct file_operations softdog_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = softdog_write,
-        .ioctl          = softdog_ioctl,
+        .unlocked_ioctl = softdog_ioctl,
         .open           = softdog_open,
         .release        = softdog_release,
 };
@@ -268,24 +270,27 @@ static int __init watchdog_init(void)
 {
         int ret;
 
-        /* Check that the soft_margin value is within it's range ; if not reset to the default */
+        /* Check that the soft_margin value is within it's range;
+           if not reset to the default */
         if (softdog_set_heartbeat(soft_margin)) {
                 softdog_set_heartbeat(TIMER_MARGIN);
-                printk(KERN_INFO PFX "soft_margin value must be 0<soft_margin<65536, using %d\n",
+                printk(KERN_INFO PFX
+                    "soft_margin must be 0 < soft_margin < 65536, using %d\n",
                         TIMER_MARGIN);
         }
 
         ret = register_reboot_notifier(&softdog_notifier);
         if (ret) {
-                printk (KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        ret);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
                 return ret;
         }
 
         ret = misc_register(&softdog_miscdev);
         if (ret) {
-                printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                WATCHDOG_MINOR, ret);
                 unregister_reboot_notifier(&softdog_notifier);
                 return ret;
         }
diff --git a/drivers/watchdog/txx9wdt.c b/drivers/watchdog/txx9wdt.c
index 57cefef27ce3..6adab77fbbb0 100644
--- a/drivers/watchdog/txx9wdt.c
+++ b/drivers/watchdog/txx9wdt.c
@@ -45,27 +45,34 @@ static unsigned long txx9wdt_alive;
 static int expect_close;
 static struct txx9_tmr_reg __iomem *txx9wdt_reg;
 static struct clk *txx9_imclk;
+static DEFINE_SPINLOCK(txx9_lock);
 
 static void txx9wdt_ping(void)
 {
+        spin_lock(&txx9_lock);
         __raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
+        spin_unlock(&txx9_lock);
 }
 
 static void txx9wdt_start(void)
 {
+        spin_lock(&txx9_lock);
         __raw_writel(WD_TIMER_CLK * timeout, &txx9wdt_reg->cpra);
         __raw_writel(WD_TIMER_CCD, &txx9wdt_reg->ccdr);
         __raw_writel(0, &txx9wdt_reg->tisr);    /* clear pending interrupt */
         __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
                      &txx9wdt_reg->tcr);
         __raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
+        spin_unlock(&txx9_lock);
 }
 
 static void txx9wdt_stop(void)
 {
+        spin_lock(&txx9_lock);
         __raw_writel(TXx9_TMWTMR_WDIS, &txx9wdt_reg->wtmr);
         __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE,
                      &txx9wdt_reg->tcr);
+        spin_unlock(&txx9_lock);
 }
 
 static int txx9wdt_open(struct inode *inode, struct file *file)
@@ -120,13 +127,13 @@ static ssize_t txx9wdt_write(struct file *file, const char __user *data,
         return len;
 }
 
-static int txx9wdt_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long txx9wdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         int new_timeout;
-        static struct watchdog_info ident = {
+        static const struct watchdog_info ident = {
                 .options =              WDIOF_SETTIMEOUT |
                                         WDIOF_KEEPALIVEPING |
                                         WDIOF_MAGICCLOSE,
@@ -135,8 +142,6 @@ static int txx9wdt_ioctl(struct inode *inode, struct file *file,
         };
 
         switch (cmd) {
-        default:
-                return -ENOTTY;
         case WDIOC_GETSUPPORT:
                 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
         case WDIOC_GETSTATUS:
@@ -156,6 +161,8 @@ static int txx9wdt_ioctl(struct inode *inode, struct file *file,
                 /* Fall */
         case WDIOC_GETTIMEOUT:
                 return put_user(timeout, p);
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -168,22 +175,22 @@ static int txx9wdt_notify_sys(struct notifier_block *this, unsigned long code,
 }
 
 static const struct file_operations txx9wdt_fops = {
-        .owner =        THIS_MODULE,
-        .llseek =       no_llseek,
-        .write =        txx9wdt_write,
-        .ioctl =        txx9wdt_ioctl,
-        .open =         txx9wdt_open,
-        .release =      txx9wdt_release,
+        .owner          =       THIS_MODULE,
+        .llseek         =       no_llseek,
+        .write          =       txx9wdt_write,
+        .unlocked_ioctl =       txx9wdt_ioctl,
+        .open           =       txx9wdt_open,
+        .release        =       txx9wdt_release,
 };
 
 static struct miscdevice txx9wdt_miscdev = {
-        .minor =        WATCHDOG_MINOR,
-        .name =         "watchdog",
-        .fops =         &txx9wdt_fops,
+        .minor  =       WATCHDOG_MINOR,
+        .name   =       "watchdog",
+        .fops   =       &txx9wdt_fops,
 };
 
 static struct notifier_block txx9wdt_notifier = {
-        .notifier_call = txx9wdt_notify_sys
+        .notifier_call = txx9wdt_notify_sys,
 };
 
 static int __init txx9wdt_probe(struct platform_device *dev)
diff --git a/drivers/watchdog/w83627hf_wdt.c b/drivers/watchdog/w83627hf_wdt.c
index 386492821fc2..69396adaa5c3 100644
--- a/drivers/watchdog/w83627hf_wdt.c
+++ b/drivers/watchdog/w83627hf_wdt.c
@@ -37,9 +37,9 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 #define WATCHDOG_NAME "w83627hf/thf/hg WDT"
@@ -57,22 +57,26 @@ MODULE_PARM_DESC(wdt_io, "w83627hf/thf WDT io port (default 0x2E)");
 
 static int timeout = WATCHDOG_TIMEOUT;  /* in seconds */
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=255, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
+MODULE_PARM_DESC(timeout,
+                "Watchdog timeout in seconds. 1 <= timeout <= 255, default="
+                                __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  *      Kernel methods.
  */
 
 #define WDT_EFER (wdt_io+0)   /* Extended Function Enable Registers */
-#define WDT_EFIR (wdt_io+0)   /* Extended Function Index Register (same as EFER) */
+#define WDT_EFIR (wdt_io+0)   /* Extended Function Index Register
+                                                        (same as EFER) */
 #define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
 
-static void
-w83627hf_select_wd_register(void)
+static void w83627hf_select_wd_register(void)
 {
         unsigned char c;
         outb_p(0x87, WDT_EFER); /* Enter extended function mode */
@@ -93,43 +97,45 @@ w83627hf_select_wd_register(void)
         outb_p(0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */
 }
 
-static void
-w83627hf_unselect_wd_register(void)
+static void w83627hf_unselect_wd_register(void)
 {
         outb_p(0xAA, WDT_EFER); /* Leave extended function mode */
 }
 
 /* tyan motherboards seem to set F5 to 0x4C ?
  * So explicitly init to appropriate value. */
-static void
-w83627hf_init(void)
+
+static void w83627hf_init(void)
 {
         unsigned char t;
 
         w83627hf_select_wd_register();
 
         outb_p(0xF6, WDT_EFER); /* Select CRF6 */
-        t=inb_p(WDT_EFDR);      /* read CRF6 */
+        t = inb_p(WDT_EFDR);      /* read CRF6 */
         if (t != 0) {
-                printk (KERN_INFO PFX "Watchdog already running. Resetting timeout to %d sec\n", timeout);
+                printk(KERN_INFO PFX
+                     "Watchdog already running. Resetting timeout to %d sec\n",
+                                                                timeout);
                 outb_p(timeout, WDT_EFDR);    /* Write back to CRF6 */
         }
 
         outb_p(0xF5, WDT_EFER); /* Select CRF5 */
-        t=inb_p(WDT_EFDR);      /* read CRF5 */
-        t&=~0x0C;               /* set second mode & disable keyboard turning off watchdog */
+        t = inb_p(WDT_EFDR);      /* read CRF5 */
+        t &= ~0x0C;               /* set second mode & disable keyboard
+                                    turning off watchdog */
         outb_p(t, WDT_EFDR);    /* Write back to CRF5 */
 
         outb_p(0xF7, WDT_EFER); /* Select CRF7 */
-        t=inb_p(WDT_EFDR);      /* read CRF7 */
-        t&=~0xC0;               /* disable keyboard & mouse turning off watchdog */
+        t = inb_p(WDT_EFDR);      /* read CRF7 */
+        t &= ~0xC0;               /* disable keyboard & mouse turning off
+                                    watchdog */
         outb_p(t, WDT_EFDR);    /* Write back to CRF7 */
 
         w83627hf_unselect_wd_register();
 }
 
-static void
-wdt_ctrl(int timeout)
+static void wdt_ctrl(int timeout)
 {
         spin_lock(&io_lock);
 
@@ -143,32 +149,28 @@ wdt_ctrl(int timeout)
         spin_unlock(&io_lock);
 }
 
-static int
-wdt_ping(void)
+static int wdt_ping(void)
 {
         wdt_ctrl(timeout);
         return 0;
 }
 
-static int
-wdt_disable(void)
+static int wdt_disable(void)
 {
         wdt_ctrl(0);
         return 0;
 }
 
-static int
-wdt_set_heartbeat(int t)
+static int wdt_set_heartbeat(int t)
 {
-        if ((t < 1) || (t > 255))
+        if (t < 1 || t > 255)
                 return -EINVAL;
-
         timeout = t;
         return 0;
 }
 
-static ssize_t
-wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
+static ssize_t wdt_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         if (count) {
                 if (!nowayout) {
@@ -178,7 +180,7 @@ wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
 
                         for (i = 0; i != count; i++) {
                                 char c;
-                                if (get_user(c, buf+i))
+                                if (get_user(c, buf + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_close = 42;
@@ -189,72 +191,61 @@ wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
         return count;
 }
 
-static int
-wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-          unsigned long arg)
+static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         int new_timeout;
         static struct watchdog_info ident = {
-                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
+                                                        WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = "W83627HF WDT",
         };
 
         switch (cmd) {
         case WDIOC_GETSUPPORT:
-          if (copy_to_user(argp, &ident, sizeof(ident)))
-            return -EFAULT;
-          break;
-
+                if (copy_to_user(argp, &ident, sizeof(ident)))
+                        return -EFAULT;
+                break;
         case WDIOC_GETSTATUS:
         case WDIOC_GETBOOTSTATUS:
-          return put_user(0, p);
-
-        case WDIOC_KEEPALIVE:
-          wdt_ping();
-          break;
-
-        case WDIOC_SETTIMEOUT:
-          if (get_user(new_timeout, p))
-                  return -EFAULT;
-          if (wdt_set_heartbeat(new_timeout))
-                  return -EINVAL;
-          wdt_ping();
-          /* Fall */
-
-        case WDIOC_GETTIMEOUT:
-          return put_user(timeout, p);
-
+                return put_user(0, p);
         case WDIOC_SETOPTIONS:
         {
-          int options, retval = -EINVAL;
-
-          if (get_user(options, p))
-            return -EFAULT;
-
-          if (options & WDIOS_DISABLECARD) {
-            wdt_disable();
-            retval = 0;
-          }
-
-          if (options & WDIOS_ENABLECARD) {
-            wdt_ping();
-            retval = 0;
-          }
+                int options, retval = -EINVAL;
 
-          return retval;
+                if (get_user(options, p))
+                        return -EFAULT;
+                if (options & WDIOS_DISABLECARD) {
+                        wdt_disable();
+                        retval = 0;
+                }
+                if (options & WDIOS_ENABLECARD) {
+                        wdt_ping();
+                        retval = 0;
+                }
+                return retval;
         }
-
+        case WDIOC_KEEPALIVE:
+                wdt_ping();
+                break;
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                if (wdt_set_heartbeat(new_timeout))
+                        return -EINVAL;
+                wdt_ping();
+                /* Fall */
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
         default:
-          return -ENOTTY;
+                return -ENOTTY;
         }
         return 0;
 }
 
-static int
-wdt_open(struct inode *inode, struct file *file)
+static int wdt_open(struct inode *inode, struct file *file)
 {
         if (test_and_set_bit(0, &wdt_is_open))
                 return -EBUSY;
@@ -266,13 +257,13 @@ wdt_open(struct inode *inode, struct file *file)
         return nonseekable_open(inode, file);
 }
 
-static int
-wdt_close(struct inode *inode, struct file *file)
+static int wdt_close(struct inode *inode, struct file *file)
 {
-        if (expect_close == 42) {
+        if (expect_close == 42)
                 wdt_disable();
-        } else {
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+        else {
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
                 wdt_ping();
         }
         expect_close = 0;
@@ -284,14 +275,12 @@ wdt_close(struct inode *inode, struct file *file)
  *      Notifier for system down
  */
 
-static int
-wdt_notify_sys(struct notifier_block *this, unsigned long code,
+static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if (code == SYS_DOWN || code == SYS_HALT) {
-                /* Turn the WDT off */
-                wdt_disable();
-        }
+        if (code == SYS_DOWN || code == SYS_HALT)
+                wdt_disable();  /* Turn the WDT off */
+
         return NOTIFY_DONE;
 }
 
@@ -303,7 +292,7 @@ static const struct file_operations wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = wdt_write,
-        .ioctl          = wdt_ioctl,
+        .unlocked_ioctl = wdt_ioctl,
         .open           = wdt_open,
         .release        = wdt_close,
 };
@@ -323,8 +312,7 @@ static struct notifier_block wdt_notifier = {
         .notifier_call = wdt_notify_sys,
 };
 
-static int __init
-wdt_init(void)
+static int __init wdt_init(void)
 {
         int ret;
 
@@ -332,12 +320,13 @@ wdt_init(void)
 
         if (wdt_set_heartbeat(timeout)) {
                 wdt_set_heartbeat(WATCHDOG_TIMEOUT);
-                printk (KERN_INFO PFX "timeout value must be 1<=timeout<=255, using %d\n",
-                        WATCHDOG_TIMEOUT);
+                printk(KERN_INFO PFX
+                     "timeout value must be 1 <= timeout <= 255, using %d\n",
+                                WATCHDOG_TIMEOUT);
         }
 
         if (!request_region(wdt_io, 1, WATCHDOG_NAME)) {
-                printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
+                printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
                         wdt_io);
                 ret = -EIO;
                 goto out;
@@ -347,20 +336,22 @@ wdt_init(void)
 
         ret = register_reboot_notifier(&wdt_notifier);
         if (ret != 0) {
-                printk (KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        ret);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
                 goto unreg_regions;
         }
 
         ret = misc_register(&wdt_miscdev);
         if (ret != 0) {
-                printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        WATCHDOG_MINOR, ret);
                 goto unreg_reboot;
         }
 
-        printk (KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n",
-                timeout, nowayout);
+        printk(KERN_INFO PFX
+                        "initialized. timeout=%d sec (nowayout=%d)\n",
+                                                        timeout, nowayout);
 
 out:
         return ret;
@@ -371,12 +362,11 @@ unreg_regions:
         goto out;
 }
 
-static void __exit
-wdt_exit(void)
+static void __exit wdt_exit(void)
 {
         misc_deregister(&wdt_miscdev);
         unregister_reboot_notifier(&wdt_notifier);
-        release_region(wdt_io,1);
+        release_region(wdt_io, 1);
 }
 
 module_init(wdt_init);
diff --git a/drivers/watchdog/w83697hf_wdt.c b/drivers/watchdog/w83697hf_wdt.c
index 528b882420b6..445d30a01ed3 100644
--- a/drivers/watchdog/w83697hf_wdt.c
+++ b/drivers/watchdog/w83697hf_wdt.c
@@ -36,9 +36,9 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
-#include <asm/uaccess.h>
 #include <asm/system.h>
 
 #define WATCHDOG_NAME "w83697hf/hg WDT"
@@ -53,37 +53,43 @@ static DEFINE_SPINLOCK(io_lock);
 /* You must set this - there is no sane way to probe for this board. */
 static int wdt_io = 0x2e;
 module_param(wdt_io, int, 0);
-MODULE_PARM_DESC(wdt_io, "w83697hf/hg WDT io port (default 0x2e, 0 = autodetect)");
+MODULE_PARM_DESC(wdt_io,
+                "w83697hf/hg WDT io port (default 0x2e, 0 = autodetect)");
 
 static int timeout = WATCHDOG_TIMEOUT;  /* in seconds */
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=255 (default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+        "Watchdog timeout in seconds. 1<= timeout <=255 (default="
+                                __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+        "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 static int early_disable = WATCHDOG_EARLY_DISABLE;
 module_param(early_disable, int, 0);
-MODULE_PARM_DESC(early_disable, "Watchdog gets disabled at boot time (default=" __MODULE_STRING(WATCHDOG_EARLY_DISABLE) ")");
+MODULE_PARM_DESC(early_disable,
+        "Watchdog gets disabled at boot time (default="
+                                __MODULE_STRING(WATCHDOG_EARLY_DISABLE) ")");
 
 /*
  *      Kernel methods.
  */
 
-#define W83697HF_EFER (wdt_io+0)        /* Extended Function Enable Register */
-#define W83697HF_EFIR (wdt_io+0)        /* Extended Function Index Register (same as EFER) */
-#define W83697HF_EFDR (wdt_io+1)        /* Extended Function Data Register */
+#define W83697HF_EFER (wdt_io + 0)  /* Extended Function Enable Register */
+#define W83697HF_EFIR (wdt_io + 0)  /* Extended Function Index Register
+                                                        (same as EFER) */
+#define W83697HF_EFDR (wdt_io + 1)  /* Extended Function Data Register */
 
-static inline void
-w83697hf_unlock(void)
+static inline void w83697hf_unlock(void)
 {
         outb_p(0x87, W83697HF_EFER);    /* Enter extended function mode */
         outb_p(0x87, W83697HF_EFER);    /* Again according to manual */
 }
 
-static inline void
-w83697hf_lock(void)
+static inline void w83697hf_lock(void)
 {
         outb_p(0xAA, W83697HF_EFER);    /* Leave extended function mode */
 }
@@ -93,41 +99,36 @@ w83697hf_lock(void)
  *      w83697hf_write_timeout() must be called with the device unlocked.
  */
 
-static unsigned char
-w83697hf_get_reg(unsigned char reg)
+static unsigned char w83697hf_get_reg(unsigned char reg)
 {
         outb_p(reg, W83697HF_EFIR);
         return inb_p(W83697HF_EFDR);
 }
 
-static void
-w83697hf_set_reg(unsigned char reg, unsigned char data)
+static void w83697hf_set_reg(unsigned char reg, unsigned char data)
 {
         outb_p(reg, W83697HF_EFIR);
         outb_p(data, W83697HF_EFDR);
 }
 
-static void
-w83697hf_write_timeout(int timeout)
+static void w83697hf_write_timeout(int timeout)
 {
-        w83697hf_set_reg(0xF4, timeout);        /* Write Timeout counter to CRF4 */
+        /* Write Timeout counter to CRF4 */
+        w83697hf_set_reg(0xF4, timeout);
 }
 
-static void
-w83697hf_select_wdt(void)
+static void w83697hf_select_wdt(void)
 {
         w83697hf_unlock();
         w83697hf_set_reg(0x07, 0x08);   /* Switch to logic device 8 (GPIO2) */
 }
 
-static inline void
-w83697hf_deselect_wdt(void)
+static inline void w83697hf_deselect_wdt(void)
 {
         w83697hf_lock();
 }
 
-static void
-w83697hf_init(void)
+static void w83697hf_init(void)
 {
         unsigned char bbuf;
 
@@ -136,7 +137,9 @@ w83697hf_init(void)
         bbuf = w83697hf_get_reg(0x29);
         bbuf &= ~0x60;
         bbuf |= 0x20;
-        w83697hf_set_reg(0x29, bbuf);   /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
+
+        /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
+        w83697hf_set_reg(0x29, bbuf);
 
         bbuf = w83697hf_get_reg(0xF3);
         bbuf &= ~0x04;
@@ -145,8 +148,7 @@ w83697hf_init(void)
         w83697hf_deselect_wdt();
 }
 
-static void
-wdt_ping(void)
+static void wdt_ping(void)
 {
         spin_lock(&io_lock);
         w83697hf_select_wdt();
@@ -157,8 +159,7 @@ wdt_ping(void)
         spin_unlock(&io_lock);
 }
 
-static void
-wdt_enable(void)
+static void wdt_enable(void)
 {
         spin_lock(&io_lock);
         w83697hf_select_wdt();
@@ -170,8 +171,7 @@ wdt_enable(void)
         spin_unlock(&io_lock);
 }
 
-static void
-wdt_disable(void)
+static void wdt_disable(void)
 {
         spin_lock(&io_lock);
         w83697hf_select_wdt();
@@ -183,8 +183,7 @@ wdt_disable(void)
         spin_unlock(&io_lock);
 }
 
-static unsigned char
-wdt_running(void)
+static unsigned char wdt_running(void)
 {
         unsigned char t;
 
@@ -199,18 +198,17 @@ wdt_running(void)
         return t;
 }
 
-static int
-wdt_set_heartbeat(int t)
+static int wdt_set_heartbeat(int t)
 {
-        if ((t < 1) || (t > 255))
+        if (t < 1 || t > 255)
                 return -EINVAL;
 
         timeout = t;
         return 0;
 }
 
-static ssize_t
-wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
+static ssize_t wdt_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         if (count) {
                 if (!nowayout) {
@@ -220,7 +218,7 @@ wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
 
                         for (i = 0; i != count; i++) {
                                 char c;
-                                if (get_user(c, buf+i))
+                                if (get_user(c, buf + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_close = 42;
@@ -231,15 +229,14 @@ wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
         return count;
 }
 
-static int
-wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-          unsigned long arg)
+static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
         int new_timeout;
-        static struct watchdog_info ident = {
-                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+        static const struct watchdog_info ident = {
+                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
+                                                        | WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = "W83697HF WDT",
         };
@@ -254,21 +251,6 @@ wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, p);
 
-        case WDIOC_KEEPALIVE:
-                wdt_ping();
-                break;
-
-        case WDIOC_SETTIMEOUT:
-                if (get_user(new_timeout, p))
-                        return -EFAULT;
-                if (wdt_set_heartbeat(new_timeout))
-                        return -EINVAL;
-                wdt_ping();
-                /* Fall */
-
-        case WDIOC_GETTIMEOUT:
-                return put_user(timeout, p);
-
         case WDIOC_SETOPTIONS:
         {
                 int options, retval = -EINVAL;
@@ -289,14 +271,28 @@ wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                 return retval;
         }
 
+        case WDIOC_KEEPALIVE:
+                wdt_ping();
+                break;
+
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                if (wdt_set_heartbeat(new_timeout))
+                        return -EINVAL;
+                wdt_ping();
+                /* Fall */
+
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+
         default:
                 return -ENOTTY;
         }
         return 0;
 }
 
-static int
-wdt_open(struct inode *inode, struct file *file)
+static int wdt_open(struct inode *inode, struct file *file)
 {
         if (test_and_set_bit(0, &wdt_is_open))
                 return -EBUSY;
@@ -308,13 +304,13 @@ wdt_open(struct inode *inode, struct file *file)
         return nonseekable_open(inode, file);
 }
 
-static int
-wdt_close(struct inode *inode, struct file *file)
+static int wdt_close(struct inode *inode, struct file *file)
 {
-        if (expect_close == 42) {
+        if (expect_close == 42)
                 wdt_disable();
-        } else {
-                printk (KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+        else {
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
                 wdt_ping();
         }
         expect_close = 0;
@@ -326,14 +322,12 @@ wdt_close(struct inode *inode, struct file *file)
  *      Notifier for system down
  */
 
-static int
-wdt_notify_sys(struct notifier_block *this, unsigned long code,
+static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if (code == SYS_DOWN || code == SYS_HALT) {
-                /* Turn the WDT off */
-                wdt_disable();
-        }
+        if (code == SYS_DOWN || code == SYS_HALT)
+                wdt_disable();  /* Turn the WDT off */
+
         return NOTIFY_DONE;
 }
 
@@ -345,7 +339,7 @@ static const struct file_operations wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = wdt_write,
-        .ioctl          = wdt_ioctl,
+        .unlocked_ioctl = wdt_ioctl,
         .open           = wdt_open,
         .release        = wdt_close,
 };
@@ -365,36 +359,38 @@ static struct notifier_block wdt_notifier = {
         .notifier_call = wdt_notify_sys,
 };
 
-static int
-w83697hf_check_wdt(void)
+static int w83697hf_check_wdt(void)
 {
         if (!request_region(wdt_io, 2, WATCHDOG_NAME)) {
-                printk (KERN_ERR PFX "I/O address 0x%x already in use\n", wdt_io);
+                printk(KERN_ERR PFX
+                        "I/O address 0x%x already in use\n", wdt_io);
                 return -EIO;
         }
 
-        printk (KERN_DEBUG PFX "Looking for watchdog at address 0x%x\n", wdt_io);
+        printk(KERN_DEBUG PFX
+                        "Looking for watchdog at address 0x%x\n", wdt_io);
         w83697hf_unlock();
         if (w83697hf_get_reg(0x20) == 0x60) {
-                printk (KERN_INFO PFX "watchdog found at address 0x%x\n", wdt_io);
+                printk(KERN_INFO PFX
+                        "watchdog found at address 0x%x\n", wdt_io);
                 w83697hf_lock();
                 return 0;
         }
-        w83697hf_lock();        /* Reprotect in case it was a compatible device */
+        /* Reprotect in case it was a compatible device */
+        w83697hf_lock();
 
-        printk (KERN_INFO PFX "watchdog not found at address 0x%x\n", wdt_io);
+        printk(KERN_INFO PFX "watchdog not found at address 0x%x\n", wdt_io);
         release_region(wdt_io, 2);
         return -EIO;
 }
 
 static int w83697hf_ioports[] = { 0x2e, 0x4e, 0x00 };
 
-static int __init
-wdt_init(void)
+static int __init wdt_init(void)
 {
         int ret, i, found = 0;
 
-        printk (KERN_INFO PFX "WDT driver for W83697HF/HG initializing\n");
+        printk(KERN_INFO PFX "WDT driver for W83697HF/HG initializing\n");
 
         if (wdt_io == 0) {
                 /* we will autodetect the W83697HF/HG watchdog */
@@ -409,7 +405,7 @@ wdt_init(void)
         }
 
         if (!found) {
-                printk (KERN_ERR PFX "No W83697HF/HG could be found\n");
+                printk(KERN_ERR PFX "No W83697HF/HG could be found\n");
                 ret = -EIO;
                 goto out;
         }
@@ -417,31 +413,33 @@ wdt_init(void)
         w83697hf_init();
         if (early_disable) {
                 if (wdt_running())
-                        printk (KERN_WARNING PFX "Stopping previously enabled watchdog until userland kicks in\n");
+                        printk(KERN_WARNING PFX "Stopping previously enabled watchdog until userland kicks in\n");
                 wdt_disable();
         }
 
         if (wdt_set_heartbeat(timeout)) {
                 wdt_set_heartbeat(WATCHDOG_TIMEOUT);
-                printk (KERN_INFO PFX "timeout value must be 1<=timeout<=255, using %d\n",
-                        WATCHDOG_TIMEOUT);
+                printk(KERN_INFO PFX
+                     "timeout value must be 1 <= timeout <= 255, using %d\n",
+                                                        WATCHDOG_TIMEOUT);
         }
 
         ret = register_reboot_notifier(&wdt_notifier);
         if (ret != 0) {
-                printk (KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        ret);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
                 goto unreg_regions;
         }
 
         ret = misc_register(&wdt_miscdev);
         if (ret != 0) {
-                printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                WATCHDOG_MINOR, ret);
                 goto unreg_reboot;
         }
 
-        printk (KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n",
+        printk(KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n",
                 timeout, nowayout);
 
 out:
@@ -453,8 +451,7 @@ unreg_regions:
         goto out;
 }
 
-static void __exit
-wdt_exit(void)
+static void __exit wdt_exit(void)
 {
         misc_deregister(&wdt_miscdev);
         unregister_reboot_notifier(&wdt_notifier);
diff --git a/drivers/watchdog/w83877f_wdt.c b/drivers/watchdog/w83877f_wdt.c
index f510a3a595e6..24587d2060c4 100644
--- a/drivers/watchdog/w83877f_wdt.c
+++ b/drivers/watchdog/w83877f_wdt.c
@@ -23,13 +23,16 @@
  *                            Added KERN_* tags to printks
  *                            add CONFIG_WATCHDOG_NOWAYOUT support
  *                            fix possible wdt_is_open race
- *                            changed watchdog_info to correctly reflect what the driver offers
- *                            added WDIOC_GETSTATUS, WDIOC_GETBOOTSTATUS, WDIOC_SETTIMEOUT,
+ *                            changed watchdog_info to correctly reflect what
+ *                            the driver offers
+ *                            added WDIOC_GETSTATUS, WDIOC_GETBOOTSTATUS,
+ *                            WDIOC_SETTIMEOUT,
  *                            WDIOC_GETTIMEOUT, and WDIOC_SETOPTIONS ioctls
  *           09/8 - 2003      [wim@iguana.be] cleanup of trailing spaces
  *                            added extra printk's for startup problems
  *                            use module_param
- *                            made timeout (the emulated heartbeat) a module_param
+ *                            made timeout (the emulated heartbeat) a
+ *                            module_param
  *                            made the keepalive ping an internal subroutine
  *
  *  This WDT driver is different from most other Linux WDT
@@ -51,8 +54,8 @@
 #include <linux/notifier.h>
 #include <linux/reboot.h>
 #include <linux/init.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 #include <asm/system.h>
 
 #define OUR_NAME "w83877f_wdt"
@@ -80,14 +83,19 @@
  */
 
 #define WATCHDOG_TIMEOUT 30            /* 30 sec default timeout */
-static int timeout = WATCHDOG_TIMEOUT; /* in seconds, will be multiplied by HZ to get seconds to wait for a ping */
+/* in seconds, will be multiplied by HZ to get seconds to wait for a ping */
+static int timeout = WATCHDOG_TIMEOUT;
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=3600, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+        "Watchdog timeout in seconds. (1<=timeout<=3600, default="
+                                __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 static void wdt_timer_ping(unsigned long);
 static DEFINE_TIMER(timer, wdt_timer_ping, 0, 0);
@@ -105,8 +113,7 @@ static void wdt_timer_ping(unsigned long data)
         /* If we got a heartbeat pulse within the WDT_US_INTERVAL
          * we agree to ping the WDT
          */
-        if(time_before(jiffies, next_heartbeat))
-        {
+        if (time_before(jiffies, next_heartbeat)) {
                 /* Ping the WDT */
                 spin_lock(&wdt_spinlock);
 
@@ -118,9 +125,9 @@ static void wdt_timer_ping(unsigned long data)
 
                 spin_unlock(&wdt_spinlock);
 
-        } else {
-                printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n");
-        }
+        } else
+                printk(KERN_WARNING PFX
+                        "Heartbeat lost! Will not ping the watchdog\n");
 }
 
 /*
@@ -181,22 +188,21 @@ static void wdt_keepalive(void)
  * /dev/watchdog handling
  */
 
-static ssize_t fop_write(struct file * file, const char __user * buf, size_t count, loff_t * ppos)
+static ssize_t fop_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
-        if(count)
-        {
-                if (!nowayout)
-                {
+        if (count) {
+                if (!nowayout) {
                         size_t ofs;
 
-                        /* note: just in case someone wrote the magic character
-                         * five months ago... */
+                        /* note: just in case someone wrote the magic
+                           character five months ago... */
                         wdt_expect_close = 0;
 
-                        /* scan to see whether or not we got the magic character */
-                        for(ofs = 0; ofs != count; ofs++)
-                        {
+                        /* scan to see whether or not we got the
+                           magic character */
+                        for (ofs = 0; ofs != count; ofs++) {
                                 char c;
                                 if (get_user(c, buf + ofs))
                                         return -EFAULT;
@@ -211,10 +217,10 @@ static ssize_t fop_write(struct file * file, const char __user * buf, size_t cou
         return count;
 }
 
-static int fop_open(struct inode * inode, struct file * file)
+static int fop_open(struct inode *inode, struct file *file)
 {
         /* Just in case we're already talking to someone... */
-        if(test_and_set_bit(0, &wdt_is_open))
+        if (test_and_set_bit(0, &wdt_is_open))
                 return -EBUSY;
 
         /* Good, fire up the show */
@@ -222,78 +228,78 @@ static int fop_open(struct inode * inode, struct file * file)
         return nonseekable_open(inode, file);
 }
 
-static int fop_close(struct inode * inode, struct file * file)
+static int fop_close(struct inode *inode, struct file *file)
 {
-        if(wdt_expect_close == 42)
+        if (wdt_expect_close == 42)
                 wdt_turnoff();
         else {
                 del_timer(&timer);
-                printk(KERN_CRIT PFX "device file closed unexpectedly. Will not stop the WDT!\n");
+                printk(KERN_CRIT PFX
+                  "device file closed unexpectedly. Will not stop the WDT!\n");
         }
         clear_bit(0, &wdt_is_open);
         wdt_expect_close = 0;
         return 0;
 }
 
-static int fop_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-        unsigned long arg)
+static long fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
-        static struct watchdog_info ident=
-        {
-                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+        static const struct watchdog_info ident = {
+                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
+                                                        | WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = "W83877F",
         };
 
-        switch(cmd)
+        switch (cmd) {
+        case WDIOC_GETSUPPORT:
+                return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+        case WDIOC_GETSTATUS:
+        case WDIOC_GETBOOTSTATUS:
+                return put_user(0, p);
+        case WDIOC_SETOPTIONS:
         {
-                default:
-                        return -ENOTTY;
-                case WDIOC_GETSUPPORT:
-                        return copy_to_user(argp, &ident, sizeof(ident))?-EFAULT:0;
-                case WDIOC_GETSTATUS:
-                case WDIOC_GETBOOTSTATUS:
-                        return put_user(0, p);
-                case WDIOC_KEEPALIVE:
-                        wdt_keepalive();
-                        return 0;
-                case WDIOC_SETOPTIONS:
-                {
-                        int new_options, retval = -EINVAL;
-
-                        if(get_user(new_options, p))
-                                return -EFAULT;
-
-                        if(new_options & WDIOS_DISABLECARD) {
-                                wdt_turnoff();
-                                retval = 0;
-                        }
+                int new_options, retval = -EINVAL;
 
-                        if(new_options & WDIOS_ENABLECARD) {
-                                wdt_startup();
-                                retval = 0;
-                        }
+                if (get_user(new_options, p))
+                        return -EFAULT;
 
-                        return retval;
+                if (new_options & WDIOS_DISABLECARD) {
+                        wdt_turnoff();
+                        retval = 0;
                 }
-                case WDIOC_SETTIMEOUT:
-                {
-                        int new_timeout;
 
-                        if(get_user(new_timeout, p))
-                                return -EFAULT;
+                if (new_options & WDIOS_ENABLECARD) {
+                        wdt_startup();
+                        retval = 0;
+                }
 
-                        if(new_timeout < 1 || new_timeout > 3600) /* arbitrary upper limit */
-                                return -EINVAL;
+                return retval;
+        }
+        case WDIOC_KEEPALIVE:
+                wdt_keepalive();
+                return 0;
+        case WDIOC_SETTIMEOUT:
+        {
+                int new_timeout;
 
-                        timeout = new_timeout;
-                        wdt_keepalive();
-                        /* Fall through */
-                }
-                case WDIOC_GETTIMEOUT:
-                        return put_user(timeout, p);
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+
+                /* arbitrary upper limit */
+                if (new_timeout < 1 || new_timeout > 3600)
+                        return -EINVAL;
+
+                timeout = new_timeout;
+                wdt_keepalive();
+                /* Fall through */
+        }
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+        default:
+                return -ENOTTY;
         }
 }
 
@@ -303,7 +309,7 @@ static const struct file_operations wdt_fops = {
         .write          = fop_write,
         .open           = fop_open,
         .release        = fop_close,
-        .ioctl          = fop_ioctl,
+        .unlocked_ioctl = fop_ioctl,
 };
 
 static struct miscdevice wdt_miscdev = {
@@ -319,7 +325,7 @@ static struct miscdevice wdt_miscdev = {
 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if(code==SYS_DOWN || code==SYS_HALT)
+        if (code == SYS_DOWN || code == SYS_HALT)
                 wdt_turnoff();
         return NOTIFY_DONE;
 }
@@ -329,8 +335,7 @@ static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
  *      turn the timebomb registers off.
  */
 
-static struct notifier_block wdt_notifier=
-{
+static struct notifier_block wdt_notifier = {
         .notifier_call = wdt_notify_sys,
 };
 
@@ -342,31 +347,29 @@ static void __exit w83877f_wdt_unload(void)
         misc_deregister(&wdt_miscdev);
 
         unregister_reboot_notifier(&wdt_notifier);
-        release_region(WDT_PING,1);
-        release_region(ENABLE_W83877F_PORT,2);
+        release_region(WDT_PING, 1);
+        release_region(ENABLE_W83877F_PORT, 2);
 }
 
 static int __init w83877f_wdt_init(void)
 {
         int rc = -EBUSY;
 
-        if(timeout < 1 || timeout > 3600) /* arbitrary upper limit */
-        {
+        if (timeout < 1 || timeout > 3600) { /* arbitrary upper limit */
                 timeout = WATCHDOG_TIMEOUT;
-                printk(KERN_INFO PFX "timeout value must be 1<=x<=3600, using %d\n",
-                        timeout);
+                printk(KERN_INFO PFX
+                        "timeout value must be 1 <= x <= 3600, using %d\n",
+                                                        timeout);
         }
 
-        if (!request_region(ENABLE_W83877F_PORT, 2, "W83877F WDT"))
-        {
+        if (!request_region(ENABLE_W83877F_PORT, 2, "W83877F WDT")) {
                 printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
                         ENABLE_W83877F_PORT);
                 rc = -EIO;
                 goto err_out;
         }
 
-        if (!request_region(WDT_PING, 1, "W8387FF WDT"))
-        {
+        if (!request_region(WDT_PING, 1, "W8387FF WDT")) {
                 printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
                         WDT_PING);
                 rc = -EIO;
@@ -374,22 +377,22 @@ static int __init w83877f_wdt_init(void)
         }
 
         rc = register_reboot_notifier(&wdt_notifier);
-        if (rc)
-        {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        rc);
+        if (rc) {
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", rc);
                 goto err_out_region2;
         }
 
         rc = misc_register(&wdt_miscdev);
-        if (rc)
-        {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        wdt_miscdev.minor, rc);
+        if (rc) {
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                        wdt_miscdev.minor, rc);
                 goto err_out_reboot;
         }
 
-        printk(KERN_INFO PFX "WDT driver for W83877F initialised. timeout=%d sec (nowayout=%d)\n",
+        printk(KERN_INFO PFX
+          "WDT driver for W83877F initialised. timeout=%d sec (nowayout=%d)\n",
                 timeout, nowayout);
 
         return 0;
@@ -397,9 +400,9 @@ static int __init w83877f_wdt_init(void)
 err_out_reboot:
         unregister_reboot_notifier(&wdt_notifier);
 err_out_region2:
-        release_region(WDT_PING,1);
+        release_region(WDT_PING, 1);
 err_out_region1:
-        release_region(ENABLE_W83877F_PORT,2);
+        release_region(ENABLE_W83877F_PORT, 2);
 err_out:
         return rc;
 }
diff --git a/drivers/watchdog/w83977f_wdt.c b/drivers/watchdog/w83977f_wdt.c
index b209bcd7f789..2525da5080ca 100644
--- a/drivers/watchdog/w83977f_wdt.c
+++ b/drivers/watchdog/w83977f_wdt.c
@@ -26,10 +26,10 @@
 #include <linux/watchdog.h>
 #include <linux/notifier.h>
 #include <linux/reboot.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
 
-#include <asm/io.h>
 #include <asm/system.h>
-#include <asm/uaccess.h>
 
 #define WATCHDOG_VERSION  "1.00"
 #define WATCHDOG_NAME     "W83977F WDT"
@@ -53,13 +53,17 @@ static	char expect_close;
 static  DEFINE_SPINLOCK(spinlock);
 
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout,"Watchdog timeout in seconds (15..7635), default=" __MODULE_STRING(DEFAULT_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout,
+                "Watchdog timeout in seconds (15..7635), default="
+                                __MODULE_STRING(DEFAULT_TIMEOUT) ")");
 module_param(testmode, int, 0);
-MODULE_PARM_DESC(testmode,"Watchdog testmode (1 = no reboot), default=0");
+MODULE_PARM_DESC(testmode, "Watchdog testmode (1 = no reboot), default=0");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  * Start the watchdog
@@ -72,8 +76,8 @@ static int wdt_start(void)
         spin_lock_irqsave(&spinlock, flags);
 
         /* Unlock the SuperIO chip */
-        outb_p(UNLOCK_DATA,IO_INDEX_PORT);
-        outb_p(UNLOCK_DATA,IO_INDEX_PORT);
+        outb_p(UNLOCK_DATA, IO_INDEX_PORT);
+        outb_p(UNLOCK_DATA, IO_INDEX_PORT);
 
         /*
          * Select device Aux2 (device=8) to set watchdog regs F2, F3 and F4.
@@ -81,50 +85,49 @@ static int wdt_start(void)
          * F3 is set to enable watchdog LED blink at timeout.
          * F4 is used to just clear the TIMEOUT'ed state (bit 0).
          */
-        outb_p(DEVICE_REGISTER,IO_INDEX_PORT);
-        outb_p(0x08,IO_DATA_PORT);
-        outb_p(0xF2,IO_INDEX_PORT);
-        outb_p(timeoutW,IO_DATA_PORT);
-        outb_p(0xF3,IO_INDEX_PORT);
-        outb_p(0x08,IO_DATA_PORT);
-        outb_p(0xF4,IO_INDEX_PORT);
-        outb_p(0x00,IO_DATA_PORT);
+        outb_p(DEVICE_REGISTER, IO_INDEX_PORT);
+        outb_p(0x08, IO_DATA_PORT);
+        outb_p(0xF2, IO_INDEX_PORT);
+        outb_p(timeoutW, IO_DATA_PORT);
+        outb_p(0xF3, IO_INDEX_PORT);
+        outb_p(0x08, IO_DATA_PORT);
+        outb_p(0xF4, IO_INDEX_PORT);
+        outb_p(0x00, IO_DATA_PORT);
 
         /* Set device Aux2 active */
-        outb_p(0x30,IO_INDEX_PORT);
-        outb_p(0x01,IO_DATA_PORT);
+        outb_p(0x30, IO_INDEX_PORT);
+        outb_p(0x01, IO_DATA_PORT);
 
-        /* 
+        /*
          * Select device Aux1 (dev=7) to set GP16 as the watchdog output
          * (in reg E6) and GP13 as the watchdog LED output (in reg E3).
          * Map GP16 at pin 119.
          * In test mode watch the bit 0 on F4 to indicate "triggered" or
          * check watchdog LED on SBC.
          */
-        outb_p(DEVICE_REGISTER,IO_INDEX_PORT);
-        outb_p(0x07,IO_DATA_PORT);
-        if (!testmode)
-        {
+        outb_p(DEVICE_REGISTER, IO_INDEX_PORT);
+        outb_p(0x07, IO_DATA_PORT);
+        if (!testmode) {
                 unsigned pin_map;
 
-                outb_p(0xE6,IO_INDEX_PORT);
-                outb_p(0x0A,IO_DATA_PORT);
-                outb_p(0x2C,IO_INDEX_PORT);
+                outb_p(0xE6, IO_INDEX_PORT);
+                outb_p(0x0A, IO_DATA_PORT);
+                outb_p(0x2C, IO_INDEX_PORT);
                 pin_map = inb_p(IO_DATA_PORT);
                 pin_map |= 0x10;
                 pin_map &= ~(0x20);
-                outb_p(0x2C,IO_INDEX_PORT);
-                outb_p(pin_map,IO_DATA_PORT);
+                outb_p(0x2C, IO_INDEX_PORT);
+                outb_p(pin_map, IO_DATA_PORT);
         }
-        outb_p(0xE3,IO_INDEX_PORT);
-        outb_p(0x08,IO_DATA_PORT);
+        outb_p(0xE3, IO_INDEX_PORT);
+        outb_p(0x08, IO_DATA_PORT);
 
         /* Set device Aux1 active */
-        outb_p(0x30,IO_INDEX_PORT);
-        outb_p(0x01,IO_DATA_PORT);
+        outb_p(0x30, IO_INDEX_PORT);
+        outb_p(0x01, IO_DATA_PORT);
 
         /* Lock the SuperIO chip */
-        outb_p(LOCK_DATA,IO_INDEX_PORT);
+        outb_p(LOCK_DATA, IO_INDEX_PORT);
 
         spin_unlock_irqrestore(&spinlock, flags);
 
@@ -144,42 +147,41 @@ static int wdt_stop(void)
         spin_lock_irqsave(&spinlock, flags);
 
         /* Unlock the SuperIO chip */
-        outb_p(UNLOCK_DATA,IO_INDEX_PORT);
-        outb_p(UNLOCK_DATA,IO_INDEX_PORT);
+        outb_p(UNLOCK_DATA, IO_INDEX_PORT);
+        outb_p(UNLOCK_DATA, IO_INDEX_PORT);
 
-        /* 
+        /*
          * Select device Aux2 (device=8) to set watchdog regs F2, F3 and F4.
          * F2 is reset to its default value (watchdog timer disabled).
          * F3 is reset to its default state.
          * F4 clears the TIMEOUT'ed state (bit 0) - back to default.
          */
-        outb_p(DEVICE_REGISTER,IO_INDEX_PORT);
-        outb_p(0x08,IO_DATA_PORT);
-        outb_p(0xF2,IO_INDEX_PORT);
-        outb_p(0xFF,IO_DATA_PORT);
-        outb_p(0xF3,IO_INDEX_PORT);
-        outb_p(0x00,IO_DATA_PORT);
-        outb_p(0xF4,IO_INDEX_PORT);
-        outb_p(0x00,IO_DATA_PORT);
-        outb_p(0xF2,IO_INDEX_PORT);
-        outb_p(0x00,IO_DATA_PORT);
+        outb_p(DEVICE_REGISTER, IO_INDEX_PORT);
+        outb_p(0x08, IO_DATA_PORT);
+        outb_p(0xF2, IO_INDEX_PORT);
+        outb_p(0xFF, IO_DATA_PORT);
+        outb_p(0xF3, IO_INDEX_PORT);
+        outb_p(0x00, IO_DATA_PORT);
+        outb_p(0xF4, IO_INDEX_PORT);
+        outb_p(0x00, IO_DATA_PORT);
+        outb_p(0xF2, IO_INDEX_PORT);
+        outb_p(0x00, IO_DATA_PORT);
 
         /*
-         * Select device Aux1 (dev=7) to set GP16 (in reg E6) and 
+         * Select device Aux1 (dev=7) to set GP16 (in reg E6) and
          * Gp13 (in reg E3) as inputs.
          */
-        outb_p(DEVICE_REGISTER,IO_INDEX_PORT);
-        outb_p(0x07,IO_DATA_PORT);
-        if (!testmode)
-        {
-                outb_p(0xE6,IO_INDEX_PORT);
-                outb_p(0x01,IO_DATA_PORT);
+        outb_p(DEVICE_REGISTER, IO_INDEX_PORT);
+        outb_p(0x07, IO_DATA_PORT);
+        if (!testmode) {
+                outb_p(0xE6, IO_INDEX_PORT);
+                outb_p(0x01, IO_DATA_PORT);
         }
-        outb_p(0xE3,IO_INDEX_PORT);
-        outb_p(0x01,IO_DATA_PORT);
+        outb_p(0xE3, IO_INDEX_PORT);
+        outb_p(0x01, IO_DATA_PORT);
 
         /* Lock the SuperIO chip */
-        outb_p(LOCK_DATA,IO_INDEX_PORT);
+        outb_p(LOCK_DATA, IO_INDEX_PORT);
 
         spin_unlock_irqrestore(&spinlock, flags);
 
@@ -200,17 +202,17 @@ static int wdt_keepalive(void)
         spin_lock_irqsave(&spinlock, flags);
 
         /* Unlock the SuperIO chip */
-        outb_p(UNLOCK_DATA,IO_INDEX_PORT);
-        outb_p(UNLOCK_DATA,IO_INDEX_PORT);
+        outb_p(UNLOCK_DATA, IO_INDEX_PORT);
+        outb_p(UNLOCK_DATA, IO_INDEX_PORT);
 
         /* Select device Aux2 (device=8) to kick watchdog reg F2 */
-        outb_p(DEVICE_REGISTER,IO_INDEX_PORT);
-        outb_p(0x08,IO_DATA_PORT);
-        outb_p(0xF2,IO_INDEX_PORT);
-        outb_p(timeoutW,IO_DATA_PORT);
+        outb_p(DEVICE_REGISTER, IO_INDEX_PORT);
+        outb_p(0x08, IO_DATA_PORT);
+        outb_p(0xF2, IO_INDEX_PORT);
+        outb_p(timeoutW, IO_DATA_PORT);
 
         /* Lock the SuperIO chip */
-        outb_p(LOCK_DATA,IO_INDEX_PORT);
+        outb_p(LOCK_DATA, IO_INDEX_PORT);
 
         spin_unlock_irqrestore(&spinlock, flags);
 
@@ -227,7 +229,7 @@ static int wdt_set_timeout(int t)
 
         /*
          * Convert seconds to watchdog counter time units, rounding up.
-         * On PCM-5335 watchdog units are 30 seconds/step with 15 sec startup 
+         * On PCM-5335 watchdog units are 30 seconds/step with 15 sec startup
          * value. This information is supplied in the PCM-5335 manual and was
          * checked by me on a real board. This is a bit strange because W83977f
          * datasheet says counter unit is in minutes!
@@ -241,7 +243,7 @@ static int wdt_set_timeout(int t)
                 return -EINVAL;
 
         /*
-         * timeout is the timeout in seconds, 
+         * timeout is the timeout in seconds,
          * timeoutW is the timeout in watchdog counter units.
          */
         timeoutW = tmrval;
@@ -261,17 +263,17 @@ static int wdt_get_status(int *status)
         spin_lock_irqsave(&spinlock, flags);
 
         /* Unlock the SuperIO chip */
-        outb_p(UNLOCK_DATA,IO_INDEX_PORT);
-        outb_p(UNLOCK_DATA,IO_INDEX_PORT);
+        outb_p(UNLOCK_DATA, IO_INDEX_PORT);
+        outb_p(UNLOCK_DATA, IO_INDEX_PORT);
 
         /* Select device Aux2 (device=8) to read watchdog reg F4 */
-        outb_p(DEVICE_REGISTER,IO_INDEX_PORT);
-        outb_p(0x08,IO_DATA_PORT);
-        outb_p(0xF4,IO_INDEX_PORT);
+        outb_p(DEVICE_REGISTER, IO_INDEX_PORT);
+        outb_p(0x08, IO_DATA_PORT);
+        outb_p(0xF4, IO_INDEX_PORT);
         new_status = inb_p(IO_DATA_PORT);
 
         /* Lock the SuperIO chip */
-        outb_p(LOCK_DATA,IO_INDEX_PORT);
+        outb_p(LOCK_DATA, IO_INDEX_PORT);
 
         spin_unlock_irqrestore(&spinlock, flags);
 
@@ -290,7 +292,7 @@ static int wdt_get_status(int *status)
 static int wdt_open(struct inode *inode, struct file *file)
 {
         /* If the watchdog is alive we don't need to start it again */
-        if( test_and_set_bit(0, &timer_alive) )
+        if (test_and_set_bit(0, &timer_alive))
                 return -EBUSY;
 
         if (nowayout)
@@ -306,13 +308,13 @@ static int wdt_release(struct inode *inode, struct file *file)
          * Shut off the timer.
          * Lock it in if it's a module and we set nowayout
          */
-        if (expect_close == 42)
-        {
+        if (expect_close == 42) {
                 wdt_stop();
                 clear_bit(0, &timer_alive);
         } else {
                 wdt_keepalive();
-                printk(KERN_CRIT PFX "unexpected close, not stopping watchdog!\n");
+                printk(KERN_CRIT PFX
+                        "unexpected close, not stopping watchdog!\n");
         }
         expect_close = 0;
         return 0;
@@ -333,24 +335,22 @@ static ssize_t wdt_write(struct file *file, const char __user *buf,
                             size_t count, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
-        if(count)
-        {
-                if (!nowayout)
-                {
+        if (count) {
+                if (!nowayout) {
                         size_t ofs;
 
-                        /* note: just in case someone wrote the magic character long ago */
+                        /* note: just in case someone wrote the
+                           magic character long ago */
                         expect_close = 0;
 
-                        /* scan to see whether or not we got the magic character */
-                        for(ofs = 0; ofs != count; ofs++)
-                        {
+                        /* scan to see whether or not we got the
+                           magic character */
+                        for (ofs = 0; ofs != count; ofs++) {
                                 char c;
                                 if (get_user(c, buf + ofs))
                                         return -EFAULT;
-                                if (c == 'V') {
+                                if (c == 'V')
                                         expect_close = 42;
-                                }
                         }
                 }
 
@@ -377,8 +377,7 @@ static struct watchdog_info ident = {
         .identity = WATCHDOG_NAME,
 };
 
-static int wdt_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
         int status;
         int new_options, retval = -EINVAL;
@@ -390,13 +389,10 @@ static int wdt_ioctl(struct inode *inode, struct file *file,
 
         uarg.i = (int __user *)arg;
 
-        switch(cmd)
-        {
-        default:
-                return -ENOTTY;
-
+        switch (cmd) {
         case WDIOC_GETSUPPORT:
-                return copy_to_user(uarg.ident, &ident, sizeof(ident)) ? -EFAULT : 0;
+                return copy_to_user(uarg.ident, &ident,
+                                                sizeof(ident)) ? -EFAULT : 0;
 
         case WDIOC_GETSTATUS:
                 wdt_get_status(&status);
@@ -405,12 +401,8 @@ static int wdt_ioctl(struct inode *inode, struct file *file,
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, uarg.i);
 
-        case WDIOC_KEEPALIVE:
-                wdt_keepalive();
-                return 0;
-
         case WDIOC_SETOPTIONS:
-                if (get_user (new_options, uarg.i))
+                if (get_user(new_options, uarg.i))
                         return -EFAULT;
 
                 if (new_options & WDIOS_DISABLECARD) {
@@ -425,6 +417,10 @@ static int wdt_ioctl(struct inode *inode, struct file *file,
 
                 return retval;
 
+        case WDIOC_KEEPALIVE:
+                wdt_keepalive();
+                return 0;
+
         case WDIOC_SETTIMEOUT:
                 if (get_user(new_timeout, uarg.i))
                         return -EFAULT;
@@ -438,29 +434,30 @@ static int wdt_ioctl(struct inode *inode, struct file *file,
         case WDIOC_GETTIMEOUT:
                 return put_user(timeout, uarg.i);
 
+        default:
+                return -ENOTTY;
+
         }
 }
 
 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if (code==SYS_DOWN || code==SYS_HALT)
+        if (code == SYS_DOWN || code == SYS_HALT)
                 wdt_stop();
         return NOTIFY_DONE;
 }
 
-static const struct file_operations wdt_fops=
-{
+static const struct file_operations wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = wdt_write,
-        .ioctl          = wdt_ioctl,
+        .unlocked_ioctl = wdt_ioctl,
         .open           = wdt_open,
         .release        = wdt_release,
 };
 
-static struct miscdevice wdt_miscdev=
-{
+static struct miscdevice wdt_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
         .fops           = &wdt_fops,
@@ -474,20 +471,20 @@ static int __init w83977f_wdt_init(void)
 {
         int rc;
 
-        printk(KERN_INFO PFX DRIVER_VERSION);
+        printk(KERN_INFO PFX DRIVER_VERSION);
 
         /*
-         * Check that the timeout value is within it's range ; 
+         * Check that the timeout value is within it's range;
          * if not reset to the default
          */
         if (wdt_set_timeout(timeout)) {
                 wdt_set_timeout(DEFAULT_TIMEOUT);
-                printk(KERN_INFO PFX "timeout value must be 15<=timeout<=7635, using %d\n",
-                        DEFAULT_TIMEOUT);
+                printk(KERN_INFO PFX
+                    "timeout value must be 15 <= timeout <= 7635, using %d\n",
+                                                        DEFAULT_TIMEOUT);
         }
 
-        if (!request_region(IO_INDEX_PORT, 2, WATCHDOG_NAME))
-        {
+        if (!request_region(IO_INDEX_PORT, 2, WATCHDOG_NAME)) {
                 printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
                         IO_INDEX_PORT);
                 rc = -EIO;
@@ -495,30 +492,30 @@ static int __init w83977f_wdt_init(void)
         }
 
         rc = register_reboot_notifier(&wdt_notifier);
-        if (rc)
-        {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        rc);
+        if (rc) {
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", rc);
                 goto err_out_region;
         }
 
         rc = misc_register(&wdt_miscdev);
-        if (rc)
-        {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        wdt_miscdev.minor, rc);
+        if (rc) {
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                wdt_miscdev.minor, rc);
                 goto err_out_reboot;
         }
 
-        printk(KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
-                timeout, nowayout, testmode);
+        printk(KERN_INFO PFX
+                "initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
+                                        timeout, nowayout, testmode);
 
         return 0;
 
 err_out_reboot:
         unregister_reboot_notifier(&wdt_notifier);
 err_out_region:
-        release_region(IO_INDEX_PORT,2);
+        release_region(IO_INDEX_PORT, 2);
 err_out:
         return rc;
 }
@@ -528,7 +525,7 @@ static void __exit w83977f_wdt_exit(void)
         wdt_stop();
         misc_deregister(&wdt_miscdev);
         unregister_reboot_notifier(&wdt_notifier);
-        release_region(IO_INDEX_PORT,2);
+        release_region(IO_INDEX_PORT, 2);
 }
 
 module_init(w83977f_wdt_init);
diff --git a/drivers/watchdog/wafer5823wdt.c b/drivers/watchdog/wafer5823wdt.c
index 9e368091f799..68377ae171ff 100644
--- a/drivers/watchdog/wafer5823wdt.c
+++ b/drivers/watchdog/wafer5823wdt.c
@@ -1,11 +1,11 @@
 /*
  *      ICP Wafer 5823 Single Board Computer WDT driver
- *      http://www.icpamerica.com/wafer_5823.php
- *      May also work on other similar models
+ *      http://www.icpamerica.com/wafer_5823.php
+ *      May also work on other similar models
  *
  *      (c) Copyright 2002 Justin Cormack <justin@street-vision.com>
  *
- *      Release 0.02
+ *      Release 0.02
  *
  *      Based on advantechwdt.c which is based on wdt.c.
  *      Original copyright messages:
@@ -36,8 +36,8 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
 #define WATCHDOG_NAME "Wafer 5823 WDT"
 #define PFX WATCHDOG_NAME ": "
@@ -50,10 +50,10 @@ static DEFINE_SPINLOCK(wafwdt_lock);
 /*
  *      You must set these - there is no sane way to probe for this board.
  *
- *      To enable, write the timeout value in seconds (1 to 255) to I/O
- *      port WDT_START, then read the port to start the watchdog. To pat
- *      the dog, read port WDT_STOP to stop the timer, then read WDT_START
- *      to restart it again.
+ *      To enable, write the timeout value in seconds (1 to 255) to I/O
+ *      port WDT_START, then read the port to start the watchdog. To pat
+ *      the dog, read port WDT_STOP to stop the timer, then read WDT_START
+ *      to restart it again.
  */
 
 static int wdt_stop = 0x843;
@@ -61,11 +61,15 @@ static int wdt_start = 0x443;
 
 static int timeout = WD_TIMO;  /* in seconds */
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=255, default=" __MODULE_STRING(WD_TIMO) ".");
+MODULE_PARM_DESC(timeout,
+                "Watchdog timeout in seconds. 1 <= timeout <= 255, default="
+                                __MODULE_STRING(WD_TIMO) ".");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 static void wafwdt_ping(void)
 {
@@ -83,14 +87,14 @@ static void wafwdt_start(void)
         inb_p(wdt_start);
 }
 
-static void
-wafwdt_stop(void)
+static void wafwdt_stop(void)
 {
         /* stop watchdog */
         inb_p(wdt_stop);
 }
 
-static ssize_t wafwdt_write(struct file *file, const char __user *buf, size_t count, loff_t * ppos)
+static ssize_t wafwdt_write(struct file *file, const char __user *buf,
+                                                size_t count, loff_t *ppos)
 {
         /* See if we got the magic character 'V' and reload the timer */
         if (count) {
@@ -100,7 +104,8 @@ static ssize_t wafwdt_write(struct file *file, const char __user *buf, size_t co
                         /* In case it was set long ago */
                         expect_close = 0;
 
-                        /* scan to see whether or not we got the magic character */
+                        /* scan to see whether or not we got the magic
+                           character */
                         for (i = 0; i != count; i++) {
                                 char c;
                                 if (get_user(c, buf + i))
@@ -109,27 +114,29 @@ static ssize_t wafwdt_write(struct file *file, const char __user *buf, size_t co
                                         expect_close = 42;
                         }
                 }
-                /* Well, anyhow someone wrote to us, we should return that favour */
+                /* Well, anyhow someone wrote to us, we should
+                   return that favour */
                 wafwdt_ping();
         }
         return count;
 }
 
-static int wafwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-             unsigned long arg)
+static long wafwdt_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int new_timeout;
         void __user *argp = (void __user *)arg;
         int __user *p = argp;
-        static struct watchdog_info ident = {
-                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
+        static const struct watchdog_info ident = {
+                .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
+                                                        WDIOF_MAGICCLOSE,
                 .firmware_version = 1,
                 .identity = "Wafer 5823 WDT",
         };
 
         switch (cmd) {
         case WDIOC_GETSUPPORT:
-                if (copy_to_user(argp, &ident, sizeof (ident)))
+                if (copy_to_user(argp, &ident, sizeof(ident)))
                         return -EFAULT;
                 break;
 
@@ -137,22 +144,6 @@ static int wafwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, p);
 
-        case WDIOC_KEEPALIVE:
-                wafwdt_ping();
-                break;
-
-        case WDIOC_SETTIMEOUT:
-                if (get_user(new_timeout, p))
-                        return -EFAULT;
-                if ((new_timeout < 1) || (new_timeout > 255))
-                        return -EINVAL;
-                timeout = new_timeout;
-                wafwdt_stop();
-                wafwdt_start();
-                /* Fall */
-        case WDIOC_GETTIMEOUT:
-                return put_user(timeout, p);
-
         case WDIOC_SETOPTIONS:
         {
                 int options, retval = -EINVAL;
@@ -173,6 +164,22 @@ static int wafwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd
                 return retval;
         }
 
+        case WDIOC_KEEPALIVE:
+                wafwdt_ping();
+                break;
+
+        case WDIOC_SETTIMEOUT:
+                if (get_user(new_timeout, p))
+                        return -EFAULT;
+                if ((new_timeout < 1) || (new_timeout > 255))
+                        return -EINVAL;
+                timeout = new_timeout;
+                wafwdt_stop();
+                wafwdt_start();
+                /* Fall */
+        case WDIOC_GETTIMEOUT:
+                return put_user(timeout, p);
+
         default:
                 return -ENOTTY;
         }
@@ -191,13 +198,13 @@ static int wafwdt_open(struct inode *inode, struct file *file)
         return nonseekable_open(inode, file);
 }
 
-static int
-wafwdt_close(struct inode *inode, struct file *file)
+static int wafwdt_close(struct inode *inode, struct file *file)
 {
-        if (expect_close == 42) {
+        if (expect_close == 42)
                 wafwdt_stop();
-        } else {
-                printk(KERN_CRIT PFX "WDT device closed unexpectedly.  WDT will not stop!\n");
+        else {
+                printk(KERN_CRIT PFX
+                    "WDT device closed unexpectedly.  WDT will not stop!\n");
                 wafwdt_ping();
         }
         clear_bit(0, &wafwdt_is_open);
@@ -209,12 +216,11 @@ wafwdt_close(struct inode *inode, struct file *file)
  *      Notifier for system down
  */
 
-static int wafwdt_notify_sys(struct notifier_block *this, unsigned long code, void *unused)
+static int wafwdt_notify_sys(struct notifier_block *this, unsigned long code,
+                                                                void *unused)
 {
-        if (code == SYS_DOWN || code == SYS_HALT) {
-                /* Turn the WDT off */
+        if (code == SYS_DOWN || code == SYS_HALT)
                 wafwdt_stop();
-        }
         return NOTIFY_DONE;
 }
 
@@ -226,7 +232,7 @@ static const struct file_operations wafwdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = wafwdt_write,
-        .ioctl          = wafwdt_ioctl,
+        .unlocked_ioctl = wafwdt_ioctl,
         .open           = wafwdt_open,
         .release        = wafwdt_close,
 };
@@ -250,25 +256,28 @@ static int __init wafwdt_init(void)
 {
         int ret;
 
-        printk(KERN_INFO "WDT driver for Wafer 5823 single board computer initialising.\n");
+        printk(KERN_INFO
+          "WDT driver for Wafer 5823 single board computer initialising.\n");
 
         if (timeout < 1 || timeout > 255) {
                 timeout = WD_TIMO;
-                printk (KERN_INFO PFX "timeout value must be 1<=x<=255, using %d\n",
-                        timeout);
+                printk(KERN_INFO PFX
+                        "timeout value must be 1 <= x <= 255, using %d\n",
+                                                                timeout);
         }
 
         if (wdt_stop != wdt_start) {
-                if(!request_region(wdt_stop, 1, "Wafer 5823 WDT")) {
-                        printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
-                        wdt_stop);
+                if (!request_region(wdt_stop, 1, "Wafer 5823 WDT")) {
+                        printk(KERN_ERR PFX
+                                "I/O address 0x%04x already in use\n",
+                                                                wdt_stop);
                         ret = -EIO;
                         goto error;
                 }
         }
 
-        if(!request_region(wdt_start, 1, "Wafer 5823 WDT")) {
-                printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
+        if (!request_region(wdt_start, 1, "Wafer 5823 WDT")) {
+                printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
                         wdt_start);
                 ret = -EIO;
                 goto error2;
@@ -276,19 +285,20 @@ static int __init wafwdt_init(void)
 
         ret = register_reboot_notifier(&wafwdt_notifier);
         if (ret != 0) {
-                printk (KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        ret);
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", ret);
                 goto error3;
         }
 
         ret = misc_register(&wafwdt_miscdev);
         if (ret != 0) {
-                printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        WATCHDOG_MINOR, ret);
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                WATCHDOG_MINOR, ret);
                 goto error4;
         }
 
-        printk (KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n",
+        printk(KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n",
                 timeout, nowayout);
 
         return ret;
@@ -307,7 +317,7 @@ static void __exit wafwdt_exit(void)
 {
         misc_deregister(&wafwdt_miscdev);
         unregister_reboot_notifier(&wafwdt_notifier);
-        if(wdt_stop != wdt_start)
+        if (wdt_stop != wdt_start)
                 release_region(wdt_stop, 1);
         release_region(wdt_start, 1);
 }
diff --git a/drivers/watchdog/wd501p.h b/drivers/watchdog/wd501p.h
index a4504f40394d..db34853c28ae 100644
--- a/drivers/watchdog/wd501p.h
+++ b/drivers/watchdog/wd501p.h
@@ -12,7 +12,7 @@
  *      http://www.cymru.net
  *
  *      This driver is provided under the GNU General Public License, incorporated
- *      herein by reference. The driver is provided without warranty or 
+ *      herein by reference. The driver is provided without warranty or
  *      support.
  *
  *      Release 0.04.
diff --git a/drivers/watchdog/wdrtas.c b/drivers/watchdog/wdrtas.c
index 1d64e277567d..5d3b1a8e28b0 100644
--- a/drivers/watchdog/wdrtas.c
+++ b/drivers/watchdog/wdrtas.c
@@ -35,9 +35,9 @@
 #include <linux/reboot.h>
 #include <linux/types.h>
 #include <linux/watchdog.h>
+#include <linux/uaccess.h>
 
 #include <asm/rtas.h>
-#include <asm/uaccess.h>
 
 #define WDRTAS_MAGIC_CHAR               42
 #define WDRTAS_SUPPORTED_MASK           (WDIOF_SETTIMEOUT | \
@@ -56,7 +56,7 @@ static int wdrtas_nowayout = 0;
 #endif
 
 static atomic_t wdrtas_miscdev_open = ATOMIC_INIT(0);
-static char wdrtas_expect_close = 0;
+static char wdrtas_expect_close;
 
 static int wdrtas_interval;
 
@@ -86,8 +86,8 @@ static char wdrtas_logbuffer[WDRTAS_LOGBUFFER_LEN];
  * RTAS function set-indicator (surveillance). The unit of interval is
  * seconds.
  */
-static int
-wdrtas_set_interval(int interval)
+
+static int wdrtas_set_interval(int interval)
 {
         long result;
         static int print_msg = 10;
@@ -97,7 +97,7 @@ wdrtas_set_interval(int interval)
 
         result = rtas_call(wdrtas_token_set_indicator, 3, 1, NULL,
                            WDRTAS_SURVEILLANCE_IND, 0, interval);
-        if ( (result < 0) && (print_msg) ) {
+        if (result < 0 && print_msg) {
                 printk(KERN_ERR "wdrtas: setting the watchdog to %i "
                        "timeout failed: %li\n", interval, result);
                 print_msg--;
@@ -116,16 +116,14 @@ wdrtas_set_interval(int interval)
  * as reported by the RTAS function ibm,get-system-parameter. The unit
  * of the return value is seconds.
  */
-static int
-wdrtas_get_interval(int fallback_value)
+static int wdrtas_get_interval(int fallback_value)
 {
         long result;
         char value[4];
 
         result = rtas_call(wdrtas_token_get_sp, 3, 1, NULL,
                            WDRTAS_SP_SPI, (void *)__pa(&value), 4);
-        if ( (value[0] != 0) || (value[1] != 2) || (value[3] != 0) ||
-             (result < 0) ) {
+        if (value[0] != 0 || value[1] != 2 || value[3] != 0 || result < 0) {
                 printk(KERN_WARNING "wdrtas: could not get sp_spi watchdog "
                        "timeout (%li). Continuing\n", result);
                 return fallback_value;
@@ -141,8 +139,7 @@ wdrtas_get_interval(int fallback_value)
  * wdrtas_timer_start starts the watchdog by calling the RTAS function
  * set-interval (surveillance)
  */
-static void
-wdrtas_timer_start(void)
+static void wdrtas_timer_start(void)
 {
         wdrtas_set_interval(wdrtas_interval);
 }
@@ -153,8 +150,7 @@ wdrtas_timer_start(void)
  * wdrtas_timer_stop stops the watchdog timer by calling the RTAS function
  * set-interval (surveillance)
  */
-static void
-wdrtas_timer_stop(void)
+static void wdrtas_timer_stop(void)
 {
         wdrtas_set_interval(0);
 }
@@ -165,8 +161,7 @@ wdrtas_timer_stop(void)
  * wdrtas_log_scanned_event prints a message to the log buffer dumping
  * the results of the last event-scan call
  */
-static void
-wdrtas_log_scanned_event(void)
+static void wdrtas_log_scanned_event(void)
 {
         int i;
 
@@ -175,13 +170,13 @@ wdrtas_log_scanned_event(void)
                        "%02x %02x %02x %02x  %02x %02x %02x %02x   "
                        "%02x %02x %02x %02x  %02x %02x %02x %02x\n",
                        (i / 16) + 1, (WDRTAS_LOGBUFFER_LEN / 16),
-                       wdrtas_logbuffer[i + 0], wdrtas_logbuffer[i + 1], 
-                       wdrtas_logbuffer[i + 2], wdrtas_logbuffer[i + 3], 
-                       wdrtas_logbuffer[i + 4], wdrtas_logbuffer[i + 5], 
-                       wdrtas_logbuffer[i + 6], wdrtas_logbuffer[i + 7], 
-                       wdrtas_logbuffer[i + 8], wdrtas_logbuffer[i + 9], 
-                       wdrtas_logbuffer[i + 10], wdrtas_logbuffer[i + 11], 
-                       wdrtas_logbuffer[i + 12], wdrtas_logbuffer[i + 13], 
+                       wdrtas_logbuffer[i + 0], wdrtas_logbuffer[i + 1],
+                       wdrtas_logbuffer[i + 2], wdrtas_logbuffer[i + 3],
+                       wdrtas_logbuffer[i + 4], wdrtas_logbuffer[i + 5],
+                       wdrtas_logbuffer[i + 6], wdrtas_logbuffer[i + 7],
+                       wdrtas_logbuffer[i + 8], wdrtas_logbuffer[i + 9],
+                       wdrtas_logbuffer[i + 10], wdrtas_logbuffer[i + 11],
+                       wdrtas_logbuffer[i + 12], wdrtas_logbuffer[i + 13],
                        wdrtas_logbuffer[i + 14], wdrtas_logbuffer[i + 15]);
 }
 
@@ -192,8 +187,7 @@ wdrtas_log_scanned_event(void)
  * RTAS function event-scan and repeats these calls as long as there are
  * events available. All events will be dumped.
  */
-static void
-wdrtas_timer_keepalive(void)
+static void wdrtas_timer_keepalive(void)
 {
         long result;
 
@@ -218,8 +212,7 @@ wdrtas_timer_keepalive(void)
  * wdrtas_get_temperature returns the current temperature in Fahrenheit. It
  * uses the RTAS call get-sensor-state, token 3 to do so
  */
-static int
-wdrtas_get_temperature(void)
+static int wdrtas_get_temperature(void)
 {
         long result;
         int temperature = 0;
@@ -243,8 +236,7 @@ wdrtas_get_temperature(void)
  * returns a bitmask of defines WDIOF_... as defined in
  * include/linux/watchdog.h
  */
-static int
-wdrtas_get_status(void)
+static int wdrtas_get_status(void)
 {
         return 0; /* TODO */
 }
@@ -255,8 +247,7 @@ wdrtas_get_status(void)
  * returns a bitmask of defines WDIOF_... as defined in
  * include/linux/watchdog.h, indicating why the watchdog rebooted the system
  */
-static int
-wdrtas_get_boot_status(void)
+static int wdrtas_get_boot_status(void)
 {
         return 0; /* TODO */
 }
@@ -276,8 +267,7 @@ wdrtas_get_boot_status(void)
  * character 'V'. This character allows the watchdog device to be closed
  * properly.
  */
-static ssize_t
-wdrtas_write(struct file *file, const char __user *buf,
+static ssize_t wdrtas_write(struct file *file, const char __user *buf,
              size_t len, loff_t *ppos)
 {
         int i;
@@ -306,7 +296,6 @@ out:
 
 /**
  * wdrtas_ioctl - ioctl function for the watchdog device
- * @inode: inode structure
  * @file: file structure
  * @cmd: command for ioctl
  * @arg: argument pointer
@@ -315,16 +304,16 @@ out:
  *
  * wdrtas_ioctl implements the watchdog API ioctls
  */
-static int
-wdrtas_ioctl(struct inode *inode, struct file *file,
-             unsigned int cmd, unsigned long arg)
+
+static long wdrtas_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int __user *argp = (void __user *)arg;
         int i;
         static struct watchdog_info wdinfo = {
                 .options = WDRTAS_SUPPORTED_MASK,
                 .firmware_version = 0,
-                .identity = "wdrtas"
+                .identity = "wdrtas",
         };
 
         switch (cmd) {
@@ -357,9 +346,9 @@ wdrtas_ioctl(struct inode *inode, struct file *file,
                         wdrtas_timer_keepalive();
                         wdrtas_timer_start();
                 }
+                /* not implemented. Done by H8
                 if (i & WDIOS_TEMPPANIC) {
-                        /* not implemented. Done by H8 */
-                }
+                } */
                 return 0;
 
         case WDIOC_KEEPALIVE:
@@ -399,8 +388,7 @@ wdrtas_ioctl(struct inode *inode, struct file *file,
  *
  * function called when watchdog device is opened
  */
-static int
-wdrtas_open(struct inode *inode, struct file *file)
+static int wdrtas_open(struct inode *inode, struct file *file)
 {
         /* only open once */
         if (atomic_inc_return(&wdrtas_miscdev_open) > 1) {
@@ -423,8 +411,7 @@ wdrtas_open(struct inode *inode, struct file *file)
  *
  * close function. Always succeeds
  */
-static int
-wdrtas_close(struct inode *inode, struct file *file)
+static int wdrtas_close(struct inode *inode, struct file *file)
 {
         /* only stop watchdog, if this was announced using 'V' before */
         if (wdrtas_expect_close == WDRTAS_MAGIC_CHAR)
@@ -453,8 +440,7 @@ wdrtas_close(struct inode *inode, struct file *file)
  * wdrtas_temp_read gives the temperature to the users by copying this
  * value as one byte into the user space buffer. The unit is Fahrenheit...
  */
-static ssize_t
-wdrtas_temp_read(struct file *file, char __user *buf,
+static ssize_t wdrtas_temp_read(struct file *file, char __user *buf,
                  size_t count, loff_t *ppos)
 {
         int temperature = 0;
@@ -478,8 +464,7 @@ wdrtas_temp_read(struct file *file, char __user *buf,
  *
  * function called when temperature device is opened
  */
-static int
-wdrtas_temp_open(struct inode *inode, struct file *file)
+static int wdrtas_temp_open(struct inode *inode, struct file *file)
 {
         return nonseekable_open(inode, file);
 }
@@ -493,8 +478,7 @@ wdrtas_temp_open(struct inode *inode, struct file *file)
  *
  * close function. Always succeeds
  */
-static int
-wdrtas_temp_close(struct inode *inode, struct file *file)
+static int wdrtas_temp_close(struct inode *inode, struct file *file)
 {
         return 0;
 }
@@ -509,10 +493,10 @@ wdrtas_temp_close(struct inode *inode, struct file *file)
  *
  * wdrtas_reboot stops the watchdog in case of a reboot
  */
-static int
-wdrtas_reboot(struct notifier_block *this, unsigned long code, void *ptr)
+static int wdrtas_reboot(struct notifier_block *this,
+                                        unsigned long code, void *ptr)
 {
-        if ( (code==SYS_DOWN) || (code==SYS_HALT) )
+        if (code == SYS_DOWN || code == SYS_HALT)
                 wdrtas_timer_stop();
 
         return NOTIFY_DONE;
@@ -524,7 +508,7 @@ static const struct file_operations wdrtas_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = wdrtas_write,
-        .ioctl          = wdrtas_ioctl,
+        .unlocked_ioctl = wdrtas_ioctl,
         .open           = wdrtas_open,
         .release        = wdrtas_close,
 };
@@ -562,8 +546,7 @@ static struct notifier_block wdrtas_notifier = {
  * this watchdog driver. It tolerates, if "get-sensor-state" and
  * "ibm,get-system-parameter" are not available.
  */
-static int
-wdrtas_get_tokens(void)
+static int wdrtas_get_tokens(void)
 {
         wdrtas_token_get_sensor_state = rtas_token("get-sensor-state");
         if (wdrtas_token_get_sensor_state == RTAS_UNKNOWN_SERVICE) {
@@ -603,8 +586,7 @@ wdrtas_get_tokens(void)
  * wdrtas_register_devs unregisters the watchdog and temperature watchdog
  * misc devs
  */
-static void
-wdrtas_unregister_devs(void)
+static void wdrtas_unregister_devs(void)
 {
         misc_deregister(&wdrtas_miscdev);
         if (wdrtas_token_get_sensor_state != RTAS_UNKNOWN_SERVICE)
@@ -619,8 +601,7 @@ wdrtas_unregister_devs(void)
  * wdrtas_register_devs registers the watchdog and temperature watchdog
  * misc devs
  */
-static int
-wdrtas_register_devs(void)
+static int wdrtas_register_devs(void)
 {
         int result;
 
@@ -651,8 +632,7 @@ wdrtas_register_devs(void)
  *
  * registers the file handlers and the reboot notifier
  */
-static int __init
-wdrtas_init(void)
+static int __init wdrtas_init(void)
 {
         if (wdrtas_get_tokens())
                 return -ENODEV;
@@ -680,8 +660,7 @@ wdrtas_init(void)
  *
  * unregisters the file handlers and the reboot notifier
  */
-static void __exit
-wdrtas_exit(void)
+static void __exit wdrtas_exit(void)
 {
         if (!wdrtas_nowayout)
                 wdrtas_timer_stop();
diff --git a/drivers/watchdog/wdt.c b/drivers/watchdog/wdt.c
index 53a6b18bcb9a..deeebb2b13ea 100644
--- a/drivers/watchdog/wdt.c
+++ b/drivers/watchdog/wdt.c
@@ -373,8 +373,6 @@ static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 #endif /* CONFIG_WDT_501 */
 
         switch (cmd) {
-        default:
-                return -ENOTTY;
         case WDIOC_GETSUPPORT:
                 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
         case WDIOC_GETSTATUS:
@@ -394,6 +392,8 @@ static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
                 /* Fall */
         case WDIOC_GETTIMEOUT:
                 return put_user(heartbeat, p);
+        default:
+                return -ENOTTY;
         }
 }
 
diff --git a/drivers/watchdog/wdt285.c b/drivers/watchdog/wdt285.c
index e4cf661dc890..db362c34958b 100644
--- a/drivers/watchdog/wdt285.c
+++ b/drivers/watchdog/wdt285.c
@@ -26,10 +26,10 @@
 #include <linux/reboot.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/irq.h>
+#include <mach/hardware.h>
 
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/hardware/dec21285.h>
 
@@ -115,8 +115,8 @@ static int watchdog_release(struct inode *inode, struct file *file)
         return 0;
 }
 
-static ssize_t
-watchdog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
+static ssize_t watchdog_write(struct file *file, const char *data,
+                                                size_t len, loff_t *ppos)
 {
         /*
          *      Refresh the timer.
@@ -127,19 +127,18 @@ watchdog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
         return len;
 }
 
-static struct watchdog_info ident = {
+static const struct watchdog_info ident = {
         .options        = WDIOF_SETTIMEOUT,
         .identity       = "Footbridge Watchdog",
 };
 
-static int
-watchdog_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-               unsigned long arg)
+static long watchdog_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         unsigned int new_margin;
         int ret = -ENOTTY;
 
-        switch(cmd) {
+        switch (cmd) {
         case WDIOC_GETSUPPORT:
                 ret = 0;
                 if (copy_to_user((void *)arg, &ident, sizeof(ident)))
@@ -148,7 +147,7 @@ watchdog_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 
         case WDIOC_GETSTATUS:
         case WDIOC_GETBOOTSTATUS:
-                ret = put_user(0,(int *)arg);
+                ret = put_user(0, (int *)arg);
                 break;
 
         case WDIOC_KEEPALIVE:
@@ -182,7 +181,7 @@ static const struct file_operations watchdog_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = watchdog_write,
-        .ioctl          = watchdog_ioctl,
+        .unlocked_ioctl = watchdog_ioctl,
         .open           = watchdog_open,
         .release        = watchdog_release,
 };
@@ -204,11 +203,13 @@ static int __init footbridge_watchdog_init(void)
         if (retval < 0)
                 return retval;
 
-        printk("Footbridge Watchdog Timer: 0.01, timer margin: %d sec\n",
-               soft_margin);
+        printk(KERN_INFO
+                "Footbridge Watchdog Timer: 0.01, timer margin: %d sec\n",
+                                                                soft_margin);
 
         if (machine_is_cats())
-                printk("Warning: Watchdog reset may not work on this machine.\n");
+                printk(KERN_WARNING
+                  "Warning: Watchdog reset may not work on this machine.\n");
         return 0;
 }
 
@@ -223,7 +224,7 @@ MODULE_LICENSE("GPL");
 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 
 module_param(soft_margin, int, 0);
-MODULE_PARM_DESC(soft_margin,"Watchdog timeout in seconds");
+MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
 
 module_init(footbridge_watchdog_init);
 module_exit(footbridge_watchdog_exit);
diff --git a/drivers/watchdog/wdt977.c b/drivers/watchdog/wdt977.c
index fb4b876c9fda..60e28d49ff52 100644
--- a/drivers/watchdog/wdt977.c
+++ b/drivers/watchdog/wdt977.c
@@ -19,7 +19,8 @@
  *      07-Jul-2003 Daniele Bellucci: Audit return code of misc_register in
  *                                    nwwatchdog_init.
  *      25-Oct-2005 Woody Suwalski: Convert addresses to #defs, add spinlocks
- *                                  remove limitiation to be used on Netwinders only
+ *                                  remove limitiation to be used on
+ *                                  Netwinders only
  */
 
 #include <linux/module.h>
@@ -33,11 +34,11 @@
 #include <linux/watchdog.h>
 #include <linux/notifier.h>
 #include <linux/reboot.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
-#include <asm/io.h>
 #include <asm/system.h>
 #include <asm/mach-types.h>
-#include <asm/uaccess.h>
 
 #define WATCHDOG_VERSION  "0.04"
 #define WATCHDOG_NAME     "Wdt977"
@@ -45,7 +46,7 @@
 #define DRIVER_VERSION    WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
 
 #define IO_INDEX_PORT   0x370           /* on some systems it can be 0x3F0 */
-#define IO_DATA_PORT    (IO_INDEX_PORT+1)
+#define IO_DATA_PORT    (IO_INDEX_PORT + 1)
 
 #define UNLOCK_DATA     0x87
 #define LOCK_DATA       0xAA
@@ -62,13 +63,16 @@ static	char expect_close;
 static  DEFINE_SPINLOCK(spinlock);
 
 module_param(timeout, int, 0);
-MODULE_PARM_DESC(timeout,"Watchdog timeout in seconds (60..15300), default=" __MODULE_STRING(DEFAULT_TIMEOUT) ")");
+MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (60..15300), default="
+                                __MODULE_STRING(DEFAULT_TIMEOUT) ")");
 module_param(testmode, int, 0);
-MODULE_PARM_DESC(testmode,"Watchdog testmode (1 = no reboot), default=0");
+MODULE_PARM_DESC(testmode, "Watchdog testmode (1 = no reboot), default=0");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, int, 0);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+MODULE_PARM_DESC(nowayout,
+                "Watchdog cannot be stopped once started (default="
+                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
 /*
  * Start the watchdog
@@ -95,14 +99,16 @@ static int wdt977_start(void)
         outb_p(0xF2, IO_INDEX_PORT);
         outb_p(timeoutM, IO_DATA_PORT);
         outb_p(0xF3, IO_INDEX_PORT);
-        outb_p(0x00, IO_DATA_PORT);     /* another setting is 0E for kbd/mouse/LED */
+        outb_p(0x00, IO_DATA_PORT);     /* another setting is 0E for
+                                           kbd/mouse/LED */
         outb_p(0xF4, IO_INDEX_PORT);
         outb_p(0x00, IO_DATA_PORT);
 
-        /* at last select device Aux1 (dev=7) and set GP16 as a watchdog output */
-        /* in test mode watch the bit 1 on F4 to indicate "triggered" */
-        if (!testmode)
-        {
+        /* At last select device Aux1 (dev=7) and set GP16 as a
+         * watchdog output. In test mode watch the bit 1 on F4 to
+         * indicate "triggered"
+         */
+        if (!testmode) {
                 outb_p(DEVICE_REGISTER, IO_INDEX_PORT);
                 outb_p(0x07, IO_DATA_PORT);
                 outb_p(0xE6, IO_INDEX_PORT);
@@ -147,7 +153,8 @@ static int wdt977_stop(void)
         outb_p(0xF2, IO_INDEX_PORT);
         outb_p(0x00, IO_DATA_PORT);
 
-        /* at last select device Aux1 (dev=7) and set GP16 as a watchdog output */
+        /* at last select device Aux1 (dev=7) and set
+           GP16 as a watchdog output */
         outb_p(DEVICE_REGISTER, IO_INDEX_PORT);
         outb_p(0x07, IO_DATA_PORT);
         outb_p(0xE6, IO_INDEX_PORT);
@@ -202,16 +209,18 @@ static int wdt977_set_timeout(int t)
         tmrval = (t + 59) / 60;
 
         if (machine_is_netwinder()) {
-                /* we have a hw bug somewhere, so each 977 minute is actually only 30sec
-                 *  this limits the max timeout to half of device max of 255 minutes...
+                /* we have a hw bug somewhere, so each 977 minute is actually
+                 * only 30sec. This limits the max timeout to half of device
+                 * max of 255 minutes...
                  */
                 tmrval += tmrval;
         }
 
-        if ((tmrval < 1) || (tmrval > 255))
+        if (tmrval < 1 || tmrval > 255)
                 return -EINVAL;
 
-        /* timeout is the timeout in seconds, timeoutM is the timeout in minutes) */
+        /* timeout is the timeout in seconds, timeoutM is
+           the timeout in minutes) */
         timeout = t;
         timeoutM = tmrval;
         return 0;
@@ -243,7 +252,7 @@ static int wdt977_get_status(int *status)
 
         spin_unlock_irqrestore(&spinlock, flags);
 
-        *status=0;
+        *status = 0;
         if (new_status & 1)
                 *status |= WDIOF_CARDRESET;
 
@@ -258,7 +267,7 @@ static int wdt977_get_status(int *status)
 static int wdt977_open(struct inode *inode, struct file *file)
 {
         /* If the watchdog is alive we don't need to start it again */
-        if( test_and_set_bit(0,&timer_alive) )
+        if (test_and_set_bit(0, &timer_alive))
                 return -EBUSY;
 
         if (nowayout)
@@ -274,13 +283,13 @@ static int wdt977_release(struct inode *inode, struct file *file)
          *      Shut off the timer.
          *      Lock it in if it's a module and we set nowayout
          */
-        if (expect_close == 42)
-        {
+        if (expect_close == 42) {
                 wdt977_stop();
-                clear_bit(0,&timer_alive);
+                clear_bit(0, &timer_alive);
         } else {
                 wdt977_keepalive();
-                printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
+                printk(KERN_CRIT PFX
+                        "Unexpected close, not stopping watchdog!\n");
         }
         expect_close = 0;
         return 0;
@@ -301,17 +310,14 @@ static int wdt977_release(struct inode *inode, struct file *file)
 static ssize_t wdt977_write(struct file *file, const char __user *buf,
                             size_t count, loff_t *ppos)
 {
-        if (count)
-        {
-                if (!nowayout)
-                {
+        if (count) {
+                if (!nowayout) {
                         size_t i;
 
                         /* In case it was set long ago */
                         expect_close = 0;
 
-                        for (i = 0; i != count; i++)
-                        {
+                        for (i = 0; i != count; i++) {
                                 char c;
                                 if (get_user(c, buf + i))
                                         return -EFAULT;
@@ -326,6 +332,14 @@ static ssize_t wdt977_write(struct file *file, const char __user *buf,
         return count;
 }
 
+static const struct watchdog_info ident = {
+        .options =              WDIOF_SETTIMEOUT |
+                                WDIOF_MAGICCLOSE |
+                                WDIOF_KEEPALIVEPING,
+        .firmware_version =     1,
+        .identity =             WATCHDOG_NAME,
+};
+
 /*
  *      wdt977_ioctl:
  *      @inode: inode of the device
@@ -337,16 +351,8 @@ static ssize_t wdt977_write(struct file *file, const char __user *buf,
  *      according to their available features.
  */
 
-static struct watchdog_info ident = {
-        .options =              WDIOF_SETTIMEOUT |
-                                WDIOF_MAGICCLOSE |
-                                WDIOF_KEEPALIVEPING,
-        .firmware_version =     1,
-        .identity =             WATCHDOG_NAME,
-};
-
-static int wdt977_ioctl(struct inode *inode, struct file *file,
-        unsigned int cmd, unsigned long arg)
+static long wdt977_ioctl(struct file *file, unsigned int cmd,
+                                                        unsigned long arg)
 {
         int status;
         int new_options, retval = -EINVAL;
@@ -358,11 +364,7 @@ static int wdt977_ioctl(struct inode *inode, struct file *file,
 
         uarg.i = (int __user *)arg;
 
-        switch(cmd)
-        {
-        default:
-                return -ENOTTY;
-
+        switch (cmd) {
         case WDIOC_GETSUPPORT:
                 return copy_to_user(uarg.ident, &ident,
                         sizeof(ident)) ? -EFAULT : 0;
@@ -374,12 +376,8 @@ static int wdt977_ioctl(struct inode *inode, struct file *file,
         case WDIOC_GETBOOTSTATUS:
                 return put_user(0, uarg.i);
 
-        case WDIOC_KEEPALIVE:
-                wdt977_keepalive();
-                return 0;
-
         case WDIOC_SETOPTIONS:
-                if (get_user (new_options, uarg.i))
+                if (get_user(new_options, uarg.i))
                         return -EFAULT;
 
                 if (new_options & WDIOS_DISABLECARD) {
@@ -394,6 +392,10 @@ static int wdt977_ioctl(struct inode *inode, struct file *file,
 
                 return retval;
 
+        case WDIOC_KEEPALIVE:
+                wdt977_keepalive();
+                return 0;
+
         case WDIOC_SETTIMEOUT:
                 if (get_user(new_timeout, uarg.i))
                         return -EFAULT;
@@ -407,29 +409,30 @@ static int wdt977_ioctl(struct inode *inode, struct file *file,
         case WDIOC_GETTIMEOUT:
                 return put_user(timeout, uarg.i);
 
+        default:
+                return -ENOTTY;
+
         }
 }
 
 static int wdt977_notify_sys(struct notifier_block *this, unsigned long code,
         void *unused)
 {
-        if(code==SYS_DOWN || code==SYS_HALT)
+        if (code == SYS_DOWN || code == SYS_HALT)
                 wdt977_stop();
         return NOTIFY_DONE;
 }
 
-static const struct file_operations wdt977_fops=
-{
+static const struct file_operations wdt977_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
         .write          = wdt977_write,
-        .ioctl          = wdt977_ioctl,
+        .unlocked_ioctl = wdt977_ioctl,
         .open           = wdt977_open,
         .release        = wdt977_release,
 };
 
-static struct miscdevice wdt977_miscdev=
-{
+static struct miscdevice wdt977_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
         .fops           = &wdt977_fops,
@@ -443,51 +446,48 @@ static int __init wd977_init(void)
 {
         int rc;
 
-        //if (!machine_is_netwinder())
-        //      return -ENODEV;
-
         printk(KERN_INFO PFX DRIVER_VERSION);
 
-        /* Check that the timeout value is within it's range ; if not reset to the default */
-        if (wdt977_set_timeout(timeout))
-        {
+        /* Check that the timeout value is within its range;
+           if not reset to the default */
+        if (wdt977_set_timeout(timeout)) {
                 wdt977_set_timeout(DEFAULT_TIMEOUT);
-                printk(KERN_INFO PFX "timeout value must be 60<timeout<15300, using %d\n",
-                        DEFAULT_TIMEOUT);
+                printk(KERN_INFO PFX
+                      "timeout value must be 60 < timeout < 15300, using %d\n",
+                                                        DEFAULT_TIMEOUT);
         }
 
         /* on Netwinder the IOports are already reserved by
          * arch/arm/mach-footbridge/netwinder-hw.c
          */
-        if (!machine_is_netwinder())
-        {
-                if (!request_region(IO_INDEX_PORT, 2, WATCHDOG_NAME))
-                {
-                        printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
-                                IO_INDEX_PORT);
+        if (!machine_is_netwinder()) {
+                if (!request_region(IO_INDEX_PORT, 2, WATCHDOG_NAME)) {
+                        printk(KERN_ERR PFX
+                                "I/O address 0x%04x already in use\n",
+                                                                IO_INDEX_PORT);
                         rc = -EIO;
                         goto err_out;
                 }
         }
 
         rc = register_reboot_notifier(&wdt977_notifier);
-        if (rc)
-        {
-                printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
-                        rc);
+        if (rc) {
+                printk(KERN_ERR PFX
+                        "cannot register reboot notifier (err=%d)\n", rc);
                 goto err_out_region;
         }
 
         rc = misc_register(&wdt977_miscdev);
-        if (rc)
-        {
-                printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
-                        wdt977_miscdev.minor, rc);
+        if (rc) {
+                printk(KERN_ERR PFX
+                        "cannot register miscdev on minor=%d (err=%d)\n",
+                                                wdt977_miscdev.minor, rc);
                 goto err_out_reboot;
         }
 
-        printk(KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d, testmode=%i)\n",
-                timeout, nowayout, testmode);
+        printk(KERN_INFO PFX
+                "initialized. timeout=%d sec (nowayout=%d, testmode=%i)\n",
+                                                timeout, nowayout, testmode);
 
         return 0;
 
@@ -495,7 +495,7 @@ err_out_reboot:
         unregister_reboot_notifier(&wdt977_notifier);
 err_out_region:
         if (!machine_is_netwinder())
-                release_region(IO_INDEX_PORT,2);
+                release_region(IO_INDEX_PORT, 2);
 err_out:
         return rc;
 }
@@ -505,7 +505,7 @@ static void __exit wd977_exit(void)
         wdt977_stop();
         misc_deregister(&wdt977_miscdev);
         unregister_reboot_notifier(&wdt977_notifier);
-        release_region(IO_INDEX_PORT,2);
+        release_region(IO_INDEX_PORT, 2);
 }
 
 module_init(wd977_init);
diff --git a/drivers/watchdog/wdt_pci.c b/drivers/watchdog/wdt_pci.c
index 5d922fd6eafc..ed02bdb38c09 100644
--- a/drivers/watchdog/wdt_pci.c
+++ b/drivers/watchdog/wdt_pci.c
@@ -381,7 +381,7 @@ static ssize_t wdtpci_write(struct file *file, const char __user *buf,
 
                         for (i = 0; i != count; i++) {
                                 char c;
-                                if (get_user(c, buf+i))
+                                if (get_user(c, buf + i))
                                         return -EFAULT;
                                 if (c == 'V')
                                         expect_close = 42;
@@ -428,8 +428,6 @@ static long wdtpci_ioctl(struct file *file, unsigned int cmd,
 #endif /* CONFIG_WDT_501_PCI */
 
         switch (cmd) {
-        default:
-                return -ENOTTY;
         case WDIOC_GETSUPPORT:
                 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
         case WDIOC_GETSTATUS:
@@ -449,7 +447,9 @@ static long wdtpci_ioctl(struct file *file, unsigned int cmd,
                 /* Fall */
         case WDIOC_GETTIMEOUT:
                 return put_user(heartbeat, p);
-                }
+        default:
+                return -ENOTTY;
+        }
 }
 
 /**