diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/phy/broadcom.c | 60 |
1 files changed, 34 insertions, 26 deletions
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 0fe37492feb1..7e935924793d 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c | |||
@@ -128,36 +128,35 @@ static int bcm54xx_shadow_write(struct phy_device *phydev, u16 shadow, u16 val) | |||
128 | MII_BCM54XX_SHD_DATA(val)); | 128 | MII_BCM54XX_SHD_DATA(val)); |
129 | } | 129 | } |
130 | 130 | ||
131 | /* | 131 | /* Indirect register access functions for the Expansion Registers */ |
132 | * Indirect register access functions for the Expansion Registers | 132 | static int bcm54xx_exp_read(struct phy_device *phydev, u8 regnum) |
133 | * and Secondary SerDes registers (when sec_serdes=1). | ||
134 | */ | ||
135 | static int bcm54xx_exp_read(struct phy_device *phydev, | ||
136 | int sec_serdes, u8 regnum) | ||
137 | { | 133 | { |
138 | int val; | 134 | int val; |
139 | 135 | ||
140 | phy_write(phydev, MII_BCM54XX_EXP_SEL, | 136 | val = phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum); |
141 | (sec_serdes ? MII_BCM54XX_EXP_SEL_SSD : | 137 | if (val < 0) |
142 | MII_BCM54XX_EXP_SEL_ER) | | 138 | return val; |
143 | regnum); | 139 | |
144 | val = phy_read(phydev, MII_BCM54XX_EXP_DATA); | 140 | val = phy_read(phydev, MII_BCM54XX_EXP_DATA); |
145 | phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum); | 141 | |
142 | /* Restore default value. It's O.K. if this write fails. */ | ||
143 | phy_write(phydev, MII_BCM54XX_EXP_SEL, 0); | ||
146 | 144 | ||
147 | return val; | 145 | return val; |
148 | } | 146 | } |
149 | 147 | ||
150 | static int bcm54xx_exp_write(struct phy_device *phydev, | 148 | static int bcm54xx_exp_write(struct phy_device *phydev, u8 regnum, u16 val) |
151 | int sec_serdes, u8 regnum, u16 val) | ||
152 | { | 149 | { |
153 | int ret; | 150 | int ret; |
154 | 151 | ||
155 | phy_write(phydev, MII_BCM54XX_EXP_SEL, | 152 | ret = phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum); |
156 | (sec_serdes ? MII_BCM54XX_EXP_SEL_SSD : | 153 | if (ret < 0) |
157 | MII_BCM54XX_EXP_SEL_ER) | | 154 | return ret; |
158 | regnum); | 155 | |
159 | ret = phy_write(phydev, MII_BCM54XX_EXP_DATA, val); | 156 | ret = phy_write(phydev, MII_BCM54XX_EXP_DATA, val); |
160 | phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum); | 157 | |
158 | /* Restore default value. It's O.K. if this write fails. */ | ||
159 | phy_write(phydev, MII_BCM54XX_EXP_SEL, 0); | ||
161 | 160 | ||
162 | return ret; | 161 | return ret; |
163 | } | 162 | } |
@@ -205,18 +204,27 @@ static int bcm5482_config_init(struct phy_device *phydev) | |||
205 | /* | 204 | /* |
206 | * Enable SGMII slave mode and auto-detection | 205 | * Enable SGMII slave mode and auto-detection |
207 | */ | 206 | */ |
208 | reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_SGMII_SLAVE); | 207 | reg = BCM5482_SSD_SGMII_SLAVE | MII_BCM54XX_EXP_SEL_SSD; |
209 | bcm54xx_exp_write(phydev, 1, BCM5482_SSD_SGMII_SLAVE, | 208 | err = bcm54xx_exp_read(phydev, reg); |
210 | reg | | 209 | if (err < 0) |
211 | BCM5482_SSD_SGMII_SLAVE_EN | | 210 | return err; |
212 | BCM5482_SSD_SGMII_SLAVE_AD); | 211 | err = bcm54xx_exp_write(phydev, reg, err | |
212 | BCM5482_SSD_SGMII_SLAVE_EN | | ||
213 | BCM5482_SSD_SGMII_SLAVE_AD); | ||
214 | if (err < 0) | ||
215 | return err; | ||
213 | 216 | ||
214 | /* | 217 | /* |
215 | * Disable secondary SerDes powerdown | 218 | * Disable secondary SerDes powerdown |
216 | */ | 219 | */ |
217 | reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_1000BX_CTL); | 220 | reg = BCM5482_SSD_1000BX_CTL | MII_BCM54XX_EXP_SEL_SSD; |
218 | bcm54xx_exp_write(phydev, 1, BCM5482_SSD_1000BX_CTL, | 221 | err = bcm54xx_exp_read(phydev, reg); |
219 | reg & ~BCM5482_SSD_1000BX_CTL_PWRDOWN); | 222 | if (err < 0) |
223 | return err; | ||
224 | err = bcm54xx_exp_write(phydev, reg, | ||
225 | err & ~BCM5482_SSD_1000BX_CTL_PWRDOWN); | ||
226 | if (err < 0) | ||
227 | return err; | ||
220 | 228 | ||
221 | /* | 229 | /* |
222 | * Select 1000BASE-X register set (primary SerDes) | 230 | * Select 1000BASE-X register set (primary SerDes) |