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-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_hw.c3
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h1
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
index a0471f2e1c7a..48261b7252d0 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
@@ -410,6 +410,9 @@ static void ar9002_hw_configpcipowersave(struct ath_hw *ah,
410 val &= ~(AR_WA_BIT6 | AR_WA_BIT7); 410 val &= ~(AR_WA_BIT6 | AR_WA_BIT7);
411 } 411 }
412 412
413 if (AR_SREV_9280(ah))
414 val |= AR_WA_BIT22;
415
413 if (AR_SREV_9285E_20(ah)) 416 if (AR_SREV_9285E_20(ah))
414 val |= AR_WA_BIT23; 417 val |= AR_WA_BIT23;
415 418
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 42976b0a01c1..fa05b711e5cd 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -703,6 +703,7 @@
703#define AR_WA_RESET_EN (1 << 18) /* Sw Control to enable PCI-Reset to POR (bit 15) */ 703#define AR_WA_RESET_EN (1 << 18) /* Sw Control to enable PCI-Reset to POR (bit 15) */
704#define AR_WA_ANALOG_SHIFT (1 << 20) 704#define AR_WA_ANALOG_SHIFT (1 << 20)
705#define AR_WA_POR_SHORT (1 << 21) /* PCI-E Phy reset control */ 705#define AR_WA_POR_SHORT (1 << 21) /* PCI-E Phy reset control */
706#define AR_WA_BIT22 (1 << 22)
706#define AR9285_WA_DEFAULT 0x004a050b 707#define AR9285_WA_DEFAULT 0x004a050b
707#define AR9280_WA_DEFAULT 0x0040073b 708#define AR9280_WA_DEFAULT 0x0040073b
708#define AR_WA_DEFAULT 0x0000073f 709#define AR_WA_DEFAULT 0x0000073f