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-rw-r--r--drivers/i2c/algos/Kconfig39
-rw-r--r--drivers/i2c/algos/i2c-algo-pca.c126
-rw-r--r--drivers/i2c/algos/i2c-algo-pca.h26
-rw-r--r--drivers/i2c/busses/Kconfig73
-rw-r--r--drivers/i2c/busses/Makefile3
-rw-r--r--drivers/i2c/busses/i2c-at91.c2
-rw-r--r--drivers/i2c/busses/i2c-au1550.c1
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c475
-rw-r--r--drivers/i2c/busses/i2c-davinci.c9
-rw-r--r--drivers/i2c/busses/i2c-gpio.c1
-rw-r--r--drivers/i2c/busses/i2c-ibm_iic.c197
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.c1
-rw-r--r--drivers/i2c/busses/i2c-ixp2000.c1
-rw-r--r--drivers/i2c/busses/i2c-mpc.c3
-rw-r--r--drivers/i2c/busses/i2c-ocores.c3
-rw-r--r--drivers/i2c/busses/i2c-omap.c1
-rw-r--r--drivers/i2c/busses/i2c-pca-isa.c53
-rw-r--r--drivers/i2c/busses/i2c-pca-platform.c298
-rw-r--r--drivers/i2c/busses/i2c-pmcmsp.c7
-rw-r--r--drivers/i2c/busses/i2c-pnx.c45
-rw-r--r--drivers/i2c/busses/i2c-powermac.c3
-rw-r--r--drivers/i2c/busses/i2c-pxa.c3
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c5
-rw-r--r--drivers/i2c/busses/i2c-sh7760.c577
-rw-r--r--drivers/i2c/busses/i2c-sh_mobile.c500
-rw-r--r--drivers/i2c/busses/i2c-simtec.c3
-rw-r--r--drivers/i2c/busses/i2c-versatile.c1
-rw-r--r--drivers/i2c/busses/scx200_acb.c2
-rw-r--r--drivers/i2c/chips/isp1301_omap.c28
-rw-r--r--drivers/i2c/i2c-core.c2
-rw-r--r--drivers/i2c/i2c-dev.c329
31 files changed, 2247 insertions, 570 deletions
diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig
index 014dfa575be7..7137a17402fe 100644
--- a/drivers/i2c/algos/Kconfig
+++ b/drivers/i2c/algos/Kconfig
@@ -1,45 +1,16 @@
1# 1#
2# Character device configuration 2# I2C algorithm drivers configuration
3# 3#
4 4
5menu "I2C Algorithms"
6
7config I2C_ALGOBIT 5config I2C_ALGOBIT
8 tristate "I2C bit-banging interfaces" 6 tristate
9 help
10 This allows you to use a range of I2C adapters called bit-banging
11 adapters. Say Y if you own an I2C adapter belonging to this class
12 and then say Y to the specific driver for you adapter below.
13
14 This support is also available as a module. If so, the module
15 will be called i2c-algo-bit.
16 7
17config I2C_ALGOPCF 8config I2C_ALGOPCF
18 tristate "I2C PCF 8584 interfaces" 9 tristate
19 help
20 This allows you to use a range of I2C adapters called PCF adapters.
21 Say Y if you own an I2C adapter belonging to this class and then say
22 Y to the specific driver for you adapter below.
23
24 This support is also available as a module. If so, the module
25 will be called i2c-algo-pcf.
26 10
27config I2C_ALGOPCA 11config I2C_ALGOPCA
28 tristate "I2C PCA 9564 interfaces" 12 tristate
29 help
30 This allows you to use a range of I2C adapters called PCA adapters.
31 Say Y if you own an I2C adapter belonging to this class and then say
32 Y to the specific driver for you adapter below.
33
34 This support is also available as a module. If so, the module
35 will be called i2c-algo-pca.
36 13
37config I2C_ALGO_SGI 14config I2C_ALGO_SGI
38 tristate "I2C SGI interfaces" 15 tristate
39 depends on SGI_IP22 || SGI_IP32 || X86_VISWS 16 depends on SGI_IP22 || SGI_IP32 || X86_VISWS
40 help
41 Supports the SGI interfaces like the ones found on SGI Indy VINO
42 or SGI O2 MACE.
43
44endmenu
45
diff --git a/drivers/i2c/algos/i2c-algo-pca.c b/drivers/i2c/algos/i2c-algo-pca.c
index 2a16211f12e5..e954a20b97a6 100644
--- a/drivers/i2c/algos/i2c-algo-pca.c
+++ b/drivers/i2c/algos/i2c-algo-pca.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters 2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
3 * Copyright (C) 2004 Arcom Control Systems 3 * Copyright (C) 2004 Arcom Control Systems
4 * Copyright (C) 2008 Pengutronix
4 * 5 *
5 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -21,14 +22,10 @@
21#include <linux/module.h> 22#include <linux/module.h>
22#include <linux/moduleparam.h> 23#include <linux/moduleparam.h>
23#include <linux/delay.h> 24#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/errno.h> 26#include <linux/errno.h>
27#include <linux/i2c.h> 27#include <linux/i2c.h>
28#include <linux/i2c-algo-pca.h> 28#include <linux/i2c-algo-pca.h>
29#include "i2c-algo-pca.h"
30
31#define DRIVER "i2c-algo-pca"
32 29
33#define DEB1(fmt, args...) do { if (i2c_debug>=1) printk(fmt, ## args); } while(0) 30#define DEB1(fmt, args...) do { if (i2c_debug>=1) printk(fmt, ## args); } while(0)
34#define DEB2(fmt, args...) do { if (i2c_debug>=2) printk(fmt, ## args); } while(0) 31#define DEB2(fmt, args...) do { if (i2c_debug>=2) printk(fmt, ## args); } while(0)
@@ -36,15 +33,15 @@
36 33
37static int i2c_debug; 34static int i2c_debug;
38 35
39#define pca_outw(adap, reg, val) adap->write_byte(adap, reg, val) 36#define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
40#define pca_inw(adap, reg) adap->read_byte(adap, reg) 37#define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
41 38
42#define pca_status(adap) pca_inw(adap, I2C_PCA_STA) 39#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
43#define pca_clock(adap) adap->get_clock(adap) 40#define pca_clock(adap) adap->i2c_clock
44#define pca_own(adap) adap->get_own(adap)
45#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val) 41#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
46#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON) 42#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
47#define pca_wait(adap) adap->wait_for_interrupt(adap) 43#define pca_wait(adap) adap->wait_for_completion(adap->data)
44#define pca_reset(adap) adap->reset_chip(adap->data)
48 45
49/* 46/*
50 * Generate a start condition on the i2c bus. 47 * Generate a start condition on the i2c bus.
@@ -99,7 +96,7 @@ static void pca_stop(struct i2c_algo_pca_data *adap)
99 * 96 *
100 * returns after the address has been sent 97 * returns after the address has been sent
101 */ 98 */
102static void pca_address(struct i2c_algo_pca_data *adap, 99static void pca_address(struct i2c_algo_pca_data *adap,
103 struct i2c_msg *msg) 100 struct i2c_msg *msg)
104{ 101{
105 int sta = pca_get_con(adap); 102 int sta = pca_get_con(adap);
@@ -108,9 +105,9 @@ static void pca_address(struct i2c_algo_pca_data *adap,
108 addr = ( (0x7f & msg->addr) << 1 ); 105 addr = ( (0x7f & msg->addr) << 1 );
109 if (msg->flags & I2C_M_RD ) 106 if (msg->flags & I2C_M_RD )
110 addr |= 1; 107 addr |= 1;
111 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n", 108 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
112 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr); 109 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
113 110
114 pca_outw(adap, I2C_PCA_DAT, addr); 111 pca_outw(adap, I2C_PCA_DAT, addr);
115 112
116 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); 113 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
@@ -124,7 +121,7 @@ static void pca_address(struct i2c_algo_pca_data *adap,
124 * 121 *
125 * Returns after the byte has been transmitted 122 * Returns after the byte has been transmitted
126 */ 123 */
127static void pca_tx_byte(struct i2c_algo_pca_data *adap, 124static void pca_tx_byte(struct i2c_algo_pca_data *adap,
128 __u8 b) 125 __u8 b)
129{ 126{
130 int sta = pca_get_con(adap); 127 int sta = pca_get_con(adap);
@@ -142,19 +139,19 @@ static void pca_tx_byte(struct i2c_algo_pca_data *adap,
142 * 139 *
143 * returns immediately. 140 * returns immediately.
144 */ 141 */
145static void pca_rx_byte(struct i2c_algo_pca_data *adap, 142static void pca_rx_byte(struct i2c_algo_pca_data *adap,
146 __u8 *b, int ack) 143 __u8 *b, int ack)
147{ 144{
148 *b = pca_inw(adap, I2C_PCA_DAT); 145 *b = pca_inw(adap, I2C_PCA_DAT);
149 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK"); 146 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
150} 147}
151 148
152/* 149/*
153 * Setup ACK or NACK for next received byte and wait for it to arrive. 150 * Setup ACK or NACK for next received byte and wait for it to arrive.
154 * 151 *
155 * Returns after next byte has arrived. 152 * Returns after next byte has arrived.
156 */ 153 */
157static void pca_rx_ack(struct i2c_algo_pca_data *adap, 154static void pca_rx_ack(struct i2c_algo_pca_data *adap,
158 int ack) 155 int ack)
159{ 156{
160 int sta = pca_get_con(adap); 157 int sta = pca_get_con(adap);
@@ -168,15 +165,6 @@ static void pca_rx_ack(struct i2c_algo_pca_data *adap,
168 pca_wait(adap); 165 pca_wait(adap);
169} 166}
170 167
171/*
172 * Reset the i2c bus / SIO
173 */
174static void pca_reset(struct i2c_algo_pca_data *adap)
175{
176 /* apparently only an external reset will do it. not a lot can be done */
177 printk(KERN_ERR DRIVER ": Haven't figured out how to do a reset yet\n");
178}
179
180static int pca_xfer(struct i2c_adapter *i2c_adap, 168static int pca_xfer(struct i2c_adapter *i2c_adap,
181 struct i2c_msg *msgs, 169 struct i2c_msg *msgs,
182 int num) 170 int num)
@@ -187,7 +175,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
187 int numbytes = 0; 175 int numbytes = 0;
188 int state; 176 int state;
189 int ret; 177 int ret;
190 int timeout = 100; 178 int timeout = i2c_adap->timeout;
191 179
192 while ((state = pca_status(adap)) != 0xf8 && timeout--) { 180 while ((state = pca_status(adap)) != 0xf8 && timeout--) {
193 msleep(10); 181 msleep(10);
@@ -203,14 +191,14 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
203 for (curmsg = 0; curmsg < num; curmsg++) { 191 for (curmsg = 0; curmsg < num; curmsg++) {
204 int addr, i; 192 int addr, i;
205 msg = &msgs[curmsg]; 193 msg = &msgs[curmsg];
206 194
207 addr = (0x7f & msg->addr) ; 195 addr = (0x7f & msg->addr) ;
208 196
209 if (msg->flags & I2C_M_RD ) 197 if (msg->flags & I2C_M_RD )
210 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n", 198 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
211 curmsg, msg->len, addr, (addr<<1) | 1); 199 curmsg, msg->len, addr, (addr<<1) | 1);
212 else { 200 else {
213 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s", 201 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
214 curmsg, msg->len, addr, addr<<1, 202 curmsg, msg->len, addr, addr<<1,
215 msg->len == 0 ? "" : ", "); 203 msg->len == 0 ? "" : ", ");
216 for(i=0; i < msg->len; i++) 204 for(i=0; i < msg->len; i++)
@@ -237,7 +225,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
237 case 0x10: /* A repeated start condition has been transmitted */ 225 case 0x10: /* A repeated start condition has been transmitted */
238 pca_address(adap, msg); 226 pca_address(adap, msg);
239 break; 227 break;
240 228
241 case 0x18: /* SLA+W has been transmitted; ACK has been received */ 229 case 0x18: /* SLA+W has been transmitted; ACK has been received */
242 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */ 230 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
243 if (numbytes < msg->len) { 231 if (numbytes < msg->len) {
@@ -287,7 +275,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
287 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */ 275 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
288 DEB2("Arbitration lost\n"); 276 DEB2("Arbitration lost\n");
289 goto out; 277 goto out;
290 278
291 case 0x58: /* Data byte has been received; NOT ACK has been returned */ 279 case 0x58: /* Data byte has been received; NOT ACK has been returned */
292 if ( numbytes == msg->len - 1 ) { 280 if ( numbytes == msg->len - 1 ) {
293 pca_rx_byte(adap, &msg->buf[numbytes], 0); 281 pca_rx_byte(adap, &msg->buf[numbytes], 0);
@@ -317,16 +305,16 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
317 pca_reset(adap); 305 pca_reset(adap);
318 goto out; 306 goto out;
319 default: 307 default:
320 printk(KERN_ERR DRIVER ": unhandled SIO state 0x%02x\n", state); 308 dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
321 break; 309 break;
322 } 310 }
323 311
324 } 312 }
325 313
326 ret = curmsg; 314 ret = curmsg;
327 out: 315 out:
328 DEB1(KERN_CRIT "}}} transfered %d/%d messages. " 316 DEB1(KERN_CRIT "}}} transfered %d/%d messages. "
329 "status is %#04x. control is %#04x\n", 317 "status is %#04x. control is %#04x\n",
330 curmsg, num, pca_status(adap), 318 curmsg, num, pca_status(adap),
331 pca_get_con(adap)); 319 pca_get_con(adap));
332 return ret; 320 return ret;
@@ -337,53 +325,65 @@ static u32 pca_func(struct i2c_adapter *adap)
337 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 325 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
338} 326}
339 327
340static int pca_init(struct i2c_algo_pca_data *adap) 328static const struct i2c_algorithm pca_algo = {
329 .master_xfer = pca_xfer,
330 .functionality = pca_func,
331};
332
333static int pca_init(struct i2c_adapter *adap)
341{ 334{
342 static int freqs[] = {330,288,217,146,88,59,44,36}; 335 static int freqs[] = {330,288,217,146,88,59,44,36};
343 int own, clock; 336 int clock;
337 struct i2c_algo_pca_data *pca_data = adap->algo_data;
338
339 if (pca_data->i2c_clock > 7) {
340 printk(KERN_WARNING "%s: Invalid I2C clock speed selected. Trying default.\n",
341 adap->name);
342 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
343 }
344
345 adap->algo = &pca_algo;
344 346
345 own = pca_own(adap); 347 pca_reset(pca_data);
346 clock = pca_clock(adap);
347 DEB1(KERN_INFO DRIVER ": own address is %#04x\n", own);
348 DEB1(KERN_INFO DRIVER ": clock freqeuncy is %dkHz\n", freqs[clock]);
349 348
350 pca_outw(adap, I2C_PCA_ADR, own << 1); 349 clock = pca_clock(pca_data);
350 DEB1(KERN_INFO "%s: Clock frequency is %dkHz\n", adap->name, freqs[clock]);
351 351
352 pca_set_con(adap, I2C_PCA_CON_ENSIO | clock); 352 pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
353 udelay(500); /* 500 µs for oscilator to stabilise */ 353 udelay(500); /* 500 us for oscilator to stabilise */
354 354
355 return 0; 355 return 0;
356} 356}
357 357
358static const struct i2c_algorithm pca_algo = { 358/*
359 .master_xfer = pca_xfer, 359 * registering functions to load algorithms at runtime
360 .functionality = pca_func,
361};
362
363/*
364 * registering functions to load algorithms at runtime
365 */ 360 */
366int i2c_pca_add_bus(struct i2c_adapter *adap) 361int i2c_pca_add_bus(struct i2c_adapter *adap)
367{ 362{
368 struct i2c_algo_pca_data *pca_adap = adap->algo_data;
369 int rval; 363 int rval;
370 364
371 /* register new adapter to i2c module... */ 365 rval = pca_init(adap);
372 adap->algo = &pca_algo; 366 if (rval)
367 return rval;
373 368
374 adap->timeout = 100; /* default values, should */ 369 return i2c_add_adapter(adap);
375 adap->retries = 3; /* be replaced by defines */ 370}
371EXPORT_SYMBOL(i2c_pca_add_bus);
376 372
377 if ((rval = pca_init(pca_adap))) 373int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
378 return rval; 374{
375 int rval;
379 376
380 rval = i2c_add_adapter(adap); 377 rval = pca_init(adap);
378 if (rval)
379 return rval;
381 380
382 return rval; 381 return i2c_add_numbered_adapter(adap);
383} 382}
384EXPORT_SYMBOL(i2c_pca_add_bus); 383EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
385 384
386MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>"); 385MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
386 "Wolfram Sang <w.sang@pengutronix.de>");
387MODULE_DESCRIPTION("I2C-Bus PCA9564 algorithm"); 387MODULE_DESCRIPTION("I2C-Bus PCA9564 algorithm");
388MODULE_LICENSE("GPL"); 388MODULE_LICENSE("GPL");
389 389
diff --git a/drivers/i2c/algos/i2c-algo-pca.h b/drivers/i2c/algos/i2c-algo-pca.h
deleted file mode 100644
index 2fee07e05211..000000000000
--- a/drivers/i2c/algos/i2c-algo-pca.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef I2C_PCA9564_H
2#define I2C_PCA9564_H 1
3
4#define I2C_PCA_STA 0x00 /* STATUS Read Only */
5#define I2C_PCA_TO 0x00 /* TIMEOUT Write Only */
6#define I2C_PCA_DAT 0x01 /* DATA Read/Write */
7#define I2C_PCA_ADR 0x02 /* OWN ADR Read/Write */
8#define I2C_PCA_CON 0x03 /* CONTROL Read/Write */
9
10#define I2C_PCA_CON_AA 0x80 /* Assert Acknowledge */
11#define I2C_PCA_CON_ENSIO 0x40 /* Enable */
12#define I2C_PCA_CON_STA 0x20 /* Start */
13#define I2C_PCA_CON_STO 0x10 /* Stop */
14#define I2C_PCA_CON_SI 0x08 /* Serial Interrupt */
15#define I2C_PCA_CON_CR 0x07 /* Clock Rate (MASK) */
16
17#define I2C_PCA_CON_330kHz 0x00
18#define I2C_PCA_CON_288kHz 0x01
19#define I2C_PCA_CON_217kHz 0x02
20#define I2C_PCA_CON_146kHz 0x03
21#define I2C_PCA_CON_88kHz 0x04
22#define I2C_PCA_CON_59kHz 0x05
23#define I2C_PCA_CON_44kHz 0x06
24#define I2C_PCA_CON_36kHz 0x07
25
26#endif /* I2C_PCA9564_H */
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index b04c99580d0d..48438cc5d0ca 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -100,9 +100,12 @@ config I2C_AU1550
100 100
101config I2C_BLACKFIN_TWI 101config I2C_BLACKFIN_TWI
102 tristate "Blackfin TWI I2C support" 102 tristate "Blackfin TWI I2C support"
103 depends on BF534 || BF536 || BF537 103 depends on BLACKFIN
104 help 104 help
105 This is the TWI I2C device driver for Blackfin 534/536/537/54x. 105 This is the TWI I2C device driver for Blackfin BF522, BF525,
106 BF527, BF534, BF536, BF537 and BF54x. For other Blackfin processors,
107 please don't use this driver.
108
106 This driver can also be built as a module. If so, the module 109 This driver can also be built as a module. If so, the module
107 will be called i2c-bfin-twi. 110 will be called i2c-bfin-twi.
108 111
@@ -135,7 +138,7 @@ config I2C_ELEKTOR
135 This supports the PCF8584 ISA bus I2C adapter. Say Y if you own 138 This supports the PCF8584 ISA bus I2C adapter. Say Y if you own
136 such an adapter. 139 such an adapter.
137 140
138 This support is also available as a module. If so, the module 141 This support is also available as a module. If so, the module
139 will be called i2c-elektor. 142 will be called i2c-elektor.
140 143
141config I2C_GPIO 144config I2C_GPIO
@@ -190,7 +193,7 @@ config I2C_I810
190 select I2C_ALGOBIT 193 select I2C_ALGOBIT
191 help 194 help
192 If you say yes to this option, support will be included for the Intel 195 If you say yes to this option, support will be included for the Intel
193 810/815 family of mainboard I2C interfaces. Specifically, the 196 810/815 family of mainboard I2C interfaces. Specifically, the
194 following versions of the chipset are supported: 197 following versions of the chipset are supported:
195 i810AA 198 i810AA
196 i810AB 199 i810AB
@@ -246,10 +249,10 @@ config I2C_PIIX4
246 249
247config I2C_IBM_IIC 250config I2C_IBM_IIC
248 tristate "IBM PPC 4xx on-chip I2C interface" 251 tristate "IBM PPC 4xx on-chip I2C interface"
249 depends on IBM_OCP 252 depends on 4xx
250 help 253 help
251 Say Y here if you want to use IIC peripheral found on 254 Say Y here if you want to use IIC peripheral found on
252 embedded IBM PPC 4xx based systems. 255 embedded IBM PPC 4xx based systems.
253 256
254 This driver can also be built as a module. If so, the module 257 This driver can also be built as a module. If so, the module
255 will be called i2c-ibm_iic. 258 will be called i2c-ibm_iic.
@@ -269,7 +272,7 @@ config I2C_IXP2000
269 depends on ARCH_IXP2000 272 depends on ARCH_IXP2000
270 select I2C_ALGOBIT 273 select I2C_ALGOBIT
271 help 274 help
272 Say Y here if you have an Intel IXP2000 (2400, 2800, 2850) based 275 Say Y here if you have an Intel IXP2000 (2400, 2800, 2850) based
273 system and are using GPIO lines for an I2C bus. 276 system and are using GPIO lines for an I2C bus.
274 277
275 This support is also available as a module. If so, the module 278 This support is also available as a module. If so, the module
@@ -354,7 +357,7 @@ config I2C_PARPORT
354 on the parport driver. This is meant for embedded systems. Don't say 357 on the parport driver. This is meant for embedded systems. Don't say
355 Y here if you intend to say Y or M there. 358 Y here if you intend to say Y or M there.
356 359
357 This support is also available as a module. If so, the module 360 This support is also available as a module. If so, the module
358 will be called i2c-parport. 361 will be called i2c-parport.
359 362
360config I2C_PARPORT_LIGHT 363config I2C_PARPORT_LIGHT
@@ -372,12 +375,12 @@ config I2C_PARPORT_LIGHT
372 the clean but heavy parport handling is not an option. The 375 the clean but heavy parport handling is not an option. The
373 drawback is a reduced portability and the impossibility to 376 drawback is a reduced portability and the impossibility to
374 daisy-chain other parallel port devices. 377 daisy-chain other parallel port devices.
375 378
376 Don't say Y here if you said Y or M to i2c-parport. Saying M to 379 Don't say Y here if you said Y or M to i2c-parport. Saying M to
377 both is possible but both modules should not be loaded at the same 380 both is possible but both modules should not be loaded at the same
378 time. 381 time.
379 382
380 This support is also available as a module. If so, the module 383 This support is also available as a module. If so, the module
381 will be called i2c-parport-light. 384 will be called i2c-parport-light.
382 385
383config I2C_PASEMI 386config I2C_PASEMI
@@ -401,7 +404,7 @@ config I2C_PROSAVAGE
401 404
402 This driver is deprecated in favor of the savagefb driver. 405 This driver is deprecated in favor of the savagefb driver.
403 406
404 This support is also available as a module. If so, the module 407 This support is also available as a module. If so, the module
405 will be called i2c-prosavage. 408 will be called i2c-prosavage.
406 409
407config I2C_S3C2410 410config I2C_S3C2410
@@ -417,7 +420,7 @@ config I2C_SAVAGE4
417 depends on PCI 420 depends on PCI
418 select I2C_ALGOBIT 421 select I2C_ALGOBIT
419 help 422 help
420 If you say yes to this option, support will be included for the 423 If you say yes to this option, support will be included for the
421 S3 Savage 4 I2C interface. 424 S3 Savage 4 I2C interface.
422 425
423 This driver is deprecated in favor of the savagefb driver. 426 This driver is deprecated in favor of the savagefb driver.
@@ -452,7 +455,7 @@ config SCx200_I2C
452 455
453 If you don't know what to do here, say N. 456 If you don't know what to do here, say N.
454 457
455 This support is also available as a module. If so, the module 458 This support is also available as a module. If so, the module
456 will be called scx200_i2c. 459 will be called scx200_i2c.
457 460
458 This driver is deprecated and will be dropped soon. Use i2c-gpio 461 This driver is deprecated and will be dropped soon. Use i2c-gpio
@@ -483,14 +486,14 @@ config SCx200_ACB
483 486
484 If you don't know what to do here, say N. 487 If you don't know what to do here, say N.
485 488
486 This support is also available as a module. If so, the module 489 This support is also available as a module. If so, the module
487 will be called scx200_acb. 490 will be called scx200_acb.
488 491
489config I2C_SIS5595 492config I2C_SIS5595
490 tristate "SiS 5595" 493 tristate "SiS 5595"
491 depends on PCI 494 depends on PCI
492 help 495 help
493 If you say yes to this option, support will be included for the 496 If you say yes to this option, support will be included for the
494 SiS5595 SMBus (a subset of I2C) interface. 497 SiS5595 SMBus (a subset of I2C) interface.
495 498
496 This driver can also be built as a module. If so, the module 499 This driver can also be built as a module. If so, the module
@@ -500,7 +503,7 @@ config I2C_SIS630
500 tristate "SiS 630/730" 503 tristate "SiS 630/730"
501 depends on PCI 504 depends on PCI
502 help 505 help
503 If you say yes to this option, support will be included for the 506 If you say yes to this option, support will be included for the
504 SiS630 and SiS730 SMBus (a subset of I2C) interface. 507 SiS630 and SiS730 SMBus (a subset of I2C) interface.
505 508
506 This driver can also be built as a module. If so, the module 509 This driver can also be built as a module. If so, the module
@@ -632,9 +635,9 @@ config I2C_PCA_ISA
632 select I2C_ALGOPCA 635 select I2C_ALGOPCA
633 default n 636 default n
634 help 637 help
635 This driver supports ISA boards using the Philips PCA 9564 638 This driver supports ISA boards using the Philips PCA9564
636 Parallel bus to I2C bus controller 639 parallel bus to I2C bus controller.
637 640
638 This driver can also be built as a module. If so, the module 641 This driver can also be built as a module. If so, the module
639 will be called i2c-pca-isa. 642 will be called i2c-pca-isa.
640 643
@@ -643,6 +646,17 @@ config I2C_PCA_ISA
643 delays when I2C/SMBus chip drivers are loaded (e.g. at boot 646 delays when I2C/SMBus chip drivers are loaded (e.g. at boot
644 time). If unsure, say N. 647 time). If unsure, say N.
645 648
649config I2C_PCA_PLATFORM
650 tristate "PCA9564 as platform device"
651 select I2C_ALGOPCA
652 default n
653 help
654 This driver supports a memory mapped Philips PCA9564
655 parallel bus to I2C bus controller.
656
657 This driver can also be built as a module. If so, the module
658 will be called i2c-pca-platform.
659
646config I2C_MV64XXX 660config I2C_MV64XXX
647 tristate "Marvell mv64xxx I2C Controller" 661 tristate "Marvell mv64xxx I2C Controller"
648 depends on (MV64X60 || PLAT_ORION) && EXPERIMENTAL 662 depends on (MV64X60 || PLAT_ORION) && EXPERIMENTAL
@@ -672,4 +686,23 @@ config I2C_PMCMSP
672 This driver can also be built as module. If so, the module 686 This driver can also be built as module. If so, the module
673 will be called i2c-pmcmsp. 687 will be called i2c-pmcmsp.
674 688
689config I2C_SH7760
690 tristate "Renesas SH7760 I2C Controller"
691 depends on CPU_SUBTYPE_SH7760
692 help
693 This driver supports the 2 I2C interfaces on the Renesas SH7760.
694
695 This driver can also be built as a module. If so, the module
696 will be called i2c-sh7760.
697
698config I2C_SH_MOBILE
699 tristate "SuperH Mobile I2C Controller"
700 depends on SUPERH
701 help
702 If you say yes to this option, support will be included for the
703 built-in I2C interface on the Renesas SH-Mobile processor.
704
705 This driver can also be built as a module. If so, the module
706 will be called i2c-sh_mobile.
707
675endmenu 708endmenu
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index ea7068f1eb6b..e8c882a5ea66 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
30obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o 30obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
31obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o 31obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
32obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o 32obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
33obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o
33obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o 34obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
34obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o 35obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
35obj-$(CONFIG_I2C_PNX) += i2c-pnx.o 36obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
@@ -37,6 +38,8 @@ obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o
37obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 38obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
38obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 39obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
39obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o 40obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o
41obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
42obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
40obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o 43obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
41obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o 44obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
42obj-$(CONFIG_I2C_SIS5595) += i2c-sis5595.o 45obj-$(CONFIG_I2C_SIS5595) += i2c-sis5595.o
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index c09b036913bd..73d61946a534 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -298,7 +298,7 @@ static int at91_i2c_resume(struct platform_device *pdev)
298#endif 298#endif
299 299
300/* work with "modprobe at91_i2c" from hotplugging or coldplugging */ 300/* work with "modprobe at91_i2c" from hotplugging or coldplugging */
301MODULE_ALIAS("at91_i2c"); 301MODULE_ALIAS("platform:at91_i2c");
302 302
303static struct platform_driver at91_i2c_driver = { 303static struct platform_driver at91_i2c_driver = {
304 .probe = at91_i2c_probe, 304 .probe = at91_i2c_probe,
diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c
index 1953b26da56a..491718fe46b7 100644
--- a/drivers/i2c/busses/i2c-au1550.c
+++ b/drivers/i2c/busses/i2c-au1550.c
@@ -472,6 +472,7 @@ i2c_au1550_exit(void)
472MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC."); 472MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC.");
473MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550"); 473MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550");
474MODULE_LICENSE("GPL"); 474MODULE_LICENSE("GPL");
475MODULE_ALIAS("platform:au1xpsc_smbus");
475 476
476module_init (i2c_au1550_init); 477module_init (i2c_au1550_init);
477module_exit (i2c_au1550_exit); 478module_exit (i2c_au1550_exit);
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index 7dbdaeb707a9..48d084bdf7c8 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -1,25 +1,11 @@
1/* 1/*
2 * drivers/i2c/busses/i2c-bfin-twi.c 2 * Blackfin On-Chip Two Wire Interface Driver
3 * 3 *
4 * Description: Driver for Blackfin Two Wire Interface 4 * Copyright 2005-2007 Analog Devices Inc.
5 * 5 *
6 * Author: sonicz <sonic.zhang@analog.com> 6 * Enter bugs at http://blackfin.uclinux.org/
7 * 7 *
8 * Copyright (c) 2005-2007 Analog Devices, Inc. 8 * Licensed under the GPL-2 or later.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */ 9 */
24 10
25#include <linux/module.h> 11#include <linux/module.h>
@@ -34,14 +20,16 @@
34#include <linux/platform_device.h> 20#include <linux/platform_device.h>
35 21
36#include <asm/blackfin.h> 22#include <asm/blackfin.h>
23#include <asm/portmux.h>
37#include <asm/irq.h> 24#include <asm/irq.h>
38 25
39#define POLL_TIMEOUT (2 * HZ) 26#define POLL_TIMEOUT (2 * HZ)
40 27
41/* SMBus mode*/ 28/* SMBus mode*/
42#define TWI_I2C_MODE_STANDARD 0x01 29#define TWI_I2C_MODE_STANDARD 1
43#define TWI_I2C_MODE_STANDARDSUB 0x02 30#define TWI_I2C_MODE_STANDARDSUB 2
44#define TWI_I2C_MODE_COMBINED 0x04 31#define TWI_I2C_MODE_COMBINED 3
32#define TWI_I2C_MODE_REPEAT 4
45 33
46struct bfin_twi_iface { 34struct bfin_twi_iface {
47 int irq; 35 int irq;
@@ -58,39 +46,74 @@ struct bfin_twi_iface {
58 struct timer_list timeout_timer; 46 struct timer_list timeout_timer;
59 struct i2c_adapter adap; 47 struct i2c_adapter adap;
60 struct completion complete; 48 struct completion complete;
49 struct i2c_msg *pmsg;
50 int msg_num;
51 int cur_msg;
52 void __iomem *regs_base;
61}; 53};
62 54
63static struct bfin_twi_iface twi_iface; 55
56#define DEFINE_TWI_REG(reg, off) \
57static inline u16 read_##reg(struct bfin_twi_iface *iface) \
58 { return bfin_read16(iface->regs_base + (off)); } \
59static inline void write_##reg(struct bfin_twi_iface *iface, u16 v) \
60 { bfin_write16(iface->regs_base + (off), v); }
61
62DEFINE_TWI_REG(CLKDIV, 0x00)
63DEFINE_TWI_REG(CONTROL, 0x04)
64DEFINE_TWI_REG(SLAVE_CTL, 0x08)
65DEFINE_TWI_REG(SLAVE_STAT, 0x0C)
66DEFINE_TWI_REG(SLAVE_ADDR, 0x10)
67DEFINE_TWI_REG(MASTER_CTL, 0x14)
68DEFINE_TWI_REG(MASTER_STAT, 0x18)
69DEFINE_TWI_REG(MASTER_ADDR, 0x1C)
70DEFINE_TWI_REG(INT_STAT, 0x20)
71DEFINE_TWI_REG(INT_MASK, 0x24)
72DEFINE_TWI_REG(FIFO_CTL, 0x28)
73DEFINE_TWI_REG(FIFO_STAT, 0x2C)
74DEFINE_TWI_REG(XMT_DATA8, 0x80)
75DEFINE_TWI_REG(XMT_DATA16, 0x84)
76DEFINE_TWI_REG(RCV_DATA8, 0x88)
77DEFINE_TWI_REG(RCV_DATA16, 0x8C)
78
79static const u16 pin_req[2][3] = {
80 {P_TWI0_SCL, P_TWI0_SDA, 0},
81 {P_TWI1_SCL, P_TWI1_SDA, 0},
82};
64 83
65static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) 84static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
66{ 85{
67 unsigned short twi_int_status = bfin_read_TWI_INT_STAT(); 86 unsigned short twi_int_status = read_INT_STAT(iface);
68 unsigned short mast_stat = bfin_read_TWI_MASTER_STAT(); 87 unsigned short mast_stat = read_MASTER_STAT(iface);
69 88
70 if (twi_int_status & XMTSERV) { 89 if (twi_int_status & XMTSERV) {
71 /* Transmit next data */ 90 /* Transmit next data */
72 if (iface->writeNum > 0) { 91 if (iface->writeNum > 0) {
73 bfin_write_TWI_XMT_DATA8(*(iface->transPtr++)); 92 write_XMT_DATA8(iface, *(iface->transPtr++));
74 iface->writeNum--; 93 iface->writeNum--;
75 } 94 }
76 /* start receive immediately after complete sending in 95 /* start receive immediately after complete sending in
77 * combine mode. 96 * combine mode.
78 */ 97 */
79 else if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { 98 else if (iface->cur_mode == TWI_I2C_MODE_COMBINED)
80 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() 99 write_MASTER_CTL(iface,
81 | MDIR | RSTART); 100 read_MASTER_CTL(iface) | MDIR | RSTART);
82 } else if (iface->manual_stop) 101 else if (iface->manual_stop)
83 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() 102 write_MASTER_CTL(iface,
84 | STOP); 103 read_MASTER_CTL(iface) | STOP);
104 else if (iface->cur_mode == TWI_I2C_MODE_REPEAT &&
105 iface->cur_msg+1 < iface->msg_num)
106 write_MASTER_CTL(iface,
107 read_MASTER_CTL(iface) | RSTART);
85 SSYNC(); 108 SSYNC();
86 /* Clear status */ 109 /* Clear status */
87 bfin_write_TWI_INT_STAT(XMTSERV); 110 write_INT_STAT(iface, XMTSERV);
88 SSYNC(); 111 SSYNC();
89 } 112 }
90 if (twi_int_status & RCVSERV) { 113 if (twi_int_status & RCVSERV) {
91 if (iface->readNum > 0) { 114 if (iface->readNum > 0) {
92 /* Receive next data */ 115 /* Receive next data */
93 *(iface->transPtr) = bfin_read_TWI_RCV_DATA8(); 116 *(iface->transPtr) = read_RCV_DATA8(iface);
94 if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { 117 if (iface->cur_mode == TWI_I2C_MODE_COMBINED) {
95 /* Change combine mode into sub mode after 118 /* Change combine mode into sub mode after
96 * read first data. 119 * read first data.
@@ -105,28 +128,33 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
105 iface->transPtr++; 128 iface->transPtr++;
106 iface->readNum--; 129 iface->readNum--;
107 } else if (iface->manual_stop) { 130 } else if (iface->manual_stop) {
108 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() 131 write_MASTER_CTL(iface,
109 | STOP); 132 read_MASTER_CTL(iface) | STOP);
133 SSYNC();
134 } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT &&
135 iface->cur_msg+1 < iface->msg_num) {
136 write_MASTER_CTL(iface,
137 read_MASTER_CTL(iface) | RSTART);
110 SSYNC(); 138 SSYNC();
111 } 139 }
112 /* Clear interrupt source */ 140 /* Clear interrupt source */
113 bfin_write_TWI_INT_STAT(RCVSERV); 141 write_INT_STAT(iface, RCVSERV);
114 SSYNC(); 142 SSYNC();
115 } 143 }
116 if (twi_int_status & MERR) { 144 if (twi_int_status & MERR) {
117 bfin_write_TWI_INT_STAT(MERR); 145 write_INT_STAT(iface, MERR);
118 bfin_write_TWI_INT_MASK(0); 146 write_INT_MASK(iface, 0);
119 bfin_write_TWI_MASTER_STAT(0x3e); 147 write_MASTER_STAT(iface, 0x3e);
120 bfin_write_TWI_MASTER_CTL(0); 148 write_MASTER_CTL(iface, 0);
121 SSYNC(); 149 SSYNC();
122 iface->result = -1; 150 iface->result = -EIO;
123 /* if both err and complete int stats are set, return proper 151 /* if both err and complete int stats are set, return proper
124 * results. 152 * results.
125 */ 153 */
126 if (twi_int_status & MCOMP) { 154 if (twi_int_status & MCOMP) {
127 bfin_write_TWI_INT_STAT(MCOMP); 155 write_INT_STAT(iface, MCOMP);
128 bfin_write_TWI_INT_MASK(0); 156 write_INT_MASK(iface, 0);
129 bfin_write_TWI_MASTER_CTL(0); 157 write_MASTER_CTL(iface, 0);
130 SSYNC(); 158 SSYNC();
131 /* If it is a quick transfer, only address bug no data, 159 /* If it is a quick transfer, only address bug no data,
132 * not an err, return 1. 160 * not an err, return 1.
@@ -143,7 +171,7 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
143 return; 171 return;
144 } 172 }
145 if (twi_int_status & MCOMP) { 173 if (twi_int_status & MCOMP) {
146 bfin_write_TWI_INT_STAT(MCOMP); 174 write_INT_STAT(iface, MCOMP);
147 SSYNC(); 175 SSYNC();
148 if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { 176 if (iface->cur_mode == TWI_I2C_MODE_COMBINED) {
149 if (iface->readNum == 0) { 177 if (iface->readNum == 0) {
@@ -152,28 +180,63 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
152 */ 180 */
153 iface->readNum = 1; 181 iface->readNum = 1;
154 iface->manual_stop = 1; 182 iface->manual_stop = 1;
155 bfin_write_TWI_MASTER_CTL( 183 write_MASTER_CTL(iface,
156 bfin_read_TWI_MASTER_CTL() 184 read_MASTER_CTL(iface) | (0xff << 6));
157 | (0xff << 6));
158 } else { 185 } else {
159 /* set the readd number in other 186 /* set the readd number in other
160 * combine mode. 187 * combine mode.
161 */ 188 */
162 bfin_write_TWI_MASTER_CTL( 189 write_MASTER_CTL(iface,
163 (bfin_read_TWI_MASTER_CTL() & 190 (read_MASTER_CTL(iface) &
164 (~(0xff << 6))) | 191 (~(0xff << 6))) |
165 ( iface->readNum << 6)); 192 (iface->readNum << 6));
193 }
194 /* remove restart bit and enable master receive */
195 write_MASTER_CTL(iface,
196 read_MASTER_CTL(iface) & ~RSTART);
197 write_MASTER_CTL(iface,
198 read_MASTER_CTL(iface) | MEN | MDIR);
199 SSYNC();
200 } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT &&
201 iface->cur_msg+1 < iface->msg_num) {
202 iface->cur_msg++;
203 iface->transPtr = iface->pmsg[iface->cur_msg].buf;
204 iface->writeNum = iface->readNum =
205 iface->pmsg[iface->cur_msg].len;
206 /* Set Transmit device address */
207 write_MASTER_ADDR(iface,
208 iface->pmsg[iface->cur_msg].addr);
209 if (iface->pmsg[iface->cur_msg].flags & I2C_M_RD)
210 iface->read_write = I2C_SMBUS_READ;
211 else {
212 iface->read_write = I2C_SMBUS_WRITE;
213 /* Transmit first data */
214 if (iface->writeNum > 0) {
215 write_XMT_DATA8(iface,
216 *(iface->transPtr++));
217 iface->writeNum--;
218 SSYNC();
219 }
220 }
221
222 if (iface->pmsg[iface->cur_msg].len <= 255)
223 write_MASTER_CTL(iface,
224 iface->pmsg[iface->cur_msg].len << 6);
225 else {
226 write_MASTER_CTL(iface, 0xff << 6);
227 iface->manual_stop = 1;
166 } 228 }
167 /* remove restart bit and enable master receive */ 229 /* remove restart bit and enable master receive */
168 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() & 230 write_MASTER_CTL(iface,
169 ~RSTART); 231 read_MASTER_CTL(iface) & ~RSTART);
170 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | 232 write_MASTER_CTL(iface, read_MASTER_CTL(iface) |
171 MEN | MDIR); 233 MEN | ((iface->read_write == I2C_SMBUS_READ) ?
234 MDIR : 0));
172 SSYNC(); 235 SSYNC();
173 } else { 236 } else {
174 iface->result = 1; 237 iface->result = 1;
175 bfin_write_TWI_INT_MASK(0); 238 write_INT_MASK(iface, 0);
176 bfin_write_TWI_MASTER_CTL(0); 239 write_MASTER_CTL(iface, 0);
177 SSYNC(); 240 SSYNC();
178 complete(&iface->complete); 241 complete(&iface->complete);
179 } 242 }
@@ -221,91 +284,85 @@ static int bfin_twi_master_xfer(struct i2c_adapter *adap,
221{ 284{
222 struct bfin_twi_iface *iface = adap->algo_data; 285 struct bfin_twi_iface *iface = adap->algo_data;
223 struct i2c_msg *pmsg; 286 struct i2c_msg *pmsg;
224 int i, ret;
225 int rc = 0; 287 int rc = 0;
226 288
227 if (!(bfin_read_TWI_CONTROL() & TWI_ENA)) 289 if (!(read_CONTROL(iface) & TWI_ENA))
228 return -ENXIO; 290 return -ENXIO;
229 291
230 while (bfin_read_TWI_MASTER_STAT() & BUSBUSY) { 292 while (read_MASTER_STAT(iface) & BUSBUSY)
231 yield(); 293 yield();
294
295 iface->pmsg = msgs;
296 iface->msg_num = num;
297 iface->cur_msg = 0;
298
299 pmsg = &msgs[0];
300 if (pmsg->flags & I2C_M_TEN) {
301 dev_err(&adap->dev, "10 bits addr not supported!\n");
302 return -EINVAL;
232 } 303 }
233 304
234 ret = 0; 305 iface->cur_mode = TWI_I2C_MODE_REPEAT;
235 for (i = 0; rc >= 0 && i < num; i++) { 306 iface->manual_stop = 0;
236 pmsg = &msgs[i]; 307 iface->transPtr = pmsg->buf;
237 if (pmsg->flags & I2C_M_TEN) { 308 iface->writeNum = iface->readNum = pmsg->len;
238 dev_err(&(adap->dev), "i2c-bfin-twi: 10 bits addr " 309 iface->result = 0;
239 "not supported !\n"); 310 iface->timeout_count = 10;
240 rc = -EINVAL; 311 init_completion(&(iface->complete));
241 break; 312 /* Set Transmit device address */
242 } 313 write_MASTER_ADDR(iface, pmsg->addr);
243 314
244 iface->cur_mode = TWI_I2C_MODE_STANDARD; 315 /* FIFO Initiation. Data in FIFO should be
245 iface->manual_stop = 0; 316 * discarded before start a new operation.
246 iface->transPtr = pmsg->buf; 317 */
247 iface->writeNum = iface->readNum = pmsg->len; 318 write_FIFO_CTL(iface, 0x3);
248 iface->result = 0; 319 SSYNC();
249 iface->timeout_count = 10; 320 write_FIFO_CTL(iface, 0);
250 /* Set Transmit device address */ 321 SSYNC();
251 bfin_write_TWI_MASTER_ADDR(pmsg->addr);
252
253 /* FIFO Initiation. Data in FIFO should be
254 * discarded before start a new operation.
255 */
256 bfin_write_TWI_FIFO_CTL(0x3);
257 SSYNC();
258 bfin_write_TWI_FIFO_CTL(0);
259 SSYNC();
260 322
261 if (pmsg->flags & I2C_M_RD) 323 if (pmsg->flags & I2C_M_RD)
262 iface->read_write = I2C_SMBUS_READ; 324 iface->read_write = I2C_SMBUS_READ;
263 else { 325 else {
264 iface->read_write = I2C_SMBUS_WRITE; 326 iface->read_write = I2C_SMBUS_WRITE;
265 /* Transmit first data */ 327 /* Transmit first data */
266 if (iface->writeNum > 0) { 328 if (iface->writeNum > 0) {
267 bfin_write_TWI_XMT_DATA8(*(iface->transPtr++)); 329 write_XMT_DATA8(iface, *(iface->transPtr++));
268 iface->writeNum--; 330 iface->writeNum--;
269 SSYNC(); 331 SSYNC();
270 }
271 } 332 }
333 }
272 334
273 /* clear int stat */ 335 /* clear int stat */
274 bfin_write_TWI_INT_STAT(MERR|MCOMP|XMTSERV|RCVSERV); 336 write_INT_STAT(iface, MERR | MCOMP | XMTSERV | RCVSERV);
275 337
276 /* Interrupt mask . Enable XMT, RCV interrupt */ 338 /* Interrupt mask . Enable XMT, RCV interrupt */
277 bfin_write_TWI_INT_MASK(MCOMP | MERR | 339 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV);
278 ((iface->read_write == I2C_SMBUS_READ)? 340 SSYNC();
279 RCVSERV : XMTSERV));
280 SSYNC();
281 341
282 if (pmsg->len > 0 && pmsg->len <= 255) 342 if (pmsg->len <= 255)
283 bfin_write_TWI_MASTER_CTL(pmsg->len << 6); 343 write_MASTER_CTL(iface, pmsg->len << 6);
284 else if (pmsg->len > 255) { 344 else {
285 bfin_write_TWI_MASTER_CTL(0xff << 6); 345 write_MASTER_CTL(iface, 0xff << 6);
286 iface->manual_stop = 1; 346 iface->manual_stop = 1;
287 } else 347 }
288 break;
289 348
290 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT; 349 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
291 add_timer(&iface->timeout_timer); 350 add_timer(&iface->timeout_timer);
292 351
293 /* Master enable */ 352 /* Master enable */
294 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | MEN | 353 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN |
295 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) | 354 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) |
296 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ>100) ? FAST : 0)); 355 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0));
297 SSYNC(); 356 SSYNC();
298 357
299 wait_for_completion(&iface->complete); 358 wait_for_completion(&iface->complete);
300 359
301 rc = iface->result; 360 rc = iface->result;
302 if (rc == 1)
303 ret++;
304 else if (rc == -1)
305 break;
306 }
307 361
308 return ret; 362 if (rc == 1)
363 return num;
364 else
365 return rc;
309} 366}
310 367
311/* 368/*
@@ -319,12 +376,11 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
319 struct bfin_twi_iface *iface = adap->algo_data; 376 struct bfin_twi_iface *iface = adap->algo_data;
320 int rc = 0; 377 int rc = 0;
321 378
322 if (!(bfin_read_TWI_CONTROL() & TWI_ENA)) 379 if (!(read_CONTROL(iface) & TWI_ENA))
323 return -ENXIO; 380 return -ENXIO;
324 381
325 while (bfin_read_TWI_MASTER_STAT() & BUSBUSY) { 382 while (read_MASTER_STAT(iface) & BUSBUSY)
326 yield(); 383 yield();
327 }
328 384
329 iface->writeNum = 0; 385 iface->writeNum = 0;
330 iface->readNum = 0; 386 iface->readNum = 0;
@@ -392,19 +448,20 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
392 iface->read_write = read_write; 448 iface->read_write = read_write;
393 iface->command = command; 449 iface->command = command;
394 iface->timeout_count = 10; 450 iface->timeout_count = 10;
451 init_completion(&(iface->complete));
395 452
396 /* FIFO Initiation. Data in FIFO should be discarded before 453 /* FIFO Initiation. Data in FIFO should be discarded before
397 * start a new operation. 454 * start a new operation.
398 */ 455 */
399 bfin_write_TWI_FIFO_CTL(0x3); 456 write_FIFO_CTL(iface, 0x3);
400 SSYNC(); 457 SSYNC();
401 bfin_write_TWI_FIFO_CTL(0); 458 write_FIFO_CTL(iface, 0);
402 459
403 /* clear int stat */ 460 /* clear int stat */
404 bfin_write_TWI_INT_STAT(MERR|MCOMP|XMTSERV|RCVSERV); 461 write_INT_STAT(iface, MERR | MCOMP | XMTSERV | RCVSERV);
405 462
406 /* Set Transmit device address */ 463 /* Set Transmit device address */
407 bfin_write_TWI_MASTER_ADDR(addr); 464 write_MASTER_ADDR(iface, addr);
408 SSYNC(); 465 SSYNC();
409 466
410 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT; 467 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
@@ -412,60 +469,64 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
412 469
413 switch (iface->cur_mode) { 470 switch (iface->cur_mode) {
414 case TWI_I2C_MODE_STANDARDSUB: 471 case TWI_I2C_MODE_STANDARDSUB:
415 bfin_write_TWI_XMT_DATA8(iface->command); 472 write_XMT_DATA8(iface, iface->command);
416 bfin_write_TWI_INT_MASK(MCOMP | MERR | 473 write_INT_MASK(iface, MCOMP | MERR |
417 ((iface->read_write == I2C_SMBUS_READ) ? 474 ((iface->read_write == I2C_SMBUS_READ) ?
418 RCVSERV : XMTSERV)); 475 RCVSERV : XMTSERV));
419 SSYNC(); 476 SSYNC();
420 477
421 if (iface->writeNum + 1 <= 255) 478 if (iface->writeNum + 1 <= 255)
422 bfin_write_TWI_MASTER_CTL((iface->writeNum + 1) << 6); 479 write_MASTER_CTL(iface, (iface->writeNum + 1) << 6);
423 else { 480 else {
424 bfin_write_TWI_MASTER_CTL(0xff << 6); 481 write_MASTER_CTL(iface, 0xff << 6);
425 iface->manual_stop = 1; 482 iface->manual_stop = 1;
426 } 483 }
427 /* Master enable */ 484 /* Master enable */
428 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | MEN | 485 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN |
429 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ>100) ? FAST : 0)); 486 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ>100) ? FAST : 0));
430 break; 487 break;
431 case TWI_I2C_MODE_COMBINED: 488 case TWI_I2C_MODE_COMBINED:
432 bfin_write_TWI_XMT_DATA8(iface->command); 489 write_XMT_DATA8(iface, iface->command);
433 bfin_write_TWI_INT_MASK(MCOMP | MERR | RCVSERV | XMTSERV); 490 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV);
434 SSYNC(); 491 SSYNC();
435 492
436 if (iface->writeNum > 0) 493 if (iface->writeNum > 0)
437 bfin_write_TWI_MASTER_CTL((iface->writeNum + 1) << 6); 494 write_MASTER_CTL(iface, (iface->writeNum + 1) << 6);
438 else 495 else
439 bfin_write_TWI_MASTER_CTL(0x1 << 6); 496 write_MASTER_CTL(iface, 0x1 << 6);
440 /* Master enable */ 497 /* Master enable */
441 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | MEN | 498 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN |
442 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ>100) ? FAST : 0)); 499 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ>100) ? FAST : 0));
443 break; 500 break;
444 default: 501 default:
445 bfin_write_TWI_MASTER_CTL(0); 502 write_MASTER_CTL(iface, 0);
446 if (size != I2C_SMBUS_QUICK) { 503 if (size != I2C_SMBUS_QUICK) {
447 /* Don't access xmit data register when this is a 504 /* Don't access xmit data register when this is a
448 * read operation. 505 * read operation.
449 */ 506 */
450 if (iface->read_write != I2C_SMBUS_READ) { 507 if (iface->read_write != I2C_SMBUS_READ) {
451 if (iface->writeNum > 0) { 508 if (iface->writeNum > 0) {
452 bfin_write_TWI_XMT_DATA8(*(iface->transPtr++)); 509 write_XMT_DATA8(iface,
510 *(iface->transPtr++));
453 if (iface->writeNum <= 255) 511 if (iface->writeNum <= 255)
454 bfin_write_TWI_MASTER_CTL(iface->writeNum << 6); 512 write_MASTER_CTL(iface,
513 iface->writeNum << 6);
455 else { 514 else {
456 bfin_write_TWI_MASTER_CTL(0xff << 6); 515 write_MASTER_CTL(iface,
516 0xff << 6);
457 iface->manual_stop = 1; 517 iface->manual_stop = 1;
458 } 518 }
459 iface->writeNum--; 519 iface->writeNum--;
460 } else { 520 } else {
461 bfin_write_TWI_XMT_DATA8(iface->command); 521 write_XMT_DATA8(iface, iface->command);
462 bfin_write_TWI_MASTER_CTL(1 << 6); 522 write_MASTER_CTL(iface, 1 << 6);
463 } 523 }
464 } else { 524 } else {
465 if (iface->readNum > 0 && iface->readNum <= 255) 525 if (iface->readNum > 0 && iface->readNum <= 255)
466 bfin_write_TWI_MASTER_CTL(iface->readNum << 6); 526 write_MASTER_CTL(iface,
527 iface->readNum << 6);
467 else if (iface->readNum > 255) { 528 else if (iface->readNum > 255) {
468 bfin_write_TWI_MASTER_CTL(0xff << 6); 529 write_MASTER_CTL(iface, 0xff << 6);
469 iface->manual_stop = 1; 530 iface->manual_stop = 1;
470 } else { 531 } else {
471 del_timer(&iface->timeout_timer); 532 del_timer(&iface->timeout_timer);
@@ -473,13 +534,13 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
473 } 534 }
474 } 535 }
475 } 536 }
476 bfin_write_TWI_INT_MASK(MCOMP | MERR | 537 write_INT_MASK(iface, MCOMP | MERR |
477 ((iface->read_write == I2C_SMBUS_READ) ? 538 ((iface->read_write == I2C_SMBUS_READ) ?
478 RCVSERV : XMTSERV)); 539 RCVSERV : XMTSERV));
479 SSYNC(); 540 SSYNC();
480 541
481 /* Master enable */ 542 /* Master enable */
482 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | MEN | 543 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN |
483 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) | 544 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) |
484 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0)); 545 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0));
485 break; 546 break;
@@ -514,10 +575,10 @@ static struct i2c_algorithm bfin_twi_algorithm = {
514 575
515static int i2c_bfin_twi_suspend(struct platform_device *dev, pm_message_t state) 576static int i2c_bfin_twi_suspend(struct platform_device *dev, pm_message_t state)
516{ 577{
517/* struct bfin_twi_iface *iface = platform_get_drvdata(dev);*/ 578 struct bfin_twi_iface *iface = platform_get_drvdata(dev);
518 579
519 /* Disable TWI */ 580 /* Disable TWI */
520 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() & ~TWI_ENA); 581 write_CONTROL(iface, read_CONTROL(iface) & ~TWI_ENA);
521 SSYNC(); 582 SSYNC();
522 583
523 return 0; 584 return 0;
@@ -525,24 +586,52 @@ static int i2c_bfin_twi_suspend(struct platform_device *dev, pm_message_t state)
525 586
526static int i2c_bfin_twi_resume(struct platform_device *dev) 587static int i2c_bfin_twi_resume(struct platform_device *dev)
527{ 588{
528/* struct bfin_twi_iface *iface = platform_get_drvdata(dev);*/ 589 struct bfin_twi_iface *iface = platform_get_drvdata(dev);
529 590
530 /* Enable TWI */ 591 /* Enable TWI */
531 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA); 592 write_CONTROL(iface, read_CONTROL(iface) | TWI_ENA);
532 SSYNC(); 593 SSYNC();
533 594
534 return 0; 595 return 0;
535} 596}
536 597
537static int i2c_bfin_twi_probe(struct platform_device *dev) 598static int i2c_bfin_twi_probe(struct platform_device *pdev)
538{ 599{
539 struct bfin_twi_iface *iface = &twi_iface; 600 struct bfin_twi_iface *iface;
540 struct i2c_adapter *p_adap; 601 struct i2c_adapter *p_adap;
602 struct resource *res;
541 int rc; 603 int rc;
542 604
605 iface = kzalloc(sizeof(struct bfin_twi_iface), GFP_KERNEL);
606 if (!iface) {
607 dev_err(&pdev->dev, "Cannot allocate memory\n");
608 rc = -ENOMEM;
609 goto out_error_nomem;
610 }
611
543 spin_lock_init(&(iface->lock)); 612 spin_lock_init(&(iface->lock));
544 init_completion(&(iface->complete)); 613
545 iface->irq = IRQ_TWI; 614 /* Find and map our resources */
615 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
616 if (res == NULL) {
617 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
618 rc = -ENOENT;
619 goto out_error_get_res;
620 }
621
622 iface->regs_base = ioremap(res->start, res->end - res->start + 1);
623 if (iface->regs_base == NULL) {
624 dev_err(&pdev->dev, "Cannot map IO\n");
625 rc = -ENXIO;
626 goto out_error_ioremap;
627 }
628
629 iface->irq = platform_get_irq(pdev, 0);
630 if (iface->irq < 0) {
631 dev_err(&pdev->dev, "No IRQ specified\n");
632 rc = -ENOENT;
633 goto out_error_no_irq;
634 }
546 635
547 init_timer(&(iface->timeout_timer)); 636 init_timer(&(iface->timeout_timer));
548 iface->timeout_timer.function = bfin_twi_timeout; 637 iface->timeout_timer.function = bfin_twi_timeout;
@@ -550,39 +639,63 @@ static int i2c_bfin_twi_probe(struct platform_device *dev)
550 639
551 p_adap = &iface->adap; 640 p_adap = &iface->adap;
552 p_adap->id = I2C_HW_BLACKFIN; 641 p_adap->id = I2C_HW_BLACKFIN;
553 p_adap->nr = dev->id; 642 p_adap->nr = pdev->id;
554 strlcpy(p_adap->name, dev->name, sizeof(p_adap->name)); 643 strlcpy(p_adap->name, pdev->name, sizeof(p_adap->name));
555 p_adap->algo = &bfin_twi_algorithm; 644 p_adap->algo = &bfin_twi_algorithm;
556 p_adap->algo_data = iface; 645 p_adap->algo_data = iface;
557 p_adap->class = I2C_CLASS_ALL; 646 p_adap->class = I2C_CLASS_ALL;
558 p_adap->dev.parent = &dev->dev; 647 p_adap->dev.parent = &pdev->dev;
648
649 rc = peripheral_request_list(pin_req[pdev->id], "i2c-bfin-twi");
650 if (rc) {
651 dev_err(&pdev->dev, "Can't setup pin mux!\n");
652 goto out_error_pin_mux;
653 }
559 654
560 rc = request_irq(iface->irq, bfin_twi_interrupt_entry, 655 rc = request_irq(iface->irq, bfin_twi_interrupt_entry,
561 IRQF_DISABLED, dev->name, iface); 656 IRQF_DISABLED, pdev->name, iface);
562 if (rc) { 657 if (rc) {
563 dev_err(&(p_adap->dev), "i2c-bfin-twi: can't get IRQ %d !\n", 658 dev_err(&pdev->dev, "Can't get IRQ %d !\n", iface->irq);
564 iface->irq); 659 rc = -ENODEV;
565 return -ENODEV; 660 goto out_error_req_irq;
566 } 661 }
567 662
568 /* Set TWI internal clock as 10MHz */ 663 /* Set TWI internal clock as 10MHz */
569 bfin_write_TWI_CONTROL(((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F); 664 write_CONTROL(iface, ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F);
570 665
571 /* Set Twi interface clock as specified */ 666 /* Set Twi interface clock as specified */
572 bfin_write_TWI_CLKDIV((( 5*1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ ) 667 write_CLKDIV(iface, ((5*1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ)
573 << 8) | (( 5*1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ ) 668 << 8) | ((5*1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ)
574 & 0xFF)); 669 & 0xFF));
575 670
576 /* Enable TWI */ 671 /* Enable TWI */
577 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA); 672 write_CONTROL(iface, read_CONTROL(iface) | TWI_ENA);
578 SSYNC(); 673 SSYNC();
579 674
580 rc = i2c_add_numbered_adapter(p_adap); 675 rc = i2c_add_numbered_adapter(p_adap);
581 if (rc < 0) 676 if (rc < 0) {
582 free_irq(iface->irq, iface); 677 dev_err(&pdev->dev, "Can't add i2c adapter!\n");
583 else 678 goto out_error_add_adapter;
584 platform_set_drvdata(dev, iface); 679 }
680
681 platform_set_drvdata(pdev, iface);
585 682
683 dev_info(&pdev->dev, "Blackfin BF5xx on-chip I2C TWI Contoller, "
684 "regs_base@%p\n", iface->regs_base);
685
686 return 0;
687
688out_error_add_adapter:
689 free_irq(iface->irq, iface);
690out_error_req_irq:
691out_error_no_irq:
692 peripheral_free_list(pin_req[pdev->id]);
693out_error_pin_mux:
694 iounmap(iface->regs_base);
695out_error_ioremap:
696out_error_get_res:
697 kfree(iface);
698out_error_nomem:
586 return rc; 699 return rc;
587} 700}
588 701
@@ -594,6 +707,9 @@ static int i2c_bfin_twi_remove(struct platform_device *pdev)
594 707
595 i2c_del_adapter(&(iface->adap)); 708 i2c_del_adapter(&(iface->adap));
596 free_irq(iface->irq, iface); 709 free_irq(iface->irq, iface);
710 peripheral_free_list(pin_req[pdev->id]);
711 iounmap(iface->regs_base);
712 kfree(iface);
597 713
598 return 0; 714 return 0;
599} 715}
@@ -611,8 +727,6 @@ static struct platform_driver i2c_bfin_twi_driver = {
611 727
612static int __init i2c_bfin_twi_init(void) 728static int __init i2c_bfin_twi_init(void)
613{ 729{
614 pr_info("I2C: Blackfin I2C TWI driver\n");
615
616 return platform_driver_register(&i2c_bfin_twi_driver); 730 return platform_driver_register(&i2c_bfin_twi_driver);
617} 731}
618 732
@@ -621,9 +735,10 @@ static void __exit i2c_bfin_twi_exit(void)
621 platform_driver_unregister(&i2c_bfin_twi_driver); 735 platform_driver_unregister(&i2c_bfin_twi_driver);
622} 736}
623 737
624MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>");
625MODULE_DESCRIPTION("I2C-Bus adapter routines for Blackfin TWI");
626MODULE_LICENSE("GPL");
627
628module_init(i2c_bfin_twi_init); 738module_init(i2c_bfin_twi_init);
629module_exit(i2c_bfin_twi_exit); 739module_exit(i2c_bfin_twi_exit);
740
741MODULE_AUTHOR("Bryan Wu, Sonic Zhang");
742MODULE_DESCRIPTION("Blackfin BF5xx on-chip I2C TWI Contoller Driver");
743MODULE_LICENSE("GPL");
744MODULE_ALIAS("platform:i2c-bfin-twi");
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index fde26345a379..7ecbfc429b19 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -328,7 +328,7 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
328 int i; 328 int i;
329 int ret; 329 int ret;
330 330
331 dev_dbg(dev->dev, "%s: msgs: %d\n", __FUNCTION__, num); 331 dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num);
332 332
333 ret = i2c_davinci_wait_bus_not_busy(dev, 1); 333 ret = i2c_davinci_wait_bus_not_busy(dev, 1);
334 if (ret < 0) { 334 if (ret < 0) {
@@ -342,7 +342,7 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
342 return ret; 342 return ret;
343 } 343 }
344 344
345 dev_dbg(dev->dev, "%s:%d ret: %d\n", __FUNCTION__, __LINE__, ret); 345 dev_dbg(dev->dev, "%s:%d ret: %d\n", __func__, __LINE__, ret);
346 346
347 return num; 347 return num;
348} 348}
@@ -364,7 +364,7 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
364 u16 w; 364 u16 w;
365 365
366 while ((stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG))) { 366 while ((stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG))) {
367 dev_dbg(dev->dev, "%s: stat=0x%x\n", __FUNCTION__, stat); 367 dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat);
368 if (count++ == 100) { 368 if (count++ == 100) {
369 dev_warn(dev->dev, "Too much work in one IRQ\n"); 369 dev_warn(dev->dev, "Too much work in one IRQ\n");
370 break; 370 break;
@@ -553,6 +553,9 @@ static int davinci_i2c_remove(struct platform_device *pdev)
553 return 0; 553 return 0;
554} 554}
555 555
556/* work with hotplug and coldplug */
557MODULE_ALIAS("platform:i2c_davinci");
558
556static struct platform_driver davinci_i2c_driver = { 559static struct platform_driver davinci_i2c_driver = {
557 .probe = davinci_i2c_probe, 560 .probe = davinci_i2c_probe,
558 .remove = davinci_i2c_remove, 561 .remove = davinci_i2c_remove,
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index 3ca19fc234fb..7c1b762aa681 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -220,3 +220,4 @@ module_exit(i2c_gpio_exit);
220MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); 220MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
221MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver"); 221MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver");
222MODULE_LICENSE("GPL"); 222MODULE_LICENSE("GPL");
223MODULE_ALIAS("platform:i2c-gpio");
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index 22bb247d0e60..85dbf34382e1 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -6,6 +6,9 @@
6 * Copyright (c) 2003, 2004 Zultys Technologies. 6 * Copyright (c) 2003, 2004 Zultys Technologies.
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 * 8 *
9 * Copyright (c) 2008 PIKA Technologies
10 * Sean MacLennan <smaclennan@pikatech.com>
11 *
9 * Based on original work by 12 * Based on original work by
10 * Ian DaSilva <idasilva@mvista.com> 13 * Ian DaSilva <idasilva@mvista.com>
11 * Armin Kuster <akuster@mvista.com> 14 * Armin Kuster <akuster@mvista.com>
@@ -39,12 +42,17 @@
39#include <asm/io.h> 42#include <asm/io.h>
40#include <linux/i2c.h> 43#include <linux/i2c.h>
41#include <linux/i2c-id.h> 44#include <linux/i2c-id.h>
45
46#ifdef CONFIG_IBM_OCP
42#include <asm/ocp.h> 47#include <asm/ocp.h>
43#include <asm/ibm4xx.h> 48#include <asm/ibm4xx.h>
49#else
50#include <linux/of_platform.h>
51#endif
44 52
45#include "i2c-ibm_iic.h" 53#include "i2c-ibm_iic.h"
46 54
47#define DRIVER_VERSION "2.1" 55#define DRIVER_VERSION "2.2"
48 56
49MODULE_DESCRIPTION("IBM IIC driver v" DRIVER_VERSION); 57MODULE_DESCRIPTION("IBM IIC driver v" DRIVER_VERSION);
50MODULE_LICENSE("GPL"); 58MODULE_LICENSE("GPL");
@@ -650,13 +658,14 @@ static inline u8 iic_clckdiv(unsigned int opb)
650 opb /= 1000000; 658 opb /= 1000000;
651 659
652 if (opb < 20 || opb > 150){ 660 if (opb < 20 || opb > 150){
653 printk(KERN_CRIT "ibm-iic: invalid OPB clock frequency %u MHz\n", 661 printk(KERN_WARNING "ibm-iic: invalid OPB clock frequency %u MHz\n",
654 opb); 662 opb);
655 opb = opb < 20 ? 20 : 150; 663 opb = opb < 20 ? 20 : 150;
656 } 664 }
657 return (u8)((opb + 9) / 10 - 1); 665 return (u8)((opb + 9) / 10 - 1);
658} 666}
659 667
668#ifdef CONFIG_IBM_OCP
660/* 669/*
661 * Register single IIC interface 670 * Register single IIC interface
662 */ 671 */
@@ -672,7 +681,7 @@ static int __devinit iic_probe(struct ocp_device *ocp){
672 ocp->def->index); 681 ocp->def->index);
673 682
674 if (!(dev = kzalloc(sizeof(*dev), GFP_KERNEL))) { 683 if (!(dev = kzalloc(sizeof(*dev), GFP_KERNEL))) {
675 printk(KERN_CRIT "ibm-iic%d: failed to allocate device data\n", 684 printk(KERN_ERR "ibm-iic%d: failed to allocate device data\n",
676 ocp->def->index); 685 ocp->def->index);
677 return -ENOMEM; 686 return -ENOMEM;
678 } 687 }
@@ -687,7 +696,7 @@ static int __devinit iic_probe(struct ocp_device *ocp){
687 } 696 }
688 697
689 if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){ 698 if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){
690 printk(KERN_CRIT "ibm-iic%d: failed to ioremap device registers\n", 699 printk(KERN_ERR "ibm-iic%d: failed to ioremap device registers\n",
691 dev->idx); 700 dev->idx);
692 ret = -ENXIO; 701 ret = -ENXIO;
693 goto fail2; 702 goto fail2;
@@ -745,7 +754,7 @@ static int __devinit iic_probe(struct ocp_device *ocp){
745 adap->nr = dev->idx >= 0 ? dev->idx : 0; 754 adap->nr = dev->idx >= 0 ? dev->idx : 0;
746 755
747 if ((ret = i2c_add_numbered_adapter(adap)) < 0) { 756 if ((ret = i2c_add_numbered_adapter(adap)) < 0) {
748 printk(KERN_CRIT "ibm-iic%d: failed to register i2c adapter\n", 757 printk(KERN_ERR "ibm-iic%d: failed to register i2c adapter\n",
749 dev->idx); 758 dev->idx);
750 goto fail; 759 goto fail;
751 } 760 }
@@ -778,7 +787,7 @@ static void __devexit iic_remove(struct ocp_device *ocp)
778 struct ibm_iic_private* dev = (struct ibm_iic_private*)ocp_get_drvdata(ocp); 787 struct ibm_iic_private* dev = (struct ibm_iic_private*)ocp_get_drvdata(ocp);
779 BUG_ON(dev == NULL); 788 BUG_ON(dev == NULL);
780 if (i2c_del_adapter(&dev->adap)){ 789 if (i2c_del_adapter(&dev->adap)){
781 printk(KERN_CRIT "ibm-iic%d: failed to delete i2c adapter :(\n", 790 printk(KERN_ERR "ibm-iic%d: failed to delete i2c adapter :(\n",
782 dev->idx); 791 dev->idx);
783 /* That's *very* bad, just shutdown IRQ ... */ 792 /* That's *very* bad, just shutdown IRQ ... */
784 if (dev->irq >= 0){ 793 if (dev->irq >= 0){
@@ -828,5 +837,181 @@ static void __exit iic_exit(void)
828 ocp_unregister_driver(&ibm_iic_driver); 837 ocp_unregister_driver(&ibm_iic_driver);
829} 838}
830 839
840#else /* !CONFIG_IBM_OCP */
841
842static int __devinit iic_request_irq(struct of_device *ofdev,
843 struct ibm_iic_private *dev)
844{
845 struct device_node *np = ofdev->node;
846 int irq;
847
848 if (iic_force_poll)
849 return NO_IRQ;
850
851 irq = irq_of_parse_and_map(np, 0);
852 if (irq == NO_IRQ) {
853 dev_err(&ofdev->dev, "irq_of_parse_and_map failed\n");
854 return NO_IRQ;
855 }
856
857 /* Disable interrupts until we finish initialization, assumes
858 * level-sensitive IRQ setup...
859 */
860 iic_interrupt_mode(dev, 0);
861 if (request_irq(irq, iic_handler, 0, "IBM IIC", dev)) {
862 dev_err(&ofdev->dev, "request_irq %d failed\n", irq);
863 /* Fallback to the polling mode */
864 return NO_IRQ;
865 }
866
867 return irq;
868}
869
870/*
871 * Register single IIC interface
872 */
873static int __devinit iic_probe(struct of_device *ofdev,
874 const struct of_device_id *match)
875{
876 struct device_node *np = ofdev->node;
877 struct ibm_iic_private *dev;
878 struct i2c_adapter *adap;
879 const u32 *indexp, *freq;
880 int ret;
881
882 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
883 if (!dev) {
884 dev_err(&ofdev->dev, "failed to allocate device data\n");
885 return -ENOMEM;
886 }
887
888 dev_set_drvdata(&ofdev->dev, dev);
889
890 indexp = of_get_property(np, "index", NULL);
891 if (!indexp) {
892 dev_err(&ofdev->dev, "no index specified\n");
893 ret = -EINVAL;
894 goto error_cleanup;
895 }
896 dev->idx = *indexp;
897
898 dev->vaddr = of_iomap(np, 0);
899 if (dev->vaddr == NULL) {
900 dev_err(&ofdev->dev, "failed to iomap device\n");
901 ret = -ENXIO;
902 goto error_cleanup;
903 }
904
905 init_waitqueue_head(&dev->wq);
906
907 dev->irq = iic_request_irq(ofdev, dev);
908 if (dev->irq == NO_IRQ)
909 dev_warn(&ofdev->dev, "using polling mode\n");
910
911 /* Board specific settings */
912 if (iic_force_fast || of_get_property(np, "fast-mode", NULL))
913 dev->fast_mode = 1;
914
915 freq = of_get_property(np, "clock-frequency", NULL);
916 if (freq == NULL) {
917 freq = of_get_property(np->parent, "clock-frequency", NULL);
918 if (freq == NULL) {
919 dev_err(&ofdev->dev, "Unable to get bus frequency\n");
920 ret = -EINVAL;
921 goto error_cleanup;
922 }
923 }
924
925 dev->clckdiv = iic_clckdiv(*freq);
926 dev_dbg(&ofdev->dev, "clckdiv = %d\n", dev->clckdiv);
927
928 /* Initialize IIC interface */
929 iic_dev_init(dev);
930
931 /* Register it with i2c layer */
932 adap = &dev->adap;
933 adap->dev.parent = &ofdev->dev;
934 strlcpy(adap->name, "IBM IIC", sizeof(adap->name));
935 i2c_set_adapdata(adap, dev);
936 adap->id = I2C_HW_OCP;
937 adap->class = I2C_CLASS_HWMON;
938 adap->algo = &iic_algo;
939 adap->timeout = 1;
940 adap->nr = dev->idx;
941
942 ret = i2c_add_numbered_adapter(adap);
943 if (ret < 0) {
944 dev_err(&ofdev->dev, "failed to register i2c adapter\n");
945 goto error_cleanup;
946 }
947
948 dev_info(&ofdev->dev, "using %s mode\n",
949 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
950
951 return 0;
952
953error_cleanup:
954 if (dev->irq != NO_IRQ) {
955 iic_interrupt_mode(dev, 0);
956 free_irq(dev->irq, dev);
957 }
958
959 if (dev->vaddr)
960 iounmap(dev->vaddr);
961
962 dev_set_drvdata(&ofdev->dev, NULL);
963 kfree(dev);
964 return ret;
965}
966
967/*
968 * Cleanup initialized IIC interface
969 */
970static int __devexit iic_remove(struct of_device *ofdev)
971{
972 struct ibm_iic_private *dev = dev_get_drvdata(&ofdev->dev);
973
974 dev_set_drvdata(&ofdev->dev, NULL);
975
976 i2c_del_adapter(&dev->adap);
977
978 if (dev->irq != NO_IRQ) {
979 iic_interrupt_mode(dev, 0);
980 free_irq(dev->irq, dev);
981 }
982
983 iounmap(dev->vaddr);
984 kfree(dev);
985
986 return 0;
987}
988
989static const struct of_device_id ibm_iic_match[] = {
990 { .compatible = "ibm,iic-405ex", },
991 { .compatible = "ibm,iic-405gp", },
992 { .compatible = "ibm,iic-440gp", },
993 { .compatible = "ibm,iic-440gpx", },
994 { .compatible = "ibm,iic-440grx", },
995 {}
996};
997
998static struct of_platform_driver ibm_iic_driver = {
999 .name = "ibm-iic",
1000 .match_table = ibm_iic_match,
1001 .probe = iic_probe,
1002 .remove = __devexit_p(iic_remove),
1003};
1004
1005static int __init iic_init(void)
1006{
1007 return of_register_platform_driver(&ibm_iic_driver);
1008}
1009
1010static void __exit iic_exit(void)
1011{
1012 of_unregister_platform_driver(&ibm_iic_driver);
1013}
1014#endif /* CONFIG_IBM_OCP */
1015
831module_init(iic_init); 1016module_init(iic_init);
832module_exit(iic_exit); 1017module_exit(iic_exit);
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index ab41400c883e..39884e797594 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -550,3 +550,4 @@ module_exit (i2c_iop3xx_exit);
550MODULE_AUTHOR("D-TACQ Solutions Ltd <www.d-tacq.com>"); 550MODULE_AUTHOR("D-TACQ Solutions Ltd <www.d-tacq.com>");
551MODULE_DESCRIPTION("IOP3xx iic algorithm and driver"); 551MODULE_DESCRIPTION("IOP3xx iic algorithm and driver");
552MODULE_LICENSE("GPL"); 552MODULE_LICENSE("GPL");
553MODULE_ALIAS("platform:IOP3xx-I2C");
diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c
index 6352121a2827..5af9e6521e6c 100644
--- a/drivers/i2c/busses/i2c-ixp2000.c
+++ b/drivers/i2c/busses/i2c-ixp2000.c
@@ -164,4 +164,5 @@ module_exit(ixp2000_i2c_exit);
164MODULE_AUTHOR ("Deepak Saxena <dsaxena@plexity.net>"); 164MODULE_AUTHOR ("Deepak Saxena <dsaxena@plexity.net>");
165MODULE_DESCRIPTION("IXP2000 GPIO-based I2C bus driver"); 165MODULE_DESCRIPTION("IXP2000 GPIO-based I2C bus driver");
166MODULE_LICENSE("GPL"); 166MODULE_LICENSE("GPL");
167MODULE_ALIAS("platform:IXP2000-I2C");
167 168
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index bbe787b243b7..18beb0ad7bf3 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -392,6 +392,9 @@ static int fsl_i2c_remove(struct platform_device *pdev)
392 return 0; 392 return 0;
393}; 393};
394 394
395/* work with hotplug and coldplug */
396MODULE_ALIAS("platform:fsl-i2c");
397
395/* Structure for a device driver */ 398/* Structure for a device driver */
396static struct platform_driver fsl_i2c_driver = { 399static struct platform_driver fsl_i2c_driver = {
397 .probe = fsl_i2c_probe, 400 .probe = fsl_i2c_probe,
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index e417c2c3ca22..f145692cbb76 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -312,6 +312,9 @@ static int __devexit ocores_i2c_remove(struct platform_device* pdev)
312 return 0; 312 return 0;
313} 313}
314 314
315/* work with hotplug and coldplug */
316MODULE_ALIAS("platform:ocores-i2c");
317
315static struct platform_driver ocores_i2c_driver = { 318static struct platform_driver ocores_i2c_driver = {
316 .probe = ocores_i2c_probe, 319 .probe = ocores_i2c_probe,
317 .remove = __devexit_p(ocores_i2c_remove), 320 .remove = __devexit_p(ocores_i2c_remove),
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 7ba31770d773..e7eb7bf9ddec 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -693,3 +693,4 @@ module_exit(omap_i2c_exit_driver);
693MODULE_AUTHOR("MontaVista Software, Inc. (and others)"); 693MODULE_AUTHOR("MontaVista Software, Inc. (and others)");
694MODULE_DESCRIPTION("TI OMAP I2C bus adapter"); 694MODULE_DESCRIPTION("TI OMAP I2C bus adapter");
695MODULE_LICENSE("GPL"); 695MODULE_LICENSE("GPL");
696MODULE_ALIAS("platform:i2c_omap");
diff --git a/drivers/i2c/busses/i2c-pca-isa.c b/drivers/i2c/busses/i2c-pca-isa.c
index 496ee875eb4f..a119784bae10 100644
--- a/drivers/i2c/busses/i2c-pca-isa.c
+++ b/drivers/i2c/busses/i2c-pca-isa.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * i2c-pca-isa.c driver for PCA9564 on ISA boards 2 * i2c-pca-isa.c driver for PCA9564 on ISA boards
3 * Copyright (C) 2004 Arcom Control Systems 3 * Copyright (C) 2004 Arcom Control Systems
4 * Copyright (C) 2008 Pengutronix
4 * 5 *
5 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -22,11 +23,9 @@
22#include <linux/module.h> 23#include <linux/module.h>
23#include <linux/moduleparam.h> 24#include <linux/moduleparam.h>
24#include <linux/delay.h> 25#include <linux/delay.h>
25#include <linux/slab.h>
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/wait.h> 28#include <linux/wait.h>
29
30#include <linux/isa.h> 29#include <linux/isa.h>
31#include <linux/i2c.h> 30#include <linux/i2c.h>
32#include <linux/i2c-algo-pca.h> 31#include <linux/i2c-algo-pca.h>
@@ -34,13 +33,9 @@
34#include <asm/io.h> 33#include <asm/io.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
36 35
37#include "../algos/i2c-algo-pca.h" 36#define DRIVER "i2c-pca-isa"
38
39#define IO_SIZE 4 37#define IO_SIZE 4
40 38
41#undef DEBUG_IO
42//#define DEBUG_IO
43
44static unsigned long base = 0x330; 39static unsigned long base = 0x330;
45static int irq = 10; 40static int irq = 10;
46 41
@@ -48,22 +43,9 @@ static int irq = 10;
48 * in the actual clock rate */ 43 * in the actual clock rate */
49static int clock = I2C_PCA_CON_59kHz; 44static int clock = I2C_PCA_CON_59kHz;
50 45
51static int own = 0x55;
52
53static wait_queue_head_t pca_wait; 46static wait_queue_head_t pca_wait;
54 47
55static int pca_isa_getown(struct i2c_algo_pca_data *adap) 48static void pca_isa_writebyte(void *pd, int reg, int val)
56{
57 return (own);
58}
59
60static int pca_isa_getclock(struct i2c_algo_pca_data *adap)
61{
62 return (clock);
63}
64
65static void
66pca_isa_writebyte(struct i2c_algo_pca_data *adap, int reg, int val)
67{ 49{
68#ifdef DEBUG_IO 50#ifdef DEBUG_IO
69 static char *names[] = { "T/O", "DAT", "ADR", "CON" }; 51 static char *names[] = { "T/O", "DAT", "ADR", "CON" };
@@ -72,44 +54,49 @@ pca_isa_writebyte(struct i2c_algo_pca_data *adap, int reg, int val)
72 outb(val, base+reg); 54 outb(val, base+reg);
73} 55}
74 56
75static int 57static int pca_isa_readbyte(void *pd, int reg)
76pca_isa_readbyte(struct i2c_algo_pca_data *adap, int reg)
77{ 58{
78 int res = inb(base+reg); 59 int res = inb(base+reg);
79#ifdef DEBUG_IO 60#ifdef DEBUG_IO
80 { 61 {
81 static char *names[] = { "STA", "DAT", "ADR", "CON" }; 62 static char *names[] = { "STA", "DAT", "ADR", "CON" };
82 printk("*** read %s => %#04x\n", names[reg], res); 63 printk("*** read %s => %#04x\n", names[reg], res);
83 } 64 }
84#endif 65#endif
85 return res; 66 return res;
86} 67}
87 68
88static int pca_isa_waitforinterrupt(struct i2c_algo_pca_data *adap) 69static int pca_isa_waitforcompletion(void *pd)
89{ 70{
90 int ret = 0; 71 int ret = 0;
91 72
92 if (irq > -1) { 73 if (irq > -1) {
93 ret = wait_event_interruptible(pca_wait, 74 ret = wait_event_interruptible(pca_wait,
94 pca_isa_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI); 75 pca_isa_readbyte(pd, I2C_PCA_CON) & I2C_PCA_CON_SI);
95 } else { 76 } else {
96 while ((pca_isa_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0) 77 while ((pca_isa_readbyte(pd, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
97 udelay(100); 78 udelay(100);
98 } 79 }
99 return ret; 80 return ret;
100} 81}
101 82
83static void pca_isa_resetchip(void *pd)
84{
85 /* apparently only an external reset will do it. not a lot can be done */
86 printk(KERN_WARNING DRIVER ": Haven't figured out how to do a reset yet\n");
87}
88
102static irqreturn_t pca_handler(int this_irq, void *dev_id) { 89static irqreturn_t pca_handler(int this_irq, void *dev_id) {
103 wake_up_interruptible(&pca_wait); 90 wake_up_interruptible(&pca_wait);
104 return IRQ_HANDLED; 91 return IRQ_HANDLED;
105} 92}
106 93
107static struct i2c_algo_pca_data pca_isa_data = { 94static struct i2c_algo_pca_data pca_isa_data = {
108 .get_own = pca_isa_getown, 95 /* .data intentionally left NULL, not needed with ISA */
109 .get_clock = pca_isa_getclock,
110 .write_byte = pca_isa_writebyte, 96 .write_byte = pca_isa_writebyte,
111 .read_byte = pca_isa_readbyte, 97 .read_byte = pca_isa_readbyte,
112 .wait_for_interrupt = pca_isa_waitforinterrupt, 98 .wait_for_completion = pca_isa_waitforcompletion,
99 .reset_chip = pca_isa_resetchip,
113}; 100};
114 101
115static struct i2c_adapter pca_isa_ops = { 102static struct i2c_adapter pca_isa_ops = {
@@ -117,6 +104,7 @@ static struct i2c_adapter pca_isa_ops = {
117 .id = I2C_HW_A_ISA, 104 .id = I2C_HW_A_ISA,
118 .algo_data = &pca_isa_data, 105 .algo_data = &pca_isa_data,
119 .name = "PCA9564 ISA Adapter", 106 .name = "PCA9564 ISA Adapter",
107 .timeout = 100,
120}; 108};
121 109
122static int __devinit pca_isa_probe(struct device *dev, unsigned int id) 110static int __devinit pca_isa_probe(struct device *dev, unsigned int id)
@@ -144,6 +132,7 @@ static int __devinit pca_isa_probe(struct device *dev, unsigned int id)
144 } 132 }
145 } 133 }
146 134
135 pca_isa_data.i2c_clock = clock;
147 if (i2c_pca_add_bus(&pca_isa_ops) < 0) { 136 if (i2c_pca_add_bus(&pca_isa_ops) < 0) {
148 dev_err(dev, "Failed to add i2c bus\n"); 137 dev_err(dev, "Failed to add i2c bus\n");
149 goto out_irq; 138 goto out_irq;
@@ -178,7 +167,7 @@ static struct isa_driver pca_isa_driver = {
178 .remove = __devexit_p(pca_isa_remove), 167 .remove = __devexit_p(pca_isa_remove),
179 .driver = { 168 .driver = {
180 .owner = THIS_MODULE, 169 .owner = THIS_MODULE,
181 .name = "i2c-pca-isa", 170 .name = DRIVER,
182 } 171 }
183}; 172};
184 173
@@ -204,7 +193,5 @@ MODULE_PARM_DESC(irq, "IRQ");
204module_param(clock, int, 0); 193module_param(clock, int, 0);
205MODULE_PARM_DESC(clock, "Clock rate as described in table 1 of PCA9564 datasheet"); 194MODULE_PARM_DESC(clock, "Clock rate as described in table 1 of PCA9564 datasheet");
206 195
207module_param(own, int, 0); /* the driver can't do slave mode, so there's no real point in this */
208
209module_init(pca_isa_init); 196module_init(pca_isa_init);
210module_exit(pca_isa_exit); 197module_exit(pca_isa_exit);
diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c
new file mode 100644
index 000000000000..9d75f51e8f0e
--- /dev/null
+++ b/drivers/i2c/busses/i2c-pca-platform.c
@@ -0,0 +1,298 @@
1/*
2 * i2c_pca_platform.c
3 *
4 * Platform driver for the PCA9564 I2C controller.
5 *
6 * Copyright (C) 2008 Pengutronix
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11
12 */
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/slab.h>
17#include <linux/delay.h>
18#include <linux/errno.h>
19#include <linux/i2c.h>
20#include <linux/interrupt.h>
21#include <linux/platform_device.h>
22#include <linux/i2c-algo-pca.h>
23#include <linux/i2c-pca-platform.h>
24#include <linux/gpio.h>
25
26#include <asm/irq.h>
27#include <asm/io.h>
28
29#define res_len(r) ((r)->end - (r)->start + 1)
30
31struct i2c_pca_pf_data {
32 void __iomem *reg_base;
33 int irq; /* if 0, use polling */
34 int gpio;
35 wait_queue_head_t wait;
36 struct i2c_adapter adap;
37 struct i2c_algo_pca_data algo_data;
38 unsigned long io_base;
39 unsigned long io_size;
40};
41
42/* Read/Write functions for different register alignments */
43
44static int i2c_pca_pf_readbyte8(void *pd, int reg)
45{
46 struct i2c_pca_pf_data *i2c = pd;
47 return ioread8(i2c->reg_base + reg);
48}
49
50static int i2c_pca_pf_readbyte16(void *pd, int reg)
51{
52 struct i2c_pca_pf_data *i2c = pd;
53 return ioread8(i2c->reg_base + reg * 2);
54}
55
56static int i2c_pca_pf_readbyte32(void *pd, int reg)
57{
58 struct i2c_pca_pf_data *i2c = pd;
59 return ioread8(i2c->reg_base + reg * 4);
60}
61
62static void i2c_pca_pf_writebyte8(void *pd, int reg, int val)
63{
64 struct i2c_pca_pf_data *i2c = pd;
65 iowrite8(val, i2c->reg_base + reg);
66}
67
68static void i2c_pca_pf_writebyte16(void *pd, int reg, int val)
69{
70 struct i2c_pca_pf_data *i2c = pd;
71 iowrite8(val, i2c->reg_base + reg * 2);
72}
73
74static void i2c_pca_pf_writebyte32(void *pd, int reg, int val)
75{
76 struct i2c_pca_pf_data *i2c = pd;
77 iowrite8(val, i2c->reg_base + reg * 4);
78}
79
80
81static int i2c_pca_pf_waitforcompletion(void *pd)
82{
83 struct i2c_pca_pf_data *i2c = pd;
84 int ret = 0;
85
86 if (i2c->irq) {
87 ret = wait_event_interruptible(i2c->wait,
88 i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
89 & I2C_PCA_CON_SI);
90 } else {
91 /*
92 * Do polling...
93 * XXX: Could get stuck in extreme cases!
94 * Maybe add timeout, but using irqs is preferred anyhow.
95 */
96 while ((i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
97 & I2C_PCA_CON_SI) == 0)
98 udelay(100);
99 }
100
101 return ret;
102}
103
104static void i2c_pca_pf_dummyreset(void *pd)
105{
106 struct i2c_pca_pf_data *i2c = pd;
107 printk(KERN_WARNING "%s: No reset-pin found. Chip may get stuck!\n",
108 i2c->adap.name);
109}
110
111static void i2c_pca_pf_resetchip(void *pd)
112{
113 struct i2c_pca_pf_data *i2c = pd;
114
115 gpio_set_value(i2c->gpio, 0);
116 ndelay(100);
117 gpio_set_value(i2c->gpio, 1);
118}
119
120static irqreturn_t i2c_pca_pf_handler(int this_irq, void *dev_id)
121{
122 struct i2c_pca_pf_data *i2c = dev_id;
123
124 if ((i2c->algo_data.read_byte(i2c, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
125 return IRQ_NONE;
126
127 wake_up_interruptible(&i2c->wait);
128
129 return IRQ_HANDLED;
130}
131
132
133static int __devinit i2c_pca_pf_probe(struct platform_device *pdev)
134{
135 struct i2c_pca_pf_data *i2c;
136 struct resource *res;
137 struct i2c_pca9564_pf_platform_data *platform_data =
138 pdev->dev.platform_data;
139 int ret = 0;
140 int irq;
141
142 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
143 irq = platform_get_irq(pdev, 0);
144 /* If irq is 0, we do polling. */
145
146 if (res == NULL) {
147 ret = -ENODEV;
148 goto e_print;
149 }
150
151 if (!request_mem_region(res->start, res_len(res), res->name)) {
152 ret = -ENOMEM;
153 goto e_print;
154 }
155
156 i2c = kzalloc(sizeof(struct i2c_pca_pf_data), GFP_KERNEL);
157 if (!i2c) {
158 ret = -ENOMEM;
159 goto e_alloc;
160 }
161
162 init_waitqueue_head(&i2c->wait);
163
164 i2c->reg_base = ioremap(res->start, res_len(res));
165 if (!i2c->reg_base) {
166 ret = -EIO;
167 goto e_remap;
168 }
169 i2c->io_base = res->start;
170 i2c->io_size = res_len(res);
171 i2c->irq = irq;
172
173 i2c->adap.nr = pdev->id >= 0 ? pdev->id : 0;
174 i2c->adap.owner = THIS_MODULE;
175 snprintf(i2c->adap.name, sizeof(i2c->adap.name), "PCA9564 at 0x%08lx",
176 (unsigned long) res->start);
177 i2c->adap.algo_data = &i2c->algo_data;
178 i2c->adap.dev.parent = &pdev->dev;
179 i2c->adap.timeout = platform_data->timeout;
180
181 i2c->algo_data.i2c_clock = platform_data->i2c_clock_speed;
182 i2c->algo_data.data = i2c;
183
184 switch (res->flags & IORESOURCE_MEM_TYPE_MASK) {
185 case IORESOURCE_MEM_32BIT:
186 i2c->algo_data.write_byte = i2c_pca_pf_writebyte32;
187 i2c->algo_data.read_byte = i2c_pca_pf_readbyte32;
188 break;
189 case IORESOURCE_MEM_16BIT:
190 i2c->algo_data.write_byte = i2c_pca_pf_writebyte16;
191 i2c->algo_data.read_byte = i2c_pca_pf_readbyte16;
192 break;
193 case IORESOURCE_MEM_8BIT:
194 default:
195 i2c->algo_data.write_byte = i2c_pca_pf_writebyte8;
196 i2c->algo_data.read_byte = i2c_pca_pf_readbyte8;
197 break;
198 }
199
200 i2c->algo_data.wait_for_completion = i2c_pca_pf_waitforcompletion;
201
202 i2c->gpio = platform_data->gpio;
203 i2c->algo_data.reset_chip = i2c_pca_pf_dummyreset;
204
205 /* Use gpio_is_valid() when in mainline */
206 if (i2c->gpio > -1) {
207 ret = gpio_request(i2c->gpio, i2c->adap.name);
208 if (ret == 0) {
209 gpio_direction_output(i2c->gpio, 1);
210 i2c->algo_data.reset_chip = i2c_pca_pf_resetchip;
211 } else {
212 printk(KERN_WARNING "%s: Registering gpio failed!\n",
213 i2c->adap.name);
214 i2c->gpio = ret;
215 }
216 }
217
218 if (irq) {
219 ret = request_irq(irq, i2c_pca_pf_handler,
220 IRQF_TRIGGER_FALLING, i2c->adap.name, i2c);
221 if (ret)
222 goto e_reqirq;
223 }
224
225 if (i2c_pca_add_numbered_bus(&i2c->adap) < 0) {
226 ret = -ENODEV;
227 goto e_adapt;
228 }
229
230 platform_set_drvdata(pdev, i2c);
231
232 printk(KERN_INFO "%s registered.\n", i2c->adap.name);
233
234 return 0;
235
236e_adapt:
237 if (irq)
238 free_irq(irq, i2c);
239e_reqirq:
240 if (i2c->gpio > -1)
241 gpio_free(i2c->gpio);
242
243 iounmap(i2c->reg_base);
244e_remap:
245 kfree(i2c);
246e_alloc:
247 release_mem_region(res->start, res_len(res));
248e_print:
249 printk(KERN_ERR "Registering PCA9564 FAILED! (%d)\n", ret);
250 return ret;
251}
252
253static int __devexit i2c_pca_pf_remove(struct platform_device *pdev)
254{
255 struct i2c_pca_pf_data *i2c = platform_get_drvdata(pdev);
256 platform_set_drvdata(pdev, NULL);
257
258 i2c_del_adapter(&i2c->adap);
259
260 if (i2c->irq)
261 free_irq(i2c->irq, i2c);
262
263 if (i2c->gpio > -1)
264 gpio_free(i2c->gpio);
265
266 iounmap(i2c->reg_base);
267 release_mem_region(i2c->io_base, i2c->io_size);
268 kfree(i2c);
269
270 return 0;
271}
272
273static struct platform_driver i2c_pca_pf_driver = {
274 .probe = i2c_pca_pf_probe,
275 .remove = __devexit_p(i2c_pca_pf_remove),
276 .driver = {
277 .name = "i2c-pca-platform",
278 .owner = THIS_MODULE,
279 },
280};
281
282static int __init i2c_pca_pf_init(void)
283{
284 return platform_driver_register(&i2c_pca_pf_driver);
285}
286
287static void __exit i2c_pca_pf_exit(void)
288{
289 platform_driver_unregister(&i2c_pca_pf_driver);
290}
291
292MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
293MODULE_DESCRIPTION("I2C-PCA9564 platform driver");
294MODULE_LICENSE("GPL");
295
296module_init(i2c_pca_pf_init);
297module_exit(i2c_pca_pf_exit);
298
diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c
index b03af5653c65..63b3e2c11cff 100644
--- a/drivers/i2c/busses/i2c-pmcmsp.c
+++ b/drivers/i2c/busses/i2c-pmcmsp.c
@@ -467,7 +467,7 @@ static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd(
467 (cmd->read_len == 0 || cmd->write_len == 0))) { 467 (cmd->read_len == 0 || cmd->write_len == 0))) {
468 dev_err(&pmcmsptwi_adapter.dev, 468 dev_err(&pmcmsptwi_adapter.dev,
469 "%s: Cannot transfer less than 1 byte\n", 469 "%s: Cannot transfer less than 1 byte\n",
470 __FUNCTION__); 470 __func__);
471 return -EINVAL; 471 return -EINVAL;
472 } 472 }
473 473
@@ -475,7 +475,7 @@ static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd(
475 cmd->write_len > MSP_MAX_BYTES_PER_RW) { 475 cmd->write_len > MSP_MAX_BYTES_PER_RW) {
476 dev_err(&pmcmsptwi_adapter.dev, 476 dev_err(&pmcmsptwi_adapter.dev,
477 "%s: Cannot transfer more than %d bytes\n", 477 "%s: Cannot transfer more than %d bytes\n",
478 __FUNCTION__, MSP_MAX_BYTES_PER_RW); 478 __func__, MSP_MAX_BYTES_PER_RW);
479 return -EINVAL; 479 return -EINVAL;
480 } 480 }
481 481
@@ -627,6 +627,9 @@ static struct i2c_adapter pmcmsptwi_adapter = {
627 .name = DRV_NAME, 627 .name = DRV_NAME,
628}; 628};
629 629
630/* work with hotplug and coldplug */
631MODULE_ALIAS("platform:" DRV_NAME);
632
630static struct platform_driver pmcmsptwi_driver = { 633static struct platform_driver pmcmsptwi_driver = {
631 .probe = pmcmsptwi_probe, 634 .probe = pmcmsptwi_probe,
632 .remove = __devexit_p(pmcmsptwi_remove), 635 .remove = __devexit_p(pmcmsptwi_remove),
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
index f8d0dff0de7e..1ca21084ffcf 100644
--- a/drivers/i2c/busses/i2c-pnx.c
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -76,7 +76,7 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
76{ 76{
77 struct i2c_pnx_algo_data *alg_data = adap->algo_data; 77 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
78 78
79 dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __FUNCTION__, 79 dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
80 slave_addr, alg_data->mif.mode); 80 slave_addr, alg_data->mif.mode);
81 81
82 /* Check for 7 bit slave addresses only */ 82 /* Check for 7 bit slave addresses only */
@@ -110,14 +110,14 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
110 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi, 110 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
111 I2C_REG_STS(alg_data)); 111 I2C_REG_STS(alg_data));
112 112
113 dev_dbg(&adap->dev, "%s(): sending %#x\n", __FUNCTION__, 113 dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__,
114 (slave_addr << 1) | start_bit | alg_data->mif.mode); 114 (slave_addr << 1) | start_bit | alg_data->mif.mode);
115 115
116 /* Write the slave address, START bit and R/W bit */ 116 /* Write the slave address, START bit and R/W bit */
117 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode, 117 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
118 I2C_REG_TX(alg_data)); 118 I2C_REG_TX(alg_data));
119 119
120 dev_dbg(&adap->dev, "%s(): exit\n", __FUNCTION__); 120 dev_dbg(&adap->dev, "%s(): exit\n", __func__);
121 121
122 return 0; 122 return 0;
123} 123}
@@ -135,7 +135,7 @@ static void i2c_pnx_stop(struct i2c_adapter *adap)
135 long timeout = 1000; 135 long timeout = 1000;
136 136
137 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", 137 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
138 __FUNCTION__, ioread32(I2C_REG_STS(alg_data))); 138 __func__, ioread32(I2C_REG_STS(alg_data)));
139 139
140 /* Write a STOP bit to TX FIFO */ 140 /* Write a STOP bit to TX FIFO */
141 iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data)); 141 iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
@@ -149,7 +149,7 @@ static void i2c_pnx_stop(struct i2c_adapter *adap)
149 } 149 }
150 150
151 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", 151 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
152 __FUNCTION__, ioread32(I2C_REG_STS(alg_data))); 152 __func__, ioread32(I2C_REG_STS(alg_data)));
153} 153}
154 154
155/** 155/**
@@ -164,7 +164,7 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
164 u32 val; 164 u32 val;
165 165
166 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", 166 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
167 __FUNCTION__, ioread32(I2C_REG_STS(alg_data))); 167 __func__, ioread32(I2C_REG_STS(alg_data)));
168 168
169 if (alg_data->mif.len > 0) { 169 if (alg_data->mif.len > 0) {
170 /* We still have something to talk about... */ 170 /* We still have something to talk about... */
@@ -179,7 +179,7 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
179 alg_data->mif.len--; 179 alg_data->mif.len--;
180 iowrite32(val, I2C_REG_TX(alg_data)); 180 iowrite32(val, I2C_REG_TX(alg_data));
181 181
182 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __FUNCTION__, 182 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__,
183 val, alg_data->mif.len + 1); 183 val, alg_data->mif.len + 1);
184 184
185 if (alg_data->mif.len == 0) { 185 if (alg_data->mif.len == 0) {
@@ -197,7 +197,7 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
197 del_timer_sync(&alg_data->mif.timer); 197 del_timer_sync(&alg_data->mif.timer);
198 198
199 dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n", 199 dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
200 __FUNCTION__); 200 __func__);
201 201
202 complete(&alg_data->mif.complete); 202 complete(&alg_data->mif.complete);
203 } 203 }
@@ -213,13 +213,13 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
213 /* Stop timer. */ 213 /* Stop timer. */
214 del_timer_sync(&alg_data->mif.timer); 214 del_timer_sync(&alg_data->mif.timer);
215 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after " 215 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
216 "zero-xfer.\n", __FUNCTION__); 216 "zero-xfer.\n", __func__);
217 217
218 complete(&alg_data->mif.complete); 218 complete(&alg_data->mif.complete);
219 } 219 }
220 220
221 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", 221 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
222 __FUNCTION__, ioread32(I2C_REG_STS(alg_data))); 222 __func__, ioread32(I2C_REG_STS(alg_data)));
223 223
224 return 0; 224 return 0;
225} 225}
@@ -237,14 +237,14 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
237 u32 ctl = 0; 237 u32 ctl = 0;
238 238
239 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", 239 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
240 __FUNCTION__, ioread32(I2C_REG_STS(alg_data))); 240 __func__, ioread32(I2C_REG_STS(alg_data)));
241 241
242 /* Check, whether there is already data, 242 /* Check, whether there is already data,
243 * or we didn't 'ask' for it yet. 243 * or we didn't 'ask' for it yet.
244 */ 244 */
245 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { 245 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
246 dev_dbg(&adap->dev, "%s(): Write dummy data to fill " 246 dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
247 "Rx-fifo...\n", __FUNCTION__); 247 "Rx-fifo...\n", __func__);
248 248
249 if (alg_data->mif.len == 1) { 249 if (alg_data->mif.len == 1) {
250 /* Last byte, do not acknowledge next rcv. */ 250 /* Last byte, do not acknowledge next rcv. */
@@ -276,7 +276,7 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
276 if (alg_data->mif.len > 0) { 276 if (alg_data->mif.len > 0) {
277 val = ioread32(I2C_REG_RX(alg_data)); 277 val = ioread32(I2C_REG_RX(alg_data));
278 *alg_data->mif.buf++ = (u8) (val & 0xff); 278 *alg_data->mif.buf++ = (u8) (val & 0xff);
279 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __FUNCTION__, val, 279 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
280 alg_data->mif.len); 280 alg_data->mif.len);
281 281
282 alg_data->mif.len--; 282 alg_data->mif.len--;
@@ -300,7 +300,7 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
300 } 300 }
301 301
302 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", 302 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
303 __FUNCTION__, ioread32(I2C_REG_STS(alg_data))); 303 __func__, ioread32(I2C_REG_STS(alg_data)));
304 304
305 return 0; 305 return 0;
306} 306}
@@ -312,7 +312,7 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
312 struct i2c_pnx_algo_data *alg_data = adap->algo_data; 312 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
313 313
314 dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n", 314 dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
315 __FUNCTION__, 315 __func__,
316 ioread32(I2C_REG_STS(alg_data)), 316 ioread32(I2C_REG_STS(alg_data)),
317 ioread32(I2C_REG_CTL(alg_data)), 317 ioread32(I2C_REG_CTL(alg_data)),
318 alg_data->mif.mode); 318 alg_data->mif.mode);
@@ -336,7 +336,7 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
336 /* Slave did not acknowledge, generate a STOP */ 336 /* Slave did not acknowledge, generate a STOP */
337 dev_dbg(&adap->dev, "%s(): " 337 dev_dbg(&adap->dev, "%s(): "
338 "Slave did not acknowledge, generating a STOP.\n", 338 "Slave did not acknowledge, generating a STOP.\n",
339 __FUNCTION__); 339 __func__);
340 i2c_pnx_stop(adap); 340 i2c_pnx_stop(adap);
341 341
342 /* Disable master interrupts. */ 342 /* Disable master interrupts. */
@@ -375,7 +375,7 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
375 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data)); 375 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
376 376
377 dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n", 377 dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
378 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)), 378 __func__, ioread32(I2C_REG_STS(alg_data)),
379 ioread32(I2C_REG_CTL(alg_data))); 379 ioread32(I2C_REG_CTL(alg_data)));
380 380
381 return IRQ_HANDLED; 381 return IRQ_HANDLED;
@@ -447,7 +447,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
447 u32 stat = ioread32(I2C_REG_STS(alg_data)); 447 u32 stat = ioread32(I2C_REG_STS(alg_data));
448 448
449 dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n", 449 dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
450 __FUNCTION__, num, ioread32(I2C_REG_STS(alg_data))); 450 __func__, num, ioread32(I2C_REG_STS(alg_data)));
451 451
452 bus_reset_if_active(adap); 452 bus_reset_if_active(adap);
453 453
@@ -473,7 +473,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
473 alg_data->mif.ret = 0; 473 alg_data->mif.ret = 0;
474 alg_data->last = (i == num - 1); 474 alg_data->last = (i == num - 1);
475 475
476 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __FUNCTION__, 476 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__,
477 alg_data->mif.mode, 477 alg_data->mif.mode,
478 alg_data->mif.len); 478 alg_data->mif.len);
479 479
@@ -498,7 +498,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
498 if (!(rc = alg_data->mif.ret)) 498 if (!(rc = alg_data->mif.ret))
499 completed++; 499 completed++;
500 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n", 500 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
501 __FUNCTION__, rc); 501 __func__, rc);
502 502
503 /* Clear TDI and AFI bits in case they are set. */ 503 /* Clear TDI and AFI bits in case they are set. */
504 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) { 504 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
@@ -522,7 +522,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
522 alg_data->mif.len = 0; 522 alg_data->mif.len = 0;
523 523
524 dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n", 524 dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
525 __FUNCTION__, ioread32(I2C_REG_STS(alg_data))); 525 __func__, ioread32(I2C_REG_STS(alg_data)));
526 526
527 if (completed != num) 527 if (completed != num)
528 return ((rc < 0) ? rc : -EREMOTEIO); 528 return ((rc < 0) ? rc : -EREMOTEIO);
@@ -563,7 +563,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)
563 563
564 if (!i2c_pnx || !i2c_pnx->adapter) { 564 if (!i2c_pnx || !i2c_pnx->adapter) {
565 dev_err(&pdev->dev, "%s: no platform data supplied\n", 565 dev_err(&pdev->dev, "%s: no platform data supplied\n",
566 __FUNCTION__); 566 __func__);
567 ret = -EINVAL; 567 ret = -EINVAL;
568 goto out; 568 goto out;
569 } 569 }
@@ -697,6 +697,7 @@ static void __exit i2c_adap_pnx_exit(void)
697MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>"); 697MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
698MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses"); 698MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
699MODULE_LICENSE("GPL"); 699MODULE_LICENSE("GPL");
700MODULE_ALIAS("platform:pnx-i2c");
700 701
701/* We need to make sure I2C is initialized before USB */ 702/* We need to make sure I2C is initialized before USB */
702subsys_initcall(i2c_adap_pnx_init); 703subsys_initcall(i2c_adap_pnx_init);
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
index 7813127649a1..22f6d5c00d80 100644
--- a/drivers/i2c/busses/i2c-powermac.c
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -263,6 +263,9 @@ static int __devexit i2c_powermac_probe(struct platform_device *dev)
263} 263}
264 264
265 265
266/* work with hotplug and coldplug */
267MODULE_ALIAS("platform:i2c-powermac");
268
266static struct platform_driver i2c_powermac_driver = { 269static struct platform_driver i2c_powermac_driver = {
267 .probe = i2c_powermac_probe, 270 .probe = i2c_powermac_probe,
268 .remove = __devexit_p(i2c_powermac_remove), 271 .remove = __devexit_p(i2c_powermac_remove),
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 6fd2d6a84eff..eb69fbadc9cb 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -155,7 +155,7 @@ static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
155 readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c))); 155 readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
156} 156}
157 157
158#define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __FUNCTION__) 158#define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __func__)
159#else 159#else
160#define i2c_debug 0 160#define i2c_debug 0
161 161
@@ -1132,6 +1132,7 @@ static void __exit i2c_adap_pxa_exit(void)
1132} 1132}
1133 1133
1134MODULE_LICENSE("GPL"); 1134MODULE_LICENSE("GPL");
1135MODULE_ALIAS("platform:pxa2xx-i2c");
1135 1136
1136module_init(i2c_adap_pxa_init); 1137module_init(i2c_adap_pxa_init);
1137module_exit(i2c_adap_pxa_exit); 1138module_exit(i2c_adap_pxa_exit);
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index c44ada5f4292..1305ef190fc1 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -276,12 +276,12 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
276 switch (i2c->state) { 276 switch (i2c->state) {
277 277
278 case STATE_IDLE: 278 case STATE_IDLE:
279 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__); 279 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
280 goto out; 280 goto out;
281 break; 281 break;
282 282
283 case STATE_STOP: 283 case STATE_STOP:
284 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__); 284 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
285 s3c24xx_i2c_disable_irq(i2c); 285 s3c24xx_i2c_disable_irq(i2c);
286 goto out_ack; 286 goto out_ack;
287 287
@@ -948,3 +948,4 @@ module_exit(i2c_adap_s3c_exit);
948MODULE_DESCRIPTION("S3C24XX I2C Bus driver"); 948MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
949MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); 949MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
950MODULE_LICENSE("GPL"); 950MODULE_LICENSE("GPL");
951MODULE_ALIAS("platform:s3c2410-i2c");
diff --git a/drivers/i2c/busses/i2c-sh7760.c b/drivers/i2c/busses/i2c-sh7760.c
new file mode 100644
index 000000000000..5e0e254976de
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sh7760.c
@@ -0,0 +1,577 @@
1/*
2 * I2C bus driver for the SH7760 I2C Interfaces.
3 *
4 * (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com>
5 *
6 * licensed under the terms outlined in the file COPYING.
7 *
8 */
9
10#include <linux/completion.h>
11#include <linux/delay.h>
12#include <linux/err.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/ioport.h>
17#include <linux/platform_device.h>
18#include <linux/slab.h>
19
20#include <asm/clock.h>
21#include <asm/i2c-sh7760.h>
22#include <asm/io.h>
23
24/* register offsets */
25#define I2CSCR 0x0 /* slave ctrl */
26#define I2CMCR 0x4 /* master ctrl */
27#define I2CSSR 0x8 /* slave status */
28#define I2CMSR 0xC /* master status */
29#define I2CSIER 0x10 /* slave irq enable */
30#define I2CMIER 0x14 /* master irq enable */
31#define I2CCCR 0x18 /* clock dividers */
32#define I2CSAR 0x1c /* slave address */
33#define I2CMAR 0x20 /* master address */
34#define I2CRXTX 0x24 /* data port */
35#define I2CFCR 0x28 /* fifo control */
36#define I2CFSR 0x2C /* fifo status */
37#define I2CFIER 0x30 /* fifo irq enable */
38#define I2CRFDR 0x34 /* rx fifo count */
39#define I2CTFDR 0x38 /* tx fifo count */
40
41#define REGSIZE 0x3C
42
43#define MCR_MDBS 0x80 /* non-fifo mode switch */
44#define MCR_FSCL 0x40 /* override SCL pin */
45#define MCR_FSDA 0x20 /* override SDA pin */
46#define MCR_OBPC 0x10 /* override pins */
47#define MCR_MIE 0x08 /* master if enable */
48#define MCR_TSBE 0x04
49#define MCR_FSB 0x02 /* force stop bit */
50#define MCR_ESG 0x01 /* en startbit gen. */
51
52#define MSR_MNR 0x40 /* nack received */
53#define MSR_MAL 0x20 /* arbitration lost */
54#define MSR_MST 0x10 /* sent a stop */
55#define MSR_MDE 0x08
56#define MSR_MDT 0x04
57#define MSR_MDR 0x02
58#define MSR_MAT 0x01 /* slave addr xfer done */
59
60#define MIE_MNRE 0x40 /* nack irq en */
61#define MIE_MALE 0x20 /* arblos irq en */
62#define MIE_MSTE 0x10 /* stop irq en */
63#define MIE_MDEE 0x08
64#define MIE_MDTE 0x04
65#define MIE_MDRE 0x02
66#define MIE_MATE 0x01 /* address sent irq en */
67
68#define FCR_RFRST 0x02 /* reset rx fifo */
69#define FCR_TFRST 0x01 /* reset tx fifo */
70
71#define FSR_TEND 0x04 /* last byte sent */
72#define FSR_RDF 0x02 /* rx fifo trigger */
73#define FSR_TDFE 0x01 /* tx fifo empty */
74
75#define FIER_TEIE 0x04 /* tx fifo empty irq en */
76#define FIER_RXIE 0x02 /* rx fifo trig irq en */
77#define FIER_TXIE 0x01 /* tx fifo trig irq en */
78
79#define FIFO_SIZE 16
80
81struct cami2c {
82 void __iomem *iobase;
83 struct i2c_adapter adap;
84
85 /* message processing */
86 struct i2c_msg *msg;
87#define IDF_SEND 1
88#define IDF_RECV 2
89#define IDF_STOP 4
90 int flags;
91
92#define IDS_DONE 1
93#define IDS_ARBLOST 2
94#define IDS_NACK 4
95 int status;
96 struct completion xfer_done;
97
98 int irq;
99 struct resource *ioarea;
100};
101
102static inline void OUT32(struct cami2c *cam, int reg, unsigned long val)
103{
104 ctrl_outl(val, (unsigned long)cam->iobase + reg);
105}
106
107static inline unsigned long IN32(struct cami2c *cam, int reg)
108{
109 return ctrl_inl((unsigned long)cam->iobase + reg);
110}
111
112static irqreturn_t sh7760_i2c_irq(int irq, void *ptr)
113{
114 struct cami2c *id = ptr;
115 struct i2c_msg *msg = id->msg;
116 char *data = msg->buf;
117 unsigned long msr, fsr, fier, len;
118
119 msr = IN32(id, I2CMSR);
120 fsr = IN32(id, I2CFSR);
121
122 /* arbitration lost */
123 if (msr & MSR_MAL) {
124 OUT32(id, I2CMCR, 0);
125 OUT32(id, I2CSCR, 0);
126 OUT32(id, I2CSAR, 0);
127 id->status |= IDS_DONE | IDS_ARBLOST;
128 goto out;
129 }
130
131 if (msr & MSR_MNR) {
132 /* NACK handling is very screwed up. After receiving a
133 * NAK IRQ one has to wait a bit before writing to any
134 * registers, or the ctl will lock up. After that delay
135 * do a normal i2c stop. Then wait at least 1 ms before
136 * attempting another transfer or ctl will stop working
137 */
138 udelay(100); /* wait or risk ctl hang */
139 OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST);
140 OUT32(id, I2CMCR, MCR_MIE | MCR_FSB);
141 OUT32(id, I2CFIER, 0);
142 OUT32(id, I2CMIER, MIE_MSTE);
143 OUT32(id, I2CSCR, 0);
144 OUT32(id, I2CSAR, 0);
145 id->status |= IDS_NACK;
146 msr &= ~MSR_MAT;
147 fsr = 0;
148 /* In some cases the MST bit is also set. */
149 }
150
151 /* i2c-stop was sent */
152 if (msr & MSR_MST) {
153 id->status |= IDS_DONE;
154 goto out;
155 }
156
157 /* i2c slave addr was sent; set to "normal" operation */
158 if (msr & MSR_MAT)
159 OUT32(id, I2CMCR, MCR_MIE);
160
161 fier = IN32(id, I2CFIER);
162
163 if (fsr & FSR_RDF) {
164 len = IN32(id, I2CRFDR);
165 if (msg->len <= len) {
166 if (id->flags & IDF_STOP) {
167 OUT32(id, I2CMCR, MCR_MIE | MCR_FSB);
168 OUT32(id, I2CFIER, 0);
169 /* manual says: wait >= 0.5 SCL times */
170 udelay(5);
171 /* next int should be MST */
172 } else {
173 id->status |= IDS_DONE;
174 /* keep the RDF bit: ctrl holds SCL low
175 * until the setup for the next i2c_msg
176 * clears this bit.
177 */
178 fsr &= ~FSR_RDF;
179 }
180 }
181 while (msg->len && len) {
182 *data++ = IN32(id, I2CRXTX);
183 msg->len--;
184 len--;
185 }
186
187 if (msg->len) {
188 len = (msg->len >= FIFO_SIZE) ? FIFO_SIZE - 1
189 : msg->len - 1;
190
191 OUT32(id, I2CFCR, FCR_TFRST | ((len & 0xf) << 4));
192 }
193
194 } else if (id->flags & IDF_SEND) {
195 if ((fsr & FSR_TEND) && (msg->len < 1)) {
196 if (id->flags & IDF_STOP) {
197 OUT32(id, I2CMCR, MCR_MIE | MCR_FSB);
198 } else {
199 id->status |= IDS_DONE;
200 /* keep the TEND bit: ctl holds SCL low
201 * until the setup for the next i2c_msg
202 * clears this bit.
203 */
204 fsr &= ~FSR_TEND;
205 }
206 }
207 if (fsr & FSR_TDFE) {
208 while (msg->len && (IN32(id, I2CTFDR) < FIFO_SIZE)) {
209 OUT32(id, I2CRXTX, *data++);
210 msg->len--;
211 }
212
213 if (msg->len < 1) {
214 fier &= ~FIER_TXIE;
215 OUT32(id, I2CFIER, fier);
216 } else {
217 len = (msg->len >= FIFO_SIZE) ? 2 : 0;
218 OUT32(id, I2CFCR,
219 FCR_RFRST | ((len & 3) << 2));
220 }
221 }
222 }
223out:
224 if (id->status & IDS_DONE) {
225 OUT32(id, I2CMIER, 0);
226 OUT32(id, I2CFIER, 0);
227 id->msg = NULL;
228 complete(&id->xfer_done);
229 }
230 /* clear status flags and ctrl resumes work */
231 OUT32(id, I2CMSR, ~msr);
232 OUT32(id, I2CFSR, ~fsr);
233 OUT32(id, I2CSSR, 0);
234
235 return IRQ_HANDLED;
236}
237
238
239/* prepare and start a master receive operation */
240static void sh7760_i2c_mrecv(struct cami2c *id)
241{
242 int len;
243
244 id->flags |= IDF_RECV;
245
246 /* set the slave addr reg; otherwise rcv wont work! */
247 OUT32(id, I2CSAR, 0xfe);
248 OUT32(id, I2CMAR, (id->msg->addr << 1) | 1);
249
250 /* adjust rx fifo trigger */
251 if (id->msg->len >= FIFO_SIZE)
252 len = FIFO_SIZE - 1; /* trigger at fifo full */
253 else
254 len = id->msg->len - 1; /* trigger before all received */
255
256 OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST);
257 OUT32(id, I2CFCR, FCR_TFRST | ((len & 0xF) << 4));
258
259 OUT32(id, I2CMSR, 0);
260 OUT32(id, I2CMCR, MCR_MIE | MCR_ESG);
261 OUT32(id, I2CMIER, MIE_MNRE | MIE_MALE | MIE_MSTE | MIE_MATE);
262 OUT32(id, I2CFIER, FIER_RXIE);
263}
264
265/* prepare and start a master send operation */
266static void sh7760_i2c_msend(struct cami2c *id)
267{
268 int len;
269
270 id->flags |= IDF_SEND;
271
272 /* set the slave addr reg; otherwise xmit wont work! */
273 OUT32(id, I2CSAR, 0xfe);
274 OUT32(id, I2CMAR, (id->msg->addr << 1) | 0);
275
276 /* adjust tx fifo trigger */
277 if (id->msg->len >= FIFO_SIZE)
278 len = 2; /* trig: 2 bytes left in TX fifo */
279 else
280 len = 0; /* trig: 8 bytes left in TX fifo */
281
282 OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST);
283 OUT32(id, I2CFCR, FCR_RFRST | ((len & 3) << 2));
284
285 while (id->msg->len && IN32(id, I2CTFDR) < FIFO_SIZE) {
286 OUT32(id, I2CRXTX, *(id->msg->buf));
287 (id->msg->len)--;
288 (id->msg->buf)++;
289 }
290
291 OUT32(id, I2CMSR, 0);
292 OUT32(id, I2CMCR, MCR_MIE | MCR_ESG);
293 OUT32(id, I2CFSR, 0);
294 OUT32(id, I2CMIER, MIE_MNRE | MIE_MALE | MIE_MSTE | MIE_MATE);
295 OUT32(id, I2CFIER, FIER_TEIE | (id->msg->len ? FIER_TXIE : 0));
296}
297
298static inline int sh7760_i2c_busy_check(struct cami2c *id)
299{
300 return (IN32(id, I2CMCR) & MCR_FSDA);
301}
302
303static int sh7760_i2c_master_xfer(struct i2c_adapter *adap,
304 struct i2c_msg *msgs,
305 int num)
306{
307 struct cami2c *id = adap->algo_data;
308 int i, retr;
309
310 if (sh7760_i2c_busy_check(id)) {
311 dev_err(&adap->dev, "sh7760-i2c%d: bus busy!\n", adap->nr);
312 return -EBUSY;
313 }
314
315 i = 0;
316 while (i < num) {
317 retr = adap->retries;
318retry:
319 id->flags = ((i == (num-1)) ? IDF_STOP : 0);
320 id->status = 0;
321 id->msg = msgs;
322 init_completion(&id->xfer_done);
323
324 if (msgs->flags & I2C_M_RD)
325 sh7760_i2c_mrecv(id);
326 else
327 sh7760_i2c_msend(id);
328
329 wait_for_completion(&id->xfer_done);
330
331 if (id->status == 0) {
332 num = -EIO;
333 break;
334 }
335
336 if (id->status & IDS_NACK) {
337 /* wait a bit or i2c module stops working */
338 mdelay(1);
339 num = -EREMOTEIO;
340 break;
341 }
342
343 if (id->status & IDS_ARBLOST) {
344 if (retr--) {
345 mdelay(2);
346 goto retry;
347 }
348 num = -EREMOTEIO;
349 break;
350 }
351
352 msgs++;
353 i++;
354 }
355
356 id->msg = NULL;
357 id->flags = 0;
358 id->status = 0;
359
360 OUT32(id, I2CMCR, 0);
361 OUT32(id, I2CMSR, 0);
362 OUT32(id, I2CMIER, 0);
363 OUT32(id, I2CFIER, 0);
364
365 /* reset slave module registers too: master mode enables slave
366 * module for receive ops (ack, data). Without this reset,
367 * eternal bus activity might be reported after NACK / ARBLOST.
368 */
369 OUT32(id, I2CSCR, 0);
370 OUT32(id, I2CSAR, 0);
371 OUT32(id, I2CSSR, 0);
372
373 return num;
374}
375
376static u32 sh7760_i2c_func(struct i2c_adapter *adap)
377{
378 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
379}
380
381static const struct i2c_algorithm sh7760_i2c_algo = {
382 .master_xfer = sh7760_i2c_master_xfer,
383 .functionality = sh7760_i2c_func,
384};
385
386/* calculate CCR register setting for a desired scl clock. SCL clock is
387 * derived from I2C module clock (iclk) which in turn is derived from
388 * peripheral module clock (mclk, usually around 33MHz):
389 * iclk = mclk/(CDF + 1). iclk must be < 20MHz.
390 * scl = iclk/(SCGD*8 + 20).
391 */
392static int __devinit calc_CCR(unsigned long scl_hz)
393{
394 struct clk *mclk;
395 unsigned long mck, m1, dff, odff, iclk;
396 signed char cdf, cdfm;
397 int scgd, scgdm, scgds;
398
399 mclk = clk_get(NULL, "module_clk");
400 if (IS_ERR(mclk)) {
401 return PTR_ERR(mclk);
402 } else {
403 mck = mclk->rate;
404 clk_put(mclk);
405 }
406
407 odff = scl_hz;
408 scgdm = cdfm = m1 = 0;
409 for (cdf = 3; cdf >= 0; cdf--) {
410 iclk = mck / (1 + cdf);
411 if (iclk >= 20000000)
412 continue;
413 scgds = ((iclk / scl_hz) - 20) >> 3;
414 for (scgd = scgds; (scgd < 63) && scgd <= scgds + 1; scgd++) {
415 m1 = iclk / (20 + (scgd << 3));
416 dff = abs(scl_hz - m1);
417 if (dff < odff) {
418 odff = dff;
419 cdfm = cdf;
420 scgdm = scgd;
421 }
422 }
423 }
424 /* fail if more than 25% off of requested SCL */
425 if (odff > (scl_hz >> 2))
426 return -EINVAL;
427
428 /* create a CCR register value */
429 return ((scgdm << 2) | cdfm);
430}
431
432static int __devinit sh7760_i2c_probe(struct platform_device *pdev)
433{
434 struct sh7760_i2c_platdata *pd;
435 struct resource *res;
436 struct cami2c *id;
437 int ret;
438
439 pd = pdev->dev.platform_data;
440 if (!pd) {
441 dev_err(&pdev->dev, "no platform_data!\n");
442 ret = -ENODEV;
443 goto out0;
444 }
445
446 id = kzalloc(sizeof(struct cami2c), GFP_KERNEL);
447 if (!id) {
448 dev_err(&pdev->dev, "no mem for private data\n");
449 ret = -ENOMEM;
450 goto out0;
451 }
452
453 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
454 if (!res) {
455 dev_err(&pdev->dev, "no mmio resources\n");
456 ret = -ENODEV;
457 goto out1;
458 }
459
460 id->ioarea = request_mem_region(res->start, REGSIZE, pdev->name);
461 if (!id->ioarea) {
462 dev_err(&pdev->dev, "mmio already reserved\n");
463 ret = -EBUSY;
464 goto out1;
465 }
466
467 id->iobase = ioremap(res->start, REGSIZE);
468 if (!id->iobase) {
469 dev_err(&pdev->dev, "cannot ioremap\n");
470 ret = -ENODEV;
471 goto out2;
472 }
473
474 id->irq = platform_get_irq(pdev, 0);
475
476 id->adap.nr = pdev->id;
477 id->adap.algo = &sh7760_i2c_algo;
478 id->adap.class = I2C_CLASS_ALL;
479 id->adap.retries = 3;
480 id->adap.algo_data = id;
481 id->adap.dev.parent = &pdev->dev;
482 snprintf(id->adap.name, sizeof(id->adap.name),
483 "SH7760 I2C at %08lx", (unsigned long)res->start);
484
485 OUT32(id, I2CMCR, 0);
486 OUT32(id, I2CMSR, 0);
487 OUT32(id, I2CMIER, 0);
488 OUT32(id, I2CMAR, 0);
489 OUT32(id, I2CSIER, 0);
490 OUT32(id, I2CSAR, 0);
491 OUT32(id, I2CSCR, 0);
492 OUT32(id, I2CSSR, 0);
493 OUT32(id, I2CFIER, 0);
494 OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST);
495 OUT32(id, I2CFSR, 0);
496
497 ret = calc_CCR(pd->speed_khz * 1000);
498 if (ret < 0) {
499 dev_err(&pdev->dev, "invalid SCL clock: %dkHz\n",
500 pd->speed_khz);
501 goto out3;
502 }
503 OUT32(id, I2CCCR, ret);
504
505 if (request_irq(id->irq, sh7760_i2c_irq, IRQF_DISABLED,
506 SH7760_I2C_DEVNAME, id)) {
507 dev_err(&pdev->dev, "cannot get irq %d\n", id->irq);
508 ret = -EBUSY;
509 goto out3;
510 }
511
512 ret = i2c_add_numbered_adapter(&id->adap);
513 if (ret < 0) {
514 dev_err(&pdev->dev, "reg adap failed: %d\n", ret);
515 goto out4;
516 }
517
518 platform_set_drvdata(pdev, id);
519
520 dev_info(&pdev->dev, "%d kHz mmio %08x irq %d\n",
521 pd->speed_khz, res->start, id->irq);
522
523 return 0;
524
525out4:
526 free_irq(id->irq, id);
527out3:
528 iounmap(id->iobase);
529out2:
530 release_resource(id->ioarea);
531 kfree(id->ioarea);
532out1:
533 kfree(id);
534out0:
535 return ret;
536}
537
538static int __devexit sh7760_i2c_remove(struct platform_device *pdev)
539{
540 struct cami2c *id = platform_get_drvdata(pdev);
541
542 i2c_del_adapter(&id->adap);
543 free_irq(id->irq, id);
544 iounmap(id->iobase);
545 release_resource(id->ioarea);
546 kfree(id->ioarea);
547 kfree(id);
548 platform_set_drvdata(pdev, NULL);
549
550 return 0;
551}
552
553static struct platform_driver sh7760_i2c_drv = {
554 .driver = {
555 .name = SH7760_I2C_DEVNAME,
556 .owner = THIS_MODULE,
557 },
558 .probe = sh7760_i2c_probe,
559 .remove = __devexit_p(sh7760_i2c_remove),
560};
561
562static int __init sh7760_i2c_init(void)
563{
564 return platform_driver_register(&sh7760_i2c_drv);
565}
566
567static void __exit sh7760_i2c_exit(void)
568{
569 platform_driver_unregister(&sh7760_i2c_drv);
570}
571
572module_init(sh7760_i2c_init);
573module_exit(sh7760_i2c_exit);
574
575MODULE_LICENSE("GPL");
576MODULE_DESCRIPTION("SH7760 I2C bus driver");
577MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
new file mode 100644
index 000000000000..840e634fa31f
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -0,0 +1,500 @@
1/*
2 * SuperH Mobile I2C Controller
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * Portions of the code based on out-of-tree driver i2c-sh7343.c
7 * Copyright (c) 2006 Carlos Munoz <carlos@kenati.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/platform_device.h>
28#include <linux/interrupt.h>
29#include <linux/i2c.h>
30#include <linux/err.h>
31#include <linux/clk.h>
32#include <linux/io.h>
33
34enum sh_mobile_i2c_op {
35 OP_START = 0,
36 OP_TX_ONLY,
37 OP_TX_STOP,
38 OP_TX_TO_RX,
39 OP_RX_ONLY,
40 OP_RX_STOP,
41};
42
43struct sh_mobile_i2c_data {
44 struct device *dev;
45 void __iomem *reg;
46 struct i2c_adapter adap;
47
48 struct clk *clk;
49 u_int8_t iccl;
50 u_int8_t icch;
51
52 spinlock_t lock;
53 wait_queue_head_t wait;
54 struct i2c_msg *msg;
55 int pos;
56 int sr;
57};
58
59#define NORMAL_SPEED 100000 /* FAST_SPEED 400000 */
60
61/* Register offsets */
62#define ICDR(pd) (pd->reg + 0x00)
63#define ICCR(pd) (pd->reg + 0x04)
64#define ICSR(pd) (pd->reg + 0x08)
65#define ICIC(pd) (pd->reg + 0x0c)
66#define ICCL(pd) (pd->reg + 0x10)
67#define ICCH(pd) (pd->reg + 0x14)
68
69/* Register bits */
70#define ICCR_ICE 0x80
71#define ICCR_RACK 0x40
72#define ICCR_TRS 0x10
73#define ICCR_BBSY 0x04
74#define ICCR_SCP 0x01
75
76#define ICSR_SCLM 0x80
77#define ICSR_SDAM 0x40
78#define SW_DONE 0x20
79#define ICSR_BUSY 0x10
80#define ICSR_AL 0x08
81#define ICSR_TACK 0x04
82#define ICSR_WAIT 0x02
83#define ICSR_DTE 0x01
84
85#define ICIC_ALE 0x08
86#define ICIC_TACKE 0x04
87#define ICIC_WAITE 0x02
88#define ICIC_DTEE 0x01
89
90static void activate_ch(struct sh_mobile_i2c_data *pd)
91{
92 /* Make sure the clock is enabled */
93 clk_enable(pd->clk);
94
95 /* Enable channel and configure rx ack */
96 iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
97
98 /* Mask all interrupts */
99 iowrite8(0, ICIC(pd));
100
101 /* Set the clock */
102 iowrite8(pd->iccl, ICCL(pd));
103 iowrite8(pd->icch, ICCH(pd));
104}
105
106static void deactivate_ch(struct sh_mobile_i2c_data *pd)
107{
108 /* Clear/disable interrupts */
109 iowrite8(0, ICSR(pd));
110 iowrite8(0, ICIC(pd));
111
112 /* Disable channel */
113 iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
114
115 /* Disable clock */
116 clk_disable(pd->clk);
117}
118
119static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
120 enum sh_mobile_i2c_op op, unsigned char data)
121{
122 unsigned char ret = 0;
123 unsigned long flags;
124
125 dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data);
126
127 spin_lock_irqsave(&pd->lock, flags);
128
129 switch (op) {
130 case OP_START:
131 iowrite8(0x94, ICCR(pd));
132 break;
133 case OP_TX_ONLY:
134 iowrite8(data, ICDR(pd));
135 break;
136 case OP_TX_STOP:
137 iowrite8(data, ICDR(pd));
138 iowrite8(0x90, ICCR(pd));
139 iowrite8(ICIC_ALE | ICIC_TACKE, ICIC(pd));
140 break;
141 case OP_TX_TO_RX:
142 iowrite8(data, ICDR(pd));
143 iowrite8(0x81, ICCR(pd));
144 break;
145 case OP_RX_ONLY:
146 ret = ioread8(ICDR(pd));
147 break;
148 case OP_RX_STOP:
149 ret = ioread8(ICDR(pd));
150 iowrite8(0xc0, ICCR(pd));
151 break;
152 }
153
154 spin_unlock_irqrestore(&pd->lock, flags);
155
156 dev_dbg(pd->dev, "op %d, data out 0x%02x\n", op, ret);
157 return ret;
158}
159
160static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
161{
162 struct platform_device *dev = dev_id;
163 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
164 struct i2c_msg *msg = pd->msg;
165 unsigned char data, sr;
166 int wakeup = 0;
167
168 sr = ioread8(ICSR(pd));
169 pd->sr |= sr;
170
171 dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
172 (msg->flags & I2C_M_RD) ? "read" : "write",
173 pd->pos, msg->len);
174
175 if (sr & (ICSR_AL | ICSR_TACK)) {
176 iowrite8(0, ICIC(pd)); /* disable interrupts */
177 wakeup = 1;
178 goto do_wakeup;
179 }
180
181 if (pd->pos == msg->len) {
182 i2c_op(pd, OP_RX_ONLY, 0);
183 wakeup = 1;
184 goto do_wakeup;
185 }
186
187 if (pd->pos == -1) {
188 data = (msg->addr & 0x7f) << 1;
189 data |= (msg->flags & I2C_M_RD) ? 1 : 0;
190 } else
191 data = msg->buf[pd->pos];
192
193 if ((pd->pos == -1) || !(msg->flags & I2C_M_RD)) {
194 if (msg->flags & I2C_M_RD)
195 i2c_op(pd, OP_TX_TO_RX, data);
196 else if (pd->pos == (msg->len - 1)) {
197 i2c_op(pd, OP_TX_STOP, data);
198 wakeup = 1;
199 } else
200 i2c_op(pd, OP_TX_ONLY, data);
201 } else {
202 if (pd->pos == (msg->len - 1))
203 data = i2c_op(pd, OP_RX_STOP, 0);
204 else
205 data = i2c_op(pd, OP_RX_ONLY, 0);
206
207 msg->buf[pd->pos] = data;
208 }
209 pd->pos++;
210
211 do_wakeup:
212 if (wakeup) {
213 pd->sr |= SW_DONE;
214 wake_up(&pd->wait);
215 }
216
217 return IRQ_HANDLED;
218}
219
220static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
221{
222 /* Initialize channel registers */
223 iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
224
225 /* Enable channel and configure rx ack */
226 iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
227
228 /* Set the clock */
229 iowrite8(pd->iccl, ICCL(pd));
230 iowrite8(pd->icch, ICCH(pd));
231
232 pd->msg = usr_msg;
233 pd->pos = -1;
234 pd->sr = 0;
235
236 /* Enable all interrupts except wait */
237 iowrite8(ioread8(ICIC(pd)) | ICIC_ALE | ICIC_TACKE | ICIC_DTEE,
238 ICIC(pd));
239 return 0;
240}
241
242static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
243 struct i2c_msg *msgs,
244 int num)
245{
246 struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
247 struct i2c_msg *msg;
248 int err = 0;
249 u_int8_t val;
250 int i, k, retry_count;
251
252 activate_ch(pd);
253
254 /* Process all messages */
255 for (i = 0; i < num; i++) {
256 msg = &msgs[i];
257
258 err = start_ch(pd, msg);
259 if (err)
260 break;
261
262 i2c_op(pd, OP_START, 0);
263
264 /* The interrupt handler takes care of the rest... */
265 k = wait_event_timeout(pd->wait,
266 pd->sr & (ICSR_TACK | SW_DONE),
267 5 * HZ);
268 if (!k)
269 dev_err(pd->dev, "Transfer request timed out\n");
270
271 retry_count = 10;
272again:
273 val = ioread8(ICSR(pd));
274
275 dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
276
277 if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
278 err = -EIO;
279 break;
280 }
281
282 /* the interrupt handler may wake us up before the
283 * transfer is finished, so poll the hardware
284 * until we're done.
285 */
286
287 if (!(!(val & ICSR_BUSY) && (val & ICSR_SCLM) &&
288 (val & ICSR_SDAM))) {
289 msleep(1);
290 if (retry_count--)
291 goto again;
292
293 err = -EIO;
294 dev_err(pd->dev, "Polling timed out\n");
295 break;
296 }
297 }
298
299 deactivate_ch(pd);
300
301 if (!err)
302 err = num;
303 return err;
304}
305
306static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
307{
308 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
309}
310
311static struct i2c_algorithm sh_mobile_i2c_algorithm = {
312 .functionality = sh_mobile_i2c_func,
313 .master_xfer = sh_mobile_i2c_xfer,
314};
315
316static void sh_mobile_i2c_setup_channel(struct platform_device *dev)
317{
318 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
319 unsigned long peripheral_clk = clk_get_rate(pd->clk);
320 u_int32_t num;
321 u_int32_t denom;
322 u_int32_t tmp;
323
324 spin_lock_init(&pd->lock);
325 init_waitqueue_head(&pd->wait);
326
327 /* Calculate the value for iccl. From the data sheet:
328 * iccl = (p clock / transfer rate) * (L / (L + H))
329 * where L and H are the SCL low/high ratio (5/4 in this case).
330 * We also round off the result.
331 */
332 num = peripheral_clk * 5;
333 denom = NORMAL_SPEED * 9;
334 tmp = num * 10 / denom;
335 if (tmp % 10 >= 5)
336 pd->iccl = (u_int8_t)((num/denom) + 1);
337 else
338 pd->iccl = (u_int8_t)(num/denom);
339
340 /* Calculate the value for icch. From the data sheet:
341 icch = (p clock / transfer rate) * (H / (L + H)) */
342 num = peripheral_clk * 4;
343 tmp = num * 10 / denom;
344 if (tmp % 10 >= 5)
345 pd->icch = (u_int8_t)((num/denom) + 1);
346 else
347 pd->icch = (u_int8_t)(num/denom);
348}
349
350static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
351{
352 struct resource *res;
353 int ret = -ENXIO;
354 int q, m;
355 int k = 0;
356 int n = 0;
357
358 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
359 for (n = res->start; hook && n <= res->end; n++) {
360 if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED,
361 dev->dev.bus_id, dev))
362 goto rollback;
363 }
364 k++;
365 }
366
367 if (hook)
368 return k > 0 ? 0 : -ENOENT;
369
370 k--;
371 ret = 0;
372
373 rollback:
374 for (q = k; k >= 0; k--) {
375 for (m = n; m >= res->start; m--)
376 free_irq(m, dev);
377
378 res = platform_get_resource(dev, IORESOURCE_IRQ, k - 1);
379 m = res->end;
380 }
381
382 return ret;
383}
384
385static int sh_mobile_i2c_probe(struct platform_device *dev)
386{
387 struct sh_mobile_i2c_data *pd;
388 struct i2c_adapter *adap;
389 struct resource *res;
390 int size;
391 int ret;
392
393 pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
394 if (pd == NULL) {
395 dev_err(&dev->dev, "cannot allocate private data\n");
396 return -ENOMEM;
397 }
398
399 pd->clk = clk_get(&dev->dev, "peripheral_clk");
400 if (IS_ERR(pd->clk)) {
401 dev_err(&dev->dev, "cannot get peripheral clock\n");
402 ret = PTR_ERR(pd->clk);
403 goto err;
404 }
405
406 ret = sh_mobile_i2c_hook_irqs(dev, 1);
407 if (ret) {
408 dev_err(&dev->dev, "cannot request IRQ\n");
409 goto err_clk;
410 }
411
412 pd->dev = &dev->dev;
413 platform_set_drvdata(dev, pd);
414
415 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
416 if (res == NULL) {
417 dev_err(&dev->dev, "cannot find IO resource\n");
418 ret = -ENOENT;
419 goto err_irq;
420 }
421
422 size = (res->end - res->start) + 1;
423
424 pd->reg = ioremap(res->start, size);
425 if (pd->reg == NULL) {
426 dev_err(&dev->dev, "cannot map IO\n");
427 ret = -ENXIO;
428 goto err_irq;
429 }
430
431 /* setup the private data */
432 adap = &pd->adap;
433 i2c_set_adapdata(adap, pd);
434
435 adap->owner = THIS_MODULE;
436 adap->algo = &sh_mobile_i2c_algorithm;
437 adap->dev.parent = &dev->dev;
438 adap->retries = 5;
439 adap->nr = dev->id;
440
441 strlcpy(adap->name, dev->name, sizeof(adap->name));
442
443 sh_mobile_i2c_setup_channel(dev);
444
445 ret = i2c_add_numbered_adapter(adap);
446 if (ret < 0) {
447 dev_err(&dev->dev, "cannot add numbered adapter\n");
448 goto err_all;
449 }
450
451 return 0;
452
453 err_all:
454 iounmap(pd->reg);
455 err_irq:
456 sh_mobile_i2c_hook_irqs(dev, 0);
457 err_clk:
458 clk_put(pd->clk);
459 err:
460 kfree(pd);
461 return ret;
462}
463
464static int sh_mobile_i2c_remove(struct platform_device *dev)
465{
466 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
467
468 i2c_del_adapter(&pd->adap);
469 iounmap(pd->reg);
470 sh_mobile_i2c_hook_irqs(dev, 0);
471 clk_put(pd->clk);
472 kfree(pd);
473 return 0;
474}
475
476static struct platform_driver sh_mobile_i2c_driver = {
477 .driver = {
478 .name = "i2c-sh_mobile",
479 .owner = THIS_MODULE,
480 },
481 .probe = sh_mobile_i2c_probe,
482 .remove = sh_mobile_i2c_remove,
483};
484
485static int __init sh_mobile_i2c_adap_init(void)
486{
487 return platform_driver_register(&sh_mobile_i2c_driver);
488}
489
490static void __exit sh_mobile_i2c_adap_exit(void)
491{
492 platform_driver_unregister(&sh_mobile_i2c_driver);
493}
494
495module_init(sh_mobile_i2c_adap_init);
496module_exit(sh_mobile_i2c_adap_exit);
497
498MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
499MODULE_AUTHOR("Magnus Damm");
500MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-simtec.c b/drivers/i2c/busses/i2c-simtec.c
index 10af8d31e12a..042fda295f3a 100644
--- a/drivers/i2c/busses/i2c-simtec.c
+++ b/drivers/i2c/busses/i2c-simtec.c
@@ -159,6 +159,9 @@ static int simtec_i2c_remove(struct platform_device *dev)
159 159
160/* device driver */ 160/* device driver */
161 161
162/* work with hotplug and coldplug */
163MODULE_ALIAS("platform:simtec-i2c");
164
162static struct platform_driver simtec_i2c_driver = { 165static struct platform_driver simtec_i2c_driver = {
163 .driver = { 166 .driver = {
164 .name = "simtec-i2c", 167 .name = "simtec-i2c",
diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
index 081d9578ce10..4678babd3ce6 100644
--- a/drivers/i2c/busses/i2c-versatile.c
+++ b/drivers/i2c/busses/i2c-versatile.c
@@ -151,3 +151,4 @@ module_exit(i2c_versatile_exit);
151 151
152MODULE_DESCRIPTION("ARM Versatile I2C bus driver"); 152MODULE_DESCRIPTION("ARM Versatile I2C bus driver");
153MODULE_LICENSE("GPL"); 153MODULE_LICENSE("GPL");
154MODULE_ALIAS("platform:versatile-i2c");
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index f5e7a70da831..61abe0f33255 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -527,7 +527,7 @@ static int __init scx200_create_isa(const char *text, unsigned long base,
527 if (iface == NULL) 527 if (iface == NULL)
528 return -ENOMEM; 528 return -ENOMEM;
529 529
530 if (request_region(base, 8, iface->adapter.name) == 0) { 530 if (!request_region(base, 8, iface->adapter.name)) {
531 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n", 531 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n",
532 base, base + 8 - 1); 532 base, base + 8 - 1);
533 rc = -EBUSY; 533 rc = -EBUSY;
diff --git a/drivers/i2c/chips/isp1301_omap.c b/drivers/i2c/chips/isp1301_omap.c
index 2a3160153f54..b1b45dddb17e 100644
--- a/drivers/i2c/chips/isp1301_omap.c
+++ b/drivers/i2c/chips/isp1301_omap.c
@@ -658,7 +658,7 @@ pulldown:
658 OTG_CTRL_REG |= OTG_PULLUP; 658 OTG_CTRL_REG |= OTG_PULLUP;
659 } 659 }
660 660
661 check_state(isp, __FUNCTION__); 661 check_state(isp, __func__);
662 dump_regs(isp, "otg->isp1301"); 662 dump_regs(isp, "otg->isp1301");
663} 663}
664 664
@@ -782,7 +782,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp)
782 if (otg_ctrl & OTG_DRIVER_SEL) { 782 if (otg_ctrl & OTG_DRIVER_SEL) {
783 switch (isp->otg.state) { 783 switch (isp->otg.state) {
784 case OTG_STATE_A_IDLE: 784 case OTG_STATE_A_IDLE:
785 b_idle(isp, __FUNCTION__); 785 b_idle(isp, __func__);
786 break; 786 break;
787 default: 787 default:
788 break; 788 break;
@@ -826,7 +826,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp)
826 isp->otg.host->otg_port); 826 isp->otg.host->otg_port);
827 } 827 }
828 828
829 check_state(isp, __FUNCTION__); 829 check_state(isp, __func__);
830 return ret; 830 return ret;
831} 831}
832 832
@@ -837,7 +837,7 @@ static int otg_init(struct isp1301 *isp)
837 if (!otg_dev) 837 if (!otg_dev)
838 return -ENODEV; 838 return -ENODEV;
839 839
840 dump_regs(isp, __FUNCTION__); 840 dump_regs(isp, __func__);
841 /* some of these values are board-specific... */ 841 /* some of these values are board-specific... */
842 OTG_SYSCON_2_REG |= OTG_EN 842 OTG_SYSCON_2_REG |= OTG_EN
843 /* for B-device: */ 843 /* for B-device: */
@@ -853,9 +853,9 @@ static int otg_init(struct isp1301 *isp)
853 update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE)); 853 update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE));
854 update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS)); 854 update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
855 855
856 check_state(isp, __FUNCTION__); 856 check_state(isp, __func__);
857 pr_debug("otg: %s, %s %06x\n", 857 pr_debug("otg: %s, %s %06x\n",
858 state_name(isp), __FUNCTION__, OTG_CTRL_REG); 858 state_name(isp), __func__, OTG_CTRL_REG);
859 859
860 OTG_IRQ_EN_REG = DRIVER_SWITCH | OPRT_CHG 860 OTG_IRQ_EN_REG = DRIVER_SWITCH | OPRT_CHG
861 | B_SRP_TMROUT | B_HNP_FAIL 861 | B_SRP_TMROUT | B_HNP_FAIL
@@ -1041,11 +1041,11 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat)
1041 OTG1_DP_PULLDOWN); 1041 OTG1_DP_PULLDOWN);
1042 isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, 1042 isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1,
1043 OTG1_DP_PULLUP); 1043 OTG1_DP_PULLUP);
1044 dump_regs(isp, __FUNCTION__); 1044 dump_regs(isp, __func__);
1045#endif 1045#endif
1046 /* FALLTHROUGH */ 1046 /* FALLTHROUGH */
1047 case OTG_STATE_B_SRP_INIT: 1047 case OTG_STATE_B_SRP_INIT:
1048 b_idle(isp, __FUNCTION__); 1048 b_idle(isp, __func__);
1049 OTG_CTRL_REG &= OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; 1049 OTG_CTRL_REG &= OTG_CTRL_REG & OTG_XCEIV_OUTPUTS;
1050 /* FALLTHROUGH */ 1050 /* FALLTHROUGH */
1051 case OTG_STATE_B_IDLE: 1051 case OTG_STATE_B_IDLE:
@@ -1077,7 +1077,7 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat)
1077 */ 1077 */
1078 update_otg1(isp, isp_stat); 1078 update_otg1(isp, isp_stat);
1079 update_otg2(isp, isp_bstat); 1079 update_otg2(isp, isp_bstat);
1080 check_state(isp, __FUNCTION__); 1080 check_state(isp, __func__);
1081#endif 1081#endif
1082 1082
1083 dump_regs(isp, "isp1301->otg"); 1083 dump_regs(isp, "isp1301->otg");
@@ -1310,7 +1310,7 @@ isp1301_set_host(struct otg_transceiver *otg, struct usb_bus *host)
1310 */ 1310 */
1311 isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_VBUS_DRV); 1311 isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_VBUS_DRV);
1312 1312
1313 dump_regs(isp, __FUNCTION__); 1313 dump_regs(isp, __func__);
1314 1314
1315 return 0; 1315 return 0;
1316 1316
@@ -1365,7 +1365,7 @@ isp1301_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget)
1365 isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING, 1365 isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
1366 INTR_VBUS_VLD); 1366 INTR_VBUS_VLD);
1367 dev_info(&isp->client.dev, "B-Peripheral sessions ok\n"); 1367 dev_info(&isp->client.dev, "B-Peripheral sessions ok\n");
1368 dump_regs(isp, __FUNCTION__); 1368 dump_regs(isp, __func__);
1369 1369
1370 /* If this has a Mini-AB connector, this mode is highly 1370 /* If this has a Mini-AB connector, this mode is highly
1371 * nonstandard ... but can be handy for testing, so long 1371 * nonstandard ... but can be handy for testing, so long
@@ -1416,7 +1416,7 @@ isp1301_start_srp(struct otg_transceiver *dev)
1416 1416
1417 pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), OTG_CTRL_REG); 1417 pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), OTG_CTRL_REG);
1418#ifdef CONFIG_USB_OTG 1418#ifdef CONFIG_USB_OTG
1419 check_state(isp, __FUNCTION__); 1419 check_state(isp, __func__);
1420#endif 1420#endif
1421 return 0; 1421 return 0;
1422} 1422}
@@ -1463,7 +1463,7 @@ isp1301_start_hnp(struct otg_transceiver *dev)
1463 } 1463 }
1464 pr_debug("otg: HNP %s, %06x ...\n", 1464 pr_debug("otg: HNP %s, %06x ...\n",
1465 state_name(isp), OTG_CTRL_REG); 1465 state_name(isp), OTG_CTRL_REG);
1466 check_state(isp, __FUNCTION__); 1466 check_state(isp, __func__);
1467 return 0; 1467 return 0;
1468#else 1468#else
1469 /* srp-only */ 1469 /* srp-only */
@@ -1601,7 +1601,7 @@ fail2:
1601 update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS)); 1601 update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
1602#endif 1602#endif
1603 1603
1604 dump_regs(isp, __FUNCTION__); 1604 dump_regs(isp, __func__);
1605 1605
1606#ifdef VERBOSE 1606#ifdef VERBOSE
1607 mod_timer(&isp->timer, jiffies + TIMER_JIFFIES); 1607 mod_timer(&isp->timer, jiffies + TIMER_JIFFIES);
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index e186df657119..6c7fa8d53c0e 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -1506,7 +1506,7 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1506 read_write = I2C_SMBUS_READ; 1506 read_write = I2C_SMBUS_READ;
1507 if (data->block[0] > I2C_SMBUS_BLOCK_MAX) { 1507 if (data->block[0] > I2C_SMBUS_BLOCK_MAX) {
1508 dev_err(&adapter->dev, "%s called with invalid " 1508 dev_err(&adapter->dev, "%s called with invalid "
1509 "block proc call size (%d)\n", __FUNCTION__, 1509 "block proc call size (%d)\n", __func__,
1510 data->block[0]); 1510 data->block[0]);
1511 return -1; 1511 return -1;
1512 } 1512 }
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index 393e679d9faa..d34c14c81c29 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -200,16 +200,176 @@ static int i2cdev_check_addr(struct i2c_adapter *adapter, unsigned int addr)
200 return device_for_each_child(&adapter->dev, &addr, i2cdev_check); 200 return device_for_each_child(&adapter->dev, &addr, i2cdev_check);
201} 201}
202 202
203static int i2cdev_ioctl(struct inode *inode, struct file *file, 203static noinline int i2cdev_ioctl_rdrw(struct i2c_client *client,
204 unsigned int cmd, unsigned long arg) 204 unsigned long arg)
205{ 205{
206 struct i2c_client *client = (struct i2c_client *)file->private_data;
207 struct i2c_rdwr_ioctl_data rdwr_arg; 206 struct i2c_rdwr_ioctl_data rdwr_arg;
208 struct i2c_smbus_ioctl_data data_arg;
209 union i2c_smbus_data temp;
210 struct i2c_msg *rdwr_pa; 207 struct i2c_msg *rdwr_pa;
211 u8 __user **data_ptrs; 208 u8 __user **data_ptrs;
212 int i,datasize,res; 209 int i, res;
210
211 if (copy_from_user(&rdwr_arg,
212 (struct i2c_rdwr_ioctl_data __user *)arg,
213 sizeof(rdwr_arg)))
214 return -EFAULT;
215
216 /* Put an arbitrary limit on the number of messages that can
217 * be sent at once */
218 if (rdwr_arg.nmsgs > I2C_RDRW_IOCTL_MAX_MSGS)
219 return -EINVAL;
220
221 rdwr_pa = (struct i2c_msg *)
222 kmalloc(rdwr_arg.nmsgs * sizeof(struct i2c_msg),
223 GFP_KERNEL);
224 if (!rdwr_pa)
225 return -ENOMEM;
226
227 if (copy_from_user(rdwr_pa, rdwr_arg.msgs,
228 rdwr_arg.nmsgs * sizeof(struct i2c_msg))) {
229 kfree(rdwr_pa);
230 return -EFAULT;
231 }
232
233 data_ptrs = kmalloc(rdwr_arg.nmsgs * sizeof(u8 __user *), GFP_KERNEL);
234 if (data_ptrs == NULL) {
235 kfree(rdwr_pa);
236 return -ENOMEM;
237 }
238
239 res = 0;
240 for (i = 0; i < rdwr_arg.nmsgs; i++) {
241 /* Limit the size of the message to a sane amount;
242 * and don't let length change either. */
243 if ((rdwr_pa[i].len > 8192) ||
244 (rdwr_pa[i].flags & I2C_M_RECV_LEN)) {
245 res = -EINVAL;
246 break;
247 }
248 data_ptrs[i] = (u8 __user *)rdwr_pa[i].buf;
249 rdwr_pa[i].buf = kmalloc(rdwr_pa[i].len, GFP_KERNEL);
250 if (rdwr_pa[i].buf == NULL) {
251 res = -ENOMEM;
252 break;
253 }
254 if (copy_from_user(rdwr_pa[i].buf, data_ptrs[i],
255 rdwr_pa[i].len)) {
256 ++i; /* Needs to be kfreed too */
257 res = -EFAULT;
258 break;
259 }
260 }
261 if (res < 0) {
262 int j;
263 for (j = 0; j < i; ++j)
264 kfree(rdwr_pa[j].buf);
265 kfree(data_ptrs);
266 kfree(rdwr_pa);
267 return res;
268 }
269
270 res = i2c_transfer(client->adapter, rdwr_pa, rdwr_arg.nmsgs);
271 while (i-- > 0) {
272 if (res >= 0 && (rdwr_pa[i].flags & I2C_M_RD)) {
273 if (copy_to_user(data_ptrs[i], rdwr_pa[i].buf,
274 rdwr_pa[i].len))
275 res = -EFAULT;
276 }
277 kfree(rdwr_pa[i].buf);
278 }
279 kfree(data_ptrs);
280 kfree(rdwr_pa);
281 return res;
282}
283
284static noinline int i2cdev_ioctl_smbus(struct i2c_client *client,
285 unsigned long arg)
286{
287 struct i2c_smbus_ioctl_data data_arg;
288 union i2c_smbus_data temp;
289 int datasize, res;
290
291 if (copy_from_user(&data_arg,
292 (struct i2c_smbus_ioctl_data __user *) arg,
293 sizeof(struct i2c_smbus_ioctl_data)))
294 return -EFAULT;
295 if ((data_arg.size != I2C_SMBUS_BYTE) &&
296 (data_arg.size != I2C_SMBUS_QUICK) &&
297 (data_arg.size != I2C_SMBUS_BYTE_DATA) &&
298 (data_arg.size != I2C_SMBUS_WORD_DATA) &&
299 (data_arg.size != I2C_SMBUS_PROC_CALL) &&
300 (data_arg.size != I2C_SMBUS_BLOCK_DATA) &&
301 (data_arg.size != I2C_SMBUS_I2C_BLOCK_BROKEN) &&
302 (data_arg.size != I2C_SMBUS_I2C_BLOCK_DATA) &&
303 (data_arg.size != I2C_SMBUS_BLOCK_PROC_CALL)) {
304 dev_dbg(&client->adapter->dev,
305 "size out of range (%x) in ioctl I2C_SMBUS.\n",
306 data_arg.size);
307 return -EINVAL;
308 }
309 /* Note that I2C_SMBUS_READ and I2C_SMBUS_WRITE are 0 and 1,
310 so the check is valid if size==I2C_SMBUS_QUICK too. */
311 if ((data_arg.read_write != I2C_SMBUS_READ) &&
312 (data_arg.read_write != I2C_SMBUS_WRITE)) {
313 dev_dbg(&client->adapter->dev,
314 "read_write out of range (%x) in ioctl I2C_SMBUS.\n",
315 data_arg.read_write);
316 return -EINVAL;
317 }
318
319 /* Note that command values are always valid! */
320
321 if ((data_arg.size == I2C_SMBUS_QUICK) ||
322 ((data_arg.size == I2C_SMBUS_BYTE) &&
323 (data_arg.read_write == I2C_SMBUS_WRITE)))
324 /* These are special: we do not use data */
325 return i2c_smbus_xfer(client->adapter, client->addr,
326 client->flags, data_arg.read_write,
327 data_arg.command, data_arg.size, NULL);
328
329 if (data_arg.data == NULL) {
330 dev_dbg(&client->adapter->dev,
331 "data is NULL pointer in ioctl I2C_SMBUS.\n");
332 return -EINVAL;
333 }
334
335 if ((data_arg.size == I2C_SMBUS_BYTE_DATA) ||
336 (data_arg.size == I2C_SMBUS_BYTE))
337 datasize = sizeof(data_arg.data->byte);
338 else if ((data_arg.size == I2C_SMBUS_WORD_DATA) ||
339 (data_arg.size == I2C_SMBUS_PROC_CALL))
340 datasize = sizeof(data_arg.data->word);
341 else /* size == smbus block, i2c block, or block proc. call */
342 datasize = sizeof(data_arg.data->block);
343
344 if ((data_arg.size == I2C_SMBUS_PROC_CALL) ||
345 (data_arg.size == I2C_SMBUS_BLOCK_PROC_CALL) ||
346 (data_arg.size == I2C_SMBUS_I2C_BLOCK_DATA) ||
347 (data_arg.read_write == I2C_SMBUS_WRITE)) {
348 if (copy_from_user(&temp, data_arg.data, datasize))
349 return -EFAULT;
350 }
351 if (data_arg.size == I2C_SMBUS_I2C_BLOCK_BROKEN) {
352 /* Convert old I2C block commands to the new
353 convention. This preserves binary compatibility. */
354 data_arg.size = I2C_SMBUS_I2C_BLOCK_DATA;
355 if (data_arg.read_write == I2C_SMBUS_READ)
356 temp.block[0] = I2C_SMBUS_BLOCK_MAX;
357 }
358 res = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
359 data_arg.read_write, data_arg.command, data_arg.size, &temp);
360 if (!res && ((data_arg.size == I2C_SMBUS_PROC_CALL) ||
361 (data_arg.size == I2C_SMBUS_BLOCK_PROC_CALL) ||
362 (data_arg.read_write == I2C_SMBUS_READ))) {
363 if (copy_to_user(data_arg.data, &temp, datasize))
364 return -EFAULT;
365 }
366 return res;
367}
368
369static int i2cdev_ioctl(struct inode *inode, struct file *file,
370 unsigned int cmd, unsigned long arg)
371{
372 struct i2c_client *client = (struct i2c_client *)file->private_data;
213 unsigned long funcs; 373 unsigned long funcs;
214 374
215 dev_dbg(&client->adapter->dev, "ioctl, cmd=0x%02x, arg=0x%02lx\n", 375 dev_dbg(&client->adapter->dev, "ioctl, cmd=0x%02x, arg=0x%02lx\n",
@@ -253,164 +413,11 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
253 return put_user(funcs, (unsigned long __user *)arg); 413 return put_user(funcs, (unsigned long __user *)arg);
254 414
255 case I2C_RDWR: 415 case I2C_RDWR:
256 if (copy_from_user(&rdwr_arg, 416 return i2cdev_ioctl_rdrw(client, arg);
257 (struct i2c_rdwr_ioctl_data __user *)arg,
258 sizeof(rdwr_arg)))
259 return -EFAULT;
260
261 /* Put an arbitrary limit on the number of messages that can
262 * be sent at once */
263 if (rdwr_arg.nmsgs > I2C_RDRW_IOCTL_MAX_MSGS)
264 return -EINVAL;
265
266 rdwr_pa = (struct i2c_msg *)
267 kmalloc(rdwr_arg.nmsgs * sizeof(struct i2c_msg),
268 GFP_KERNEL);
269
270 if (rdwr_pa == NULL) return -ENOMEM;
271
272 if (copy_from_user(rdwr_pa, rdwr_arg.msgs,
273 rdwr_arg.nmsgs * sizeof(struct i2c_msg))) {
274 kfree(rdwr_pa);
275 return -EFAULT;
276 }
277
278 data_ptrs = kmalloc(rdwr_arg.nmsgs * sizeof(u8 __user *), GFP_KERNEL);
279 if (data_ptrs == NULL) {
280 kfree(rdwr_pa);
281 return -ENOMEM;
282 }
283
284 res = 0;
285 for( i=0; i<rdwr_arg.nmsgs; i++ ) {
286 /* Limit the size of the message to a sane amount;
287 * and don't let length change either. */
288 if ((rdwr_pa[i].len > 8192) ||
289 (rdwr_pa[i].flags & I2C_M_RECV_LEN)) {
290 res = -EINVAL;
291 break;
292 }
293 data_ptrs[i] = (u8 __user *)rdwr_pa[i].buf;
294 rdwr_pa[i].buf = kmalloc(rdwr_pa[i].len, GFP_KERNEL);
295 if(rdwr_pa[i].buf == NULL) {
296 res = -ENOMEM;
297 break;
298 }
299 if(copy_from_user(rdwr_pa[i].buf,
300 data_ptrs[i],
301 rdwr_pa[i].len)) {
302 ++i; /* Needs to be kfreed too */
303 res = -EFAULT;
304 break;
305 }
306 }
307 if (res < 0) {
308 int j;
309 for (j = 0; j < i; ++j)
310 kfree(rdwr_pa[j].buf);
311 kfree(data_ptrs);
312 kfree(rdwr_pa);
313 return res;
314 }
315
316 res = i2c_transfer(client->adapter,
317 rdwr_pa,
318 rdwr_arg.nmsgs);
319 while(i-- > 0) {
320 if( res>=0 && (rdwr_pa[i].flags & I2C_M_RD)) {
321 if(copy_to_user(
322 data_ptrs[i],
323 rdwr_pa[i].buf,
324 rdwr_pa[i].len)) {
325 res = -EFAULT;
326 }
327 }
328 kfree(rdwr_pa[i].buf);
329 }
330 kfree(data_ptrs);
331 kfree(rdwr_pa);
332 return res;
333 417
334 case I2C_SMBUS: 418 case I2C_SMBUS:
335 if (copy_from_user(&data_arg, 419 return i2cdev_ioctl_smbus(client, arg);
336 (struct i2c_smbus_ioctl_data __user *) arg,
337 sizeof(struct i2c_smbus_ioctl_data)))
338 return -EFAULT;
339 if ((data_arg.size != I2C_SMBUS_BYTE) &&
340 (data_arg.size != I2C_SMBUS_QUICK) &&
341 (data_arg.size != I2C_SMBUS_BYTE_DATA) &&
342 (data_arg.size != I2C_SMBUS_WORD_DATA) &&
343 (data_arg.size != I2C_SMBUS_PROC_CALL) &&
344 (data_arg.size != I2C_SMBUS_BLOCK_DATA) &&
345 (data_arg.size != I2C_SMBUS_I2C_BLOCK_BROKEN) &&
346 (data_arg.size != I2C_SMBUS_I2C_BLOCK_DATA) &&
347 (data_arg.size != I2C_SMBUS_BLOCK_PROC_CALL)) {
348 dev_dbg(&client->adapter->dev,
349 "size out of range (%x) in ioctl I2C_SMBUS.\n",
350 data_arg.size);
351 return -EINVAL;
352 }
353 /* Note that I2C_SMBUS_READ and I2C_SMBUS_WRITE are 0 and 1,
354 so the check is valid if size==I2C_SMBUS_QUICK too. */
355 if ((data_arg.read_write != I2C_SMBUS_READ) &&
356 (data_arg.read_write != I2C_SMBUS_WRITE)) {
357 dev_dbg(&client->adapter->dev,
358 "read_write out of range (%x) in ioctl I2C_SMBUS.\n",
359 data_arg.read_write);
360 return -EINVAL;
361 }
362
363 /* Note that command values are always valid! */
364
365 if ((data_arg.size == I2C_SMBUS_QUICK) ||
366 ((data_arg.size == I2C_SMBUS_BYTE) &&
367 (data_arg.read_write == I2C_SMBUS_WRITE)))
368 /* These are special: we do not use data */
369 return i2c_smbus_xfer(client->adapter, client->addr,
370 client->flags,
371 data_arg.read_write,
372 data_arg.command,
373 data_arg.size, NULL);
374
375 if (data_arg.data == NULL) {
376 dev_dbg(&client->adapter->dev,
377 "data is NULL pointer in ioctl I2C_SMBUS.\n");
378 return -EINVAL;
379 }
380 420
381 if ((data_arg.size == I2C_SMBUS_BYTE_DATA) ||
382 (data_arg.size == I2C_SMBUS_BYTE))
383 datasize = sizeof(data_arg.data->byte);
384 else if ((data_arg.size == I2C_SMBUS_WORD_DATA) ||
385 (data_arg.size == I2C_SMBUS_PROC_CALL))
386 datasize = sizeof(data_arg.data->word);
387 else /* size == smbus block, i2c block, or block proc. call */
388 datasize = sizeof(data_arg.data->block);
389
390 if ((data_arg.size == I2C_SMBUS_PROC_CALL) ||
391 (data_arg.size == I2C_SMBUS_BLOCK_PROC_CALL) ||
392 (data_arg.size == I2C_SMBUS_I2C_BLOCK_DATA) ||
393 (data_arg.read_write == I2C_SMBUS_WRITE)) {
394 if (copy_from_user(&temp, data_arg.data, datasize))
395 return -EFAULT;
396 }
397 if (data_arg.size == I2C_SMBUS_I2C_BLOCK_BROKEN) {
398 /* Convert old I2C block commands to the new
399 convention. This preserves binary compatibility. */
400 data_arg.size = I2C_SMBUS_I2C_BLOCK_DATA;
401 if (data_arg.read_write == I2C_SMBUS_READ)
402 temp.block[0] = I2C_SMBUS_BLOCK_MAX;
403 }
404 res = i2c_smbus_xfer(client->adapter,client->addr,client->flags,
405 data_arg.read_write,
406 data_arg.command,data_arg.size,&temp);
407 if (! res && ((data_arg.size == I2C_SMBUS_PROC_CALL) ||
408 (data_arg.size == I2C_SMBUS_BLOCK_PROC_CALL) ||
409 (data_arg.read_write == I2C_SMBUS_READ))) {
410 if (copy_to_user(data_arg.data, &temp, datasize))
411 return -EFAULT;
412 }
413 return res;
414 case I2C_RETRIES: 421 case I2C_RETRIES:
415 client->adapter->retries = arg; 422 client->adapter->retries = arg;
416 break; 423 break;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 15:27:52 -0500