23 files changed, 764 insertions, 314 deletions

diff --git a/drivers/char/agp/Kconfig b/drivers/char/agp/Kconfig
index 7c88c060a9e6..46685a540772 100644
--- a/drivers/char/agp/Kconfig
+++ b/drivers/char/agp/Kconfig
@@ -1,7 +1,6 @@
 config AGP
-        tristate "/dev/agpgart (AGP Support)" if !GART_IOMMU
+        tristate "/dev/agpgart (AGP Support)"
         depends on ALPHA || IA64 || PPC || X86
-        default y if GART_IOMMU
         ---help---
           AGP (Accelerated Graphics Port) is a bus system mainly used to
           connect graphics cards to the rest of the system.
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index e1feb58bd661..1a2b9785e998 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -2120,7 +2120,7 @@ abort_linearize:
                 goto drop;
         }
 
-        if (skb_linearize(skb, GFP_ATOMIC))
+        if (skb_linearize(skb))
                 goto drop;
 
         mgp->tx_linearized++;
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 6707df968934..f2d152b818f0 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -26,7 +26,11 @@ obj-$(CONFIG_PPC32) += setup-irq.o
 obj-$(CONFIG_PPC64) += setup-bus.o
 obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
 obj-$(CONFIG_X86_VISWS) += setup-irq.o
-obj-$(CONFIG_PCI_MSI) += msi.o
+
+msiobj-y := msi.o msi-apic.o
+msiobj-$(CONFIG_IA64_GENERIC) += msi-altix.o
+msiobj-$(CONFIG_IA64_SGI_SN2) += msi-altix.o
+obj-$(CONFIG_PCI_MSI) += $(msiobj-y)
 
 #
 # ACPI Related PCI FW Functions
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index eed67d9e73bc..723092682023 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -81,9 +81,9 @@ void __devinit pci_bus_add_device(struct pci_dev *dev)
 {
         device_add(&dev->dev);
 
-        spin_lock(&pci_bus_lock);
+        down_write(&pci_bus_sem);
         list_add_tail(&dev->global_list, &pci_devices);
-        spin_unlock(&pci_bus_lock);
+        up_write(&pci_bus_sem);
 
         pci_proc_attach_device(dev);
         pci_create_sysfs_dev_files(dev);
@@ -125,10 +125,10 @@ void __devinit pci_bus_add_devices(struct pci_bus *bus)
                  */
                 if (dev->subordinate) {
                        if (list_empty(&dev->subordinate->node)) {
-                               spin_lock(&pci_bus_lock);
+                               down_write(&pci_bus_sem);
                                list_add_tail(&dev->subordinate->node,
                                                &dev->bus->children);
-                               spin_unlock(&pci_bus_lock);
+                               up_write(&pci_bus_sem);
                        }
                         pci_bus_add_devices(dev->subordinate);
 
@@ -168,7 +168,7 @@ void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
         struct list_head *next;
 
         bus = top;
-        spin_lock(&pci_bus_lock);
+        down_read(&pci_bus_sem);
         next = top->devices.next;
         for (;;) {
                 if (next == &bus->devices) {
@@ -180,22 +180,19 @@ void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
                         continue;
                 }
                 dev = list_entry(next, struct pci_dev, bus_list);
-                pci_dev_get(dev);
                 if (dev->subordinate) {
                         /* this is a pci-pci bridge, do its devices next */
                         next = dev->subordinate->devices.next;
                         bus = dev->subordinate;
                 } else
                         next = dev->bus_list.next;
-                spin_unlock(&pci_bus_lock);
 
-                /* Run device routines with the bus unlocked */
+                /* Run device routines with the device locked */
+                down(&dev->dev.sem);
                 cb(dev, userdata);
-
-                spin_lock(&pci_bus_lock);
-                pci_dev_put(dev);
+                up(&dev->dev.sem);
         }
-        spin_unlock(&pci_bus_lock);
+        up_read(&pci_bus_sem);
 }
 EXPORT_SYMBOL_GPL(pci_walk_bus);
 
diff --git a/drivers/pci/msi-altix.c b/drivers/pci/msi-altix.c
new file mode 100644
index 000000000000..bed4183a5e39
--- /dev/null
+++ b/drivers/pci/msi-altix.c
@@ -0,0 +1,210 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006 Silicon Graphics, Inc.  All Rights Reserved.
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/cpumask.h>
+
+#include <asm/sn/addrs.h>
+#include <asm/sn/intr.h>
+#include <asm/sn/pcibus_provider_defs.h>
+#include <asm/sn/pcidev.h>
+#include <asm/sn/nodepda.h>
+
+#include "msi.h"
+
+struct sn_msi_info {
+        u64 pci_addr;
+        struct sn_irq_info *sn_irq_info;
+};
+
+static struct sn_msi_info *sn_msi_info;
+
+static void
+sn_msi_teardown(unsigned int vector)
+{
+        nasid_t nasid;
+        int widget;
+        struct pci_dev *pdev;
+        struct pcidev_info *sn_pdev;
+        struct sn_irq_info *sn_irq_info;
+        struct pcibus_bussoft *bussoft;
+        struct sn_pcibus_provider *provider;
+
+        sn_irq_info = sn_msi_info[vector].sn_irq_info;
+        if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
+                return;
+
+        sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
+        pdev = sn_pdev->pdi_linux_pcidev;
+        provider = SN_PCIDEV_BUSPROVIDER(pdev);
+
+        (*provider->dma_unmap)(pdev,
+                               sn_msi_info[vector].pci_addr,
+                               PCI_DMA_FROMDEVICE);
+        sn_msi_info[vector].pci_addr = 0;
+
+        bussoft = SN_PCIDEV_BUSSOFT(pdev);
+        nasid = NASID_GET(bussoft->bs_base);
+        widget = (nasid & 1) ?
+                        TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
+                        SWIN_WIDGETNUM(bussoft->bs_base);
+
+        sn_intr_free(nasid, widget, sn_irq_info);
+        sn_msi_info[vector].sn_irq_info = NULL;
+
+        return;
+}
+
+int
+sn_msi_setup(struct pci_dev *pdev, unsigned int vector,
+             u32 *addr_hi, u32 *addr_lo, u32 *data)
+{
+        int widget;
+        int status;
+        nasid_t nasid;
+        u64 bus_addr;
+        struct sn_irq_info *sn_irq_info;
+        struct pcibus_bussoft *bussoft = SN_PCIDEV_BUSSOFT(pdev);
+        struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
+
+        if (bussoft == NULL)
+                return -EINVAL;
+
+        if (provider == NULL || provider->dma_map_consistent == NULL)
+                return -EINVAL;
+
+        /*
+         * Set up the vector plumbing.  Let the prom (via sn_intr_alloc)
+         * decide which cpu to direct this msi at by default.
+         */
+
+        nasid = NASID_GET(bussoft->bs_base);
+        widget = (nasid & 1) ?
+                        TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
+                        SWIN_WIDGETNUM(bussoft->bs_base);
+
+        sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
+        if (! sn_irq_info)
+                return -ENOMEM;
+
+        status = sn_intr_alloc(nasid, widget, sn_irq_info, vector, -1, -1);
+        if (status) {
+                kfree(sn_irq_info);
+                return -ENOMEM;
+        }
+
+        sn_irq_info->irq_int_bit = -1;          /* mark this as an MSI irq */
+        sn_irq_fixup(pdev, sn_irq_info);
+
+        /* Prom probably should fill these in, but doesn't ... */
+        sn_irq_info->irq_bridge_type = bussoft->bs_asic_type;
+        sn_irq_info->irq_bridge = (void *)bussoft->bs_base;
+
+        /*
+         * Map the xio address into bus space
+         */
+        bus_addr = (*provider->dma_map_consistent)(pdev,
+                                        sn_irq_info->irq_xtalkaddr,
+                                        sizeof(sn_irq_info->irq_xtalkaddr),
+                                        SN_DMA_MSI|SN_DMA_ADDR_XIO);
+        if (! bus_addr) {
+                sn_intr_free(nasid, widget, sn_irq_info);
+                kfree(sn_irq_info);
+                return -ENOMEM;
+        }
+
+        sn_msi_info[vector].sn_irq_info = sn_irq_info;
+        sn_msi_info[vector].pci_addr = bus_addr;
+
+        *addr_hi = (u32)(bus_addr >> 32);
+        *addr_lo = (u32)(bus_addr & 0x00000000ffffffff);
+
+        /*
+         * In the SN platform, bit 16 is a "send vector" bit which
+         * must be present in order to move the vector through the system.
+         */
+        *data = 0x100 + (unsigned int)vector;
+
+#ifdef CONFIG_SMP
+        set_irq_affinity_info((vector & 0xff), sn_irq_info->irq_cpuid, 0);
+#endif
+
+        return 0;
+}
+
+static void
+sn_msi_target(unsigned int vector, unsigned int cpu,
+              u32 *addr_hi, u32 *addr_lo)
+{
+        int slice;
+        nasid_t nasid;
+        u64 bus_addr;
+        struct pci_dev *pdev;
+        struct pcidev_info *sn_pdev;
+        struct sn_irq_info *sn_irq_info;
+        struct sn_irq_info *new_irq_info;
+        struct sn_pcibus_provider *provider;
+
+        sn_irq_info = sn_msi_info[vector].sn_irq_info;
+        if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
+                return;
+
+        /*
+         * Release XIO resources for the old MSI PCI address
+         */
+
+        sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
+        pdev = sn_pdev->pdi_linux_pcidev;
+        provider = SN_PCIDEV_BUSPROVIDER(pdev);
+
+        bus_addr = (u64)(*addr_hi) << 32 | (u64)(*addr_lo);
+        (*provider->dma_unmap)(pdev, bus_addr, PCI_DMA_FROMDEVICE);
+        sn_msi_info[vector].pci_addr = 0;
+
+        nasid = cpuid_to_nasid(cpu);
+        slice = cpuid_to_slice(cpu);
+
+        new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
+        sn_msi_info[vector].sn_irq_info = new_irq_info;
+        if (new_irq_info == NULL)
+                return;
+
+        /*
+         * Map the xio address into bus space
+         */
+
+        bus_addr = (*provider->dma_map_consistent)(pdev,
+                                        new_irq_info->irq_xtalkaddr,
+                                        sizeof(new_irq_info->irq_xtalkaddr),
+                                        SN_DMA_MSI|SN_DMA_ADDR_XIO);
+
+        sn_msi_info[vector].pci_addr = bus_addr;
+        *addr_hi = (u32)(bus_addr >> 32);
+        *addr_lo = (u32)(bus_addr & 0x00000000ffffffff);
+}
+
+struct msi_ops sn_msi_ops = {
+        .setup = sn_msi_setup,
+        .teardown = sn_msi_teardown,
+#ifdef CONFIG_SMP
+        .target = sn_msi_target,
+#endif
+};
+
+int
+sn_msi_init(void)
+{
+        sn_msi_info =
+                kzalloc(sizeof(struct sn_msi_info) * NR_VECTORS, GFP_KERNEL);
+        if (! sn_msi_info)
+                return -ENOMEM;
+
+        msi_register(&sn_msi_ops);
+        return 0;
+}
diff --git a/drivers/pci/msi-apic.c b/drivers/pci/msi-apic.c
new file mode 100644
index 000000000000..0eb5fe9003a2
--- /dev/null
+++ b/drivers/pci/msi-apic.c
@@ -0,0 +1,100 @@
+/*
+ * MSI hooks for standard x86 apic
+ */
+
+#include <linux/pci.h>
+#include <linux/irq.h>
+
+#include "msi.h"
+
+/*
+ * Shifts for APIC-based data
+ */
+
+#define MSI_DATA_VECTOR_SHIFT           0
+#define     MSI_DATA_VECTOR(v)          (((u8)v) << MSI_DATA_VECTOR_SHIFT)
+
+#define MSI_DATA_DELIVERY_SHIFT         8
+#define     MSI_DATA_DELIVERY_FIXED     (0 << MSI_DATA_DELIVERY_SHIFT)
+#define     MSI_DATA_DELIVERY_LOWPRI    (1 << MSI_DATA_DELIVERY_SHIFT)
+
+#define MSI_DATA_LEVEL_SHIFT            14
+#define     MSI_DATA_LEVEL_DEASSERT     (0 << MSI_DATA_LEVEL_SHIFT)
+#define     MSI_DATA_LEVEL_ASSERT       (1 << MSI_DATA_LEVEL_SHIFT)
+
+#define MSI_DATA_TRIGGER_SHIFT          15
+#define     MSI_DATA_TRIGGER_EDGE       (0 << MSI_DATA_TRIGGER_SHIFT)
+#define     MSI_DATA_TRIGGER_LEVEL      (1 << MSI_DATA_TRIGGER_SHIFT)
+
+/*
+ * Shift/mask fields for APIC-based bus address
+ */
+
+#define MSI_ADDR_HEADER                 0xfee00000
+
+#define MSI_ADDR_DESTID_MASK            0xfff0000f
+#define     MSI_ADDR_DESTID_CPU(cpu)    ((cpu) << MSI_TARGET_CPU_SHIFT)
+
+#define MSI_ADDR_DESTMODE_SHIFT         2
+#define     MSI_ADDR_DESTMODE_PHYS      (0 << MSI_ADDR_DESTMODE_SHIFT)
+#define     MSI_ADDR_DESTMODE_LOGIC     (1 << MSI_ADDR_DESTMODE_SHIFT)
+
+#define MSI_ADDR_REDIRECTION_SHIFT      3
+#define     MSI_ADDR_REDIRECTION_CPU    (0 << MSI_ADDR_REDIRECTION_SHIFT)
+#define     MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
+
+
+static void
+msi_target_apic(unsigned int vector,
+                unsigned int dest_cpu,
+                u32 *address_hi,        /* in/out */
+                u32 *address_lo)        /* in/out */
+{
+        u32 addr = *address_lo;
+
+        addr &= MSI_ADDR_DESTID_MASK;
+        addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(dest_cpu));
+
+        *address_lo = addr;
+}
+
+static int
+msi_setup_apic(struct pci_dev *pdev,    /* unused in generic */
+                unsigned int vector,
+                u32 *address_hi,
+                u32 *address_lo,
+                u32 *data)
+{
+        unsigned long   dest_phys_id;
+
+        dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map));
+
+        *address_hi = 0;
+        *address_lo =   MSI_ADDR_HEADER |
+                        MSI_ADDR_DESTMODE_PHYS |
+                        MSI_ADDR_REDIRECTION_CPU |
+                        MSI_ADDR_DESTID_CPU(dest_phys_id);
+
+        *data = MSI_DATA_TRIGGER_EDGE |
+                MSI_DATA_LEVEL_ASSERT |
+                MSI_DATA_DELIVERY_FIXED |
+                MSI_DATA_VECTOR(vector);
+
+        return 0;
+}
+
+static void
+msi_teardown_apic(unsigned int vector)
+{
+        return;         /* no-op */
+}
+
+/*
+ * Generic ops used on most IA archs/platforms.  Set with msi_register()
+ */
+
+struct msi_ops msi_apic_ops = {
+        .setup = msi_setup_apic,
+        .teardown = msi_teardown_apic,
+        .target = msi_target_apic,
+};
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 9855c4c920b8..7f8429284fab 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -23,8 +23,6 @@
 #include "pci.h"
 #include "msi.h"
 
-#define MSI_TARGET_CPU          first_cpu(cpu_online_map)
-
 static DEFINE_SPINLOCK(msi_lock);
 static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL };
 static kmem_cache_t* msi_cachep;
@@ -37,9 +35,17 @@ static int nr_msix_devices;
 
 #ifndef CONFIG_X86_IO_APIC
 int vector_irq[NR_VECTORS] = { [0 ... NR_VECTORS - 1] = -1};
-u8 irq_vector[NR_IRQ_VECTORS] = { FIRST_DEVICE_VECTOR , 0 };
 #endif
 
+static struct msi_ops *msi_ops;
+
+int
+msi_register(struct msi_ops *ops)
+{
+        msi_ops = ops;
+        return 0;
+}
+
 static void msi_cache_ctor(void *p, kmem_cache_t *cache, unsigned long flags)
 {
         memset(p, 0, NR_IRQS * sizeof(struct msi_desc));
@@ -92,7 +98,7 @@ static void msi_set_mask_bit(unsigned int vector, int flag)
 static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
 {
         struct msi_desc *entry;
-        struct msg_address address;
+        u32 address_hi, address_lo;
         unsigned int irq = vector;
         unsigned int dest_cpu = first_cpu(cpu_mask);
 
@@ -108,28 +114,36 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
                 if (!pos)
                         return;
 
+                pci_read_config_dword(entry->dev, msi_upper_address_reg(pos),
+                        &address_hi);
                 pci_read_config_dword(entry->dev, msi_lower_address_reg(pos),
-                        &address.lo_address.value);
-                address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK;
-                address.lo_address.value |= (cpu_physical_id(dest_cpu) <<
-                                                                        MSI_TARGET_CPU_SHIFT);
-                entry->msi_attrib.current_cpu = cpu_physical_id(dest_cpu);
+                        &address_lo);
+
+                msi_ops->target(vector, dest_cpu, &address_hi, &address_lo);
+
+                pci_write_config_dword(entry->dev, msi_upper_address_reg(pos),
+                        address_hi);
                 pci_write_config_dword(entry->dev, msi_lower_address_reg(pos),
-                        address.lo_address.value);
+                        address_lo);
                 set_native_irq_info(irq, cpu_mask);
                 break;
         }
         case PCI_CAP_ID_MSIX:
         {
-                int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
-                        PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET;
-
-                address.lo_address.value = readl(entry->mask_base + offset);
-                address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK;
-                address.lo_address.value |= (cpu_physical_id(dest_cpu) <<
-                                                                        MSI_TARGET_CPU_SHIFT);
-                entry->msi_attrib.current_cpu = cpu_physical_id(dest_cpu);
-                writel(address.lo_address.value, entry->mask_base + offset);
+                int offset_hi =
+                        entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
+                                PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET;
+                int offset_lo =
+                        entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
+                                PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET;
+
+                address_hi = readl(entry->mask_base + offset_hi);
+                address_lo = readl(entry->mask_base + offset_lo);
+
+                msi_ops->target(vector, dest_cpu, &address_hi, &address_lo);
+
+                writel(address_hi, entry->mask_base + offset_hi);
+                writel(address_lo, entry->mask_base + offset_lo);
                 set_native_irq_info(irq, cpu_mask);
                 break;
         }
@@ -251,30 +265,6 @@ static struct hw_interrupt_type msi_irq_wo_maskbit_type = {
         .set_affinity   = set_msi_affinity
 };
 
-static void msi_data_init(struct msg_data *msi_data,
-                          unsigned int vector)
-{
-        memset(msi_data, 0, sizeof(struct msg_data));
-        msi_data->vector = (u8)vector;
-        msi_data->delivery_mode = MSI_DELIVERY_MODE;
-        msi_data->level = MSI_LEVEL_MODE;
-        msi_data->trigger = MSI_TRIGGER_MODE;
-}
-
-static void msi_address_init(struct msg_address *msi_address)
-{
-        unsigned int    dest_id;
-        unsigned long   dest_phys_id = cpu_physical_id(MSI_TARGET_CPU);
-
-        memset(msi_address, 0, sizeof(struct msg_address));
-        msi_address->hi_address = (u32)0;
-        dest_id = (MSI_ADDRESS_HEADER << MSI_ADDRESS_HEADER_SHIFT);
-        msi_address->lo_address.u.dest_mode = MSI_PHYSICAL_MODE;
-        msi_address->lo_address.u.redirection_hint = MSI_REDIRECTION_HINT_MODE;
-        msi_address->lo_address.u.dest_id = dest_id;
-        msi_address->lo_address.value |= (dest_phys_id << MSI_TARGET_CPU_SHIFT);
-}
-
 static int msi_free_vector(struct pci_dev* dev, int vector, int reassign);
 static int assign_msi_vector(void)
 {
@@ -369,13 +359,29 @@ static int msi_init(void)
                 return status;
         }
 
+        status = msi_arch_init();
+        if (status < 0) {
+                pci_msi_enable = 0;
+                printk(KERN_WARNING
+                       "PCI: MSI arch init failed.  MSI disabled.\n");
+                return status;
+        }
+
+        if (! msi_ops) {
+                printk(KERN_WARNING
+                       "PCI: MSI ops not registered. MSI disabled.\n");
+                status = -EINVAL;
+                return status;
+        }
+
+        last_alloc_vector = assign_irq_vector(AUTO_ASSIGN);
         status = msi_cache_init();
         if (status < 0) {
                 pci_msi_enable = 0;
                 printk(KERN_WARNING "PCI: MSI cache init failed\n");
                 return status;
         }
-        last_alloc_vector = assign_irq_vector(AUTO_ASSIGN);
+
         if (last_alloc_vector < 0) {
                 pci_msi_enable = 0;
                 printk(KERN_WARNING "PCI: No interrupt vectors available for MSI\n");
@@ -442,9 +448,11 @@ static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
                 /* Set enabled bits to single MSI & enable MSI_enable bit */
                 msi_enable(control, 1);
                 pci_write_config_word(dev, msi_control_reg(pos), control);
+                dev->msi_enabled = 1;
         } else {
                 msix_enable(control);
                 pci_write_config_word(dev, msi_control_reg(pos), control);
+                dev->msix_enabled = 1;
         }
         if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
                 /* PCI Express Endpoint device detected */
@@ -461,9 +469,11 @@ void disable_msi_mode(struct pci_dev *dev, int pos, int type)
                 /* Set enabled bits to single MSI & enable MSI_enable bit */
                 msi_disable(control);
                 pci_write_config_word(dev, msi_control_reg(pos), control);
+                dev->msi_enabled = 0;
         } else {
                 msix_disable(control);
                 pci_write_config_word(dev, msi_control_reg(pos), control);
+                dev->msix_enabled = 0;
         }
         if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
                 /* PCI Express Endpoint device detected */
@@ -538,7 +548,6 @@ int pci_save_msi_state(struct pci_dev *dev)
                 pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
         if (control & PCI_MSI_FLAGS_MASKBIT)
                 pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
-        disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
         save_state->cap_nr = PCI_CAP_ID_MSI;
         pci_add_saved_cap(dev, save_state);
         return 0;
@@ -575,6 +584,8 @@ void pci_restore_msi_state(struct pci_dev *dev)
 int pci_save_msix_state(struct pci_dev *dev)
 {
         int pos;
+        int temp;
+        int vector, head, tail = 0;
         u16 control;
         struct pci_cap_saved_state *save_state;
 
@@ -582,6 +593,7 @@ int pci_save_msix_state(struct pci_dev *dev)
         if (pos <= 0 || dev->no_msi)
                 return 0;
 
+        /* save the capability */
         pci_read_config_word(dev, msi_control_reg(pos), &control);
         if (!(control & PCI_MSIX_FLAGS_ENABLE))
                 return 0;
@@ -593,7 +605,38 @@ int pci_save_msix_state(struct pci_dev *dev)
         }
         *((u16 *)&save_state->data[0]) = control;
 
-        disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
+        /* save the table */
+        temp = dev->irq;
+        if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
+                kfree(save_state);
+                return -EINVAL;
+        }
+
+        vector = head = dev->irq;
+        while (head != tail) {
+                int j;
+                void __iomem *base;
+                struct msi_desc *entry;
+
+                entry = msi_desc[vector];
+                base = entry->mask_base;
+                j = entry->msi_attrib.entry_nr;
+
+                entry->address_lo_save =
+                        readl(base + j * PCI_MSIX_ENTRY_SIZE +
+                              PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
+                entry->address_hi_save =
+                        readl(base + j * PCI_MSIX_ENTRY_SIZE +
+                              PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
+                entry->data_save =
+                        readl(base + j * PCI_MSIX_ENTRY_SIZE +
+                              PCI_MSIX_ENTRY_DATA_OFFSET);
+
+                tail = msi_desc[vector]->link.tail;
+                vector = tail;
+        }
+        dev->irq = temp;
+
         save_state->cap_nr = PCI_CAP_ID_MSIX;
         pci_add_saved_cap(dev, save_state);
         return 0;
@@ -606,8 +649,6 @@ void pci_restore_msix_state(struct pci_dev *dev)
         int vector, head, tail = 0;
         void __iomem *base;
         int j;
-        struct msg_address address;
-        struct msg_data data;
         struct msi_desc *entry;
         int temp;
         struct pci_cap_saved_state *save_state;
@@ -633,20 +674,13 @@ void pci_restore_msix_state(struct pci_dev *dev)
                 base = entry->mask_base;
                 j = entry->msi_attrib.entry_nr;
 
-                msi_address_init(&address);
-                msi_data_init(&data, vector);
-
-                address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK;
-                address.lo_address.value |= entry->msi_attrib.current_cpu <<
-                                        MSI_TARGET_CPU_SHIFT;
-
-                writel(address.lo_address.value,
+                writel(entry->address_lo_save,
                         base + j * PCI_MSIX_ENTRY_SIZE +
                         PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
-                writel(address.hi_address,
+                writel(entry->address_hi_save,
                         base + j * PCI_MSIX_ENTRY_SIZE +
                         PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
-                writel(*(u32*)&data,
+                writel(entry->data_save,
                         base + j * PCI_MSIX_ENTRY_SIZE +
                         PCI_MSIX_ENTRY_DATA_OFFSET);
 
@@ -660,30 +694,32 @@ void pci_restore_msix_state(struct pci_dev *dev)
 }
 #endif
 
-static void msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
+static int msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
 {
-        struct msg_address address;
-        struct msg_data data;
+        int status;
+        u32 address_hi;
+        u32 address_lo;
+        u32 data;
         int pos, vector = dev->irq;
         u16 control;
 
         pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
         pci_read_config_word(dev, msi_control_reg(pos), &control);
+
         /* Configure MSI capability structure */
-        msi_address_init(&address);
-        msi_data_init(&data, vector);
-        entry->msi_attrib.current_cpu = ((address.lo_address.u.dest_id >>
-                                MSI_TARGET_CPU_SHIFT) & MSI_TARGET_CPU_MASK);
-        pci_write_config_dword(dev, msi_lower_address_reg(pos),
-                        address.lo_address.value);
+        status = msi_ops->setup(dev, vector, &address_hi, &address_lo, &data);
+        if (status < 0)
+                return status;
+
+        pci_write_config_dword(dev, msi_lower_address_reg(pos), address_lo);
         if (is_64bit_address(control)) {
                 pci_write_config_dword(dev,
-                        msi_upper_address_reg(pos), address.hi_address);
+                        msi_upper_address_reg(pos), address_hi);
                 pci_write_config_word(dev,
-                        msi_data_reg(pos, 1), *((u32*)&data));
+                        msi_data_reg(pos, 1), data);
         } else
                 pci_write_config_word(dev,
-                        msi_data_reg(pos, 0), *((u32*)&data));
+                        msi_data_reg(pos, 0), data);
         if (entry->msi_attrib.maskbit) {
                 unsigned int maskbits, temp;
                 /* All MSIs are unmasked by default, Mask them all */
@@ -697,6 +733,8 @@ static void msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
                         msi_mask_bits_reg(pos, is_64bit_address(control)),
                         maskbits);
         }
+
+        return 0;
 }
 
 /**
@@ -710,6 +748,7 @@ static void msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
  **/
 static int msi_capability_init(struct pci_dev *dev)
 {
+        int status;
         struct msi_desc *entry;
         int pos, vector;
         u16 control;
@@ -742,7 +781,12 @@ static int msi_capability_init(struct pci_dev *dev)
         /* Replace with MSI handler */
         irq_handler_init(PCI_CAP_ID_MSI, vector, entry->msi_attrib.maskbit);
         /* Configure MSI capability structure */
-        msi_register_init(dev, entry);
+        status = msi_register_init(dev, entry);
+        if (status != 0) {
+                dev->irq = entry->msi_attrib.default_vector;
+                kmem_cache_free(msi_cachep, entry);
+                return status;
+        }
 
         attach_msi_entry(entry, vector);
         /* Set MSI enabled bits  */
@@ -765,8 +809,10 @@ static int msix_capability_init(struct pci_dev *dev,
                                 struct msix_entry *entries, int nvec)
 {
         struct msi_desc *head = NULL, *tail = NULL, *entry = NULL;
-        struct msg_address address;
-        struct msg_data data;
+        u32 address_hi;
+        u32 address_lo;
+        u32 data;
+        int status;
         int vector, pos, i, j, nr_entries, temp = 0;
         unsigned long phys_addr;
         u32 table_offset;
@@ -822,18 +868,20 @@ static int msix_capability_init(struct pci_dev *dev,
                 /* Replace with MSI-X handler */
                 irq_handler_init(PCI_CAP_ID_MSIX, vector, 1);
                 /* Configure MSI-X capability structure */
-                msi_address_init(&address);
-                msi_data_init(&data, vector);
-                entry->msi_attrib.current_cpu =
-                        ((address.lo_address.u.dest_id >>
-                        MSI_TARGET_CPU_SHIFT) & MSI_TARGET_CPU_MASK);
-                writel(address.lo_address.value,
+                status = msi_ops->setup(dev, vector,
+                                        &address_hi,
+                                        &address_lo,
+                                        &data);
+                if (status < 0)
+                        break;
+
+                writel(address_lo,
                         base + j * PCI_MSIX_ENTRY_SIZE +
                         PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
-                writel(address.hi_address,
+                writel(address_hi,
                         base + j * PCI_MSIX_ENTRY_SIZE +
                         PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
-                writel(*(u32*)&data,
+                writel(data,
                         base + j * PCI_MSIX_ENTRY_SIZE +
                         PCI_MSIX_ENTRY_DATA_OFFSET);
                 attach_msi_entry(entry, vector);
@@ -865,6 +913,7 @@ static int msix_capability_init(struct pci_dev *dev,
  **/
 int pci_enable_msi(struct pci_dev* dev)
 {
+        struct pci_bus *bus;
         int pos, temp, status = -EINVAL;
         u16 control;
 
@@ -874,8 +923,9 @@ int pci_enable_msi(struct pci_dev* dev)
         if (dev->no_msi)
                 return status;
 
-        if (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
-                return -EINVAL;
+        for (bus = dev->bus; bus; bus = bus->parent)
+                if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
+                        return -EINVAL;
 
         temp = dev->irq;
 
@@ -887,23 +937,23 @@ int pci_enable_msi(struct pci_dev* dev)
         if (!pos)
                 return -EINVAL;
 
-        pci_read_config_word(dev, msi_control_reg(pos), &control);
-        if (control & PCI_MSI_FLAGS_ENABLE)
-                return 0;                       /* Already in MSI mode */
-
         if (!msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
                 /* Lookup Sucess */
                 unsigned long flags;
 
+                pci_read_config_word(dev, msi_control_reg(pos), &control);
+                if (control & PCI_MSI_FLAGS_ENABLE)
+                        return 0;       /* Already in MSI mode */
                 spin_lock_irqsave(&msi_lock, flags);
                 if (!vector_irq[dev->irq]) {
                         msi_desc[dev->irq]->msi_attrib.state = 0;
                         vector_irq[dev->irq] = -1;
                         nr_released_vectors--;
                         spin_unlock_irqrestore(&msi_lock, flags);
-                        msi_register_init(dev, msi_desc[dev->irq]);
-                        enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
-                        return 0;
+                        status = msi_register_init(dev, msi_desc[dev->irq]);
+                        if (status == 0)
+                                enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
+                        return status;
                 }
                 spin_unlock_irqrestore(&msi_lock, flags);
                 dev->irq = temp;
@@ -980,6 +1030,8 @@ static int msi_free_vector(struct pci_dev* dev, int vector, int reassign)
         void __iomem *base;
         unsigned long flags;
 
+        msi_ops->teardown(vector);
+
         spin_lock_irqsave(&msi_lock, flags);
         entry = msi_desc[vector];
         if (!entry || entry->dev != dev) {
@@ -1008,33 +1060,8 @@ static int msi_free_vector(struct pci_dev* dev, int vector, int reassign)
                                 entry_nr * PCI_MSIX_ENTRY_SIZE +
                                 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
 
-                if (head == vector) {
-                        /*
-                         * Detect last MSI-X vector to be released.
-                         * Release the MSI-X memory-mapped table.
-                         */
-#if 0
-                        int pos, nr_entries;
-                        unsigned long phys_addr;
-                        u32 table_offset;
-                        u16 control;
-                        u8 bir;
-
-                        pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
-                        pci_read_config_word(dev, msi_control_reg(pos),
-                                &control);
-                        nr_entries = multi_msix_capable(control);
-                        pci_read_config_dword(dev, msix_table_offset_reg(pos),
-                                &table_offset);
-                        bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
-                        table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
-                        phys_addr = pci_resource_start(dev, bir) + table_offset;
-/*
- * FIXME!  and what did you want to do with phys_addr?
- */
-#endif
+                if (head == vector)
                         iounmap(base);
-                }
         }
 
         return 0;
@@ -1108,6 +1135,7 @@ static int reroute_msix_table(int head, struct msix_entry *entries, int *nvec)
  **/
 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
 {
+        struct pci_bus *bus;
         int status, pos, nr_entries, free_vectors;
         int i, j, temp;
         u16 control;
@@ -1116,6 +1144,13 @@ int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
         if (!pci_msi_enable || !dev || !entries)
                 return -EINVAL;
 
+        if (dev->no_msi)
+                return -EINVAL;
+
+        for (bus = dev->bus; bus; bus = bus->parent)
+                if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
+                        return -EINVAL;
+
         status = msi_init();
         if (status < 0)
                 return status;
@@ -1300,24 +1335,6 @@ void msi_remove_pci_irq_vectors(struct pci_dev* dev)
                 }
                 msi_free_vector(dev, vector, 0);
                 if (warning) {
-                        /* Force to release the MSI-X memory-mapped table */
-#if 0
-                        unsigned long phys_addr;
-                        u32 table_offset;
-                        u16 control;
-                        u8 bir;
-
-                        pci_read_config_word(dev, msi_control_reg(pos),
-                                &control);
-                        pci_read_config_dword(dev, msix_table_offset_reg(pos),
-                                &table_offset);
-                        bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
-                        table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
-                        phys_addr = pci_resource_start(dev, bir) + table_offset;
-/*
- * FIXME! and what did you want to do with phys_addr?
- */
-#endif
                         iounmap(base);
                         printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
                                "called without free_irq() on all MSI-X vectors\n",
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index 4ac52d441e47..56951c39d3a3 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -6,6 +6,68 @@
 #ifndef MSI_H
 #define MSI_H
 
+/*
+ * MSI operation vector.  Used by the msi core code (drivers/pci/msi.c)
+ * to abstract platform-specific tasks relating to MSI address generation
+ * and resource management.
+ */
+struct msi_ops {
+        /**
+         * setup - generate an MSI bus address and data for a given vector
+         * @pdev: PCI device context (in)
+         * @vector: vector allocated by the msi core (in)
+         * @addr_hi: upper 32 bits of PCI bus MSI address (out)
+         * @addr_lo: lower 32 bits of PCI bus MSI address (out)
+         * @data: MSI data payload (out)
+         *
+         * Description: The setup op is used to generate a PCI bus addres and
+         * data which the msi core will program into the card MSI capability
+         * registers.  The setup routine is responsible for picking an initial
+         * cpu to target the MSI at.  The setup routine is responsible for
+         * examining pdev to determine the MSI capabilities of the card and
+         * generating a suitable address/data.  The setup routine is
+         * responsible for allocating and tracking any system resources it
+         * needs to route the MSI to the cpu it picks, and for associating
+         * those resources with the passed in vector.
+         *
+         * Returns 0 if the MSI address/data was successfully setup.
+         **/
+
+        int     (*setup)    (struct pci_dev *pdev, unsigned int vector,
+                             u32 *addr_hi, u32 *addr_lo, u32 *data);
+
+        /**
+         * teardown - release resources allocated by setup
+         * @vector: vector context for resources (in)
+         *
+         * Description:  The teardown op is used to release any resources
+         * that were allocated in the setup routine associated with the passed
+         * in vector.
+         **/
+
+        void    (*teardown) (unsigned int vector);
+
+        /**
+         * target - retarget an MSI at a different cpu
+         * @vector: vector context for resources (in)
+         * @cpu:  new cpu to direct vector at (in)
+         * @addr_hi: new value of PCI bus upper 32 bits (in/out)
+         * @addr_lo: new value of PCI bus lower 32 bits (in/out)
+         *
+         * Description:  The target op is used to redirect an MSI vector
+         * at a different cpu.  addr_hi/addr_lo coming in are the existing
+         * values that the MSI core has programmed into the card.  The
+         * target code is responsible for freeing any resources (if any)
+         * associated with the old address, and generating a new PCI bus
+         * addr_hi/addr_lo that will redirect the vector at the indicated cpu.
+         **/
+
+        void    (*target)   (unsigned int vector, unsigned int cpu,
+                             u32 *addr_hi, u32 *addr_lo);
+};
+
+extern int msi_register(struct msi_ops *ops);
+
 #include <asm/msi.h>
 
 /*
@@ -63,67 +125,6 @@ extern int pci_vector_resources(int last, int nr_released);
 #define msix_mask(address)              (address | PCI_MSIX_FLAGS_BITMASK)
 #define msix_is_pending(address)        (address & PCI_MSIX_FLAGS_PENDMASK)
 
-/*
- * MSI Defined Data Structures
- */
-#define MSI_ADDRESS_HEADER              0xfee
-#define MSI_ADDRESS_HEADER_SHIFT        12
-#define MSI_ADDRESS_HEADER_MASK         0xfff000
-#define MSI_ADDRESS_DEST_ID_MASK        0xfff0000f
-#define MSI_TARGET_CPU_MASK             0xff
-#define MSI_DELIVERY_MODE               0
-#define MSI_LEVEL_MODE                  1       /* Edge always assert */
-#define MSI_TRIGGER_MODE                0       /* MSI is edge sensitive */
-#define MSI_PHYSICAL_MODE               0
-#define MSI_LOGICAL_MODE                1
-#define MSI_REDIRECTION_HINT_MODE       0
-
-struct msg_data {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
-        __u32   vector          :  8;
-        __u32   delivery_mode   :  3;   /* 000b: FIXED | 001b: lowest prior */
-        __u32   reserved_1      :  3;
-        __u32   level           :  1;   /* 0: deassert | 1: assert */
-        __u32   trigger         :  1;   /* 0: edge | 1: level */
-        __u32   reserved_2      : 16;
-#elif defined(__BIG_ENDIAN_BITFIELD)
-        __u32   reserved_2      : 16;
-        __u32   trigger         :  1;   /* 0: edge | 1: level */
-        __u32   level           :  1;   /* 0: deassert | 1: assert */
-        __u32   reserved_1      :  3;
-        __u32   delivery_mode   :  3;   /* 000b: FIXED | 001b: lowest prior */
-        __u32   vector          :  8;
-#else
-#error "Bitfield endianness not defined! Check your byteorder.h"
-#endif
-} __attribute__ ((packed));
-
-struct msg_address {
-        union {
-                struct {
-#if defined(__LITTLE_ENDIAN_BITFIELD)
-                        __u32   reserved_1      :  2;
-                        __u32   dest_mode       :  1;   /*0:physic | 1:logic */
-                        __u32   redirection_hint:  1;   /*0: dedicated CPU
-                                                          1: lowest priority */
-                        __u32   reserved_2      :  4;
-                        __u32   dest_id         : 24;   /* Destination ID */
-#elif defined(__BIG_ENDIAN_BITFIELD)
-                        __u32   dest_id         : 24;   /* Destination ID */
-                        __u32   reserved_2      :  4;
-                        __u32   redirection_hint:  1;   /*0: dedicated CPU
-                                                          1: lowest priority */
-                        __u32   dest_mode       :  1;   /*0:physic | 1:logic */
-                        __u32   reserved_1      :  2;
-#else
-#error "Bitfield endianness not defined! Check your byteorder.h"
-#endif
-                }u;
-                __u32  value;
-        }lo_address;
-        __u32   hi_address;
-} __attribute__ ((packed));
-
 struct msi_desc {
         struct {
                 __u8    type    : 5;    /* {0: unused, 5h:MSI, 11h:MSI-X} */
@@ -132,7 +133,7 @@ struct msi_desc {
                 __u8    reserved: 1;    /* reserved                       */
                 __u8    entry_nr;       /* specific enabled entry         */
                 __u8    default_vector; /* default pre-assigned vector    */
-                __u8    current_cpu;    /* current destination cpu        */
+                __u8    unused;         /* formerly unused destination cpu*/
         }msi_attrib;
 
         struct {
@@ -142,6 +143,14 @@ struct msi_desc {
 
         void __iomem *mask_base;
         struct pci_dev *dev;
+
+#ifdef CONFIG_PM
+        /* PM save area for MSIX address/data */
+
+        u32     address_hi_save;
+        u32     address_lo_save;
+        u32     data_save;
+#endif
 };
 
 #endif /* MSI_H */
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index c2ecae5ff0c1..bb7456c1dbac 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -267,7 +267,7 @@ static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
 
 
 /* ACPI bus type */
-static int pci_acpi_find_device(struct device *dev, acpi_handle *handle)
+static int acpi_pci_find_device(struct device *dev, acpi_handle *handle)
 {
         struct pci_dev * pci_dev;
         acpi_integer    addr;
@@ -281,7 +281,7 @@ static int pci_acpi_find_device(struct device *dev, acpi_handle *handle)
         return 0;
 }
 
-static int pci_acpi_find_root_bridge(struct device *dev, acpi_handle *handle)
+static int acpi_pci_find_root_bridge(struct device *dev, acpi_handle *handle)
 {
         int num;
         unsigned int seg, bus;
@@ -299,21 +299,21 @@ static int pci_acpi_find_root_bridge(struct device *dev, acpi_handle *handle)
         return 0;
 }
 
-static struct acpi_bus_type pci_acpi_bus = {
+static struct acpi_bus_type acpi_pci_bus = {
         .bus = &pci_bus_type,
-        .find_device = pci_acpi_find_device,
-        .find_bridge = pci_acpi_find_root_bridge,
+        .find_device = acpi_pci_find_device,
+        .find_bridge = acpi_pci_find_root_bridge,
 };
 
-static int __init pci_acpi_init(void)
+static int __init acpi_pci_init(void)
 {
         int ret;
 
-        ret = register_acpi_bus_type(&pci_acpi_bus);
+        ret = register_acpi_bus_type(&acpi_pci_bus);
         if (ret)
                 return 0;
         platform_pci_choose_state = acpi_pci_choose_state;
         platform_pci_set_power_state = acpi_pci_set_power_state;
         return 0;
 }
-arch_initcall(pci_acpi_init);
+arch_initcall(acpi_pci_init);
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 56ac2bc003c7..bc405c035ce3 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -43,6 +43,29 @@ pci_config_attr(subsystem_vendor, "0x%04x\n");
 pci_config_attr(subsystem_device, "0x%04x\n");
 pci_config_attr(class, "0x%06x\n");
 pci_config_attr(irq, "%u\n");
+pci_config_attr(is_enabled, "%u\n");
+
+static ssize_t broken_parity_status_show(struct device *dev,
+                                         struct device_attribute *attr,
+                                         char *buf)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+        return sprintf (buf, "%u\n", pdev->broken_parity_status);
+}
+
+static ssize_t broken_parity_status_store(struct device *dev,
+                                          struct device_attribute *attr,
+                                          const char *buf, size_t count)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+        ssize_t consumed = -EINVAL;
+
+        if ((count > 0) && (*buf == '0' || *buf == '1')) {
+                pdev->broken_parity_status = *buf == '1' ? 1 : 0;
+                consumed = count;
+        }
+        return consumed;
+}
 
 static ssize_t local_cpus_show(struct device *dev,
                         struct device_attribute *attr, char *buf)
@@ -90,6 +113,25 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
                        (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
                        (u8)(pci_dev->class));
 }
+static ssize_t
+is_enabled_store(struct device *dev, struct device_attribute *attr,
+                const char *buf, size_t count)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        /* this can crash the machine when done on the "wrong" device */
+        if (!capable(CAP_SYS_ADMIN))
+                return count;
+
+        if (*buf == '0')
+                pci_disable_device(pdev);
+
+        if (*buf == '1')
+                pci_enable_device(pdev);
+
+        return count;
+}
+
 
 struct device_attribute pci_dev_attrs[] = {
         __ATTR_RO(resource),
@@ -101,6 +143,9 @@ struct device_attribute pci_dev_attrs[] = {
         __ATTR_RO(irq),
         __ATTR_RO(local_cpus),
         __ATTR_RO(modalias),
+        __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
+        __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
+                broken_parity_status_show,broken_parity_status_store),
         __ATTR_NULL,
 };
 
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index fde41cc14734..d408a3c30426 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -517,7 +517,12 @@ pci_enable_device_bars(struct pci_dev *dev, int bars)
 int
 pci_enable_device(struct pci_dev *dev)
 {
-        int err = pci_enable_device_bars(dev, (1 << PCI_NUM_RESOURCES) - 1);
+        int err;
+
+        if (dev->is_enabled)
+                return 0;
+
+        err = pci_enable_device_bars(dev, (1 << PCI_NUM_RESOURCES) - 1);
         if (err)
                 return err;
         pci_fixup_device(pci_fixup_enable, dev);
@@ -546,7 +551,14 @@ void
 pci_disable_device(struct pci_dev *dev)
 {
         u16 pci_command;
-        
+
+        if (dev->msi_enabled)
+                disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
+                        PCI_CAP_ID_MSI);
+        if (dev->msix_enabled)
+                disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
+                        PCI_CAP_ID_MSIX);
+
         pci_read_config_word(dev, PCI_COMMAND, &pci_command);
         if (pci_command & PCI_COMMAND_MASTER) {
                 pci_command &= ~PCI_COMMAND_MASTER;
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 30630cbe2fe3..29bdeca031a8 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -40,7 +40,7 @@ extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int
 extern void pci_remove_legacy_files(struct pci_bus *bus);
 
 /* Lock for read/write access to pci device and bus lists */
-extern spinlock_t pci_bus_lock;
+extern struct rw_semaphore pci_bus_sem;
 
 #ifdef CONFIG_X86_IO_APIC
 extern int pci_msi_quirk;
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index a10ed9dab2c2..f89dbc3738b7 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -180,25 +180,31 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
                 res->flags |= pci_calc_resource_flags(l);
                 if ((l & (PCI_BASE_ADDRESS_SPACE | PCI_BASE_ADDRESS_MEM_TYPE_MASK))
                     == (PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64)) {
-                        pci_read_config_dword(dev, reg+4, &l);
+                        u32 szhi, lhi;
+                        pci_read_config_dword(dev, reg+4, &lhi);
+                        pci_write_config_dword(dev, reg+4, ~0);
+                        pci_read_config_dword(dev, reg+4, &szhi);
+                        pci_write_config_dword(dev, reg+4, lhi);
+                        szhi = pci_size(lhi, szhi, 0xffffffff);
                         next++;
 #if BITS_PER_LONG == 64
-                        res->start |= ((unsigned long) l) << 32;
+                        res->start |= ((unsigned long) lhi) << 32;
                         res->end = res->start + sz;
-                        pci_write_config_dword(dev, reg+4, ~0);
-                        pci_read_config_dword(dev, reg+4, &sz);
-                        pci_write_config_dword(dev, reg+4, l);
-                        sz = pci_size(l, sz, 0xffffffff);
-                        if (sz) {
+                        if (szhi) {
                                 /* This BAR needs > 4GB?  Wow. */
-                                res->end |= (unsigned long)sz<<32;
+                                res->end |= (unsigned long)szhi<<32;
                         }
 #else
-                        if (l) {
-                                printk(KERN_ERR "PCI: Unable to handle 64-bit address for device %s\n", pci_name(dev));
+                        if (szhi) {
+                                printk(KERN_ERR "PCI: Unable to handle 64-bit BAR for device %s\n", pci_name(dev));
                                 res->start = 0;
                                 res->flags = 0;
-                                continue;
+                        } else if (lhi) {
+                                /* 64-bit wide address, treat as disabled */
+                                pci_write_config_dword(dev, reg, l & ~(u32)PCI_BASE_ADDRESS_MEM_MASK);
+                                pci_write_config_dword(dev, reg+4, 0);
+                                res->start = 0;
+                                res->end = sz;
                         }
 #endif
                 }
@@ -377,9 +383,9 @@ struct pci_bus * __devinit pci_add_new_bus(struct pci_bus *parent, struct pci_de
 
         child = pci_alloc_child_bus(parent, dev, busnr);
         if (child) {
-                spin_lock(&pci_bus_lock);
+                down_write(&pci_bus_sem);
                 list_add_tail(&child->node, &parent->children);
-                spin_unlock(&pci_bus_lock);
+                up_write(&pci_bus_sem);
         }
         return child;
 }
@@ -838,9 +844,9 @@ void __devinit pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
          * and the bus list for fixup functions, etc.
          */
         INIT_LIST_HEAD(&dev->global_list);
-        spin_lock(&pci_bus_lock);
+        down_write(&pci_bus_sem);
         list_add_tail(&dev->bus_list, &bus->devices);
-        spin_unlock(&pci_bus_lock);
+        up_write(&pci_bus_sem);
 }
 
 struct pci_dev * __devinit
@@ -975,9 +981,10 @@ struct pci_bus * __devinit pci_create_bus(struct device *parent,
                 pr_debug("PCI: Bus %04x:%02x already known\n", pci_domain_nr(b), bus);
                 goto err_out;
         }
-        spin_lock(&pci_bus_lock);
+
+        down_write(&pci_bus_sem);
         list_add_tail(&b->node, &pci_root_buses);
-        spin_unlock(&pci_bus_lock);
+        up_write(&pci_bus_sem);
 
         memset(dev, 0, sizeof(*dev));
         dev->parent = parent;
@@ -1017,9 +1024,9 @@ class_dev_create_file_err:
 class_dev_reg_err:
         device_unregister(dev);
 dev_reg_err:
-        spin_lock(&pci_bus_lock);
+        down_write(&pci_bus_sem);
         list_del(&b->node);
-        spin_unlock(&pci_bus_lock);
+        up_write(&pci_bus_sem);
 err_out:
         kfree(dev);
         kfree(b);
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index d378478612fb..4364d793f73b 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -24,6 +24,17 @@
 #include <linux/acpi.h>
 #include "pci.h"
 
+/* The Mellanox Tavor device gives false positive parity errors
+ * Mark this device with a broken_parity_status, to allow
+ * PCI scanning code to "skip" this now blacklisted device.
+ */
+static void __devinit quirk_mellanox_tavor(struct pci_dev *dev)
+{
+        dev->broken_parity_status = 1;  /* This device gives false positives */
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX,PCI_DEVICE_ID_MELLANOX_TAVOR,quirk_mellanox_tavor);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX,PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE,quirk_mellanox_tavor);
+
 /* Deal with broken BIOS'es that neglect to enable passive release,
    which can cause problems in combination with the 82441FX/PPro MTRRs */
 static void __devinit quirk_passive_release(struct pci_dev *dev)
@@ -878,27 +889,30 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82375,	quirk_e
  * when a PCI-Soundcard is added. The BIOS only gives Options
  * "Disabled" and "AUTO". This Quirk Sets the corresponding
  * Register-Value to enable the Soundcard.
+ *
+ * FIXME: Presently this quirk will run on anything that has an 8237
+ * which isn't correct, we need to check DMI tables or something in
+ * order to make sure it only runs on the MSI-K8T-Neo2Fir.  Because it
+ * runs everywhere at present we suppress the printk output in most
+ * irrelevant cases.
  */
 static void __init k8t_sound_hostbridge(struct pci_dev *dev)
 {
         unsigned char val;
 
-        printk(KERN_INFO "PCI: Quirk-MSI-K8T Soundcard On\n");
         pci_read_config_byte(dev, 0x50, &val);
         if (val == 0x88 || val == 0xc8) {
+                /* Assume it's probably a MSI-K8T-Neo2Fir */
+                printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, attempting to turn soundcard ON\n");
                 pci_write_config_byte(dev, 0x50, val & (~0x40));
 
                 /* Verify the Change for Status output */
                 pci_read_config_byte(dev, 0x50, &val);
                 if (val & 0x40)
-                        printk(KERN_INFO "PCI: MSI-K8T soundcard still off\n");
+                        printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, soundcard still off\n");
                 else
-                        printk(KERN_INFO "PCI: MSI-K8T soundcard on\n");
-        } else {
-                printk(KERN_INFO "PCI: Unexpected Value in PCI-Register: "
-                                        "no Change!\n");
+                        printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, soundcard on\n");
         }
-
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, k8t_sound_hostbridge);
 
@@ -1485,6 +1499,25 @@ static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,   0x1460,         quirk_p64h2_1k_io);
 
+/* Under some circumstances, AER is not linked with extended capabilities.
+ * Force it to be linked by setting the corresponding control bit in the
+ * config space.
+ */
+static void __devinit quirk_nvidia_ck804_pcie_aer_ext_cap(struct pci_dev *dev)
+{
+        uint8_t b;
+        if (pci_read_config_byte(dev, 0xf41, &b) == 0) {
+                if (!(b & 0x20)) {
+                        pci_write_config_byte(dev, 0xf41, b | 0x20);
+                        printk(KERN_INFO
+                               "PCI: Linking AER extended capability on %s\n",
+                               pci_name(dev));
+                }
+        }
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA,  PCI_DEVICE_ID_NVIDIA_CK804_PCIE,
+                        quirk_nvidia_ck804_pcie_aer_ext_cap);
+
 EXPORT_SYMBOL(pcie_mch_quirk);
 #ifdef CONFIG_HOTPLUG
 EXPORT_SYMBOL(pci_fixup_device);
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index 1a6bf9de166f..99ffbd478b29 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -22,18 +22,18 @@ static void pci_destroy_dev(struct pci_dev *dev)
                 pci_proc_detach_device(dev);
                 pci_remove_sysfs_dev_files(dev);
                 device_unregister(&dev->dev);
-                spin_lock(&pci_bus_lock);
+                down_write(&pci_bus_sem);
                 list_del(&dev->global_list);
                 dev->global_list.next = dev->global_list.prev = NULL;
-                spin_unlock(&pci_bus_lock);
+                up_write(&pci_bus_sem);
         }
 
         /* Remove the device from the device lists, and prevent any further
          * list accesses from this device */
-        spin_lock(&pci_bus_lock);
+        down_write(&pci_bus_sem);
         list_del(&dev->bus_list);
         dev->bus_list.next = dev->bus_list.prev = NULL;
-        spin_unlock(&pci_bus_lock);
+        up_write(&pci_bus_sem);
 
         pci_free_resources(dev);
         pci_dev_put(dev);
@@ -62,9 +62,9 @@ void pci_remove_bus(struct pci_bus *pci_bus)
 {
         pci_proc_detach_bus(pci_bus);
 
-        spin_lock(&pci_bus_lock);
+        down_write(&pci_bus_sem);
         list_del(&pci_bus->node);
-        spin_unlock(&pci_bus_lock);
+        up_write(&pci_bus_sem);
         pci_remove_legacy_files(pci_bus);
         class_device_remove_file(&pci_bus->class_dev,
                 &class_device_attr_cpuaffinity);
diff --git a/drivers/pci/search.c b/drivers/pci/search.c
index ce7dd6e7be60..622b3f8ba820 100644
--- a/drivers/pci/search.c
+++ b/drivers/pci/search.c
@@ -13,7 +13,7 @@
 #include <linux/interrupt.h>
 #include "pci.h"
 
-DEFINE_SPINLOCK(pci_bus_lock);
+DECLARE_RWSEM(pci_bus_sem);
 
 static struct pci_bus * __devinit
 pci_do_find_bus(struct pci_bus* bus, unsigned char busnr)
@@ -72,11 +72,11 @@ pci_find_next_bus(const struct pci_bus *from)
         struct pci_bus *b = NULL;
 
         WARN_ON(in_interrupt());
-        spin_lock(&pci_bus_lock);
+        down_read(&pci_bus_sem);
         n = from ? from->node.next : pci_root_buses.next;
         if (n != &pci_root_buses)
                 b = pci_bus_b(n);
-        spin_unlock(&pci_bus_lock);
+        up_read(&pci_bus_sem);
         return b;
 }
 
@@ -124,7 +124,7 @@ struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn)
         struct pci_dev *dev;
 
         WARN_ON(in_interrupt());
-        spin_lock(&pci_bus_lock);
+        down_read(&pci_bus_sem);
 
         list_for_each(tmp, &bus->devices) {
                 dev = pci_dev_b(tmp);
@@ -135,7 +135,7 @@ struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn)
         dev = NULL;
  out:
         pci_dev_get(dev);
-        spin_unlock(&pci_bus_lock);
+        up_read(&pci_bus_sem);
         return dev;
 }
 
@@ -167,7 +167,7 @@ static struct pci_dev * pci_find_subsys(unsigned int vendor,
         struct pci_dev *dev;
 
         WARN_ON(in_interrupt());
-        spin_lock(&pci_bus_lock);
+        down_read(&pci_bus_sem);
         n = from ? from->global_list.next : pci_devices.next;
 
         while (n && (n != &pci_devices)) {
@@ -181,7 +181,7 @@ static struct pci_dev * pci_find_subsys(unsigned int vendor,
         }
         dev = NULL;
 exit:
-        spin_unlock(&pci_bus_lock);
+        up_read(&pci_bus_sem);
         return dev;
 }
 
@@ -232,7 +232,7 @@ pci_get_subsys(unsigned int vendor, unsigned int device,
         struct pci_dev *dev;
 
         WARN_ON(in_interrupt());
-        spin_lock(&pci_bus_lock);
+        down_read(&pci_bus_sem);
         n = from ? from->global_list.next : pci_devices.next;
 
         while (n && (n != &pci_devices)) {
@@ -247,7 +247,7 @@ pci_get_subsys(unsigned int vendor, unsigned int device,
         dev = NULL;
 exit:
         dev = pci_dev_get(dev);
-        spin_unlock(&pci_bus_lock);
+        up_read(&pci_bus_sem);
         pci_dev_put(from);
         return dev;
 }
@@ -292,7 +292,7 @@ pci_find_device_reverse(unsigned int vendor, unsigned int device, const struct p
         struct pci_dev *dev;
 
         WARN_ON(in_interrupt());
-        spin_lock(&pci_bus_lock);
+        down_read(&pci_bus_sem);
         n = from ? from->global_list.prev : pci_devices.prev;
 
         while (n && (n != &pci_devices)) {
@@ -304,7 +304,7 @@ pci_find_device_reverse(unsigned int vendor, unsigned int device, const struct p
         }
         dev = NULL;
 exit:
-        spin_unlock(&pci_bus_lock);
+        up_read(&pci_bus_sem);
         return dev;
 }
 
@@ -328,7 +328,7 @@ struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
         struct pci_dev *dev;
 
         WARN_ON(in_interrupt());
-        spin_lock(&pci_bus_lock);
+        down_read(&pci_bus_sem);
         n = from ? from->global_list.next : pci_devices.next;
 
         while (n && (n != &pci_devices)) {
@@ -340,7 +340,7 @@ struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
         dev = NULL;
 exit:
         dev = pci_dev_get(dev);
-        spin_unlock(&pci_bus_lock);
+        up_read(&pci_bus_sem);
         pci_dev_put(from);
         return dev;
 }
@@ -362,7 +362,7 @@ int pci_dev_present(const struct pci_device_id *ids)
         int found = 0;
 
         WARN_ON(in_interrupt());
-        spin_lock(&pci_bus_lock);
+        down_read(&pci_bus_sem);
         while (ids->vendor || ids->subvendor || ids->class_mask) {
                 list_for_each_entry(dev, &pci_devices, global_list) {
                         if (pci_match_one_device(ids, dev)) {
@@ -372,8 +372,8 @@ int pci_dev_present(const struct pci_device_id *ids)
                 }
                 ids++;
         }
-exit:                           
-        spin_unlock(&pci_bus_lock);
+exit:
+        up_read(&pci_bus_sem);
         return found;
 }
 EXPORT_SYMBOL(pci_dev_present);
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 28ce3a7ee434..35086e80faa9 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -55,9 +55,10 @@ pbus_assign_resources_sorted(struct pci_bus *bus)
         list_for_each_entry(dev, &bus->devices, bus_list) {
                 u16 class = dev->class >> 8;
 
-                /* Don't touch classless devices and host bridges.  */
+                /* Don't touch classless devices or host bridges or ioapics.  */
                 if (class == PCI_CLASS_NOT_DEFINED ||
-                    class == PCI_CLASS_BRIDGE_HOST)
+                    class == PCI_CLASS_BRIDGE_HOST ||
+                    class == PCI_CLASS_SYSTEM_PIC)
                         continue;
 
                 pdev_sort_resources(dev, &head);
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index ea9277b7f899..577f4b55c46d 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -155,6 +155,46 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
         return ret;
 }
 
+#ifdef CONFIG_EMBEDDED
+int pci_assign_resource_fixed(struct pci_dev *dev, int resno)
+{
+        struct pci_bus *bus = dev->bus;
+        struct resource *res = dev->resource + resno;
+        unsigned int type_mask;
+        int i, ret = -EBUSY;
+
+        type_mask = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH;
+
+        for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
+                struct resource *r = bus->resource[i];
+                if (!r)
+                        continue;
+
+                /* type_mask must match */
+                if ((res->flags ^ r->flags) & type_mask)
+                        continue;
+
+                ret = request_resource(r, res);
+
+                if (ret == 0)
+                        break;
+        }
+
+        if (ret) {
+                printk(KERN_ERR "PCI: Failed to allocate %s resource "
+                                "#%d:%llx@%llx for %s\n",
+                        res->flags & IORESOURCE_IO ? "I/O" : "mem",
+                        resno, (unsigned long long)(res->end - res->start + 1),
+                        (unsigned long long)res->start, pci_name(dev));
+        } else if (resno < PCI_BRIDGE_RESOURCES) {
+                pci_update_resource(dev, res, resno);
+        }
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(pci_assign_resource_fixed);
+#endif
+
 /* Sort resources by alignment */
 void __devinit
 pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c
index 77bb2351500c..680f6063954b 100644
--- a/drivers/scsi/qla1280.c
+++ b/drivers/scsi/qla1280.c
@@ -397,30 +397,6 @@
 #include "ql1280_fw.h"
 #include "ql1040_fw.h"
 
-
-/*
- * Missing PCI ID's
- */
-#ifndef PCI_DEVICE_ID_QLOGIC_ISP1080
-#define PCI_DEVICE_ID_QLOGIC_ISP1080    0x1080
-#endif
-#ifndef PCI_DEVICE_ID_QLOGIC_ISP1240
-#define PCI_DEVICE_ID_QLOGIC_ISP1240    0x1240
-#endif
-#ifndef PCI_DEVICE_ID_QLOGIC_ISP1280
-#define PCI_DEVICE_ID_QLOGIC_ISP1280    0x1280
-#endif
-#ifndef PCI_DEVICE_ID_QLOGIC_ISP10160
-#define PCI_DEVICE_ID_QLOGIC_ISP10160   0x1016
-#endif
-#ifndef PCI_DEVICE_ID_QLOGIC_ISP12160
-#define PCI_DEVICE_ID_QLOGIC_ISP12160   0x1216
-#endif
-
-#ifndef PCI_VENDOR_ID_AMI
-#define PCI_VENDOR_ID_AMI               0x101e
-#endif
-
 #ifndef BITS_PER_LONG
 #error "BITS_PER_LONG not defined!"
 #endif
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
index 8a29ce340b47..27d658704cf9 100644
--- a/drivers/scsi/sata_vsc.c
+++ b/drivers/scsi/sata_vsc.c
@@ -433,13 +433,14 @@ err_out:
 
 
 /*
- * 0x1725/0x7174 is the Vitesse VSC-7174
- * 0x8086/0x3200 is the Intel 31244, which is supposed to be identical
- * compatibility is untested as of yet
+ * Intel 31244 is supposed to be identical.
+ * Compatibility is untested as of yet.
  */
 static const struct pci_device_id vsc_sata_pci_tbl[] = {
-        { 0x1725, 0x7174, PCI_ANY_ID, PCI_ANY_ID, 0x10600, 0xFFFFFF, 0 },
-        { 0x8086, 0x3200, PCI_ANY_ID, PCI_ANY_ID, 0x10600, 0xFFFFFF, 0 },
+        { PCI_VENDOR_ID_VITESSE, PCI_DEVICE_ID_VITESSE_VSC7174,
+          PCI_ANY_ID, PCI_ANY_ID, 0x10600, 0xFFFFFF, 0 },
+        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GD31244,
+          PCI_ANY_ID, PCI_ANY_ID, 0x10600, 0xFFFFFF, 0 },
         { }
 };
 
diff --git a/drivers/video/console/mdacon.c b/drivers/video/console/mdacon.c
index 989e4d49e5bb..7f939d066a5a 100644
--- a/drivers/video/console/mdacon.c
+++ b/drivers/video/console/mdacon.c
@@ -313,8 +313,8 @@ static const char __init *mdacon_startup(void)
         mda_num_columns = 80;
         mda_num_lines   = 25;
 
-        mda_vram_base = VGA_MAP_MEM(0xb0000);
         mda_vram_len  = 0x01000;
+        mda_vram_base = VGA_MAP_MEM(0xb0000, mda_vram_len);
 
         mda_index_port  = 0x3b4;
         mda_value_port  = 0x3b5;
diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c
index d5a04b68c4d4..e64d42e2449e 100644
--- a/drivers/video/console/vgacon.c
+++ b/drivers/video/console/vgacon.c
@@ -391,7 +391,7 @@ static const char __init *vgacon_startup(void)
                         static struct resource ega_console_resource =
                             { "ega", 0x3B0, 0x3BF };
                         vga_video_type = VIDEO_TYPE_EGAM;
-                        vga_vram_end = 0xb8000;
+                        vga_vram_size = 0x8000;
                         display_desc = "EGA+";
                         request_resource(&ioport_resource,
                                          &ega_console_resource);
@@ -401,7 +401,7 @@ static const char __init *vgacon_startup(void)
                         static struct resource mda2_console_resource =
                             { "mda", 0x3BF, 0x3BF };
                         vga_video_type = VIDEO_TYPE_MDA;
-                        vga_vram_end = 0xb2000;
+                        vga_vram_size = 0x2000;
                         display_desc = "*MDA";
                         request_resource(&ioport_resource,
                                          &mda1_console_resource);
@@ -418,7 +418,7 @@ static const char __init *vgacon_startup(void)
                 if ((ORIG_VIDEO_EGA_BX & 0xff) != 0x10) {
                         int i;
 
-                        vga_vram_end = 0xc0000;
+                        vga_vram_size = 0x8000;
 
                         if (!ORIG_VIDEO_ISVGA) {
                                 static struct resource ega_console_resource
@@ -443,7 +443,7 @@ static const char __init *vgacon_startup(void)
                                  * and COE=1 isn't necessarily a good idea)
                                  */
                                 vga_vram_base = 0xa0000;
-                                vga_vram_end = 0xb0000;
+                                vga_vram_size = 0x10000;
                                 outb_p(6, VGA_GFX_I);
                                 outb_p(6, VGA_GFX_D);
 #endif
@@ -475,7 +475,7 @@ static const char __init *vgacon_startup(void)
                         static struct resource cga_console_resource =
                             { "cga", 0x3D4, 0x3D5 };
                         vga_video_type = VIDEO_TYPE_CGA;
-                        vga_vram_end = 0xba000;
+                        vga_vram_size = 0x2000;
                         display_desc = "*CGA";
                         request_resource(&ioport_resource,
                                          &cga_console_resource);
@@ -483,9 +483,8 @@ static const char __init *vgacon_startup(void)
                 }
         }
 
-        vga_vram_base = VGA_MAP_MEM(vga_vram_base);
-        vga_vram_end = VGA_MAP_MEM(vga_vram_end);
-        vga_vram_size = vga_vram_end - vga_vram_base;
+        vga_vram_base = VGA_MAP_MEM(vga_vram_base, vga_vram_size);
+        vga_vram_end = vga_vram_base + vga_vram_size;
 
         /*
          *      Find out if there is a graphics card present.
@@ -1020,14 +1019,14 @@ static int vgacon_do_font_op(struct vgastate *state,char *arg,int set,int ch512)
         char *charmap;
         
         if (vga_video_type != VIDEO_TYPE_EGAM) {
-                charmap = (char *) VGA_MAP_MEM(colourmap);
+                charmap = (char *) VGA_MAP_MEM(colourmap, 0);
                 beg = 0x0e;
 #ifdef VGA_CAN_DO_64KB
                 if (vga_video_type == VIDEO_TYPE_VGAC)
                         beg = 0x06;
 #endif
         } else {
-                charmap = (char *) VGA_MAP_MEM(blackwmap);
+                charmap = (char *) VGA_MAP_MEM(blackwmap, 0);
                 beg = 0x0a;
         }
 
diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c
index f3f16fd9f231..4fd2a272e03d 100644
--- a/drivers/video/vga16fb.c
+++ b/drivers/video/vga16fb.c
@@ -1351,7 +1351,7 @@ static int __init vga16fb_probe(struct device *device)
         }
 
         /* XXX share VGA_FB_PHYS and I/O region with vgacon and others */
-        info->screen_base = (void __iomem *)VGA_MAP_MEM(VGA_FB_PHYS);
+        info->screen_base = (void __iomem *)VGA_MAP_MEM(VGA_FB_PHYS, 0);
 
         if (!info->screen_base) {
                 printk(KERN_ERR "vga16fb: unable to map device\n");