diff options
Diffstat (limited to 'drivers/watchdog')
-rw-r--r-- | drivers/watchdog/Kconfig | 2 | ||||
-rw-r--r-- | drivers/watchdog/at91rm9200_wdt.c | 4 | ||||
-rw-r--r-- | drivers/watchdog/at91sam9_wdt.c | 1 | ||||
-rw-r--r-- | drivers/watchdog/iTCO_vendor_support.c | 32 | ||||
-rw-r--r-- | drivers/watchdog/iTCO_wdt.c | 35 |
5 files changed, 46 insertions, 28 deletions
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 09a3d5522b43..325c10ff6a2c 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
@@ -406,7 +406,7 @@ config ITCO_WDT | |||
406 | ---help--- | 406 | ---help--- |
407 | Hardware driver for the intel TCO timer based watchdog devices. | 407 | Hardware driver for the intel TCO timer based watchdog devices. |
408 | These drivers are included in the Intel 82801 I/O Controller | 408 | These drivers are included in the Intel 82801 I/O Controller |
409 | Hub family (from ICH0 up to ICH8) and in the Intel 6300ESB | 409 | Hub family (from ICH0 up to ICH10) and in the Intel 63xxESB |
410 | controller hub. | 410 | controller hub. |
411 | 411 | ||
412 | The TCO (Total Cost of Ownership) timer is a watchdog timer | 412 | The TCO (Total Cost of Ownership) timer is a watchdog timer |
diff --git a/drivers/watchdog/at91rm9200_wdt.c b/drivers/watchdog/at91rm9200_wdt.c index 5531691f46ea..e35d54589232 100644 --- a/drivers/watchdog/at91rm9200_wdt.c +++ b/drivers/watchdog/at91rm9200_wdt.c | |||
@@ -107,10 +107,10 @@ static int at91_wdt_close(struct inode *inode, struct file *file) | |||
107 | static int at91_wdt_settimeout(int new_time) | 107 | static int at91_wdt_settimeout(int new_time) |
108 | { | 108 | { |
109 | /* | 109 | /* |
110 | * All counting occurs at SLOW_CLOCK / 128 = 0.256 Hz | 110 | * All counting occurs at SLOW_CLOCK / 128 = 256 Hz |
111 | * | 111 | * |
112 | * Since WDV is a 16-bit counter, the maximum period is | 112 | * Since WDV is a 16-bit counter, the maximum period is |
113 | * 65536 / 0.256 = 256 seconds. | 113 | * 65536 / 256 = 256 seconds. |
114 | */ | 114 | */ |
115 | if ((new_time <= 0) || (new_time > WDT_MAX_TIME)) | 115 | if ((new_time <= 0) || (new_time > WDT_MAX_TIME)) |
116 | return -EINVAL; | 116 | return -EINVAL; |
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c index b1da287f90ec..a56ac84381b1 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/errno.h> | 18 | #include <linux/errno.h> |
19 | #include <linux/fs.h> | 19 | #include <linux/fs.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/io.h> | ||
21 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
22 | #include <linux/miscdevice.h> | 23 | #include <linux/miscdevice.h> |
23 | #include <linux/module.h> | 24 | #include <linux/module.h> |
diff --git a/drivers/watchdog/iTCO_vendor_support.c b/drivers/watchdog/iTCO_vendor_support.c index 2474ebca88f6..d8264ad0be41 100644 --- a/drivers/watchdog/iTCO_vendor_support.c +++ b/drivers/watchdog/iTCO_vendor_support.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * intel TCO vendor specific watchdog driver support | 2 | * intel TCO vendor specific watchdog driver support |
3 | * | 3 | * |
4 | * (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>. | 4 | * (c) Copyright 2006-2009 Wim Van Sebroeck <wim@iguana.be>. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU General Public License | 7 | * modify it under the terms of the GNU General Public License |
@@ -19,7 +19,7 @@ | |||
19 | 19 | ||
20 | /* Module and version information */ | 20 | /* Module and version information */ |
21 | #define DRV_NAME "iTCO_vendor_support" | 21 | #define DRV_NAME "iTCO_vendor_support" |
22 | #define DRV_VERSION "1.02" | 22 | #define DRV_VERSION "1.03" |
23 | #define PFX DRV_NAME ": " | 23 | #define PFX DRV_NAME ": " |
24 | 24 | ||
25 | /* Includes */ | 25 | /* Includes */ |
@@ -77,6 +77,26 @@ MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (n | |||
77 | * 20.6 seconds. | 77 | * 20.6 seconds. |
78 | */ | 78 | */ |
79 | 79 | ||
80 | static void supermicro_old_pre_start(unsigned long acpibase) | ||
81 | { | ||
82 | unsigned long val32; | ||
83 | |||
84 | /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ | ||
85 | val32 = inl(SMI_EN); | ||
86 | val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ | ||
87 | outl(val32, SMI_EN); /* Needed to activate watchdog */ | ||
88 | } | ||
89 | |||
90 | static void supermicro_old_pre_stop(unsigned long acpibase) | ||
91 | { | ||
92 | unsigned long val32; | ||
93 | |||
94 | /* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */ | ||
95 | val32 = inl(SMI_EN); | ||
96 | val32 |= 0x00002000; /* Turn on SMI clearing watchdog */ | ||
97 | outl(val32, SMI_EN); /* Needed to deactivate watchdog */ | ||
98 | } | ||
99 | |||
80 | static void supermicro_old_pre_keepalive(unsigned long acpibase) | 100 | static void supermicro_old_pre_keepalive(unsigned long acpibase) |
81 | { | 101 | { |
82 | /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */ | 102 | /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */ |
@@ -228,14 +248,18 @@ static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat) | |||
228 | void iTCO_vendor_pre_start(unsigned long acpibase, | 248 | void iTCO_vendor_pre_start(unsigned long acpibase, |
229 | unsigned int heartbeat) | 249 | unsigned int heartbeat) |
230 | { | 250 | { |
231 | if (vendorsupport == SUPERMICRO_NEW_BOARD) | 251 | if (vendorsupport == SUPERMICRO_OLD_BOARD) |
252 | supermicro_old_pre_start(acpibase); | ||
253 | else if (vendorsupport == SUPERMICRO_NEW_BOARD) | ||
232 | supermicro_new_pre_start(heartbeat); | 254 | supermicro_new_pre_start(heartbeat); |
233 | } | 255 | } |
234 | EXPORT_SYMBOL(iTCO_vendor_pre_start); | 256 | EXPORT_SYMBOL(iTCO_vendor_pre_start); |
235 | 257 | ||
236 | void iTCO_vendor_pre_stop(unsigned long acpibase) | 258 | void iTCO_vendor_pre_stop(unsigned long acpibase) |
237 | { | 259 | { |
238 | if (vendorsupport == SUPERMICRO_NEW_BOARD) | 260 | if (vendorsupport == SUPERMICRO_OLD_BOARD) |
261 | supermicro_old_pre_stop(acpibase); | ||
262 | else if (vendorsupport == SUPERMICRO_NEW_BOARD) | ||
239 | supermicro_new_pre_stop(); | 263 | supermicro_new_pre_stop(); |
240 | } | 264 | } |
241 | EXPORT_SYMBOL(iTCO_vendor_pre_stop); | 265 | EXPORT_SYMBOL(iTCO_vendor_pre_stop); |
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c index 5b395a4ddfdf..352334947ea3 100644 --- a/drivers/watchdog/iTCO_wdt.c +++ b/drivers/watchdog/iTCO_wdt.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets) | 2 | * intel TCO Watchdog Driver (Used in i82801 and i63xxESB chipsets) |
3 | * | 3 | * |
4 | * (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>. | 4 | * (c) Copyright 2006-2009 Wim Van Sebroeck <wim@iguana.be>. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU General Public License | 7 | * modify it under the terms of the GNU General Public License |
@@ -63,7 +63,7 @@ | |||
63 | 63 | ||
64 | /* Module and version information */ | 64 | /* Module and version information */ |
65 | #define DRV_NAME "iTCO_wdt" | 65 | #define DRV_NAME "iTCO_wdt" |
66 | #define DRV_VERSION "1.04" | 66 | #define DRV_VERSION "1.05" |
67 | #define PFX DRV_NAME ": " | 67 | #define PFX DRV_NAME ": " |
68 | 68 | ||
69 | /* Includes */ | 69 | /* Includes */ |
@@ -236,16 +236,16 @@ MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl); | |||
236 | 236 | ||
237 | /* Address definitions for the TCO */ | 237 | /* Address definitions for the TCO */ |
238 | /* TCO base address */ | 238 | /* TCO base address */ |
239 | #define TCOBASE iTCO_wdt_private.ACPIBASE + 0x60 | 239 | #define TCOBASE iTCO_wdt_private.ACPIBASE + 0x60 |
240 | /* SMI Control and Enable Register */ | 240 | /* SMI Control and Enable Register */ |
241 | #define SMI_EN iTCO_wdt_private.ACPIBASE + 0x30 | 241 | #define SMI_EN iTCO_wdt_private.ACPIBASE + 0x30 |
242 | 242 | ||
243 | #define TCO_RLD TCOBASE + 0x00 /* TCO Timer Reload and Curr. Value */ | 243 | #define TCO_RLD TCOBASE + 0x00 /* TCO Timer Reload and Curr. Value */ |
244 | #define TCOv1_TMR TCOBASE + 0x01 /* TCOv1 Timer Initial Value */ | 244 | #define TCOv1_TMR TCOBASE + 0x01 /* TCOv1 Timer Initial Value */ |
245 | #define TCO_DAT_IN TCOBASE + 0x02 /* TCO Data In Register */ | 245 | #define TCO_DAT_IN TCOBASE + 0x02 /* TCO Data In Register */ |
246 | #define TCO_DAT_OUT TCOBASE + 0x03 /* TCO Data Out Register */ | 246 | #define TCO_DAT_OUT TCOBASE + 0x03 /* TCO Data Out Register */ |
247 | #define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */ | 247 | #define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */ |
248 | #define TCO2_STS TCOBASE + 0x06 /* TCO2 Status Register */ | 248 | #define TCO2_STS TCOBASE + 0x06 /* TCO2 Status Register */ |
249 | #define TCO1_CNT TCOBASE + 0x08 /* TCO1 Control Register */ | 249 | #define TCO1_CNT TCOBASE + 0x08 /* TCO1 Control Register */ |
250 | #define TCO2_CNT TCOBASE + 0x0a /* TCO2 Control Register */ | 250 | #define TCO2_CNT TCOBASE + 0x0a /* TCO2 Control Register */ |
251 | #define TCOv2_TMR TCOBASE + 0x12 /* TCOv2 Timer Initial Value */ | 251 | #define TCOv2_TMR TCOBASE + 0x12 /* TCOv2 Timer Initial Value */ |
@@ -338,7 +338,6 @@ static int iTCO_wdt_unset_NO_REBOOT_bit(void) | |||
338 | static int iTCO_wdt_start(void) | 338 | static int iTCO_wdt_start(void) |
339 | { | 339 | { |
340 | unsigned int val; | 340 | unsigned int val; |
341 | unsigned long val32; | ||
342 | 341 | ||
343 | spin_lock(&iTCO_wdt_private.io_lock); | 342 | spin_lock(&iTCO_wdt_private.io_lock); |
344 | 343 | ||
@@ -351,11 +350,6 @@ static int iTCO_wdt_start(void) | |||
351 | return -EIO; | 350 | return -EIO; |
352 | } | 351 | } |
353 | 352 | ||
354 | /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ | ||
355 | val32 = inl(SMI_EN); | ||
356 | val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ | ||
357 | outl(val32, SMI_EN); | ||
358 | |||
359 | /* Force the timer to its reload value by writing to the TCO_RLD | 353 | /* Force the timer to its reload value by writing to the TCO_RLD |
360 | register */ | 354 | register */ |
361 | if (iTCO_wdt_private.iTCO_version == 2) | 355 | if (iTCO_wdt_private.iTCO_version == 2) |
@@ -378,7 +372,6 @@ static int iTCO_wdt_start(void) | |||
378 | static int iTCO_wdt_stop(void) | 372 | static int iTCO_wdt_stop(void) |
379 | { | 373 | { |
380 | unsigned int val; | 374 | unsigned int val; |
381 | unsigned long val32; | ||
382 | 375 | ||
383 | spin_lock(&iTCO_wdt_private.io_lock); | 376 | spin_lock(&iTCO_wdt_private.io_lock); |
384 | 377 | ||
@@ -390,11 +383,6 @@ static int iTCO_wdt_stop(void) | |||
390 | outw(val, TCO1_CNT); | 383 | outw(val, TCO1_CNT); |
391 | val = inw(TCO1_CNT); | 384 | val = inw(TCO1_CNT); |
392 | 385 | ||
393 | /* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */ | ||
394 | val32 = inl(SMI_EN); | ||
395 | val32 |= 0x00002000; | ||
396 | outl(val32, SMI_EN); | ||
397 | |||
398 | /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ | 386 | /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ |
399 | iTCO_wdt_set_NO_REBOOT_bit(); | 387 | iTCO_wdt_set_NO_REBOOT_bit(); |
400 | 388 | ||
@@ -649,6 +637,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, | |||
649 | int ret; | 637 | int ret; |
650 | u32 base_address; | 638 | u32 base_address; |
651 | unsigned long RCBA; | 639 | unsigned long RCBA; |
640 | unsigned long val32; | ||
652 | 641 | ||
653 | /* | 642 | /* |
654 | * Find the ACPI/PM base I/O address which is the base | 643 | * Find the ACPI/PM base I/O address which is the base |
@@ -695,6 +684,10 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, | |||
695 | ret = -EIO; | 684 | ret = -EIO; |
696 | goto out; | 685 | goto out; |
697 | } | 686 | } |
687 | /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ | ||
688 | val32 = inl(SMI_EN); | ||
689 | val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ | ||
690 | outl(val32, SMI_EN); | ||
698 | 691 | ||
699 | /* The TCO I/O registers reside in a 32-byte range pointed to | 692 | /* The TCO I/O registers reside in a 32-byte range pointed to |
700 | by the TCOBASE value */ | 693 | by the TCOBASE value */ |