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path: root/drivers/watchdog/pnx4008_wdt.c
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Diffstat (limited to 'drivers/watchdog/pnx4008_wdt.c')
-rw-r--r--drivers/watchdog/pnx4008_wdt.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c
index 6d9f3d4a9987..64135195f827 100644
--- a/drivers/watchdog/pnx4008_wdt.c
+++ b/drivers/watchdog/pnx4008_wdt.c
@@ -54,22 +54,22 @@
54 54
55/* WDTIM_CTRL bit definitions */ 55/* WDTIM_CTRL bit definitions */
56#define COUNT_ENAB 1 56#define COUNT_ENAB 1
57#define RESET_COUNT (1<<1) 57#define RESET_COUNT (1 << 1)
58#define DEBUG_EN (1<<2) 58#define DEBUG_EN (1 << 2)
59 59
60/* WDTIM_MCTRL bit definitions */ 60/* WDTIM_MCTRL bit definitions */
61#define MR0_INT 1 61#define MR0_INT 1
62#undef RESET_COUNT0 62#undef RESET_COUNT0
63#define RESET_COUNT0 (1<<2) 63#define RESET_COUNT0 (1 << 2)
64#define STOP_COUNT0 (1<<2) 64#define STOP_COUNT0 (1 << 2)
65#define M_RES1 (1<<3) 65#define M_RES1 (1 << 3)
66#define M_RES2 (1<<4) 66#define M_RES2 (1 << 4)
67#define RESFRC1 (1<<5) 67#define RESFRC1 (1 << 5)
68#define RESFRC2 (1<<6) 68#define RESFRC2 (1 << 6)
69 69
70/* WDTIM_EMR bit definitions */ 70/* WDTIM_EMR bit definitions */
71#define EXT_MATCH0 1 71#define EXT_MATCH0 1
72#define MATCH_OUTPUT_HIGH (2<<4) /*a MATCH_CTRL setting */ 72#define MATCH_OUTPUT_HIGH (2 << 4) /*a MATCH_CTRL setting */
73 73
74/* WDTIM_RES bit definitions */ 74/* WDTIM_RES bit definitions */
75#define WDOG_RESET 1 /* read only */ 75#define WDOG_RESET 1 /* read only */