diff options
Diffstat (limited to 'drivers/watchdog/omap_wdt.c')
-rw-r--r-- | drivers/watchdog/omap_wdt.c | 337 |
1 files changed, 224 insertions, 113 deletions
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c index 3a11dadfd8e7..7bcbb7f4745f 100644 --- a/drivers/watchdog/omap_wdt.c +++ b/drivers/watchdog/omap_wdt.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/char/watchdog/omap_wdt.c | 2 | * omap_wdt.c |
3 | * | 3 | * |
4 | * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog | 4 | * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog |
5 | * | 5 | * |
6 | * Author: MontaVista Software, Inc. | 6 | * Author: MontaVista Software, Inc. |
7 | * <gdavis@mvista.com> or <source@mvista.com> | 7 | * <gdavis@mvista.com> or <source@mvista.com> |
@@ -47,50 +47,68 @@ | |||
47 | 47 | ||
48 | #include "omap_wdt.h" | 48 | #include "omap_wdt.h" |
49 | 49 | ||
50 | static struct platform_device *omap_wdt_dev; | ||
51 | |||
50 | static unsigned timer_margin; | 52 | static unsigned timer_margin; |
51 | module_param(timer_margin, uint, 0); | 53 | module_param(timer_margin, uint, 0); |
52 | MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); | 54 | MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); |
53 | 55 | ||
54 | static int omap_wdt_users; | ||
55 | static struct clk *armwdt_ck; | ||
56 | static struct clk *mpu_wdt_ick; | ||
57 | static struct clk *mpu_wdt_fck; | ||
58 | |||
59 | static unsigned int wdt_trgr_pattern = 0x1234; | 56 | static unsigned int wdt_trgr_pattern = 0x1234; |
60 | static spinlock_t wdt_lock; | 57 | static spinlock_t wdt_lock; |
61 | 58 | ||
62 | static void omap_wdt_ping(void) | 59 | struct omap_wdt_dev { |
60 | void __iomem *base; /* physical */ | ||
61 | struct device *dev; | ||
62 | int omap_wdt_users; | ||
63 | struct clk *armwdt_ck; | ||
64 | struct clk *mpu_wdt_ick; | ||
65 | struct clk *mpu_wdt_fck; | ||
66 | struct resource *mem; | ||
67 | struct miscdevice omap_wdt_miscdev; | ||
68 | }; | ||
69 | |||
70 | static void omap_wdt_ping(struct omap_wdt_dev *wdev) | ||
63 | { | 71 | { |
72 | void __iomem *base = wdev->base; | ||
73 | |||
64 | /* wait for posted write to complete */ | 74 | /* wait for posted write to complete */ |
65 | while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) | 75 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) |
66 | cpu_relax(); | 76 | cpu_relax(); |
77 | |||
67 | wdt_trgr_pattern = ~wdt_trgr_pattern; | 78 | wdt_trgr_pattern = ~wdt_trgr_pattern; |
68 | omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR)); | 79 | __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR)); |
80 | |||
69 | /* wait for posted write to complete */ | 81 | /* wait for posted write to complete */ |
70 | while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) | 82 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) |
71 | cpu_relax(); | 83 | cpu_relax(); |
72 | /* reloaded WCRR from WLDR */ | 84 | /* reloaded WCRR from WLDR */ |
73 | } | 85 | } |
74 | 86 | ||
75 | static void omap_wdt_enable(void) | 87 | static void omap_wdt_enable(struct omap_wdt_dev *wdev) |
76 | { | 88 | { |
89 | void __iomem *base = wdev->base; | ||
90 | |||
77 | /* Sequence to enable the watchdog */ | 91 | /* Sequence to enable the watchdog */ |
78 | omap_writel(0xBBBB, OMAP_WATCHDOG_SPR); | 92 | __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR); |
79 | while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) | 93 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) |
80 | cpu_relax(); | 94 | cpu_relax(); |
81 | omap_writel(0x4444, OMAP_WATCHDOG_SPR); | 95 | |
82 | while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) | 96 | __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR); |
97 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) | ||
83 | cpu_relax(); | 98 | cpu_relax(); |
84 | } | 99 | } |
85 | 100 | ||
86 | static void omap_wdt_disable(void) | 101 | static void omap_wdt_disable(struct omap_wdt_dev *wdev) |
87 | { | 102 | { |
103 | void __iomem *base = wdev->base; | ||
104 | |||
88 | /* sequence required to disable watchdog */ | 105 | /* sequence required to disable watchdog */ |
89 | omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */ | 106 | __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ |
90 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) | 107 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) |
91 | cpu_relax(); | 108 | cpu_relax(); |
92 | omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */ | 109 | |
93 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) | 110 | __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ |
111 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) | ||
94 | cpu_relax(); | 112 | cpu_relax(); |
95 | } | 113 | } |
96 | 114 | ||
@@ -103,83 +121,90 @@ static void omap_wdt_adjust_timeout(unsigned new_timeout) | |||
103 | timer_margin = new_timeout; | 121 | timer_margin = new_timeout; |
104 | } | 122 | } |
105 | 123 | ||
106 | static void omap_wdt_set_timeout(void) | 124 | static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev) |
107 | { | 125 | { |
108 | u32 pre_margin = GET_WLDR_VAL(timer_margin); | 126 | u32 pre_margin = GET_WLDR_VAL(timer_margin); |
127 | void __iomem *base = wdev->base; | ||
109 | 128 | ||
110 | /* just count up at 32 KHz */ | 129 | /* just count up at 32 KHz */ |
111 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04) | 130 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) |
112 | cpu_relax(); | 131 | cpu_relax(); |
113 | omap_writel(pre_margin, OMAP_WATCHDOG_LDR); | 132 | |
114 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04) | 133 | __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR); |
134 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) | ||
115 | cpu_relax(); | 135 | cpu_relax(); |
116 | } | 136 | } |
117 | 137 | ||
118 | /* | 138 | /* |
119 | * Allow only one task to hold it open | 139 | * Allow only one task to hold it open |
120 | */ | 140 | */ |
121 | |||
122 | static int omap_wdt_open(struct inode *inode, struct file *file) | 141 | static int omap_wdt_open(struct inode *inode, struct file *file) |
123 | { | 142 | { |
124 | if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users)) | 143 | struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev); |
144 | void __iomem *base = wdev->base; | ||
145 | |||
146 | if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users))) | ||
125 | return -EBUSY; | 147 | return -EBUSY; |
126 | 148 | ||
127 | if (cpu_is_omap16xx()) | 149 | if (cpu_is_omap16xx()) |
128 | clk_enable(armwdt_ck); /* Enable the clock */ | 150 | clk_enable(wdev->armwdt_ck); /* Enable the clock */ |
129 | 151 | ||
130 | if (cpu_is_omap24xx()) { | 152 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
131 | clk_enable(mpu_wdt_ick); /* Enable the interface clock */ | 153 | clk_enable(wdev->mpu_wdt_ick); /* Enable the interface clock */ |
132 | clk_enable(mpu_wdt_fck); /* Enable the functional clock */ | 154 | clk_enable(wdev->mpu_wdt_fck); /* Enable the functional clock */ |
133 | } | 155 | } |
134 | 156 | ||
135 | /* initialize prescaler */ | 157 | /* initialize prescaler */ |
136 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01) | 158 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) |
137 | cpu_relax(); | 159 | cpu_relax(); |
138 | omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL); | 160 | |
139 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01) | 161 | __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL); |
162 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) | ||
140 | cpu_relax(); | 163 | cpu_relax(); |
141 | 164 | ||
142 | omap_wdt_set_timeout(); | 165 | file->private_data = (void *) wdev; |
143 | omap_wdt_enable(); | 166 | |
167 | omap_wdt_set_timeout(wdev); | ||
168 | omap_wdt_enable(wdev); | ||
169 | |||
144 | return nonseekable_open(inode, file); | 170 | return nonseekable_open(inode, file); |
145 | } | 171 | } |
146 | 172 | ||
147 | static int omap_wdt_release(struct inode *inode, struct file *file) | 173 | static int omap_wdt_release(struct inode *inode, struct file *file) |
148 | { | 174 | { |
175 | struct omap_wdt_dev *wdev = file->private_data; | ||
176 | |||
149 | /* | 177 | /* |
150 | * Shut off the timer unless NOWAYOUT is defined. | 178 | * Shut off the timer unless NOWAYOUT is defined. |
151 | */ | 179 | */ |
152 | #ifndef CONFIG_WATCHDOG_NOWAYOUT | 180 | #ifndef CONFIG_WATCHDOG_NOWAYOUT |
153 | omap_wdt_disable(); | ||
154 | 181 | ||
155 | if (cpu_is_omap16xx()) { | 182 | omap_wdt_disable(wdev); |
156 | clk_disable(armwdt_ck); /* Disable the clock */ | ||
157 | clk_put(armwdt_ck); | ||
158 | armwdt_ck = NULL; | ||
159 | } | ||
160 | 183 | ||
161 | if (cpu_is_omap24xx()) { | 184 | if (cpu_is_omap16xx()) |
162 | clk_disable(mpu_wdt_ick); /* Disable the clock */ | 185 | clk_disable(wdev->armwdt_ck); /* Disable the clock */ |
163 | clk_disable(mpu_wdt_fck); /* Disable the clock */ | 186 | |
164 | clk_put(mpu_wdt_ick); | 187 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
165 | clk_put(mpu_wdt_fck); | 188 | clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */ |
166 | mpu_wdt_ick = NULL; | 189 | clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */ |
167 | mpu_wdt_fck = NULL; | ||
168 | } | 190 | } |
169 | #else | 191 | #else |
170 | printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); | 192 | printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); |
171 | #endif | 193 | #endif |
172 | omap_wdt_users = 0; | 194 | wdev->omap_wdt_users = 0; |
195 | |||
173 | return 0; | 196 | return 0; |
174 | } | 197 | } |
175 | 198 | ||
176 | static ssize_t omap_wdt_write(struct file *file, const char __user *data, | 199 | static ssize_t omap_wdt_write(struct file *file, const char __user *data, |
177 | size_t len, loff_t *ppos) | 200 | size_t len, loff_t *ppos) |
178 | { | 201 | { |
202 | struct omap_wdt_dev *wdev = file->private_data; | ||
203 | |||
179 | /* Refresh LOAD_TIME. */ | 204 | /* Refresh LOAD_TIME. */ |
180 | if (len) { | 205 | if (len) { |
181 | spin_lock(&wdt_lock); | 206 | spin_lock(&wdt_lock); |
182 | omap_wdt_ping(); | 207 | omap_wdt_ping(wdev); |
183 | spin_unlock(&wdt_lock); | 208 | spin_unlock(&wdt_lock); |
184 | } | 209 | } |
185 | return len; | 210 | return len; |
@@ -188,6 +213,7 @@ static ssize_t omap_wdt_write(struct file *file, const char __user *data, | |||
188 | static long omap_wdt_ioctl(struct file *file, unsigned int cmd, | 213 | static long omap_wdt_ioctl(struct file *file, unsigned int cmd, |
189 | unsigned long arg) | 214 | unsigned long arg) |
190 | { | 215 | { |
216 | struct omap_wdt_dev *wdev; | ||
191 | int new_margin; | 217 | int new_margin; |
192 | static const struct watchdog_info ident = { | 218 | static const struct watchdog_info ident = { |
193 | .identity = "OMAP Watchdog", | 219 | .identity = "OMAP Watchdog", |
@@ -195,6 +221,8 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd, | |||
195 | .firmware_version = 0, | 221 | .firmware_version = 0, |
196 | }; | 222 | }; |
197 | 223 | ||
224 | wdev = file->private_data; | ||
225 | |||
198 | switch (cmd) { | 226 | switch (cmd) { |
199 | case WDIOC_GETSUPPORT: | 227 | case WDIOC_GETSUPPORT: |
200 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | 228 | return copy_to_user((struct watchdog_info __user *)arg, &ident, |
@@ -203,14 +231,14 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd, | |||
203 | return put_user(0, (int __user *)arg); | 231 | return put_user(0, (int __user *)arg); |
204 | case WDIOC_GETBOOTSTATUS: | 232 | case WDIOC_GETBOOTSTATUS: |
205 | if (cpu_is_omap16xx()) | 233 | if (cpu_is_omap16xx()) |
206 | return put_user(omap_readw(ARM_SYSST), | 234 | return put_user(__raw_readw(ARM_SYSST), |
207 | (int __user *)arg); | 235 | (int __user *)arg); |
208 | if (cpu_is_omap24xx()) | 236 | if (cpu_is_omap24xx()) |
209 | return put_user(omap_prcm_get_reset_sources(), | 237 | return put_user(omap_prcm_get_reset_sources(), |
210 | (int __user *)arg); | 238 | (int __user *)arg); |
211 | case WDIOC_KEEPALIVE: | 239 | case WDIOC_KEEPALIVE: |
212 | spin_lock(&wdt_lock); | 240 | spin_lock(&wdt_lock); |
213 | omap_wdt_ping(); | 241 | omap_wdt_ping(wdev); |
214 | spin_unlock(&wdt_lock); | 242 | spin_unlock(&wdt_lock); |
215 | return 0; | 243 | return 0; |
216 | case WDIOC_SETTIMEOUT: | 244 | case WDIOC_SETTIMEOUT: |
@@ -219,11 +247,11 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd, | |||
219 | omap_wdt_adjust_timeout(new_margin); | 247 | omap_wdt_adjust_timeout(new_margin); |
220 | 248 | ||
221 | spin_lock(&wdt_lock); | 249 | spin_lock(&wdt_lock); |
222 | omap_wdt_disable(); | 250 | omap_wdt_disable(wdev); |
223 | omap_wdt_set_timeout(); | 251 | omap_wdt_set_timeout(wdev); |
224 | omap_wdt_enable(); | 252 | omap_wdt_enable(wdev); |
225 | 253 | ||
226 | omap_wdt_ping(); | 254 | omap_wdt_ping(wdev); |
227 | spin_unlock(&wdt_lock); | 255 | spin_unlock(&wdt_lock); |
228 | /* Fall */ | 256 | /* Fall */ |
229 | case WDIOC_GETTIMEOUT: | 257 | case WDIOC_GETTIMEOUT: |
@@ -241,96 +269,173 @@ static const struct file_operations omap_wdt_fops = { | |||
241 | .release = omap_wdt_release, | 269 | .release = omap_wdt_release, |
242 | }; | 270 | }; |
243 | 271 | ||
244 | static struct miscdevice omap_wdt_miscdev = { | ||
245 | .minor = WATCHDOG_MINOR, | ||
246 | .name = "watchdog", | ||
247 | .fops = &omap_wdt_fops, | ||
248 | }; | ||
249 | |||
250 | static int __init omap_wdt_probe(struct platform_device *pdev) | 272 | static int __init omap_wdt_probe(struct platform_device *pdev) |
251 | { | 273 | { |
252 | struct resource *res, *mem; | 274 | struct resource *res, *mem; |
275 | struct omap_wdt_dev *wdev; | ||
253 | int ret; | 276 | int ret; |
254 | 277 | ||
255 | /* reserve static register mappings */ | 278 | /* reserve static register mappings */ |
256 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 279 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
257 | if (!res) | 280 | if (!res) { |
258 | return -ENOENT; | 281 | ret = -ENOENT; |
282 | goto err_get_resource; | ||
283 | } | ||
284 | |||
285 | if (omap_wdt_dev) { | ||
286 | ret = -EBUSY; | ||
287 | goto err_busy; | ||
288 | } | ||
259 | 289 | ||
260 | mem = request_mem_region(res->start, res->end - res->start + 1, | 290 | mem = request_mem_region(res->start, res->end - res->start + 1, |
261 | pdev->name); | 291 | pdev->name); |
262 | if (mem == NULL) | 292 | if (!mem) { |
263 | return -EBUSY; | 293 | ret = -EBUSY; |
294 | goto err_busy; | ||
295 | } | ||
264 | 296 | ||
265 | platform_set_drvdata(pdev, mem); | 297 | wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL); |
298 | if (!wdev) { | ||
299 | ret = -ENOMEM; | ||
300 | goto err_kzalloc; | ||
301 | } | ||
266 | 302 | ||
267 | omap_wdt_users = 0; | 303 | wdev->omap_wdt_users = 0; |
304 | wdev->mem = mem; | ||
268 | 305 | ||
269 | if (cpu_is_omap16xx()) { | 306 | if (cpu_is_omap16xx()) { |
270 | armwdt_ck = clk_get(&pdev->dev, "armwdt_ck"); | 307 | wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck"); |
271 | if (IS_ERR(armwdt_ck)) { | 308 | if (IS_ERR(wdev->armwdt_ck)) { |
272 | ret = PTR_ERR(armwdt_ck); | 309 | ret = PTR_ERR(wdev->armwdt_ck); |
273 | armwdt_ck = NULL; | 310 | wdev->armwdt_ck = NULL; |
274 | goto fail; | 311 | goto err_clk; |
275 | } | 312 | } |
276 | } | 313 | } |
277 | 314 | ||
278 | if (cpu_is_omap24xx()) { | 315 | if (cpu_is_omap24xx()) { |
279 | mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick"); | 316 | wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick"); |
280 | if (IS_ERR(mpu_wdt_ick)) { | 317 | if (IS_ERR(wdev->mpu_wdt_ick)) { |
281 | ret = PTR_ERR(mpu_wdt_ick); | 318 | ret = PTR_ERR(wdev->mpu_wdt_ick); |
282 | mpu_wdt_ick = NULL; | 319 | wdev->mpu_wdt_ick = NULL; |
283 | goto fail; | 320 | goto err_clk; |
284 | } | 321 | } |
285 | mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck"); | 322 | wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck"); |
286 | if (IS_ERR(mpu_wdt_fck)) { | 323 | if (IS_ERR(wdev->mpu_wdt_fck)) { |
287 | ret = PTR_ERR(mpu_wdt_fck); | 324 | ret = PTR_ERR(wdev->mpu_wdt_fck); |
288 | mpu_wdt_fck = NULL; | 325 | wdev->mpu_wdt_fck = NULL; |
289 | goto fail; | 326 | goto err_clk; |
290 | } | 327 | } |
291 | } | 328 | } |
292 | 329 | ||
293 | omap_wdt_disable(); | 330 | if (cpu_is_omap34xx()) { |
331 | wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick"); | ||
332 | if (IS_ERR(wdev->mpu_wdt_ick)) { | ||
333 | ret = PTR_ERR(wdev->mpu_wdt_ick); | ||
334 | wdev->mpu_wdt_ick = NULL; | ||
335 | goto err_clk; | ||
336 | } | ||
337 | wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck"); | ||
338 | if (IS_ERR(wdev->mpu_wdt_fck)) { | ||
339 | ret = PTR_ERR(wdev->mpu_wdt_fck); | ||
340 | wdev->mpu_wdt_fck = NULL; | ||
341 | goto err_clk; | ||
342 | } | ||
343 | } | ||
344 | wdev->base = ioremap(res->start, res->end - res->start + 1); | ||
345 | if (!wdev->base) { | ||
346 | ret = -ENOMEM; | ||
347 | goto err_ioremap; | ||
348 | } | ||
349 | |||
350 | platform_set_drvdata(pdev, wdev); | ||
351 | |||
352 | omap_wdt_disable(wdev); | ||
294 | omap_wdt_adjust_timeout(timer_margin); | 353 | omap_wdt_adjust_timeout(timer_margin); |
295 | 354 | ||
296 | omap_wdt_miscdev.parent = &pdev->dev; | 355 | wdev->omap_wdt_miscdev.parent = &pdev->dev; |
297 | ret = misc_register(&omap_wdt_miscdev); | 356 | wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR; |
357 | wdev->omap_wdt_miscdev.name = "watchdog"; | ||
358 | wdev->omap_wdt_miscdev.fops = &omap_wdt_fops; | ||
359 | |||
360 | ret = misc_register(&(wdev->omap_wdt_miscdev)); | ||
298 | if (ret) | 361 | if (ret) |
299 | goto fail; | 362 | goto err_misc; |
300 | 363 | ||
301 | pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin); | 364 | pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n", |
365 | __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF, | ||
366 | timer_margin); | ||
302 | 367 | ||
303 | /* autogate OCP interface clock */ | 368 | /* autogate OCP interface clock */ |
304 | omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG); | 369 | __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG); |
370 | |||
371 | omap_wdt_dev = pdev; | ||
372 | |||
305 | return 0; | 373 | return 0; |
306 | 374 | ||
307 | fail: | 375 | err_misc: |
308 | if (armwdt_ck) | 376 | platform_set_drvdata(pdev, NULL); |
309 | clk_put(armwdt_ck); | 377 | iounmap(wdev->base); |
310 | if (mpu_wdt_ick) | 378 | |
311 | clk_put(mpu_wdt_ick); | 379 | err_ioremap: |
312 | if (mpu_wdt_fck) | 380 | wdev->base = NULL; |
313 | clk_put(mpu_wdt_fck); | 381 | |
314 | release_resource(mem); | 382 | err_clk: |
383 | if (wdev->armwdt_ck) | ||
384 | clk_put(wdev->armwdt_ck); | ||
385 | if (wdev->mpu_wdt_ick) | ||
386 | clk_put(wdev->mpu_wdt_ick); | ||
387 | if (wdev->mpu_wdt_fck) | ||
388 | clk_put(wdev->mpu_wdt_fck); | ||
389 | kfree(wdev); | ||
390 | |||
391 | err_kzalloc: | ||
392 | release_mem_region(res->start, res->end - res->start + 1); | ||
393 | |||
394 | err_busy: | ||
395 | err_get_resource: | ||
396 | |||
315 | return ret; | 397 | return ret; |
316 | } | 398 | } |
317 | 399 | ||
318 | static void omap_wdt_shutdown(struct platform_device *pdev) | 400 | static void omap_wdt_shutdown(struct platform_device *pdev) |
319 | { | 401 | { |
320 | omap_wdt_disable(); | 402 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
403 | |||
404 | if (wdev->omap_wdt_users) | ||
405 | omap_wdt_disable(wdev); | ||
321 | } | 406 | } |
322 | 407 | ||
323 | static int omap_wdt_remove(struct platform_device *pdev) | 408 | static int omap_wdt_remove(struct platform_device *pdev) |
324 | { | 409 | { |
325 | struct resource *mem = platform_get_drvdata(pdev); | 410 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
326 | misc_deregister(&omap_wdt_miscdev); | 411 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
327 | release_resource(mem); | 412 | |
328 | if (armwdt_ck) | 413 | if (!res) |
329 | clk_put(armwdt_ck); | 414 | return -ENOENT; |
330 | if (mpu_wdt_ick) | 415 | |
331 | clk_put(mpu_wdt_ick); | 416 | misc_deregister(&(wdev->omap_wdt_miscdev)); |
332 | if (mpu_wdt_fck) | 417 | release_mem_region(res->start, res->end - res->start + 1); |
333 | clk_put(mpu_wdt_fck); | 418 | platform_set_drvdata(pdev, NULL); |
419 | |||
420 | if (wdev->armwdt_ck) { | ||
421 | clk_put(wdev->armwdt_ck); | ||
422 | wdev->armwdt_ck = NULL; | ||
423 | } | ||
424 | |||
425 | if (wdev->mpu_wdt_ick) { | ||
426 | clk_put(wdev->mpu_wdt_ick); | ||
427 | wdev->mpu_wdt_ick = NULL; | ||
428 | } | ||
429 | |||
430 | if (wdev->mpu_wdt_fck) { | ||
431 | clk_put(wdev->mpu_wdt_fck); | ||
432 | wdev->mpu_wdt_fck = NULL; | ||
433 | } | ||
434 | iounmap(wdev->base); | ||
435 | |||
436 | kfree(wdev); | ||
437 | omap_wdt_dev = NULL; | ||
438 | |||
334 | return 0; | 439 | return 0; |
335 | } | 440 | } |
336 | 441 | ||
@@ -344,17 +449,23 @@ static int omap_wdt_remove(struct platform_device *pdev) | |||
344 | 449 | ||
345 | static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) | 450 | static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) |
346 | { | 451 | { |
347 | if (omap_wdt_users) | 452 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
348 | omap_wdt_disable(); | 453 | |
454 | if (wdev->omap_wdt_users) | ||
455 | omap_wdt_disable(wdev); | ||
456 | |||
349 | return 0; | 457 | return 0; |
350 | } | 458 | } |
351 | 459 | ||
352 | static int omap_wdt_resume(struct platform_device *pdev) | 460 | static int omap_wdt_resume(struct platform_device *pdev) |
353 | { | 461 | { |
354 | if (omap_wdt_users) { | 462 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
355 | omap_wdt_enable(); | 463 | |
356 | omap_wdt_ping(); | 464 | if (wdev->omap_wdt_users) { |
465 | omap_wdt_enable(wdev); | ||
466 | omap_wdt_ping(wdev); | ||
357 | } | 467 | } |
468 | |||
358 | return 0; | 469 | return 0; |
359 | } | 470 | } |
360 | 471 | ||