diff options
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/omap2/displays/panel-taal.c | 45 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dsi.c | 48 |
2 files changed, 35 insertions, 58 deletions
diff --git a/drivers/video/omap2/displays/panel-taal.c b/drivers/video/omap2/displays/panel-taal.c index 4e888ac09b3f..7675687c6fe4 100644 --- a/drivers/video/omap2/displays/panel-taal.c +++ b/drivers/video/omap2/displays/panel-taal.c | |||
@@ -35,26 +35,12 @@ | |||
35 | 35 | ||
36 | #include <video/omapdss.h> | 36 | #include <video/omapdss.h> |
37 | #include <video/omap-panel-nokia-dsi.h> | 37 | #include <video/omap-panel-nokia-dsi.h> |
38 | #include <video/mipi_display.h> | ||
38 | 39 | ||
39 | /* DSI Virtual channel. Hardcoded for now. */ | 40 | /* DSI Virtual channel. Hardcoded for now. */ |
40 | #define TCH 0 | 41 | #define TCH 0 |
41 | 42 | ||
42 | #define DCS_READ_NUM_ERRORS 0x05 | 43 | #define DCS_READ_NUM_ERRORS 0x05 |
43 | #define DCS_READ_POWER_MODE 0x0a | ||
44 | #define DCS_READ_MADCTL 0x0b | ||
45 | #define DCS_READ_PIXEL_FORMAT 0x0c | ||
46 | #define DCS_RDDSDR 0x0f | ||
47 | #define DCS_SLEEP_IN 0x10 | ||
48 | #define DCS_SLEEP_OUT 0x11 | ||
49 | #define DCS_DISPLAY_OFF 0x28 | ||
50 | #define DCS_DISPLAY_ON 0x29 | ||
51 | #define DCS_COLUMN_ADDR 0x2a | ||
52 | #define DCS_PAGE_ADDR 0x2b | ||
53 | #define DCS_MEMORY_WRITE 0x2c | ||
54 | #define DCS_TEAR_OFF 0x34 | ||
55 | #define DCS_TEAR_ON 0x35 | ||
56 | #define DCS_MEM_ACC_CTRL 0x36 | ||
57 | #define DCS_PIXEL_FORMAT 0x3a | ||
58 | #define DCS_BRIGHTNESS 0x51 | 44 | #define DCS_BRIGHTNESS 0x51 |
59 | #define DCS_CTRL_DISPLAY 0x53 | 45 | #define DCS_CTRL_DISPLAY 0x53 |
60 | #define DCS_WRITE_CABC 0x55 | 46 | #define DCS_WRITE_CABC 0x55 |
@@ -302,7 +288,7 @@ static int taal_sleep_in(struct taal_data *td) | |||
302 | 288 | ||
303 | hw_guard_wait(td); | 289 | hw_guard_wait(td); |
304 | 290 | ||
305 | cmd = DCS_SLEEP_IN; | 291 | cmd = MIPI_DCS_ENTER_SLEEP_MODE; |
306 | r = dsi_vc_dcs_write_nosync(td->dssdev, td->channel, &cmd, 1); | 292 | r = dsi_vc_dcs_write_nosync(td->dssdev, td->channel, &cmd, 1); |
307 | if (r) | 293 | if (r) |
308 | return r; | 294 | return r; |
@@ -321,7 +307,7 @@ static int taal_sleep_out(struct taal_data *td) | |||
321 | 307 | ||
322 | hw_guard_wait(td); | 308 | hw_guard_wait(td); |
323 | 309 | ||
324 | r = taal_dcs_write_0(td, DCS_SLEEP_OUT); | 310 | r = taal_dcs_write_0(td, MIPI_DCS_EXIT_SLEEP_MODE); |
325 | if (r) | 311 | if (r) |
326 | return r; | 312 | return r; |
327 | 313 | ||
@@ -356,7 +342,7 @@ static int taal_set_addr_mode(struct taal_data *td, u8 rotate, bool mirror) | |||
356 | u8 mode; | 342 | u8 mode; |
357 | int b5, b6, b7; | 343 | int b5, b6, b7; |
358 | 344 | ||
359 | r = taal_dcs_read_1(td, DCS_READ_MADCTL, &mode); | 345 | r = taal_dcs_read_1(td, MIPI_DCS_GET_ADDRESS_MODE, &mode); |
360 | if (r) | 346 | if (r) |
361 | return r; | 347 | return r; |
362 | 348 | ||
@@ -390,7 +376,7 @@ static int taal_set_addr_mode(struct taal_data *td, u8 rotate, bool mirror) | |||
390 | mode &= ~((1<<7) | (1<<6) | (1<<5)); | 376 | mode &= ~((1<<7) | (1<<6) | (1<<5)); |
391 | mode |= (b7 << 7) | (b6 << 6) | (b5 << 5); | 377 | mode |= (b7 << 7) | (b6 << 6) | (b5 << 5); |
392 | 378 | ||
393 | return taal_dcs_write_1(td, DCS_MEM_ACC_CTRL, mode); | 379 | return taal_dcs_write_1(td, MIPI_DCS_SET_ADDRESS_MODE, mode); |
394 | } | 380 | } |
395 | 381 | ||
396 | static int taal_set_update_window(struct taal_data *td, | 382 | static int taal_set_update_window(struct taal_data *td, |
@@ -403,7 +389,7 @@ static int taal_set_update_window(struct taal_data *td, | |||
403 | u16 y2 = y + h - 1; | 389 | u16 y2 = y + h - 1; |
404 | 390 | ||
405 | u8 buf[5]; | 391 | u8 buf[5]; |
406 | buf[0] = DCS_COLUMN_ADDR; | 392 | buf[0] = MIPI_DCS_SET_COLUMN_ADDRESS; |
407 | buf[1] = (x1 >> 8) & 0xff; | 393 | buf[1] = (x1 >> 8) & 0xff; |
408 | buf[2] = (x1 >> 0) & 0xff; | 394 | buf[2] = (x1 >> 0) & 0xff; |
409 | buf[3] = (x2 >> 8) & 0xff; | 395 | buf[3] = (x2 >> 8) & 0xff; |
@@ -413,7 +399,7 @@ static int taal_set_update_window(struct taal_data *td, | |||
413 | if (r) | 399 | if (r) |
414 | return r; | 400 | return r; |
415 | 401 | ||
416 | buf[0] = DCS_PAGE_ADDR; | 402 | buf[0] = MIPI_DCS_SET_PAGE_ADDRESS; |
417 | buf[1] = (y1 >> 8) & 0xff; | 403 | buf[1] = (y1 >> 8) & 0xff; |
418 | buf[2] = (y1 >> 0) & 0xff; | 404 | buf[2] = (y1 >> 0) & 0xff; |
419 | buf[3] = (y2 >> 8) & 0xff; | 405 | buf[3] = (y2 >> 8) & 0xff; |
@@ -1195,7 +1181,8 @@ static int taal_power_on(struct omap_dss_device *dssdev) | |||
1195 | if (r) | 1181 | if (r) |
1196 | goto err; | 1182 | goto err; |
1197 | 1183 | ||
1198 | r = taal_dcs_write_1(td, DCS_PIXEL_FORMAT, 0x7); /* 24bit/pixel */ | 1184 | r = taal_dcs_write_1(td, MIPI_DCS_SET_PIXEL_FORMAT, |
1185 | MIPI_DCS_PIXEL_FMT_24BIT); | ||
1199 | if (r) | 1186 | if (r) |
1200 | goto err; | 1187 | goto err; |
1201 | 1188 | ||
@@ -1209,7 +1196,7 @@ static int taal_power_on(struct omap_dss_device *dssdev) | |||
1209 | goto err; | 1196 | goto err; |
1210 | } | 1197 | } |
1211 | 1198 | ||
1212 | r = taal_dcs_write_0(td, DCS_DISPLAY_ON); | 1199 | r = taal_dcs_write_0(td, MIPI_DCS_SET_DISPLAY_ON); |
1213 | if (r) | 1200 | if (r) |
1214 | goto err; | 1201 | goto err; |
1215 | 1202 | ||
@@ -1246,7 +1233,7 @@ static void taal_power_off(struct omap_dss_device *dssdev) | |||
1246 | struct taal_data *td = dev_get_drvdata(&dssdev->dev); | 1233 | struct taal_data *td = dev_get_drvdata(&dssdev->dev); |
1247 | int r; | 1234 | int r; |
1248 | 1235 | ||
1249 | r = taal_dcs_write_0(td, DCS_DISPLAY_OFF); | 1236 | r = taal_dcs_write_0(td, MIPI_DCS_SET_DISPLAY_OFF); |
1250 | if (!r) | 1237 | if (!r) |
1251 | r = taal_sleep_in(td); | 1238 | r = taal_sleep_in(td); |
1252 | 1239 | ||
@@ -1529,9 +1516,9 @@ static int _taal_enable_te(struct omap_dss_device *dssdev, bool enable) | |||
1529 | int r; | 1516 | int r; |
1530 | 1517 | ||
1531 | if (enable) | 1518 | if (enable) |
1532 | r = taal_dcs_write_1(td, DCS_TEAR_ON, 0); | 1519 | r = taal_dcs_write_1(td, MIPI_DCS_SET_TEAR_ON, 0); |
1533 | else | 1520 | else |
1534 | r = taal_dcs_write_0(td, DCS_TEAR_OFF); | 1521 | r = taal_dcs_write_0(td, MIPI_DCS_SET_TEAR_OFF); |
1535 | 1522 | ||
1536 | if (!panel_data->use_ext_te) | 1523 | if (!panel_data->use_ext_te) |
1537 | omapdss_dsi_enable_te(dssdev, enable); | 1524 | omapdss_dsi_enable_te(dssdev, enable); |
@@ -1851,7 +1838,7 @@ static void taal_esd_work(struct work_struct *work) | |||
1851 | goto err; | 1838 | goto err; |
1852 | } | 1839 | } |
1853 | 1840 | ||
1854 | r = taal_dcs_read_1(td, DCS_RDDSDR, &state1); | 1841 | r = taal_dcs_read_1(td, MIPI_DCS_GET_DIAGNOSTIC_RESULT, &state1); |
1855 | if (r) { | 1842 | if (r) { |
1856 | dev_err(&dssdev->dev, "failed to read Taal status\n"); | 1843 | dev_err(&dssdev->dev, "failed to read Taal status\n"); |
1857 | goto err; | 1844 | goto err; |
@@ -1864,7 +1851,7 @@ static void taal_esd_work(struct work_struct *work) | |||
1864 | goto err; | 1851 | goto err; |
1865 | } | 1852 | } |
1866 | 1853 | ||
1867 | r = taal_dcs_read_1(td, DCS_RDDSDR, &state2); | 1854 | r = taal_dcs_read_1(td, MIPI_DCS_GET_DIAGNOSTIC_RESULT, &state2); |
1868 | if (r) { | 1855 | if (r) { |
1869 | dev_err(&dssdev->dev, "failed to read Taal status\n"); | 1856 | dev_err(&dssdev->dev, "failed to read Taal status\n"); |
1870 | goto err; | 1857 | goto err; |
@@ -1880,7 +1867,7 @@ static void taal_esd_work(struct work_struct *work) | |||
1880 | /* Self-diagnostics result is also shown on TE GPIO line. We need | 1867 | /* Self-diagnostics result is also shown on TE GPIO line. We need |
1881 | * to re-enable TE after self diagnostics */ | 1868 | * to re-enable TE after self diagnostics */ |
1882 | if (td->te_enabled && panel_data->use_ext_te) { | 1869 | if (td->te_enabled && panel_data->use_ext_te) { |
1883 | r = taal_dcs_write_1(td, DCS_TEAR_ON, 0); | 1870 | r = taal_dcs_write_1(td, MIPI_DCS_SET_TEAR_ON, 0); |
1884 | if (r) | 1871 | if (r) |
1885 | goto err; | 1872 | goto err; |
1886 | } | 1873 | } |
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 52a4a0274c7a..6735e0c8bdf7 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <linux/pm_runtime.h> | 39 | #include <linux/pm_runtime.h> |
40 | 40 | ||
41 | #include <video/omapdss.h> | 41 | #include <video/omapdss.h> |
42 | #include <video/mipi_display.h> | ||
42 | #include <plat/clock.h> | 43 | #include <plat/clock.h> |
43 | 44 | ||
44 | #include "dss.h" | 45 | #include "dss.h" |
@@ -198,18 +199,6 @@ struct dsi_reg { u16 idx; }; | |||
198 | DSI_CIO_IRQ_ERRCONTENTIONLP0_4 | DSI_CIO_IRQ_ERRCONTENTIONLP1_4 | \ | 199 | DSI_CIO_IRQ_ERRCONTENTIONLP0_4 | DSI_CIO_IRQ_ERRCONTENTIONLP1_4 | \ |
199 | DSI_CIO_IRQ_ERRCONTENTIONLP0_5 | DSI_CIO_IRQ_ERRCONTENTIONLP1_5) | 200 | DSI_CIO_IRQ_ERRCONTENTIONLP0_5 | DSI_CIO_IRQ_ERRCONTENTIONLP1_5) |
200 | 201 | ||
201 | #define DSI_DT_DCS_SHORT_WRITE_0 0x05 | ||
202 | #define DSI_DT_DCS_SHORT_WRITE_1 0x15 | ||
203 | #define DSI_DT_DCS_READ 0x06 | ||
204 | #define DSI_DT_SET_MAX_RET_PKG_SIZE 0x37 | ||
205 | #define DSI_DT_NULL_PACKET 0x09 | ||
206 | #define DSI_DT_DCS_LONG_WRITE 0x39 | ||
207 | |||
208 | #define DSI_DT_RX_ACK_WITH_ERR 0x02 | ||
209 | #define DSI_DT_RX_DCS_LONG_READ 0x1c | ||
210 | #define DSI_DT_RX_SHORT_READ_1 0x21 | ||
211 | #define DSI_DT_RX_SHORT_READ_2 0x22 | ||
212 | |||
213 | typedef void (*omap_dsi_isr_t) (void *arg, u32 mask); | 202 | typedef void (*omap_dsi_isr_t) (void *arg, u32 mask); |
214 | 203 | ||
215 | #define DSI_MAX_NR_ISRS 2 | 204 | #define DSI_MAX_NR_ISRS 2 |
@@ -2887,16 +2876,16 @@ static u16 dsi_vc_flush_receive_data(struct platform_device *dsidev, | |||
2887 | val = dsi_read_reg(dsidev, DSI_VC_SHORT_PACKET_HEADER(channel)); | 2876 | val = dsi_read_reg(dsidev, DSI_VC_SHORT_PACKET_HEADER(channel)); |
2888 | DSSERR("\trawval %#08x\n", val); | 2877 | DSSERR("\trawval %#08x\n", val); |
2889 | dt = FLD_GET(val, 5, 0); | 2878 | dt = FLD_GET(val, 5, 0); |
2890 | if (dt == DSI_DT_RX_ACK_WITH_ERR) { | 2879 | if (dt == MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT) { |
2891 | u16 err = FLD_GET(val, 23, 8); | 2880 | u16 err = FLD_GET(val, 23, 8); |
2892 | dsi_show_rx_ack_with_err(err); | 2881 | dsi_show_rx_ack_with_err(err); |
2893 | } else if (dt == DSI_DT_RX_SHORT_READ_1) { | 2882 | } else if (dt == MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE) { |
2894 | DSSERR("\tDCS short response, 1 byte: %#x\n", | 2883 | DSSERR("\tDCS short response, 1 byte: %#x\n", |
2895 | FLD_GET(val, 23, 8)); | 2884 | FLD_GET(val, 23, 8)); |
2896 | } else if (dt == DSI_DT_RX_SHORT_READ_2) { | 2885 | } else if (dt == MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE) { |
2897 | DSSERR("\tDCS short response, 2 byte: %#x\n", | 2886 | DSSERR("\tDCS short response, 2 byte: %#x\n", |
2898 | FLD_GET(val, 23, 8)); | 2887 | FLD_GET(val, 23, 8)); |
2899 | } else if (dt == DSI_DT_RX_DCS_LONG_READ) { | 2888 | } else if (dt == MIPI_DSI_RX_DCS_LONG_READ_RESPONSE) { |
2900 | DSSERR("\tDCS long response, len %d\n", | 2889 | DSSERR("\tDCS long response, len %d\n", |
2901 | FLD_GET(val, 23, 8)); | 2890 | FLD_GET(val, 23, 8)); |
2902 | dsi_vc_flush_long_data(dsidev, channel); | 2891 | dsi_vc_flush_long_data(dsidev, channel); |
@@ -3101,7 +3090,7 @@ int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel) | |||
3101 | struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); | 3090 | struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); |
3102 | u8 nullpkg[] = {0, 0, 0, 0}; | 3091 | u8 nullpkg[] = {0, 0, 0, 0}; |
3103 | 3092 | ||
3104 | return dsi_vc_send_long(dsidev, channel, DSI_DT_NULL_PACKET, nullpkg, | 3093 | return dsi_vc_send_long(dsidev, channel, MIPI_DSI_NULL_PACKET, nullpkg, |
3105 | 4, 0); | 3094 | 4, 0); |
3106 | } | 3095 | } |
3107 | EXPORT_SYMBOL(dsi_vc_send_null); | 3096 | EXPORT_SYMBOL(dsi_vc_send_null); |
@@ -3115,14 +3104,15 @@ int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel, | |||
3115 | BUG_ON(len == 0); | 3104 | BUG_ON(len == 0); |
3116 | 3105 | ||
3117 | if (len == 1) { | 3106 | if (len == 1) { |
3118 | r = dsi_vc_send_short(dsidev, channel, DSI_DT_DCS_SHORT_WRITE_0, | 3107 | r = dsi_vc_send_short(dsidev, channel, |
3119 | data[0], 0); | 3108 | MIPI_DSI_DCS_SHORT_WRITE, data[0], 0); |
3120 | } else if (len == 2) { | 3109 | } else if (len == 2) { |
3121 | r = dsi_vc_send_short(dsidev, channel, DSI_DT_DCS_SHORT_WRITE_1, | 3110 | r = dsi_vc_send_short(dsidev, channel, |
3111 | MIPI_DSI_DCS_SHORT_WRITE_PARAM, | ||
3122 | data[0] | (data[1] << 8), 0); | 3112 | data[0] | (data[1] << 8), 0); |
3123 | } else { | 3113 | } else { |
3124 | /* 0x39 = DCS Long Write */ | 3114 | /* 0x39 = DCS Long Write */ |
3125 | r = dsi_vc_send_long(dsidev, channel, DSI_DT_DCS_LONG_WRITE, | 3115 | r = dsi_vc_send_long(dsidev, channel, MIPI_DSI_DCS_LONG_WRITE, |
3126 | data, len, 0); | 3116 | data, len, 0); |
3127 | } | 3117 | } |
3128 | 3118 | ||
@@ -3188,7 +3178,7 @@ int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, | |||
3188 | if (dsi->debug_read) | 3178 | if (dsi->debug_read) |
3189 | DSSDBG("dsi_vc_dcs_read(ch%d, dcs_cmd %x)\n", channel, dcs_cmd); | 3179 | DSSDBG("dsi_vc_dcs_read(ch%d, dcs_cmd %x)\n", channel, dcs_cmd); |
3190 | 3180 | ||
3191 | r = dsi_vc_send_short(dsidev, channel, DSI_DT_DCS_READ, dcs_cmd, 0); | 3181 | r = dsi_vc_send_short(dsidev, channel, MIPI_DSI_DCS_READ, dcs_cmd, 0); |
3192 | if (r) | 3182 | if (r) |
3193 | goto err; | 3183 | goto err; |
3194 | 3184 | ||
@@ -3207,13 +3197,13 @@ int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, | |||
3207 | if (dsi->debug_read) | 3197 | if (dsi->debug_read) |
3208 | DSSDBG("\theader: %08x\n", val); | 3198 | DSSDBG("\theader: %08x\n", val); |
3209 | dt = FLD_GET(val, 5, 0); | 3199 | dt = FLD_GET(val, 5, 0); |
3210 | if (dt == DSI_DT_RX_ACK_WITH_ERR) { | 3200 | if (dt == MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT) { |
3211 | u16 err = FLD_GET(val, 23, 8); | 3201 | u16 err = FLD_GET(val, 23, 8); |
3212 | dsi_show_rx_ack_with_err(err); | 3202 | dsi_show_rx_ack_with_err(err); |
3213 | r = -EIO; | 3203 | r = -EIO; |
3214 | goto err; | 3204 | goto err; |
3215 | 3205 | ||
3216 | } else if (dt == DSI_DT_RX_SHORT_READ_1) { | 3206 | } else if (dt == MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE) { |
3217 | u8 data = FLD_GET(val, 15, 8); | 3207 | u8 data = FLD_GET(val, 15, 8); |
3218 | if (dsi->debug_read) | 3208 | if (dsi->debug_read) |
3219 | DSSDBG("\tDCS short response, 1 byte: %02x\n", data); | 3209 | DSSDBG("\tDCS short response, 1 byte: %02x\n", data); |
@@ -3226,7 +3216,7 @@ int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, | |||
3226 | buf[0] = data; | 3216 | buf[0] = data; |
3227 | 3217 | ||
3228 | return 1; | 3218 | return 1; |
3229 | } else if (dt == DSI_DT_RX_SHORT_READ_2) { | 3219 | } else if (dt == MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE) { |
3230 | u16 data = FLD_GET(val, 23, 8); | 3220 | u16 data = FLD_GET(val, 23, 8); |
3231 | if (dsi->debug_read) | 3221 | if (dsi->debug_read) |
3232 | DSSDBG("\tDCS short response, 2 byte: %04x\n", data); | 3222 | DSSDBG("\tDCS short response, 2 byte: %04x\n", data); |
@@ -3240,7 +3230,7 @@ int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, | |||
3240 | buf[1] = (data >> 8) & 0xff; | 3230 | buf[1] = (data >> 8) & 0xff; |
3241 | 3231 | ||
3242 | return 2; | 3232 | return 2; |
3243 | } else if (dt == DSI_DT_RX_DCS_LONG_READ) { | 3233 | } else if (dt == MIPI_DSI_RX_DCS_LONG_READ_RESPONSE) { |
3244 | int w; | 3234 | int w; |
3245 | int len = FLD_GET(val, 23, 8); | 3235 | int len = FLD_GET(val, 23, 8); |
3246 | if (dsi->debug_read) | 3236 | if (dsi->debug_read) |
@@ -3330,8 +3320,8 @@ int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel, | |||
3330 | { | 3320 | { |
3331 | struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); | 3321 | struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); |
3332 | 3322 | ||
3333 | return dsi_vc_send_short(dsidev, channel, DSI_DT_SET_MAX_RET_PKG_SIZE, | 3323 | return dsi_vc_send_short(dsidev, channel, |
3334 | len, 0); | 3324 | MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE, len, 0); |
3335 | } | 3325 | } |
3336 | EXPORT_SYMBOL(dsi_vc_set_max_rx_packet_size); | 3326 | EXPORT_SYMBOL(dsi_vc_set_max_rx_packet_size); |
3337 | 3327 | ||
@@ -3690,7 +3680,7 @@ static void dsi_update_screen_dispc(struct omap_dss_device *dssdev, | |||
3690 | l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */ | 3680 | l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */ |
3691 | dsi_write_reg(dsidev, DSI_VC_TE(channel), l); | 3681 | dsi_write_reg(dsidev, DSI_VC_TE(channel), l); |
3692 | 3682 | ||
3693 | dsi_vc_write_long_header(dsidev, channel, DSI_DT_DCS_LONG_WRITE, | 3683 | dsi_vc_write_long_header(dsidev, channel, MIPI_DSI_DCS_LONG_WRITE, |
3694 | packet_len, 0); | 3684 | packet_len, 0); |
3695 | 3685 | ||
3696 | if (dsi->te_enabled) | 3686 | if (dsi->te_enabled) |