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-rw-r--r--drivers/video/matrox/g450_pll.c185
-rw-r--r--drivers/video/matrox/g450_pll.h8
-rw-r--r--drivers/video/matrox/i2c-matroxfb.c12
-rw-r--r--drivers/video/matrox/matroxfb_DAC1064.c248
-rw-r--r--drivers/video/matrox/matroxfb_DAC1064.h4
-rw-r--r--drivers/video/matrox/matroxfb_Ti3026.c170
-rw-r--r--drivers/video/matrox/matroxfb_accel.c37
-rw-r--r--drivers/video/matrox/matroxfb_accel.h2
-rw-r--r--drivers/video/matrox/matroxfb_base.c124
-rw-r--r--drivers/video/matrox/matroxfb_base.h24
-rw-r--r--drivers/video/matrox/matroxfb_crtc2.c14
-rw-r--r--drivers/video/matrox/matroxfb_g450.c99
-rw-r--r--drivers/video/matrox/matroxfb_g450.h8
-rw-r--r--drivers/video/matrox/matroxfb_misc.c76
-rw-r--r--drivers/video/matrox/matroxfb_misc.h13
15 files changed, 580 insertions, 444 deletions
diff --git a/drivers/video/matrox/g450_pll.c b/drivers/video/matrox/g450_pll.c
index 8c75427ad96f..09f6e045d5be 100644
--- a/drivers/video/matrox/g450_pll.c
+++ b/drivers/video/matrox/g450_pll.c
@@ -25,7 +25,9 @@ static inline unsigned int g450_f2vco(unsigned char p, unsigned int fin) {
25 return (p & 0x40) ? fin : fin << ((p & 3) + 1); 25 return (p & 0x40) ? fin : fin << ((p & 3) + 1);
26} 26}
27 27
28static unsigned int g450_mnp2vco(CPMINFO unsigned int mnp) { 28static unsigned int g450_mnp2vco(const struct matrox_fb_info *minfo,
29 unsigned int mnp)
30{
29 unsigned int m, n; 31 unsigned int m, n;
30 32
31 m = ((mnp >> 16) & 0x0FF) + 1; 33 m = ((mnp >> 16) & 0x0FF) + 1;
@@ -33,8 +35,9 @@ static unsigned int g450_mnp2vco(CPMINFO unsigned int mnp) {
33 return (minfo->features.pll.ref_freq * n + (m >> 1)) / m; 35 return (minfo->features.pll.ref_freq * n + (m >> 1)) / m;
34} 36}
35 37
36unsigned int g450_mnp2f(CPMINFO unsigned int mnp) { 38unsigned int g450_mnp2f(const struct matrox_fb_info *minfo, unsigned int mnp)
37 return g450_vco2f(mnp, g450_mnp2vco(PMINFO mnp)); 39{
40 return g450_vco2f(mnp, g450_mnp2vco(minfo, mnp));
38} 41}
39 42
40static inline unsigned int pll_freq_delta(unsigned int f1, unsigned int f2) { 43static inline unsigned int pll_freq_delta(unsigned int f1, unsigned int f2) {
@@ -49,7 +52,10 @@ static inline unsigned int pll_freq_delta(unsigned int f1, unsigned int f2) {
49#define NO_MORE_MNP 0x01FFFFFF 52#define NO_MORE_MNP 0x01FFFFFF
50#define G450_MNP_FREQBITS (0xFFFFFF43) /* do not mask high byte so we'll catch NO_MORE_MNP */ 53#define G450_MNP_FREQBITS (0xFFFFFF43) /* do not mask high byte so we'll catch NO_MORE_MNP */
51 54
52static unsigned int g450_nextpll(CPMINFO const struct matrox_pll_limits* pi, unsigned int* fvco, unsigned int mnp) { 55static unsigned int g450_nextpll(const struct matrox_fb_info *minfo,
56 const struct matrox_pll_limits *pi,
57 unsigned int *fvco, unsigned int mnp)
58{
53 unsigned int m, n, p; 59 unsigned int m, n, p;
54 unsigned int tvco = *fvco; 60 unsigned int tvco = *fvco;
55 61
@@ -95,7 +101,10 @@ static unsigned int g450_nextpll(CPMINFO const struct matrox_pll_limits* pi, uns
95 return (m << 16) | (n << 8) | p; 101 return (m << 16) | (n << 8) | p;
96} 102}
97 103
98static unsigned int g450_firstpll(CPMINFO const struct matrox_pll_limits* pi, unsigned int* vco, unsigned int fout) { 104static unsigned int g450_firstpll(const struct matrox_fb_info *minfo,
105 const struct matrox_pll_limits *pi,
106 unsigned int *vco, unsigned int fout)
107{
99 unsigned int p; 108 unsigned int p;
100 unsigned int vcomax; 109 unsigned int vcomax;
101 110
@@ -121,88 +130,94 @@ static unsigned int g450_firstpll(CPMINFO const struct matrox_pll_limits* pi, un
121 } 130 }
122 *vco = tvco; 131 *vco = tvco;
123 } 132 }
124 return g450_nextpll(PMINFO pi, vco, 0xFF0000 | p); 133 return g450_nextpll(minfo, pi, vco, 0xFF0000 | p);
125} 134}
126 135
127static inline unsigned int g450_setpll(CPMINFO unsigned int mnp, unsigned int pll) { 136static inline unsigned int g450_setpll(const struct matrox_fb_info *minfo,
137 unsigned int mnp, unsigned int pll)
138{
128 switch (pll) { 139 switch (pll) {
129 case M_PIXEL_PLL_A: 140 case M_PIXEL_PLL_A:
130 matroxfb_DAC_out(PMINFO M1064_XPIXPLLAM, mnp >> 16); 141 matroxfb_DAC_out(minfo, M1064_XPIXPLLAM, mnp >> 16);
131 matroxfb_DAC_out(PMINFO M1064_XPIXPLLAN, mnp >> 8); 142 matroxfb_DAC_out(minfo, M1064_XPIXPLLAN, mnp >> 8);
132 matroxfb_DAC_out(PMINFO M1064_XPIXPLLAP, mnp); 143 matroxfb_DAC_out(minfo, M1064_XPIXPLLAP, mnp);
133 return M1064_XPIXPLLSTAT; 144 return M1064_XPIXPLLSTAT;
134 145
135 case M_PIXEL_PLL_B: 146 case M_PIXEL_PLL_B:
136 matroxfb_DAC_out(PMINFO M1064_XPIXPLLBM, mnp >> 16); 147 matroxfb_DAC_out(minfo, M1064_XPIXPLLBM, mnp >> 16);
137 matroxfb_DAC_out(PMINFO M1064_XPIXPLLBN, mnp >> 8); 148 matroxfb_DAC_out(minfo, M1064_XPIXPLLBN, mnp >> 8);
138 matroxfb_DAC_out(PMINFO M1064_XPIXPLLBP, mnp); 149 matroxfb_DAC_out(minfo, M1064_XPIXPLLBP, mnp);
139 return M1064_XPIXPLLSTAT; 150 return M1064_XPIXPLLSTAT;
140 151
141 case M_PIXEL_PLL_C: 152 case M_PIXEL_PLL_C:
142 matroxfb_DAC_out(PMINFO M1064_XPIXPLLCM, mnp >> 16); 153 matroxfb_DAC_out(minfo, M1064_XPIXPLLCM, mnp >> 16);
143 matroxfb_DAC_out(PMINFO M1064_XPIXPLLCN, mnp >> 8); 154 matroxfb_DAC_out(minfo, M1064_XPIXPLLCN, mnp >> 8);
144 matroxfb_DAC_out(PMINFO M1064_XPIXPLLCP, mnp); 155 matroxfb_DAC_out(minfo, M1064_XPIXPLLCP, mnp);
145 return M1064_XPIXPLLSTAT; 156 return M1064_XPIXPLLSTAT;
146 157
147 case M_SYSTEM_PLL: 158 case M_SYSTEM_PLL:
148 matroxfb_DAC_out(PMINFO DAC1064_XSYSPLLM, mnp >> 16); 159 matroxfb_DAC_out(minfo, DAC1064_XSYSPLLM, mnp >> 16);
149 matroxfb_DAC_out(PMINFO DAC1064_XSYSPLLN, mnp >> 8); 160 matroxfb_DAC_out(minfo, DAC1064_XSYSPLLN, mnp >> 8);
150 matroxfb_DAC_out(PMINFO DAC1064_XSYSPLLP, mnp); 161 matroxfb_DAC_out(minfo, DAC1064_XSYSPLLP, mnp);
151 return DAC1064_XSYSPLLSTAT; 162 return DAC1064_XSYSPLLSTAT;
152 163
153 case M_VIDEO_PLL: 164 case M_VIDEO_PLL:
154 matroxfb_DAC_out(PMINFO M1064_XVIDPLLM, mnp >> 16); 165 matroxfb_DAC_out(minfo, M1064_XVIDPLLM, mnp >> 16);
155 matroxfb_DAC_out(PMINFO M1064_XVIDPLLN, mnp >> 8); 166 matroxfb_DAC_out(minfo, M1064_XVIDPLLN, mnp >> 8);
156 matroxfb_DAC_out(PMINFO M1064_XVIDPLLP, mnp); 167 matroxfb_DAC_out(minfo, M1064_XVIDPLLP, mnp);
157 return M1064_XVIDPLLSTAT; 168 return M1064_XVIDPLLSTAT;
158 } 169 }
159 return 0; 170 return 0;
160} 171}
161 172
162static inline unsigned int g450_cmppll(CPMINFO unsigned int mnp, unsigned int pll) { 173static inline unsigned int g450_cmppll(const struct matrox_fb_info *minfo,
174 unsigned int mnp, unsigned int pll)
175{
163 unsigned char m = mnp >> 16; 176 unsigned char m = mnp >> 16;
164 unsigned char n = mnp >> 8; 177 unsigned char n = mnp >> 8;
165 unsigned char p = mnp; 178 unsigned char p = mnp;
166 179
167 switch (pll) { 180 switch (pll) {
168 case M_PIXEL_PLL_A: 181 case M_PIXEL_PLL_A:
169 return (matroxfb_DAC_in(PMINFO M1064_XPIXPLLAM) != m || 182 return (matroxfb_DAC_in(minfo, M1064_XPIXPLLAM) != m ||
170 matroxfb_DAC_in(PMINFO M1064_XPIXPLLAN) != n || 183 matroxfb_DAC_in(minfo, M1064_XPIXPLLAN) != n ||
171 matroxfb_DAC_in(PMINFO M1064_XPIXPLLAP) != p); 184 matroxfb_DAC_in(minfo, M1064_XPIXPLLAP) != p);
172 185
173 case M_PIXEL_PLL_B: 186 case M_PIXEL_PLL_B:
174 return (matroxfb_DAC_in(PMINFO M1064_XPIXPLLBM) != m || 187 return (matroxfb_DAC_in(minfo, M1064_XPIXPLLBM) != m ||
175 matroxfb_DAC_in(PMINFO M1064_XPIXPLLBN) != n || 188 matroxfb_DAC_in(minfo, M1064_XPIXPLLBN) != n ||
176 matroxfb_DAC_in(PMINFO M1064_XPIXPLLBP) != p); 189 matroxfb_DAC_in(minfo, M1064_XPIXPLLBP) != p);
177 190
178 case M_PIXEL_PLL_C: 191 case M_PIXEL_PLL_C:
179 return (matroxfb_DAC_in(PMINFO M1064_XPIXPLLCM) != m || 192 return (matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) != m ||
180 matroxfb_DAC_in(PMINFO M1064_XPIXPLLCN) != n || 193 matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) != n ||
181 matroxfb_DAC_in(PMINFO M1064_XPIXPLLCP) != p); 194 matroxfb_DAC_in(minfo, M1064_XPIXPLLCP) != p);
182 195
183 case M_SYSTEM_PLL: 196 case M_SYSTEM_PLL:
184 return (matroxfb_DAC_in(PMINFO DAC1064_XSYSPLLM) != m || 197 return (matroxfb_DAC_in(minfo, DAC1064_XSYSPLLM) != m ||
185 matroxfb_DAC_in(PMINFO DAC1064_XSYSPLLN) != n || 198 matroxfb_DAC_in(minfo, DAC1064_XSYSPLLN) != n ||
186 matroxfb_DAC_in(PMINFO DAC1064_XSYSPLLP) != p); 199 matroxfb_DAC_in(minfo, DAC1064_XSYSPLLP) != p);
187 200
188 case M_VIDEO_PLL: 201 case M_VIDEO_PLL:
189 return (matroxfb_DAC_in(PMINFO M1064_XVIDPLLM) != m || 202 return (matroxfb_DAC_in(minfo, M1064_XVIDPLLM) != m ||
190 matroxfb_DAC_in(PMINFO M1064_XVIDPLLN) != n || 203 matroxfb_DAC_in(minfo, M1064_XVIDPLLN) != n ||
191 matroxfb_DAC_in(PMINFO M1064_XVIDPLLP) != p); 204 matroxfb_DAC_in(minfo, M1064_XVIDPLLP) != p);
192 } 205 }
193 return 1; 206 return 1;
194} 207}
195 208
196static inline int g450_isplllocked(CPMINFO unsigned int regidx) { 209static inline int g450_isplllocked(const struct matrox_fb_info *minfo,
210 unsigned int regidx)
211{
197 unsigned int j; 212 unsigned int j;
198 213
199 for (j = 0; j < 1000; j++) { 214 for (j = 0; j < 1000; j++) {
200 if (matroxfb_DAC_in(PMINFO regidx) & 0x40) { 215 if (matroxfb_DAC_in(minfo, regidx) & 0x40) {
201 unsigned int r = 0; 216 unsigned int r = 0;
202 int i; 217 int i;
203 218
204 for (i = 0; i < 100; i++) { 219 for (i = 0; i < 100; i++) {
205 r += matroxfb_DAC_in(PMINFO regidx) & 0x40; 220 r += matroxfb_DAC_in(minfo, regidx) & 0x40;
206 } 221 }
207 return r >= (90 * 0x40); 222 return r >= (90 * 0x40);
208 } 223 }
@@ -211,8 +226,10 @@ static inline int g450_isplllocked(CPMINFO unsigned int regidx) {
211 return 0; 226 return 0;
212} 227}
213 228
214static int g450_testpll(CPMINFO unsigned int mnp, unsigned int pll) { 229static int g450_testpll(const struct matrox_fb_info *minfo, unsigned int mnp,
215 return g450_isplllocked(PMINFO g450_setpll(PMINFO mnp, pll)); 230 unsigned int pll)
231{
232 return g450_isplllocked(minfo, g450_setpll(minfo, mnp, pll));
216} 233}
217 234
218static void updatehwstate_clk(struct matrox_hw_state* hw, unsigned int mnp, unsigned int pll) { 235static void updatehwstate_clk(struct matrox_hw_state* hw, unsigned int mnp, unsigned int pll) {
@@ -225,13 +242,19 @@ static void updatehwstate_clk(struct matrox_hw_state* hw, unsigned int mnp, unsi
225 } 242 }
226} 243}
227 244
228void matroxfb_g450_setpll_cond(WPMINFO unsigned int mnp, unsigned int pll) { 245void matroxfb_g450_setpll_cond(struct matrox_fb_info *minfo, unsigned int mnp,
229 if (g450_cmppll(PMINFO mnp, pll)) { 246 unsigned int pll)
230 g450_setpll(PMINFO mnp, pll); 247{
248 if (g450_cmppll(minfo, mnp, pll)) {
249 g450_setpll(minfo, mnp, pll);
231 } 250 }
232} 251}
233 252
234static inline unsigned int g450_findworkingpll(WPMINFO unsigned int pll, unsigned int* mnparray, unsigned int mnpcount) { 253static inline unsigned int g450_findworkingpll(struct matrox_fb_info *minfo,
254 unsigned int pll,
255 unsigned int *mnparray,
256 unsigned int mnpcount)
257{
235 unsigned int found = 0; 258 unsigned int found = 0;
236 unsigned int idx; 259 unsigned int idx;
237 unsigned int mnpfound = mnparray[0]; 260 unsigned int mnpfound = mnparray[0];
@@ -255,22 +278,22 @@ static inline unsigned int g450_findworkingpll(WPMINFO unsigned int pll, unsigne
255 while (sptr >= sarray) { 278 while (sptr >= sarray) {
256 unsigned int mnp = *sptr--; 279 unsigned int mnp = *sptr--;
257 280
258 if (g450_testpll(PMINFO mnp - 0x0300, pll) && 281 if (g450_testpll(minfo, mnp - 0x0300, pll) &&
259 g450_testpll(PMINFO mnp + 0x0300, pll) && 282 g450_testpll(minfo, mnp + 0x0300, pll) &&
260 g450_testpll(PMINFO mnp - 0x0200, pll) && 283 g450_testpll(minfo, mnp - 0x0200, pll) &&
261 g450_testpll(PMINFO mnp + 0x0200, pll) && 284 g450_testpll(minfo, mnp + 0x0200, pll) &&
262 g450_testpll(PMINFO mnp - 0x0100, pll) && 285 g450_testpll(minfo, mnp - 0x0100, pll) &&
263 g450_testpll(PMINFO mnp + 0x0100, pll)) { 286 g450_testpll(minfo, mnp + 0x0100, pll)) {
264 if (g450_testpll(PMINFO mnp, pll)) { 287 if (g450_testpll(minfo, mnp, pll)) {
265 return mnp; 288 return mnp;
266 } 289 }
267 } else if (!found && g450_testpll(PMINFO mnp, pll)) { 290 } else if (!found && g450_testpll(minfo, mnp, pll)) {
268 mnpfound = mnp; 291 mnpfound = mnp;
269 found = 1; 292 found = 1;
270 } 293 }
271 } 294 }
272 } 295 }
273 g450_setpll(PMINFO mnpfound, pll); 296 g450_setpll(minfo, mnpfound, pll);
274 return mnpfound; 297 return mnpfound;
275} 298}
276 299
@@ -283,7 +306,9 @@ static void g450_addcache(struct matrox_pll_cache* ci, unsigned int mnp_key, uns
283 ci->data[0].mnp_value = mnp_value; 306 ci->data[0].mnp_value = mnp_value;
284} 307}
285 308
286static int g450_checkcache(WPMINFO struct matrox_pll_cache* ci, unsigned int mnp_key) { 309static int g450_checkcache(struct matrox_fb_info *minfo,
310 struct matrox_pll_cache *ci, unsigned int mnp_key)
311{
287 unsigned int i; 312 unsigned int i;
288 313
289 mnp_key &= G450_MNP_FREQBITS; 314 mnp_key &= G450_MNP_FREQBITS;
@@ -303,8 +328,10 @@ static int g450_checkcache(WPMINFO struct matrox_pll_cache* ci, unsigned int mnp
303 return NO_MORE_MNP; 328 return NO_MORE_MNP;
304} 329}
305 330
306static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll, 331static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
307 unsigned int* mnparray, unsigned int* deltaarray) { 332 unsigned int pll, unsigned int *mnparray,
333 unsigned int *deltaarray)
334{
308 unsigned int mnpcount; 335 unsigned int mnpcount;
309 unsigned int pixel_vco; 336 unsigned int pixel_vco;
310 const struct matrox_pll_limits* pi; 337 const struct matrox_pll_limits* pi;
@@ -321,16 +348,16 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
321 348
322 matroxfb_DAC_lock_irqsave(flags); 349 matroxfb_DAC_lock_irqsave(flags);
323 350
324 xpwrctrl = matroxfb_DAC_in(PMINFO M1064_XPWRCTRL); 351 xpwrctrl = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
325 matroxfb_DAC_out(PMINFO M1064_XPWRCTRL, xpwrctrl & ~M1064_XPWRCTRL_PANELPDN); 352 matroxfb_DAC_out(minfo, M1064_XPWRCTRL, xpwrctrl & ~M1064_XPWRCTRL_PANELPDN);
326 mga_outb(M_SEQ_INDEX, M_SEQ1); 353 mga_outb(M_SEQ_INDEX, M_SEQ1);
327 mga_outb(M_SEQ_DATA, mga_inb(M_SEQ_DATA) | M_SEQ1_SCROFF); 354 mga_outb(M_SEQ_DATA, mga_inb(M_SEQ_DATA) | M_SEQ1_SCROFF);
328 tmp = matroxfb_DAC_in(PMINFO M1064_XPIXCLKCTRL); 355 tmp = matroxfb_DAC_in(minfo, M1064_XPIXCLKCTRL);
329 tmp |= M1064_XPIXCLKCTRL_DIS; 356 tmp |= M1064_XPIXCLKCTRL_DIS;
330 if (!(tmp & M1064_XPIXCLKCTRL_PLL_UP)) { 357 if (!(tmp & M1064_XPIXCLKCTRL_PLL_UP)) {
331 tmp |= M1064_XPIXCLKCTRL_PLL_UP; 358 tmp |= M1064_XPIXCLKCTRL_PLL_UP;
332 } 359 }
333 matroxfb_DAC_out(PMINFO M1064_XPIXCLKCTRL, tmp); 360 matroxfb_DAC_out(minfo, M1064_XPIXCLKCTRL, tmp);
334 /* DVI PLL preferred for frequencies up to 361 /* DVI PLL preferred for frequencies up to
335 panel link max, standard PLL otherwise */ 362 panel link max, standard PLL otherwise */
336 if (fout >= minfo->max_pixel_clock_panellink) 363 if (fout >= minfo->max_pixel_clock_panellink)
@@ -341,8 +368,8 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
341 M1064_XDVICLKCTRL_C1DVICLKEN | 368 M1064_XDVICLKCTRL_C1DVICLKEN |
342 M1064_XDVICLKCTRL_DVILOOPCTL | 369 M1064_XDVICLKCTRL_DVILOOPCTL |
343 M1064_XDVICLKCTRL_P1LOOPBWDTCTL; 370 M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
344 matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL,tmp); 371 matroxfb_DAC_out(minfo, M1064_XDVICLKCTRL, tmp);
345 matroxfb_DAC_out(PMINFO M1064_XPWRCTRL, 372 matroxfb_DAC_out(minfo, M1064_XPWRCTRL,
346 xpwrctrl); 373 xpwrctrl);
347 374
348 matroxfb_DAC_unlock_irqrestore(flags); 375 matroxfb_DAC_unlock_irqrestore(flags);
@@ -385,14 +412,14 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
385 unsigned long flags; 412 unsigned long flags;
386 413
387 matroxfb_DAC_lock_irqsave(flags); 414 matroxfb_DAC_lock_irqsave(flags);
388 tmp = matroxfb_DAC_in(PMINFO M1064_XPWRCTRL); 415 tmp = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
389 if (!(tmp & 2)) { 416 if (!(tmp & 2)) {
390 matroxfb_DAC_out(PMINFO M1064_XPWRCTRL, tmp | 2); 417 matroxfb_DAC_out(minfo, M1064_XPWRCTRL, tmp | 2);
391 } 418 }
392 419
393 mnp = matroxfb_DAC_in(PMINFO M1064_XPIXPLLCM) << 16; 420 mnp = matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) << 16;
394 mnp |= matroxfb_DAC_in(PMINFO M1064_XPIXPLLCN) << 8; 421 mnp |= matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) << 8;
395 pixel_vco = g450_mnp2vco(PMINFO mnp); 422 pixel_vco = g450_mnp2vco(minfo, mnp);
396 matroxfb_DAC_unlock_irqrestore(flags); 423 matroxfb_DAC_unlock_irqrestore(flags);
397 } 424 }
398 pi = &minfo->limits.video; 425 pi = &minfo->limits.video;
@@ -407,12 +434,12 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
407 unsigned int mnp; 434 unsigned int mnp;
408 unsigned int xvco; 435 unsigned int xvco;
409 436
410 for(mnp = g450_firstpll(PMINFO pi, &xvco, fout); mnp != NO_MORE_MNP; mnp = g450_nextpll(PMINFO pi, &xvco, mnp)) { 437 for (mnp = g450_firstpll(minfo, pi, &xvco, fout); mnp != NO_MORE_MNP; mnp = g450_nextpll(minfo, pi, &xvco, mnp)) {
411 unsigned int idx; 438 unsigned int idx;
412 unsigned int vco; 439 unsigned int vco;
413 unsigned int delta; 440 unsigned int delta;
414 441
415 vco = g450_mnp2vco(PMINFO mnp); 442 vco = g450_mnp2vco(minfo, mnp);
416#if 0 443#if 0
417 if (pll == M_VIDEO_PLL) { 444 if (pll == M_VIDEO_PLL) {
418 unsigned int big, small; 445 unsigned int big, small;
@@ -444,7 +471,7 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
444 * (freqs near VCOmin aren't as stable) 471 * (freqs near VCOmin aren't as stable)
445 */ 472 */
446 if (delta == deltaarray[idx-1] 473 if (delta == deltaarray[idx-1]
447 && vco != g450_mnp2vco(PMINFO mnparray[idx-1]) 474 && vco != g450_mnp2vco(minfo, mnparray[idx-1])
448 && vco < (pi->vcomin * 17 / 16)) { 475 && vco < (pi->vcomin * 17 / 16)) {
449 break; 476 break;
450 } 477 }
@@ -468,11 +495,11 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
468 unsigned int mnp; 495 unsigned int mnp;
469 496
470 matroxfb_DAC_lock_irqsave(flags); 497 matroxfb_DAC_lock_irqsave(flags);
471 mnp = g450_checkcache(PMINFO ci, mnparray[0]); 498 mnp = g450_checkcache(minfo, ci, mnparray[0]);
472 if (mnp != NO_MORE_MNP) { 499 if (mnp != NO_MORE_MNP) {
473 matroxfb_g450_setpll_cond(PMINFO mnp, pll); 500 matroxfb_g450_setpll_cond(minfo, mnp, pll);
474 } else { 501 } else {
475 mnp = g450_findworkingpll(PMINFO pll, mnparray, mnpcount); 502 mnp = g450_findworkingpll(minfo, pll, mnparray, mnpcount);
476 g450_addcache(ci, mnparray[0], mnp); 503 g450_addcache(ci, mnparray[0], mnp);
477 } 504 }
478 updatehwstate_clk(&minfo->hw, mnp, pll); 505 updatehwstate_clk(&minfo->hw, mnp, pll);
@@ -485,14 +512,16 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
485 * Currently there is 5(p) * 10(m) = 50 possible values. */ 512 * Currently there is 5(p) * 10(m) = 50 possible values. */
486#define MNP_TABLE_SIZE 64 513#define MNP_TABLE_SIZE 64
487 514
488int matroxfb_g450_setclk(WPMINFO unsigned int fout, unsigned int pll) { 515int matroxfb_g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
516 unsigned int pll)
517{
489 unsigned int* arr; 518 unsigned int* arr;
490 519
491 arr = kmalloc(sizeof(*arr) * MNP_TABLE_SIZE * 2, GFP_KERNEL); 520 arr = kmalloc(sizeof(*arr) * MNP_TABLE_SIZE * 2, GFP_KERNEL);
492 if (arr) { 521 if (arr) {
493 int r; 522 int r;
494 523
495 r = __g450_setclk(PMINFO fout, pll, arr, arr + MNP_TABLE_SIZE); 524 r = __g450_setclk(minfo, fout, pll, arr, arr + MNP_TABLE_SIZE);
496 kfree(arr); 525 kfree(arr);
497 return r; 526 return r;
498 } 527 }
diff --git a/drivers/video/matrox/g450_pll.h b/drivers/video/matrox/g450_pll.h
index c17ed74501e9..aac615d18440 100644
--- a/drivers/video/matrox/g450_pll.h
+++ b/drivers/video/matrox/g450_pll.h
@@ -3,8 +3,10 @@
3 3
4#include "matroxfb_base.h" 4#include "matroxfb_base.h"
5 5
6int matroxfb_g450_setclk(WPMINFO unsigned int fout, unsigned int pll); 6int matroxfb_g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
7unsigned int g450_mnp2f(CPMINFO unsigned int mnp); 7 unsigned int pll);
8void matroxfb_g450_setpll_cond(WPMINFO unsigned int mnp, unsigned int pll); 8unsigned int g450_mnp2f(const struct matrox_fb_info *minfo, unsigned int mnp);
9void matroxfb_g450_setpll_cond(struct matrox_fb_info *minfo, unsigned int mnp,
10 unsigned int pll);
9 11
10#endif /* __G450_PLL_H__ */ 12#endif /* __G450_PLL_H__ */
diff --git a/drivers/video/matrox/i2c-matroxfb.c b/drivers/video/matrox/i2c-matroxfb.c
index cefabe818a12..f3728ab262f8 100644
--- a/drivers/video/matrox/i2c-matroxfb.c
+++ b/drivers/video/matrox/i2c-matroxfb.c
@@ -41,7 +41,7 @@ static int matroxfb_read_gpio(struct matrox_fb_info* minfo) {
41 int v; 41 int v;
42 42
43 matroxfb_DAC_lock_irqsave(flags); 43 matroxfb_DAC_lock_irqsave(flags);
44 v = matroxfb_DAC_in(PMINFO DAC_XGENIODATA); 44 v = matroxfb_DAC_in(minfo, DAC_XGENIODATA);
45 matroxfb_DAC_unlock_irqrestore(flags); 45 matroxfb_DAC_unlock_irqrestore(flags);
46 return v; 46 return v;
47} 47}
@@ -51,10 +51,10 @@ static void matroxfb_set_gpio(struct matrox_fb_info* minfo, int mask, int val) {
51 int v; 51 int v;
52 52
53 matroxfb_DAC_lock_irqsave(flags); 53 matroxfb_DAC_lock_irqsave(flags);
54 v = (matroxfb_DAC_in(PMINFO DAC_XGENIOCTRL) & mask) | val; 54 v = (matroxfb_DAC_in(minfo, DAC_XGENIOCTRL) & mask) | val;
55 matroxfb_DAC_out(PMINFO DAC_XGENIOCTRL, v); 55 matroxfb_DAC_out(minfo, DAC_XGENIOCTRL, v);
56 /* We must reset GENIODATA very often... XFree plays with this register */ 56 /* We must reset GENIODATA very often... XFree plays with this register */
57 matroxfb_DAC_out(PMINFO DAC_XGENIODATA, 0x00); 57 matroxfb_DAC_out(minfo, DAC_XGENIODATA, 0x00);
58 matroxfb_DAC_unlock_irqrestore(flags); 58 matroxfb_DAC_unlock_irqrestore(flags);
59} 59}
60 60
@@ -149,8 +149,8 @@ static void* i2c_matroxfb_probe(struct matrox_fb_info* minfo) {
149 return NULL; 149 return NULL;
150 150
151 matroxfb_DAC_lock_irqsave(flags); 151 matroxfb_DAC_lock_irqsave(flags);
152 matroxfb_DAC_out(PMINFO DAC_XGENIODATA, 0xFF); 152 matroxfb_DAC_out(minfo, DAC_XGENIODATA, 0xFF);
153 matroxfb_DAC_out(PMINFO DAC_XGENIOCTRL, 0x00); 153 matroxfb_DAC_out(minfo, DAC_XGENIOCTRL, 0x00);
154 matroxfb_DAC_unlock_irqrestore(flags); 154 matroxfb_DAC_unlock_irqrestore(flags);
155 155
156 switch (minfo->chip) { 156 switch (minfo->chip) {
diff --git a/drivers/video/matrox/matroxfb_DAC1064.c b/drivers/video/matrox/matroxfb_DAC1064.c
index 7662a2862898..88466a04bab2 100644
--- a/drivers/video/matrox/matroxfb_DAC1064.c
+++ b/drivers/video/matrox/matroxfb_DAC1064.c
@@ -33,7 +33,11 @@
33#define DAC1064_OPT_MDIV2 0x00 33#define DAC1064_OPT_MDIV2 0x00
34#define DAC1064_OPT_RESERVED 0x10 34#define DAC1064_OPT_RESERVED 0x10
35 35
36static void DAC1064_calcclock(CPMINFO unsigned int freq, unsigned int fmax, unsigned int* in, unsigned int* feed, unsigned int* post) { 36static void DAC1064_calcclock(const struct matrox_fb_info *minfo,
37 unsigned int freq, unsigned int fmax,
38 unsigned int *in, unsigned int *feed,
39 unsigned int *post)
40{
37 unsigned int fvco; 41 unsigned int fvco;
38 unsigned int p; 42 unsigned int p;
39 43
@@ -41,7 +45,7 @@ static void DAC1064_calcclock(CPMINFO unsigned int freq, unsigned int fmax, unsi
41 45
42 /* only for devices older than G450 */ 46 /* only for devices older than G450 */
43 47
44 fvco = PLL_calcclock(PMINFO freq, fmax, in, feed, &p); 48 fvco = PLL_calcclock(minfo, freq, fmax, in, feed, &p);
45 49
46 p = (1 << p) - 1; 50 p = (1 << p) - 1;
47 if (fvco <= 100000) 51 if (fvco <= 100000)
@@ -80,18 +84,21 @@ static const unsigned char MGA1064_DAC[] = {
80 0x00, 84 0x00,
81 0x00, 0x00, 0xFF, 0xFF}; 85 0x00, 0x00, 0xFF, 0xFF};
82 86
83static void DAC1064_setpclk(WPMINFO unsigned long fout) { 87static void DAC1064_setpclk(struct matrox_fb_info *minfo, unsigned long fout)
88{
84 unsigned int m, n, p; 89 unsigned int m, n, p;
85 90
86 DBG(__func__) 91 DBG(__func__)
87 92
88 DAC1064_calcclock(PMINFO fout, minfo->max_pixel_clock, &m, &n, &p); 93 DAC1064_calcclock(minfo, fout, minfo->max_pixel_clock, &m, &n, &p);
89 minfo->hw.DACclk[0] = m; 94 minfo->hw.DACclk[0] = m;
90 minfo->hw.DACclk[1] = n; 95 minfo->hw.DACclk[1] = n;
91 minfo->hw.DACclk[2] = p; 96 minfo->hw.DACclk[2] = p;
92} 97}
93 98
94static void DAC1064_setmclk(WPMINFO int oscinfo, unsigned long fmem) { 99static void DAC1064_setmclk(struct matrox_fb_info *minfo, int oscinfo,
100 unsigned long fmem)
101{
95 u_int32_t mx; 102 u_int32_t mx;
96 struct matrox_hw_state *hw = &minfo->hw; 103 struct matrox_hw_state *hw = &minfo->hw;
97 104
@@ -99,9 +106,9 @@ static void DAC1064_setmclk(WPMINFO int oscinfo, unsigned long fmem) {
99 106
100 if (minfo->devflags.noinit) { 107 if (minfo->devflags.noinit) {
101 /* read MCLK and give up... */ 108 /* read MCLK and give up... */
102 hw->DACclk[3] = inDAC1064(PMINFO DAC1064_XSYSPLLM); 109 hw->DACclk[3] = inDAC1064(minfo, DAC1064_XSYSPLLM);
103 hw->DACclk[4] = inDAC1064(PMINFO DAC1064_XSYSPLLN); 110 hw->DACclk[4] = inDAC1064(minfo, DAC1064_XSYSPLLN);
104 hw->DACclk[5] = inDAC1064(PMINFO DAC1064_XSYSPLLP); 111 hw->DACclk[5] = inDAC1064(minfo, DAC1064_XSYSPLLP);
105 return; 112 return;
106 } 113 }
107 mx = hw->MXoptionReg | 0x00000004; 114 mx = hw->MXoptionReg | 0x00000004;
@@ -131,12 +138,12 @@ static void DAC1064_setmclk(WPMINFO int oscinfo, unsigned long fmem) {
131 perfect... */ 138 perfect... */
132 /* (bit 2 of PCI_OPTION_REG must be 0... and bits 0,1 must not 139 /* (bit 2 of PCI_OPTION_REG must be 0... and bits 0,1 must not
133 select PLL... because of PLL can be stopped at this time) */ 140 select PLL... because of PLL can be stopped at this time) */
134 DAC1064_calcclock(PMINFO fmem, minfo->max_pixel_clock, &m, &n, &p); 141 DAC1064_calcclock(minfo, fmem, minfo->max_pixel_clock, &m, &n, &p);
135 outDAC1064(PMINFO DAC1064_XSYSPLLM, hw->DACclk[3] = m); 142 outDAC1064(minfo, DAC1064_XSYSPLLM, hw->DACclk[3] = m);
136 outDAC1064(PMINFO DAC1064_XSYSPLLN, hw->DACclk[4] = n); 143 outDAC1064(minfo, DAC1064_XSYSPLLN, hw->DACclk[4] = n);
137 outDAC1064(PMINFO DAC1064_XSYSPLLP, hw->DACclk[5] = p); 144 outDAC1064(minfo, DAC1064_XSYSPLLP, hw->DACclk[5] = p);
138 for (clk = 65536; clk; --clk) { 145 for (clk = 65536; clk; --clk) {
139 if (inDAC1064(PMINFO DAC1064_XSYSPLLSTAT) & 0x40) 146 if (inDAC1064(minfo, DAC1064_XSYSPLLSTAT) & 0x40)
140 break; 147 break;
141 } 148 }
142 if (!clk) 149 if (!clk)
@@ -154,7 +161,8 @@ static void DAC1064_setmclk(WPMINFO int oscinfo, unsigned long fmem) {
154} 161}
155 162
156#ifdef CONFIG_FB_MATROX_G 163#ifdef CONFIG_FB_MATROX_G
157static void g450_set_plls(WPMINFO2) { 164static void g450_set_plls(struct matrox_fb_info *minfo)
165{
158 u_int32_t c2_ctl; 166 u_int32_t c2_ctl;
159 unsigned int pxc; 167 unsigned int pxc;
160 struct matrox_hw_state *hw = &minfo->hw; 168 struct matrox_hw_state *hw = &minfo->hw;
@@ -184,16 +192,16 @@ static void g450_set_plls(WPMINFO2) {
184 c2_ctl |= 0x0006; /* Use video PLL */ 192 c2_ctl |= 0x0006; /* Use video PLL */
185 hw->DACreg[POS1064_XPWRCTRL] |= 0x02; 193 hw->DACreg[POS1064_XPWRCTRL] |= 0x02;
186 194
187 outDAC1064(PMINFO M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]); 195 outDAC1064(minfo, M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]);
188 matroxfb_g450_setpll_cond(PMINFO videomnp, M_VIDEO_PLL); 196 matroxfb_g450_setpll_cond(minfo, videomnp, M_VIDEO_PLL);
189 } 197 }
190 198
191 hw->DACreg[POS1064_XPIXCLKCTRL] &= ~M1064_XPIXCLKCTRL_PLL_UP; 199 hw->DACreg[POS1064_XPIXCLKCTRL] &= ~M1064_XPIXCLKCTRL_PLL_UP;
192 if (pixelmnp >= 0) { 200 if (pixelmnp >= 0) {
193 hw->DACreg[POS1064_XPIXCLKCTRL] |= M1064_XPIXCLKCTRL_PLL_UP; 201 hw->DACreg[POS1064_XPIXCLKCTRL] |= M1064_XPIXCLKCTRL_PLL_UP;
194 202
195 outDAC1064(PMINFO M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]); 203 outDAC1064(minfo, M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]);
196 matroxfb_g450_setpll_cond(PMINFO pixelmnp, M_PIXEL_PLL_C); 204 matroxfb_g450_setpll_cond(minfo, pixelmnp, M_PIXEL_PLL_C);
197 } 205 }
198 if (c2_ctl != hw->crtc2.ctl) { 206 if (c2_ctl != hw->crtc2.ctl) {
199 hw->crtc2.ctl = c2_ctl; 207 hw->crtc2.ctl = c2_ctl;
@@ -245,7 +253,8 @@ static void g450_set_plls(WPMINFO2) {
245} 253}
246#endif 254#endif
247 255
248void DAC1064_global_init(WPMINFO2) { 256void DAC1064_global_init(struct matrox_fb_info *minfo)
257{
249 struct matrox_hw_state *hw = &minfo->hw; 258 struct matrox_hw_state *hw = &minfo->hw;
250 259
251 hw->DACreg[POS1064_XMISCCTRL] &= M1064_XMISCCTRL_DAC_WIDTHMASK; 260 hw->DACreg[POS1064_XMISCCTRL] &= M1064_XMISCCTRL_DAC_WIDTHMASK;
@@ -299,7 +308,7 @@ void DAC1064_global_init(WPMINFO2) {
299 break; 308 break;
300 } 309 }
301 /* Now set timming related variables... */ 310 /* Now set timming related variables... */
302 g450_set_plls(PMINFO2); 311 g450_set_plls(minfo);
303 } else 312 } else
304#endif 313#endif
305 { 314 {
@@ -318,24 +327,26 @@ void DAC1064_global_init(WPMINFO2) {
318 } 327 }
319} 328}
320 329
321void DAC1064_global_restore(WPMINFO2) { 330void DAC1064_global_restore(struct matrox_fb_info *minfo)
331{
322 struct matrox_hw_state *hw = &minfo->hw; 332 struct matrox_hw_state *hw = &minfo->hw;
323 333
324 outDAC1064(PMINFO M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]); 334 outDAC1064(minfo, M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]);
325 outDAC1064(PMINFO M1064_XMISCCTRL, hw->DACreg[POS1064_XMISCCTRL]); 335 outDAC1064(minfo, M1064_XMISCCTRL, hw->DACreg[POS1064_XMISCCTRL]);
326 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) { 336 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) {
327 outDAC1064(PMINFO 0x20, 0x04); 337 outDAC1064(minfo, 0x20, 0x04);
328 outDAC1064(PMINFO 0x1F, minfo->devflags.dfp_type); 338 outDAC1064(minfo, 0x1F, minfo->devflags.dfp_type);
329 if (minfo->devflags.g450dac) { 339 if (minfo->devflags.g450dac) {
330 outDAC1064(PMINFO M1064_XSYNCCTRL, 0xCC); 340 outDAC1064(minfo, M1064_XSYNCCTRL, 0xCC);
331 outDAC1064(PMINFO M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]); 341 outDAC1064(minfo, M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]);
332 outDAC1064(PMINFO M1064_XPANMODE, hw->DACreg[POS1064_XPANMODE]); 342 outDAC1064(minfo, M1064_XPANMODE, hw->DACreg[POS1064_XPANMODE]);
333 outDAC1064(PMINFO M1064_XOUTPUTCONN, hw->DACreg[POS1064_XOUTPUTCONN]); 343 outDAC1064(minfo, M1064_XOUTPUTCONN, hw->DACreg[POS1064_XOUTPUTCONN]);
334 } 344 }
335 } 345 }
336} 346}
337 347
338static int DAC1064_init_1(WPMINFO struct my_timming* m) { 348static int DAC1064_init_1(struct matrox_fb_info *minfo, struct my_timming *m)
349{
339 struct matrox_hw_state *hw = &minfo->hw; 350 struct matrox_hw_state *hw = &minfo->hw;
340 351
341 DBG(__func__) 352 DBG(__func__)
@@ -367,11 +378,12 @@ static int DAC1064_init_1(WPMINFO struct my_timming* m) {
367 hw->DACreg[POS1064_XCURADDL] = 0; 378 hw->DACreg[POS1064_XCURADDL] = 0;
368 hw->DACreg[POS1064_XCURADDH] = 0; 379 hw->DACreg[POS1064_XCURADDH] = 0;
369 380
370 DAC1064_global_init(PMINFO2); 381 DAC1064_global_init(minfo);
371 return 0; 382 return 0;
372} 383}
373 384
374static int DAC1064_init_2(WPMINFO struct my_timming* m) { 385static int DAC1064_init_2(struct matrox_fb_info *minfo, struct my_timming *m)
386{
375 struct matrox_hw_state *hw = &minfo->hw; 387 struct matrox_hw_state *hw = &minfo->hw;
376 388
377 DBG(__func__) 389 DBG(__func__)
@@ -413,7 +425,8 @@ static int DAC1064_init_2(WPMINFO struct my_timming* m) {
413 return 0; 425 return 0;
414} 426}
415 427
416static void DAC1064_restore_1(WPMINFO2) { 428static void DAC1064_restore_1(struct matrox_fb_info *minfo)
429{
417 struct matrox_hw_state *hw = &minfo->hw; 430 struct matrox_hw_state *hw = &minfo->hw;
418 431
419 CRITFLAGS 432 CRITFLAGS
@@ -422,28 +435,29 @@ static void DAC1064_restore_1(WPMINFO2) {
422 435
423 CRITBEGIN 436 CRITBEGIN
424 437
425 if ((inDAC1064(PMINFO DAC1064_XSYSPLLM) != hw->DACclk[3]) || 438 if ((inDAC1064(minfo, DAC1064_XSYSPLLM) != hw->DACclk[3]) ||
426 (inDAC1064(PMINFO DAC1064_XSYSPLLN) != hw->DACclk[4]) || 439 (inDAC1064(minfo, DAC1064_XSYSPLLN) != hw->DACclk[4]) ||
427 (inDAC1064(PMINFO DAC1064_XSYSPLLP) != hw->DACclk[5])) { 440 (inDAC1064(minfo, DAC1064_XSYSPLLP) != hw->DACclk[5])) {
428 outDAC1064(PMINFO DAC1064_XSYSPLLM, hw->DACclk[3]); 441 outDAC1064(minfo, DAC1064_XSYSPLLM, hw->DACclk[3]);
429 outDAC1064(PMINFO DAC1064_XSYSPLLN, hw->DACclk[4]); 442 outDAC1064(minfo, DAC1064_XSYSPLLN, hw->DACclk[4]);
430 outDAC1064(PMINFO DAC1064_XSYSPLLP, hw->DACclk[5]); 443 outDAC1064(minfo, DAC1064_XSYSPLLP, hw->DACclk[5]);
431 } 444 }
432 { 445 {
433 unsigned int i; 446 unsigned int i;
434 447
435 for (i = 0; i < sizeof(MGA1064_DAC_regs); i++) { 448 for (i = 0; i < sizeof(MGA1064_DAC_regs); i++) {
436 if ((i != POS1064_XPIXCLKCTRL) && (i != POS1064_XMISCCTRL)) 449 if ((i != POS1064_XPIXCLKCTRL) && (i != POS1064_XMISCCTRL))
437 outDAC1064(PMINFO MGA1064_DAC_regs[i], hw->DACreg[i]); 450 outDAC1064(minfo, MGA1064_DAC_regs[i], hw->DACreg[i]);
438 } 451 }
439 } 452 }
440 453
441 DAC1064_global_restore(PMINFO2); 454 DAC1064_global_restore(minfo);
442 455
443 CRITEND 456 CRITEND
444}; 457};
445 458
446static void DAC1064_restore_2(WPMINFO2) { 459static void DAC1064_restore_2(struct matrox_fb_info *minfo)
460{
447#ifdef DEBUG 461#ifdef DEBUG
448 unsigned int i; 462 unsigned int i;
449#endif 463#endif
@@ -470,14 +484,14 @@ static int m1064_compute(void* out, struct my_timming* m) {
470 int tmout; 484 int tmout;
471 CRITFLAGS 485 CRITFLAGS
472 486
473 DAC1064_setpclk(PMINFO m->pixclock); 487 DAC1064_setpclk(minfo, m->pixclock);
474 488
475 CRITBEGIN 489 CRITBEGIN
476 490
477 for (i = 0; i < 3; i++) 491 for (i = 0; i < 3; i++)
478 outDAC1064(PMINFO M1064_XPIXPLLCM + i, minfo->hw.DACclk[i]); 492 outDAC1064(minfo, M1064_XPIXPLLCM + i, minfo->hw.DACclk[i]);
479 for (tmout = 500000; tmout; tmout--) { 493 for (tmout = 500000; tmout; tmout--) {
480 if (inDAC1064(PMINFO M1064_XPIXPLLSTAT) & 0x40) 494 if (inDAC1064(minfo, M1064_XPIXPLLSTAT) & 0x40)
481 break; 495 break;
482 udelay(10); 496 udelay(10);
483 }; 497 };
@@ -500,9 +514,9 @@ static struct matrox_altout m1064 = {
500static int g450_compute(void* out, struct my_timming* m) { 514static int g450_compute(void* out, struct my_timming* m) {
501#define minfo ((struct matrox_fb_info*)out) 515#define minfo ((struct matrox_fb_info*)out)
502 if (m->mnp < 0) { 516 if (m->mnp < 0) {
503 m->mnp = matroxfb_g450_setclk(PMINFO m->pixclock, (m->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); 517 m->mnp = matroxfb_g450_setclk(minfo, m->pixclock, (m->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
504 if (m->mnp >= 0) { 518 if (m->mnp >= 0) {
505 m->pixclock = g450_mnp2f(PMINFO m->mnp); 519 m->pixclock = g450_mnp2f(minfo, m->mnp);
506 } 520 }
507 } 521 }
508#undef minfo 522#undef minfo
@@ -518,13 +532,14 @@ static struct matrox_altout g450out = {
518#endif /* NEED_DAC1064 */ 532#endif /* NEED_DAC1064 */
519 533
520#ifdef CONFIG_FB_MATROX_MYSTIQUE 534#ifdef CONFIG_FB_MATROX_MYSTIQUE
521static int MGA1064_init(WPMINFO struct my_timming* m) { 535static int MGA1064_init(struct matrox_fb_info *minfo, struct my_timming *m)
536{
522 struct matrox_hw_state *hw = &minfo->hw; 537 struct matrox_hw_state *hw = &minfo->hw;
523 538
524 DBG(__func__) 539 DBG(__func__)
525 540
526 if (DAC1064_init_1(PMINFO m)) return 1; 541 if (DAC1064_init_1(minfo, m)) return 1;
527 if (matroxfb_vgaHWinit(PMINFO m)) return 1; 542 if (matroxfb_vgaHWinit(minfo, m)) return 1;
528 543
529 hw->MiscOutReg = 0xCB; 544 hw->MiscOutReg = 0xCB;
530 if (m->sync & FB_SYNC_HOR_HIGH_ACT) 545 if (m->sync & FB_SYNC_HOR_HIGH_ACT)
@@ -534,20 +549,21 @@ static int MGA1064_init(WPMINFO struct my_timming* m) {
534 if (m->sync & FB_SYNC_COMP_HIGH_ACT) /* should be only FB_SYNC_COMP */ 549 if (m->sync & FB_SYNC_COMP_HIGH_ACT) /* should be only FB_SYNC_COMP */
535 hw->CRTCEXT[3] |= 0x40; 550 hw->CRTCEXT[3] |= 0x40;
536 551
537 if (DAC1064_init_2(PMINFO m)) return 1; 552 if (DAC1064_init_2(minfo, m)) return 1;
538 return 0; 553 return 0;
539} 554}
540#endif 555#endif
541 556
542#ifdef CONFIG_FB_MATROX_G 557#ifdef CONFIG_FB_MATROX_G
543static int MGAG100_init(WPMINFO struct my_timming* m) { 558static int MGAG100_init(struct matrox_fb_info *minfo, struct my_timming *m)
559{
544 struct matrox_hw_state *hw = &minfo->hw; 560 struct matrox_hw_state *hw = &minfo->hw;
545 561
546 DBG(__func__) 562 DBG(__func__)
547 563
548 if (DAC1064_init_1(PMINFO m)) return 1; 564 if (DAC1064_init_1(minfo, m)) return 1;
549 hw->MXoptionReg &= ~0x2000; 565 hw->MXoptionReg &= ~0x2000;
550 if (matroxfb_vgaHWinit(PMINFO m)) return 1; 566 if (matroxfb_vgaHWinit(minfo, m)) return 1;
551 567
552 hw->MiscOutReg = 0xEF; 568 hw->MiscOutReg = 0xEF;
553 if (m->sync & FB_SYNC_HOR_HIGH_ACT) 569 if (m->sync & FB_SYNC_HOR_HIGH_ACT)
@@ -557,13 +573,14 @@ static int MGAG100_init(WPMINFO struct my_timming* m) {
557 if (m->sync & FB_SYNC_COMP_HIGH_ACT) /* should be only FB_SYNC_COMP */ 573 if (m->sync & FB_SYNC_COMP_HIGH_ACT) /* should be only FB_SYNC_COMP */
558 hw->CRTCEXT[3] |= 0x40; 574 hw->CRTCEXT[3] |= 0x40;
559 575
560 if (DAC1064_init_2(PMINFO m)) return 1; 576 if (DAC1064_init_2(minfo, m)) return 1;
561 return 0; 577 return 0;
562} 578}
563#endif /* G */ 579#endif /* G */
564 580
565#ifdef CONFIG_FB_MATROX_MYSTIQUE 581#ifdef CONFIG_FB_MATROX_MYSTIQUE
566static void MGA1064_ramdac_init(WPMINFO2) { 582static void MGA1064_ramdac_init(struct matrox_fb_info *minfo)
583{
567 584
568 DBG(__func__) 585 DBG(__func__)
569 586
@@ -577,7 +594,7 @@ static void MGA1064_ramdac_init(WPMINFO2) {
577 minfo->features.pll.post_shift_max = 3; 594 minfo->features.pll.post_shift_max = 3;
578 minfo->features.DAC1064.xvrefctrl = DAC1064_XVREFCTRL_EXTERNAL; 595 minfo->features.DAC1064.xvrefctrl = DAC1064_XVREFCTRL_EXTERNAL;
579 /* maybe cmdline MCLK= ?, doc says gclk=44MHz, mclk=66MHz... it was 55/83 with old values */ 596 /* maybe cmdline MCLK= ?, doc says gclk=44MHz, mclk=66MHz... it was 55/83 with old values */
580 DAC1064_setmclk(PMINFO DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV3 | DAC1064_OPT_SCLK_PLL, 133333); 597 DAC1064_setmclk(minfo, DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV3 | DAC1064_OPT_SCLK_PLL, 133333);
581} 598}
582#endif 599#endif
583 600
@@ -589,23 +606,25 @@ static int x7AF4 = 0x10; /* flags, maybe 0x10 = SDRAM, 0x00 = SGRAM??? */
589static int def50 = 0; /* reg50, & 0x0F, & 0x3000 (only 0x0000, 0x1000, 0x2000 (0x3000 disallowed and treated as 0) */ 606static int def50 = 0; /* reg50, & 0x0F, & 0x3000 (only 0x0000, 0x1000, 0x2000 (0x3000 disallowed and treated as 0) */
590#endif 607#endif
591 608
592static void MGAG100_progPixClock(CPMINFO int flags, int m, int n, int p) { 609static void MGAG100_progPixClock(const struct matrox_fb_info *minfo, int flags,
610 int m, int n, int p)
611{
593 int reg; 612 int reg;
594 int selClk; 613 int selClk;
595 int clk; 614 int clk;
596 615
597 DBG(__func__) 616 DBG(__func__)
598 617
599 outDAC1064(PMINFO M1064_XPIXCLKCTRL, inDAC1064(PMINFO M1064_XPIXCLKCTRL) | M1064_XPIXCLKCTRL_DIS | 618 outDAC1064(minfo, M1064_XPIXCLKCTRL, inDAC1064(minfo, M1064_XPIXCLKCTRL) | M1064_XPIXCLKCTRL_DIS |
600 M1064_XPIXCLKCTRL_PLL_UP); 619 M1064_XPIXCLKCTRL_PLL_UP);
601 switch (flags & 3) { 620 switch (flags & 3) {
602 case 0: reg = M1064_XPIXPLLAM; break; 621 case 0: reg = M1064_XPIXPLLAM; break;
603 case 1: reg = M1064_XPIXPLLBM; break; 622 case 1: reg = M1064_XPIXPLLBM; break;
604 default: reg = M1064_XPIXPLLCM; break; 623 default: reg = M1064_XPIXPLLCM; break;
605 } 624 }
606 outDAC1064(PMINFO reg++, m); 625 outDAC1064(minfo, reg++, m);
607 outDAC1064(PMINFO reg++, n); 626 outDAC1064(minfo, reg++, n);
608 outDAC1064(PMINFO reg, p); 627 outDAC1064(minfo, reg, p);
609 selClk = mga_inb(M_MISC_REG_READ) & ~0xC; 628 selClk = mga_inb(M_MISC_REG_READ) & ~0xC;
610 /* there should be flags & 0x03 & case 0/1/else */ 629 /* there should be flags & 0x03 & case 0/1/else */
611 /* and we should first select source and after that we should wait for PLL */ 630 /* and we should first select source and after that we should wait for PLL */
@@ -617,34 +636,37 @@ static void MGAG100_progPixClock(CPMINFO int flags, int m, int n, int p) {
617 } 636 }
618 mga_outb(M_MISC_REG, selClk); 637 mga_outb(M_MISC_REG, selClk);
619 for (clk = 500000; clk; clk--) { 638 for (clk = 500000; clk; clk--) {
620 if (inDAC1064(PMINFO M1064_XPIXPLLSTAT) & 0x40) 639 if (inDAC1064(minfo, M1064_XPIXPLLSTAT) & 0x40)
621 break; 640 break;
622 udelay(10); 641 udelay(10);
623 }; 642 };
624 if (!clk) 643 if (!clk)
625 printk(KERN_ERR "matroxfb: Pixel PLL%c not locked after usual time\n", (reg-M1064_XPIXPLLAM-2)/4 + 'A'); 644 printk(KERN_ERR "matroxfb: Pixel PLL%c not locked after usual time\n", (reg-M1064_XPIXPLLAM-2)/4 + 'A');
626 selClk = inDAC1064(PMINFO M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_SRC_MASK; 645 selClk = inDAC1064(minfo, M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_SRC_MASK;
627 switch (flags & 0x0C) { 646 switch (flags & 0x0C) {
628 case 0x00: selClk |= M1064_XPIXCLKCTRL_SRC_PCI; break; 647 case 0x00: selClk |= M1064_XPIXCLKCTRL_SRC_PCI; break;
629 case 0x04: selClk |= M1064_XPIXCLKCTRL_SRC_PLL; break; 648 case 0x04: selClk |= M1064_XPIXCLKCTRL_SRC_PLL; break;
630 default: selClk |= M1064_XPIXCLKCTRL_SRC_EXT; break; 649 default: selClk |= M1064_XPIXCLKCTRL_SRC_EXT; break;
631 } 650 }
632 outDAC1064(PMINFO M1064_XPIXCLKCTRL, selClk); 651 outDAC1064(minfo, M1064_XPIXCLKCTRL, selClk);
633 outDAC1064(PMINFO M1064_XPIXCLKCTRL, inDAC1064(PMINFO M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_DIS); 652 outDAC1064(minfo, M1064_XPIXCLKCTRL, inDAC1064(minfo, M1064_XPIXCLKCTRL) & ~M1064_XPIXCLKCTRL_DIS);
634} 653}
635 654
636static void MGAG100_setPixClock(CPMINFO int flags, int freq) { 655static void MGAG100_setPixClock(const struct matrox_fb_info *minfo, int flags,
656 int freq)
657{
637 unsigned int m, n, p; 658 unsigned int m, n, p;
638 659
639 DBG(__func__) 660 DBG(__func__)
640 661
641 DAC1064_calcclock(PMINFO freq, minfo->max_pixel_clock, &m, &n, &p); 662 DAC1064_calcclock(minfo, freq, minfo->max_pixel_clock, &m, &n, &p);
642 MGAG100_progPixClock(PMINFO flags, m, n, p); 663 MGAG100_progPixClock(minfo, flags, m, n, p);
643} 664}
644#endif 665#endif
645 666
646#ifdef CONFIG_FB_MATROX_MYSTIQUE 667#ifdef CONFIG_FB_MATROX_MYSTIQUE
647static int MGA1064_preinit(WPMINFO2) { 668static int MGA1064_preinit(struct matrox_fb_info *minfo)
669{
648 static const int vxres_mystique[] = { 512, 640, 768, 800, 832, 960, 670 static const int vxres_mystique[] = { 512, 640, 768, 800, 832, 960,
649 1024, 1152, 1280, 1600, 1664, 1920, 671 1024, 1152, 1280, 1600, 1664, 1920,
650 2048, 0}; 672 2048, 0};
@@ -681,16 +703,18 @@ static int MGA1064_preinit(WPMINFO2) {
681 return 0; 703 return 0;
682} 704}
683 705
684static void MGA1064_reset(WPMINFO2) { 706static void MGA1064_reset(struct matrox_fb_info *minfo)
707{
685 708
686 DBG(__func__); 709 DBG(__func__);
687 710
688 MGA1064_ramdac_init(PMINFO2); 711 MGA1064_ramdac_init(minfo);
689} 712}
690#endif 713#endif
691 714
692#ifdef CONFIG_FB_MATROX_G 715#ifdef CONFIG_FB_MATROX_G
693static void g450_mclk_init(WPMINFO2) { 716static void g450_mclk_init(struct matrox_fb_info *minfo)
717{
694 /* switch all clocks to PCI source */ 718 /* switch all clocks to PCI source */
695 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg | 4); 719 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg | 4);
696 pci_write_config_dword(minfo->pcidev, PCI_OPTION3_REG, minfo->values.reg.opt3 & ~0x00300C03); 720 pci_write_config_dword(minfo->pcidev, PCI_OPTION3_REG, minfo->values.reg.opt3 & ~0x00300C03);
@@ -699,17 +723,17 @@ static void g450_mclk_init(WPMINFO2) {
699 if (((minfo->values.reg.opt3 & 0x000003) == 0x000003) || 723 if (((minfo->values.reg.opt3 & 0x000003) == 0x000003) ||
700 ((minfo->values.reg.opt3 & 0x000C00) == 0x000C00) || 724 ((minfo->values.reg.opt3 & 0x000C00) == 0x000C00) ||
701 ((minfo->values.reg.opt3 & 0x300000) == 0x300000)) { 725 ((minfo->values.reg.opt3 & 0x300000) == 0x300000)) {
702 matroxfb_g450_setclk(PMINFO minfo->values.pll.video, M_VIDEO_PLL); 726 matroxfb_g450_setclk(minfo, minfo->values.pll.video, M_VIDEO_PLL);
703 } else { 727 } else {
704 unsigned long flags; 728 unsigned long flags;
705 unsigned int pwr; 729 unsigned int pwr;
706 730
707 matroxfb_DAC_lock_irqsave(flags); 731 matroxfb_DAC_lock_irqsave(flags);
708 pwr = inDAC1064(PMINFO M1064_XPWRCTRL) & ~0x02; 732 pwr = inDAC1064(minfo, M1064_XPWRCTRL) & ~0x02;
709 outDAC1064(PMINFO M1064_XPWRCTRL, pwr); 733 outDAC1064(minfo, M1064_XPWRCTRL, pwr);
710 matroxfb_DAC_unlock_irqrestore(flags); 734 matroxfb_DAC_unlock_irqrestore(flags);
711 } 735 }
712 matroxfb_g450_setclk(PMINFO minfo->values.pll.system, M_SYSTEM_PLL); 736 matroxfb_g450_setclk(minfo, minfo->values.pll.system, M_SYSTEM_PLL);
713 737
714 /* switch clocks to their real PLL source(s) */ 738 /* switch clocks to their real PLL source(s) */
715 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg | 4); 739 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg | 4);
@@ -718,7 +742,8 @@ static void g450_mclk_init(WPMINFO2) {
718 742
719} 743}
720 744
721static void g450_memory_init(WPMINFO2) { 745static void g450_memory_init(struct matrox_fb_info *minfo)
746{
722 /* disable memory refresh */ 747 /* disable memory refresh */
723 minfo->hw.MXoptionReg &= ~0x001F8000; 748 minfo->hw.MXoptionReg &= ~0x001F8000;
724 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg); 749 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
@@ -760,7 +785,8 @@ static void g450_memory_init(WPMINFO2) {
760 785
761} 786}
762 787
763static void g450_preinit(WPMINFO2) { 788static void g450_preinit(struct matrox_fb_info *minfo)
789{
764 u_int32_t c2ctl; 790 u_int32_t c2ctl;
765 u_int8_t curctl; 791 u_int8_t curctl;
766 u_int8_t c1ctl; 792 u_int8_t c1ctl;
@@ -783,24 +809,24 @@ static void g450_preinit(WPMINFO2) {
783 c2ctl = mga_inl(M_C2CTL); 809 c2ctl = mga_inl(M_C2CTL);
784 mga_outl(M_C2CTL, c2ctl & ~1); 810 mga_outl(M_C2CTL, c2ctl & ~1);
785 /* stop cursor */ 811 /* stop cursor */
786 curctl = inDAC1064(PMINFO M1064_XCURCTRL); 812 curctl = inDAC1064(minfo, M1064_XCURCTRL);
787 outDAC1064(PMINFO M1064_XCURCTRL, 0); 813 outDAC1064(minfo, M1064_XCURCTRL, 0);
788 /* stop crtc1 */ 814 /* stop crtc1 */
789 c1ctl = mga_readr(M_SEQ_INDEX, 1); 815 c1ctl = mga_readr(M_SEQ_INDEX, 1);
790 mga_setr(M_SEQ_INDEX, 1, c1ctl | 0x20); 816 mga_setr(M_SEQ_INDEX, 1, c1ctl | 0x20);
791 817
792 g450_mclk_init(PMINFO2); 818 g450_mclk_init(minfo);
793 g450_memory_init(PMINFO2); 819 g450_memory_init(minfo);
794 820
795 /* set legacy VGA clock sources for DOSEmu or VMware... */ 821 /* set legacy VGA clock sources for DOSEmu or VMware... */
796 matroxfb_g450_setclk(PMINFO 25175, M_PIXEL_PLL_A); 822 matroxfb_g450_setclk(minfo, 25175, M_PIXEL_PLL_A);
797 matroxfb_g450_setclk(PMINFO 28322, M_PIXEL_PLL_B); 823 matroxfb_g450_setclk(minfo, 28322, M_PIXEL_PLL_B);
798 824
799 /* restore crtc1 */ 825 /* restore crtc1 */
800 mga_setr(M_SEQ_INDEX, 1, c1ctl); 826 mga_setr(M_SEQ_INDEX, 1, c1ctl);
801 827
802 /* restore cursor */ 828 /* restore cursor */
803 outDAC1064(PMINFO M1064_XCURCTRL, curctl); 829 outDAC1064(minfo, M1064_XCURCTRL, curctl);
804 830
805 /* restore crtc2 */ 831 /* restore crtc2 */
806 mga_outl(M_C2CTL, c2ctl); 832 mga_outl(M_C2CTL, c2ctl);
@@ -808,7 +834,8 @@ static void g450_preinit(WPMINFO2) {
808 return; 834 return;
809} 835}
810 836
811static int MGAG100_preinit(WPMINFO2) { 837static int MGAG100_preinit(struct matrox_fb_info *minfo)
838{
812 static const int vxres_g100[] = { 512, 640, 768, 800, 832, 960, 839 static const int vxres_g100[] = { 512, 640, 768, 800, 832, 960,
813 1024, 1152, 1280, 1600, 1664, 1920, 840 1024, 1152, 1280, 1600, 1664, 1920,
814 2048, 0}; 841 2048, 0};
@@ -862,7 +889,7 @@ static int MGAG100_preinit(WPMINFO2) {
862 if (minfo->devflags.noinit) 889 if (minfo->devflags.noinit)
863 return 0; 890 return 0;
864 if (minfo->devflags.g450dac) { 891 if (minfo->devflags.g450dac) {
865 g450_preinit(PMINFO2); 892 g450_preinit(minfo);
866 return 0; 893 return 0;
867 } 894 }
868 hw->MXoptionReg &= 0xC0000100; 895 hw->MXoptionReg &= 0xC0000100;
@@ -874,7 +901,7 @@ static int MGAG100_preinit(WPMINFO2) {
874 if (minfo->devflags.nopciretry) 901 if (minfo->devflags.nopciretry)
875 hw->MXoptionReg |= 0x20000000; 902 hw->MXoptionReg |= 0x20000000;
876 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); 903 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
877 DAC1064_setmclk(PMINFO DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV3 | DAC1064_OPT_SCLK_PCI, 133333); 904 DAC1064_setmclk(minfo, DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV3 | DAC1064_OPT_SCLK_PCI, 133333);
878 905
879 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG100) { 906 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG100) {
880 pci_read_config_dword(minfo->pcidev, PCI_OPTION2_REG, &reg50); 907 pci_read_config_dword(minfo->pcidev, PCI_OPTION2_REG, &reg50);
@@ -952,7 +979,8 @@ static int MGAG100_preinit(WPMINFO2) {
952 return 0; 979 return 0;
953} 980}
954 981
955static void MGAG100_reset(WPMINFO2) { 982static void MGAG100_reset(struct matrox_fb_info *minfo)
983{
956 u_int8_t b; 984 u_int8_t b;
957 struct matrox_hw_state *hw = &minfo->hw; 985 struct matrox_hw_state *hw = &minfo->hw;
958 986
@@ -981,35 +1009,36 @@ static void MGAG100_reset(WPMINFO2) {
981 } 1009 }
982 if (minfo->devflags.g450dac) { 1010 if (minfo->devflags.g450dac) {
983 /* either leave MCLK as is... or they were set in preinit */ 1011 /* either leave MCLK as is... or they were set in preinit */
984 hw->DACclk[3] = inDAC1064(PMINFO DAC1064_XSYSPLLM); 1012 hw->DACclk[3] = inDAC1064(minfo, DAC1064_XSYSPLLM);
985 hw->DACclk[4] = inDAC1064(PMINFO DAC1064_XSYSPLLN); 1013 hw->DACclk[4] = inDAC1064(minfo, DAC1064_XSYSPLLN);
986 hw->DACclk[5] = inDAC1064(PMINFO DAC1064_XSYSPLLP); 1014 hw->DACclk[5] = inDAC1064(minfo, DAC1064_XSYSPLLP);
987 } else { 1015 } else {
988 DAC1064_setmclk(PMINFO DAC1064_OPT_RESERVED | DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV1 | DAC1064_OPT_SCLK_PLL, 133333); 1016 DAC1064_setmclk(minfo, DAC1064_OPT_RESERVED | DAC1064_OPT_MDIV2 | DAC1064_OPT_GDIV1 | DAC1064_OPT_SCLK_PLL, 133333);
989 } 1017 }
990 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) { 1018 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) {
991 if (minfo->devflags.dfp_type == -1) { 1019 if (minfo->devflags.dfp_type == -1) {
992 minfo->devflags.dfp_type = inDAC1064(PMINFO 0x1F); 1020 minfo->devflags.dfp_type = inDAC1064(minfo, 0x1F);
993 } 1021 }
994 } 1022 }
995 if (minfo->devflags.noinit) 1023 if (minfo->devflags.noinit)
996 return; 1024 return;
997 if (minfo->devflags.g450dac) { 1025 if (minfo->devflags.g450dac) {
998 } else { 1026 } else {
999 MGAG100_setPixClock(PMINFO 4, 25175); 1027 MGAG100_setPixClock(minfo, 4, 25175);
1000 MGAG100_setPixClock(PMINFO 5, 28322); 1028 MGAG100_setPixClock(minfo, 5, 28322);
1001 if (x7AF4 & 0x10) { 1029 if (x7AF4 & 0x10) {
1002 b = inDAC1064(PMINFO M1064_XGENIODATA) & ~1; 1030 b = inDAC1064(minfo, M1064_XGENIODATA) & ~1;
1003 outDAC1064(PMINFO M1064_XGENIODATA, b); 1031 outDAC1064(minfo, M1064_XGENIODATA, b);
1004 b = inDAC1064(PMINFO M1064_XGENIOCTRL) | 1; 1032 b = inDAC1064(minfo, M1064_XGENIOCTRL) | 1;
1005 outDAC1064(PMINFO M1064_XGENIOCTRL, b); 1033 outDAC1064(minfo, M1064_XGENIOCTRL, b);
1006 } 1034 }
1007 } 1035 }
1008} 1036}
1009#endif 1037#endif
1010 1038
1011#ifdef CONFIG_FB_MATROX_MYSTIQUE 1039#ifdef CONFIG_FB_MATROX_MYSTIQUE
1012static void MGA1064_restore(WPMINFO2) { 1040static void MGA1064_restore(struct matrox_fb_info *minfo)
1041{
1013 int i; 1042 int i;
1014 struct matrox_hw_state *hw = &minfo->hw; 1043 struct matrox_hw_state *hw = &minfo->hw;
1015 1044
@@ -1025,17 +1054,18 @@ static void MGA1064_restore(WPMINFO2) {
1025 1054
1026 CRITEND 1055 CRITEND
1027 1056
1028 DAC1064_restore_1(PMINFO2); 1057 DAC1064_restore_1(minfo);
1029 matroxfb_vgaHWrestore(PMINFO2); 1058 matroxfb_vgaHWrestore(minfo);
1030 minfo->crtc1.panpos = -1; 1059 minfo->crtc1.panpos = -1;
1031 for (i = 0; i < 6; i++) 1060 for (i = 0; i < 6; i++)
1032 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]); 1061 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]);
1033 DAC1064_restore_2(PMINFO2); 1062 DAC1064_restore_2(minfo);
1034} 1063}
1035#endif 1064#endif
1036 1065
1037#ifdef CONFIG_FB_MATROX_G 1066#ifdef CONFIG_FB_MATROX_G
1038static void MGAG100_restore(WPMINFO2) { 1067static void MGAG100_restore(struct matrox_fb_info *minfo)
1068{
1039 int i; 1069 int i;
1040 struct matrox_hw_state *hw = &minfo->hw; 1070 struct matrox_hw_state *hw = &minfo->hw;
1041 1071
@@ -1048,8 +1078,8 @@ static void MGAG100_restore(WPMINFO2) {
1048 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); 1078 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
1049 CRITEND 1079 CRITEND
1050 1080
1051 DAC1064_restore_1(PMINFO2); 1081 DAC1064_restore_1(minfo);
1052 matroxfb_vgaHWrestore(PMINFO2); 1082 matroxfb_vgaHWrestore(minfo);
1053#ifdef CONFIG_FB_MATROX_32MB 1083#ifdef CONFIG_FB_MATROX_32MB
1054 if (minfo->devflags.support32MB) 1084 if (minfo->devflags.support32MB)
1055 mga_setr(M_EXTVGA_INDEX, 8, hw->CRTCEXT[8]); 1085 mga_setr(M_EXTVGA_INDEX, 8, hw->CRTCEXT[8]);
@@ -1057,7 +1087,7 @@ static void MGAG100_restore(WPMINFO2) {
1057 minfo->crtc1.panpos = -1; 1087 minfo->crtc1.panpos = -1;
1058 for (i = 0; i < 6; i++) 1088 for (i = 0; i < 6; i++)
1059 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]); 1089 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]);
1060 DAC1064_restore_2(PMINFO2); 1090 DAC1064_restore_2(minfo);
1061} 1091}
1062#endif 1092#endif
1063 1093
diff --git a/drivers/video/matrox/matroxfb_DAC1064.h b/drivers/video/matrox/matroxfb_DAC1064.h
index 7a98ce8043d7..c6ed7801efe2 100644
--- a/drivers/video/matrox/matroxfb_DAC1064.h
+++ b/drivers/video/matrox/matroxfb_DAC1064.h
@@ -11,8 +11,8 @@ extern struct matrox_switch matrox_mystique;
11extern struct matrox_switch matrox_G100; 11extern struct matrox_switch matrox_G100;
12#endif 12#endif
13#ifdef NEED_DAC1064 13#ifdef NEED_DAC1064
14void DAC1064_global_init(WPMINFO2); 14void DAC1064_global_init(struct matrox_fb_info *minfo);
15void DAC1064_global_restore(WPMINFO2); 15void DAC1064_global_restore(struct matrox_fb_info *minfo);
16#endif 16#endif
17 17
18#define M1064_INDEX 0x00 18#define M1064_INDEX 0x00
diff --git a/drivers/video/matrox/matroxfb_Ti3026.c b/drivers/video/matrox/matroxfb_Ti3026.c
index bc9c27499b39..835aaaae6b96 100644
--- a/drivers/video/matrox/matroxfb_Ti3026.c
+++ b/drivers/video/matrox/matroxfb_Ti3026.c
@@ -279,27 +279,31 @@ static const unsigned char MGADACbpp32[] =
279 TVP3026_XCOLKEYCTRL_ZOOM1, 279 TVP3026_XCOLKEYCTRL_ZOOM1,
280 0x00, 0x00, TVP3026_XCURCTRL_DIS }; 280 0x00, 0x00, TVP3026_XCURCTRL_DIS };
281 281
282static int Ti3026_calcclock(CPMINFO unsigned int freq, unsigned int fmax, int* in, int* feed, int* post) { 282static int Ti3026_calcclock(const struct matrox_fb_info *minfo,
283 unsigned int freq, unsigned int fmax, int *in,
284 int *feed, int *post)
285{
283 unsigned int fvco; 286 unsigned int fvco;
284 unsigned int lin, lfeed, lpost; 287 unsigned int lin, lfeed, lpost;
285 288
286 DBG(__func__) 289 DBG(__func__)
287 290
288 fvco = PLL_calcclock(PMINFO freq, fmax, &lin, &lfeed, &lpost); 291 fvco = PLL_calcclock(minfo, freq, fmax, &lin, &lfeed, &lpost);
289 fvco >>= (*post = lpost); 292 fvco >>= (*post = lpost);
290 *in = 64 - lin; 293 *in = 64 - lin;
291 *feed = 64 - lfeed; 294 *feed = 64 - lfeed;
292 return fvco; 295 return fvco;
293} 296}
294 297
295static int Ti3026_setpclk(WPMINFO int clk) { 298static int Ti3026_setpclk(struct matrox_fb_info *minfo, int clk)
299{
296 unsigned int f_pll; 300 unsigned int f_pll;
297 unsigned int pixfeed, pixin, pixpost; 301 unsigned int pixfeed, pixin, pixpost;
298 struct matrox_hw_state *hw = &minfo->hw; 302 struct matrox_hw_state *hw = &minfo->hw;
299 303
300 DBG(__func__) 304 DBG(__func__)
301 305
302 f_pll = Ti3026_calcclock(PMINFO clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost); 306 f_pll = Ti3026_calcclock(minfo, clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost);
303 307
304 hw->DACclk[0] = pixin | 0xC0; 308 hw->DACclk[0] = pixin | 0xC0;
305 hw->DACclk[1] = pixfeed; 309 hw->DACclk[1] = pixfeed;
@@ -361,7 +365,8 @@ static int Ti3026_setpclk(WPMINFO int clk) {
361 return 0; 365 return 0;
362} 366}
363 367
364static int Ti3026_init(WPMINFO struct my_timming* m) { 368static int Ti3026_init(struct matrox_fb_info *minfo, struct my_timming *m)
369{
365 u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT; 370 u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT;
366 struct matrox_hw_state *hw = &minfo->hw; 371 struct matrox_hw_state *hw = &minfo->hw;
367 372
@@ -400,7 +405,7 @@ static int Ti3026_init(WPMINFO struct my_timming* m) {
400 default: 405 default:
401 return 1; /* TODO: failed */ 406 return 1; /* TODO: failed */
402 } 407 }
403 if (matroxfb_vgaHWinit(PMINFO m)) return 1; 408 if (matroxfb_vgaHWinit(minfo, m)) return 1;
404 409
405 /* set SYNC */ 410 /* set SYNC */
406 hw->MiscOutReg = 0xCB; 411 hw->MiscOutReg = 0xCB;
@@ -429,11 +434,12 @@ static int Ti3026_init(WPMINFO struct my_timming* m) {
429 if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000; 434 if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000;
430 435
431 /* set DAC */ 436 /* set DAC */
432 Ti3026_setpclk(PMINFO m->pixclock); 437 Ti3026_setpclk(minfo, m->pixclock);
433 return 0; 438 return 0;
434} 439}
435 440
436static void ti3026_setMCLK(WPMINFO int fout){ 441static void ti3026_setMCLK(struct matrox_fb_info *minfo, int fout)
442{
437 unsigned int f_pll; 443 unsigned int f_pll;
438 unsigned int pclk_m, pclk_n, pclk_p; 444 unsigned int pclk_m, pclk_n, pclk_p;
439 unsigned int mclk_m, mclk_n, mclk_p; 445 unsigned int mclk_m, mclk_n, mclk_p;
@@ -442,29 +448,29 @@ static void ti3026_setMCLK(WPMINFO int fout){
442 448
443 DBG(__func__) 449 DBG(__func__)
444 450
445 f_pll = Ti3026_calcclock(PMINFO fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p); 451 f_pll = Ti3026_calcclock(minfo, fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p);
446 452
447 /* save pclk */ 453 /* save pclk */
448 outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC); 454 outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
449 pclk_n = inTi3026(PMINFO TVP3026_XPIXPLLDATA); 455 pclk_n = inTi3026(minfo, TVP3026_XPIXPLLDATA);
450 outTi3026(PMINFO TVP3026_XPLLADDR, 0xFD); 456 outTi3026(minfo, TVP3026_XPLLADDR, 0xFD);
451 pclk_m = inTi3026(PMINFO TVP3026_XPIXPLLDATA); 457 pclk_m = inTi3026(minfo, TVP3026_XPIXPLLDATA);
452 outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE); 458 outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
453 pclk_p = inTi3026(PMINFO TVP3026_XPIXPLLDATA); 459 pclk_p = inTi3026(minfo, TVP3026_XPIXPLLDATA);
454 460
455 /* stop pclk */ 461 /* stop pclk */
456 outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE); 462 outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
457 outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00); 463 outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
458 464
459 /* set pclk to new mclk */ 465 /* set pclk to new mclk */
460 outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC); 466 outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
461 outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_n | 0xC0); 467 outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_n | 0xC0);
462 outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_m); 468 outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_m);
463 outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_p | 0xB0); 469 outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_p | 0xB0);
464 470
465 /* wait for PLL to lock */ 471 /* wait for PLL to lock */
466 for (tmout = 500000; tmout; tmout--) { 472 for (tmout = 500000; tmout; tmout--) {
467 if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40) 473 if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
468 break; 474 break;
469 udelay(10); 475 udelay(10);
470 }; 476 };
@@ -472,23 +478,23 @@ static void ti3026_setMCLK(WPMINFO int fout){
472 printk(KERN_ERR "matroxfb: Temporary pixel PLL not locked after 5 secs\n"); 478 printk(KERN_ERR "matroxfb: Temporary pixel PLL not locked after 5 secs\n");
473 479
474 /* output pclk on mclk pin */ 480 /* output pclk on mclk pin */
475 mclk_ctl = inTi3026(PMINFO TVP3026_XMEMPLLCTRL); 481 mclk_ctl = inTi3026(minfo, TVP3026_XMEMPLLCTRL);
476 outTi3026(PMINFO TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7); 482 outTi3026(minfo, TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7);
477 outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4); 483 outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4);
478 484
479 /* stop MCLK */ 485 /* stop MCLK */
480 outTi3026(PMINFO TVP3026_XPLLADDR, 0xFB); 486 outTi3026(minfo, TVP3026_XPLLADDR, 0xFB);
481 outTi3026(PMINFO TVP3026_XMEMPLLDATA, 0x00); 487 outTi3026(minfo, TVP3026_XMEMPLLDATA, 0x00);
482 488
483 /* set mclk to new freq */ 489 /* set mclk to new freq */
484 outTi3026(PMINFO TVP3026_XPLLADDR, 0xF3); 490 outTi3026(minfo, TVP3026_XPLLADDR, 0xF3);
485 outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_n | 0xC0); 491 outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_n | 0xC0);
486 outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_m); 492 outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_m);
487 outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_p | 0xB0); 493 outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_p | 0xB0);
488 494
489 /* wait for PLL to lock */ 495 /* wait for PLL to lock */
490 for (tmout = 500000; tmout; tmout--) { 496 for (tmout = 500000; tmout; tmout--) {
491 if (inTi3026(PMINFO TVP3026_XMEMPLLDATA) & 0x40) 497 if (inTi3026(minfo, TVP3026_XMEMPLLDATA) & 0x40)
492 break; 498 break;
493 udelay(10); 499 udelay(10);
494 } 500 }
@@ -509,22 +515,22 @@ static void ti3026_setMCLK(WPMINFO int fout){
509 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg); 515 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
510 516
511 /* output MCLK to MCLK pin */ 517 /* output MCLK to MCLK pin */
512 outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); 518 outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
513 outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4); 519 outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4);
514 520
515 /* stop PCLK */ 521 /* stop PCLK */
516 outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE); 522 outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
517 outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00); 523 outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
518 524
519 /* restore pclk */ 525 /* restore pclk */
520 outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC); 526 outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
521 outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_n); 527 outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_n);
522 outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_m); 528 outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_m);
523 outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_p); 529 outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_p);
524 530
525 /* wait for PLL to lock */ 531 /* wait for PLL to lock */
526 for (tmout = 500000; tmout; tmout--) { 532 for (tmout = 500000; tmout; tmout--) {
527 if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40) 533 if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
528 break; 534 break;
529 udelay(10); 535 udelay(10);
530 } 536 }
@@ -532,8 +538,8 @@ static void ti3026_setMCLK(WPMINFO int fout){
532 printk(KERN_ERR "matroxfb: Pixel PLL not locked after 5 secs\n"); 538 printk(KERN_ERR "matroxfb: Pixel PLL not locked after 5 secs\n");
533} 539}
534 540
535static void ti3026_ramdac_init(WPMINFO2) { 541static void ti3026_ramdac_init(struct matrox_fb_info *minfo)
536 542{
537 DBG(__func__) 543 DBG(__func__)
538 544
539 minfo->features.pll.vco_freq_min = 110000; 545 minfo->features.pll.vco_freq_min = 110000;
@@ -545,10 +551,11 @@ static void ti3026_ramdac_init(WPMINFO2) {
545 minfo->features.pll.post_shift_max = 3; 551 minfo->features.pll.post_shift_max = 3;
546 if (minfo->devflags.noinit) 552 if (minfo->devflags.noinit)
547 return; 553 return;
548 ti3026_setMCLK(PMINFO 60000); 554 ti3026_setMCLK(minfo, 60000);
549} 555}
550 556
551static void Ti3026_restore(WPMINFO2) { 557static void Ti3026_restore(struct matrox_fb_info *minfo)
558{
552 int i; 559 int i;
553 unsigned char progdac[6]; 560 unsigned char progdac[6];
554 struct matrox_hw_state *hw = &minfo->hw; 561 struct matrox_hw_state *hw = &minfo->hw;
@@ -569,7 +576,7 @@ static void Ti3026_restore(WPMINFO2) {
569 576
570 CRITEND 577 CRITEND
571 578
572 matroxfb_vgaHWrestore(PMINFO2); 579 matroxfb_vgaHWrestore(minfo);
573 580
574 CRITBEGIN 581 CRITBEGIN
575 582
@@ -578,18 +585,18 @@ static void Ti3026_restore(WPMINFO2) {
578 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]); 585 mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]);
579 586
580 for (i = 0; i < 21; i++) { 587 for (i = 0; i < 21; i++) {
581 outTi3026(PMINFO DACseq[i], hw->DACreg[i]); 588 outTi3026(minfo, DACseq[i], hw->DACreg[i]);
582 } 589 }
583 590
584 outTi3026(PMINFO TVP3026_XPLLADDR, 0x00); 591 outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
585 progdac[0] = inTi3026(PMINFO TVP3026_XPIXPLLDATA); 592 progdac[0] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
586 progdac[3] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA); 593 progdac[3] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
587 outTi3026(PMINFO TVP3026_XPLLADDR, 0x15); 594 outTi3026(minfo, TVP3026_XPLLADDR, 0x15);
588 progdac[1] = inTi3026(PMINFO TVP3026_XPIXPLLDATA); 595 progdac[1] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
589 progdac[4] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA); 596 progdac[4] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
590 outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A); 597 outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
591 progdac[2] = inTi3026(PMINFO TVP3026_XPIXPLLDATA); 598 progdac[2] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
592 progdac[5] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA); 599 progdac[5] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
593 600
594 CRITEND 601 CRITEND
595 if (memcmp(hw->DACclk, progdac, 6)) { 602 if (memcmp(hw->DACclk, progdac, 6)) {
@@ -598,20 +605,20 @@ static void Ti3026_restore(WPMINFO2) {
598 /* Maybe even we should call schedule() ? */ 605 /* Maybe even we should call schedule() ? */
599 606
600 CRITBEGIN 607 CRITBEGIN
601 outTi3026(PMINFO TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]); 608 outTi3026(minfo, TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]);
602 outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A); 609 outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
603 outTi3026(PMINFO TVP3026_XLOOPPLLDATA, 0); 610 outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0);
604 outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0); 611 outTi3026(minfo, TVP3026_XPIXPLLDATA, 0);
605 612
606 outTi3026(PMINFO TVP3026_XPLLADDR, 0x00); 613 outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
607 for (i = 0; i < 3; i++) 614 for (i = 0; i < 3; i++)
608 outTi3026(PMINFO TVP3026_XPIXPLLDATA, hw->DACclk[i]); 615 outTi3026(minfo, TVP3026_XPIXPLLDATA, hw->DACclk[i]);
609 /* wait for PLL only if PLL clock requested (always for PowerMode, never for VGA) */ 616 /* wait for PLL only if PLL clock requested (always for PowerMode, never for VGA) */
610 if (hw->MiscOutReg & 0x08) { 617 if (hw->MiscOutReg & 0x08) {
611 int tmout; 618 int tmout;
612 outTi3026(PMINFO TVP3026_XPLLADDR, 0x3F); 619 outTi3026(minfo, TVP3026_XPLLADDR, 0x3F);
613 for (tmout = 500000; tmout; --tmout) { 620 for (tmout = 500000; tmout; --tmout) {
614 if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40) 621 if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
615 break; 622 break;
616 udelay(10); 623 udelay(10);
617 } 624 }
@@ -624,18 +631,18 @@ static void Ti3026_restore(WPMINFO2) {
624 dprintk(KERN_INFO "PixelPLL: %d\n", 500000-tmout); 631 dprintk(KERN_INFO "PixelPLL: %d\n", 500000-tmout);
625 CRITBEGIN 632 CRITBEGIN
626 } 633 }
627 outTi3026(PMINFO TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]); 634 outTi3026(minfo, TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]);
628 outTi3026(PMINFO TVP3026_XPLLADDR, 0x00); 635 outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
629 for (i = 3; i < 6; i++) 636 for (i = 3; i < 6; i++)
630 outTi3026(PMINFO TVP3026_XLOOPPLLDATA, hw->DACclk[i]); 637 outTi3026(minfo, TVP3026_XLOOPPLLDATA, hw->DACclk[i]);
631 CRITEND 638 CRITEND
632 if ((hw->MiscOutReg & 0x08) && ((hw->DACclk[5] & 0x80) == 0x80)) { 639 if ((hw->MiscOutReg & 0x08) && ((hw->DACclk[5] & 0x80) == 0x80)) {
633 int tmout; 640 int tmout;
634 641
635 CRITBEGIN 642 CRITBEGIN
636 outTi3026(PMINFO TVP3026_XPLLADDR, 0x3F); 643 outTi3026(minfo, TVP3026_XPLLADDR, 0x3F);
637 for (tmout = 500000; tmout; --tmout) { 644 for (tmout = 500000; tmout; --tmout) {
638 if (inTi3026(PMINFO TVP3026_XLOOPPLLDATA) & 0x40) 645 if (inTi3026(minfo, TVP3026_XLOOPPLLDATA) & 0x40)
639 break; 646 break;
640 udelay(10); 647 udelay(10);
641 } 648 }
@@ -660,18 +667,19 @@ static void Ti3026_restore(WPMINFO2) {
660#endif 667#endif
661} 668}
662 669
663static void Ti3026_reset(WPMINFO2) { 670static void Ti3026_reset(struct matrox_fb_info *minfo)
664 671{
665 DBG(__func__) 672 DBG(__func__)
666 673
667 ti3026_ramdac_init(PMINFO2); 674 ti3026_ramdac_init(minfo);
668} 675}
669 676
670static struct matrox_altout ti3026_output = { 677static struct matrox_altout ti3026_output = {
671 .name = "Primary output", 678 .name = "Primary output",
672}; 679};
673 680
674static int Ti3026_preinit(WPMINFO2) { 681static int Ti3026_preinit(struct matrox_fb_info *minfo)
682{
675 static const int vxres_mill2[] = { 512, 640, 768, 800, 832, 960, 683 static const int vxres_mill2[] = { 512, 640, 768, 800, 832, 960,
676 1024, 1152, 1280, 1600, 1664, 1920, 684 1024, 1152, 1280, 1600, 1664, 1920,
677 2048, 0}; 685 2048, 0};
@@ -706,19 +714,19 @@ static int Ti3026_preinit(WPMINFO2) {
706 hw->MXoptionReg |= 0x20000000; 714 hw->MXoptionReg |= 0x20000000;
707 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); 715 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
708 716
709 minfo->accel.ramdac_rev = inTi3026(PMINFO TVP3026_XSILICONREV); 717 minfo->accel.ramdac_rev = inTi3026(minfo, TVP3026_XSILICONREV);
710 718
711 outTi3026(PMINFO TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED); 719 outTi3026(minfo, TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED);
712 outTi3026(PMINFO TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR); 720 outTi3026(minfo, TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR);
713 outTi3026(PMINFO TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA); 721 outTi3026(minfo, TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA);
714 722
715 outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A); 723 outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
716 outTi3026(PMINFO TVP3026_XLOOPPLLDATA, 0x00); 724 outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0x00);
717 outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00); 725 outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
718 726
719 mga_outb(M_MISC_REG, 0x67); 727 mga_outb(M_MISC_REG, 0x67);
720 728
721 outTi3026(PMINFO TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); 729 outTi3026(minfo, TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
722 730
723 mga_outl(M_RESET, 1); 731 mga_outl(M_RESET, 1);
724 udelay(250); 732 udelay(250);
diff --git a/drivers/video/matrox/matroxfb_accel.c b/drivers/video/matrox/matroxfb_accel.c
index ed42bf6a0c15..3577ec144f86 100644
--- a/drivers/video/matrox/matroxfb_accel.c
+++ b/drivers/video/matrox/matroxfb_accel.c
@@ -107,7 +107,8 @@ static void matroxfb_imageblit(struct fb_info* info, const struct fb_image* imag
107static void matroxfb_cfb4_fillrect(struct fb_info* info, const struct fb_fillrect* rect); 107static void matroxfb_cfb4_fillrect(struct fb_info* info, const struct fb_fillrect* rect);
108static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyarea* area); 108static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyarea* area);
109 109
110void matrox_cfbX_init(WPMINFO2) { 110void matrox_cfbX_init(struct matrox_fb_info *minfo)
111{
111 u_int32_t maccess; 112 u_int32_t maccess;
112 u_int32_t mpitch; 113 u_int32_t mpitch;
113 u_int32_t mopmode; 114 u_int32_t mopmode;
@@ -195,7 +196,9 @@ void matrox_cfbX_init(WPMINFO2) {
195 196
196EXPORT_SYMBOL(matrox_cfbX_init); 197EXPORT_SYMBOL(matrox_cfbX_init);
197 198
198static void matrox_accel_bmove(WPMINFO int vxres, int sy, int sx, int dy, int dx, int height, int width) { 199static void matrox_accel_bmove(struct matrox_fb_info *minfo, int vxres, int sy,
200 int sx, int dy, int dx, int height, int width)
201{
199 int start, end; 202 int start, end;
200 CRITFLAGS 203 CRITFLAGS
201 204
@@ -231,7 +234,10 @@ static void matrox_accel_bmove(WPMINFO int vxres, int sy, int sx, int dy, int dx
231 CRITEND 234 CRITEND
232} 235}
233 236
234static void matrox_accel_bmove_lin(WPMINFO int vxres, int sy, int sx, int dy, int dx, int height, int width) { 237static void matrox_accel_bmove_lin(struct matrox_fb_info *minfo, int vxres,
238 int sy, int sx, int dy, int dx, int height,
239 int width)
240{
235 int start, end; 241 int start, end;
236 CRITFLAGS 242 CRITFLAGS
237 243
@@ -274,17 +280,18 @@ static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyare
274 if ((area->sx | area->dx | area->width) & 1) 280 if ((area->sx | area->dx | area->width) & 1)
275 cfb_copyarea(info, area); 281 cfb_copyarea(info, area);
276 else 282 else
277 matrox_accel_bmove_lin(PMINFO minfo->fbcon.var.xres_virtual >> 1, area->sy, area->sx >> 1, area->dy, area->dx >> 1, area->height, area->width >> 1); 283 matrox_accel_bmove_lin(minfo, minfo->fbcon.var.xres_virtual >> 1, area->sy, area->sx >> 1, area->dy, area->dx >> 1, area->height, area->width >> 1);
278} 284}
279 285
280static void matroxfb_copyarea(struct fb_info* info, const struct fb_copyarea* area) { 286static void matroxfb_copyarea(struct fb_info* info, const struct fb_copyarea* area) {
281 MINFO_FROM_INFO(info); 287 MINFO_FROM_INFO(info);
282 288
283 matrox_accel_bmove(PMINFO minfo->fbcon.var.xres_virtual, area->sy, area->sx, area->dy, area->dx, area->height, area->width); 289 matrox_accel_bmove(minfo, minfo->fbcon.var.xres_virtual, area->sy, area->sx, area->dy, area->dx, area->height, area->width);
284} 290}
285 291
286static void matroxfb_accel_clear(WPMINFO u_int32_t color, int sy, int sx, int height, 292static void matroxfb_accel_clear(struct matrox_fb_info *minfo, u_int32_t color,
287 int width) { 293 int sy, int sx, int height, int width)
294{
288 CRITFLAGS 295 CRITFLAGS
289 296
290 DBG(__func__) 297 DBG(__func__)
@@ -306,12 +313,14 @@ static void matroxfb_fillrect(struct fb_info* info, const struct fb_fillrect* re
306 313
307 switch (rect->rop) { 314 switch (rect->rop) {
308 case ROP_COPY: 315 case ROP_COPY:
309 matroxfb_accel_clear(PMINFO ((u_int32_t*)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width); 316 matroxfb_accel_clear(minfo, ((u_int32_t *)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
310 break; 317 break;
311 } 318 }
312} 319}
313 320
314static void matroxfb_cfb4_clear(WPMINFO u_int32_t bgx, int sy, int sx, int height, int width) { 321static void matroxfb_cfb4_clear(struct matrox_fb_info *minfo, u_int32_t bgx,
322 int sy, int sx, int height, int width)
323{
315 int whattodo; 324 int whattodo;
316 CRITFLAGS 325 CRITFLAGS
317 326
@@ -371,13 +380,15 @@ static void matroxfb_cfb4_fillrect(struct fb_info* info, const struct fb_fillrec
371 380
372 switch (rect->rop) { 381 switch (rect->rop) {
373 case ROP_COPY: 382 case ROP_COPY:
374 matroxfb_cfb4_clear(PMINFO ((u_int32_t*)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width); 383 matroxfb_cfb4_clear(minfo, ((u_int32_t *)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
375 break; 384 break;
376 } 385 }
377} 386}
378 387
379static void matroxfb_1bpp_imageblit(WPMINFO u_int32_t fgx, u_int32_t bgx, 388static void matroxfb_1bpp_imageblit(struct matrox_fb_info *minfo, u_int32_t fgx,
380 const u_int8_t* chardata, int width, int height, int yy, int xx) { 389 u_int32_t bgx, const u_int8_t *chardata,
390 int width, int height, int yy, int xx)
391{
381 u_int32_t step; 392 u_int32_t step;
382 u_int32_t ydstlen; 393 u_int32_t ydstlen;
383 u_int32_t xlen; 394 u_int32_t xlen;
@@ -476,7 +487,7 @@ static void matroxfb_imageblit(struct fb_info* info, const struct fb_image* imag
476 487
477 fgx = ((u_int32_t*)info->pseudo_palette)[image->fg_color]; 488 fgx = ((u_int32_t*)info->pseudo_palette)[image->fg_color];
478 bgx = ((u_int32_t*)info->pseudo_palette)[image->bg_color]; 489 bgx = ((u_int32_t*)info->pseudo_palette)[image->bg_color];
479 matroxfb_1bpp_imageblit(PMINFO fgx, bgx, image->data, image->width, image->height, image->dy, image->dx); 490 matroxfb_1bpp_imageblit(minfo, fgx, bgx, image->data, image->width, image->height, image->dy, image->dx);
480 } else { 491 } else {
481 /* Danger! image->depth is useless: logo painting code always 492 /* Danger! image->depth is useless: logo painting code always
482 passes framebuffer color depth here, although logo data are 493 passes framebuffer color depth here, although logo data are
diff --git a/drivers/video/matrox/matroxfb_accel.h b/drivers/video/matrox/matroxfb_accel.h
index f40c314b4c30..1e418e62c22d 100644
--- a/drivers/video/matrox/matroxfb_accel.h
+++ b/drivers/video/matrox/matroxfb_accel.h
@@ -3,6 +3,6 @@
3 3
4#include "matroxfb_base.h" 4#include "matroxfb_base.h"
5 5
6void matrox_cfbX_init(WPMINFO2); 6void matrox_cfbX_init(struct matrox_fb_info *minfo);
7 7
8#endif 8#endif
diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c
index 867a4d915e77..73ad59822ea1 100644
--- a/drivers/video/matrox/matroxfb_base.c
+++ b/drivers/video/matrox/matroxfb_base.c
@@ -154,7 +154,8 @@ static struct fb_var_screeninfo vesafb_defined = {
154 154
155 155
156/* --------------------------------------------------------------------- */ 156/* --------------------------------------------------------------------- */
157static void update_crtc2(WPMINFO unsigned int pos) { 157static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
158{
158 struct matroxfb_dh_fb_info *info = minfo->crtc2.info; 159 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
159 160
160 /* Make sure that displays are compatible */ 161 /* Make sure that displays are compatible */
@@ -177,7 +178,8 @@ static void update_crtc2(WPMINFO unsigned int pos) {
177 } 178 }
178} 179}
179 180
180static void matroxfb_crtc1_panpos(WPMINFO2) { 181static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
182{
181 if (minfo->crtc1.panpos >= 0) { 183 if (minfo->crtc1.panpos >= 0) {
182 unsigned long flags; 184 unsigned long flags;
183 int panpos; 185 int panpos;
@@ -210,7 +212,7 @@ static irqreturn_t matrox_irq(int irq, void *dev_id)
210 if (status & 0x20) { 212 if (status & 0x20) {
211 mga_outl(M_ICLEAR, 0x20); 213 mga_outl(M_ICLEAR, 0x20);
212 minfo->crtc1.vsync.cnt++; 214 minfo->crtc1.vsync.cnt++;
213 matroxfb_crtc1_panpos(PMINFO2); 215 matroxfb_crtc1_panpos(minfo);
214 wake_up_interruptible(&minfo->crtc1.vsync.wait); 216 wake_up_interruptible(&minfo->crtc1.vsync.wait);
215 handled = 1; 217 handled = 1;
216 } 218 }
@@ -223,7 +225,8 @@ static irqreturn_t matrox_irq(int irq, void *dev_id)
223 return IRQ_RETVAL(handled); 225 return IRQ_RETVAL(handled);
224} 226}
225 227
226int matroxfb_enable_irq(WPMINFO int reenable) { 228int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
229{
227 u_int32_t bm; 230 u_int32_t bm;
228 231
229 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 232 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
@@ -252,10 +255,11 @@ int matroxfb_enable_irq(WPMINFO int reenable) {
252 return 0; 255 return 0;
253} 256}
254 257
255static void matroxfb_disable_irq(WPMINFO2) { 258static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
259{
256 if (test_and_clear_bit(0, &minfo->irq_flags)) { 260 if (test_and_clear_bit(0, &minfo->irq_flags)) {
257 /* Flush pending pan-at-vbl request... */ 261 /* Flush pending pan-at-vbl request... */
258 matroxfb_crtc1_panpos(PMINFO2); 262 matroxfb_crtc1_panpos(minfo);
259 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 263 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
260 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220); 264 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
261 else 265 else
@@ -264,7 +268,8 @@ static void matroxfb_disable_irq(WPMINFO2) {
264 } 268 }
265} 269}
266 270
267int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) { 271int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
272{
268 struct matrox_vsync *vs; 273 struct matrox_vsync *vs;
269 unsigned int cnt; 274 unsigned int cnt;
270 int ret; 275 int ret;
@@ -282,7 +287,7 @@ int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
282 default: 287 default:
283 return -ENODEV; 288 return -ENODEV;
284 } 289 }
285 ret = matroxfb_enable_irq(PMINFO 0); 290 ret = matroxfb_enable_irq(minfo, 0);
286 if (ret) { 291 if (ret) {
287 return ret; 292 return ret;
288 } 293 }
@@ -293,7 +298,7 @@ int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
293 return ret; 298 return ret;
294 } 299 }
295 if (ret == 0) { 300 if (ret == 0) {
296 matroxfb_enable_irq(PMINFO 1); 301 matroxfb_enable_irq(minfo, 1);
297 return -ETIMEDOUT; 302 return -ETIMEDOUT;
298 } 303 }
299 return 0; 304 return 0;
@@ -301,7 +306,9 @@ int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
301 306
302/* --------------------------------------------------------------------- */ 307/* --------------------------------------------------------------------- */
303 308
304static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) { 309static void matrox_pan_var(struct matrox_fb_info *minfo,
310 struct fb_var_screeninfo *var)
311{
305 unsigned int pos; 312 unsigned int pos;
306 unsigned short p0, p1, p2; 313 unsigned short p0, p1, p2;
307#ifdef CONFIG_FB_MATROX_32MB 314#ifdef CONFIG_FB_MATROX_32MB
@@ -329,7 +336,7 @@ static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
329#endif 336#endif
330 337
331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */ 338 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0); 339 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
333 340
334 CRITBEGIN 341 CRITBEGIN
335 342
@@ -349,12 +356,13 @@ static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
349 } 356 }
350 matroxfb_DAC_unlock_irqrestore(flags); 357 matroxfb_DAC_unlock_irqrestore(flags);
351 358
352 update_crtc2(PMINFO pos); 359 update_crtc2(minfo, pos);
353 360
354 CRITEND 361 CRITEND
355} 362}
356 363
357static void matroxfb_remove(WPMINFO int dummy) { 364static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
365{
358 /* Currently we are holding big kernel lock on all dead & usecount updates. 366 /* Currently we are holding big kernel lock on all dead & usecount updates.
359 * Destroy everything after all users release it. Especially do not unregister 367 * Destroy everything after all users release it. Especially do not unregister
360 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check 368 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
@@ -370,7 +378,7 @@ static void matroxfb_remove(WPMINFO int dummy) {
370 } 378 }
371 matroxfb_unregister_device(minfo); 379 matroxfb_unregister_device(minfo);
372 unregister_framebuffer(&minfo->fbcon); 380 unregister_framebuffer(&minfo->fbcon);
373 matroxfb_g450_shutdown(PMINFO2); 381 matroxfb_g450_shutdown(minfo);
374#ifdef CONFIG_MTRR 382#ifdef CONFIG_MTRR
375 if (minfo->mtrr.vram_valid) 383 if (minfo->mtrr.vram_valid)
376 mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len); 384 mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len);
@@ -410,11 +418,11 @@ static int matroxfb_release(struct fb_info *info, int user)
410 418
411 if (user) { 419 if (user) {
412 if (0 == --minfo->userusecount) { 420 if (0 == --minfo->userusecount) {
413 matroxfb_disable_irq(PMINFO2); 421 matroxfb_disable_irq(minfo);
414 } 422 }
415 } 423 }
416 if (!(--minfo->usecount) && minfo->dead) { 424 if (!(--minfo->usecount) && minfo->dead) {
417 matroxfb_remove(PMINFO 0); 425 matroxfb_remove(minfo, 0);
418 } 426 }
419 return(0); 427 return(0);
420} 428}
@@ -425,11 +433,13 @@ static int matroxfb_pan_display(struct fb_var_screeninfo *var,
425 433
426 DBG(__func__) 434 DBG(__func__)
427 435
428 matrox_pan_var(PMINFO var); 436 matrox_pan_var(minfo, var);
429 return 0; 437 return 0;
430} 438}
431 439
432static int matroxfb_get_final_bppShift(CPMINFO int bpp) { 440static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
441 int bpp)
442{
433 int bppshft2; 443 int bppshft2;
434 444
435 DBG(__func__) 445 DBG(__func__)
@@ -445,7 +455,9 @@ static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
445 return bppshft2; 455 return bppshft2;
446} 456}
447 457
448static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) { 458static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
459 int xres, int bpp)
460{
449 int over; 461 int over;
450 int rounding; 462 int rounding;
451 463
@@ -476,7 +488,9 @@ static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
476 return xres; 488 return xres;
477} 489}
478 490
479static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) { 491static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
492 int bpp)
493{
480 const int* width; 494 const int* width;
481 int xres_new; 495 int xres_new;
482 496
@@ -488,14 +502,14 @@ static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
488 502
489 if (minfo->devflags.precise_width) { 503 if (minfo->devflags.precise_width) {
490 while (*width) { 504 while (*width) {
491 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) { 505 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
492 break; 506 break;
493 } 507 }
494 width++; 508 width++;
495 } 509 }
496 xres_new = *width; 510 xres_new = *width;
497 } else { 511 } else {
498 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp); 512 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
499 } 513 }
500 return xres_new; 514 return xres_new;
501} 515}
@@ -522,7 +536,10 @@ static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
522 return 16; /* return something reasonable... or panic()? */ 536 return 16; /* return something reasonable... or panic()? */
523} 537}
524 538
525static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) { 539static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
540 struct fb_var_screeninfo *var, int *visual,
541 int *video_cmap_len, unsigned int* ydstorg)
542{
526 struct RGBT { 543 struct RGBT {
527 unsigned char bpp; 544 unsigned char bpp;
528 struct { 545 struct {
@@ -564,7 +581,7 @@ static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visua
564 if (var->xres_virtual < var->xres) 581 if (var->xres_virtual < var->xres)
565 var->xres_virtual = var->xres; 582 var->xres_virtual = var->xres;
566 583
567 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp); 584 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
568 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 585 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
569 if (memlen > vramlen) { 586 if (memlen > vramlen) {
570 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp); 587 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
@@ -700,7 +717,7 @@ static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
700 return 0; 717 return 0;
701} 718}
702 719
703static void matroxfb_init_fix(WPMINFO2) 720static void matroxfb_init_fix(struct matrox_fb_info *minfo)
704{ 721{
705 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix; 722 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
706 DBG(__func__) 723 DBG(__func__)
@@ -715,7 +732,7 @@ static void matroxfb_init_fix(WPMINFO2)
715 fix->accel = minfo->devflags.accelerator; 732 fix->accel = minfo->devflags.accelerator;
716} 733}
717 734
718static void matroxfb_update_fix(WPMINFO2) 735static void matroxfb_update_fix(struct matrox_fb_info *minfo)
719{ 736{
720 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix; 737 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
721 DBG(__func__) 738 DBG(__func__)
@@ -737,7 +754,7 @@ static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *inf
737 if (minfo->dead) { 754 if (minfo->dead) {
738 return -ENXIO; 755 return -ENXIO;
739 } 756 }
740 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0) 757 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
741 return err; 758 return err;
742 return 0; 759 return 0;
743} 760}
@@ -758,10 +775,10 @@ static int matroxfb_set_par(struct fb_info *info)
758 } 775 }
759 776
760 var = &info->var; 777 var = &info->var;
761 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0) 778 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
762 return err; 779 return err;
763 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg; 780 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
764 matroxfb_update_fix(PMINFO2); 781 matroxfb_update_fix(minfo);
765 minfo->fbcon.fix.visual = visual; 782 minfo->fbcon.fix.visual = visual;
766 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS; 783 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
767 minfo->fbcon.fix.type_aux = 0; 784 minfo->fbcon.fix.type_aux = 0;
@@ -777,7 +794,7 @@ static int matroxfb_set_par(struct fb_info *info)
777 minfo->curr.ydstorg.pixels = ydstorg; 794 minfo->curr.ydstorg.pixels = ydstorg;
778 else 795 else
779 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel; 796 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
780 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel); 797 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
781 { struct my_timming mt; 798 { struct my_timming mt;
782 struct matrox_hw_state* hw; 799 struct matrox_hw_state* hw;
783 int out; 800 int out;
@@ -805,7 +822,7 @@ static int matroxfb_set_par(struct fb_info *info)
805 up_read(&minfo->altout.lock); 822 up_read(&minfo->altout.lock);
806 minfo->crtc1.pixclock = mt.pixclock; 823 minfo->crtc1.pixclock = mt.pixclock;
807 minfo->crtc1.mnp = mt.mnp; 824 minfo->crtc1.mnp = mt.mnp;
808 minfo->hw_switch->init(PMINFO &mt); 825 minfo->hw_switch->init(minfo, &mt);
809 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32; 826 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
810 pos += minfo->curr.ydstorg.chunks; 827 pos += minfo->curr.ydstorg.chunks;
811 828
@@ -813,8 +830,8 @@ static int matroxfb_set_par(struct fb_info *info)
813 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8; 830 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
814 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 831 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
815 hw->CRTCEXT[8] = pos >> 21; 832 hw->CRTCEXT[8] = pos >> 21;
816 minfo->hw_switch->restore(PMINFO2); 833 minfo->hw_switch->restore(minfo);
817 update_crtc2(PMINFO pos); 834 update_crtc2(minfo, pos);
818 down_read(&minfo->altout.lock); 835 down_read(&minfo->altout.lock);
819 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 836 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
820 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 837 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
@@ -829,18 +846,19 @@ static int matroxfb_set_par(struct fb_info *info)
829 } 846 }
830 } 847 }
831 up_read(&minfo->altout.lock); 848 up_read(&minfo->altout.lock);
832 matrox_cfbX_init(PMINFO2); 849 matrox_cfbX_init(minfo);
833 } 850 }
834 } 851 }
835 minfo->initialized = 1; 852 minfo->initialized = 1;
836 return 0; 853 return 0;
837} 854}
838 855
839static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank) 856static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
857 struct fb_vblank *vblank)
840{ 858{
841 unsigned int sts1; 859 unsigned int sts1;
842 860
843 matroxfb_enable_irq(PMINFO 0); 861 matroxfb_enable_irq(minfo, 0);
844 memset(vblank, 0, sizeof(*vblank)); 862 memset(vblank, 0, sizeof(*vblank));
845 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC | 863 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
846 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK; 864 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
@@ -886,7 +904,7 @@ static int matroxfb_ioctl(struct fb_info *info,
886 struct fb_vblank vblank; 904 struct fb_vblank vblank;
887 int err; 905 int err;
888 906
889 err = matroxfb_get_vblank(PMINFO &vblank); 907 err = matroxfb_get_vblank(minfo, &vblank);
890 if (err) 908 if (err)
891 return err; 909 return err;
892 if (copy_to_user(argp, &vblank, sizeof(vblank))) 910 if (copy_to_user(argp, &vblank, sizeof(vblank)))
@@ -900,7 +918,7 @@ static int matroxfb_ioctl(struct fb_info *info,
900 if (get_user(crt, (u_int32_t __user *)arg)) 918 if (get_user(crt, (u_int32_t __user *)arg))
901 return -EFAULT; 919 return -EFAULT;
902 920
903 return matroxfb_wait_for_sync(PMINFO crt); 921 return matroxfb_wait_for_sync(minfo, crt);
904 } 922 }
905 case MATROXFB_SET_OUTPUT_MODE: 923 case MATROXFB_SET_OUTPUT_MODE:
906 { 924 {
@@ -1277,7 +1295,9 @@ static char outputs[8]; /* "matrox:outputs:xxx" */
1277static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */ 1295static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1278#endif 1296#endif
1279 1297
1280static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){ 1298static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1299 unsigned int maxSize, unsigned int *realSize)
1300{
1281 vaddr_t vm; 1301 vaddr_t vm;
1282 unsigned int offs; 1302 unsigned int offs;
1283 unsigned int offs2; 1303 unsigned int offs2;
@@ -1554,7 +1574,8 @@ static struct fb_videomode defaultmode = {
1554 1574
1555static int hotplug = 0; 1575static int hotplug = 0;
1556 1576
1557static void setDefaultOutputs(WPMINFO2) { 1577static void setDefaultOutputs(struct matrox_fb_info *minfo)
1578{
1558 unsigned int i; 1579 unsigned int i;
1559 const char* ptr; 1580 const char* ptr;
1560 1581
@@ -1587,7 +1608,8 @@ static void setDefaultOutputs(WPMINFO2) {
1587 outputs[0] = 0; 1608 outputs[0] = 0;
1588} 1609}
1589 1610
1590static int initMatrox2(WPMINFO struct board* b){ 1611static int initMatrox2(struct matrox_fb_info *minfo, struct board *b)
1612{
1591 unsigned long ctrlptr_phys = 0; 1613 unsigned long ctrlptr_phys = 0;
1592 unsigned long video_base_phys = 0; 1614 unsigned long video_base_phys = 0;
1593 unsigned int memsize; 1615 unsigned int memsize;
@@ -1636,7 +1658,7 @@ static int initMatrox2(WPMINFO struct board* b){
1636 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0; 1658 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1637 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode; 1659 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1638 minfo->devflags.textvram = 65536 / minfo->devflags.textmode; 1660 minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1639 setDefaultOutputs(PMINFO2); 1661 setDefaultOutputs(minfo);
1640 if (b->flags & DEVF_PANELLINK_CAPABLE) { 1662 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1641 minfo->outputs[2].data = minfo; 1663 minfo->outputs[2].data = minfo;
1642 minfo->outputs[2].output = &panellink_output; 1664 minfo->outputs[2].output = &panellink_output;
@@ -1719,13 +1741,13 @@ static int initMatrox2(WPMINFO struct board* b){
1719 } 1741 }
1720 1742
1721 err = -ENXIO; 1743 err = -ENXIO;
1722 matroxfb_read_pins(PMINFO2); 1744 matroxfb_read_pins(minfo);
1723 if (minfo->hw_switch->preinit(PMINFO2)) { 1745 if (minfo->hw_switch->preinit(minfo)) {
1724 goto failVideoIO; 1746 goto failVideoIO;
1725 } 1747 }
1726 1748
1727 err = -ENOMEM; 1749 err = -ENOMEM;
1728 if (!matroxfb_getmemory(PMINFO memsize, &minfo->video.len) || !minfo->video.len) { 1750 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1729 printk(KERN_ERR "matroxfb: cannot determine memory size\n"); 1751 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1730 goto failVideoIO; 1752 goto failVideoIO;
1731 } 1753 }
@@ -1745,8 +1767,8 @@ static int initMatrox2(WPMINFO struct board* b){
1745 1767
1746 if (!minfo->devflags.novga) 1768 if (!minfo->devflags.novga)
1747 request_region(0x3C0, 32, "matrox"); 1769 request_region(0x3C0, 32, "matrox");
1748 matroxfb_g450_connect(PMINFO2); 1770 matroxfb_g450_connect(minfo);
1749 minfo->hw_switch->reset(PMINFO2); 1771 minfo->hw_switch->reset(minfo);
1750 1772
1751 minfo->fbcon.monspecs.hfmin = 0; 1773 minfo->fbcon.monspecs.hfmin = 0;
1752 minfo->fbcon.monspecs.hfmax = fh; 1774 minfo->fbcon.monspecs.hfmax = fh;
@@ -1870,7 +1892,7 @@ static int initMatrox2(WPMINFO struct board* b){
1870 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough 1892 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1871 to yres_virtual * xres_virtual < 2^32 */ 1893 to yres_virtual * xres_virtual < 2^32 */
1872 } 1894 }
1873 matroxfb_init_fix(PMINFO2); 1895 matroxfb_init_fix(minfo);
1874 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase); 1896 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1875 /* Normalize values (namely yres_virtual) */ 1897 /* Normalize values (namely yres_virtual) */
1876 matroxfb_check_var(&vesafb_defined, &minfo->fbcon); 1898 matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
@@ -1910,7 +1932,7 @@ static int initMatrox2(WPMINFO struct board* b){
1910 1932
1911 return 0; 1933 return 0;
1912failVideoIO:; 1934failVideoIO:;
1913 matroxfb_g450_shutdown(PMINFO2); 1935 matroxfb_g450_shutdown(minfo);
1914 mga_iounmap(minfo->video.vbase); 1936 mga_iounmap(minfo->video.vbase);
1915failCtrlIO:; 1937failCtrlIO:;
1916 mga_iounmap(minfo->mmio.vbase); 1938 mga_iounmap(minfo->mmio.vbase);
@@ -2075,7 +2097,7 @@ static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dumm
2075 init_waitqueue_head(&minfo->crtc2.vsync.wait); 2097 init_waitqueue_head(&minfo->crtc2.vsync.wait);
2076 minfo->crtc1.panpos = -1; 2098 minfo->crtc1.panpos = -1;
2077 2099
2078 err = initMatrox2(PMINFO b); 2100 err = initMatrox2(minfo, b);
2079 if (!err) { 2101 if (!err) {
2080 matroxfb_register_device(minfo); 2102 matroxfb_register_device(minfo);
2081 return 0; 2103 return 0;
@@ -2088,7 +2110,7 @@ static void pci_remove_matrox(struct pci_dev* pdev) {
2088 struct matrox_fb_info* minfo; 2110 struct matrox_fb_info* minfo;
2089 2111
2090 minfo = pci_get_drvdata(pdev); 2112 minfo = pci_get_drvdata(pdev);
2091 matroxfb_remove(PMINFO 1); 2113 matroxfb_remove(minfo, 1);
2092} 2114}
2093 2115
2094static struct pci_device_id matroxfb_devices[] = { 2116static struct pci_device_id matroxfb_devices[] = {
diff --git a/drivers/video/matrox/matroxfb_base.h b/drivers/video/matrox/matroxfb_base.h
index bbd7c04b0b1f..cd90cd2058d5 100644
--- a/drivers/video/matrox/matroxfb_base.h
+++ b/drivers/video/matrox/matroxfb_base.h
@@ -524,22 +524,15 @@ struct matrox_fb_info {
524 524
525#define info2minfo(info) container_of(info, struct matrox_fb_info, fbcon) 525#define info2minfo(info) container_of(info, struct matrox_fb_info, fbcon)
526 526
527#define WPMINFO2 struct matrox_fb_info* minfo
528#define WPMINFO WPMINFO2 ,
529#define CPMINFO2 const struct matrox_fb_info* minfo
530#define CPMINFO CPMINFO2 ,
531#define PMINFO2 minfo
532#define PMINFO PMINFO2 ,
533
534#define MINFO_FROM(x) struct matrox_fb_info* minfo = x 527#define MINFO_FROM(x) struct matrox_fb_info* minfo = x
535 528
536#define MINFO_FROM_INFO(x) MINFO_FROM(info2minfo(x)) 529#define MINFO_FROM_INFO(x) MINFO_FROM(info2minfo(x))
537 530
538struct matrox_switch { 531struct matrox_switch {
539 int (*preinit)(WPMINFO2); 532 int (*preinit)(struct matrox_fb_info *minfo);
540 void (*reset)(WPMINFO2); 533 void (*reset)(struct matrox_fb_info *minfo);
541 int (*init)(WPMINFO struct my_timming*); 534 int (*init)(struct matrox_fb_info *minfo, struct my_timming*);
542 void (*restore)(WPMINFO2); 535 void (*restore)(struct matrox_fb_info *minfo);
543}; 536};
544 537
545struct matroxfb_driver { 538struct matroxfb_driver {
@@ -729,11 +722,12 @@ void matroxfb_unregister_driver(struct matroxfb_driver* drv);
729#define matroxfb_DAC_unlock() spin_unlock(&minfo->lock.DAC) 722#define matroxfb_DAC_unlock() spin_unlock(&minfo->lock.DAC)
730#define matroxfb_DAC_lock_irqsave(flags) spin_lock_irqsave(&minfo->lock.DAC, flags) 723#define matroxfb_DAC_lock_irqsave(flags) spin_lock_irqsave(&minfo->lock.DAC, flags)
731#define matroxfb_DAC_unlock_irqrestore(flags) spin_unlock_irqrestore(&minfo->lock.DAC, flags) 724#define matroxfb_DAC_unlock_irqrestore(flags) spin_unlock_irqrestore(&minfo->lock.DAC, flags)
732extern void matroxfb_DAC_out(CPMINFO int reg, int val); 725extern void matroxfb_DAC_out(const struct matrox_fb_info *minfo, int reg,
733extern int matroxfb_DAC_in(CPMINFO int reg); 726 int val);
727extern int matroxfb_DAC_in(const struct matrox_fb_info *minfo, int reg);
734extern void matroxfb_var2my(struct fb_var_screeninfo* fvsi, struct my_timming* mt); 728extern void matroxfb_var2my(struct fb_var_screeninfo* fvsi, struct my_timming* mt);
735extern int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc); 729extern int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc);
736extern int matroxfb_enable_irq(WPMINFO int reenable); 730extern int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable);
737 731
738#ifdef MATROXFB_USE_SPINLOCKS 732#ifdef MATROXFB_USE_SPINLOCKS
739#define CRITBEGIN spin_lock_irqsave(&minfo->lock.accel, critflags); 733#define CRITBEGIN spin_lock_irqsave(&minfo->lock.accel, critflags);
diff --git a/drivers/video/matrox/matroxfb_crtc2.c b/drivers/video/matrox/matroxfb_crtc2.c
index 8249959cde2e..f41d4b4f8e75 100644
--- a/drivers/video/matrox/matroxfb_crtc2.c
+++ b/drivers/video/matrox/matroxfb_crtc2.c
@@ -369,8 +369,8 @@ static int matroxfb_dh_set_par(struct fb_info* info) {
369 } else { 369 } else {
370 matroxfb_dh_disable(m2info); 370 matroxfb_dh_disable(m2info);
371 } 371 }
372 DAC1064_global_init(PMINFO2); 372 DAC1064_global_init(minfo);
373 DAC1064_global_restore(PMINFO2); 373 DAC1064_global_restore(minfo);
374 down_read(&minfo->altout.lock); 374 down_read(&minfo->altout.lock);
375 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 375 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
376 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC2 && 376 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC2 &&
@@ -401,7 +401,7 @@ static int matroxfb_dh_pan_display(struct fb_var_screeninfo* var, struct fb_info
401static int matroxfb_dh_get_vblank(const struct matroxfb_dh_fb_info* m2info, struct fb_vblank* vblank) { 401static int matroxfb_dh_get_vblank(const struct matroxfb_dh_fb_info* m2info, struct fb_vblank* vblank) {
402 MINFO_FROM(m2info->primary_dev); 402 MINFO_FROM(m2info->primary_dev);
403 403
404 matroxfb_enable_irq(PMINFO 0); 404 matroxfb_enable_irq(minfo, 0);
405 memset(vblank, 0, sizeof(*vblank)); 405 memset(vblank, 0, sizeof(*vblank));
406 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VBLANK; 406 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VBLANK;
407 /* mask out reserved bits + field number (odd/even) */ 407 /* mask out reserved bits + field number (odd/even) */
@@ -449,7 +449,7 @@ static int matroxfb_dh_ioctl(struct fb_info *info,
449 449
450 if (crt != 0) 450 if (crt != 0)
451 return -ENODEV; 451 return -ENODEV;
452 return matroxfb_wait_for_sync(PMINFO 1); 452 return matroxfb_wait_for_sync(minfo, 1);
453 } 453 }
454 case MATROXFB_SET_OUTPUT_MODE: 454 case MATROXFB_SET_OUTPUT_MODE:
455 case MATROXFB_GET_OUTPUT_MODE: 455 case MATROXFB_GET_OUTPUT_MODE:
@@ -595,7 +595,9 @@ static struct fb_var_screeninfo matroxfb_dh_defined = {
595 0, {0,0,0,0,0} 595 0, {0,0,0,0,0}
596}; 596};
597 597
598static int matroxfb_dh_regit(CPMINFO struct matroxfb_dh_fb_info* m2info) { 598static int matroxfb_dh_regit(const struct matrox_fb_info *minfo,
599 struct matroxfb_dh_fb_info *m2info)
600{
599#define minfo (m2info->primary_dev) 601#define minfo (m2info->primary_dev)
600 void* oldcrtc2; 602 void* oldcrtc2;
601 603
@@ -649,7 +651,7 @@ static int matroxfb_dh_regit(CPMINFO struct matroxfb_dh_fb_info* m2info) {
649 651
650static int matroxfb_dh_registerfb(struct matroxfb_dh_fb_info* m2info) { 652static int matroxfb_dh_registerfb(struct matroxfb_dh_fb_info* m2info) {
651#define minfo (m2info->primary_dev) 653#define minfo (m2info->primary_dev)
652 if (matroxfb_dh_regit(PMINFO m2info)) { 654 if (matroxfb_dh_regit(minfo, m2info)) {
653 printk(KERN_ERR "matroxfb_crtc2: secondary head failed to register\n"); 655 printk(KERN_ERR "matroxfb_crtc2: secondary head failed to register\n");
654 return -1; 656 return -1;
655 } 657 }
diff --git a/drivers/video/matrox/matroxfb_g450.c b/drivers/video/matrox/matroxfb_g450.c
index 841b439ecca3..f7f1343cd345 100644
--- a/drivers/video/matrox/matroxfb_g450.c
+++ b/drivers/video/matrox/matroxfb_g450.c
@@ -80,50 +80,57 @@ static int get_ctrl_id(__u32 v4l2_id) {
80 return -EINVAL; 80 return -EINVAL;
81} 81}
82 82
83static inline int* get_ctrl_ptr(WPMINFO unsigned int idx) { 83static inline int *get_ctrl_ptr(struct matrox_fb_info *minfo, unsigned int idx)
84{
84 return (int*)((char*)minfo + g450_controls[idx].control); 85 return (int*)((char*)minfo + g450_controls[idx].control);
85} 86}
86 87
87static void tvo_fill_defaults(WPMINFO2) { 88static void tvo_fill_defaults(struct matrox_fb_info *minfo)
89{
88 unsigned int i; 90 unsigned int i;
89 91
90 for (i = 0; i < G450CTRLS; i++) { 92 for (i = 0; i < G450CTRLS; i++) {
91 *get_ctrl_ptr(PMINFO i) = g450_controls[i].desc.default_value; 93 *get_ctrl_ptr(minfo, i) = g450_controls[i].desc.default_value;
92 } 94 }
93} 95}
94 96
95static int cve2_get_reg(WPMINFO int reg) { 97static int cve2_get_reg(struct matrox_fb_info *minfo, int reg)
98{
96 unsigned long flags; 99 unsigned long flags;
97 int val; 100 int val;
98 101
99 matroxfb_DAC_lock_irqsave(flags); 102 matroxfb_DAC_lock_irqsave(flags);
100 matroxfb_DAC_out(PMINFO 0x87, reg); 103 matroxfb_DAC_out(minfo, 0x87, reg);
101 val = matroxfb_DAC_in(PMINFO 0x88); 104 val = matroxfb_DAC_in(minfo, 0x88);
102 matroxfb_DAC_unlock_irqrestore(flags); 105 matroxfb_DAC_unlock_irqrestore(flags);
103 return val; 106 return val;
104} 107}
105 108
106static void cve2_set_reg(WPMINFO int reg, int val) { 109static void cve2_set_reg(struct matrox_fb_info *minfo, int reg, int val)
110{
107 unsigned long flags; 111 unsigned long flags;
108 112
109 matroxfb_DAC_lock_irqsave(flags); 113 matroxfb_DAC_lock_irqsave(flags);
110 matroxfb_DAC_out(PMINFO 0x87, reg); 114 matroxfb_DAC_out(minfo, 0x87, reg);
111 matroxfb_DAC_out(PMINFO 0x88, val); 115 matroxfb_DAC_out(minfo, 0x88, val);
112 matroxfb_DAC_unlock_irqrestore(flags); 116 matroxfb_DAC_unlock_irqrestore(flags);
113} 117}
114 118
115static void cve2_set_reg10(WPMINFO int reg, int val) { 119static void cve2_set_reg10(struct matrox_fb_info *minfo, int reg, int val)
120{
116 unsigned long flags; 121 unsigned long flags;
117 122
118 matroxfb_DAC_lock_irqsave(flags); 123 matroxfb_DAC_lock_irqsave(flags);
119 matroxfb_DAC_out(PMINFO 0x87, reg); 124 matroxfb_DAC_out(minfo, 0x87, reg);
120 matroxfb_DAC_out(PMINFO 0x88, val >> 2); 125 matroxfb_DAC_out(minfo, 0x88, val >> 2);
121 matroxfb_DAC_out(PMINFO 0x87, reg + 1); 126 matroxfb_DAC_out(minfo, 0x87, reg + 1);
122 matroxfb_DAC_out(PMINFO 0x88, val & 3); 127 matroxfb_DAC_out(minfo, 0x88, val & 3);
123 matroxfb_DAC_unlock_irqrestore(flags); 128 matroxfb_DAC_unlock_irqrestore(flags);
124} 129}
125 130
126static void g450_compute_bwlevel(CPMINFO int *bl, int *wl) { 131static void g450_compute_bwlevel(const struct matrox_fb_info *minfo, int *bl,
132 int *wl)
133{
127 const int b = minfo->altout.tvo_params.brightness + BLMIN; 134 const int b = minfo->altout.tvo_params.brightness + BLMIN;
128 const int c = minfo->altout.tvo_params.contrast; 135 const int c = minfo->altout.tvo_params.contrast;
129 136
@@ -162,7 +169,7 @@ static int g450_set_ctrl(void* md, struct v4l2_control *p) {
162 /* 169 /*
163 * Check if changed. 170 * Check if changed.
164 */ 171 */
165 if (p->value == *get_ctrl_ptr(PMINFO i)) return 0; 172 if (p->value == *get_ctrl_ptr(minfo, i)) return 0;
166 173
167 /* 174 /*
168 * Check limits. 175 * Check limits.
@@ -173,31 +180,31 @@ static int g450_set_ctrl(void* md, struct v4l2_control *p) {
173 /* 180 /*
174 * Store new value. 181 * Store new value.
175 */ 182 */
176 *get_ctrl_ptr(PMINFO i) = p->value; 183 *get_ctrl_ptr(minfo, i) = p->value;
177 184
178 switch (p->id) { 185 switch (p->id) {
179 case V4L2_CID_BRIGHTNESS: 186 case V4L2_CID_BRIGHTNESS:
180 case V4L2_CID_CONTRAST: 187 case V4L2_CID_CONTRAST:
181 { 188 {
182 int blacklevel, whitelevel; 189 int blacklevel, whitelevel;
183 g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel); 190 g450_compute_bwlevel(minfo, &blacklevel, &whitelevel);
184 cve2_set_reg10(PMINFO 0x0e, blacklevel); 191 cve2_set_reg10(minfo, 0x0e, blacklevel);
185 cve2_set_reg10(PMINFO 0x1e, whitelevel); 192 cve2_set_reg10(minfo, 0x1e, whitelevel);
186 } 193 }
187 break; 194 break;
188 case V4L2_CID_SATURATION: 195 case V4L2_CID_SATURATION:
189 cve2_set_reg(PMINFO 0x20, p->value); 196 cve2_set_reg(minfo, 0x20, p->value);
190 cve2_set_reg(PMINFO 0x22, p->value); 197 cve2_set_reg(minfo, 0x22, p->value);
191 break; 198 break;
192 case V4L2_CID_HUE: 199 case V4L2_CID_HUE:
193 cve2_set_reg(PMINFO 0x25, p->value); 200 cve2_set_reg(minfo, 0x25, p->value);
194 break; 201 break;
195 case MATROXFB_CID_TESTOUT: 202 case MATROXFB_CID_TESTOUT:
196 { 203 {
197 unsigned char val = cve2_get_reg (PMINFO 0x05); 204 unsigned char val = cve2_get_reg(minfo, 0x05);
198 if (p->value) val |= 0x02; 205 if (p->value) val |= 0x02;
199 else val &= ~0x02; 206 else val &= ~0x02;
200 cve2_set_reg(PMINFO 0x05, val); 207 cve2_set_reg(minfo, 0x05, val);
201 } 208 }
202 break; 209 break;
203 } 210 }
@@ -212,7 +219,7 @@ static int g450_get_ctrl(void* md, struct v4l2_control *p) {
212 219
213 i = get_ctrl_id(p->id); 220 i = get_ctrl_id(p->id);
214 if (i < 0) return -EINVAL; 221 if (i < 0) return -EINVAL;
215 p->value = *get_ctrl_ptr(PMINFO i); 222 p->value = *get_ctrl_ptr(minfo, i);
216 return 0; 223 return 0;
217} 224}
218 225
@@ -226,7 +233,9 @@ struct output_desc {
226 unsigned int v_total; 233 unsigned int v_total;
227}; 234};
228 235
229static void computeRegs(WPMINFO struct mavenregs* r, struct my_timming* mt, const struct output_desc* outd) { 236static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r,
237 struct my_timming *mt, const struct output_desc *outd)
238{
230 u_int32_t chromasc; 239 u_int32_t chromasc;
231 u_int32_t hlen; 240 u_int32_t hlen;
232 u_int32_t hsl; 241 u_int32_t hsl;
@@ -251,10 +260,10 @@ static void computeRegs(WPMINFO struct mavenregs* r, struct my_timming* mt, cons
251 260
252 dprintk(KERN_DEBUG "Want %u kHz pixclock\n", (unsigned int)piic); 261 dprintk(KERN_DEBUG "Want %u kHz pixclock\n", (unsigned int)piic);
253 262
254 mnp = matroxfb_g450_setclk(PMINFO piic, M_VIDEO_PLL); 263 mnp = matroxfb_g450_setclk(minfo, piic, M_VIDEO_PLL);
255 264
256 mt->mnp = mnp; 265 mt->mnp = mnp;
257 mt->pixclock = g450_mnp2f(PMINFO mnp); 266 mt->pixclock = g450_mnp2f(minfo, mnp);
258 267
259 dprintk(KERN_DEBUG "MNP=%08X\n", mnp); 268 dprintk(KERN_DEBUG "MNP=%08X\n", mnp);
260 269
@@ -490,20 +499,22 @@ static void cve2_init_TVdata(int norm, struct mavenregs* data, const struct outp
490 return; 499 return;
491} 500}
492 501
493#define LR(x) cve2_set_reg(PMINFO (x), m->regs[(x)]) 502#define LR(x) cve2_set_reg(minfo, (x), m->regs[(x)])
494static void cve2_init_TV(WPMINFO const struct mavenregs* m) { 503static void cve2_init_TV(struct matrox_fb_info *minfo,
504 const struct mavenregs *m)
505{
495 int i; 506 int i;
496 507
497 LR(0x80); 508 LR(0x80);
498 LR(0x82); LR(0x83); 509 LR(0x82); LR(0x83);
499 LR(0x84); LR(0x85); 510 LR(0x84); LR(0x85);
500 511
501 cve2_set_reg(PMINFO 0x3E, 0x01); 512 cve2_set_reg(minfo, 0x3E, 0x01);
502 513
503 for (i = 0; i < 0x3E; i++) { 514 for (i = 0; i < 0x3E; i++) {
504 LR(i); 515 LR(i);
505 } 516 }
506 cve2_set_reg(PMINFO 0x3E, 0x00); 517 cve2_set_reg(minfo, 0x3E, 0x00);
507} 518}
508 519
509static int matroxfb_g450_compute(void* md, struct my_timming* mt) { 520static int matroxfb_g450_compute(void* md, struct my_timming* mt) {
@@ -518,7 +529,7 @@ static int matroxfb_g450_compute(void* md, struct my_timming* mt) {
518 cve2_init_TVdata(minfo->outputs[1].mode, &minfo->hw.maven, &outd); 529 cve2_init_TVdata(minfo->outputs[1].mode, &minfo->hw.maven, &outd);
519 { 530 {
520 int blacklevel, whitelevel; 531 int blacklevel, whitelevel;
521 g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel); 532 g450_compute_bwlevel(minfo, &blacklevel, &whitelevel);
522 minfo->hw.maven.regs[0x0E] = blacklevel >> 2; 533 minfo->hw.maven.regs[0x0E] = blacklevel >> 2;
523 minfo->hw.maven.regs[0x0F] = blacklevel & 3; 534 minfo->hw.maven.regs[0x0F] = blacklevel & 3;
524 minfo->hw.maven.regs[0x1E] = whitelevel >> 2; 535 minfo->hw.maven.regs[0x1E] = whitelevel >> 2;
@@ -533,12 +544,12 @@ static int matroxfb_g450_compute(void* md, struct my_timming* mt) {
533 minfo->hw.maven.regs[0x05] |= 0x02; 544 minfo->hw.maven.regs[0x05] |= 0x02;
534 } 545 }
535 } 546 }
536 computeRegs(PMINFO &minfo->hw.maven, mt, outd); 547 computeRegs(minfo, &minfo->hw.maven, mt, outd);
537 } else if (mt->mnp < 0) { 548 } else if (mt->mnp < 0) {
538 /* We must program clocks before CRTC2, otherwise interlaced mode 549 /* We must program clocks before CRTC2, otherwise interlaced mode
539 startup may fail */ 550 startup may fail */
540 mt->mnp = matroxfb_g450_setclk(PMINFO mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); 551 mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
541 mt->pixclock = g450_mnp2f(PMINFO mt->mnp); 552 mt->pixclock = g450_mnp2f(minfo, mt->mnp);
542 } 553 }
543 dprintk(KERN_DEBUG "Pixclock = %u\n", mt->pixclock); 554 dprintk(KERN_DEBUG "Pixclock = %u\n", mt->pixclock);
544 return 0; 555 return 0;
@@ -548,7 +559,7 @@ static int matroxfb_g450_program(void* md) {
548 MINFO_FROM(md); 559 MINFO_FROM(md);
549 560
550 if (minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) { 561 if (minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) {
551 cve2_init_TV(PMINFO &minfo->hw.maven); 562 cve2_init_TV(minfo, &minfo->hw.maven);
552 } 563 }
553 return 0; 564 return 0;
554} 565}
@@ -567,8 +578,8 @@ static int g450_dvi_compute(void* md, struct my_timming* mt) {
567 MINFO_FROM(md); 578 MINFO_FROM(md);
568 579
569 if (mt->mnp < 0) { 580 if (mt->mnp < 0) {
570 mt->mnp = matroxfb_g450_setclk(PMINFO mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); 581 mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
571 mt->pixclock = g450_mnp2f(PMINFO mt->mnp); 582 mt->pixclock = g450_mnp2f(minfo, mt->mnp);
572 } 583 }
573 return 0; 584 return 0;
574} 585}
@@ -588,10 +599,11 @@ static struct matrox_altout matroxfb_g450_dvi = {
588 .compute = g450_dvi_compute, 599 .compute = g450_dvi_compute,
589}; 600};
590 601
591void matroxfb_g450_connect(WPMINFO2) { 602void matroxfb_g450_connect(struct matrox_fb_info *minfo)
603{
592 if (minfo->devflags.g450dac) { 604 if (minfo->devflags.g450dac) {
593 down_write(&minfo->altout.lock); 605 down_write(&minfo->altout.lock);
594 tvo_fill_defaults(PMINFO2); 606 tvo_fill_defaults(minfo);
595 minfo->outputs[1].src = minfo->outputs[1].default_src; 607 minfo->outputs[1].src = minfo->outputs[1].default_src;
596 minfo->outputs[1].data = minfo; 608 minfo->outputs[1].data = minfo;
597 minfo->outputs[1].output = &matroxfb_g450_altout; 609 minfo->outputs[1].output = &matroxfb_g450_altout;
@@ -604,7 +616,8 @@ void matroxfb_g450_connect(WPMINFO2) {
604 } 616 }
605} 617}
606 618
607void matroxfb_g450_shutdown(WPMINFO2) { 619void matroxfb_g450_shutdown(struct matrox_fb_info *minfo)
620{
608 if (minfo->devflags.g450dac) { 621 if (minfo->devflags.g450dac) {
609 down_write(&minfo->altout.lock); 622 down_write(&minfo->altout.lock);
610 minfo->outputs[1].src = MATROXFB_SRC_NONE; 623 minfo->outputs[1].src = MATROXFB_SRC_NONE;
diff --git a/drivers/video/matrox/matroxfb_g450.h b/drivers/video/matrox/matroxfb_g450.h
index a0822a6033e5..3a3e654444b8 100644
--- a/drivers/video/matrox/matroxfb_g450.h
+++ b/drivers/video/matrox/matroxfb_g450.h
@@ -4,11 +4,11 @@
4#include "matroxfb_base.h" 4#include "matroxfb_base.h"
5 5
6#ifdef CONFIG_FB_MATROX_G 6#ifdef CONFIG_FB_MATROX_G
7void matroxfb_g450_connect(WPMINFO2); 7void matroxfb_g450_connect(struct matrox_fb_info *minfo);
8void matroxfb_g450_shutdown(WPMINFO2); 8void matroxfb_g450_shutdown(struct matrox_fb_info *minfo);
9#else 9#else
10static inline void matroxfb_g450_connect(WPMINFO2) { }; 10static inline void matroxfb_g450_connect(struct matrox_fb_info *minfo) { };
11static inline void matroxfb_g450_shutdown(WPMINFO2) { }; 11static inline void matroxfb_g450_shutdown(struct matrox_fb_info *minfo) { };
12#endif 12#endif
13 13
14#endif /* __MATROXFB_G450_H__ */ 14#endif /* __MATROXFB_G450_H__ */
diff --git a/drivers/video/matrox/matroxfb_misc.c b/drivers/video/matrox/matroxfb_misc.c
index fe07af8486e4..9948ca2a3046 100644
--- a/drivers/video/matrox/matroxfb_misc.c
+++ b/drivers/video/matrox/matroxfb_misc.c
@@ -89,13 +89,15 @@
89#include <linux/interrupt.h> 89#include <linux/interrupt.h>
90#include <linux/matroxfb.h> 90#include <linux/matroxfb.h>
91 91
92void matroxfb_DAC_out(CPMINFO int reg, int val) { 92void matroxfb_DAC_out(const struct matrox_fb_info *minfo, int reg, int val)
93{
93 DBG_REG(__func__) 94 DBG_REG(__func__)
94 mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg); 95 mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
95 mga_outb(M_RAMDAC_BASE+M_X_DATAREG, val); 96 mga_outb(M_RAMDAC_BASE+M_X_DATAREG, val);
96} 97}
97 98
98int matroxfb_DAC_in(CPMINFO int reg) { 99int matroxfb_DAC_in(const struct matrox_fb_info *minfo, int reg)
100{
99 DBG_REG(__func__) 101 DBG_REG(__func__)
100 mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg); 102 mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
101 return mga_inb(M_RAMDAC_BASE+M_X_DATAREG); 103 return mga_inb(M_RAMDAC_BASE+M_X_DATAREG);
@@ -184,7 +186,8 @@ int matroxfb_PLL_calcclock(const struct matrox_pll_features* pll, unsigned int f
184 return bestvco; 186 return bestvco;
185} 187}
186 188
187int matroxfb_vgaHWinit(WPMINFO struct my_timming* m) { 189int matroxfb_vgaHWinit(struct matrox_fb_info *minfo, struct my_timming *m)
190{
188 unsigned int hd, hs, he, hbe, ht; 191 unsigned int hd, hs, he, hbe, ht;
189 unsigned int vd, vs, ve, vt, lc; 192 unsigned int vd, vs, ve, vt, lc;
190 unsigned int wd; 193 unsigned int wd;
@@ -331,7 +334,8 @@ int matroxfb_vgaHWinit(WPMINFO struct my_timming* m) {
331 return 0; 334 return 0;
332}; 335};
333 336
334void matroxfb_vgaHWrestore(WPMINFO2) { 337void matroxfb_vgaHWrestore(struct matrox_fb_info *minfo)
338{
335 int i; 339 int i;
336 struct matrox_hw_state * const hw = &minfo->hw; 340 struct matrox_hw_state * const hw = &minfo->hw;
337 CRITFLAGS 341 CRITFLAGS
@@ -522,7 +526,9 @@ static void parse_bios(unsigned char __iomem* vbios, struct matrox_bios* bd) {
522#endif 526#endif
523} 527}
524 528
525static int parse_pins1(WPMINFO const struct matrox_bios* bd) { 529static int parse_pins1(struct matrox_fb_info *minfo,
530 const struct matrox_bios *bd)
531{
526 unsigned int maxdac; 532 unsigned int maxdac;
527 533
528 switch (bd->pins[22]) { 534 switch (bd->pins[22]) {
@@ -542,7 +548,8 @@ static int parse_pins1(WPMINFO const struct matrox_bios* bd) {
542 return 0; 548 return 0;
543} 549}
544 550
545static void default_pins1(WPMINFO2) { 551static void default_pins1(struct matrox_fb_info *minfo)
552{
546 /* Millennium */ 553 /* Millennium */
547 minfo->limits.pixel.vcomax = 220000; 554 minfo->limits.pixel.vcomax = 220000;
548 minfo->values.pll.system = 50000; 555 minfo->values.pll.system = 50000;
@@ -550,7 +557,9 @@ static void default_pins1(WPMINFO2) {
550 minfo->values.reg.mctlwtst = 0x00030101; 557 minfo->values.reg.mctlwtst = 0x00030101;
551} 558}
552 559
553static int parse_pins2(WPMINFO const struct matrox_bios* bd) { 560static int parse_pins2(struct matrox_fb_info *minfo,
561 const struct matrox_bios *bd)
562{
554 minfo->limits.pixel.vcomax = 563 minfo->limits.pixel.vcomax =
555 minfo->limits.system.vcomax = (bd->pins[41] == 0xFF) ? 230000 : ((bd->pins[41] + 100) * 1000); 564 minfo->limits.system.vcomax = (bd->pins[41] == 0xFF) ? 230000 : ((bd->pins[41] + 100) * 1000);
556 minfo->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) | 565 minfo->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) |
@@ -562,7 +571,8 @@ static int parse_pins2(WPMINFO const struct matrox_bios* bd) {
562 return 0; 571 return 0;
563} 572}
564 573
565static void default_pins2(WPMINFO2) { 574static void default_pins2(struct matrox_fb_info *minfo)
575{
566 /* Millennium II, Mystique */ 576 /* Millennium II, Mystique */
567 minfo->limits.pixel.vcomax = 577 minfo->limits.pixel.vcomax =
568 minfo->limits.system.vcomax = 230000; 578 minfo->limits.system.vcomax = 230000;
@@ -571,7 +581,9 @@ static void default_pins2(WPMINFO2) {
571 minfo->features.pll.ref_freq = 14318; 581 minfo->features.pll.ref_freq = 14318;
572} 582}
573 583
574static int parse_pins3(WPMINFO const struct matrox_bios* bd) { 584static int parse_pins3(struct matrox_fb_info *minfo,
585 const struct matrox_bios *bd)
586{
575 minfo->limits.pixel.vcomax = 587 minfo->limits.pixel.vcomax =
576 minfo->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000); 588 minfo->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000);
577 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ? 589 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ?
@@ -587,7 +599,8 @@ static int parse_pins3(WPMINFO const struct matrox_bios* bd) {
587 return 0; 599 return 0;
588} 600}
589 601
590static void default_pins3(WPMINFO2) { 602static void default_pins3(struct matrox_fb_info *minfo)
603{
591 /* G100, G200 */ 604 /* G100, G200 */
592 minfo->limits.pixel.vcomax = 605 minfo->limits.pixel.vcomax =
593 minfo->limits.system.vcomax = 230000; 606 minfo->limits.system.vcomax = 230000;
@@ -598,7 +611,9 @@ static void default_pins3(WPMINFO2) {
598 minfo->features.pll.ref_freq = 27000; 611 minfo->features.pll.ref_freq = 27000;
599} 612}
600 613
601static int parse_pins4(WPMINFO const struct matrox_bios* bd) { 614static int parse_pins4(struct matrox_fb_info *minfo,
615 const struct matrox_bios *bd)
616{
602 minfo->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000; 617 minfo->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000;
603 minfo->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 38] * 4000; 618 minfo->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 38] * 4000;
604 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 71); 619 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 71);
@@ -615,7 +630,8 @@ static int parse_pins4(WPMINFO const struct matrox_bios* bd) {
615 return 0; 630 return 0;
616} 631}
617 632
618static void default_pins4(WPMINFO2) { 633static void default_pins4(struct matrox_fb_info *minfo)
634{
619 /* G400 */ 635 /* G400 */
620 minfo->limits.pixel.vcomax = 636 minfo->limits.pixel.vcomax =
621 minfo->limits.system.vcomax = 252000; 637 minfo->limits.system.vcomax = 252000;
@@ -627,7 +643,9 @@ static void default_pins4(WPMINFO2) {
627 minfo->features.pll.ref_freq = 27000; 643 minfo->features.pll.ref_freq = 27000;
628} 644}
629 645
630static int parse_pins5(WPMINFO const struct matrox_bios* bd) { 646static int parse_pins5(struct matrox_fb_info *minfo,
647 const struct matrox_bios *bd)
648{
631 unsigned int mult; 649 unsigned int mult;
632 650
633 mult = bd->pins[4]?8000:6000; 651 mult = bd->pins[4]?8000:6000;
@@ -662,7 +680,8 @@ static int parse_pins5(WPMINFO const struct matrox_bios* bd) {
662 return 0; 680 return 0;
663} 681}
664 682
665static void default_pins5(WPMINFO2) { 683static void default_pins5(struct matrox_fb_info *minfo)
684{
666 /* Mine 16MB G450 with SDRAM DDR */ 685 /* Mine 16MB G450 with SDRAM DDR */
667 minfo->limits.pixel.vcomax = 686 minfo->limits.pixel.vcomax =
668 minfo->limits.system.vcomax = 687 minfo->limits.system.vcomax =
@@ -686,20 +705,22 @@ static void default_pins5(WPMINFO2) {
686 minfo->values.reg.maccess = 0x00004000; 705 minfo->values.reg.maccess = 0x00004000;
687} 706}
688 707
689static int matroxfb_set_limits(WPMINFO const struct matrox_bios* bd) { 708static int matroxfb_set_limits(struct matrox_fb_info *minfo,
709 const struct matrox_bios *bd)
710{
690 unsigned int pins_version; 711 unsigned int pins_version;
691 static const unsigned int pinslen[] = { 64, 64, 64, 128, 128 }; 712 static const unsigned int pinslen[] = { 64, 64, 64, 128, 128 };
692 713
693 switch (minfo->chip) { 714 switch (minfo->chip) {
694 case MGA_2064: default_pins1(PMINFO2); break; 715 case MGA_2064: default_pins1(minfo); break;
695 case MGA_2164: 716 case MGA_2164:
696 case MGA_1064: 717 case MGA_1064:
697 case MGA_1164: default_pins2(PMINFO2); break; 718 case MGA_1164: default_pins2(minfo); break;
698 case MGA_G100: 719 case MGA_G100:
699 case MGA_G200: default_pins3(PMINFO2); break; 720 case MGA_G200: default_pins3(minfo); break;
700 case MGA_G400: default_pins4(PMINFO2); break; 721 case MGA_G400: default_pins4(minfo); break;
701 case MGA_G450: 722 case MGA_G450:
702 case MGA_G550: default_pins5(PMINFO2); break; 723 case MGA_G550: default_pins5(minfo); break;
703 } 724 }
704 if (!bd->bios_valid) { 725 if (!bd->bios_valid) {
705 printk(KERN_INFO "matroxfb: Your Matrox device does not have BIOS\n"); 726 printk(KERN_INFO "matroxfb: Your Matrox device does not have BIOS\n");
@@ -724,22 +745,23 @@ static int matroxfb_set_limits(WPMINFO const struct matrox_bios* bd) {
724 } 745 }
725 switch (pins_version) { 746 switch (pins_version) {
726 case 1: 747 case 1:
727 return parse_pins1(PMINFO bd); 748 return parse_pins1(minfo, bd);
728 case 2: 749 case 2:
729 return parse_pins2(PMINFO bd); 750 return parse_pins2(minfo, bd);
730 case 3: 751 case 3:
731 return parse_pins3(PMINFO bd); 752 return parse_pins3(minfo, bd);
732 case 4: 753 case 4:
733 return parse_pins4(PMINFO bd); 754 return parse_pins4(minfo, bd);
734 case 5: 755 case 5:
735 return parse_pins5(PMINFO bd); 756 return parse_pins5(minfo, bd);
736 default: 757 default:
737 printk(KERN_DEBUG "matroxfb: Powerup info version %u is not yet supported\n", pins_version); 758 printk(KERN_DEBUG "matroxfb: Powerup info version %u is not yet supported\n", pins_version);
738 return -1; 759 return -1;
739 } 760 }
740} 761}
741 762
742void matroxfb_read_pins(WPMINFO2) { 763void matroxfb_read_pins(struct matrox_fb_info *minfo)
764{
743 u32 opt; 765 u32 opt;
744 u32 biosbase; 766 u32 biosbase;
745 u32 fbbase; 767 u32 fbbase;
@@ -775,7 +797,7 @@ void matroxfb_read_pins(WPMINFO2) {
775 } 797 }
776 } 798 }
777#endif 799#endif
778 matroxfb_set_limits(PMINFO &minfo->bios); 800 matroxfb_set_limits(minfo, &minfo->bios);
779 printk(KERN_INFO "PInS memtype = %u\n", 801 printk(KERN_INFO "PInS memtype = %u\n",
780 (minfo->values.reg.opt & 0x1C00) >> 10); 802 (minfo->values.reg.opt & 0x1C00) >> 10);
781} 803}
diff --git a/drivers/video/matrox/matroxfb_misc.h b/drivers/video/matrox/matroxfb_misc.h
index b46004576fb2..351c823f1f74 100644
--- a/drivers/video/matrox/matroxfb_misc.h
+++ b/drivers/video/matrox/matroxfb_misc.h
@@ -6,13 +6,16 @@
6/* also for modules */ 6/* also for modules */
7int matroxfb_PLL_calcclock(const struct matrox_pll_features* pll, unsigned int freq, unsigned int fmax, 7int matroxfb_PLL_calcclock(const struct matrox_pll_features* pll, unsigned int freq, unsigned int fmax,
8 unsigned int* in, unsigned int* feed, unsigned int* post); 8 unsigned int* in, unsigned int* feed, unsigned int* post);
9static inline int PLL_calcclock(CPMINFO unsigned int freq, unsigned int fmax, 9static inline int PLL_calcclock(const struct matrox_fb_info *minfo,
10 unsigned int* in, unsigned int* feed, unsigned int* post) { 10 unsigned int freq, unsigned int fmax,
11 unsigned int *in, unsigned int *feed,
12 unsigned int *post)
13{
11 return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post); 14 return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post);
12} 15}
13 16
14int matroxfb_vgaHWinit(WPMINFO struct my_timming* m); 17int matroxfb_vgaHWinit(struct matrox_fb_info *minfo, struct my_timming* m);
15void matroxfb_vgaHWrestore(WPMINFO2); 18void matroxfb_vgaHWrestore(struct matrox_fb_info *minfo);
16void matroxfb_read_pins(WPMINFO2); 19void matroxfb_read_pins(struct matrox_fb_info *minfo);
17 20
18#endif /* __MATROXFB_MISC_H__ */ 21#endif /* __MATROXFB_MISC_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 17:39:05 -0500