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-rw-r--r--drivers/video/Kconfig10
-rw-r--r--drivers/video/Makefile1
-rw-r--r--drivers/video/backlight/locomolcd.c4
-rw-r--r--drivers/video/bw2.c4
-rw-r--r--drivers/video/carminefb.c2
-rw-r--r--drivers/video/cg14.c4
-rw-r--r--drivers/video/cg3.c4
-rw-r--r--drivers/video/cg6.c4
-rw-r--r--drivers/video/console/fbcon.c26
-rw-r--r--drivers/video/console/fbcon.h1
-rw-r--r--drivers/video/controlfb.c2
-rw-r--r--drivers/video/ffb.c4
-rw-r--r--drivers/video/fsl-diu-fb.c137
-rw-r--r--drivers/video/fsl-diu-fb.h223
-rw-r--r--drivers/video/imxfb.c72
-rw-r--r--drivers/video/jz4740_fb.c847
-rw-r--r--drivers/video/leo.c4
-rw-r--r--drivers/video/offb.c3
-rw-r--r--drivers/video/omap2/displays/panel-acx565akm.c4
-rw-r--r--drivers/video/omap2/vram.c33
-rw-r--r--drivers/video/p9100.c4
-rw-r--r--drivers/video/sunxvr1000.c4
-rw-r--r--drivers/video/tcx.c4
-rw-r--r--drivers/video/tdfxfb.c4
-rw-r--r--drivers/video/tgafb.c2
-rw-r--r--drivers/video/xen-fbfront.c2
-rw-r--r--drivers/video/xilinxfb.c2
27 files changed, 1118 insertions, 293 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3d94a1471724..7b11ea68c80e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1871,6 +1871,7 @@ config FB_MBX_DEBUG
1871config FB_FSL_DIU 1871config FB_FSL_DIU
1872 tristate "Freescale DIU framebuffer support" 1872 tristate "Freescale DIU framebuffer support"
1873 depends on FB && FSL_SOC 1873 depends on FB && FSL_SOC
1874 select FB_MODE_HELPERS
1874 select FB_CFB_FILLRECT 1875 select FB_CFB_FILLRECT
1875 select FB_CFB_COPYAREA 1876 select FB_CFB_COPYAREA
1876 select FB_CFB_IMAGEBLIT 1877 select FB_CFB_IMAGEBLIT
@@ -2229,6 +2230,15 @@ config FB_BROADSHEET
2229 and could also have been called by other names when coupled with 2230 and could also have been called by other names when coupled with
2230 a bridge adapter. 2231 a bridge adapter.
2231 2232
2233config FB_JZ4740
2234 tristate "JZ4740 LCD framebuffer support"
2235 depends on FB && MACH_JZ4740
2236 select FB_SYS_FILLRECT
2237 select FB_SYS_COPYAREA
2238 select FB_SYS_IMAGEBLIT
2239 help
2240 Framebuffer support for the JZ4740 SoC.
2241
2232source "drivers/video/omap/Kconfig" 2242source "drivers/video/omap/Kconfig"
2233source "drivers/video/omap2/Kconfig" 2243source "drivers/video/omap2/Kconfig"
2234 2244
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index ddc2af2ba45b..f56a9cae2157 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -131,6 +131,7 @@ obj-$(CONFIG_FB_CARMINE) += carminefb.o
131obj-$(CONFIG_FB_MB862XX) += mb862xx/ 131obj-$(CONFIG_FB_MB862XX) += mb862xx/
132obj-$(CONFIG_FB_MSM) += msm/ 132obj-$(CONFIG_FB_MSM) += msm/
133obj-$(CONFIG_FB_NUC900) += nuc900fb.o 133obj-$(CONFIG_FB_NUC900) += nuc900fb.o
134obj-$(CONFIG_FB_JZ4740) += jz4740_fb.o
134 135
135# Platform or fallback drivers go here 136# Platform or fallback drivers go here
136obj-$(CONFIG_FB_UVESA) += uvesafb.o 137obj-$(CONFIG_FB_UVESA) += uvesafb.o
diff --git a/drivers/video/backlight/locomolcd.c b/drivers/video/backlight/locomolcd.c
index 7571bc26071e..d2f59015d517 100644
--- a/drivers/video/backlight/locomolcd.c
+++ b/drivers/video/backlight/locomolcd.c
@@ -2,7 +2,7 @@
2 * Backlight control code for Sharp Zaurus SL-5500 2 * Backlight control code for Sharp Zaurus SL-5500
3 * 3 *
4 * Copyright 2005 John Lenz <lenz@cs.wisc.edu> 4 * Copyright 2005 John Lenz <lenz@cs.wisc.edu>
5 * Maintainer: Pavel Machek <pavel@suse.cz> (unless John wants to :-) 5 * Maintainer: Pavel Machek <pavel@ucw.cz> (unless John wants to :-)
6 * GPL v2 6 * GPL v2
7 * 7 *
8 * This driver assumes single CPU. That's okay, because collie is 8 * This driver assumes single CPU. That's okay, because collie is
@@ -246,6 +246,6 @@ static void __exit locomolcd_exit(void)
246module_init(locomolcd_init); 246module_init(locomolcd_init);
247module_exit(locomolcd_exit); 247module_exit(locomolcd_exit);
248 248
249MODULE_AUTHOR("John Lenz <lenz@cs.wisc.edu>, Pavel Machek <pavel@suse.cz>"); 249MODULE_AUTHOR("John Lenz <lenz@cs.wisc.edu>, Pavel Machek <pavel@ucw.cz>");
250MODULE_DESCRIPTION("Collie LCD driver"); 250MODULE_DESCRIPTION("Collie LCD driver");
251MODULE_LICENSE("GPL"); 251MODULE_LICENSE("GPL");
diff --git a/drivers/video/bw2.c b/drivers/video/bw2.c
index 09f1b9b462f4..c7796637bafd 100644
--- a/drivers/video/bw2.c
+++ b/drivers/video/bw2.c
@@ -390,12 +390,12 @@ static int __init bw2_init(void)
390 if (fb_get_options("bw2fb", NULL)) 390 if (fb_get_options("bw2fb", NULL))
391 return -ENODEV; 391 return -ENODEV;
392 392
393 return of_register_driver(&bw2_driver, &of_bus_type); 393 return of_register_platform_driver(&bw2_driver);
394} 394}
395 395
396static void __exit bw2_exit(void) 396static void __exit bw2_exit(void)
397{ 397{
398 of_unregister_driver(&bw2_driver); 398 of_unregister_platform_driver(&bw2_driver);
399} 399}
400 400
401module_init(bw2_init); 401module_init(bw2_init);
diff --git a/drivers/video/carminefb.c b/drivers/video/carminefb.c
index d8345fcc4fe3..6b19136aa181 100644
--- a/drivers/video/carminefb.c
+++ b/drivers/video/carminefb.c
@@ -432,7 +432,7 @@ static int init_hardware(struct carmine_hw *hw)
432 u32 loops; 432 u32 loops;
433 u32 ret; 433 u32 ret;
434 434
435 /* Initalize Carmine */ 435 /* Initialize Carmine */
436 /* Sets internal clock */ 436 /* Sets internal clock */
437 c_set_hw_reg(hw, CARMINE_CTL_REG + CARMINE_CTL_REG_CLOCK_ENABLE, 437 c_set_hw_reg(hw, CARMINE_CTL_REG + CARMINE_CTL_REG_CLOCK_ENABLE,
438 CARMINE_DFLT_IP_CLOCK_ENABLE); 438 CARMINE_DFLT_IP_CLOCK_ENABLE);
diff --git a/drivers/video/cg14.c b/drivers/video/cg14.c
index e5dc2241194f..d09fde8beb69 100644
--- a/drivers/video/cg14.c
+++ b/drivers/video/cg14.c
@@ -610,12 +610,12 @@ static int __init cg14_init(void)
610 if (fb_get_options("cg14fb", NULL)) 610 if (fb_get_options("cg14fb", NULL))
611 return -ENODEV; 611 return -ENODEV;
612 612
613 return of_register_driver(&cg14_driver, &of_bus_type); 613 return of_register_platform_driver(&cg14_driver);
614} 614}
615 615
616static void __exit cg14_exit(void) 616static void __exit cg14_exit(void)
617{ 617{
618 of_unregister_driver(&cg14_driver); 618 of_unregister_platform_driver(&cg14_driver);
619} 619}
620 620
621module_init(cg14_init); 621module_init(cg14_init);
diff --git a/drivers/video/cg3.c b/drivers/video/cg3.c
index 558d73a948a0..64aa29809fb9 100644
--- a/drivers/video/cg3.c
+++ b/drivers/video/cg3.c
@@ -477,12 +477,12 @@ static int __init cg3_init(void)
477 if (fb_get_options("cg3fb", NULL)) 477 if (fb_get_options("cg3fb", NULL))
478 return -ENODEV; 478 return -ENODEV;
479 479
480 return of_register_driver(&cg3_driver, &of_bus_type); 480 return of_register_platform_driver(&cg3_driver);
481} 481}
482 482
483static void __exit cg3_exit(void) 483static void __exit cg3_exit(void)
484{ 484{
485 of_unregister_driver(&cg3_driver); 485 of_unregister_platform_driver(&cg3_driver);
486} 486}
487 487
488module_init(cg3_init); 488module_init(cg3_init);
diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c
index 480d761a27a8..2389a719dcc7 100644
--- a/drivers/video/cg6.c
+++ b/drivers/video/cg6.c
@@ -870,12 +870,12 @@ static int __init cg6_init(void)
870 if (fb_get_options("cg6fb", NULL)) 870 if (fb_get_options("cg6fb", NULL))
871 return -ENODEV; 871 return -ENODEV;
872 872
873 return of_register_driver(&cg6_driver, &of_bus_type); 873 return of_register_platform_driver(&cg6_driver);
874} 874}
875 875
876static void __exit cg6_exit(void) 876static void __exit cg6_exit(void)
877{ 877{
878 of_unregister_driver(&cg6_driver); 878 of_unregister_platform_driver(&cg6_driver);
879} 879}
880 880
881module_init(cg6_init); 881module_init(cg6_init);
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index b0a3fa00706d..3b3f5749af92 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -2342,6 +2342,30 @@ static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch)
2342 return 0; 2342 return 0;
2343} 2343}
2344 2344
2345static int fbcon_debug_enter(struct vc_data *vc)
2346{
2347 struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]];
2348 struct fbcon_ops *ops = info->fbcon_par;
2349
2350 ops->save_graphics = ops->graphics;
2351 ops->graphics = 0;
2352 if (info->fbops->fb_debug_enter)
2353 info->fbops->fb_debug_enter(info);
2354 fbcon_set_palette(vc, color_table);
2355 return 0;
2356}
2357
2358static int fbcon_debug_leave(struct vc_data *vc)
2359{
2360 struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]];
2361 struct fbcon_ops *ops = info->fbcon_par;
2362
2363 ops->graphics = ops->save_graphics;
2364 if (info->fbops->fb_debug_leave)
2365 info->fbops->fb_debug_leave(info);
2366 return 0;
2367}
2368
2345static int fbcon_get_font(struct vc_data *vc, struct console_font *font) 2369static int fbcon_get_font(struct vc_data *vc, struct console_font *font)
2346{ 2370{
2347 u8 *fontdata = vc->vc_font.data; 2371 u8 *fontdata = vc->vc_font.data;
@@ -3276,6 +3300,8 @@ static const struct consw fb_con = {
3276 .con_screen_pos = fbcon_screen_pos, 3300 .con_screen_pos = fbcon_screen_pos,
3277 .con_getxy = fbcon_getxy, 3301 .con_getxy = fbcon_getxy,
3278 .con_resize = fbcon_resize, 3302 .con_resize = fbcon_resize,
3303 .con_debug_enter = fbcon_debug_enter,
3304 .con_debug_leave = fbcon_debug_leave,
3279}; 3305};
3280 3306
3281static struct notifier_block fbcon_event_notifier = { 3307static struct notifier_block fbcon_event_notifier = {
diff --git a/drivers/video/console/fbcon.h b/drivers/video/console/fbcon.h
index 89a346880ec0..6bd2e0c7f209 100644
--- a/drivers/video/console/fbcon.h
+++ b/drivers/video/console/fbcon.h
@@ -74,6 +74,7 @@ struct fbcon_ops {
74 int cursor_reset; 74 int cursor_reset;
75 int blank_state; 75 int blank_state;
76 int graphics; 76 int graphics;
77 int save_graphics; /* for debug enter/leave */
77 int flags; 78 int flags;
78 int rotate; 79 int rotate;
79 int cur_rotate; 80 int cur_rotate;
diff --git a/drivers/video/controlfb.c b/drivers/video/controlfb.c
index 49fcbe8f18ac..c225dcce89e7 100644
--- a/drivers/video/controlfb.c
+++ b/drivers/video/controlfb.c
@@ -40,6 +40,8 @@
40#include <linux/vmalloc.h> 40#include <linux/vmalloc.h>
41#include <linux/delay.h> 41#include <linux/delay.h>
42#include <linux/interrupt.h> 42#include <linux/interrupt.h>
43#include <linux/of.h>
44#include <linux/of_address.h>
43#include <linux/fb.h> 45#include <linux/fb.h>
44#include <linux/init.h> 46#include <linux/init.h>
45#include <linux/pci.h> 47#include <linux/pci.h>
diff --git a/drivers/video/ffb.c b/drivers/video/ffb.c
index 95c0227f47fc..f6ecfab296d3 100644
--- a/drivers/video/ffb.c
+++ b/drivers/video/ffb.c
@@ -1067,12 +1067,12 @@ static int __init ffb_init(void)
1067 if (fb_get_options("ffb", NULL)) 1067 if (fb_get_options("ffb", NULL))
1068 return -ENODEV; 1068 return -ENODEV;
1069 1069
1070 return of_register_driver(&ffb_driver, &of_bus_type); 1070 return of_register_platform_driver(&ffb_driver);
1071} 1071}
1072 1072
1073static void __exit ffb_exit(void) 1073static void __exit ffb_exit(void)
1074{ 1074{
1075 of_unregister_driver(&ffb_driver); 1075 of_unregister_platform_driver(&ffb_driver);
1076} 1076}
1077 1077
1078module_init(ffb_init); 1078module_init(ffb_init);
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 27455ce298b7..e38ad2224540 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -34,7 +34,8 @@
34#include <linux/of_platform.h> 34#include <linux/of_platform.h>
35 35
36#include <sysdev/fsl_soc.h> 36#include <sysdev/fsl_soc.h>
37#include "fsl-diu-fb.h" 37#include <linux/fsl-diu-fb.h>
38#include "edid.h"
38 39
39/* 40/*
40 * These parameters give default parameters 41 * These parameters give default parameters
@@ -217,6 +218,7 @@ struct mfb_info {
217 int x_aoi_d; /* aoi display x offset to physical screen */ 218 int x_aoi_d; /* aoi display x offset to physical screen */
218 int y_aoi_d; /* aoi display y offset to physical screen */ 219 int y_aoi_d; /* aoi display y offset to physical screen */
219 struct fsl_diu_data *parent; 220 struct fsl_diu_data *parent;
221 u8 *edid_data;
220}; 222};
221 223
222 224
@@ -317,6 +319,17 @@ static void fsl_diu_free(void *virt, size_t size)
317 free_pages_exact(virt, size); 319 free_pages_exact(virt, size);
318} 320}
319 321
322/*
323 * Workaround for failed writing desc register of planes.
324 * Needed with MPC5121 DIU rev 2.0 silicon.
325 */
326void wr_reg_wa(u32 *reg, u32 val)
327{
328 do {
329 out_be32(reg, val);
330 } while (in_be32(reg) != val);
331}
332
320static int fsl_diu_enable_panel(struct fb_info *info) 333static int fsl_diu_enable_panel(struct fb_info *info)
321{ 334{
322 struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par; 335 struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
@@ -330,7 +343,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
330 switch (mfbi->index) { 343 switch (mfbi->index) {
331 case 0: /* plane 0 */ 344 case 0: /* plane 0 */
332 if (hw->desc[0] != ad->paddr) 345 if (hw->desc[0] != ad->paddr)
333 out_be32(&hw->desc[0], ad->paddr); 346 wr_reg_wa(&hw->desc[0], ad->paddr);
334 break; 347 break;
335 case 1: /* plane 1 AOI 0 */ 348 case 1: /* plane 1 AOI 0 */
336 cmfbi = machine_data->fsl_diu_info[2]->par; 349 cmfbi = machine_data->fsl_diu_info[2]->par;
@@ -340,7 +353,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
340 cpu_to_le32(cmfbi->ad->paddr); 353 cpu_to_le32(cmfbi->ad->paddr);
341 else 354 else
342 ad->next_ad = 0; 355 ad->next_ad = 0;
343 out_be32(&hw->desc[1], ad->paddr); 356 wr_reg_wa(&hw->desc[1], ad->paddr);
344 } 357 }
345 break; 358 break;
346 case 3: /* plane 2 AOI 0 */ 359 case 3: /* plane 2 AOI 0 */
@@ -351,14 +364,14 @@ static int fsl_diu_enable_panel(struct fb_info *info)
351 cpu_to_le32(cmfbi->ad->paddr); 364 cpu_to_le32(cmfbi->ad->paddr);
352 else 365 else
353 ad->next_ad = 0; 366 ad->next_ad = 0;
354 out_be32(&hw->desc[2], ad->paddr); 367 wr_reg_wa(&hw->desc[2], ad->paddr);
355 } 368 }
356 break; 369 break;
357 case 2: /* plane 1 AOI 1 */ 370 case 2: /* plane 1 AOI 1 */
358 pmfbi = machine_data->fsl_diu_info[1]->par; 371 pmfbi = machine_data->fsl_diu_info[1]->par;
359 ad->next_ad = 0; 372 ad->next_ad = 0;
360 if (hw->desc[1] == machine_data->dummy_ad->paddr) 373 if (hw->desc[1] == machine_data->dummy_ad->paddr)
361 out_be32(&hw->desc[1], ad->paddr); 374 wr_reg_wa(&hw->desc[1], ad->paddr);
362 else /* AOI0 open */ 375 else /* AOI0 open */
363 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); 376 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
364 break; 377 break;
@@ -366,7 +379,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
366 pmfbi = machine_data->fsl_diu_info[3]->par; 379 pmfbi = machine_data->fsl_diu_info[3]->par;
367 ad->next_ad = 0; 380 ad->next_ad = 0;
368 if (hw->desc[2] == machine_data->dummy_ad->paddr) 381 if (hw->desc[2] == machine_data->dummy_ad->paddr)
369 out_be32(&hw->desc[2], ad->paddr); 382 wr_reg_wa(&hw->desc[2], ad->paddr);
370 else /* AOI0 was open */ 383 else /* AOI0 was open */
371 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); 384 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
372 break; 385 break;
@@ -390,27 +403,24 @@ static int fsl_diu_disable_panel(struct fb_info *info)
390 switch (mfbi->index) { 403 switch (mfbi->index) {
391 case 0: /* plane 0 */ 404 case 0: /* plane 0 */
392 if (hw->desc[0] != machine_data->dummy_ad->paddr) 405 if (hw->desc[0] != machine_data->dummy_ad->paddr)
393 out_be32(&hw->desc[0], 406 wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
394 machine_data->dummy_ad->paddr);
395 break; 407 break;
396 case 1: /* plane 1 AOI 0 */ 408 case 1: /* plane 1 AOI 0 */
397 cmfbi = machine_data->fsl_diu_info[2]->par; 409 cmfbi = machine_data->fsl_diu_info[2]->par;
398 if (cmfbi->count > 0) /* AOI1 is open */ 410 if (cmfbi->count > 0) /* AOI1 is open */
399 out_be32(&hw->desc[1], cmfbi->ad->paddr); 411 wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
400 /* move AOI1 to the first */ 412 /* move AOI1 to the first */
401 else /* AOI1 was closed */ 413 else /* AOI1 was closed */
402 out_be32(&hw->desc[1], 414 wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
403 machine_data->dummy_ad->paddr);
404 /* close AOI 0 */ 415 /* close AOI 0 */
405 break; 416 break;
406 case 3: /* plane 2 AOI 0 */ 417 case 3: /* plane 2 AOI 0 */
407 cmfbi = machine_data->fsl_diu_info[4]->par; 418 cmfbi = machine_data->fsl_diu_info[4]->par;
408 if (cmfbi->count > 0) /* AOI1 is open */ 419 if (cmfbi->count > 0) /* AOI1 is open */
409 out_be32(&hw->desc[2], cmfbi->ad->paddr); 420 wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
410 /* move AOI1 to the first */ 421 /* move AOI1 to the first */
411 else /* AOI1 was closed */ 422 else /* AOI1 was closed */
412 out_be32(&hw->desc[2], 423 wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
413 machine_data->dummy_ad->paddr);
414 /* close AOI 0 */ 424 /* close AOI 0 */
415 break; 425 break;
416 case 2: /* plane 1 AOI 1 */ 426 case 2: /* plane 1 AOI 1 */
@@ -421,7 +431,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
421 /* AOI0 is open, must be the first */ 431 /* AOI0 is open, must be the first */
422 pmfbi->ad->next_ad = 0; 432 pmfbi->ad->next_ad = 0;
423 } else /* AOI1 is the first in the chain */ 433 } else /* AOI1 is the first in the chain */
424 out_be32(&hw->desc[1], machine_data->dummy_ad->paddr); 434 wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
425 /* close AOI 1 */ 435 /* close AOI 1 */
426 break; 436 break;
427 case 4: /* plane 2 AOI 1 */ 437 case 4: /* plane 2 AOI 1 */
@@ -432,7 +442,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
432 /* AOI0 is open, must be the first */ 442 /* AOI0 is open, must be the first */
433 pmfbi->ad->next_ad = 0; 443 pmfbi->ad->next_ad = 0;
434 } else /* AOI1 is the first in the chain */ 444 } else /* AOI1 is the first in the chain */
435 out_be32(&hw->desc[2], machine_data->dummy_ad->paddr); 445 wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
436 /* close AOI 1 */ 446 /* close AOI 1 */
437 break; 447 break;
438 default: 448 default:
@@ -1100,6 +1110,10 @@ static int fsl_diu_open(struct fb_info *info, int user)
1100 struct mfb_info *mfbi = info->par; 1110 struct mfb_info *mfbi = info->par;
1101 int res = 0; 1111 int res = 0;
1102 1112
1113 /* free boot splash memory on first /dev/fb0 open */
1114 if (!mfbi->index && diu_ops.release_bootmem)
1115 diu_ops.release_bootmem();
1116
1103 spin_lock(&diu_lock); 1117 spin_lock(&diu_lock);
1104 mfbi->count++; 1118 mfbi->count++;
1105 if (mfbi->count == 1) { 1119 if (mfbi->count == 1) {
@@ -1173,18 +1187,30 @@ static int __devinit install_fb(struct fb_info *info)
1173 int rc; 1187 int rc;
1174 struct mfb_info *mfbi = info->par; 1188 struct mfb_info *mfbi = info->par;
1175 const char *aoi_mode, *init_aoi_mode = "320x240"; 1189 const char *aoi_mode, *init_aoi_mode = "320x240";
1190 struct fb_videomode *db = fsl_diu_mode_db;
1191 unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
1192 int has_default_mode = 1;
1176 1193
1177 if (init_fbinfo(info)) 1194 if (init_fbinfo(info))
1178 return -EINVAL; 1195 return -EINVAL;
1179 1196
1180 if (mfbi->index == 0) /* plane 0 */ 1197 if (mfbi->index == 0) { /* plane 0 */
1198 if (mfbi->edid_data) {
1199 /* Now build modedb from EDID */
1200 fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
1201 fb_videomode_to_modelist(info->monspecs.modedb,
1202 info->monspecs.modedb_len,
1203 &info->modelist);
1204 db = info->monspecs.modedb;
1205 dbsize = info->monspecs.modedb_len;
1206 }
1181 aoi_mode = fb_mode; 1207 aoi_mode = fb_mode;
1182 else 1208 } else {
1183 aoi_mode = init_aoi_mode; 1209 aoi_mode = init_aoi_mode;
1210 }
1184 pr_debug("mode used = %s\n", aoi_mode); 1211 pr_debug("mode used = %s\n", aoi_mode);
1185 rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db, 1212 rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize,
1186 ARRAY_SIZE(fsl_diu_mode_db), &fsl_diu_default_mode, default_bpp); 1213 &fsl_diu_default_mode, default_bpp);
1187
1188 switch (rc) { 1214 switch (rc) {
1189 case 1: 1215 case 1:
1190 pr_debug("using mode specified in @mode\n"); 1216 pr_debug("using mode specified in @mode\n");
@@ -1202,10 +1228,50 @@ static int __devinit install_fb(struct fb_info *info)
1202 default: 1228 default:
1203 pr_debug("rc = %d\n", rc); 1229 pr_debug("rc = %d\n", rc);
1204 pr_debug("failed to find mode\n"); 1230 pr_debug("failed to find mode\n");
1205 return -EINVAL; 1231 /*
1232 * For plane 0 we continue and look into
1233 * driver's internal modedb.
1234 */
1235 if (mfbi->index == 0 && mfbi->edid_data)
1236 has_default_mode = 0;
1237 else
1238 return -EINVAL;
1206 break; 1239 break;
1207 } 1240 }
1208 1241
1242 if (!has_default_mode) {
1243 rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
1244 ARRAY_SIZE(fsl_diu_mode_db),
1245 &fsl_diu_default_mode,
1246 default_bpp);
1247 if (rc > 0 && rc < 5)
1248 has_default_mode = 1;
1249 }
1250
1251 /* Still not found, use preferred mode from database if any */
1252 if (!has_default_mode && info->monspecs.modedb) {
1253 struct fb_monspecs *specs = &info->monspecs;
1254 struct fb_videomode *modedb = &specs->modedb[0];
1255
1256 /*
1257 * Get preferred timing. If not found,
1258 * first mode in database will be used.
1259 */
1260 if (specs->misc & FB_MISC_1ST_DETAIL) {
1261 int i;
1262
1263 for (i = 0; i < specs->modedb_len; i++) {
1264 if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
1265 modedb = &specs->modedb[i];
1266 break;
1267 }
1268 }
1269 }
1270
1271 info->var.bits_per_pixel = default_bpp;
1272 fb_videomode_to_var(&info->var, modedb);
1273 }
1274
1209 pr_debug("xres_virtual %d\n", info->var.xres_virtual); 1275 pr_debug("xres_virtual %d\n", info->var.xres_virtual);
1210 pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel); 1276 pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel);
1211 1277
@@ -1244,6 +1310,9 @@ static void uninstall_fb(struct fb_info *info)
1244 if (!mfbi->registered) 1310 if (!mfbi->registered)
1245 return; 1311 return;
1246 1312
1313 if (mfbi->index == 0)
1314 kfree(mfbi->edid_data);
1315
1247 unregister_framebuffer(info); 1316 unregister_framebuffer(info);
1248 unmap_video_memory(info); 1317 unmap_video_memory(info);
1249 if (&info->cmap) 1318 if (&info->cmap)
@@ -1427,6 +1496,7 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
1427 int ret, i, error = 0; 1496 int ret, i, error = 0;
1428 struct resource res; 1497 struct resource res;
1429 struct fsl_diu_data *machine_data; 1498 struct fsl_diu_data *machine_data;
1499 int diu_mode;
1430 1500
1431 machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL); 1501 machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
1432 if (!machine_data) 1502 if (!machine_data)
@@ -1443,6 +1513,17 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
1443 mfbi = machine_data->fsl_diu_info[i]->par; 1513 mfbi = machine_data->fsl_diu_info[i]->par;
1444 memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info)); 1514 memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
1445 mfbi->parent = machine_data; 1515 mfbi->parent = machine_data;
1516
1517 if (mfbi->index == 0) {
1518 const u8 *prop;
1519 int len;
1520
1521 /* Get EDID */
1522 prop = of_get_property(np, "edid", &len);
1523 if (prop && len == EDID_LENGTH)
1524 mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
1525 GFP_KERNEL);
1526 }
1446 } 1527 }
1447 1528
1448 ret = of_address_to_resource(np, 0, &res); 1529 ret = of_address_to_resource(np, 0, &res);
@@ -1463,7 +1544,9 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
1463 goto error2; 1544 goto error2;
1464 } 1545 }
1465 1546
1466 out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/ 1547 diu_mode = in_be32(&dr.diu_reg->diu_mode);
1548 if (diu_mode != MFB_MODE1)
1549 out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
1467 1550
1468 /* Get the IRQ of the DIU */ 1551 /* Get the IRQ of the DIU */
1469 machine_data->irq = irq_of_parse_and_map(np, 0); 1552 machine_data->irq = irq_of_parse_and_map(np, 0);
@@ -1511,7 +1594,13 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
1511 machine_data->dummy_ad->offset_xyd = 0; 1594 machine_data->dummy_ad->offset_xyd = 0;
1512 machine_data->dummy_ad->next_ad = 0; 1595 machine_data->dummy_ad->next_ad = 0;
1513 1596
1514 out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr); 1597 /*
1598 * Let DIU display splash screen if it was pre-initialized
1599 * by the bootloader, set dummy area descriptor otherwise.
1600 */
1601 if (diu_mode != MFB_MODE1)
1602 out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
1603
1515 out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr); 1604 out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
1516 out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr); 1605 out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
1517 1606
diff --git a/drivers/video/fsl-diu-fb.h b/drivers/video/fsl-diu-fb.h
deleted file mode 100644
index fc295d7ea463..000000000000
--- a/drivers/video/fsl-diu-fb.h
+++ /dev/null
@@ -1,223 +0,0 @@
1/*
2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * Freescale DIU Frame Buffer device driver
5 *
6 * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
7 * Paul Widmer <paul.widmer@freescale.com>
8 * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
9 * York Sun <yorksun@freescale.com>
10 *
11 * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 */
19
20#ifndef __FSL_DIU_FB_H__
21#define __FSL_DIU_FB_H__
22
23/* Arbitrary threshold to determine the allocation method
24 * See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory()
25 */
26#define MEM_ALLOC_THRESHOLD (1024*768*4+32)
27/* Minimum value that the pixel clock can be set to in pico seconds
28 * This is determined by platform clock/3 where the minimum platform
29 * clock is 533MHz. This gives 5629 pico seconds.
30 */
31#define MIN_PIX_CLK 5629
32#define MAX_PIX_CLK 96096
33
34#include <linux/types.h>
35
36struct mfb_alpha {
37 int enable;
38 int alpha;
39};
40
41struct mfb_chroma_key {
42 int enable;
43 __u8 red_max;
44 __u8 green_max;
45 __u8 blue_max;
46 __u8 red_min;
47 __u8 green_min;
48 __u8 blue_min;
49};
50
51struct aoi_display_offset {
52 int x_aoi_d;
53 int y_aoi_d;
54};
55
56#define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key)
57#define MFB_WAIT_FOR_VSYNC _IOW('F', 0x20, u_int32_t)
58#define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8)
59
60#define MFB_SET_ALPHA 0x80014d00
61#define MFB_GET_ALPHA 0x40014d00
62#define MFB_SET_AOID 0x80084d04
63#define MFB_GET_AOID 0x40084d04
64#define MFB_SET_PIXFMT 0x80014d08
65#define MFB_GET_PIXFMT 0x40014d08
66
67#define FBIOGET_GWINFO 0x46E0
68#define FBIOPUT_GWINFO 0x46E1
69
70#ifdef __KERNEL__
71#include <linux/spinlock.h>
72
73/*
74 * These are the fields of area descriptor(in DDR memory) for every plane
75 */
76struct diu_ad {
77 /* Word 0(32-bit) in DDR memory */
78/* __u16 comp; */
79/* __u16 pixel_s:2; */
80/* __u16 pallete:1; */
81/* __u16 red_c:2; */
82/* __u16 green_c:2; */
83/* __u16 blue_c:2; */
84/* __u16 alpha_c:3; */
85/* __u16 byte_f:1; */
86/* __u16 res0:3; */
87
88 __be32 pix_fmt; /* hard coding pixel format */
89
90 /* Word 1(32-bit) in DDR memory */
91 __le32 addr;
92
93 /* Word 2(32-bit) in DDR memory */
94/* __u32 delta_xs:11; */
95/* __u32 res1:1; */
96/* __u32 delta_ys:11; */
97/* __u32 res2:1; */
98/* __u32 g_alpha:8; */
99 __le32 src_size_g_alpha;
100
101 /* Word 3(32-bit) in DDR memory */
102/* __u32 delta_xi:11; */
103/* __u32 res3:5; */
104/* __u32 delta_yi:11; */
105/* __u32 res4:3; */
106/* __u32 flip:2; */
107 __le32 aoi_size;
108
109 /* Word 4(32-bit) in DDR memory */
110 /*__u32 offset_xi:11;
111 __u32 res5:5;
112 __u32 offset_yi:11;
113 __u32 res6:5;
114 */
115 __le32 offset_xyi;
116
117 /* Word 5(32-bit) in DDR memory */
118 /*__u32 offset_xd:11;
119 __u32 res7:5;
120 __u32 offset_yd:11;
121 __u32 res8:5; */
122 __le32 offset_xyd;
123
124
125 /* Word 6(32-bit) in DDR memory */
126 __u8 ckmax_r;
127 __u8 ckmax_g;
128 __u8 ckmax_b;
129 __u8 res9;
130
131 /* Word 7(32-bit) in DDR memory */
132 __u8 ckmin_r;
133 __u8 ckmin_g;
134 __u8 ckmin_b;
135 __u8 res10;
136/* __u32 res10:8; */
137
138 /* Word 8(32-bit) in DDR memory */
139 __le32 next_ad;
140
141 /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
142 __u32 paddr;
143} __attribute__ ((packed));
144
145/* DIU register map */
146struct diu {
147 __be32 desc[3];
148 __be32 gamma;
149 __be32 pallete;
150 __be32 cursor;
151 __be32 curs_pos;
152 __be32 diu_mode;
153 __be32 bgnd;
154 __be32 bgnd_wb;
155 __be32 disp_size;
156 __be32 wb_size;
157 __be32 wb_mem_addr;
158 __be32 hsyn_para;
159 __be32 vsyn_para;
160 __be32 syn_pol;
161 __be32 thresholds;
162 __be32 int_status;
163 __be32 int_mask;
164 __be32 colorbar[8];
165 __be32 filling;
166 __be32 plut;
167} __attribute__ ((packed));
168
169struct diu_hw {
170 struct diu *diu_reg;
171 spinlock_t reg_lock;
172
173 __u32 mode; /* DIU operation mode */
174};
175
176struct diu_addr {
177 __u8 __iomem *vaddr; /* Virtual address */
178 dma_addr_t paddr; /* Physical address */
179 __u32 offset;
180};
181
182struct diu_pool {
183 struct diu_addr ad;
184 struct diu_addr gamma;
185 struct diu_addr pallete;
186 struct diu_addr cursor;
187};
188
189#define FSL_DIU_BASE_OFFSET 0x2C000 /* Offset of DIU */
190#define INT_LCDC 64 /* DIU interrupt number */
191
192#define FSL_AOI_NUM 6 /* 5 AOIs and one dummy AOI */
193 /* 1 for plane 0, 2 for plane 1&2 each */
194
195/* Minimum X and Y resolutions */
196#define MIN_XRES 64
197#define MIN_YRES 64
198
199/* HW cursor parameters */
200#define MAX_CURS 32
201
202/* Modes of operation of DIU */
203#define MFB_MODE0 0 /* DIU off */
204#define MFB_MODE1 1 /* All three planes output to display */
205#define MFB_MODE2 2 /* Plane 1 to display, planes 2+3 written back*/
206#define MFB_MODE3 3 /* All three planes written back to memory */
207#define MFB_MODE4 4 /* Color bar generation */
208
209/* INT_STATUS/INT_MASK field descriptions */
210#define INT_VSYNC 0x01 /* Vsync interrupt */
211#define INT_VSYNC_WB 0x02 /* Vsync interrupt for write back operation */
212#define INT_UNDRUN 0x04 /* Under run exception interrupt */
213#define INT_PARERR 0x08 /* Display parameters error interrupt */
214#define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */
215
216/* Panels'operation modes */
217#define MFB_TYPE_OUTPUT 0 /* Panel output to display */
218#define MFB_TYPE_OFF 1 /* Panel off */
219#define MFB_TYPE_WB 2 /* Panel written back to memory */
220#define MFB_TYPE_TEST 3 /* Panel generate color bar */
221
222#endif /* __KERNEL__ */
223#endif /* __FSL_DIU_FB_H__ */
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c
index b4b6deceed15..43f0639b1c10 100644
--- a/drivers/video/imxfb.c
+++ b/drivers/video/imxfb.c
@@ -175,6 +175,7 @@ struct imxfb_info {
175 175
176 struct imx_fb_videomode *mode; 176 struct imx_fb_videomode *mode;
177 int num_modes; 177 int num_modes;
178 struct backlight_device *bl;
178 179
179 void (*lcd_power)(int); 180 void (*lcd_power)(int);
180 void (*backlight_power)(int); 181 void (*backlight_power)(int);
@@ -449,6 +450,73 @@ static int imxfb_set_par(struct fb_info *info)
449 return 0; 450 return 0;
450} 451}
451 452
453
454
455static int imxfb_bl_get_brightness(struct backlight_device *bl)
456{
457 struct imxfb_info *fbi = bl_get_data(bl);
458
459 return readl(fbi->regs + LCDC_PWMR) & 0xFF;
460}
461
462static int imxfb_bl_update_status(struct backlight_device *bl)
463{
464 struct imxfb_info *fbi = bl_get_data(bl);
465 int brightness = bl->props.brightness;
466
467 if (bl->props.power != FB_BLANK_UNBLANK)
468 brightness = 0;
469 if (bl->props.fb_blank != FB_BLANK_UNBLANK)
470 brightness = 0;
471
472 fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness;
473
474 if (bl->props.fb_blank != FB_BLANK_UNBLANK)
475 clk_enable(fbi->clk);
476 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
477 if (bl->props.fb_blank != FB_BLANK_UNBLANK)
478 clk_disable(fbi->clk);
479
480 return 0;
481}
482
483static const struct backlight_ops imxfb_lcdc_bl_ops = {
484 .update_status = imxfb_bl_update_status,
485 .get_brightness = imxfb_bl_get_brightness,
486};
487
488static void imxfb_init_backlight(struct imxfb_info *fbi)
489{
490 struct backlight_properties props;
491 struct backlight_device *bl;
492
493 if (fbi->bl)
494 return;
495
496 memset(&props, 0, sizeof(struct backlight_properties));
497 props.max_brightness = 0xff;
498 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
499
500 bl = backlight_device_register("imxfb-bl", &fbi->pdev->dev, fbi,
501 &imxfb_lcdc_bl_ops, &props);
502 if (IS_ERR(bl)) {
503 dev_err(&fbi->pdev->dev, "error %ld on backlight register\n",
504 PTR_ERR(bl));
505 return;
506 }
507
508 fbi->bl = bl;
509 bl->props.power = FB_BLANK_UNBLANK;
510 bl->props.fb_blank = FB_BLANK_UNBLANK;
511 bl->props.brightness = imxfb_bl_get_brightness(bl);
512}
513
514static void imxfb_exit_backlight(struct imxfb_info *fbi)
515{
516 if (fbi->bl)
517 backlight_device_unregister(fbi->bl);
518}
519
452static void imxfb_enable_controller(struct imxfb_info *fbi) 520static void imxfb_enable_controller(struct imxfb_info *fbi)
453{ 521{
454 pr_debug("Enabling LCD controller\n"); 522 pr_debug("Enabling LCD controller\n");
@@ -579,7 +647,6 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
579 fbi->regs + LCDC_SIZE); 647 fbi->regs + LCDC_SIZE);
580 648
581 writel(fbi->pcr, fbi->regs + LCDC_PCR); 649 writel(fbi->pcr, fbi->regs + LCDC_PCR);
582 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
583 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); 650 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
584 writel(fbi->dmacr, fbi->regs + LCDC_DMACR); 651 writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
585 652
@@ -779,6 +846,8 @@ static int __init imxfb_probe(struct platform_device *pdev)
779 } 846 }
780 847
781 imxfb_enable_controller(fbi); 848 imxfb_enable_controller(fbi);
849 fbi->pdev = pdev;
850 imxfb_init_backlight(fbi);
782 851
783 return 0; 852 return 0;
784 853
@@ -816,6 +885,7 @@ static int __devexit imxfb_remove(struct platform_device *pdev)
816 885
817 imxfb_disable_controller(fbi); 886 imxfb_disable_controller(fbi);
818 887
888 imxfb_exit_backlight(fbi);
819 unregister_framebuffer(info); 889 unregister_framebuffer(info);
820 890
821 pdata = pdev->dev.platform_data; 891 pdata = pdev->dev.platform_data;
diff --git a/drivers/video/jz4740_fb.c b/drivers/video/jz4740_fb.c
new file mode 100644
index 000000000000..670ecaa0385a
--- /dev/null
+++ b/drivers/video/jz4740_fb.c
@@ -0,0 +1,847 @@
1/*
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4740 SoC LCD framebuffer driver
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/mutex.h>
19#include <linux/platform_device.h>
20
21#include <linux/clk.h>
22#include <linux/delay.h>
23
24#include <linux/console.h>
25#include <linux/fb.h>
26
27#include <linux/dma-mapping.h>
28
29#include <asm/mach-jz4740/jz4740_fb.h>
30#include <asm/mach-jz4740/gpio.h>
31
32#define JZ_REG_LCD_CFG 0x00
33#define JZ_REG_LCD_VSYNC 0x04
34#define JZ_REG_LCD_HSYNC 0x08
35#define JZ_REG_LCD_VAT 0x0C
36#define JZ_REG_LCD_DAH 0x10
37#define JZ_REG_LCD_DAV 0x14
38#define JZ_REG_LCD_PS 0x18
39#define JZ_REG_LCD_CLS 0x1C
40#define JZ_REG_LCD_SPL 0x20
41#define JZ_REG_LCD_REV 0x24
42#define JZ_REG_LCD_CTRL 0x30
43#define JZ_REG_LCD_STATE 0x34
44#define JZ_REG_LCD_IID 0x38
45#define JZ_REG_LCD_DA0 0x40
46#define JZ_REG_LCD_SA0 0x44
47#define JZ_REG_LCD_FID0 0x48
48#define JZ_REG_LCD_CMD0 0x4C
49#define JZ_REG_LCD_DA1 0x50
50#define JZ_REG_LCD_SA1 0x54
51#define JZ_REG_LCD_FID1 0x58
52#define JZ_REG_LCD_CMD1 0x5C
53
54#define JZ_LCD_CFG_SLCD BIT(31)
55#define JZ_LCD_CFG_PS_DISABLE BIT(23)
56#define JZ_LCD_CFG_CLS_DISABLE BIT(22)
57#define JZ_LCD_CFG_SPL_DISABLE BIT(21)
58#define JZ_LCD_CFG_REV_DISABLE BIT(20)
59#define JZ_LCD_CFG_HSYNCM BIT(19)
60#define JZ_LCD_CFG_PCLKM BIT(18)
61#define JZ_LCD_CFG_INV BIT(17)
62#define JZ_LCD_CFG_SYNC_DIR BIT(16)
63#define JZ_LCD_CFG_PS_POLARITY BIT(15)
64#define JZ_LCD_CFG_CLS_POLARITY BIT(14)
65#define JZ_LCD_CFG_SPL_POLARITY BIT(13)
66#define JZ_LCD_CFG_REV_POLARITY BIT(12)
67#define JZ_LCD_CFG_HSYNC_ACTIVE_LOW BIT(11)
68#define JZ_LCD_CFG_PCLK_FALLING_EDGE BIT(10)
69#define JZ_LCD_CFG_DE_ACTIVE_LOW BIT(9)
70#define JZ_LCD_CFG_VSYNC_ACTIVE_LOW BIT(8)
71#define JZ_LCD_CFG_18_BIT BIT(7)
72#define JZ_LCD_CFG_PDW (BIT(5) | BIT(4))
73#define JZ_LCD_CFG_MODE_MASK 0xf
74
75#define JZ_LCD_CTRL_BURST_4 (0x0 << 28)
76#define JZ_LCD_CTRL_BURST_8 (0x1 << 28)
77#define JZ_LCD_CTRL_BURST_16 (0x2 << 28)
78#define JZ_LCD_CTRL_RGB555 BIT(27)
79#define JZ_LCD_CTRL_OFUP BIT(26)
80#define JZ_LCD_CTRL_FRC_GRAYSCALE_16 (0x0 << 24)
81#define JZ_LCD_CTRL_FRC_GRAYSCALE_4 (0x1 << 24)
82#define JZ_LCD_CTRL_FRC_GRAYSCALE_2 (0x2 << 24)
83#define JZ_LCD_CTRL_PDD_MASK (0xff << 16)
84#define JZ_LCD_CTRL_EOF_IRQ BIT(13)
85#define JZ_LCD_CTRL_SOF_IRQ BIT(12)
86#define JZ_LCD_CTRL_OFU_IRQ BIT(11)
87#define JZ_LCD_CTRL_IFU0_IRQ BIT(10)
88#define JZ_LCD_CTRL_IFU1_IRQ BIT(9)
89#define JZ_LCD_CTRL_DD_IRQ BIT(8)
90#define JZ_LCD_CTRL_QDD_IRQ BIT(7)
91#define JZ_LCD_CTRL_REVERSE_ENDIAN BIT(6)
92#define JZ_LCD_CTRL_LSB_FISRT BIT(5)
93#define JZ_LCD_CTRL_DISABLE BIT(4)
94#define JZ_LCD_CTRL_ENABLE BIT(3)
95#define JZ_LCD_CTRL_BPP_1 0x0
96#define JZ_LCD_CTRL_BPP_2 0x1
97#define JZ_LCD_CTRL_BPP_4 0x2
98#define JZ_LCD_CTRL_BPP_8 0x3
99#define JZ_LCD_CTRL_BPP_15_16 0x4
100#define JZ_LCD_CTRL_BPP_18_24 0x5
101
102#define JZ_LCD_CMD_SOF_IRQ BIT(15)
103#define JZ_LCD_CMD_EOF_IRQ BIT(16)
104#define JZ_LCD_CMD_ENABLE_PAL BIT(12)
105
106#define JZ_LCD_SYNC_MASK 0x3ff
107
108#define JZ_LCD_STATE_DISABLED BIT(0)
109
110struct jzfb_framedesc {
111 uint32_t next;
112 uint32_t addr;
113 uint32_t id;
114 uint32_t cmd;
115} __packed;
116
117struct jzfb {
118 struct fb_info *fb;
119 struct platform_device *pdev;
120 void __iomem *base;
121 struct resource *mem;
122 struct jz4740_fb_platform_data *pdata;
123
124 size_t vidmem_size;
125 void *vidmem;
126 dma_addr_t vidmem_phys;
127 struct jzfb_framedesc *framedesc;
128 dma_addr_t framedesc_phys;
129
130 struct clk *ldclk;
131 struct clk *lpclk;
132
133 unsigned is_enabled:1;
134 struct mutex lock;
135
136 uint32_t pseudo_palette[16];
137};
138
139static const struct fb_fix_screeninfo jzfb_fix __devinitdata = {
140 .id = "JZ4740 FB",
141 .type = FB_TYPE_PACKED_PIXELS,
142 .visual = FB_VISUAL_TRUECOLOR,
143 .xpanstep = 0,
144 .ypanstep = 0,
145 .ywrapstep = 0,
146 .accel = FB_ACCEL_NONE,
147};
148
149static const struct jz_gpio_bulk_request jz_lcd_ctrl_pins[] = {
150 JZ_GPIO_BULK_PIN(LCD_PCLK),
151 JZ_GPIO_BULK_PIN(LCD_HSYNC),
152 JZ_GPIO_BULK_PIN(LCD_VSYNC),
153 JZ_GPIO_BULK_PIN(LCD_DE),
154 JZ_GPIO_BULK_PIN(LCD_PS),
155 JZ_GPIO_BULK_PIN(LCD_REV),
156 JZ_GPIO_BULK_PIN(LCD_CLS),
157 JZ_GPIO_BULK_PIN(LCD_SPL),
158};
159
160static const struct jz_gpio_bulk_request jz_lcd_data_pins[] = {
161 JZ_GPIO_BULK_PIN(LCD_DATA0),
162 JZ_GPIO_BULK_PIN(LCD_DATA1),
163 JZ_GPIO_BULK_PIN(LCD_DATA2),
164 JZ_GPIO_BULK_PIN(LCD_DATA3),
165 JZ_GPIO_BULK_PIN(LCD_DATA4),
166 JZ_GPIO_BULK_PIN(LCD_DATA5),
167 JZ_GPIO_BULK_PIN(LCD_DATA6),
168 JZ_GPIO_BULK_PIN(LCD_DATA7),
169 JZ_GPIO_BULK_PIN(LCD_DATA8),
170 JZ_GPIO_BULK_PIN(LCD_DATA9),
171 JZ_GPIO_BULK_PIN(LCD_DATA10),
172 JZ_GPIO_BULK_PIN(LCD_DATA11),
173 JZ_GPIO_BULK_PIN(LCD_DATA12),
174 JZ_GPIO_BULK_PIN(LCD_DATA13),
175 JZ_GPIO_BULK_PIN(LCD_DATA14),
176 JZ_GPIO_BULK_PIN(LCD_DATA15),
177 JZ_GPIO_BULK_PIN(LCD_DATA16),
178 JZ_GPIO_BULK_PIN(LCD_DATA17),
179};
180
181static unsigned int jzfb_num_ctrl_pins(struct jzfb *jzfb)
182{
183 unsigned int num;
184
185 switch (jzfb->pdata->lcd_type) {
186 case JZ_LCD_TYPE_GENERIC_16_BIT:
187 num = 4;
188 break;
189 case JZ_LCD_TYPE_GENERIC_18_BIT:
190 num = 4;
191 break;
192 case JZ_LCD_TYPE_8BIT_SERIAL:
193 num = 3;
194 break;
195 case JZ_LCD_TYPE_SPECIAL_TFT_1:
196 case JZ_LCD_TYPE_SPECIAL_TFT_2:
197 case JZ_LCD_TYPE_SPECIAL_TFT_3:
198 num = 8;
199 break;
200 default:
201 num = 0;
202 break;
203 }
204 return num;
205}
206
207static unsigned int jzfb_num_data_pins(struct jzfb *jzfb)
208{
209 unsigned int num;
210
211 switch (jzfb->pdata->lcd_type) {
212 case JZ_LCD_TYPE_GENERIC_16_BIT:
213 num = 16;
214 break;
215 case JZ_LCD_TYPE_GENERIC_18_BIT:
216 num = 18;
217 break;
218 case JZ_LCD_TYPE_8BIT_SERIAL:
219 num = 8;
220 break;
221 case JZ_LCD_TYPE_SPECIAL_TFT_1:
222 case JZ_LCD_TYPE_SPECIAL_TFT_2:
223 case JZ_LCD_TYPE_SPECIAL_TFT_3:
224 if (jzfb->pdata->bpp == 18)
225 num = 18;
226 else
227 num = 16;
228 break;
229 default:
230 num = 0;
231 break;
232 }
233 return num;
234}
235
236/* Based on CNVT_TOHW macro from skeletonfb.c */
237static inline uint32_t jzfb_convert_color_to_hw(unsigned val,
238 struct fb_bitfield *bf)
239{
240 return (((val << bf->length) + 0x7FFF - val) >> 16) << bf->offset;
241}
242
243static int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green,
244 unsigned blue, unsigned transp, struct fb_info *fb)
245{
246 uint32_t color;
247
248 if (regno >= 16)
249 return -EINVAL;
250
251 color = jzfb_convert_color_to_hw(red, &fb->var.red);
252 color |= jzfb_convert_color_to_hw(green, &fb->var.green);
253 color |= jzfb_convert_color_to_hw(blue, &fb->var.blue);
254 color |= jzfb_convert_color_to_hw(transp, &fb->var.transp);
255
256 ((uint32_t *)(fb->pseudo_palette))[regno] = color;
257
258 return 0;
259}
260
261static int jzfb_get_controller_bpp(struct jzfb *jzfb)
262{
263 switch (jzfb->pdata->bpp) {
264 case 18:
265 case 24:
266 return 32;
267 case 15:
268 return 16;
269 default:
270 return jzfb->pdata->bpp;
271 }
272}
273
274static struct fb_videomode *jzfb_get_mode(struct jzfb *jzfb,
275 struct fb_var_screeninfo *var)
276{
277 size_t i;
278 struct fb_videomode *mode = jzfb->pdata->modes;
279
280 for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) {
281 if (mode->xres == var->xres && mode->yres == var->yres)
282 return mode;
283 }
284
285 return NULL;
286}
287
288static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb)
289{
290 struct jzfb *jzfb = fb->par;
291 struct fb_videomode *mode;
292
293 if (var->bits_per_pixel != jzfb_get_controller_bpp(jzfb) &&
294 var->bits_per_pixel != jzfb->pdata->bpp)
295 return -EINVAL;
296
297 mode = jzfb_get_mode(jzfb, var);
298 if (mode == NULL)
299 return -EINVAL;
300
301 fb_videomode_to_var(var, mode);
302
303 switch (jzfb->pdata->bpp) {
304 case 8:
305 break;
306 case 15:
307 var->red.offset = 10;
308 var->red.length = 5;
309 var->green.offset = 6;
310 var->green.length = 5;
311 var->blue.offset = 0;
312 var->blue.length = 5;
313 break;
314 case 16:
315 var->red.offset = 11;
316 var->red.length = 5;
317 var->green.offset = 5;
318 var->green.length = 6;
319 var->blue.offset = 0;
320 var->blue.length = 5;
321 break;
322 case 18:
323 var->red.offset = 16;
324 var->red.length = 6;
325 var->green.offset = 8;
326 var->green.length = 6;
327 var->blue.offset = 0;
328 var->blue.length = 6;
329 var->bits_per_pixel = 32;
330 break;
331 case 32:
332 case 24:
333 var->transp.offset = 24;
334 var->transp.length = 8;
335 var->red.offset = 16;
336 var->red.length = 8;
337 var->green.offset = 8;
338 var->green.length = 8;
339 var->blue.offset = 0;
340 var->blue.length = 8;
341 var->bits_per_pixel = 32;
342 break;
343 default:
344 break;
345 }
346
347 return 0;
348}
349
350static int jzfb_set_par(struct fb_info *info)
351{
352 struct jzfb *jzfb = info->par;
353 struct jz4740_fb_platform_data *pdata = jzfb->pdata;
354 struct fb_var_screeninfo *var = &info->var;
355 struct fb_videomode *mode;
356 uint16_t hds, vds;
357 uint16_t hde, vde;
358 uint16_t ht, vt;
359 uint32_t ctrl;
360 uint32_t cfg;
361 unsigned long rate;
362
363 mode = jzfb_get_mode(jzfb, var);
364 if (mode == NULL)
365 return -EINVAL;
366
367 if (mode == info->mode)
368 return 0;
369
370 info->mode = mode;
371
372 hds = mode->hsync_len + mode->left_margin;
373 hde = hds + mode->xres;
374 ht = hde + mode->right_margin;
375
376 vds = mode->vsync_len + mode->upper_margin;
377 vde = vds + mode->yres;
378 vt = vde + mode->lower_margin;
379
380 ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16;
381
382 switch (pdata->bpp) {
383 case 1:
384 ctrl |= JZ_LCD_CTRL_BPP_1;
385 break;
386 case 2:
387 ctrl |= JZ_LCD_CTRL_BPP_2;
388 break;
389 case 4:
390 ctrl |= JZ_LCD_CTRL_BPP_4;
391 break;
392 case 8:
393 ctrl |= JZ_LCD_CTRL_BPP_8;
394 break;
395 case 15:
396 ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */
397 case 16:
398 ctrl |= JZ_LCD_CTRL_BPP_15_16;
399 break;
400 case 18:
401 case 24:
402 case 32:
403 ctrl |= JZ_LCD_CTRL_BPP_18_24;
404 break;
405 default:
406 break;
407 }
408
409 cfg = pdata->lcd_type & 0xf;
410
411 if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
412 cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
413
414 if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
415 cfg |= JZ_LCD_CFG_VSYNC_ACTIVE_LOW;
416
417 if (pdata->pixclk_falling_edge)
418 cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE;
419
420 if (pdata->date_enable_active_low)
421 cfg |= JZ_LCD_CFG_DE_ACTIVE_LOW;
422
423 if (pdata->lcd_type == JZ_LCD_TYPE_GENERIC_18_BIT)
424 cfg |= JZ_LCD_CFG_18_BIT;
425
426 if (mode->pixclock) {
427 rate = PICOS2KHZ(mode->pixclock) * 1000;
428 mode->refresh = rate / vt / ht;
429 } else {
430 if (pdata->lcd_type == JZ_LCD_TYPE_8BIT_SERIAL)
431 rate = mode->refresh * (vt + 2 * mode->xres) * ht;
432 else
433 rate = mode->refresh * vt * ht;
434
435 mode->pixclock = KHZ2PICOS(rate / 1000);
436 }
437
438 mutex_lock(&jzfb->lock);
439 if (!jzfb->is_enabled)
440 clk_enable(jzfb->ldclk);
441 else
442 ctrl |= JZ_LCD_CTRL_ENABLE;
443
444 switch (pdata->lcd_type) {
445 case JZ_LCD_TYPE_SPECIAL_TFT_1:
446 case JZ_LCD_TYPE_SPECIAL_TFT_2:
447 case JZ_LCD_TYPE_SPECIAL_TFT_3:
448 writel(pdata->special_tft_config.spl, jzfb->base + JZ_REG_LCD_SPL);
449 writel(pdata->special_tft_config.cls, jzfb->base + JZ_REG_LCD_CLS);
450 writel(pdata->special_tft_config.ps, jzfb->base + JZ_REG_LCD_PS);
451 writel(pdata->special_tft_config.ps, jzfb->base + JZ_REG_LCD_REV);
452 break;
453 default:
454 cfg |= JZ_LCD_CFG_PS_DISABLE;
455 cfg |= JZ_LCD_CFG_CLS_DISABLE;
456 cfg |= JZ_LCD_CFG_SPL_DISABLE;
457 cfg |= JZ_LCD_CFG_REV_DISABLE;
458 break;
459 }
460
461 writel(mode->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC);
462 writel(mode->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC);
463
464 writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT);
465
466 writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH);
467 writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV);
468
469 writel(cfg, jzfb->base + JZ_REG_LCD_CFG);
470
471 writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
472
473 if (!jzfb->is_enabled)
474 clk_disable(jzfb->ldclk);
475
476 mutex_unlock(&jzfb->lock);
477
478 clk_set_rate(jzfb->lpclk, rate);
479 clk_set_rate(jzfb->ldclk, rate * 3);
480
481 return 0;
482}
483
484static void jzfb_enable(struct jzfb *jzfb)
485{
486 uint32_t ctrl;
487
488 clk_enable(jzfb->ldclk);
489
490 jz_gpio_bulk_resume(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
491 jz_gpio_bulk_resume(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
492
493 writel(0, jzfb->base + JZ_REG_LCD_STATE);
494
495 writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
496
497 ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
498 ctrl |= JZ_LCD_CTRL_ENABLE;
499 ctrl &= ~JZ_LCD_CTRL_DISABLE;
500 writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
501}
502
503static void jzfb_disable(struct jzfb *jzfb)
504{
505 uint32_t ctrl;
506
507 ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
508 ctrl |= JZ_LCD_CTRL_DISABLE;
509 writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
510 do {
511 ctrl = readl(jzfb->base + JZ_REG_LCD_STATE);
512 } while (!(ctrl & JZ_LCD_STATE_DISABLED));
513
514 jz_gpio_bulk_suspend(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
515 jz_gpio_bulk_suspend(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
516
517 clk_disable(jzfb->ldclk);
518}
519
520static int jzfb_blank(int blank_mode, struct fb_info *info)
521{
522 struct jzfb *jzfb = info->par;
523
524 switch (blank_mode) {
525 case FB_BLANK_UNBLANK:
526 mutex_lock(&jzfb->lock);
527 if (jzfb->is_enabled) {
528 mutex_unlock(&jzfb->lock);
529 return 0;
530 }
531
532 jzfb_enable(jzfb);
533 jzfb->is_enabled = 1;
534
535 mutex_unlock(&jzfb->lock);
536 break;
537 default:
538 mutex_lock(&jzfb->lock);
539 if (!jzfb->is_enabled) {
540 mutex_unlock(&jzfb->lock);
541 return 0;
542 }
543
544 jzfb_disable(jzfb);
545 jzfb->is_enabled = 0;
546
547 mutex_unlock(&jzfb->lock);
548 break;
549 }
550
551 return 0;
552}
553
554static int jzfb_alloc_devmem(struct jzfb *jzfb)
555{
556 int max_videosize = 0;
557 struct fb_videomode *mode = jzfb->pdata->modes;
558 void *page;
559 int i;
560
561 for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) {
562 if (max_videosize < mode->xres * mode->yres)
563 max_videosize = mode->xres * mode->yres;
564 }
565
566 max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3;
567
568 jzfb->framedesc = dma_alloc_coherent(&jzfb->pdev->dev,
569 sizeof(*jzfb->framedesc),
570 &jzfb->framedesc_phys, GFP_KERNEL);
571
572 if (!jzfb->framedesc)
573 return -ENOMEM;
574
575 jzfb->vidmem_size = PAGE_ALIGN(max_videosize);
576 jzfb->vidmem = dma_alloc_coherent(&jzfb->pdev->dev,
577 jzfb->vidmem_size,
578 &jzfb->vidmem_phys, GFP_KERNEL);
579
580 if (!jzfb->vidmem)
581 goto err_free_framedesc;
582
583 for (page = jzfb->vidmem;
584 page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size);
585 page += PAGE_SIZE) {
586 SetPageReserved(virt_to_page(page));
587 }
588
589 jzfb->framedesc->next = jzfb->framedesc_phys;
590 jzfb->framedesc->addr = jzfb->vidmem_phys;
591 jzfb->framedesc->id = 0xdeafbead;
592 jzfb->framedesc->cmd = 0;
593 jzfb->framedesc->cmd |= max_videosize / 4;
594
595 return 0;
596
597err_free_framedesc:
598 dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
599 jzfb->framedesc, jzfb->framedesc_phys);
600 return -ENOMEM;
601}
602
603static void jzfb_free_devmem(struct jzfb *jzfb)
604{
605 dma_free_coherent(&jzfb->pdev->dev, jzfb->vidmem_size,
606 jzfb->vidmem, jzfb->vidmem_phys);
607 dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
608 jzfb->framedesc, jzfb->framedesc_phys);
609}
610
611static struct fb_ops jzfb_ops = {
612 .owner = THIS_MODULE,
613 .fb_check_var = jzfb_check_var,
614 .fb_set_par = jzfb_set_par,
615 .fb_blank = jzfb_blank,
616 .fb_fillrect = sys_fillrect,
617 .fb_copyarea = sys_copyarea,
618 .fb_imageblit = sys_imageblit,
619 .fb_setcolreg = jzfb_setcolreg,
620};
621
622static int __devinit jzfb_probe(struct platform_device *pdev)
623{
624 int ret;
625 struct jzfb *jzfb;
626 struct fb_info *fb;
627 struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data;
628 struct resource *mem;
629
630 if (!pdata) {
631 dev_err(&pdev->dev, "Missing platform data\n");
632 return -ENXIO;
633 }
634
635 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
636 if (!mem) {
637 dev_err(&pdev->dev, "Failed to get register memory resource\n");
638 return -ENXIO;
639 }
640
641 mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
642 if (!mem) {
643 dev_err(&pdev->dev, "Failed to request register memory region\n");
644 return -EBUSY;
645 }
646
647 fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev);
648 if (!fb) {
649 dev_err(&pdev->dev, "Failed to allocate framebuffer device\n");
650 ret = -ENOMEM;
651 goto err_release_mem_region;
652 }
653
654 fb->fbops = &jzfb_ops;
655 fb->flags = FBINFO_DEFAULT;
656
657 jzfb = fb->par;
658 jzfb->pdev = pdev;
659 jzfb->pdata = pdata;
660 jzfb->mem = mem;
661
662 jzfb->ldclk = clk_get(&pdev->dev, "lcd");
663 if (IS_ERR(jzfb->ldclk)) {
664 ret = PTR_ERR(jzfb->ldclk);
665 dev_err(&pdev->dev, "Failed to get lcd clock: %d\n", ret);
666 goto err_framebuffer_release;
667 }
668
669 jzfb->lpclk = clk_get(&pdev->dev, "lcd_pclk");
670 if (IS_ERR(jzfb->lpclk)) {
671 ret = PTR_ERR(jzfb->lpclk);
672 dev_err(&pdev->dev, "Failed to get lcd pixel clock: %d\n", ret);
673 goto err_put_ldclk;
674 }
675
676 jzfb->base = ioremap(mem->start, resource_size(mem));
677 if (!jzfb->base) {
678 dev_err(&pdev->dev, "Failed to ioremap register memory region\n");
679 ret = -EBUSY;
680 goto err_put_lpclk;
681 }
682
683 platform_set_drvdata(pdev, jzfb);
684
685 mutex_init(&jzfb->lock);
686
687 fb_videomode_to_modelist(pdata->modes, pdata->num_modes,
688 &fb->modelist);
689 fb_videomode_to_var(&fb->var, pdata->modes);
690 fb->var.bits_per_pixel = pdata->bpp;
691 jzfb_check_var(&fb->var, fb);
692
693 ret = jzfb_alloc_devmem(jzfb);
694 if (ret) {
695 dev_err(&pdev->dev, "Failed to allocate video memory\n");
696 goto err_iounmap;
697 }
698
699 fb->fix = jzfb_fix;
700 fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8;
701 fb->fix.mmio_start = mem->start;
702 fb->fix.mmio_len = resource_size(mem);
703 fb->fix.smem_start = jzfb->vidmem_phys;
704 fb->fix.smem_len = fb->fix.line_length * fb->var.yres;
705 fb->screen_base = jzfb->vidmem;
706 fb->pseudo_palette = jzfb->pseudo_palette;
707
708 fb_alloc_cmap(&fb->cmap, 256, 0);
709
710 clk_enable(jzfb->ldclk);
711 jzfb->is_enabled = 1;
712
713 writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
714
715 fb->mode = NULL;
716 jzfb_set_par(fb);
717
718 jz_gpio_bulk_request(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
719 jz_gpio_bulk_request(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
720
721 ret = register_framebuffer(fb);
722 if (ret) {
723 dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret);
724 goto err_free_devmem;
725 }
726
727 jzfb->fb = fb;
728
729 return 0;
730
731err_free_devmem:
732 jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
733 jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
734
735 fb_dealloc_cmap(&fb->cmap);
736 jzfb_free_devmem(jzfb);
737err_iounmap:
738 iounmap(jzfb->base);
739err_put_lpclk:
740 clk_put(jzfb->lpclk);
741err_put_ldclk:
742 clk_put(jzfb->ldclk);
743err_framebuffer_release:
744 framebuffer_release(fb);
745err_release_mem_region:
746 release_mem_region(mem->start, resource_size(mem));
747 return ret;
748}
749
750static int __devexit jzfb_remove(struct platform_device *pdev)
751{
752 struct jzfb *jzfb = platform_get_drvdata(pdev);
753
754 jzfb_blank(FB_BLANK_POWERDOWN, jzfb->fb);
755
756 jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
757 jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
758
759 iounmap(jzfb->base);
760 release_mem_region(jzfb->mem->start, resource_size(jzfb->mem));
761
762 fb_dealloc_cmap(&jzfb->fb->cmap);
763 jzfb_free_devmem(jzfb);
764
765 platform_set_drvdata(pdev, NULL);
766
767 clk_put(jzfb->lpclk);
768 clk_put(jzfb->ldclk);
769
770 framebuffer_release(jzfb->fb);
771
772 return 0;
773}
774
775#ifdef CONFIG_PM
776
777static int jzfb_suspend(struct device *dev)
778{
779 struct jzfb *jzfb = dev_get_drvdata(dev);
780
781 acquire_console_sem();
782 fb_set_suspend(jzfb->fb, 1);
783 release_console_sem();
784
785 mutex_lock(&jzfb->lock);
786 if (jzfb->is_enabled)
787 jzfb_disable(jzfb);
788 mutex_unlock(&jzfb->lock);
789
790 return 0;
791}
792
793static int jzfb_resume(struct device *dev)
794{
795 struct jzfb *jzfb = dev_get_drvdata(dev);
796 clk_enable(jzfb->ldclk);
797
798 mutex_lock(&jzfb->lock);
799 if (jzfb->is_enabled)
800 jzfb_enable(jzfb);
801 mutex_unlock(&jzfb->lock);
802
803 acquire_console_sem();
804 fb_set_suspend(jzfb->fb, 0);
805 release_console_sem();
806
807 return 0;
808}
809
810static const struct dev_pm_ops jzfb_pm_ops = {
811 .suspend = jzfb_suspend,
812 .resume = jzfb_resume,
813 .poweroff = jzfb_suspend,
814 .restore = jzfb_resume,
815};
816
817#define JZFB_PM_OPS (&jzfb_pm_ops)
818
819#else
820#define JZFB_PM_OPS NULL
821#endif
822
823static struct platform_driver jzfb_driver = {
824 .probe = jzfb_probe,
825 .remove = __devexit_p(jzfb_remove),
826 .driver = {
827 .name = "jz4740-fb",
828 .pm = JZFB_PM_OPS,
829 },
830};
831
832static int __init jzfb_init(void)
833{
834 return platform_driver_register(&jzfb_driver);
835}
836module_init(jzfb_init);
837
838static void __exit jzfb_exit(void)
839{
840 platform_driver_unregister(&jzfb_driver);
841}
842module_exit(jzfb_exit);
843
844MODULE_LICENSE("GPL");
845MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
846MODULE_DESCRIPTION("JZ4740 SoC LCD framebuffer driver");
847MODULE_ALIAS("platform:jz4740-fb");
diff --git a/drivers/video/leo.c b/drivers/video/leo.c
index 9e8bf7d5e249..ad677637ffbb 100644
--- a/drivers/video/leo.c
+++ b/drivers/video/leo.c
@@ -677,12 +677,12 @@ static int __init leo_init(void)
677 if (fb_get_options("leofb", NULL)) 677 if (fb_get_options("leofb", NULL))
678 return -ENODEV; 678 return -ENODEV;
679 679
680 return of_register_driver(&leo_driver, &of_bus_type); 680 return of_register_platform_driver(&leo_driver);
681} 681}
682 682
683static void __exit leo_exit(void) 683static void __exit leo_exit(void)
684{ 684{
685 of_unregister_driver(&leo_driver); 685 of_unregister_platform_driver(&leo_driver);
686} 686}
687 687
688module_init(leo_init); 688module_init(leo_init);
diff --git a/drivers/video/offb.c b/drivers/video/offb.c
index 46dda7d8aaee..cb163a5397be 100644
--- a/drivers/video/offb.c
+++ b/drivers/video/offb.c
@@ -19,13 +19,14 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20#include <linux/vmalloc.h> 20#include <linux/vmalloc.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
22#include <linux/interrupt.h> 24#include <linux/interrupt.h>
23#include <linux/fb.h> 25#include <linux/fb.h>
24#include <linux/init.h> 26#include <linux/init.h>
25#include <linux/ioport.h> 27#include <linux/ioport.h>
26#include <linux/pci.h> 28#include <linux/pci.h>
27#include <asm/io.h> 29#include <asm/io.h>
28#include <asm/prom.h>
29 30
30#ifdef CONFIG_PPC64 31#ifdef CONFIG_PPC64
31#include <asm/pci-bridge.h> 32#include <asm/pci-bridge.h>
diff --git a/drivers/video/omap2/displays/panel-acx565akm.c b/drivers/video/omap2/displays/panel-acx565akm.c
index 1f8eb70e2937..07fbb8a733bb 100644
--- a/drivers/video/omap2/displays/panel-acx565akm.c
+++ b/drivers/video/omap2/displays/panel-acx565akm.c
@@ -592,7 +592,7 @@ static int acx_panel_power_on(struct omap_dss_device *dssdev)
592 r = omapdss_sdi_display_enable(dssdev); 592 r = omapdss_sdi_display_enable(dssdev);
593 if (r) { 593 if (r) {
594 pr_err("%s sdi enable failed\n", __func__); 594 pr_err("%s sdi enable failed\n", __func__);
595 return r; 595 goto fail_unlock;
596 } 596 }
597 597
598 /*FIXME tweak me */ 598 /*FIXME tweak me */
@@ -633,6 +633,8 @@ static int acx_panel_power_on(struct omap_dss_device *dssdev)
633 return acx565akm_bl_update_status(md->bl_dev); 633 return acx565akm_bl_update_status(md->bl_dev);
634fail: 634fail:
635 omapdss_sdi_display_disable(dssdev); 635 omapdss_sdi_display_disable(dssdev);
636fail_unlock:
637 mutex_unlock(&md->mutex);
636 return r; 638 return r;
637} 639}
638 640
diff --git a/drivers/video/omap2/vram.c b/drivers/video/omap2/vram.c
index 3b1237ad85ed..f6fdc2085f3e 100644
--- a/drivers/video/omap2/vram.c
+++ b/drivers/video/omap2/vram.c
@@ -25,7 +25,7 @@
25#include <linux/list.h> 25#include <linux/list.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/seq_file.h> 27#include <linux/seq_file.h>
28#include <linux/bootmem.h> 28#include <linux/memblock.h>
29#include <linux/completion.h> 29#include <linux/completion.h>
30#include <linux/debugfs.h> 30#include <linux/debugfs.h>
31#include <linux/jiffies.h> 31#include <linux/jiffies.h>
@@ -525,10 +525,8 @@ early_param("vram", omap_vram_early_vram);
525 * Called from map_io. We need to call to this early enough so that we 525 * Called from map_io. We need to call to this early enough so that we
526 * can reserve the fixed SDRAM regions before VM could get hold of them. 526 * can reserve the fixed SDRAM regions before VM could get hold of them.
527 */ 527 */
528void __init omap_vram_reserve_sdram(void) 528void __init omap_vram_reserve_sdram_memblock(void)
529{ 529{
530 struct bootmem_data *bdata;
531 unsigned long sdram_start, sdram_size;
532 u32 paddr; 530 u32 paddr;
533 u32 size = 0; 531 u32 size = 0;
534 532
@@ -555,29 +553,28 @@ void __init omap_vram_reserve_sdram(void)
555 553
556 size = PAGE_ALIGN(size); 554 size = PAGE_ALIGN(size);
557 555
558 bdata = NODE_DATA(0)->bdata;
559 sdram_start = bdata->node_min_pfn << PAGE_SHIFT;
560 sdram_size = (bdata->node_low_pfn << PAGE_SHIFT) - sdram_start;
561
562 if (paddr) { 556 if (paddr) {
563 if ((paddr & ~PAGE_MASK) || paddr < sdram_start || 557 struct memblock_property res;
564 paddr + size > sdram_start + sdram_size) { 558
559 res.base = paddr;
560 res.size = size;
561 if ((paddr & ~PAGE_MASK) || memblock_find(&res) ||
562 res.base != paddr || res.size != size) {
565 pr_err("Illegal SDRAM region for VRAM\n"); 563 pr_err("Illegal SDRAM region for VRAM\n");
566 return; 564 return;
567 } 565 }
568 566
569 if (reserve_bootmem(paddr, size, BOOTMEM_EXCLUSIVE) < 0) { 567 if (memblock_is_region_reserved(paddr, size)) {
570 pr_err("FB: failed to reserve VRAM\n"); 568 pr_err("FB: failed to reserve VRAM - busy\n");
571 return; 569 return;
572 } 570 }
573 } else { 571
574 if (size > sdram_size) { 572 if (memblock_reserve(paddr, size) < 0) {
575 pr_err("Illegal SDRAM size for VRAM\n"); 573 pr_err("FB: failed to reserve VRAM - no memory\n");
576 return; 574 return;
577 } 575 }
578 576 } else {
579 paddr = virt_to_phys(alloc_bootmem_pages(size)); 577 paddr = memblock_alloc_base(size, PAGE_SIZE, MEMBLOCK_REAL_LIMIT);
580 BUG_ON(paddr & ~PAGE_MASK);
581 } 578 }
582 579
583 omap_vram_add_region(paddr, size); 580 omap_vram_add_region(paddr, size);
diff --git a/drivers/video/p9100.c b/drivers/video/p9100.c
index 6552751e81aa..688b055abab2 100644
--- a/drivers/video/p9100.c
+++ b/drivers/video/p9100.c
@@ -367,12 +367,12 @@ static int __init p9100_init(void)
367 if (fb_get_options("p9100fb", NULL)) 367 if (fb_get_options("p9100fb", NULL))
368 return -ENODEV; 368 return -ENODEV;
369 369
370 return of_register_driver(&p9100_driver, &of_bus_type); 370 return of_register_platform_driver(&p9100_driver);
371} 371}
372 372
373static void __exit p9100_exit(void) 373static void __exit p9100_exit(void)
374{ 374{
375 of_unregister_driver(&p9100_driver); 375 of_unregister_platform_driver(&p9100_driver);
376} 376}
377 377
378module_init(p9100_init); 378module_init(p9100_init);
diff --git a/drivers/video/sunxvr1000.c b/drivers/video/sunxvr1000.c
index 489b44e8db81..7288934c0d49 100644
--- a/drivers/video/sunxvr1000.c
+++ b/drivers/video/sunxvr1000.c
@@ -213,12 +213,12 @@ static int __init gfb_init(void)
213 if (fb_get_options("gfb", NULL)) 213 if (fb_get_options("gfb", NULL))
214 return -ENODEV; 214 return -ENODEV;
215 215
216 return of_register_driver(&gfb_driver, &of_bus_type); 216 return of_register_platform_driver(&gfb_driver);
217} 217}
218 218
219static void __exit gfb_exit(void) 219static void __exit gfb_exit(void)
220{ 220{
221 of_unregister_driver(&gfb_driver); 221 of_unregister_platform_driver(&gfb_driver);
222} 222}
223 223
224module_init(gfb_init); 224module_init(gfb_init);
diff --git a/drivers/video/tcx.c b/drivers/video/tcx.c
index cc039b33d2d8..f375e0db6776 100644
--- a/drivers/video/tcx.c
+++ b/drivers/video/tcx.c
@@ -526,12 +526,12 @@ static int __init tcx_init(void)
526 if (fb_get_options("tcxfb", NULL)) 526 if (fb_get_options("tcxfb", NULL))
527 return -ENODEV; 527 return -ENODEV;
528 528
529 return of_register_driver(&tcx_driver, &of_bus_type); 529 return of_register_platform_driver(&tcx_driver);
530} 530}
531 531
532static void __exit tcx_exit(void) 532static void __exit tcx_exit(void)
533{ 533{
534 of_unregister_driver(&tcx_driver); 534 of_unregister_platform_driver(&tcx_driver);
535} 535}
536 536
537module_init(tcx_init); 537module_init(tcx_init);
diff --git a/drivers/video/tdfxfb.c b/drivers/video/tdfxfb.c
index 980548390048..3ee5e63cfa4f 100644
--- a/drivers/video/tdfxfb.c
+++ b/drivers/video/tdfxfb.c
@@ -1571,8 +1571,8 @@ out_err_iobase:
1571 if (default_par->mtrr_handle >= 0) 1571 if (default_par->mtrr_handle >= 0)
1572 mtrr_del(default_par->mtrr_handle, info->fix.smem_start, 1572 mtrr_del(default_par->mtrr_handle, info->fix.smem_start,
1573 info->fix.smem_len); 1573 info->fix.smem_len);
1574 release_mem_region(pci_resource_start(pdev, 2), 1574 release_region(pci_resource_start(pdev, 2),
1575 pci_resource_len(pdev, 2)); 1575 pci_resource_len(pdev, 2));
1576out_err_screenbase: 1576out_err_screenbase:
1577 if (info->screen_base) 1577 if (info->screen_base)
1578 iounmap(info->screen_base); 1578 iounmap(info->screen_base);
diff --git a/drivers/video/tgafb.c b/drivers/video/tgafb.c
index 1b3b1c718e80..aba7686b1a32 100644
--- a/drivers/video/tgafb.c
+++ b/drivers/video/tgafb.c
@@ -305,7 +305,7 @@ tgafb_set_par(struct fb_info *info)
305 TGA_WRITE_REG(par, htimings, TGA_HORIZ_REG); 305 TGA_WRITE_REG(par, htimings, TGA_HORIZ_REG);
306 TGA_WRITE_REG(par, vtimings, TGA_VERT_REG); 306 TGA_WRITE_REG(par, vtimings, TGA_VERT_REG);
307 307
308 /* Initalise RAMDAC. */ 308 /* Initialise RAMDAC. */
309 if (tga_type == TGA_TYPE_8PLANE && tga_bus_pci) { 309 if (tga_type == TGA_TYPE_8PLANE && tga_bus_pci) {
310 310
311 /* Init BT485 RAMDAC registers. */ 311 /* Init BT485 RAMDAC registers. */
diff --git a/drivers/video/xen-fbfront.c b/drivers/video/xen-fbfront.c
index fa97d3e7c21a..7c7f42a12796 100644
--- a/drivers/video/xen-fbfront.c
+++ b/drivers/video/xen-fbfront.c
@@ -684,7 +684,7 @@ static struct xenbus_driver xenfb_driver = {
684 684
685static int __init xenfb_init(void) 685static int __init xenfb_init(void)
686{ 686{
687 if (!xen_domain()) 687 if (!xen_pv_domain())
688 return -ENODEV; 688 return -ENODEV;
689 689
690 /* Nothing to do if running in dom0. */ 690 /* Nothing to do if running in dom0. */
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
index 574dc54e12d4..29b5daacc217 100644
--- a/drivers/video/xilinxfb.c
+++ b/drivers/video/xilinxfb.c
@@ -485,6 +485,8 @@ static int __devexit xilinxfb_of_remove(struct of_device *op)
485/* Match table for of_platform binding */ 485/* Match table for of_platform binding */
486static struct of_device_id xilinxfb_of_match[] __devinitdata = { 486static struct of_device_id xilinxfb_of_match[] __devinitdata = {
487 { .compatible = "xlnx,xps-tft-1.00.a", }, 487 { .compatible = "xlnx,xps-tft-1.00.a", },
488 { .compatible = "xlnx,xps-tft-2.00.a", },
489 { .compatible = "xlnx,xps-tft-2.01.a", },
488 { .compatible = "xlnx,plb-tft-cntlr-ref-1.00.a", }, 490 { .compatible = "xlnx,plb-tft-cntlr-ref-1.00.a", },
489 { .compatible = "xlnx,plb-dvi-cntlr-ref-1.00.c", }, 491 { .compatible = "xlnx,plb-dvi-cntlr-ref-1.00.c", },
490 {}, 492 {},
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-07 15:09:10 -0500