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-rw-r--r--drivers/video/nvidia/nv_hw.c4
-rw-r--r--drivers/video/nvidia/nv_setup.c4
-rw-r--r--drivers/video/riva/nv_driver.c2
-rw-r--r--drivers/video/riva/riva_hw.c4
4 files changed, 7 insertions, 7 deletions
diff --git a/drivers/video/nvidia/nv_hw.c b/drivers/video/nvidia/nv_hw.c
index d1a10549f543..ed20a9871b33 100644
--- a/drivers/video/nvidia/nv_hw.c
+++ b/drivers/video/nvidia/nv_hw.c
@@ -129,7 +129,7 @@ typedef struct {
129 int nvclk_khz; 129 int nvclk_khz;
130 char mem_page_miss; 130 char mem_page_miss;
131 char mem_latency; 131 char mem_latency;
132 int memory_type; 132 u32 memory_type;
133 int memory_width; 133 int memory_width;
134 char enable_video; 134 char enable_video;
135 char gr_during_vid; 135 char gr_during_vid;
@@ -719,7 +719,7 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
719 memctrl >>= 16; 719 memctrl >>= 16;
720 720
721 if ((memctrl == 0x1A9) || (memctrl == 0x1AB) || (memctrl == 0x1ED)) { 721 if ((memctrl == 0x1A9) || (memctrl == 0x1AB) || (memctrl == 0x1ED)) {
722 int dimm[3]; 722 u32 dimm[3];
723 723
724 dev = pci_get_bus_and_slot(0, 2); 724 dev = pci_get_bus_and_slot(0, 2);
725 pci_read_config_dword(dev, 0x40, &dimm[0]); 725 pci_read_config_dword(dev, 0x40, &dimm[0]);
diff --git a/drivers/video/nvidia/nv_setup.c b/drivers/video/nvidia/nv_setup.c
index 82579d3a9970..d9627b57eb4d 100644
--- a/drivers/video/nvidia/nv_setup.c
+++ b/drivers/video/nvidia/nv_setup.c
@@ -265,12 +265,12 @@ static void nv10GetConfig(struct nvidia_par *par)
265 265
266 dev = pci_get_bus_and_slot(0, 1); 266 dev = pci_get_bus_and_slot(0, 1);
267 if ((par->Chipset & 0xffff) == 0x01a0) { 267 if ((par->Chipset & 0xffff) == 0x01a0) {
268 int amt = 0; 268 u32 amt;
269 269
270 pci_read_config_dword(dev, 0x7c, &amt); 270 pci_read_config_dword(dev, 0x7c, &amt);
271 par->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024; 271 par->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024;
272 } else if ((par->Chipset & 0xffff) == 0x01f0) { 272 } else if ((par->Chipset & 0xffff) == 0x01f0) {
273 int amt = 0; 273 u32 amt;
274 274
275 pci_read_config_dword(dev, 0x84, &amt); 275 pci_read_config_dword(dev, 0x84, &amt);
276 par->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024; 276 par->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024;
diff --git a/drivers/video/riva/nv_driver.c b/drivers/video/riva/nv_driver.c
index a1181149da74..f3694cf17e58 100644
--- a/drivers/video/riva/nv_driver.c
+++ b/drivers/video/riva/nv_driver.c
@@ -158,7 +158,7 @@ unsigned long riva_get_memlen(struct riva_par *par)
158 unsigned long memlen = 0; 158 unsigned long memlen = 0;
159 unsigned int chipset = par->Chipset; 159 unsigned int chipset = par->Chipset;
160 struct pci_dev* dev; 160 struct pci_dev* dev;
161 int amt; 161 u32 amt;
162 162
163 switch (chip->Architecture) { 163 switch (chip->Architecture) {
164 case NV_ARCH_03: 164 case NV_ARCH_03:
diff --git a/drivers/video/riva/riva_hw.c b/drivers/video/riva/riva_hw.c
index 13307703a9f0..78fdbf5178d7 100644
--- a/drivers/video/riva/riva_hw.c
+++ b/drivers/video/riva/riva_hw.c
@@ -231,7 +231,7 @@ typedef struct {
231 int nvclk_khz; 231 int nvclk_khz;
232 char mem_page_miss; 232 char mem_page_miss;
233 char mem_latency; 233 char mem_latency;
234 int memory_type; 234 u32 memory_type;
235 int memory_width; 235 int memory_width;
236 char enable_video; 236 char enable_video;
237 char gr_during_vid; 237 char gr_during_vid;
@@ -2107,7 +2107,7 @@ static void nv10GetConfig
2107) 2107)
2108{ 2108{
2109 struct pci_dev* dev; 2109 struct pci_dev* dev;
2110 int amt; 2110 u32 amt;
2111 2111
2112#ifdef __BIG_ENDIAN 2112#ifdef __BIG_ENDIAN
2113 /* turn on big endian register access */ 2113 /* turn on big endian register access */