diff options
Diffstat (limited to 'drivers/video/via')
-rw-r--r-- | drivers/video/via/dvi.c | 25 | ||||
-rw-r--r-- | drivers/video/via/hw.c | 132 | ||||
-rw-r--r-- | drivers/video/via/hw.h | 9 | ||||
-rw-r--r-- | drivers/video/via/lcd.c | 10 | ||||
-rw-r--r-- | drivers/video/via/viafbdev.c | 16 | ||||
-rw-r--r-- | drivers/video/via/vt1636.c | 56 |
6 files changed, 137 insertions, 111 deletions
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c index 7c82f6fda918..84e21b39dd0b 100644 --- a/drivers/video/via/dvi.c +++ b/drivers/video/via/dvi.c | |||
@@ -470,26 +470,6 @@ static void __devinit dvi_get_panel_size_from_DDCv2( | |||
470 | void viafb_dvi_disable(void) | 470 | void viafb_dvi_disable(void) |
471 | { | 471 | { |
472 | if (viaparinfo->chip_info-> | 472 | if (viaparinfo->chip_info-> |
473 | tmds_chip_info.output_interface == INTERFACE_DVP0) | ||
474 | viafb_write_reg(SR1E, VIASR, | ||
475 | viafb_read_reg(VIASR, SR1E) & (~0xC0)); | ||
476 | |||
477 | if (viaparinfo->chip_info-> | ||
478 | tmds_chip_info.output_interface == INTERFACE_DVP1) | ||
479 | viafb_write_reg(SR1E, VIASR, | ||
480 | viafb_read_reg(VIASR, SR1E) & (~0x30)); | ||
481 | |||
482 | if (viaparinfo->chip_info-> | ||
483 | tmds_chip_info.output_interface == INTERFACE_DFP_HIGH) | ||
484 | viafb_write_reg(SR2A, VIASR, | ||
485 | viafb_read_reg(VIASR, SR2A) & (~0x0C)); | ||
486 | |||
487 | if (viaparinfo->chip_info-> | ||
488 | tmds_chip_info.output_interface == INTERFACE_DFP_LOW) | ||
489 | viafb_write_reg(SR2A, VIASR, | ||
490 | viafb_read_reg(VIASR, SR2A) & (~0x03)); | ||
491 | |||
492 | if (viaparinfo->chip_info-> | ||
493 | tmds_chip_info.output_interface == INTERFACE_TMDS) | 473 | tmds_chip_info.output_interface == INTERFACE_TMDS) |
494 | /* Turn off TMDS power. */ | 474 | /* Turn off TMDS power. */ |
495 | viafb_write_reg(CRD2, VIACR, | 475 | viafb_write_reg(CRD2, VIACR, |
@@ -571,7 +551,6 @@ void viafb_dvi_enable(void) | |||
571 | case INTERFACE_DVP0: | 551 | case INTERFACE_DVP0: |
572 | viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0); | 552 | viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0); |
573 | viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5); | 553 | viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5); |
574 | viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6); | ||
575 | dvi_patch_skew_dvp0(); | 554 | dvi_patch_skew_dvp0(); |
576 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) | 555 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) |
577 | tmds_register_write(0x88, 0x3b); | 556 | tmds_register_write(0x88, 0x3b); |
@@ -585,7 +564,6 @@ void viafb_dvi_enable(void) | |||
585 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) | 564 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) |
586 | viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5); | 565 | viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5); |
587 | 566 | ||
588 | viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5); | ||
589 | /*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */ | 567 | /*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */ |
590 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) | 568 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) |
591 | tmds_register_write(0x88, 0x3b); | 569 | tmds_register_write(0x88, 0x3b); |
@@ -616,14 +594,13 @@ void viafb_dvi_enable(void) | |||
616 | if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) | 594 | if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) |
617 | via_write_reg_mask(VIACR, CR97, 0x03, 0x03); | 595 | via_write_reg_mask(VIACR, CR97, 0x03, 0x03); |
618 | 596 | ||
619 | viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3); | ||
620 | via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); | 597 | via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); |
621 | break; | 598 | break; |
622 | 599 | ||
623 | case INTERFACE_DFP_LOW: | 600 | case INTERFACE_DFP_LOW: |
624 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) | 601 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) |
625 | break; | 602 | break; |
626 | viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); | 603 | |
627 | dvi_patch_skew_dvp_low(); | 604 | dvi_patch_skew_dvp_low(); |
628 | via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); | 605 | via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); |
629 | break; | 606 | break; |
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index e65edcea46eb..132d811525ed 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c | |||
@@ -1036,6 +1036,121 @@ void via_set_source(u32 devices, u8 iga) | |||
1036 | set_lvds2_source(iga); | 1036 | set_lvds2_source(iga); |
1037 | } | 1037 | } |
1038 | 1038 | ||
1039 | static void set_crt_state(u8 state) | ||
1040 | { | ||
1041 | u8 value; | ||
1042 | |||
1043 | switch (state) { | ||
1044 | case VIA_STATE_ON: | ||
1045 | value = 0x00; | ||
1046 | break; | ||
1047 | case VIA_STATE_STANDBY: | ||
1048 | value = 0x10; | ||
1049 | break; | ||
1050 | case VIA_STATE_SUSPEND: | ||
1051 | value = 0x20; | ||
1052 | break; | ||
1053 | case VIA_STATE_OFF: | ||
1054 | value = 0x30; | ||
1055 | break; | ||
1056 | default: | ||
1057 | return; | ||
1058 | } | ||
1059 | |||
1060 | via_write_reg_mask(VIACR, 0x36, value, 0x30); | ||
1061 | } | ||
1062 | |||
1063 | static void set_96_state(u8 state) | ||
1064 | { | ||
1065 | u8 value; | ||
1066 | |||
1067 | switch (state) { | ||
1068 | case VIA_STATE_ON: | ||
1069 | value = 0xC0; | ||
1070 | break; | ||
1071 | case VIA_STATE_OFF: | ||
1072 | value = 0x00; | ||
1073 | break; | ||
1074 | default: | ||
1075 | return; | ||
1076 | } | ||
1077 | |||
1078 | via_write_reg_mask(VIASR, 0x1E, value, 0xC0); | ||
1079 | } | ||
1080 | |||
1081 | static void set_dvp1_state(u8 state) | ||
1082 | { | ||
1083 | u8 value; | ||
1084 | |||
1085 | switch (state) { | ||
1086 | case VIA_STATE_ON: | ||
1087 | value = 0x30; | ||
1088 | break; | ||
1089 | case VIA_STATE_OFF: | ||
1090 | value = 0x00; | ||
1091 | break; | ||
1092 | default: | ||
1093 | return; | ||
1094 | } | ||
1095 | |||
1096 | via_write_reg_mask(VIASR, 0x1E, value, 0x30); | ||
1097 | } | ||
1098 | |||
1099 | static void set_lvds1_state(u8 state) | ||
1100 | { | ||
1101 | u8 value; | ||
1102 | |||
1103 | switch (state) { | ||
1104 | case VIA_STATE_ON: | ||
1105 | value = 0x03; | ||
1106 | break; | ||
1107 | case VIA_STATE_OFF: | ||
1108 | value = 0x00; | ||
1109 | break; | ||
1110 | default: | ||
1111 | return; | ||
1112 | } | ||
1113 | |||
1114 | via_write_reg_mask(VIASR, 0x2A, value, 0x03); | ||
1115 | } | ||
1116 | |||
1117 | static void set_lvds2_state(u8 state) | ||
1118 | { | ||
1119 | u8 value; | ||
1120 | |||
1121 | switch (state) { | ||
1122 | case VIA_STATE_ON: | ||
1123 | value = 0x0C; | ||
1124 | break; | ||
1125 | case VIA_STATE_OFF: | ||
1126 | value = 0x00; | ||
1127 | break; | ||
1128 | default: | ||
1129 | return; | ||
1130 | } | ||
1131 | |||
1132 | via_write_reg_mask(VIASR, 0x2A, value, 0x0C); | ||
1133 | } | ||
1134 | |||
1135 | void via_set_state(u32 devices, u8 state) | ||
1136 | { | ||
1137 | /* | ||
1138 | TODO: Can we enable/disable these devices? How? | ||
1139 | if (devices & VIA_6C) | ||
1140 | if (devices & VIA_93) | ||
1141 | */ | ||
1142 | if (devices & VIA_96) | ||
1143 | set_96_state(state); | ||
1144 | if (devices & VIA_CRT) | ||
1145 | set_crt_state(state); | ||
1146 | if (devices & VIA_DVP1) | ||
1147 | set_dvp1_state(state); | ||
1148 | if (devices & VIA_LVDS1) | ||
1149 | set_lvds1_state(state); | ||
1150 | if (devices & VIA_LVDS2) | ||
1151 | set_lvds2_state(state); | ||
1152 | } | ||
1153 | |||
1039 | u32 via_parse_odev(char *input, char **end) | 1154 | u32 via_parse_odev(char *input, char **end) |
1040 | { | 1155 | { |
1041 | char *ptr = input; | 1156 | char *ptr = input; |
@@ -2224,6 +2339,8 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, | |||
2224 | { | 2339 | { |
2225 | int i, j; | 2340 | int i, j; |
2226 | int port; | 2341 | int port; |
2342 | u32 devices = viaparinfo->shared->iga1_devices | ||
2343 | | viaparinfo->shared->iga2_devices; | ||
2227 | u8 value, index, mask; | 2344 | u8 value, index, mask; |
2228 | struct crt_mode_table *crt_timing; | 2345 | struct crt_mode_table *crt_timing; |
2229 | struct crt_mode_table *crt_timing1 = NULL; | 2346 | struct crt_mode_table *crt_timing1 = NULL; |
@@ -2271,6 +2388,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, | |||
2271 | } | 2388 | } |
2272 | 2389 | ||
2273 | device_off(); | 2390 | device_off(); |
2391 | via_set_state(devices, VIA_STATE_OFF); | ||
2274 | 2392 | ||
2275 | /* Fill VPIT Parameters */ | 2393 | /* Fill VPIT Parameters */ |
2276 | /* Write Misc Register */ | 2394 | /* Write Misc Register */ |
@@ -2430,6 +2548,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, | |||
2430 | viafb_DeviceStatus = CRT_Device; | 2548 | viafb_DeviceStatus = CRT_Device; |
2431 | } | 2549 | } |
2432 | device_on(); | 2550 | device_on(); |
2551 | via_set_state(devices, VIA_STATE_ON); | ||
2433 | device_screen_on(); | 2552 | device_screen_on(); |
2434 | return 1; | 2553 | return 1; |
2435 | } | 2554 | } |
@@ -2470,31 +2589,18 @@ int viafb_get_refresh(int hres, int vres, u32 long_refresh) | |||
2470 | 2589 | ||
2471 | static void device_off(void) | 2590 | static void device_off(void) |
2472 | { | 2591 | { |
2473 | viafb_crt_disable(); | ||
2474 | viafb_dvi_disable(); | 2592 | viafb_dvi_disable(); |
2475 | viafb_lcd_disable(); | 2593 | viafb_lcd_disable(); |
2476 | } | 2594 | } |
2477 | 2595 | ||
2478 | static void device_on(void) | 2596 | static void device_on(void) |
2479 | { | 2597 | { |
2480 | if (viafb_CRT_ON == 1) | ||
2481 | viafb_crt_enable(); | ||
2482 | if (viafb_DVI_ON == 1) | 2598 | if (viafb_DVI_ON == 1) |
2483 | viafb_dvi_enable(); | 2599 | viafb_dvi_enable(); |
2484 | if (viafb_LCD_ON == 1) | 2600 | if (viafb_LCD_ON == 1) |
2485 | viafb_lcd_enable(); | 2601 | viafb_lcd_enable(); |
2486 | } | 2602 | } |
2487 | 2603 | ||
2488 | void viafb_crt_disable(void) | ||
2489 | { | ||
2490 | viafb_write_reg_mask(CR36, VIACR, BIT5 + BIT4, BIT5 + BIT4); | ||
2491 | } | ||
2492 | |||
2493 | void viafb_crt_enable(void) | ||
2494 | { | ||
2495 | viafb_write_reg_mask(CR36, VIACR, 0x0, BIT5 + BIT4); | ||
2496 | } | ||
2497 | |||
2498 | static void enable_second_display_channel(void) | 2604 | static void enable_second_display_channel(void) |
2499 | { | 2605 | { |
2500 | /* to enable second display channel. */ | 2606 | /* to enable second display channel. */ |
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h index 657dbd64a089..b067cbb45ebf 100644 --- a/drivers/video/via/hw.h +++ b/drivers/video/via/hw.h | |||
@@ -41,6 +41,12 @@ | |||
41 | #define VIA_LVDS1 0x00000040 | 41 | #define VIA_LVDS1 0x00000040 |
42 | #define VIA_LVDS2 0x00000080 | 42 | #define VIA_LVDS2 0x00000080 |
43 | 43 | ||
44 | /* VIA output device power states */ | ||
45 | #define VIA_STATE_ON 0 | ||
46 | #define VIA_STATE_STANDBY 1 | ||
47 | #define VIA_STATE_SUSPEND 2 | ||
48 | #define VIA_STATE_OFF 3 | ||
49 | |||
44 | /*************************************************** | 50 | /*************************************************** |
45 | * Definition IGA1 Design Method of CRTC Registers * | 51 | * Definition IGA1 Design Method of CRTC Registers * |
46 | ****************************************************/ | 52 | ****************************************************/ |
@@ -904,9 +910,8 @@ void viafb_set_vclock(u32 CLK, int set_iga); | |||
904 | void viafb_load_reg(int timing_value, int viafb_load_reg_num, | 910 | void viafb_load_reg(int timing_value, int viafb_load_reg_num, |
905 | struct io_register *reg, | 911 | struct io_register *reg, |
906 | int io_type); | 912 | int io_type); |
907 | void viafb_crt_disable(void); | ||
908 | void viafb_crt_enable(void); | ||
909 | void via_set_source(u32 devices, u8 iga); | 913 | void via_set_source(u32 devices, u8 iga); |
914 | void via_set_state(u32 devices, u8 state); | ||
910 | u32 via_parse_odev(char *input, char **end); | 915 | u32 via_parse_odev(char *input, char **end); |
911 | void via_odev_to_seq(struct seq_file *m, u32 odev); | 916 | void via_odev_to_seq(struct seq_file *m, u32 odev); |
912 | void init_ad9389(void); | 917 | void init_ad9389(void); |
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index b7d55350be06..de19e4777daf 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c | |||
@@ -703,9 +703,6 @@ static void integrated_lvds_disable(struct lvds_setting_information | |||
703 | viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7); | 703 | viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7); |
704 | } | 704 | } |
705 | 705 | ||
706 | /* Turn DFP High/Low Pad off. */ | ||
707 | viafb_write_reg_mask(SR2A, VIASR, 0, BIT0 + BIT1 + BIT2 + BIT3); | ||
708 | |||
709 | /* Power off LVDS channel. */ | 706 | /* Power off LVDS channel. */ |
710 | switch (plvds_chip_info->output_interface) { | 707 | switch (plvds_chip_info->output_interface) { |
711 | case INTERFACE_LVDS0: | 708 | case INTERFACE_LVDS0: |
@@ -761,9 +758,6 @@ static void integrated_lvds_enable(struct lvds_setting_information | |||
761 | break; | 758 | break; |
762 | } | 759 | } |
763 | 760 | ||
764 | /* Turn DFP High/Low pad on. */ | ||
765 | viafb_write_reg_mask(SR2A, VIASR, 0x0F, BIT0 + BIT1 + BIT2 + BIT3); | ||
766 | |||
767 | /* Power on LVDS channel. */ | 761 | /* Power on LVDS channel. */ |
768 | switch (plvds_chip_info->output_interface) { | 762 | switch (plvds_chip_info->output_interface) { |
769 | case INTERFACE_LVDS0: | 763 | case INTERFACE_LVDS0: |
@@ -812,8 +806,6 @@ void viafb_lcd_disable(void) | |||
812 | viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info, | 806 | viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info, |
813 | &viaparinfo->chip_info->lvds_chip_info); | 807 | &viaparinfo->chip_info->lvds_chip_info); |
814 | } else { | 808 | } else { |
815 | /* DFP-HL pad off */ | ||
816 | viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0F); | ||
817 | /* Backlight off */ | 809 | /* Backlight off */ |
818 | viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20); | 810 | viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20); |
819 | /* 24 bit DI data paht off */ | 811 | /* 24 bit DI data paht off */ |
@@ -879,8 +871,6 @@ void viafb_lcd_enable(void) | |||
879 | viafb_enable_lvds_vt1636(viaparinfo->lvds_setting_info, | 871 | viafb_enable_lvds_vt1636(viaparinfo->lvds_setting_info, |
880 | &viaparinfo->chip_info->lvds_chip_info); | 872 | &viaparinfo->chip_info->lvds_chip_info); |
881 | } else { | 873 | } else { |
882 | /* DFP-HL pad on */ | ||
883 | viafb_write_reg_mask(SR2A, VIASR, 0x0F, 0x0F); | ||
884 | /* Backlight on */ | 874 | /* Backlight on */ |
885 | viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20); | 875 | viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20); |
886 | /* 24 bit DI data paht on */ | 876 | /* 24 bit DI data paht on */ |
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c index 80ce43a318bb..164c6ea603d2 100644 --- a/drivers/video/via/viafbdev.c +++ b/drivers/video/via/viafbdev.c | |||
@@ -332,22 +332,22 @@ static int viafb_blank(int blank_mode, struct fb_info *info) | |||
332 | case FB_BLANK_UNBLANK: | 332 | case FB_BLANK_UNBLANK: |
333 | /* Screen: On, HSync: On, VSync: On */ | 333 | /* Screen: On, HSync: On, VSync: On */ |
334 | /* control CRT monitor power management */ | 334 | /* control CRT monitor power management */ |
335 | viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5); | 335 | via_set_state(VIA_CRT, VIA_STATE_ON); |
336 | break; | 336 | break; |
337 | case FB_BLANK_HSYNC_SUSPEND: | 337 | case FB_BLANK_HSYNC_SUSPEND: |
338 | /* Screen: Off, HSync: Off, VSync: On */ | 338 | /* Screen: Off, HSync: Off, VSync: On */ |
339 | /* control CRT monitor power management */ | 339 | /* control CRT monitor power management */ |
340 | viafb_write_reg_mask(CR36, VIACR, 0x10, BIT4 + BIT5); | 340 | via_set_state(VIA_CRT, VIA_STATE_STANDBY); |
341 | break; | 341 | break; |
342 | case FB_BLANK_VSYNC_SUSPEND: | 342 | case FB_BLANK_VSYNC_SUSPEND: |
343 | /* Screen: Off, HSync: On, VSync: Off */ | 343 | /* Screen: Off, HSync: On, VSync: Off */ |
344 | /* control CRT monitor power management */ | 344 | /* control CRT monitor power management */ |
345 | viafb_write_reg_mask(CR36, VIACR, 0x20, BIT4 + BIT5); | 345 | via_set_state(VIA_CRT, VIA_STATE_SUSPEND); |
346 | break; | 346 | break; |
347 | case FB_BLANK_POWERDOWN: | 347 | case FB_BLANK_POWERDOWN: |
348 | /* Screen: Off, HSync: Off, VSync: Off */ | 348 | /* Screen: Off, HSync: Off, VSync: Off */ |
349 | /* control CRT monitor power management */ | 349 | /* control CRT monitor power management */ |
350 | viafb_write_reg_mask(CR36, VIACR, 0x30, BIT4 + BIT5); | 350 | via_set_state(VIA_CRT, VIA_STATE_OFF); |
351 | break; | 351 | break; |
352 | } | 352 | } |
353 | 353 | ||
@@ -457,7 +457,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg) | |||
457 | if (copy_from_user(&gpu32, argp, sizeof(gpu32))) | 457 | if (copy_from_user(&gpu32, argp, sizeof(gpu32))) |
458 | return -EFAULT; | 458 | return -EFAULT; |
459 | if (gpu32 & CRT_Device) | 459 | if (gpu32 & CRT_Device) |
460 | viafb_crt_enable(); | 460 | via_set_state(VIA_CRT, VIA_STATE_ON); |
461 | if (gpu32 & DVI_Device) | 461 | if (gpu32 & DVI_Device) |
462 | viafb_dvi_enable(); | 462 | viafb_dvi_enable(); |
463 | if (gpu32 & LCD_Device) | 463 | if (gpu32 & LCD_Device) |
@@ -467,7 +467,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg) | |||
467 | if (copy_from_user(&gpu32, argp, sizeof(gpu32))) | 467 | if (copy_from_user(&gpu32, argp, sizeof(gpu32))) |
468 | return -EFAULT; | 468 | return -EFAULT; |
469 | if (gpu32 & CRT_Device) | 469 | if (gpu32 & CRT_Device) |
470 | viafb_crt_disable(); | 470 | via_set_state(VIA_CRT, VIA_STATE_OFF); |
471 | if (gpu32 & DVI_Device) | 471 | if (gpu32 & DVI_Device) |
472 | viafb_dvi_disable(); | 472 | viafb_dvi_disable(); |
473 | if (gpu32 & LCD_Device) | 473 | if (gpu32 & LCD_Device) |
@@ -1487,7 +1487,9 @@ static ssize_t viafb_iga1_odev_proc_write(struct file *file, | |||
1487 | dev_on = dev_new & ~dev_old; | 1487 | dev_on = dev_new & ~dev_old; |
1488 | viaparinfo->shared->iga1_devices = dev_new; | 1488 | viaparinfo->shared->iga1_devices = dev_new; |
1489 | viaparinfo->shared->iga2_devices &= ~dev_new; | 1489 | viaparinfo->shared->iga2_devices &= ~dev_new; |
1490 | via_set_state(dev_off, VIA_STATE_OFF); | ||
1490 | via_set_source(dev_new, IGA1); | 1491 | via_set_source(dev_new, IGA1); |
1492 | via_set_state(dev_on, VIA_STATE_ON); | ||
1491 | return res; | 1493 | return res; |
1492 | } | 1494 | } |
1493 | 1495 | ||
@@ -1525,7 +1527,9 @@ static ssize_t viafb_iga2_odev_proc_write(struct file *file, | |||
1525 | dev_on = dev_new & ~dev_old; | 1527 | dev_on = dev_new & ~dev_old; |
1526 | viaparinfo->shared->iga2_devices = dev_new; | 1528 | viaparinfo->shared->iga2_devices = dev_new; |
1527 | viaparinfo->shared->iga1_devices &= ~dev_new; | 1529 | viaparinfo->shared->iga1_devices &= ~dev_new; |
1530 | via_set_state(dev_off, VIA_STATE_OFF); | ||
1528 | via_set_source(dev_new, IGA2); | 1531 | via_set_source(dev_new, IGA2); |
1532 | via_set_state(dev_on, VIA_STATE_ON); | ||
1529 | return res; | 1533 | return res; |
1530 | } | 1534 | } |
1531 | 1535 | ||
diff --git a/drivers/video/via/vt1636.c b/drivers/video/via/vt1636.c index d65bf1aee87c..90aad12c2c4d 100644 --- a/drivers/video/via/vt1636.c +++ b/drivers/video/via/vt1636.c | |||
@@ -92,34 +92,6 @@ void viafb_enable_lvds_vt1636(struct lvds_setting_information | |||
92 | 92 | ||
93 | viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, | 93 | viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, |
94 | VDD_ON_TBL_VT1636[0]); | 94 | VDD_ON_TBL_VT1636[0]); |
95 | |||
96 | /* Pad on: */ | ||
97 | switch (plvds_chip_info->output_interface) { | ||
98 | case INTERFACE_DVP0: | ||
99 | { | ||
100 | viafb_write_reg_mask(SR1E, VIASR, 0xC0, 0xC0); | ||
101 | break; | ||
102 | } | ||
103 | |||
104 | case INTERFACE_DVP1: | ||
105 | { | ||
106 | viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30); | ||
107 | break; | ||
108 | } | ||
109 | |||
110 | case INTERFACE_DFP_LOW: | ||
111 | { | ||
112 | viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x03); | ||
113 | break; | ||
114 | } | ||
115 | |||
116 | case INTERFACE_DFP_HIGH: | ||
117 | { | ||
118 | viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x0C); | ||
119 | break; | ||
120 | } | ||
121 | |||
122 | } | ||
123 | } | 95 | } |
124 | 96 | ||
125 | void viafb_disable_lvds_vt1636(struct lvds_setting_information | 97 | void viafb_disable_lvds_vt1636(struct lvds_setting_information |
@@ -129,34 +101,6 @@ void viafb_disable_lvds_vt1636(struct lvds_setting_information | |||
129 | 101 | ||
130 | viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, | 102 | viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, |
131 | VDD_OFF_TBL_VT1636[0]); | 103 | VDD_OFF_TBL_VT1636[0]); |
132 | |||
133 | /* Pad off: */ | ||
134 | switch (plvds_chip_info->output_interface) { | ||
135 | case INTERFACE_DVP0: | ||
136 | { | ||
137 | viafb_write_reg_mask(SR1E, VIASR, 0x00, 0xC0); | ||
138 | break; | ||
139 | } | ||
140 | |||
141 | case INTERFACE_DVP1: | ||
142 | { | ||
143 | viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30); | ||
144 | break; | ||
145 | } | ||
146 | |||
147 | case INTERFACE_DFP_LOW: | ||
148 | { | ||
149 | viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x03); | ||
150 | break; | ||
151 | } | ||
152 | |||
153 | case INTERFACE_DFP_HIGH: | ||
154 | { | ||
155 | viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0C); | ||
156 | break; | ||
157 | } | ||
158 | |||
159 | } | ||
160 | } | 104 | } |
161 | 105 | ||
162 | bool viafb_lvds_identify_vt1636(u8 i2c_adapter) | 106 | bool viafb_lvds_identify_vt1636(u8 i2c_adapter) |