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path: root/drivers/video/via
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-rw-r--r--drivers/video/via/hw.c50
-rw-r--r--drivers/video/via/share.h69
-rw-r--r--drivers/video/via/viamode.c67
-rw-r--r--drivers/video/via/viamode.h9
4 files changed, 29 insertions, 166 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 9ecf48620d02..8c1393e49b0a 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -2608,35 +2608,43 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2608int viafb_get_pixclock(int hres, int vres, int vmode_refresh) 2608int viafb_get_pixclock(int hres, int vres, int vmode_refresh)
2609{ 2609{
2610 int i; 2610 int i;
2611 struct crt_mode_table *best;
2612 struct VideoModeTable *vmode = viafb_get_mode(hres, vres);
2611 2613
2612 for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { 2614 if (!vmode)
2613 if ((hres == res_map_refresh_tbl[i].hres) 2615 return RES_640X480_60HZ_PIXCLOCK;
2614 && (vres == res_map_refresh_tbl[i].vres) 2616
2615 && (vmode_refresh == res_map_refresh_tbl[i].vmode_refresh)) 2617 best = &vmode->crtc[0];
2616 return res_map_refresh_tbl[i].pixclock; 2618 for (i = 1; i < vmode->mode_array; i++) {
2619 if (abs(vmode->crtc[i].refresh_rate - vmode_refresh)
2620 < abs(best->refresh_rate - vmode_refresh))
2621 best = &vmode->crtc[i];
2617 } 2622 }
2618 return RES_640X480_60HZ_PIXCLOCK;
2619 2623
2624 return 1000000000 / (best->crtc.hor_total * best->crtc.ver_total)
2625 * 1000 / best->refresh_rate;
2620} 2626}
2621 2627
2622int viafb_get_refresh(int hres, int vres, u32 long_refresh) 2628int viafb_get_refresh(int hres, int vres, u32 long_refresh)
2623{ 2629{
2624#define REFRESH_TOLERANCE 3 2630 int i;
2625 int i, nearest = -1, diff = REFRESH_TOLERANCE; 2631 struct crt_mode_table *best;
2626 for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { 2632 struct VideoModeTable *vmode = viafb_get_mode(hres, vres);
2627 if ((hres == res_map_refresh_tbl[i].hres) 2633
2628 && (vres == res_map_refresh_tbl[i].vres) 2634 if (!vmode)
2629 && (diff > (abs(long_refresh - 2635 return 60;
2630 res_map_refresh_tbl[i].vmode_refresh)))) { 2636
2631 diff = abs(long_refresh - res_map_refresh_tbl[i]. 2637 best = &vmode->crtc[0];
2632 vmode_refresh); 2638 for (i = 1; i < vmode->mode_array; i++) {
2633 nearest = i; 2639 if (abs(vmode->crtc[i].refresh_rate - long_refresh)
2634 } 2640 < abs(best->refresh_rate - long_refresh))
2641 best = &vmode->crtc[i];
2635 } 2642 }
2636#undef REFRESH_TOLERANCE 2643
2637 if (nearest > 0) 2644 if (abs(best->refresh_rate - long_refresh) > 3)
2638 return res_map_refresh_tbl[nearest].vmode_refresh; 2645 return 60;
2639 return 60; 2646
2647 return best->refresh_rate;
2640} 2648}
2641 2649
2642static void device_off(void) 2650static void device_off(void)
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index 2cbe1031b421..b04c047d44f8 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -722,76 +722,7 @@
722 722
723/* Definition Video Mode Pixel Clock (picoseconds) 723/* Definition Video Mode Pixel Clock (picoseconds)
724*/ 724*/
725#define RES_480X640_60HZ_PIXCLOCK 39722
726#define RES_640X480_60HZ_PIXCLOCK 39722 725#define RES_640X480_60HZ_PIXCLOCK 39722
727#define RES_640X480_75HZ_PIXCLOCK 31747
728#define RES_640X480_85HZ_PIXCLOCK 27777
729#define RES_640X480_100HZ_PIXCLOCK 23168
730#define RES_640X480_120HZ_PIXCLOCK 19081
731#define RES_720X480_60HZ_PIXCLOCK 37020
732#define RES_720X576_60HZ_PIXCLOCK 30611
733#define RES_800X600_60HZ_PIXCLOCK 25000
734#define RES_800X600_75HZ_PIXCLOCK 20203
735#define RES_800X600_85HZ_PIXCLOCK 17777
736#define RES_800X600_100HZ_PIXCLOCK 14667
737#define RES_800X600_120HZ_PIXCLOCK 11912
738#define RES_800X480_60HZ_PIXCLOCK 33805
739#define RES_848X480_60HZ_PIXCLOCK 31756
740#define RES_856X480_60HZ_PIXCLOCK 31518
741#define RES_1024X512_60HZ_PIXCLOCK 24218
742#define RES_1024X600_60HZ_PIXCLOCK 20460
743#define RES_1024X768_60HZ_PIXCLOCK 15385
744#define RES_1024X768_75HZ_PIXCLOCK 12699
745#define RES_1024X768_85HZ_PIXCLOCK 10582
746#define RES_1024X768_100HZ_PIXCLOCK 8825
747#define RES_1152X864_75HZ_PIXCLOCK 9259
748#define RES_1280X768_60HZ_PIXCLOCK 12480
749#define RES_1280X800_60HZ_PIXCLOCK 11994
750#define RES_1280X960_60HZ_PIXCLOCK 9259
751#define RES_1280X1024_60HZ_PIXCLOCK 9260
752#define RES_1280X1024_75HZ_PIXCLOCK 7408
753#define RES_1280X768_85HZ_PIXCLOCK 6349
754#define RES_1440X1050_60HZ_PIXCLOCK 7993
755#define RES_1600X1200_60HZ_PIXCLOCK 6172
756#define RES_1600X1200_75HZ_PIXCLOCK 4938
757#define RES_1280X720_60HZ_PIXCLOCK 13426
758#define RES_1200X900_60HZ_PIXCLOCK 17459
759#define RES_1920X1080_60HZ_PIXCLOCK 5787
760#define RES_1400X1050_60HZ_PIXCLOCK 8214
761#define RES_1400X1050_75HZ_PIXCLOCK 6410
762#define RES_1368X768_60HZ_PIXCLOCK 11647
763#define RES_960X600_60HZ_PIXCLOCK 22099
764#define RES_1000X600_60HZ_PIXCLOCK 20834
765#define RES_1024X576_60HZ_PIXCLOCK 21278
766#define RES_1088X612_60HZ_PIXCLOCK 18877
767#define RES_1152X720_60HZ_PIXCLOCK 14981
768#define RES_1200X720_60HZ_PIXCLOCK 14253
769#define RES_1280X600_60HZ_PIXCLOCK 16260
770#define RES_1280X720_50HZ_PIXCLOCK 16538
771#define RES_1280X768_50HZ_PIXCLOCK 15342
772#define RES_1366X768_50HZ_PIXCLOCK 14301
773#define RES_1366X768_60HZ_PIXCLOCK 11646
774#define RES_1360X768_60HZ_PIXCLOCK 11799
775#define RES_1440X900_60HZ_PIXCLOCK 9390
776#define RES_1440X900_75HZ_PIXCLOCK 7315
777#define RES_1600X900_60HZ_PIXCLOCK 8415
778#define RES_1600X1024_60HZ_PIXCLOCK 7315
779#define RES_1680X1050_60HZ_PIXCLOCK 6814
780#define RES_1680X1050_75HZ_PIXCLOCK 5348
781#define RES_1792X1344_60HZ_PIXCLOCK 4902
782#define RES_1856X1392_60HZ_PIXCLOCK 4577
783#define RES_1920X1200_60HZ_PIXCLOCK 5173
784#define RES_1920X1440_60HZ_PIXCLOCK 4274
785#define RES_1920X1440_75HZ_PIXCLOCK 3367
786#define RES_2048X1536_60HZ_PIXCLOCK 3742
787
788#define RES_1360X768_RB_60HZ_PIXCLOCK 13889
789#define RES_1400X1050_RB_60HZ_PIXCLOCK 9901
790#define RES_1440X900_RB_60HZ_PIXCLOCK 11268
791#define RES_1600X900_RB_60HZ_PIXCLOCK 10230
792#define RES_1680X1050_RB_60HZ_PIXCLOCK 8403
793#define RES_1920X1080_RB_60HZ_PIXCLOCK 7225
794#define RES_1920X1200_RB_60HZ_PIXCLOCK 6497
795 726
796/* LCD display method 727/* LCD display method
797*/ 728*/
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c
index 4b06dd73ccaa..ea0bc7af6798 100644
--- a/drivers/video/via/viamode.c
+++ b/drivers/video/via/viamode.c
@@ -21,72 +21,6 @@
21 21
22#include <linux/via-core.h> 22#include <linux/via-core.h>
23#include "global.h" 23#include "global.h"
24struct res_map_refresh res_map_refresh_tbl[] = {
25/*hres, vres, vclock, vmode_refresh*/
26 {480, 640, RES_480X640_60HZ_PIXCLOCK, 60},
27 {640, 480, RES_640X480_60HZ_PIXCLOCK, 60},
28 {640, 480, RES_640X480_75HZ_PIXCLOCK, 75},
29 {640, 480, RES_640X480_85HZ_PIXCLOCK, 85},
30 {640, 480, RES_640X480_100HZ_PIXCLOCK, 100},
31 {640, 480, RES_640X480_120HZ_PIXCLOCK, 120},
32 {720, 480, RES_720X480_60HZ_PIXCLOCK, 60},
33 {720, 576, RES_720X576_60HZ_PIXCLOCK, 60},
34 {800, 480, RES_800X480_60HZ_PIXCLOCK, 60},
35 {800, 600, RES_800X600_60HZ_PIXCLOCK, 60},
36 {800, 600, RES_800X600_75HZ_PIXCLOCK, 75},
37 {800, 600, RES_800X600_85HZ_PIXCLOCK, 85},
38 {800, 600, RES_800X600_100HZ_PIXCLOCK, 100},
39 {800, 600, RES_800X600_120HZ_PIXCLOCK, 120},
40 {848, 480, RES_848X480_60HZ_PIXCLOCK, 60},
41 {856, 480, RES_856X480_60HZ_PIXCLOCK, 60},
42 {1024, 512, RES_1024X512_60HZ_PIXCLOCK, 60},
43 {1024, 600, RES_1024X600_60HZ_PIXCLOCK, 60},
44 {1024, 768, RES_1024X768_60HZ_PIXCLOCK, 60},
45 {1024, 768, RES_1024X768_75HZ_PIXCLOCK, 75},
46 {1024, 768, RES_1024X768_85HZ_PIXCLOCK, 85},
47 {1024, 768, RES_1024X768_100HZ_PIXCLOCK, 100},
48/* {1152,864, RES_1152X864_70HZ_PIXCLOCK, 70},*/
49 {1152, 864, RES_1152X864_75HZ_PIXCLOCK, 75},
50 {1280, 768, RES_1280X768_60HZ_PIXCLOCK, 60},
51 {1280, 800, RES_1280X800_60HZ_PIXCLOCK, 60},
52 {1280, 960, RES_1280X960_60HZ_PIXCLOCK, 60},
53 {1280, 1024, RES_1280X1024_60HZ_PIXCLOCK, 60},
54 {1280, 1024, RES_1280X1024_75HZ_PIXCLOCK, 75},
55 {1280, 1024, RES_1280X768_85HZ_PIXCLOCK, 85},
56 {1440, 1050, RES_1440X1050_60HZ_PIXCLOCK, 60},
57 {1600, 1200, RES_1600X1200_60HZ_PIXCLOCK, 60},
58 {1600, 1200, RES_1600X1200_75HZ_PIXCLOCK, 75},
59 {1280, 720, RES_1280X720_60HZ_PIXCLOCK, 60},
60 {1920, 1080, RES_1920X1080_60HZ_PIXCLOCK, 60},
61 {1400, 1050, RES_1400X1050_60HZ_PIXCLOCK, 60},
62 {1400, 1050, RES_1400X1050_75HZ_PIXCLOCK, 75},
63 {1368, 768, RES_1368X768_60HZ_PIXCLOCK, 60},
64 {960, 600, RES_960X600_60HZ_PIXCLOCK, 60},
65 {1000, 600, RES_1000X600_60HZ_PIXCLOCK, 60},
66 {1024, 576, RES_1024X576_60HZ_PIXCLOCK, 60},
67 {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60},
68 {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60},
69 {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60},
70 {1200, 900, RES_1200X900_60HZ_PIXCLOCK, 60},
71 {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60},
72 {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50},
73 {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50},
74 {1360, 768, RES_1360X768_60HZ_PIXCLOCK, 60},
75 {1366, 768, RES_1366X768_50HZ_PIXCLOCK, 50},
76 {1366, 768, RES_1366X768_60HZ_PIXCLOCK, 60},
77 {1440, 900, RES_1440X900_60HZ_PIXCLOCK, 60},
78 {1440, 900, RES_1440X900_75HZ_PIXCLOCK, 75},
79 {1600, 900, RES_1600X900_60HZ_PIXCLOCK, 60},
80 {1600, 1024, RES_1600X1024_60HZ_PIXCLOCK, 60},
81 {1680, 1050, RES_1680X1050_60HZ_PIXCLOCK, 60},
82 {1680, 1050, RES_1680X1050_75HZ_PIXCLOCK, 75},
83 {1792, 1344, RES_1792X1344_60HZ_PIXCLOCK, 60},
84 {1856, 1392, RES_1856X1392_60HZ_PIXCLOCK, 60},
85 {1920, 1200, RES_1920X1200_60HZ_PIXCLOCK, 60},
86 {1920, 1440, RES_1920X1440_60HZ_PIXCLOCK, 60},
87 {1920, 1440, RES_1920X1440_75HZ_PIXCLOCK, 75},
88 {2048, 1536, RES_2048X1536_60HZ_PIXCLOCK, 60}
89};
90 24
91struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, 25struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
92{VIASR, SR15, 0x02, 0x02}, 26{VIASR, SR15, 0x02, 0x02},
@@ -1057,7 +991,6 @@ struct VideoModeTable CEA_HDMI_Modes[] = {
1057 {CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)} 991 {CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)}
1058}; 992};
1059 993
1060int NUM_TOTAL_RES_MAP_REFRESH = ARRAY_SIZE(res_map_refresh_tbl);
1061int NUM_TOTAL_CEA_MODES = ARRAY_SIZE(CEA_HDMI_Modes); 994int NUM_TOTAL_CEA_MODES = ARRAY_SIZE(CEA_HDMI_Modes);
1062int NUM_TOTAL_CN400_ModeXregs = ARRAY_SIZE(CN400_ModeXregs); 995int NUM_TOTAL_CN400_ModeXregs = ARRAY_SIZE(CN400_ModeXregs);
1063int NUM_TOTAL_CN700_ModeXregs = ARRAY_SIZE(CN700_ModeXregs); 996int NUM_TOTAL_CN700_ModeXregs = ARRAY_SIZE(CN700_ModeXregs);
diff --git a/drivers/video/via/viamode.h b/drivers/video/via/viamode.h
index 5b1ced86514b..8a67ea1b5ef0 100644
--- a/drivers/video/via/viamode.h
+++ b/drivers/video/via/viamode.h
@@ -41,14 +41,6 @@ struct patch_table {
41 struct io_reg *io_reg_table; 41 struct io_reg *io_reg_table;
42}; 42};
43 43
44struct res_map_refresh {
45 int hres;
46 int vres;
47 int pixclock;
48 int vmode_refresh;
49};
50
51extern int NUM_TOTAL_RES_MAP_REFRESH;
52extern int NUM_TOTAL_CEA_MODES; 44extern int NUM_TOTAL_CEA_MODES;
53extern int NUM_TOTAL_CN400_ModeXregs; 45extern int NUM_TOTAL_CN400_ModeXregs;
54extern int NUM_TOTAL_CN700_ModeXregs; 46extern int NUM_TOTAL_CN700_ModeXregs;
@@ -66,7 +58,6 @@ extern struct crt_mode_table CEAM1280x720[];
66extern struct crt_mode_table CEAM1920x1080[]; 58extern struct crt_mode_table CEAM1920x1080[];
67extern struct VideoModeTable CEA_HDMI_Modes[]; 59extern struct VideoModeTable CEA_HDMI_Modes[];
68 60
69extern struct res_map_refresh res_map_refresh_tbl[];
70extern struct io_reg CN400_ModeXregs[]; 61extern struct io_reg CN400_ModeXregs[];
71extern struct io_reg CN700_ModeXregs[]; 62extern struct io_reg CN700_ModeXregs[];
72extern struct io_reg KM400_ModeXregs[]; 63extern struct io_reg KM400_ModeXregs[];