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-rw-r--r--drivers/video/via/share.h141
1 files changed, 0 insertions, 141 deletions
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index 2cbe1031b421..4b7831f0d012 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -627,77 +627,6 @@
627#define M2048x1536_R60_HSP NEGATIVE 627#define M2048x1536_R60_HSP NEGATIVE
628#define M2048x1536_R60_VSP POSITIVE 628#define M2048x1536_R60_VSP POSITIVE
629 629
630/* define PLL index: */
631#define CLK_25_175M 25175000
632#define CLK_26_880M 26880000
633#define CLK_29_581M 29581000
634#define CLK_31_500M 31500000
635#define CLK_31_728M 31728000
636#define CLK_32_668M 32688000
637#define CLK_36_000M 36000000
638#define CLK_40_000M 40000000
639#define CLK_41_291M 41291000
640#define CLK_43_163M 43163000
641#define CLK_45_250M 45250000 /* 45.46MHz */
642#define CLK_46_000M 46000000
643#define CLK_46_996M 46996000
644#define CLK_48_000M 48000000
645#define CLK_48_875M 48875000
646#define CLK_49_500M 49500000
647#define CLK_52_406M 52406000
648#define CLK_52_977M 52977000
649#define CLK_56_250M 56250000
650#define CLK_57_275M 57275000
651#define CLK_60_466M 60466000
652#define CLK_61_500M 61500000
653#define CLK_65_000M 65000000
654#define CLK_65_178M 65178000
655#define CLK_66_750M 66750000 /* 67.116MHz */
656#define CLK_68_179M 68179000
657#define CLK_69_924M 69924000
658#define CLK_70_159M 70159000
659#define CLK_72_000M 72000000
660#define CLK_74_270M 74270000
661#define CLK_78_750M 78750000
662#define CLK_80_136M 80136000
663#define CLK_83_375M 83375000
664#define CLK_83_950M 83950000
665#define CLK_84_750M 84750000 /* 84.537Mhz */
666#define CLK_85_860M 85860000
667#define CLK_88_750M 88750000
668#define CLK_94_500M 94500000
669#define CLK_97_750M 97750000
670#define CLK_101_000M 101000000
671#define CLK_106_500M 106500000
672#define CLK_108_000M 108000000
673#define CLK_113_309M 113309000
674#define CLK_118_840M 118840000
675#define CLK_119_000M 119000000
676#define CLK_121_750M 121750000 /* 121.704MHz */
677#define CLK_125_104M 125104000
678#define CLK_135_000M 135000000
679#define CLK_136_700M 136700000
680#define CLK_138_400M 138400000
681#define CLK_146_760M 146760000
682#define CLK_148_500M 148500000
683
684#define CLK_153_920M 153920000
685#define CLK_156_000M 156000000
686#define CLK_157_500M 157500000
687#define CLK_162_000M 162000000
688#define CLK_187_000M 187000000
689#define CLK_193_295M 193295000
690#define CLK_202_500M 202500000
691#define CLK_204_000M 204000000
692#define CLK_218_500M 218500000
693#define CLK_234_000M 234000000
694#define CLK_267_250M 267250000
695#define CLK_297_500M 297500000
696#define CLK_74_481M 74481000
697#define CLK_172_798M 172798000
698#define CLK_122_614M 122614000
699
700
701/* Definition CRTC Timing Index */ 630/* Definition CRTC Timing Index */
702#define H_TOTAL_INDEX 0 631#define H_TOTAL_INDEX 0
703#define H_ADDR_INDEX 1 632#define H_ADDR_INDEX 1
@@ -722,76 +651,7 @@
722 651
723/* Definition Video Mode Pixel Clock (picoseconds) 652/* Definition Video Mode Pixel Clock (picoseconds)
724*/ 653*/
725#define RES_480X640_60HZ_PIXCLOCK 39722
726#define RES_640X480_60HZ_PIXCLOCK 39722 654#define RES_640X480_60HZ_PIXCLOCK 39722
727#define RES_640X480_75HZ_PIXCLOCK 31747
728#define RES_640X480_85HZ_PIXCLOCK 27777
729#define RES_640X480_100HZ_PIXCLOCK 23168
730#define RES_640X480_120HZ_PIXCLOCK 19081
731#define RES_720X480_60HZ_PIXCLOCK 37020
732#define RES_720X576_60HZ_PIXCLOCK 30611
733#define RES_800X600_60HZ_PIXCLOCK 25000
734#define RES_800X600_75HZ_PIXCLOCK 20203
735#define RES_800X600_85HZ_PIXCLOCK 17777
736#define RES_800X600_100HZ_PIXCLOCK 14667
737#define RES_800X600_120HZ_PIXCLOCK 11912
738#define RES_800X480_60HZ_PIXCLOCK 33805
739#define RES_848X480_60HZ_PIXCLOCK 31756
740#define RES_856X480_60HZ_PIXCLOCK 31518
741#define RES_1024X512_60HZ_PIXCLOCK 24218
742#define RES_1024X600_60HZ_PIXCLOCK 20460
743#define RES_1024X768_60HZ_PIXCLOCK 15385
744#define RES_1024X768_75HZ_PIXCLOCK 12699
745#define RES_1024X768_85HZ_PIXCLOCK 10582
746#define RES_1024X768_100HZ_PIXCLOCK 8825
747#define RES_1152X864_75HZ_PIXCLOCK 9259
748#define RES_1280X768_60HZ_PIXCLOCK 12480
749#define RES_1280X800_60HZ_PIXCLOCK 11994
750#define RES_1280X960_60HZ_PIXCLOCK 9259
751#define RES_1280X1024_60HZ_PIXCLOCK 9260
752#define RES_1280X1024_75HZ_PIXCLOCK 7408
753#define RES_1280X768_85HZ_PIXCLOCK 6349
754#define RES_1440X1050_60HZ_PIXCLOCK 7993
755#define RES_1600X1200_60HZ_PIXCLOCK 6172
756#define RES_1600X1200_75HZ_PIXCLOCK 4938
757#define RES_1280X720_60HZ_PIXCLOCK 13426
758#define RES_1200X900_60HZ_PIXCLOCK 17459
759#define RES_1920X1080_60HZ_PIXCLOCK 5787
760#define RES_1400X1050_60HZ_PIXCLOCK 8214
761#define RES_1400X1050_75HZ_PIXCLOCK 6410
762#define RES_1368X768_60HZ_PIXCLOCK 11647
763#define RES_960X600_60HZ_PIXCLOCK 22099
764#define RES_1000X600_60HZ_PIXCLOCK 20834
765#define RES_1024X576_60HZ_PIXCLOCK 21278
766#define RES_1088X612_60HZ_PIXCLOCK 18877
767#define RES_1152X720_60HZ_PIXCLOCK 14981
768#define RES_1200X720_60HZ_PIXCLOCK 14253
769#define RES_1280X600_60HZ_PIXCLOCK 16260
770#define RES_1280X720_50HZ_PIXCLOCK 16538
771#define RES_1280X768_50HZ_PIXCLOCK 15342
772#define RES_1366X768_50HZ_PIXCLOCK 14301
773#define RES_1366X768_60HZ_PIXCLOCK 11646
774#define RES_1360X768_60HZ_PIXCLOCK 11799
775#define RES_1440X900_60HZ_PIXCLOCK 9390
776#define RES_1440X900_75HZ_PIXCLOCK 7315
777#define RES_1600X900_60HZ_PIXCLOCK 8415
778#define RES_1600X1024_60HZ_PIXCLOCK 7315
779#define RES_1680X1050_60HZ_PIXCLOCK 6814
780#define RES_1680X1050_75HZ_PIXCLOCK 5348
781#define RES_1792X1344_60HZ_PIXCLOCK 4902
782#define RES_1856X1392_60HZ_PIXCLOCK 4577
783#define RES_1920X1200_60HZ_PIXCLOCK 5173
784#define RES_1920X1440_60HZ_PIXCLOCK 4274
785#define RES_1920X1440_75HZ_PIXCLOCK 3367
786#define RES_2048X1536_60HZ_PIXCLOCK 3742
787
788#define RES_1360X768_RB_60HZ_PIXCLOCK 13889
789#define RES_1400X1050_RB_60HZ_PIXCLOCK 9901
790#define RES_1440X900_RB_60HZ_PIXCLOCK 11268
791#define RES_1600X900_RB_60HZ_PIXCLOCK 10230
792#define RES_1680X1050_RB_60HZ_PIXCLOCK 8403
793#define RES_1920X1080_RB_60HZ_PIXCLOCK 7225
794#define RES_1920X1200_RB_60HZ_PIXCLOCK 6497
795 655
796/* LCD display method 656/* LCD display method
797*/ 657*/
@@ -822,7 +682,6 @@ struct display_timing {
822 682
823struct crt_mode_table { 683struct crt_mode_table {
824 int refresh_rate; 684 int refresh_rate;
825 unsigned long clk;
826 int h_sync_polarity; 685 int h_sync_polarity;
827 int v_sync_polarity; 686 int v_sync_polarity;
828 struct display_timing crtc; 687 struct display_timing crtc;