diff options
Diffstat (limited to 'drivers/video/via/lcdtbl.h')
-rw-r--r-- | drivers/video/via/lcdtbl.h | 591 |
1 files changed, 591 insertions, 0 deletions
diff --git a/drivers/video/via/lcdtbl.h b/drivers/video/via/lcdtbl.h new file mode 100644 index 000000000000..6f3dd800be59 --- /dev/null +++ b/drivers/video/via/lcdtbl.h | |||
@@ -0,0 +1,591 @@ | |||
1 | /* | ||
2 | * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. | ||
3 | * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. | ||
4 | |||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public | ||
7 | * License as published by the Free Software Foundation; | ||
8 | * either version 2, or (at your option) any later version. | ||
9 | |||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even | ||
12 | * the implied warranty of MERCHANTABILITY or FITNESS FOR | ||
13 | * A PARTICULAR PURPOSE.See the GNU General Public License | ||
14 | * for more details. | ||
15 | |||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., | ||
19 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
20 | */ | ||
21 | #ifndef __LCDTBL_H__ | ||
22 | #define __LCDTBL_H__ | ||
23 | |||
24 | #include "share.h" | ||
25 | |||
26 | /* CLE266 Software Power Sequence */ | ||
27 | /* {Mask}, {Data}, {Delay} */ | ||
28 | int PowerSequenceOn[3][3] = | ||
29 | { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} }; | ||
30 | int PowerSequenceOff[3][3] = | ||
31 | { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} }; | ||
32 | |||
33 | /* ++++++ P880 ++++++ */ | ||
34 | /* Panel 1600x1200 */ | ||
35 | struct io_reg P880_LCD_RES_6X4_16X12[] = { | ||
36 | /*IGA2 Horizontal Total */ | ||
37 | {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08}, | ||
38 | /*IGA2 Horizontal Blank End */ | ||
39 | {VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00}, | ||
40 | {VIACR, CR5D, 0x40, 0x40}, | ||
41 | /*IGA2 Horizontal Total Shadow */ | ||
42 | {VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00}, | ||
43 | /*IGA2 Horizontal Blank End Shadow */ | ||
44 | {VIACR, CR6E, 0xFF, 0x5E}, | ||
45 | /*IGA2 Offset */ | ||
46 | {VIACR, CR66, 0xFF, 0xD6}, {VIACR, CR67, 0x03, 0x00}, | ||
47 | /*VCLK*/ {VIASR, SR44, 0xFF, 0x7D}, {VIASR, SR45, 0xFF, 0x8C}, | ||
48 | {VIASR, SR46, 0xFF, 0x02} | ||
49 | |||
50 | }; | ||
51 | |||
52 | #define NUM_TOTAL_P880_LCD_RES_6X4_16X12 ARRAY_SIZE(P880_LCD_RES_6X4_16X12) | ||
53 | |||
54 | struct io_reg P880_LCD_RES_7X4_16X12[] = { | ||
55 | /*IGA2 Horizontal Total */ | ||
56 | {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08}, | ||
57 | /*IGA2 Horizontal Blank End */ | ||
58 | {VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00}, | ||
59 | {VIACR, CR5D, 0x40, 0x40}, | ||
60 | /*IGA2 Horizontal Total Shadow */ | ||
61 | {VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00}, | ||
62 | /*IGA2 Horizontal Blank End Shadow */ | ||
63 | {VIACR, CR6E, 0xFF, 0x78}, | ||
64 | /*IGA2 Offset */ | ||
65 | {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00}, | ||
66 | /*VCLK*/ {VIASR, SR44, 0xFF, 0x78}, {VIASR, SR45, 0xFF, 0x8C}, | ||
67 | {VIASR, SR46, 0xFF, 0x01} | ||
68 | |||
69 | }; | ||
70 | |||
71 | #define NUM_TOTAL_P880_LCD_RES_7X4_16X12 ARRAY_SIZE(P880_LCD_RES_7X4_16X12) | ||
72 | |||
73 | struct io_reg P880_LCD_RES_8X6_16X12[] = { | ||
74 | /*IGA2 Horizontal Total */ | ||
75 | {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, | ||
76 | /*IGA2 Horizontal Blank End */ | ||
77 | {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00}, | ||
78 | {VIACR, CR5D, 0x40, 0x40}, | ||
79 | /*IGA2 Horizontal Total Shadow */ | ||
80 | {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00}, | ||
81 | /*IGA2 Horizontal Blank End Shadow */ | ||
82 | {VIACR, CR6E, 0xFF, 0x83}, | ||
83 | /*IGA2 Offset */ | ||
84 | {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00}, | ||
85 | /*VCLK*/ {VIASR, SR44, 0xFF, 0x6D}, {VIASR, SR45, 0xFF, 0x88}, | ||
86 | {VIASR, SR46, 0xFF, 0x03} | ||
87 | |||
88 | }; | ||
89 | |||
90 | #define NUM_TOTAL_P880_LCD_RES_8X6_16X12 ARRAY_SIZE(P880_LCD_RES_8X6_16X12) | ||
91 | |||
92 | struct io_reg P880_LCD_RES_10X7_16X12[] = { | ||
93 | /*IGA2 Horizontal Total */ | ||
94 | {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, | ||
95 | /*IGA2 Horizontal Blank End */ | ||
96 | {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00}, | ||
97 | {VIACR, CR5D, 0x40, 0x40}, | ||
98 | /*IGA2 Horizontal Total Shadow */ | ||
99 | {VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00}, | ||
100 | /*IGA2 Horizontal Blank End Shadow */ | ||
101 | {VIACR, CR6E, 0xFF, 0xAF}, | ||
102 | /*IGA2 Offset */ | ||
103 | {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00}, | ||
104 | /*VCLK*/ {VIASR, SR44, 0xFF, 0x92}, {VIASR, SR45, 0xFF, 0x88}, | ||
105 | {VIASR, SR46, 0xFF, 0x03} | ||
106 | |||
107 | }; | ||
108 | |||
109 | #define NUM_TOTAL_P880_LCD_RES_10X7_16X12 ARRAY_SIZE(P880_LCD_RES_10X7_16X12) | ||
110 | |||
111 | struct io_reg P880_LCD_RES_12X10_16X12[] = { | ||
112 | /*IGA2 Horizontal Total */ | ||
113 | {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08}, | ||
114 | /*IGA2 Horizontal Blank End */ | ||
115 | {VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00}, | ||
116 | {VIACR, CR5D, 0x40, 0x40}, | ||
117 | /*IGA2 Horizontal Total Shadow */ | ||
118 | {VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00}, | ||
119 | /*IGA2 Horizontal Blank End Shadow */ | ||
120 | {VIACR, CR6E, 0xFF, 0xD4}, | ||
121 | /*IGA2 Offset */ | ||
122 | {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00}, | ||
123 | /*VCLK*/ {VIASR, SR44, 0xFF, 0xF6}, {VIASR, SR45, 0xFF, 0x88}, | ||
124 | {VIASR, SR46, 0xFF, 0x05} | ||
125 | |||
126 | }; | ||
127 | |||
128 | #define NUM_TOTAL_P880_LCD_RES_12X10_16X12 ARRAY_SIZE(P880_LCD_RES_12X10_16X12) | ||
129 | |||
130 | /* Panel 1400x1050 */ | ||
131 | struct io_reg P880_LCD_RES_6X4_14X10[] = { | ||
132 | /* 640x480 */ | ||
133 | /* IGA2 Horizontal Total */ | ||
134 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, | ||
135 | /* IGA2 Horizontal Blank End */ | ||
136 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, | ||
137 | {VIACR, CR5D, 0x40, 0x24}, | ||
138 | /* IGA2 Horizontal Total Shadow */ | ||
139 | {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44}, | ||
140 | /* IGA2 Horizontal Blank End Shadow */ | ||
141 | {VIACR, CR6E, 0xFF, 0x63}, | ||
142 | /* IGA2 Offset */ | ||
143 | {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00}, | ||
144 | /* VCLK */ | ||
145 | {VIASR, SR44, 0xFF, 0xC6}, {VIASR, SR45, 0xFF, 0x8C}, | ||
146 | {VIASR, SR46, 0xFF, 0x05} | ||
147 | }; | ||
148 | |||
149 | #define NUM_TOTAL_P880_LCD_RES_6X4_14X10 ARRAY_SIZE(P880_LCD_RES_6X4_14X10) | ||
150 | |||
151 | struct io_reg P880_LCD_RES_8X6_14X10[] = { | ||
152 | /* 800x600 */ | ||
153 | /* IGA2 Horizontal Total */ | ||
154 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, | ||
155 | /* IGA2 Horizontal Blank End */ | ||
156 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, | ||
157 | {VIACR, CR5D, 0x40, 0x24}, | ||
158 | /* IGA2 Horizontal Total Shadow */ | ||
159 | {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44}, | ||
160 | /* IGA2 Horizontal Blank End Shadow */ | ||
161 | {VIACR, CR6E, 0xFF, 0x83}, | ||
162 | /* IGA2 Offset */ | ||
163 | {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00}, | ||
164 | /* VCLK */ | ||
165 | {VIASR, SR44, 0xFF, 0x06}, {VIASR, SR45, 0xFF, 0x8D}, | ||
166 | {VIASR, SR46, 0xFF, 0x05} | ||
167 | }; | ||
168 | |||
169 | #define NUM_TOTAL_P880_LCD_RES_8X6_14X10 ARRAY_SIZE(P880_LCD_RES_8X6_14X10) | ||
170 | |||
171 | /* ++++++ K400 ++++++ */ | ||
172 | /* Panel 1600x1200 */ | ||
173 | struct io_reg K400_LCD_RES_6X4_16X12[] = { | ||
174 | /*IGA2 Horizontal Total */ | ||
175 | {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08}, | ||
176 | /*IGA2 Horizontal Blank End */ | ||
177 | {VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00}, | ||
178 | {VIACR, CR5D, 0x40, 0x40}, | ||
179 | /*IGA2 Horizontal Total Shadow */ | ||
180 | {VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00}, | ||
181 | /*IGA2 Horizontal Blank End Shadow */ | ||
182 | {VIACR, CR6E, 0xFF, 0x5E}, | ||
183 | /*IGA2 Offset */ | ||
184 | {VIACR, CR66, 0xFF, 0xDA}, {VIACR, CR67, 0x03, 0x00}, | ||
185 | /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x7F} | ||
186 | }; | ||
187 | |||
188 | #define NUM_TOTAL_K400_LCD_RES_6X4_16X12 ARRAY_SIZE(K400_LCD_RES_6X4_16X12) | ||
189 | |||
190 | struct io_reg K400_LCD_RES_7X4_16X12[] = { | ||
191 | /*IGA2 Horizontal Total */ | ||
192 | {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08}, | ||
193 | /*IGA2 Horizontal Blank End */ | ||
194 | {VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00}, | ||
195 | {VIACR, CR5D, 0x40, 0x40}, | ||
196 | /*IGA2 Horizontal Total Shadow */ | ||
197 | {VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00}, | ||
198 | /*IGA2 Horizontal Blank End Shadow */ | ||
199 | {VIACR, CR6E, 0xFF, 0x78}, | ||
200 | /*IGA2 Offset */ | ||
201 | {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00}, | ||
202 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x46}, {VIASR, SR47, 0xFF, 0x3D} | ||
203 | }; | ||
204 | |||
205 | #define NUM_TOTAL_K400_LCD_RES_7X4_16X12 ARRAY_SIZE(K400_LCD_RES_7X4_16X12) | ||
206 | |||
207 | struct io_reg K400_LCD_RES_8X6_16X12[] = { | ||
208 | /*IGA2 Horizontal Total */ | ||
209 | {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, | ||
210 | /*IGA2 Horizontal Blank End */ | ||
211 | {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00}, | ||
212 | {VIACR, CR5D, 0x40, 0x40}, | ||
213 | /*IGA2 Horizontal Total Shadow */ | ||
214 | {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00}, | ||
215 | /*IGA2 Horizontal Blank End Shadow */ | ||
216 | {VIACR, CR6E, 0xFF, 0x83}, | ||
217 | /*IGA2 Offset */ | ||
218 | {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00}, | ||
219 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x85}, {VIASR, SR47, 0xFF, 0x6F} | ||
220 | }; | ||
221 | |||
222 | #define NUM_TOTAL_K400_LCD_RES_8X6_16X12 ARRAY_SIZE(K400_LCD_RES_8X6_16X12) | ||
223 | |||
224 | struct io_reg K400_LCD_RES_10X7_16X12[] = { | ||
225 | /*IGA2 Horizontal Total */ | ||
226 | {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, | ||
227 | /*IGA2 Horizontal Blank End */ | ||
228 | {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00}, | ||
229 | {VIACR, CR5D, 0x40, 0x40}, | ||
230 | /*IGA2 Horizontal Total Shadow */ | ||
231 | {VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00}, | ||
232 | /*IGA2 Horizontal Blank End Shadow */ | ||
233 | {VIACR, CR6E, 0xFF, 0xAF}, | ||
234 | /*IGA2 Offset */ | ||
235 | {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00}, | ||
236 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x45}, {VIASR, SR47, 0xFF, 0x4A} | ||
237 | }; | ||
238 | |||
239 | #define NUM_TOTAL_K400_LCD_RES_10X7_16X12 ARRAY_SIZE(K400_LCD_RES_10X7_16X12) | ||
240 | |||
241 | struct io_reg K400_LCD_RES_12X10_16X12[] = { | ||
242 | /*IGA2 Horizontal Total */ | ||
243 | {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08}, | ||
244 | /*IGA2 Horizontal Blank End */ | ||
245 | {VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00}, | ||
246 | {VIACR, CR5D, 0x40, 0x40}, | ||
247 | /*IGA2 Horizontal Total Shadow */ | ||
248 | {VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00}, | ||
249 | /*IGA2 Horizontal Blank End Shadow */ | ||
250 | {VIACR, CR6E, 0xFF, 0xD4}, | ||
251 | /*IGA2 Offset */ | ||
252 | {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00}, | ||
253 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x47}, {VIASR, SR47, 0xFF, 0x7C} | ||
254 | }; | ||
255 | |||
256 | #define NUM_TOTAL_K400_LCD_RES_12X10_16X12 ARRAY_SIZE(K400_LCD_RES_12X10_16X12) | ||
257 | |||
258 | /* Panel 1400x1050 */ | ||
259 | struct io_reg K400_LCD_RES_6X4_14X10[] = { | ||
260 | /* 640x400 */ | ||
261 | /* IGA2 Horizontal Total */ | ||
262 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, | ||
263 | /* IGA2 Horizontal Blank End */ | ||
264 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, | ||
265 | {VIACR, CR5D, 0x40, 0x24}, | ||
266 | /* IGA2 Horizontal Total Shadow */ | ||
267 | {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44}, | ||
268 | /* IGA2 Horizontal Blank End Shadow */ | ||
269 | {VIACR, CR6E, 0xFF, 0x63}, | ||
270 | /* IGA2 Offset */ | ||
271 | {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00}, | ||
272 | /* VCLK */ | ||
273 | {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19} | ||
274 | }; | ||
275 | |||
276 | #define NUM_TOTAL_K400_LCD_RES_6X4_14X10 ARRAY_SIZE(K400_LCD_RES_6X4_14X10) | ||
277 | |||
278 | struct io_reg K400_LCD_RES_8X6_14X10[] = { | ||
279 | /* 800x600 */ | ||
280 | /* IGA2 Horizontal Total */ | ||
281 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, | ||
282 | /* IGA2 Horizontal Blank End */ | ||
283 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, | ||
284 | {VIACR, CR5D, 0x40, 0x24}, | ||
285 | /* IGA2 Horizontal Total Shadow */ | ||
286 | {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44}, | ||
287 | /* IGA2 Horizontal Blank End Shadow */ | ||
288 | {VIACR, CR6E, 0xFF, 0x83}, | ||
289 | /* IGA2 Offset */ | ||
290 | {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00}, | ||
291 | /* VCLK */ | ||
292 | {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21} | ||
293 | }; | ||
294 | |||
295 | #define NUM_TOTAL_K400_LCD_RES_8X6_14X10 ARRAY_SIZE(K400_LCD_RES_8X6_14X10) | ||
296 | |||
297 | struct io_reg K400_LCD_RES_10X7_14X10[] = { | ||
298 | /* 1024x768 */ | ||
299 | /* IGA2 Horizontal Total */ | ||
300 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, | ||
301 | /* IGA2 Horizontal Blank End */ | ||
302 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, | ||
303 | {VIACR, CR5D, 0x40, 0x24}, | ||
304 | /* IGA2 Horizontal Total Shadow */ | ||
305 | {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44}, | ||
306 | /* IGA2 Horizontal Blank End Shadow */ | ||
307 | {VIACR, CR6E, 0xFF, 0xA7}, | ||
308 | /* IGA2 Offset */ | ||
309 | {VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04}, | ||
310 | /* VCLK */ | ||
311 | {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} | ||
312 | }; | ||
313 | |||
314 | #define NUM_TOTAL_K400_LCD_RES_10X7_14X10 ARRAY_SIZE(K400_LCD_RES_10X7_14X10) | ||
315 | |||
316 | struct io_reg K400_LCD_RES_12X10_14X10[] = { | ||
317 | /* 1280x768, 1280x960, 1280x1024 */ | ||
318 | /* IGA2 Horizontal Total */ | ||
319 | {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56}, | ||
320 | /* IGA2 Horizontal Blank End */ | ||
321 | {VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75}, | ||
322 | {VIACR, CR5D, 0x40, 0x24}, | ||
323 | /* IGA2 Horizontal Total Shadow */ | ||
324 | {VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44}, | ||
325 | /* IGA2 Horizontal Blank End Shadow */ | ||
326 | {VIACR, CR6E, 0xFF, 0xD2}, | ||
327 | /* IGA2 Offset */ | ||
328 | {VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04}, | ||
329 | /* VCLK */ | ||
330 | {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79} | ||
331 | }; | ||
332 | |||
333 | #define NUM_TOTAL_K400_LCD_RES_12X10_14X10 ARRAY_SIZE(K400_LCD_RES_12X10_14X10) | ||
334 | |||
335 | /* ++++++ K400 ++++++ */ | ||
336 | /* Panel 1366x768 */ | ||
337 | struct io_reg K400_LCD_RES_6X4_1366X7[] = { | ||
338 | /* 640x400 */ | ||
339 | /* IGA2 Horizontal Total */ | ||
340 | {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35}, | ||
341 | /* IGA2 Horizontal Blank End */ | ||
342 | {VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B}, | ||
343 | {VIACR, CR5D, 0x40, 0x13}, | ||
344 | /* IGA2 Horizontal Total Shadow */ | ||
345 | {VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23}, | ||
346 | /* IGA2 Horizontal Blank End Shadow */ | ||
347 | {VIACR, CR6E, 0xFF, 0x64}, | ||
348 | /* IGA2 Offset */ | ||
349 | {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, | ||
350 | /* VCLK */ | ||
351 | {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C} | ||
352 | }; | ||
353 | |||
354 | #define NUM_TOTAL_K400_LCD_RES_6X4_1366X7 ARRAY_SIZE(K400_LCD_RES_6X4_1366X7) | ||
355 | |||
356 | struct io_reg K400_LCD_RES_7X4_1366X7[] = { | ||
357 | /* IGA2 Horizontal Total */ | ||
358 | {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35}, | ||
359 | /* IGA2 Horizontal Blank End */ | ||
360 | {VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B}, | ||
361 | {VIACR, CR5D, 0x40, 0x13}, | ||
362 | /* IGA2 Horizontal Total Shadow */ | ||
363 | {VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23}, | ||
364 | /* IGA2 Horizontal Blank End Shadow */ | ||
365 | {VIACR, CR6E, 0xFF, 0x75}, | ||
366 | /* IGA2 Offset */ | ||
367 | {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00}, | ||
368 | /* VCLK */ | ||
369 | {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10} | ||
370 | }; | ||
371 | |||
372 | #define NUM_TOTAL_K400_LCD_RES_7X4_1366X7 ARRAY_SIZE(K400_LCD_RES_7X4_1366X7) | ||
373 | |||
374 | struct io_reg K400_LCD_RES_8X6_1366X7[] = { | ||
375 | /* 800x600 */ | ||
376 | /* IGA2 Horizontal Total */ | ||
377 | {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35}, | ||
378 | /* IGA2 Horizontal Blank End */ | ||
379 | {VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B}, | ||
380 | {VIACR, CR5D, 0x40, 0x13}, | ||
381 | /* IGA2 Horizontal Total Shadow */ | ||
382 | {VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23}, | ||
383 | /* IGA2 Horizontal Blank End Shadow */ | ||
384 | {VIACR, CR6E, 0xFF, 0x82}, | ||
385 | /* IGA2 Offset */ | ||
386 | {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, | ||
387 | /* VCLK */ | ||
388 | {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9} | ||
389 | }; | ||
390 | |||
391 | #define NUM_TOTAL_K400_LCD_RES_8X6_1366X7 ARRAY_SIZE(K400_LCD_RES_8X6_1366X7) | ||
392 | |||
393 | struct io_reg K400_LCD_RES_10X7_1366X7[] = { | ||
394 | /* 1024x768 */ | ||
395 | /* IGA2 Horizontal Total */ | ||
396 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, | ||
397 | /* IGA2 Horizontal Blank End */ | ||
398 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, | ||
399 | {VIACR, CR5D, 0x40, 0x24}, | ||
400 | /* IGA2 Horizontal Total Shadow */ | ||
401 | {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44}, | ||
402 | /* IGA2 Horizontal Blank End Shadow */ | ||
403 | {VIACR, CR6E, 0xFF, 0xA7}, | ||
404 | /* IGA2 Offset */ | ||
405 | {VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04}, | ||
406 | /* VCLK */ | ||
407 | {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} | ||
408 | }; | ||
409 | |||
410 | #define NUM_TOTAL_K400_LCD_RES_10X7_1366X7 ARRAY_SIZE(K400_LCD_RES_10X7_1366X7) | ||
411 | |||
412 | struct io_reg K400_LCD_RES_12X10_1366X7[] = { | ||
413 | /* 1280x768, 1280x960, 1280x1024 */ | ||
414 | /* IGA2 Horizontal Total */ | ||
415 | {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56}, | ||
416 | /* IGA2 Horizontal Blank End */ | ||
417 | {VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75}, | ||
418 | {VIACR, CR5D, 0x40, 0x24}, | ||
419 | /* IGA2 Horizontal Total Shadow */ | ||
420 | {VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44}, | ||
421 | /* IGA2 Horizontal Blank End Shadow */ | ||
422 | {VIACR, CR6E, 0xFF, 0xD2}, | ||
423 | /* IGA2 Offset */ | ||
424 | {VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04}, | ||
425 | /* VCLK */ | ||
426 | {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79} | ||
427 | }; | ||
428 | |||
429 | #define NUM_TOTAL_K400_LCD_RES_12X10_1366X7\ | ||
430 | ARRAY_SIZE(K400_LCD_RES_12X10_1366X7) | ||
431 | |||
432 | /* ++++++ K400 ++++++ */ | ||
433 | /* Panel 1280x1024 */ | ||
434 | struct io_reg K400_LCD_RES_6X4_12X10[] = { | ||
435 | /*IGA2 Horizontal Total */ | ||
436 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, | ||
437 | /*IGA2 Horizontal Blank End */ | ||
438 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74}, | ||
439 | {VIACR, CR5D, 0x40, 0x1C}, | ||
440 | /*IGA2 Horizontal Total Shadow */ | ||
441 | {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x34}, | ||
442 | /*IGA2 Horizontal Blank End Shadow */ | ||
443 | {VIACR, CR6E, 0xFF, 0x63}, | ||
444 | /*IGA2 Offset */ | ||
445 | {VIACR, CR66, 0xFF, 0xAA}, {VIACR, CR67, 0x03, 0x00}, | ||
446 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19} | ||
447 | }; | ||
448 | |||
449 | #define NUM_TOTAL_K400_LCD_RES_6X4_12X10 ARRAY_SIZE(K400_LCD_RES_6X4_12X10) | ||
450 | |||
451 | struct io_reg K400_LCD_RES_7X4_12X10[] = { | ||
452 | /*IGA2 Horizontal Total */ | ||
453 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, | ||
454 | /*IGA2 Horizontal Blank End */ | ||
455 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74}, | ||
456 | {VIACR, CR5D, 0x40, 0x1C}, | ||
457 | /*IGA2 Horizontal Total Shadow */ | ||
458 | {VIACR, CR6D, 0xFF, 0x68}, {VIACR, CR71, 0x08, 0x34}, | ||
459 | /*IGA2 Horizontal Blank End Shadow */ | ||
460 | {VIACR, CR6E, 0xFF, 0x6C}, | ||
461 | /*IGA2 Offset */ | ||
462 | {VIACR, CR66, 0xFF, 0xA8}, {VIACR, CR67, 0x03, 0x00}, | ||
463 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0xED} | ||
464 | }; | ||
465 | |||
466 | #define NUM_TOTAL_K400_LCD_RES_7X4_12X10 ARRAY_SIZE(K400_LCD_RES_7X4_12X10) | ||
467 | |||
468 | struct io_reg K400_LCD_RES_8X6_12X10[] = { | ||
469 | /*IGA2 Horizontal Total */ | ||
470 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, | ||
471 | /*IGA2 Horizontal Blank End */ | ||
472 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74}, | ||
473 | {VIACR, CR5D, 0x40, 0x1C}, | ||
474 | /*IGA2 Horizontal Total Shadow */ | ||
475 | {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x34}, | ||
476 | /*IGA2 Horizontal Blank End Shadow */ | ||
477 | {VIACR, CR6E, 0xFF, 0x83}, | ||
478 | /*IGA2 Offset */ | ||
479 | {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00}, | ||
480 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21} | ||
481 | }; | ||
482 | |||
483 | #define NUM_TOTAL_K400_LCD_RES_8X6_12X10 ARRAY_SIZE(K400_LCD_RES_8X6_12X10) | ||
484 | |||
485 | struct io_reg K400_LCD_RES_10X7_12X10[] = { | ||
486 | /*IGA2 Horizontal Total */ | ||
487 | {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, | ||
488 | /*IGA2 Horizontal Blank End */ | ||
489 | {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74}, | ||
490 | {VIACR, CR5D, 0x40, 0x1C}, | ||
491 | /*IGA2 Horizontal Total Shadow */ | ||
492 | {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x34}, | ||
493 | /*IGA2 Horizontal Blank End Shadow */ | ||
494 | {VIACR, CR6E, 0xFF, 0xA7}, | ||
495 | /*IGA2 Offset */ | ||
496 | {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x04}, | ||
497 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} | ||
498 | }; | ||
499 | |||
500 | #define NUM_TOTAL_K400_LCD_RES_10X7_12X10 ARRAY_SIZE(K400_LCD_RES_10X7_12X10) | ||
501 | |||
502 | /* ++++++ K400 ++++++ */ | ||
503 | /* Panel 1024x768 */ | ||
504 | struct io_reg K400_LCD_RES_6X4_10X7[] = { | ||
505 | /*IGA2 Horizontal Total */ | ||
506 | {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35}, | ||
507 | /*IGA2 Horizontal Blank End */ | ||
508 | {VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B}, | ||
509 | {VIACR, CR5D, 0x40, 0x13}, | ||
510 | /*IGA2 Horizontal Total Shadow */ | ||
511 | {VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23}, | ||
512 | /*IGA2 Horizontal Blank End Shadow */ | ||
513 | {VIACR, CR6E, 0xFF, 0x64}, | ||
514 | /*IGA2 Offset */ | ||
515 | {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, | ||
516 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C} | ||
517 | }; | ||
518 | |||
519 | #define NUM_TOTAL_K400_LCD_RES_6X4_10X7 ARRAY_SIZE(K400_LCD_RES_6X4_10X7) | ||
520 | |||
521 | struct io_reg K400_LCD_RES_7X4_10X7[] = { | ||
522 | /*IGA2 Horizontal Total */ | ||
523 | {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35}, | ||
524 | /*IGA2 Horizontal Blank End */ | ||
525 | {VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B}, | ||
526 | {VIACR, CR5D, 0x40, 0x13}, | ||
527 | /*IGA2 Horizontal Total Shadow */ | ||
528 | {VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23}, | ||
529 | /*IGA2 Horizontal Blank End Shadow */ | ||
530 | {VIACR, CR6E, 0xFF, 0x75}, | ||
531 | /*IGA2 Offset */ | ||
532 | {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00}, | ||
533 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10} | ||
534 | }; | ||
535 | |||
536 | #define NUM_TOTAL_K400_LCD_RES_7X4_10X7 ARRAY_SIZE(K400_LCD_RES_7X4_10X7) | ||
537 | |||
538 | struct io_reg K400_LCD_RES_8X6_10X7[] = { | ||
539 | /*IGA2 Horizontal Total */ | ||
540 | {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35}, | ||
541 | /*IGA2 Horizontal Blank End */ | ||
542 | {VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B}, | ||
543 | {VIACR, CR5D, 0x40, 0x13}, | ||
544 | /*IGA2 Horizontal Total Shadow */ | ||
545 | {VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23}, | ||
546 | /*IGA2 Horizontal Blank End Shadow */ | ||
547 | {VIACR, CR6E, 0xFF, 0x82}, | ||
548 | /*IGA2 Offset */ | ||
549 | {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, | ||
550 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9} | ||
551 | }; | ||
552 | |||
553 | #define NUM_TOTAL_K400_LCD_RES_8X6_10X7 ARRAY_SIZE(K400_LCD_RES_8X6_10X7) | ||
554 | |||
555 | /* ++++++ K400 ++++++ */ | ||
556 | /* Panel 800x600 */ | ||
557 | struct io_reg K400_LCD_RES_6X4_8X6[] = { | ||
558 | /*IGA2 Horizontal Total */ | ||
559 | {VIACR, CR50, 0xFF, 0x1A}, {VIACR, CR55, 0x0F, 0x34}, | ||
560 | /*IGA2 Horizontal Blank End */ | ||
561 | {VIACR, CR53, 0xFF, 0x1A}, {VIACR, CR54, 0x38, 0xE3}, | ||
562 | {VIACR, CR5D, 0x40, 0x12}, | ||
563 | /*IGA2 Horizontal Total Shadow */ | ||
564 | {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x22}, | ||
565 | /*IGA2 Horizontal Blank End Shadow */ | ||
566 | {VIACR, CR6E, 0xFF, 0x63}, | ||
567 | /*IGA2 Offset */ | ||
568 | {VIACR, CR66, 0xFF, 0x6E}, {VIACR, CR67, 0x03, 0x00}, | ||
569 | /*VCLK*/ {VIASR, SR46, 0xFF, 0x86}, {VIASR, SR47, 0xFF, 0xB3} | ||
570 | }; | ||
571 | |||
572 | #define NUM_TOTAL_K400_LCD_RES_6X4_8X6 ARRAY_SIZE(K400_LCD_RES_6X4_8X6) | ||
573 | |||
574 | struct io_reg K400_LCD_RES_7X4_8X6[] = { | ||
575 | /*IGA2 Horizontal Total */ | ||
576 | {VIACR, CR50, 0xFF, 0x1F}, {VIACR, CR55, 0x0F, 0x34}, | ||
577 | /*IGA2 Horizontal Blank End */ | ||
578 | {VIACR, CR53, 0xFF, 0x1F}, {VIACR, CR54, 0x38, 0xE3}, | ||
579 | {VIACR, CR5D, 0x40, 0x12}, | ||
580 | /*IGA2 Horizontal Total Shadow */ | ||
581 | {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x22}, | ||
582 | /*IGA2 Horizontal Blank End Shadow */ | ||
583 | {VIACR, CR6E, 0xFF, 0x83}, | ||
584 | /*IGA2 Offset */ | ||
585 | {VIACR, CR66, 0xFF, 0x78}, {VIACR, CR67, 0x03, 0x00}, | ||
586 | /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x59} | ||
587 | }; | ||
588 | |||
589 | #define NUM_TOTAL_K400_LCD_RES_7X4_8X6 ARRAY_SIZE(K400_LCD_RES_7X4_8X6) | ||
590 | |||
591 | #endif /* __LCDTBL_H__ */ | ||