diff options
Diffstat (limited to 'drivers/video/via/lcd.c')
-rw-r--r-- | drivers/video/via/lcd.c | 21 |
1 files changed, 8 insertions, 13 deletions
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 02cfdc8d7edd..6e52711e9639 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c | |||
@@ -53,9 +53,6 @@ static void __devinit fp_id_to_vindex(int panel_id); | |||
53 | static int lvds_register_read(int index); | 53 | static int lvds_register_read(int index); |
54 | static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, | 54 | static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, |
55 | int panel_vres); | 55 | int panel_vres); |
56 | static void via_pitch_alignment_patch_lcd( | ||
57 | struct lvds_setting_information *plvds_setting_info, | ||
58 | struct lvds_chip_information *plvds_chip_info, int hres); | ||
59 | static void lcd_patch_skew_dvp0(struct lvds_setting_information | 56 | static void lcd_patch_skew_dvp0(struct lvds_setting_information |
60 | *plvds_setting_info, | 57 | *plvds_setting_info, |
61 | struct lvds_chip_information *plvds_chip_info); | 58 | struct lvds_chip_information *plvds_chip_info); |
@@ -453,19 +450,17 @@ static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, | |||
453 | } | 450 | } |
454 | } | 451 | } |
455 | 452 | ||
456 | static void via_pitch_alignment_patch_lcd( | 453 | static void via_pitch_alignment_patch_lcd(int iga_path, int hres, int bpp) |
457 | struct lvds_setting_information *plvds_setting_info, | ||
458 | struct lvds_chip_information *plvds_chip_info, int hres) | ||
459 | { | 454 | { |
460 | unsigned char cr13, cr35, cr65, cr66, cr67; | 455 | unsigned char cr13, cr35, cr65, cr66, cr67; |
461 | unsigned long dwScreenPitch = 0; | 456 | unsigned long dwScreenPitch = 0; |
462 | unsigned long dwPitch; | 457 | unsigned long dwPitch; |
463 | 458 | ||
464 | dwPitch = hres * (plvds_setting_info->bpp >> 3); | 459 | dwPitch = hres * (bpp >> 3); |
465 | if (dwPitch & 0x1F) { | 460 | if (dwPitch & 0x1F) { |
466 | dwScreenPitch = ((dwPitch + 31) & ~31) >> 3; | 461 | dwScreenPitch = ((dwPitch + 31) & ~31) >> 3; |
467 | if (plvds_setting_info->iga_path == IGA2) { | 462 | if (iga_path == IGA2) { |
468 | if (plvds_setting_info->bpp > 8) { | 463 | if (bpp > 8) { |
469 | cr66 = (unsigned char)(dwScreenPitch & 0xFF); | 464 | cr66 = (unsigned char)(dwScreenPitch & 0xFF); |
470 | viafb_write_reg(CR66, VIACR, cr66); | 465 | viafb_write_reg(CR66, VIACR, cr66); |
471 | cr67 = viafb_read_reg(VIACR, CR67) & 0xFC; | 466 | cr67 = viafb_read_reg(VIACR, CR67) & 0xFC; |
@@ -483,7 +478,7 @@ static void via_pitch_alignment_patch_lcd( | |||
483 | cr65 += 2; | 478 | cr65 += 2; |
484 | viafb_write_reg(CR65, VIACR, cr65); | 479 | viafb_write_reg(CR65, VIACR, cr65); |
485 | } else { | 480 | } else { |
486 | if (plvds_setting_info->bpp > 8) { | 481 | if (bpp > 8) { |
487 | cr13 = (unsigned char)(dwScreenPitch & 0xFF); | 482 | cr13 = (unsigned char)(dwScreenPitch & 0xFF); |
488 | viafb_write_reg(CR13, VIACR, cr13); | 483 | viafb_write_reg(CR13, VIACR, cr13); |
489 | cr35 = viafb_read_reg(VIACR, CR35) & 0x1F; | 484 | cr35 = viafb_read_reg(VIACR, CR35) & 0x1F; |
@@ -551,7 +546,7 @@ void viafb_lcd_set_mode(const struct fb_var_screeninfo *var, u16 cxres, | |||
551 | struct lvds_chip_information *plvds_chip_info) | 546 | struct lvds_chip_information *plvds_chip_info) |
552 | { | 547 | { |
553 | int set_iga = plvds_setting_info->iga_path; | 548 | int set_iga = plvds_setting_info->iga_path; |
554 | int mode_bpp = plvds_setting_info->bpp; | 549 | int mode_bpp = var->bits_per_pixel; |
555 | int set_hres = cxres ? cxres : var->xres; | 550 | int set_hres = cxres ? cxres : var->xres; |
556 | int set_vres = cyres ? cyres : var->yres; | 551 | int set_vres = cyres ? cyres : var->yres; |
557 | int panel_hres = plvds_setting_info->lcd_panel_hres; | 552 | int panel_hres = plvds_setting_info->lcd_panel_hres; |
@@ -612,8 +607,8 @@ void viafb_lcd_set_mode(const struct fb_var_screeninfo *var, u16 cxres, | |||
612 | viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); | 607 | viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); |
613 | 608 | ||
614 | /* Patch for non 32bit alignment mode */ | 609 | /* Patch for non 32bit alignment mode */ |
615 | via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info, | 610 | via_pitch_alignment_patch_lcd(plvds_setting_info->iga_path, set_hres, |
616 | set_hres); | 611 | var->bits_per_pixel); |
617 | } | 612 | } |
618 | 613 | ||
619 | static void integrated_lvds_disable(struct lvds_setting_information | 614 | static void integrated_lvds_disable(struct lvds_setting_information |