diff options
Diffstat (limited to 'drivers/video/via/hw.c')
-rw-r--r-- | drivers/video/via/hw.c | 107 |
1 files changed, 48 insertions, 59 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index d7b9a9f32dee..6845c82db3cb 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c | |||
@@ -1467,49 +1467,40 @@ void viafb_set_vclock(u32 clk, int set_iga) | |||
1467 | via_write_misc_reg_mask(0x0C, 0x0C); /* select external clock */ | 1467 | via_write_misc_reg_mask(0x0C, 0x0C); /* select external clock */ |
1468 | } | 1468 | } |
1469 | 1469 | ||
1470 | void viafb_fill_crtc_timing(struct VideoModeTable *video_mode, int bpp_byte, | 1470 | static struct display_timing var_to_timing(const struct fb_var_screeninfo *var) |
1471 | int set_iga) | ||
1472 | { | 1471 | { |
1473 | struct crt_mode_table *crt_table = video_mode->crtc; | 1472 | struct display_timing timing; |
1474 | struct display_timing crt_reg; | 1473 | |
1475 | int i; | 1474 | timing.hor_addr = var->xres; |
1476 | int index = 0; | 1475 | timing.hor_sync_start = timing.hor_addr + var->right_margin; |
1477 | int h_addr, v_addr; | 1476 | timing.hor_sync_end = timing.hor_sync_start + var->hsync_len; |
1478 | u32 clock, refresh = viafb_refresh; | 1477 | timing.hor_total = timing.hor_sync_end + var->left_margin; |
1479 | 1478 | timing.hor_blank_start = timing.hor_addr; | |
1480 | if (viafb_SAMM_ON && set_iga == IGA2) | 1479 | timing.hor_blank_end = timing.hor_total; |
1481 | refresh = viafb_refresh1; | 1480 | timing.ver_addr = var->yres; |
1482 | 1481 | timing.ver_sync_start = timing.ver_addr + var->lower_margin; | |
1483 | for (i = 0; i < video_mode->mode_array; i++) { | 1482 | timing.ver_sync_end = timing.ver_sync_start + var->vsync_len; |
1484 | index = i; | 1483 | timing.ver_total = timing.ver_sync_end + var->upper_margin; |
1484 | timing.ver_blank_start = timing.ver_addr; | ||
1485 | timing.ver_blank_end = timing.ver_total; | ||
1486 | return timing; | ||
1487 | } | ||
1485 | 1488 | ||
1486 | if (crt_table[i].refresh_rate == refresh) | 1489 | void viafb_fill_crtc_timing(const struct fb_var_screeninfo *var, int iga) |
1487 | break; | 1490 | { |
1488 | } | 1491 | struct display_timing crt_reg = var_to_timing(var); |
1489 | 1492 | ||
1490 | crt_reg = crt_table[index].crtc; | 1493 | if (iga == IGA1) |
1491 | crt_reg.hor_blank_end += crt_reg.hor_blank_start; | ||
1492 | crt_reg.hor_sync_end += crt_reg.hor_sync_start; | ||
1493 | crt_reg.ver_blank_end += crt_reg.ver_blank_start; | ||
1494 | crt_reg.ver_sync_end += crt_reg.ver_sync_start; | ||
1495 | h_addr = crt_reg.hor_addr; | ||
1496 | v_addr = crt_reg.ver_addr; | ||
1497 | if (set_iga == IGA1) | ||
1498 | via_set_primary_timing(&crt_reg); | 1494 | via_set_primary_timing(&crt_reg); |
1499 | else if (set_iga == IGA2) | 1495 | else if (iga == IGA2) |
1500 | via_set_secondary_timing(&crt_reg); | 1496 | via_set_secondary_timing(&crt_reg); |
1501 | 1497 | ||
1502 | viafb_load_fetch_count_reg(h_addr, bpp_byte, set_iga); | 1498 | viafb_load_fetch_count_reg(var->xres, var->bits_per_pixel / 8, iga); |
1503 | 1499 | if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266 | |
1504 | /* load FIFO */ | 1500 | && viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400) |
1505 | if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) | 1501 | viafb_load_FIFO_reg(iga, var->xres, var->yres); |
1506 | && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) | ||
1507 | viafb_load_FIFO_reg(set_iga, h_addr, v_addr); | ||
1508 | |||
1509 | clock = crt_reg.hor_total * crt_reg.ver_total | ||
1510 | * crt_table[index].refresh_rate; | ||
1511 | viafb_set_vclock(clock, set_iga); | ||
1512 | 1502 | ||
1503 | viafb_set_vclock(PICOS2KHZ(var->pixclock) * 1000, iga); | ||
1513 | } | 1504 | } |
1514 | 1505 | ||
1515 | void __devinit viafb_init_chip_info(int chip_type) | 1506 | void __devinit viafb_init_chip_info(int chip_type) |
@@ -1788,6 +1779,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, | |||
1788 | u8 value, index, mask; | 1779 | u8 value, index, mask; |
1789 | struct crt_mode_table *crt_timing; | 1780 | struct crt_mode_table *crt_timing; |
1790 | struct crt_mode_table *crt_timing1 = NULL; | 1781 | struct crt_mode_table *crt_timing1 = NULL; |
1782 | struct fb_var_screeninfo var2; | ||
1791 | 1783 | ||
1792 | device_screen_off(); | 1784 | device_screen_off(); |
1793 | crt_timing = vmode_tbl->crtc; | 1785 | crt_timing = vmode_tbl->crtc; |
@@ -1894,17 +1886,24 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, | |||
1894 | 1886 | ||
1895 | /* Clear On Screen */ | 1887 | /* Clear On Screen */ |
1896 | 1888 | ||
1889 | if (viafb_dual_fb) { | ||
1890 | var2 = viafbinfo1->var; | ||
1891 | } else if (viafb_SAMM_ON) { | ||
1892 | viafb_fill_var_timing_info(&var2, viafb_get_best_mode( | ||
1893 | vmode_tbl1->crtc->crtc.hor_addr, | ||
1894 | vmode_tbl1->crtc->crtc.ver_addr, viafb_refresh1)); | ||
1895 | var2.bits_per_pixel = viafbinfo->var.bits_per_pixel; | ||
1896 | } | ||
1897 | |||
1897 | /* CRT set mode */ | 1898 | /* CRT set mode */ |
1898 | if (viafb_CRT_ON) { | 1899 | if (viafb_CRT_ON) { |
1899 | if (viafb_SAMM_ON && | 1900 | if (viaparinfo->shared->iga2_devices & VIA_CRT |
1900 | viaparinfo->shared->iga2_devices & VIA_CRT) { | 1901 | && viafb_SAMM_ON) |
1901 | viafb_fill_crtc_timing(vmode_tbl1, video_bpp1 / 8, | 1902 | viafb_fill_crtc_timing(&var2, IGA2); |
1902 | IGA2); | 1903 | else |
1903 | } else { | 1904 | viafb_fill_crtc_timing(&viafbinfo->var, |
1904 | viafb_fill_crtc_timing(vmode_tbl, video_bpp / 8, | ||
1905 | (viaparinfo->shared->iga1_devices & VIA_CRT) | 1905 | (viaparinfo->shared->iga1_devices & VIA_CRT) |
1906 | ? IGA1 : IGA2); | 1906 | ? IGA1 : IGA2); |
1907 | } | ||
1908 | 1907 | ||
1909 | /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode | 1908 | /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode |
1910 | to 8 alignment (1368),there is several pixels (2 pixels) | 1909 | to 8 alignment (1368),there is several pixels (2 pixels) |
@@ -1918,22 +1917,12 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, | |||
1918 | } | 1917 | } |
1919 | 1918 | ||
1920 | if (viafb_DVI_ON) { | 1919 | if (viafb_DVI_ON) { |
1921 | if (viafb_SAMM_ON && | 1920 | if (viaparinfo->shared->tmds_setting_info.iga_path == IGA2 |
1922 | (viaparinfo->tmds_setting_info->iga_path == IGA2)) { | 1921 | && viafb_SAMM_ON) |
1923 | viafb_dvi_set_mode(viafb_get_mode | 1922 | viafb_dvi_set_mode(&var2, IGA2); |
1924 | (viaparinfo->tmds_setting_info->h_active, | 1923 | else |
1925 | viaparinfo->tmds_setting_info-> | 1924 | viafb_dvi_set_mode(&viafbinfo->var, |
1926 | v_active), | 1925 | viaparinfo->tmds_setting_info->iga_path); |
1927 | video_bpp1, viaparinfo-> | ||
1928 | tmds_setting_info->iga_path); | ||
1929 | } else { | ||
1930 | viafb_dvi_set_mode(viafb_get_mode | ||
1931 | (viaparinfo->tmds_setting_info->h_active, | ||
1932 | viaparinfo-> | ||
1933 | tmds_setting_info->v_active), | ||
1934 | video_bpp, viaparinfo-> | ||
1935 | tmds_setting_info->iga_path); | ||
1936 | } | ||
1937 | } | 1926 | } |
1938 | 1927 | ||
1939 | if (viafb_LCD_ON) { | 1928 | if (viafb_LCD_ON) { |