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path: root/drivers/video/via/hw.c
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-rw-r--r--drivers/video/via/hw.c740
1 files changed, 350 insertions, 390 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 6cb3b5626f0d..5728fd76bc11 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -22,342 +22,272 @@
22#include <linux/via-core.h> 22#include <linux/via-core.h>
23#include "global.h" 23#include "global.h"
24 24
25static struct pll_map pll_value[] = { 25static struct pll_config cle266_pll_config[] = {
26 {25175000, 26 {19, 4, 0},
27 {99, 7, 3}, 27 {26, 5, 0},
28 {85, 3, 4}, /* ignoring bit difference: 0x00008000 */ 28 {28, 5, 0},
29 {141, 5, 4}, 29 {31, 5, 0},
30 {141, 5, 4} }, 30 {33, 5, 0},
31 {29581000, 31 {55, 5, 0},
32 {33, 4, 2}, 32 {102, 5, 0},
33 {66, 2, 4}, /* ignoring bit difference: 0x00808000 */ 33 {53, 6, 0},
34 {166, 5, 4}, /* ignoring bit difference: 0x00008000 */ 34 {92, 6, 0},
35 {165, 5, 4} }, 35 {98, 6, 0},
36 {26880000, 36 {112, 6, 0},
37 {15, 4, 1}, 37 {41, 7, 0},
38 {30, 2, 3}, /* ignoring bit difference: 0x00808000 */ 38 {60, 7, 0},
39 {150, 5, 4}, 39 {99, 7, 0},
40 {150, 5, 4} }, 40 {100, 7, 0},
41 {31500000, 41 {83, 8, 0},
42 {53, 3, 3}, /* ignoring bit difference: 0x00008000 */ 42 {86, 8, 0},
43 {141, 4, 4}, /* ignoring bit difference: 0x00008000 */ 43 {108, 8, 0},
44 {176, 5, 4}, 44 {87, 9, 0},
45 {176, 5, 4} }, 45 {118, 9, 0},
46 {31728000, 46 {95, 12, 0},
47 {31, 7, 1}, 47 {115, 12, 0},
48 {177, 5, 4}, /* ignoring bit difference: 0x00008000 */ 48 {108, 13, 0},
49 {177, 5, 4}, 49 {83, 17, 0},
50 {142, 4, 4} }, 50 {67, 20, 0},
51 {32688000, 51 {86, 20, 0},
52 {73, 4, 3}, 52 {98, 20, 0},
53 {146, 4, 4}, /* ignoring bit difference: 0x00008000 */ 53 {121, 24, 0},
54 {183, 5, 4}, 54 {99, 29, 0},
55 {146, 4, 4} }, 55 {33, 3, 1},
56 {36000000, 56 {15, 4, 1},
57 {101, 5, 3}, /* ignoring bit difference: 0x00008000 */ 57 {23, 4, 1},
58 {161, 4, 4}, /* ignoring bit difference: 0x00008000 */ 58 {37, 5, 1},
59 {202, 5, 4}, 59 {83, 5, 1},
60 {161, 4, 4} }, 60 {85, 5, 1},
61 {40000000, 61 {94, 5, 1},
62 {89, 4, 3}, 62 {103, 5, 1},
63 {89, 4, 3}, /* ignoring bit difference: 0x00008000 */ 63 {109, 5, 1},
64 {112, 5, 3}, 64 {113, 5, 1},
65 {112, 5, 3} }, 65 {121, 5, 1},
66 {41291000, 66 {82, 6, 1},
67 {23, 4, 1}, 67 {31, 7, 1},
68 {69, 3, 3}, /* ignoring bit difference: 0x00008000 */ 68 {55, 7, 1},
69 {115, 5, 3}, 69 {84, 7, 1},
70 {115, 5, 3} }, 70 {83, 8, 1},
71 {43163000, 71 {76, 9, 1},
72 {121, 5, 3}, 72 {127, 9, 1},
73 {121, 5, 3}, /* ignoring bit difference: 0x00008000 */ 73 {33, 4, 2},
74 {121, 5, 3}, 74 {75, 4, 2},
75 {121, 5, 3} }, 75 {119, 4, 2},
76 {45250000, 76 {121, 4, 2},
77 {127, 5, 3}, 77 {91, 5, 2},
78 {127, 5, 3}, /* ignoring bit difference: 0x00808000 */ 78 {118, 5, 2},
79 {127, 5, 3}, 79 {83, 6, 2},
80 {127, 5, 3} }, 80 {109, 6, 2},
81 {46000000, 81 {90, 7, 2},
82 {90, 7, 2}, 82 {93, 2, 3},
83 {103, 4, 3}, /* ignoring bit difference: 0x00008000 */ 83 {53, 3, 3},
84 {129, 5, 3}, 84 {73, 4, 3},
85 {103, 4, 3} }, 85 {89, 4, 3},
86 {46996000, 86 {105, 4, 3},
87 {105, 4, 3}, /* ignoring bit difference: 0x00008000 */ 87 {117, 4, 3},
88 {131, 5, 3}, /* ignoring bit difference: 0x00808000 */ 88 {101, 5, 3},
89 {131, 5, 3}, /* ignoring bit difference: 0x00808000 */ 89 {121, 5, 3},
90 {105, 4, 3} }, 90 {127, 5, 3},
91 {48000000, 91 {99, 7, 3}
92 {67, 20, 0}, 92};
93 {134, 5, 3}, /* ignoring bit difference: 0x00808000 */ 93
94 {134, 5, 3}, 94static struct pll_config k800_pll_config[] = {
95 {134, 5, 3} }, 95 {22, 2, 0},
96 {48875000, 96 {28, 3, 0},
97 {99, 29, 0}, 97 {81, 3, 1},
98 {82, 3, 3}, /* ignoring bit difference: 0x00808000 */ 98 {85, 3, 1},
99 {82, 3, 3}, /* ignoring bit difference: 0x00808000 */ 99 {98, 3, 1},
100 {137, 5, 3} }, 100 {112, 3, 1},
101 {49500000, 101 {86, 4, 1},
102 {83, 6, 2}, 102 {166, 4, 1},
103 {83, 3, 3}, /* ignoring bit difference: 0x00008000 */ 103 {109, 5, 1},
104 {138, 5, 3}, 104 {113, 5, 1},
105 {83, 3, 3} }, 105 {121, 5, 1},
106 {52406000, 106 {131, 5, 1},
107 {117, 4, 3}, 107 {143, 5, 1},
108 {117, 4, 3}, /* ignoring bit difference: 0x00008000 */ 108 {153, 5, 1},
109 {117, 4, 3}, 109 {66, 3, 2},
110 {88, 3, 3} }, 110 {68, 3, 2},
111 {52977000, 111 {95, 3, 2},
112 {37, 5, 1}, 112 {106, 3, 2},
113 {148, 5, 3}, /* ignoring bit difference: 0x00808000 */ 113 {116, 3, 2},
114 {148, 5, 3}, 114 {93, 4, 2},
115 {148, 5, 3} }, 115 {119, 4, 2},
116 {56250000, 116 {121, 4, 2},
117 {55, 7, 1}, /* ignoring bit difference: 0x00008000 */ 117 {133, 4, 2},
118 {126, 4, 3}, /* ignoring bit difference: 0x00008000 */ 118 {137, 4, 2},
119 {157, 5, 3}, 119 {117, 5, 2},
120 {157, 5, 3} }, 120 {118, 5, 2},
121 {57275000, 121 {120, 5, 2},
122 {0, 0, 0}, 122 {124, 5, 2},
123 {2, 2, 0}, 123 {132, 5, 2},
124 {2, 2, 0}, 124 {137, 5, 2},
125 {157, 5, 3} }, /* ignoring bit difference: 0x00808000 */ 125 {141, 5, 2},
126 {60466000, 126 {166, 5, 2},
127 {76, 9, 1}, 127 {170, 5, 2},
128 {169, 5, 3}, /* ignoring bit difference: 0x00808000 */ 128 {191, 5, 2},
129 {169, 5, 3}, /* FIXED: old = {72, 2, 3} */ 129 {206, 5, 2},
130 {169, 5, 3} }, 130 {208, 5, 2},
131 {61500000, 131 {30, 2, 3},
132 {86, 20, 0}, 132 {69, 3, 3},
133 {172, 5, 3}, /* ignoring bit difference: 0x00808000 */ 133 {82, 3, 3},
134 {172, 5, 3}, 134 {83, 3, 3},
135 {172, 5, 3} }, 135 {109, 3, 3},
136 {65000000, 136 {114, 3, 3},
137 {109, 6, 2}, /* ignoring bit difference: 0x00008000 */ 137 {125, 3, 3},
138 {109, 3, 3}, /* ignoring bit difference: 0x00008000 */ 138 {89, 4, 3},
139 {109, 3, 3}, 139 {103, 4, 3},
140 {109, 3, 3} }, 140 {117, 4, 3},
141 {65178000, 141 {126, 4, 3},
142 {91, 5, 2}, 142 {150, 4, 3},
143 {182, 5, 3}, /* ignoring bit difference: 0x00808000 */ 143 {161, 4, 3},
144 {109, 3, 3}, 144 {121, 5, 3},
145 {182, 5, 3} }, 145 {127, 5, 3},
146 {66750000, 146 {131, 5, 3},
147 {75, 4, 2}, 147 {134, 5, 3},
148 {150, 4, 3}, /* ignoring bit difference: 0x00808000 */ 148 {148, 5, 3},
149 {150, 4, 3}, 149 {169, 5, 3},
150 {112, 3, 3} }, 150 {172, 5, 3},
151 {68179000, 151 {182, 5, 3},
152 {19, 4, 0}, 152 {195, 5, 3},
153 {114, 3, 3}, /* ignoring bit difference: 0x00008000 */ 153 {196, 5, 3},
154 {190, 5, 3}, 154 {208, 5, 3},
155 {191, 5, 3} }, 155 {66, 2, 4},
156 {69924000, 156 {85, 3, 4},
157 {83, 17, 0}, 157 {141, 4, 4},
158 {195, 5, 3}, /* ignoring bit difference: 0x00808000 */ 158 {146, 4, 4},
159 {195, 5, 3}, 159 {161, 4, 4},
160 {195, 5, 3} }, 160 {177, 5, 4}
161 {70159000, 161};
162 {98, 20, 0}, 162
163 {196, 5, 3}, /* ignoring bit difference: 0x00808000 */ 163static struct pll_config cx700_pll_config[] = {
164 {196, 5, 3}, 164 {98, 3, 1},
165 {195, 5, 3} }, 165 {86, 4, 1},
166 {72000000, 166 {109, 5, 1},
167 {121, 24, 0}, 167 {110, 5, 1},
168 {161, 4, 3}, /* ignoring bit difference: 0x00808000 */ 168 {113, 5, 1},
169 {161, 4, 3}, 169 {121, 5, 1},
170 {161, 4, 3} }, 170 {131, 5, 1},
171 {78750000, 171 {135, 5, 1},
172 {33, 3, 1}, 172 {142, 5, 1},
173 {66, 3, 2}, /* ignoring bit difference: 0x00008000 */ 173 {143, 5, 1},
174 {110, 5, 2}, 174 {153, 5, 1},
175 {110, 5, 2} }, 175 {187, 5, 1},
176 {80136000, 176 {208, 5, 1},
177 {28, 5, 0}, 177 {68, 2, 2},
178 {68, 3, 2}, /* ignoring bit difference: 0x00008000 */ 178 {95, 3, 2},
179 {112, 5, 2}, 179 {116, 3, 2},
180 {112, 5, 2} }, 180 {93, 4, 2},
181 {83375000, 181 {119, 4, 2},
182 {93, 2, 3}, 182 {133, 4, 2},
183 {93, 4, 2}, /* ignoring bit difference: 0x00800000 */ 183 {137, 4, 2},
184 {93, 4, 2}, /* ignoring bit difference: 0x00800000 */ 184 {151, 4, 2},
185 {117, 5, 2} }, 185 {166, 4, 2},
186 {83950000, 186 {110, 5, 2},
187 {41, 7, 0}, 187 {112, 5, 2},
188 {117, 5, 2}, /* ignoring bit difference: 0x00008000 */ 188 {117, 5, 2},
189 {117, 5, 2}, 189 {118, 5, 2},
190 {117, 5, 2} }, 190 {120, 5, 2},
191 {84750000, 191 {132, 5, 2},
192 {118, 5, 2}, 192 {137, 5, 2},
193 {118, 5, 2}, /* ignoring bit difference: 0x00808000 */ 193 {141, 5, 2},
194 {118, 5, 2}, 194 {151, 5, 2},
195 {118, 5, 2} }, 195 {166, 5, 2},
196 {85860000, 196 {175, 5, 2},
197 {84, 7, 1}, 197 {191, 5, 2},
198 {120, 5, 2}, /* ignoring bit difference: 0x00808000 */ 198 {206, 5, 2},
199 {120, 5, 2}, 199 {174, 7, 2},
200 {118, 5, 2} }, 200 {82, 3, 3},
201 {88750000, 201 {109, 3, 3},
202 {31, 5, 0}, 202 {117, 4, 3},
203 {124, 5, 2}, /* ignoring bit difference: 0x00808000 */ 203 {150, 4, 3},
204 {174, 7, 2}, /* ignoring bit difference: 0x00808000 */ 204 {161, 4, 3},
205 {124, 5, 2} }, 205 {112, 5, 3},
206 {94500000, 206 {115, 5, 3},
207 {33, 5, 0}, 207 {121, 5, 3},
208 {132, 5, 2}, /* ignoring bit difference: 0x00008000 */ 208 {127, 5, 3},
209 {132, 5, 2}, 209 {129, 5, 3},
210 {132, 5, 2} }, 210 {131, 5, 3},
211 {97750000, 211 {134, 5, 3},
212 {82, 6, 1}, 212 {138, 5, 3},
213 {137, 5, 2}, /* ignoring bit difference: 0x00808000 */ 213 {148, 5, 3},
214 {137, 5, 2}, 214 {157, 5, 3},
215 {137, 5, 2} }, 215 {169, 5, 3},
216 {101000000, 216 {172, 5, 3},
217 {127, 9, 1}, 217 {190, 5, 3},
218 {141, 5, 2}, /* ignoring bit difference: 0x00808000 */ 218 {195, 5, 3},
219 {141, 5, 2}, 219 {196, 5, 3},
220 {141, 5, 2} }, 220 {208, 5, 3},
221 {106500000, 221 {141, 5, 4},
222 {119, 4, 2}, 222 {150, 5, 4},
223 {119, 4, 2}, /* ignoring bit difference: 0x00808000 */ 223 {166, 5, 4},
224 {119, 4, 2}, 224 {176, 5, 4},
225 {149, 5, 2} }, 225 {177, 5, 4},
226 {108000000, 226 {183, 5, 4},
227 {121, 4, 2}, 227 {202, 5, 4}
228 {121, 4, 2}, /* ignoring bit difference: 0x00808000 */ 228};
229 {151, 5, 2}, 229
230 {151, 5, 2} }, 230static struct pll_config vx855_pll_config[] = {
231 {113309000, 231 {86, 4, 1},
232 {95, 12, 0}, 232 {108, 5, 1},
233 {95, 3, 2}, /* ignoring bit difference: 0x00808000 */ 233 {110, 5, 1},
234 {95, 3, 2}, 234 {113, 5, 1},
235 {159, 5, 2} }, 235 {121, 5, 1},
236 {118840000, 236 {131, 5, 1},
237 {83, 5, 1}, 237 {135, 5, 1},
238 {166, 5, 2}, /* ignoring bit difference: 0x00808000 */ 238 {142, 5, 1},
239 {166, 5, 2}, 239 {143, 5, 1},
240 {166, 5, 2} }, 240 {153, 5, 1},
241 {119000000, 241 {164, 5, 1},
242 {108, 13, 0}, 242 {187, 5, 1},
243 {133, 4, 2}, /* ignoring bit difference: 0x00808000 */ 243 {208, 5, 1},
244 {133, 4, 2}, 244 {110, 5, 2},
245 {167, 5, 2} }, 245 {112, 5, 2},
246 {121750000, 246 {117, 5, 2},
247 {85, 5, 1}, 247 {118, 5, 2},
248 {170, 5, 2}, /* ignoring bit difference: 0x00808000 */ 248 {124, 5, 2},
249 {68, 2, 2}, 249 {132, 5, 2},
250 {0, 0, 0} }, 250 {137, 5, 2},
251 {125104000, 251 {141, 5, 2},
252 {53, 6, 0}, /* ignoring bit difference: 0x00008000 */ 252 {149, 5, 2},
253 {106, 3, 2}, /* ignoring bit difference: 0x00008000 */ 253 {151, 5, 2},
254 {175, 5, 2}, 254 {159, 5, 2},
255 {0, 0, 0} }, 255 {166, 5, 2},
256 {135000000, 256 {167, 5, 2},
257 {94, 5, 1}, 257 {172, 5, 2},
258 {28, 3, 0}, /* ignoring bit difference: 0x00804000 */ 258 {189, 5, 2},
259 {151, 4, 2}, 259 {191, 5, 2},
260 {189, 5, 2} }, 260 {194, 5, 2},
261 {136700000, 261 {206, 5, 2},
262 {115, 12, 0}, 262 {208, 5, 2},
263 {191, 5, 2}, /* ignoring bit difference: 0x00808000 */ 263 {83, 3, 3},
264 {191, 5, 2}, 264 {88, 3, 3},
265 {191, 5, 2} }, 265 {109, 3, 3},
266 {138400000, 266 {112, 3, 3},
267 {87, 9, 0}, 267 {103, 4, 3},
268 {116, 3, 2}, /* ignoring bit difference: 0x00808000 */ 268 {105, 4, 3},
269 {116, 3, 2}, 269 {161, 4, 3},
270 {194, 5, 2} }, 270 {112, 5, 3},
271 {146760000, 271 {115, 5, 3},
272 {103, 5, 1}, 272 {121, 5, 3},
273 {206, 5, 2}, /* ignoring bit difference: 0x00808000 */ 273 {127, 5, 3},
274 {206, 5, 2}, 274 {134, 5, 3},
275 {206, 5, 2} }, 275 {137, 5, 3},
276 {153920000, 276 {148, 5, 3},
277 {86, 8, 0}, 277 {157, 5, 3},
278 {86, 4, 1}, /* ignoring bit difference: 0x00808000 */ 278 {169, 5, 3},
279 {86, 4, 1}, 279 {172, 5, 3},
280 {86, 4, 1} }, /* FIXED: old = {84, 2, 1} */ 280 {182, 5, 3},
281 {156000000, 281 {191, 5, 3},
282 {109, 5, 1}, 282 {195, 5, 3},
283 {109, 5, 1}, /* ignoring bit difference: 0x00808000 */ 283 {209, 5, 3},
284 {109, 5, 1}, 284 {142, 4, 4},
285 {108, 5, 1} }, 285 {146, 4, 4},
286 {157500000, 286 {161, 4, 4},
287 {55, 5, 0}, /* ignoring bit difference: 0x00008000 */ 287 {141, 5, 4},
288 {22, 2, 0}, /* ignoring bit difference: 0x00802000 */ 288 {150, 5, 4},
289 {110, 5, 1}, 289 {165, 5, 4},
290 {110, 5, 1} }, 290 {176, 5, 4}
291 {162000000,
292 {113, 5, 1},
293 {113, 5, 1}, /* ignoring bit difference: 0x00808000 */
294 {113, 5, 1},
295 {113, 5, 1} },
296 {187000000,
297 {118, 9, 0},
298 {131, 5, 1}, /* ignoring bit difference: 0x00808000 */
299 {131, 5, 1},
300 {131, 5, 1} },
301 {193295000,
302 {108, 8, 0},
303 {81, 3, 1}, /* ignoring bit difference: 0x00808000 */
304 {135, 5, 1},
305 {135, 5, 1} },
306 {202500000,
307 {99, 7, 0},
308 {85, 3, 1}, /* ignoring bit difference: 0x00808000 */
309 {142, 5, 1},
310 {142, 5, 1} },
311 {204000000,
312 {100, 7, 0},
313 {143, 5, 1}, /* ignoring bit difference: 0x00808000 */
314 {143, 5, 1},
315 {143, 5, 1} },
316 {218500000,
317 {92, 6, 0},
318 {153, 5, 1}, /* ignoring bit difference: 0x00808000 */
319 {153, 5, 1},
320 {153, 5, 1} },
321 {234000000,
322 {98, 6, 0},
323 {98, 3, 1}, /* ignoring bit difference: 0x00008000 */
324 {98, 3, 1},
325 {164, 5, 1} },
326 {267250000,
327 {112, 6, 0},
328 {112, 3, 1}, /* ignoring bit difference: 0x00808000 */
329 {187, 5, 1},
330 {187, 5, 1} },
331 {297500000,
332 {102, 5, 0}, /* ignoring bit difference: 0x00008000 */
333 {166, 4, 1}, /* ignoring bit difference: 0x00008000 */
334 {208, 5, 1},
335 {208, 5, 1} },
336 {74481000,
337 {26, 5, 0},
338 {125, 3, 3}, /* ignoring bit difference: 0x00808000 */
339 {208, 5, 3},
340 {209, 5, 3} },
341 {172798000,
342 {121, 5, 1},
343 {121, 5, 1}, /* ignoring bit difference: 0x00808000 */
344 {121, 5, 1},
345 {121, 5, 1} },
346 {122614000,
347 {60, 7, 0},
348 {137, 4, 2}, /* ignoring bit difference: 0x00808000 */
349 {137, 4, 2},
350 {172, 5, 2} },
351 {74270000,
352 {83, 8, 1},
353 {208, 5, 3},
354 {208, 5, 3},
355 {0, 0, 0} },
356 {148500000,
357 {83, 8, 0},
358 {208, 5, 2},
359 {166, 4, 2},
360 {208, 5, 2} }
361}; 291};
362 292
363/* according to VIA Technologies these values are based on experiment */ 293/* according to VIA Technologies these values are based on experiment */
@@ -1692,43 +1622,63 @@ static u32 vx855_encode_pll(struct pll_config pll)
1692 | pll.multiplier; 1622 | pll.multiplier;
1693} 1623}
1694 1624
1695u32 viafb_get_clk_value(int clk) 1625static inline u32 get_pll_internal_frequency(u32 ref_freq,
1626 struct pll_config pll)
1696{ 1627{
1697 u32 value = 0; 1628 return ref_freq / pll.divisor * pll.multiplier;
1698 int i = 0; 1629}
1699 1630
1700 while (i < NUM_TOTAL_PLL_TABLE && clk != pll_value[i].clk) 1631static inline u32 get_pll_output_frequency(u32 ref_freq, struct pll_config pll)
1701 i++; 1632{
1633 return get_pll_internal_frequency(ref_freq, pll)>>pll.rshift;
1634}
1702 1635
1703 if (i == NUM_TOTAL_PLL_TABLE) { 1636static struct pll_config get_pll_config(struct pll_config *config, int size,
1704 printk(KERN_WARNING "viafb_get_clk_value: PLL lookup failed!"); 1637 int clk)
1705 } else { 1638{
1706 switch (viaparinfo->chip_info->gfx_chip_name) { 1639 struct pll_config best = config[0];
1707 case UNICHROME_CLE266: 1640 const u32 f0 = 14318180; /* X1 frequency */
1708 case UNICHROME_K400: 1641 int i;
1709 value = cle266_encode_pll(pll_value[i].cle266_pll);
1710 break;
1711 1642
1712 case UNICHROME_K800: 1643 for (i = 1; i < size; i++) {
1713 case UNICHROME_PM800: 1644 if (abs(get_pll_output_frequency(f0, config[i]) - clk)
1714 case UNICHROME_CN700: 1645 < abs(get_pll_output_frequency(f0, best) - clk))
1715 value = k800_encode_pll(pll_value[i].k800_pll); 1646 best = config[i];
1716 break; 1647 }
1717 1648
1718 case UNICHROME_CX700: 1649 return best;
1719 case UNICHROME_CN750: 1650}
1720 case UNICHROME_K8M890:
1721 case UNICHROME_P4M890:
1722 case UNICHROME_P4M900:
1723 case UNICHROME_VX800:
1724 value = k800_encode_pll(pll_value[i].cx700_pll);
1725 break;
1726 1651
1727 case UNICHROME_VX855: 1652u32 viafb_get_clk_value(int clk)
1728 case UNICHROME_VX900: 1653{
1729 value = vx855_encode_pll(pll_value[i].vx855_pll); 1654 u32 value = 0;
1730 break; 1655
1731 } 1656 switch (viaparinfo->chip_info->gfx_chip_name) {
1657 case UNICHROME_CLE266:
1658 case UNICHROME_K400:
1659 value = cle266_encode_pll(get_pll_config(cle266_pll_config,
1660 ARRAY_SIZE(cle266_pll_config), clk));
1661 break;
1662 case UNICHROME_K800:
1663 case UNICHROME_PM800:
1664 case UNICHROME_CN700:
1665 value = k800_encode_pll(get_pll_config(k800_pll_config,
1666 ARRAY_SIZE(k800_pll_config), clk));
1667 break;
1668 case UNICHROME_CX700:
1669 case UNICHROME_CN750:
1670 case UNICHROME_K8M890:
1671 case UNICHROME_P4M890:
1672 case UNICHROME_P4M900:
1673 case UNICHROME_VX800:
1674 value = k800_encode_pll(get_pll_config(cx700_pll_config,
1675 ARRAY_SIZE(cx700_pll_config), clk));
1676 break;
1677 case UNICHROME_VX855:
1678 case UNICHROME_VX900:
1679 value = vx855_encode_pll(get_pll_config(vx855_pll_config,
1680 ARRAY_SIZE(vx855_pll_config), clk));
1681 break;
1732 } 1682 }
1733 1683
1734 return value; 1684 return value;
@@ -2052,7 +2002,7 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
2052 int i; 2002 int i;
2053 int index = 0; 2003 int index = 0;
2054 int h_addr, v_addr; 2004 int h_addr, v_addr;
2055 u32 pll_D_N; 2005 u32 pll_D_N, clock;
2056 2006
2057 for (i = 0; i < video_mode->mode_array; i++) { 2007 for (i = 0; i < video_mode->mode_array; i++) {
2058 index = i; 2008 index = i;
@@ -2105,7 +2055,9 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
2105 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) 2055 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
2106 viafb_load_FIFO_reg(set_iga, h_addr, v_addr); 2056 viafb_load_FIFO_reg(set_iga, h_addr, v_addr);
2107 2057
2108 pll_D_N = viafb_get_clk_value(crt_table[index].clk); 2058 clock = crt_reg.hor_total * crt_reg.ver_total
2059 * crt_table[index].refresh_rate;
2060 pll_D_N = viafb_get_clk_value(clock);
2109 DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N); 2061 DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N);
2110 viafb_set_vclock(pll_D_N, set_iga); 2062 viafb_set_vclock(pll_D_N, set_iga);
2111 2063
@@ -2616,35 +2568,43 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2616int viafb_get_pixclock(int hres, int vres, int vmode_refresh) 2568int viafb_get_pixclock(int hres, int vres, int vmode_refresh)
2617{ 2569{
2618 int i; 2570 int i;
2571 struct crt_mode_table *best;
2572 struct VideoModeTable *vmode = viafb_get_mode(hres, vres);
2619 2573
2620 for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { 2574 if (!vmode)
2621 if ((hres == res_map_refresh_tbl[i].hres) 2575 return RES_640X480_60HZ_PIXCLOCK;
2622 && (vres == res_map_refresh_tbl[i].vres) 2576
2623 && (vmode_refresh == res_map_refresh_tbl[i].vmode_refresh)) 2577 best = &vmode->crtc[0];
2624 return res_map_refresh_tbl[i].pixclock; 2578 for (i = 1; i < vmode->mode_array; i++) {
2579 if (abs(vmode->crtc[i].refresh_rate - vmode_refresh)
2580 < abs(best->refresh_rate - vmode_refresh))
2581 best = &vmode->crtc[i];
2625 } 2582 }
2626 return RES_640X480_60HZ_PIXCLOCK;
2627 2583
2584 return 1000000000 / (best->crtc.hor_total * best->crtc.ver_total)
2585 * 1000 / best->refresh_rate;
2628} 2586}
2629 2587
2630int viafb_get_refresh(int hres, int vres, u32 long_refresh) 2588int viafb_get_refresh(int hres, int vres, u32 long_refresh)
2631{ 2589{
2632#define REFRESH_TOLERANCE 3 2590 int i;
2633 int i, nearest = -1, diff = REFRESH_TOLERANCE; 2591 struct crt_mode_table *best;
2634 for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { 2592 struct VideoModeTable *vmode = viafb_get_mode(hres, vres);
2635 if ((hres == res_map_refresh_tbl[i].hres) 2593
2636 && (vres == res_map_refresh_tbl[i].vres) 2594 if (!vmode)
2637 && (diff > (abs(long_refresh - 2595 return 60;
2638 res_map_refresh_tbl[i].vmode_refresh)))) { 2596
2639 diff = abs(long_refresh - res_map_refresh_tbl[i]. 2597 best = &vmode->crtc[0];
2640 vmode_refresh); 2598 for (i = 1; i < vmode->mode_array; i++) {
2641 nearest = i; 2599 if (abs(vmode->crtc[i].refresh_rate - long_refresh)
2642 } 2600 < abs(best->refresh_rate - long_refresh))
2601 best = &vmode->crtc[i];
2643 } 2602 }
2644#undef REFRESH_TOLERANCE 2603
2645 if (nearest > 0) 2604 if (abs(best->refresh_rate - long_refresh) > 3)
2646 return res_map_refresh_tbl[nearest].vmode_refresh; 2605 return 60;
2647 return 60; 2606
2607 return best->refresh_rate;
2648} 2608}
2649 2609
2650static void device_off(void) 2610static void device_off(void)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 08:54:29 -0500