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path: root/drivers/video/via/hw.c
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Diffstat (limited to 'drivers/video/via/hw.c')
-rw-r--r--drivers/video/via/hw.c80
1 files changed, 17 insertions, 63 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 64a820c6d494..5be4a670596f 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -629,70 +629,23 @@ void viafb_set_iga_path(void)
629 } 629 }
630} 630}
631 631
632void viafb_set_start_addr(void) 632void viafb_set_primary_address(u32 addr)
633{ 633{
634 unsigned long offset = 0, tmp = 0, size = 0; 634 DEBUG_MSG(KERN_DEBUG "viafb_set_primary_address(0x%08X)\n", addr);
635 unsigned long length; 635 viafb_write_reg(CR0D, VIACR, addr & 0xFF);
636 636 viafb_write_reg(CR0C, VIACR, (addr >> 8) & 0xFF);
637 DEBUG_MSG(KERN_INFO "viafb_set_start_addr!\n"); 637 viafb_write_reg(CR34, VIACR, (addr >> 16) & 0xFF);
638 viafb_unlock_crt(); 638 viafb_write_reg_mask(CR48, VIACR, (addr >> 24) & 0x1F, 0x1F);
639 /* update starting address of IGA1 */ 639}
640 viafb_write_reg(CR0C, VIACR, 0x00); /*initial starting address */
641 viafb_write_reg(CR0D, VIACR, 0x00);
642 viafb_write_reg(CR34, VIACR, 0x00);
643 viafb_write_reg_mask(CR48, VIACR, 0x00, 0x1F);
644
645 if (viafb_dual_fb) {
646 viaparinfo->iga_path = IGA1;
647 viaparinfo1->iga_path = IGA2;
648 }
649
650 if (viafb_SAMM_ON == 1) {
651 if (!viafb_dual_fb) {
652 if (viafb_second_size)
653 size = viafb_second_size * 1024 * 1024;
654 else
655 size = 8 * 1024 * 1024;
656 } else {
657
658 size = viaparinfo1->memsize;
659 }
660 offset = viafb_second_offset;
661 DEBUG_MSG(KERN_INFO
662 "viafb_second_size=%lx, second start_adddress=%lx\n",
663 size, offset);
664 }
665 if (viafb_SAMM_ON == 1) {
666 offset = offset >> 3;
667
668 tmp = viafb_read_reg(VIACR, 0x62) & 0x01;
669 tmp |= (offset & 0x7F) << 1;
670 viafb_write_reg(CR62, VIACR, tmp);
671 viafb_write_reg(CR63, VIACR, ((offset & 0x7F80) >> 7));
672 viafb_write_reg(CR64, VIACR, ((offset & 0x7F8000) >> 15));
673 viafb_write_reg(CRA3, VIACR, ((offset & 0x3800000) >> 23));
674 } else {
675 /* update starting address */
676 viafb_write_reg(CR62, VIACR, 0x00);
677 viafb_write_reg(CR63, VIACR, 0x00);
678 viafb_write_reg(CR64, VIACR, 0x00);
679 viafb_write_reg(CRA3, VIACR, 0x00);
680 }
681
682 if (viafb_SAMM_ON == 1) {
683 if (viafb_accel) {
684 if (!viafb_dual_fb)
685 length = size - viaparinfo->fbmem_used;
686 else
687 length = size - viaparinfo1->fbmem_used;
688 } else
689 length = size;
690 offset = (unsigned long)(void *)viafb_FB_MM +
691 viafb_second_offset;
692 memset((void *)offset, 0, length);
693 }
694 640
695 viafb_lock_crt(); 641void viafb_set_secondary_address(u32 addr)
642{
643 DEBUG_MSG(KERN_DEBUG "viafb_set_secondary_address(0x%08X)\n", addr);
644 /* secondary display supports only quadword aligned memory */
645 viafb_write_reg_mask(CR62, VIACR, (addr >> 2) & 0xFE, 0xFE);
646 viafb_write_reg(CR63, VIACR, (addr >> 10) & 0xFF);
647 viafb_write_reg(CR64, VIACR, (addr >> 18) & 0xFF);
648 viafb_write_reg_mask(CRA3, VIACR, (addr >> 26) & 0x07, 0x07);
696} 649}
697 650
698void viafb_set_output_path(int device, int set_iga, int output_interface) 651void viafb_set_output_path(int device, int set_iga, int output_interface)
@@ -2288,7 +2241,8 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
2288 outb(VPIT.SR[i - 1], VIASR + 1); 2241 outb(VPIT.SR[i - 1], VIASR + 1);
2289 } 2242 }
2290 2243
2291 viafb_set_start_addr(); 2244 viafb_set_primary_address(0);
2245 viafb_set_secondary_address(viafb_SAMM_ON ? viafb_second_offset : 0);
2292 viafb_set_iga_path(); 2246 viafb_set_iga_path();
2293 2247
2294 /* Write CRTC */ 2248 /* Write CRTC */