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path: root/drivers/video/via/hw.c
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Diffstat (limited to 'drivers/video/via/hw.c')
-rw-r--r--drivers/video/via/hw.c96
1 files changed, 0 insertions, 96 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 1628a5f93dc2..d474fbee3350 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -624,102 +624,6 @@ void viafb_set_iga_path(void)
624 } 624 }
625} 625}
626 626
627void via_set_primary_address(u32 addr)
628{
629 DEBUG_MSG(KERN_DEBUG "via_set_primary_address(0x%08X)\n", addr);
630 via_write_reg(VIACR, 0x0D, addr & 0xFF);
631 via_write_reg(VIACR, 0x0C, (addr >> 8) & 0xFF);
632 via_write_reg(VIACR, 0x34, (addr >> 16) & 0xFF);
633 via_write_reg_mask(VIACR, 0x48, (addr >> 24) & 0x1F, 0x1F);
634}
635
636void via_set_secondary_address(u32 addr)
637{
638 DEBUG_MSG(KERN_DEBUG "via_set_secondary_address(0x%08X)\n", addr);
639 /* secondary display supports only quadword aligned memory */
640 via_write_reg_mask(VIACR, 0x62, (addr >> 2) & 0xFE, 0xFE);
641 via_write_reg(VIACR, 0x63, (addr >> 10) & 0xFF);
642 via_write_reg(VIACR, 0x64, (addr >> 18) & 0xFF);
643 via_write_reg_mask(VIACR, 0xA3, (addr >> 26) & 0x07, 0x07);
644}
645
646void via_set_primary_pitch(u32 pitch)
647{
648 DEBUG_MSG(KERN_DEBUG "via_set_primary_pitch(0x%08X)\n", pitch);
649 /* spec does not say that first adapter skips 3 bits but old
650 * code did it and seems to be reasonable in analogy to 2nd adapter
651 */
652 pitch = pitch >> 3;
653 via_write_reg(VIACR, 0x13, pitch & 0xFF);
654 via_write_reg_mask(VIACR, 0x35, (pitch >> (8 - 5)) & 0xE0, 0xE0);
655}
656
657void via_set_secondary_pitch(u32 pitch)
658{
659 DEBUG_MSG(KERN_DEBUG "via_set_secondary_pitch(0x%08X)\n", pitch);
660 pitch = pitch >> 3;
661 via_write_reg(VIACR, 0x66, pitch & 0xFF);
662 via_write_reg_mask(VIACR, 0x67, (pitch >> 8) & 0x03, 0x03);
663 via_write_reg_mask(VIACR, 0x71, (pitch >> (10 - 7)) & 0x80, 0x80);
664}
665
666void via_set_primary_color_depth(u8 depth)
667{
668 u8 value;
669
670 DEBUG_MSG(KERN_DEBUG "via_set_primary_color_depth(%d)\n", depth);
671 switch (depth) {
672 case 8:
673 value = 0x00;
674 break;
675 case 15:
676 value = 0x04;
677 break;
678 case 16:
679 value = 0x14;
680 break;
681 case 24:
682 value = 0x0C;
683 break;
684 case 30:
685 value = 0x08;
686 break;
687 default:
688 printk(KERN_WARNING "via_set_primary_color_depth: "
689 "Unsupported depth: %d\n", depth);
690 return;
691 }
692
693 via_write_reg_mask(VIASR, 0x15, value, 0x1C);
694}
695
696void via_set_secondary_color_depth(u8 depth)
697{
698 u8 value;
699
700 DEBUG_MSG(KERN_DEBUG "via_set_secondary_color_depth(%d)\n", depth);
701 switch (depth) {
702 case 8:
703 value = 0x00;
704 break;
705 case 16:
706 value = 0x40;
707 break;
708 case 24:
709 value = 0xC0;
710 break;
711 case 30:
712 value = 0x80;
713 break;
714 default:
715 printk(KERN_WARNING "via_set_secondary_color_depth: "
716 "Unsupported depth: %d\n", depth);
717 return;
718 }
719
720 via_write_reg_mask(VIACR, 0x67, value, 0xC0);
721}
722
723static void set_color_register(u8 index, u8 red, u8 green, u8 blue) 627static void set_color_register(u8 index, u8 red, u8 green, u8 blue)
724{ 628{
725 outb(0xFF, 0x3C6); /* bit mask of palette */ 629 outb(0xFF, 0x3C6); /* bit mask of palette */