aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video/sis/sis.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/video/sis/sis.h')
-rw-r--r--drivers/video/sis/sis.h746
1 files changed, 433 insertions, 313 deletions
diff --git a/drivers/video/sis/sis.h b/drivers/video/sis/sis.h
index d0103c162e43..0b6e625d7331 100644
--- a/drivers/video/sis/sis.h
+++ b/drivers/video/sis/sis.h
@@ -1,8 +1,10 @@
1/* 1/*
2 * SiS 300/630/730/540/315/550/[M]650/651/[M]661[FM]X/740/[M]741[GX]/330/[M]760[GX] 2 * SiS 300/540/630[S]/730[S],
3 * SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
4 * XGI V3XT/V5/V8, Z7
3 * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3 5 * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
4 * 6 *
5 * Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria. 7 * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
6 * 8 *
7 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -19,8 +21,8 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
20 */ 22 */
21 23
22#ifndef _SIS_H 24#ifndef _SIS_H_
23#define _SIS_H 25#define _SIS_H_
24 26
25#include <linux/config.h> 27#include <linux/config.h>
26#include <linux/version.h> 28#include <linux/version.h>
@@ -35,26 +37,37 @@
35#include "vgatypes.h" 37#include "vgatypes.h"
36#include "vstruct.h" 38#include "vstruct.h"
37 39
38#define VER_MAJOR 1 40#define VER_MAJOR 1
39#define VER_MINOR 7 41#define VER_MINOR 8
40#define VER_LEVEL 17 42#define VER_LEVEL 9
41
42#undef SIS_CONFIG_COMPAT
43 43
44#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 44#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
45#include <linux/spinlock.h> 45#include <linux/spinlock.h>
46#define SIS_PCI_GET_CLASS(a, b) pci_get_class(a, b)
47#define SIS_PCI_GET_DEVICE(a,b,c) pci_get_device(a,b,c)
48#define SIS_PCI_GET_SLOT(a,b) pci_get_slot(a,b)
49#define SIS_PCI_PUT_DEVICE(a) pci_dev_put(a)
46#ifdef CONFIG_COMPAT 50#ifdef CONFIG_COMPAT
51#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10)
47#include <linux/ioctl32.h> 52#include <linux/ioctl32.h>
48#define SIS_CONFIG_COMPAT 53#define SIS_OLD_CONFIG_COMPAT
49#endif 54#else
50#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19) 55#include <linux/smp_lock.h>
51#ifdef __x86_64__ 56#define SIS_NEW_CONFIG_COMPAT
52/* Shouldn't we check for CONFIG_IA32_EMULATION here? */ 57#endif
58#endif /* CONFIG_COMPAT */
59#else /* 2.4 */
60#define SIS_PCI_GET_CLASS(a, b) pci_find_class(a, b)
61#define SIS_PCI_GET_DEVICE(a,b,c) pci_find_device(a,b,c)
62#define SIS_PCI_GET_SLOT(a,b) pci_find_slot(a,b)
63#define SIS_PCI_PUT_DEVICE(a)
64#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19)
65#ifdef __x86_64__ /* Shouldn't we check for CONFIG_IA32_EMULATION here? */
53#include <asm/ioctl32.h> 66#include <asm/ioctl32.h>
54#define SIS_CONFIG_COMPAT 67#define SIS_OLD_CONFIG_COMPAT
55#endif 68#endif
56#endif 69#endif
57 70#endif /* 2.4 */
58#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8) 71#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
59#define SIS_IOTYPE1 void __iomem 72#define SIS_IOTYPE1 void __iomem
60#define SIS_IOTYPE2 __iomem 73#define SIS_IOTYPE2 __iomem
@@ -79,228 +92,312 @@
79 92
80/* To be included in pci_ids.h */ 93/* To be included in pci_ids.h */
81#ifndef PCI_DEVICE_ID_SI_650_VGA 94#ifndef PCI_DEVICE_ID_SI_650_VGA
82#define PCI_DEVICE_ID_SI_650_VGA 0x6325 95#define PCI_DEVICE_ID_SI_650_VGA 0x6325
83#endif 96#endif
84#ifndef PCI_DEVICE_ID_SI_650 97#ifndef PCI_DEVICE_ID_SI_650
85#define PCI_DEVICE_ID_SI_650 0x0650 98#define PCI_DEVICE_ID_SI_650 0x0650
86#endif 99#endif
87#ifndef PCI_DEVICE_ID_SI_651 100#ifndef PCI_DEVICE_ID_SI_651
88#define PCI_DEVICE_ID_SI_651 0x0651 101#define PCI_DEVICE_ID_SI_651 0x0651
89#endif 102#endif
90#ifndef PCI_DEVICE_ID_SI_740 103#ifndef PCI_DEVICE_ID_SI_740
91#define PCI_DEVICE_ID_SI_740 0x0740 104#define PCI_DEVICE_ID_SI_740 0x0740
92#endif 105#endif
93#ifndef PCI_DEVICE_ID_SI_330 106#ifndef PCI_DEVICE_ID_SI_330
94#define PCI_DEVICE_ID_SI_330 0x0330 107#define PCI_DEVICE_ID_SI_330 0x0330
95#endif 108#endif
96#ifndef PCI_DEVICE_ID_SI_660_VGA 109#ifndef PCI_DEVICE_ID_SI_660_VGA
97#define PCI_DEVICE_ID_SI_660_VGA 0x6330 110#define PCI_DEVICE_ID_SI_660_VGA 0x6330
98#endif 111#endif
99#ifndef PCI_DEVICE_ID_SI_661 112#ifndef PCI_DEVICE_ID_SI_661
100#define PCI_DEVICE_ID_SI_661 0x0661 113#define PCI_DEVICE_ID_SI_661 0x0661
101#endif 114#endif
102#ifndef PCI_DEVICE_ID_SI_741 115#ifndef PCI_DEVICE_ID_SI_741
103#define PCI_DEVICE_ID_SI_741 0x0741 116#define PCI_DEVICE_ID_SI_741 0x0741
104#endif 117#endif
105#ifndef PCI_DEVICE_ID_SI_660 118#ifndef PCI_DEVICE_ID_SI_660
106#define PCI_DEVICE_ID_SI_660 0x0660 119#define PCI_DEVICE_ID_SI_660 0x0660
107#endif 120#endif
108#ifndef PCI_DEVICE_ID_SI_760 121#ifndef PCI_DEVICE_ID_SI_760
109#define PCI_DEVICE_ID_SI_760 0x0760 122#define PCI_DEVICE_ID_SI_760 0x0760
123#endif
124#ifndef PCI_DEVICE_ID_SI_761
125#define PCI_DEVICE_ID_SI_761 0x0761
126#endif
127
128#ifndef PCI_VENDOR_ID_XGI
129#define PCI_VENDOR_ID_XGI 0x18ca
130#endif
131
132#ifndef PCI_DEVICE_ID_XGI_20
133#define PCI_DEVICE_ID_XGI_20 0x0020
134#endif
135
136#ifndef PCI_DEVICE_ID_XGI_40
137#define PCI_DEVICE_ID_XGI_40 0x0040
110#endif 138#endif
111 139
112/* To be included in fb.h */ 140/* To be included in fb.h */
113#ifndef FB_ACCEL_SIS_GLAMOUR_2 141#ifndef FB_ACCEL_SIS_GLAMOUR_2
114#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 65x, 740, 661, 741 */ 142#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 65x, 740, 661, 741 */
115#endif 143#endif
116#ifndef FB_ACCEL_SIS_XABRE 144#ifndef FB_ACCEL_SIS_XABRE
117#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre"), 760 */ 145#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre"), 76x */
146#endif
147#ifndef FB_ACCEL_XGI_VOLARI_V
148#define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari Vx (V3XT, V5, V8) */
149#endif
150#ifndef FB_ACCEL_XGI_VOLARI_Z
151#define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */
118#endif 152#endif
119
120#define MAX_ROM_SCAN 0x10000
121 153
122/* ivideo->caps */ 154/* ivideo->caps */
123#define HW_CURSOR_CAP 0x80 155#define HW_CURSOR_CAP 0x80
124#define TURBO_QUEUE_CAP 0x40 156#define TURBO_QUEUE_CAP 0x40
125#define AGP_CMD_QUEUE_CAP 0x20 157#define AGP_CMD_QUEUE_CAP 0x20
126#define VM_CMD_QUEUE_CAP 0x10 158#define VM_CMD_QUEUE_CAP 0x10
127#define MMIO_CMD_QUEUE_CAP 0x08 159#define MMIO_CMD_QUEUE_CAP 0x08
128 160
129/* For 300 series */ 161/* For 300 series */
130#define TURBO_QUEUE_AREA_SIZE 0x80000 /* 512K */ 162#define TURBO_QUEUE_AREA_SIZE (512 * 1024) /* 512K */
131#define HW_CURSOR_AREA_SIZE_300 0x1000 /* 4K */ 163#define HW_CURSOR_AREA_SIZE_300 4096 /* 4K */
132 164
133/* For 315/Xabre series */ 165/* For 315/Xabre series */
134#define COMMAND_QUEUE_AREA_SIZE 0x80000 /* 512K */ 166#define COMMAND_QUEUE_AREA_SIZE (512 * 1024) /* 512K */
135#define COMMAND_QUEUE_THRESHOLD 0x1F 167#define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024) /* 128k for XGI Z7 */
136#define HW_CURSOR_AREA_SIZE_315 0x4000 /* 16K */ 168#define HW_CURSOR_AREA_SIZE_315 16384 /* 16K */
137 169#define COMMAND_QUEUE_THRESHOLD 0x1F
138#define SIS_OH_ALLOC_SIZE 4000 170
139#define SENTINEL 0x7fffffff 171#define SIS_OH_ALLOC_SIZE 4000
140 172#define SENTINEL 0x7fffffff
141#define SEQ_ADR 0x14 173
142#define SEQ_DATA 0x15 174#define SEQ_ADR 0x14
143#define DAC_ADR 0x18 175#define SEQ_DATA 0x15
144#define DAC_DATA 0x19 176#define DAC_ADR 0x18
145#define CRTC_ADR 0x24 177#define DAC_DATA 0x19
146#define CRTC_DATA 0x25 178#define CRTC_ADR 0x24
147#define DAC2_ADR (0x16-0x30) 179#define CRTC_DATA 0x25
148#define DAC2_DATA (0x17-0x30) 180#define DAC2_ADR (0x16-0x30)
149#define VB_PART1_ADR (0x04-0x30) 181#define DAC2_DATA (0x17-0x30)
150#define VB_PART1_DATA (0x05-0x30) 182#define VB_PART1_ADR (0x04-0x30)
151#define VB_PART2_ADR (0x10-0x30) 183#define VB_PART1_DATA (0x05-0x30)
152#define VB_PART2_DATA (0x11-0x30) 184#define VB_PART2_ADR (0x10-0x30)
153#define VB_PART3_ADR (0x12-0x30) 185#define VB_PART2_DATA (0x11-0x30)
154#define VB_PART3_DATA (0x13-0x30) 186#define VB_PART3_ADR (0x12-0x30)
155#define VB_PART4_ADR (0x14-0x30) 187#define VB_PART3_DATA (0x13-0x30)
156#define VB_PART4_DATA (0x15-0x30) 188#define VB_PART4_ADR (0x14-0x30)
157 189#define VB_PART4_DATA (0x15-0x30)
158#define SISSR ivideo->SiS_Pr.SiS_P3c4 190
159#define SISCR ivideo->SiS_Pr.SiS_P3d4 191#define SISSR ivideo->SiS_Pr.SiS_P3c4
160#define SISDACA ivideo->SiS_Pr.SiS_P3c8 192#define SISCR ivideo->SiS_Pr.SiS_P3d4
161#define SISDACD ivideo->SiS_Pr.SiS_P3c9 193#define SISDACA ivideo->SiS_Pr.SiS_P3c8
162#define SISPART1 ivideo->SiS_Pr.SiS_Part1Port 194#define SISDACD ivideo->SiS_Pr.SiS_P3c9
163#define SISPART2 ivideo->SiS_Pr.SiS_Part2Port 195#define SISPART1 ivideo->SiS_Pr.SiS_Part1Port
164#define SISPART3 ivideo->SiS_Pr.SiS_Part3Port 196#define SISPART2 ivideo->SiS_Pr.SiS_Part2Port
165#define SISPART4 ivideo->SiS_Pr.SiS_Part4Port 197#define SISPART3 ivideo->SiS_Pr.SiS_Part3Port
166#define SISPART5 ivideo->SiS_Pr.SiS_Part5Port 198#define SISPART4 ivideo->SiS_Pr.SiS_Part4Port
167#define SISDAC2A SISPART5 199#define SISPART5 ivideo->SiS_Pr.SiS_Part5Port
168#define SISDAC2D (SISPART5 + 1) 200#define SISDAC2A SISPART5
169#define SISMISCR (ivideo->SiS_Pr.RelIO + 0x1c) 201#define SISDAC2D (SISPART5 + 1)
170#define SISMISCW ivideo->SiS_Pr.SiS_P3c2 202#define SISMISCR (ivideo->SiS_Pr.RelIO + 0x1c)
171#define SISINPSTAT (ivideo->SiS_Pr.RelIO + 0x2a) 203#define SISMISCW ivideo->SiS_Pr.SiS_P3c2
172#define SISPEL ivideo->SiS_Pr.SiS_P3c6 204#define SISINPSTAT (ivideo->SiS_Pr.RelIO + 0x2a)
173 205#define SISPEL ivideo->SiS_Pr.SiS_P3c6
174#define IND_SIS_PASSWORD 0x05 /* SRs */ 206#define SISVGAENABLE (ivideo->SiS_Pr.RelIO + 0x13)
175#define IND_SIS_COLOR_MODE 0x06 207#define SISVID (ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
176#define IND_SIS_RAMDAC_CONTROL 0x07 208#define SISCAP (ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
177#define IND_SIS_DRAM_SIZE 0x14 209
178#define IND_SIS_MODULE_ENABLE 0x1E 210#define IND_SIS_PASSWORD 0x05 /* SRs */
179#define IND_SIS_PCI_ADDRESS_SET 0x20 211#define IND_SIS_COLOR_MODE 0x06
180#define IND_SIS_TURBOQUEUE_ADR 0x26 212#define IND_SIS_RAMDAC_CONTROL 0x07
181#define IND_SIS_TURBOQUEUE_SET 0x27 213#define IND_SIS_DRAM_SIZE 0x14
182#define IND_SIS_POWER_ON_TRAP 0x38 214#define IND_SIS_MODULE_ENABLE 0x1E
183#define IND_SIS_POWER_ON_TRAP2 0x39 215#define IND_SIS_PCI_ADDRESS_SET 0x20
184#define IND_SIS_CMDQUEUE_SET 0x26 216#define IND_SIS_TURBOQUEUE_ADR 0x26
185#define IND_SIS_CMDQUEUE_THRESHOLD 0x27 217#define IND_SIS_TURBOQUEUE_SET 0x27
186 218#define IND_SIS_POWER_ON_TRAP 0x38
187#define IND_SIS_AGP_IO_PAD 0x48 219#define IND_SIS_POWER_ON_TRAP2 0x39
188 220#define IND_SIS_CMDQUEUE_SET 0x26
189#define SIS_CRT2_WENABLE_300 0x24 /* Part1 */ 221#define IND_SIS_CMDQUEUE_THRESHOLD 0x27
190#define SIS_CRT2_WENABLE_315 0x2F 222
191 223#define IND_SIS_AGP_IO_PAD 0x48
192#define SIS_PASSWORD 0x86 /* SR05 */ 224
193 225#define SIS_CRT2_WENABLE_300 0x24 /* Part1 */
194#define SIS_INTERLACED_MODE 0x20 /* SR06 */ 226#define SIS_CRT2_WENABLE_315 0x2F
195#define SIS_8BPP_COLOR_MODE 0x0 227
196#define SIS_15BPP_COLOR_MODE 0x1 228#define SIS_PASSWORD 0x86 /* SR05 */
197#define SIS_16BPP_COLOR_MODE 0x2 229
198#define SIS_32BPP_COLOR_MODE 0x4 230#define SIS_INTERLACED_MODE 0x20 /* SR06 */
199 231#define SIS_8BPP_COLOR_MODE 0x0
200#define SIS_ENABLE_2D 0x40 /* SR1E */ 232#define SIS_15BPP_COLOR_MODE 0x1
201 233#define SIS_16BPP_COLOR_MODE 0x2
202#define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */ 234#define SIS_32BPP_COLOR_MODE 0x4
203#define SIS_PCI_ADDR_ENABLE 0x80 235
204 236#define SIS_ENABLE_2D 0x40 /* SR1E */
205#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/330 series SR26 */ 237
206#define SIS_VRAM_CMDQUEUE_ENABLE 0x40 238#define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
207#define SIS_MMIO_CMD_ENABLE 0x20 239#define SIS_PCI_ADDR_ENABLE 0x80
208#define SIS_CMD_QUEUE_SIZE_512k 0x00 240
209#define SIS_CMD_QUEUE_SIZE_1M 0x04 241#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/330/340 series SR26 */
210#define SIS_CMD_QUEUE_SIZE_2M 0x08 242#define SIS_VRAM_CMDQUEUE_ENABLE 0x40
211#define SIS_CMD_QUEUE_SIZE_4M 0x0C 243#define SIS_MMIO_CMD_ENABLE 0x20
212#define SIS_CMD_QUEUE_RESET 0x01 244#define SIS_CMD_QUEUE_SIZE_512k 0x00
213#define SIS_CMD_AUTO_CORR 0x02 245#define SIS_CMD_QUEUE_SIZE_1M 0x04
214 246#define SIS_CMD_QUEUE_SIZE_2M 0x08
215#define SIS_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */ 247#define SIS_CMD_QUEUE_SIZE_4M 0x0C
216#define SIS_MODE_SELECT_CRT2 0x02 248#define SIS_CMD_QUEUE_RESET 0x01
217#define SIS_VB_OUTPUT_COMPOSITE 0x04 249#define SIS_CMD_AUTO_CORR 0x02
218#define SIS_VB_OUTPUT_SVIDEO 0x08 250
219#define SIS_VB_OUTPUT_SCART 0x10 251#define SIS_CMD_QUEUE_SIZE_Z7_64k 0x00 /* XGI Z7 */
220#define SIS_VB_OUTPUT_LCD 0x20 252#define SIS_CMD_QUEUE_SIZE_Z7_128k 0x04
221#define SIS_VB_OUTPUT_CRT2 0x40 253
222#define SIS_VB_OUTPUT_HIVISION 0x80 254#define SIS_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */
223 255#define SIS_MODE_SELECT_CRT2 0x02
224#define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */ 256#define SIS_VB_OUTPUT_COMPOSITE 0x04
225#define SIS_DRIVER_MODE 0x40 257#define SIS_VB_OUTPUT_SVIDEO 0x08
226 258#define SIS_VB_OUTPUT_SCART 0x10
227#define SIS_VB_COMPOSITE 0x01 /* CR32 */ 259#define SIS_VB_OUTPUT_LCD 0x20
228#define SIS_VB_SVIDEO 0x02 260#define SIS_VB_OUTPUT_CRT2 0x40
229#define SIS_VB_SCART 0x04 261#define SIS_VB_OUTPUT_HIVISION 0x80
230#define SIS_VB_LCD 0x08 262
231#define SIS_VB_CRT2 0x10 263#define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */
232#define SIS_CRT1 0x20 264#define SIS_DRIVER_MODE 0x40
233#define SIS_VB_HIVISION 0x40 265
234#define SIS_VB_YPBPR 0x80 266#define SIS_VB_COMPOSITE 0x01 /* CR32 */
235#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \ 267#define SIS_VB_SVIDEO 0x02
236 SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR) 268#define SIS_VB_SCART 0x04
237 269#define SIS_VB_LCD 0x08
238#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 (< SiS 660) */ 270#define SIS_VB_CRT2 0x10
239#define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */ 271#define SIS_CRT1 0x20
240#define SIS_EXTERNAL_CHIP_LVDS 0x02 272#define SIS_VB_HIVISION 0x40
241#define SIS_EXTERNAL_CHIP_TRUMPION 0x03 273#define SIS_VB_YPBPR 0x80
242#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04 274#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
243#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05 275 SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
244#define SIS310_EXTERNAL_CHIP_LVDS 0x02 276
245#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03 277#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 (< SiS 660) */
246 278#define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */
247#define SIS_AGP_2X 0x20 /* CR48 */ 279#define SIS_EXTERNAL_CHIP_LVDS 0x02
248 280#define SIS_EXTERNAL_CHIP_TRUMPION 0x03
249#define HW_DEVICE_EXTENSION SIS_HW_INFO 281#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04
250#define PHW_DEVICE_EXTENSION PSIS_HW_INFO 282#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05
283#define SIS310_EXTERNAL_CHIP_LVDS 0x02
284#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03
285
286#define SIS_AGP_2X 0x20 /* CR48 */
287
288/* vbflags, private entries (others in sisfb.h) */
289#define VB_CONEXANT 0x00000800 /* 661 series only */
290#define VB_TRUMPION VB_CONEXANT /* 300 series only */
291#define VB_302ELV 0x00004000
292#define VB_301 0x00100000 /* Video bridge type */
293#define VB_301B 0x00200000
294#define VB_302B 0x00400000
295#define VB_30xBDH 0x00800000 /* 30xB DH version (w/o LCD support) */
296#define VB_LVDS 0x01000000
297#define VB_CHRONTEL 0x02000000
298#define VB_301LV 0x04000000
299#define VB_302LV 0x08000000
300#define VB_301C 0x10000000
301
302#define VB_SISBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
303#define VB_VIDEOBRIDGE (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
304
305/* vbflags2 (static stuff only!) */
306#define VB2_SISUMC 0x00000001
307#define VB2_301 0x00000002 /* Video bridge type */
308#define VB2_301B 0x00000004
309#define VB2_301C 0x00000008
310#define VB2_307T 0x00000010
311#define VB2_302B 0x00000800
312#define VB2_301LV 0x00001000
313#define VB2_302LV 0x00002000
314#define VB2_302ELV 0x00004000
315#define VB2_307LV 0x00008000
316#define VB2_30xBDH 0x08000000 /* 30xB DH version (w/o LCD support) */
317#define VB2_CONEXANT 0x10000000
318#define VB2_TRUMPION 0x20000000
319#define VB2_LVDS 0x40000000
320#define VB2_CHRONTEL 0x80000000
321
322#define VB2_SISLVDSBRIDGE (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
323#define VB2_SISTMDSBRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
324#define VB2_SISBRIDGE (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
325
326#define VB2_SISTMDSLCDABRIDGE (VB2_301C | VB2_307T)
327#define VB2_SISLCDABRIDGE (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
328
329#define VB2_SISHIVISIONBRIDGE (VB2_301 | VB2_301B | VB2_302B)
330#define VB2_SISYPBPRBRIDGE (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
331#define VB2_SISYPBPRARBRIDGE (VB2_301C | VB2_307T | VB2_307LV)
332#define VB2_SISTAP4SCALER (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
333#define VB2_SISTVBRIDGE (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
334
335#define VB2_SISVGA2BRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
336
337#define VB2_VIDEOBRIDGE (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
338
339#define VB2_30xB (VB2_301B | VB2_301C | VB2_302B | VB2_307T)
340#define VB2_30xBLV (VB2_30xB | VB2_SISLVDSBRIDGE)
341#define VB2_30xC (VB2_301C | VB2_307T)
342#define VB2_30xCLV (VB2_301C | VB2_307T | VB2_302ELV| VB2_307LV)
343#define VB2_SISEMIBRIDGE (VB2_302LV | VB2_302ELV | VB2_307LV)
344#define VB2_LCD162MHZBRIDGE (VB2_301C | VB2_307T)
345#define VB2_LCDOVER1280BRIDGE (VB2_301C | VB2_307T | VB2_302LV | VB2_302ELV | VB2_307LV)
346#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV)
347#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T)
251 348
252/* I/O port access macros */ 349/* I/O port access macros */
253#define inSISREG(base) inb(base) 350#define inSISREG(base) inb(base)
254 351
255#define outSISREG(base,val) outb(val,base) 352#define outSISREG(base,val) outb(val,base)
256 353
257#define orSISREG(base,val) \ 354#define orSISREG(base,val) \
258 do { \ 355 do { \
259 u8 __Temp = inSISREG(base); \ 356 u8 __Temp = inSISREG(base); \
260 outSISREG(base, __Temp | (val)); \ 357 outSISREG(base, __Temp | (val));\
261 } while (0) 358 } while (0)
262 359
263#define andSISREG(base,val) \ 360#define andSISREG(base,val) \
264 do { \ 361 do { \
265 u8 __Temp = inSISREG(base); \ 362 u8 __Temp = inSISREG(base); \
266 outSISREG(base, __Temp & (val)); \ 363 outSISREG(base, __Temp & (val));\
267 } while (0) 364 } while (0)
268 365
269#define inSISIDXREG(base,idx,var) \ 366#define inSISIDXREG(base,idx,var) \
270 do { \ 367 do { \
271 outSISREG(base, idx); \ 368 outSISREG(base, idx); \
272 var = inSISREG((base)+1); \ 369 var = inSISREG((base)+1); \
273 } while (0) 370 } while (0)
274 371
275#define outSISIDXREG(base,idx,val) \ 372#define outSISIDXREG(base,idx,val) \
276 do { \ 373 do { \
277 outSISREG(base, idx); \ 374 outSISREG(base, idx); \
278 outSISREG((base)+1, val); \ 375 outSISREG((base)+1, val); \
279 } while (0) 376 } while (0)
280 377
281#define orSISIDXREG(base,idx,val) \ 378#define orSISIDXREG(base,idx,val) \
282 do { \ 379 do { \
283 u8 __Temp; \ 380 u8 __Temp; \
284 outSISREG(base, idx); \ 381 outSISREG(base, idx); \
285 __Temp = inSISREG((base)+1) | (val); \ 382 __Temp = inSISREG((base)+1) | (val); \
286 outSISREG((base)+1, __Temp); \ 383 outSISREG((base)+1, __Temp); \
287 } while (0) 384 } while (0)
288 385
289#define andSISIDXREG(base,idx,and) \ 386#define andSISIDXREG(base,idx,and) \
290 do { \ 387 do { \
291 u8 __Temp; \ 388 u8 __Temp; \
292 outSISREG(base, idx); \ 389 outSISREG(base, idx); \
293 __Temp = inSISREG((base)+1) & (and); \ 390 __Temp = inSISREG((base)+1) & (and); \
294 outSISREG((base)+1, __Temp); \ 391 outSISREG((base)+1, __Temp); \
295 } while (0) 392 } while (0)
296 393
297#define setSISIDXREG(base,idx,and,or) \ 394#define setSISIDXREG(base,idx,and,or) \
298 do { \ 395 do { \
299 u8 __Temp; \ 396 u8 __Temp; \
300 outSISREG(base, idx); \ 397 outSISREG(base, idx); \
301 __Temp = (inSISREG((base)+1) & (and)) | (or); \ 398 __Temp = (inSISREG((base)+1) & (and)) | (or); \
302 outSISREG((base)+1, __Temp); \ 399 outSISREG((base)+1, __Temp); \
303 } while (0) 400 } while (0)
304 401
305/* MMIO access macros */ 402/* MMIO access macros */
306#define MMIO_IN8(base, offset) readb((base+offset)) 403#define MMIO_IN8(base, offset) readb((base+offset))
@@ -322,19 +419,19 @@
322#define MMIO_QUEUE_READPORT Q_READ_PTR 419#define MMIO_QUEUE_READPORT Q_READ_PTR
323 420
324#ifndef FB_BLANK_UNBLANK 421#ifndef FB_BLANK_UNBLANK
325#define FB_BLANK_UNBLANK 0 422#define FB_BLANK_UNBLANK 0
326#endif 423#endif
327#ifndef FB_BLANK_NORMAL 424#ifndef FB_BLANK_NORMAL
328#define FB_BLANK_NORMAL 1 425#define FB_BLANK_NORMAL 1
329#endif 426#endif
330#ifndef FB_BLANK_VSYNC_SUSPEND 427#ifndef FB_BLANK_VSYNC_SUSPEND
331#define FB_BLANK_VSYNC_SUSPEND 2 428#define FB_BLANK_VSYNC_SUSPEND 2
332#endif 429#endif
333#ifndef FB_BLANK_HSYNC_SUSPEND 430#ifndef FB_BLANK_HSYNC_SUSPEND
334#define FB_BLANK_HSYNC_SUSPEND 3 431#define FB_BLANK_HSYNC_SUSPEND 3
335#endif 432#endif
336#ifndef FB_BLANK_POWERDOWN 433#ifndef FB_BLANK_POWERDOWN
337#define FB_BLANK_POWERDOWN 4 434#define FB_BLANK_POWERDOWN 4
338#endif 435#endif
339 436
340enum _SIS_LCD_TYPE { 437enum _SIS_LCD_TYPE {
@@ -347,18 +444,19 @@ enum _SIS_LCD_TYPE {
347 LCD_1600x1200, 444 LCD_1600x1200,
348 LCD_1920x1440, 445 LCD_1920x1440,
349 LCD_2048x1536, 446 LCD_2048x1536,
350 LCD_320x480, /* FSTN */ 447 LCD_320x240, /* FSTN */
351 LCD_1400x1050, 448 LCD_1400x1050,
352 LCD_1152x864, 449 LCD_1152x864,
353 LCD_1152x768, 450 LCD_1152x768,
354 LCD_1280x768, 451 LCD_1280x768,
355 LCD_1024x600, 452 LCD_1024x600,
356 LCD_640x480_2, /* DSTN */ 453 LCD_320x240_2, /* DSTN */
357 LCD_640x480_3, /* DSTN */ 454 LCD_320x240_3, /* DSTN */
358 LCD_848x480, 455 LCD_848x480,
359 LCD_1280x800, 456 LCD_1280x800,
360 LCD_1680x1050, 457 LCD_1680x1050,
361 LCD_1280x720, 458 LCD_1280x720,
459 LCD_1280x854,
362 LCD_CUSTOM, 460 LCD_CUSTOM,
363 LCD_UNKNOWN 461 LCD_UNKNOWN
364}; 462};
@@ -368,31 +466,50 @@ enum _SIS_CMDTYPE {
368 AGP_CMD_QUEUE, 466 AGP_CMD_QUEUE,
369 VM_CMD_QUEUE, 467 VM_CMD_QUEUE,
370}; 468};
371typedef unsigned int SIS_CMDTYPE; 469
470struct SIS_OH {
471 struct SIS_OH *poh_next;
472 struct SIS_OH *poh_prev;
473 u32 offset;
474 u32 size;
475};
476
477struct SIS_OHALLOC {
478 struct SIS_OHALLOC *poha_next;
479 struct SIS_OH aoh[1];
480};
481
482struct SIS_HEAP {
483 struct SIS_OH oh_free;
484 struct SIS_OH oh_used;
485 struct SIS_OH *poh_freelist;
486 struct SIS_OHALLOC *poha_chain;
487 u32 max_freesize;
488 struct sis_video_info *vinfo;
489};
372 490
373/* Our "par" */ 491/* Our "par" */
374struct sis_video_info { 492struct sis_video_info {
375 int cardnumber; 493 int cardnumber;
376 struct fb_info *memyselfandi; 494 struct fb_info *memyselfandi;
377 495
378 SIS_HW_INFO sishw_ext; 496 struct SiS_Private SiS_Pr;
379 SiS_Private SiS_Pr;
380 497
381 sisfb_info sisfbinfo; /* For ioctl SISFB_GET_INFO */ 498 struct sisfb_info sisfbinfo; /* For ioctl SISFB_GET_INFO */
382 499
383 struct fb_var_screeninfo default_var; 500 struct fb_var_screeninfo default_var;
384 501
385#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 502#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
386 struct fb_fix_screeninfo sisfb_fix; 503 struct fb_fix_screeninfo sisfb_fix;
387 u32 pseudo_palette[17]; 504 u32 pseudo_palette[17];
388#endif 505#endif
389 506
390#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 507#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
391 struct display sis_disp; 508 struct display sis_disp;
392 struct display_switch sisfb_sw; 509 struct display_switch sisfb_sw;
393 struct { 510 struct {
394 u16 red, green, blue, pad; 511 u16 red, green, blue, pad;
395 } sis_palette[256]; 512 } sis_palette[256];
396 union { 513 union {
397#ifdef FBCON_HAS_CFB16 514#ifdef FBCON_HAS_CFB16
398 u16 cfb16[16]; 515 u16 cfb16[16];
@@ -400,10 +517,10 @@ struct sis_video_info {
400#ifdef FBCON_HAS_CFB32 517#ifdef FBCON_HAS_CFB32
401 u32 cfb32[16]; 518 u32 cfb32[16];
402#endif 519#endif
403 } sis_fbcon_cmap; 520 } sis_fbcon_cmap;
404#endif 521#endif
405 522
406 struct sisfb_monitor { 523 struct sisfb_monitor {
407 u16 hmin; 524 u16 hmin;
408 u16 hmax; 525 u16 hmax;
409 u16 vmin; 526 u16 vmin;
@@ -411,163 +528,166 @@ struct sis_video_info {
411 u32 dclockmax; 528 u32 dclockmax;
412 u8 feature; 529 u8 feature;
413 BOOLEAN datavalid; 530 BOOLEAN datavalid;
414 } sisfb_thismonitor; 531 } sisfb_thismonitor;
415 532
416 int chip_id; 533 unsigned short chip_id; /* PCI ID of chip */
534 unsigned short chip_vendor; /* PCI ID of vendor */
417 char myid[40]; 535 char myid[40];
418 536
419 struct pci_dev *nbridge; 537 struct pci_dev *nbridge;
538 struct pci_dev *lpcdev;
420 539
421 int mni; /* Mode number index */ 540 int mni; /* Mode number index */
422 541
423#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 542#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
424 int currcon; 543 int currcon;
425#endif 544#endif
426 545
427 unsigned long video_size; 546 unsigned long video_size;
428 unsigned long video_base; 547 unsigned long video_base;
429 unsigned long mmio_size; 548 unsigned long mmio_size;
430 unsigned long mmio_base; 549 unsigned long mmio_base;
431 unsigned long vga_base; 550 unsigned long vga_base;
551
552 unsigned long video_offset;
432 553
433 SIS_IOTYPE1 *video_vbase; 554 unsigned long UMAsize, LFBsize;
434 SIS_IOTYPE1 *mmio_vbase;
435 555
436 unsigned char *bios_abase; 556 SIS_IOTYPE1 *video_vbase;
557 SIS_IOTYPE1 *mmio_vbase;
437 558
438 int mtrr; 559 unsigned char *bios_abase;
560
561 int mtrr;
439 562
440 u32 sisfb_mem; 563 u32 sisfb_mem;
441 564
442 u32 sisfb_parm_mem; 565 u32 sisfb_parm_mem;
443 int sisfb_accel; 566 int sisfb_accel;
444 int sisfb_ypan; 567 int sisfb_ypan;
445 int sisfb_max; 568 int sisfb_max;
446 int sisfb_userom; 569 int sisfb_userom;
447 int sisfb_useoem; 570 int sisfb_useoem;
448 int sisfb_mode_idx; 571 int sisfb_mode_idx;
449 int sisfb_parm_rate; 572 int sisfb_parm_rate;
450 int sisfb_crt1off; 573 int sisfb_crt1off;
451 int sisfb_forcecrt1; 574 int sisfb_forcecrt1;
452 int sisfb_crt2type; 575 int sisfb_crt2type;
453 int sisfb_crt2flags; 576 int sisfb_crt2flags;
454 int sisfb_dstn; 577 int sisfb_dstn;
455 int sisfb_fstn; 578 int sisfb_fstn;
456 int sisfb_tvplug; 579 int sisfb_tvplug;
457 int sisfb_tvstd; 580 int sisfb_tvstd;
458 int sisfb_filter;
459 int sisfb_nocrt2rate; 581 int sisfb_nocrt2rate;
460#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 582#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
461 int sisfb_inverse; 583 int sisfb_inverse;
462#endif 584#endif
463 585
464 u32 heapstart; /* offset */ 586 u32 heapstart; /* offset */
465 SIS_IOTYPE1 *sisfb_heap_start; /* address */ 587 SIS_IOTYPE1 *sisfb_heap_start; /* address */
466 SIS_IOTYPE1 *sisfb_heap_end; /* address */ 588 SIS_IOTYPE1 *sisfb_heap_end; /* address */
467 u32 sisfb_heap_size; 589 u32 sisfb_heap_size;
468 int havenoheap; 590 int havenoheap;
469#if 0
470 SIS_HEAP sisfb_heap;
471#endif
472 591
592 struct SIS_HEAP sisfb_heap; /* This card's vram heap */
473 593
474 int video_bpp; 594 int video_bpp;
475 int video_cmap_len; 595 int video_cmap_len;
476 int video_width; 596 int video_width;
477 int video_height; 597 int video_height;
478 unsigned int refresh_rate; 598 unsigned int refresh_rate;
479 599
480 unsigned int chip; 600 unsigned int chip;
481 u8 revision_id; 601 u8 revision_id;
602 int sisvga_enabled; /* PCI device was enabled */
482 603
483 int video_linelength; /* real pitch */ 604 int video_linelength; /* real pitch */
484 int scrnpitchCRT1; /* pitch regarding interlace */ 605 int scrnpitchCRT1; /* pitch regarding interlace */
485 606
486 u16 DstColor; /* For 2d acceleration */ 607 u16 DstColor; /* For 2d acceleration */
487 u32 SiS310_AccelDepth; 608 u32 SiS310_AccelDepth;
488 u32 CommandReg; 609 u32 CommandReg;
489 int cmdqueuelength; 610 int cmdqueuelength; /* Current (for accel) */
611 u32 cmdQueueSize; /* Total size in KB */
490 612
491 spinlock_t lockaccel; /* Do not use outside of kernel! */ 613 spinlock_t lockaccel; /* Do not use outside of kernel! */
492 614
493 unsigned int pcibus; 615 unsigned int pcibus;
494 unsigned int pcislot; 616 unsigned int pcislot;
495 unsigned int pcifunc; 617 unsigned int pcifunc;
496 618
497 int accel; 619 int accel;
620 int engineok;
498 621
499 u16 subsysvendor; 622 u16 subsysvendor;
500 u16 subsysdevice; 623 u16 subsysdevice;
501 624
502 u32 vbflags; /* Replacing deprecated stuff from above */ 625 u32 vbflags; /* Replacing deprecated stuff from above */
503 u32 currentvbflags; 626 u32 currentvbflags;
627 u32 vbflags2;
504 628
505 int lcdxres, lcdyres; 629 int lcdxres, lcdyres;
506 int lcddefmodeidx, tvdefmodeidx, defmodeidx; 630 int lcddefmodeidx, tvdefmodeidx, defmodeidx;
507 u32 CRT2LCDType; /* defined in "SIS_LCD_TYPE" */ 631 u32 CRT2LCDType; /* defined in "SIS_LCD_TYPE" */
508 632 u32 curFSTN, curDSTN;
509 int current_bpp; 633
510 int current_width; 634 int current_bpp;
511 int current_height; 635 int current_width;
512 int current_htotal; 636 int current_height;
513 int current_vtotal; 637 int current_htotal;
638 int current_vtotal;
514 int current_linelength; 639 int current_linelength;
515 __u32 current_pixclock; 640 __u32 current_pixclock;
516 int current_refresh_rate; 641 int current_refresh_rate;
642
643 unsigned int current_base;
517 644
518 u8 mode_no; 645 u8 mode_no;
519 u8 rate_idx; 646 u8 rate_idx;
520 int modechanged; 647 int modechanged;
521 unsigned char modeprechange; 648 unsigned char modeprechange;
522 649
523#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 650#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
524 u8 sisfb_lastrates[128]; 651 u8 sisfb_lastrates[128];
525#endif 652#endif
526 653
527 int newrom; 654 int newrom;
528 int registered; 655 int haveXGIROM;
656 int registered;
529 int warncount; 657 int warncount;
658#ifdef SIS_OLD_CONFIG_COMPAT
659 int ioctl32registered;
660#endif
530 661
531 int sisvga_engine; 662 int sisvga_engine;
532 int hwcursor_size; 663 int hwcursor_size;
533 int CRT2_write_enable; 664 int CRT2_write_enable;
534 u8 caps; 665 u8 caps;
535 666
536 u8 detectedpdc; 667 u8 detectedpdc;
537 u8 detectedpdca; 668 u8 detectedpdca;
538 u8 detectedlcda; 669 u8 detectedlcda;
539 670
540 SIS_IOTYPE1 *hwcursor_vbase; 671 SIS_IOTYPE1 *hwcursor_vbase;
541 672
542 int chronteltype; 673 int chronteltype;
543 int tvxpos, tvypos; 674 int tvxpos, tvypos;
544 u8 p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02; 675 u8 p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
545 int tvx, tvy; 676 int tvx, tvy;
546 677
547 u8 sisfblocked; 678 u8 sisfblocked;
679
680 struct sisfb_info sisfb_infoblock;
681
682 struct sisfb_cmd sisfb_command;
683
684 u32 sisfb_id;
685
686 u8 sisfb_can_post;
687 u8 sisfb_card_posted;
688 u8 sisfb_was_boot_device;
548 689
549 struct sis_video_info *next; 690 struct sis_video_info *next;
550}; 691};
551 692
552typedef struct _SIS_OH {
553 struct _SIS_OH *poh_next;
554 struct _SIS_OH *poh_prev;
555 u32 offset;
556 u32 size;
557} SIS_OH;
558
559typedef struct _SIS_OHALLOC {
560 struct _SIS_OHALLOC *poha_next;
561 SIS_OH aoh[1];
562} SIS_OHALLOC;
563
564typedef struct _SIS_HEAP {
565 SIS_OH oh_free;
566 SIS_OH oh_used;
567 SIS_OH *poh_freelist;
568 SIS_OHALLOC *poha_chain;
569 u32 max_freesize;
570 struct sis_video_info *vinfo;
571} SIS_HEAP;
572
573#endif 693#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 12:33:47 -0500