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-rw-r--r--drivers/video/sis/init.c5603
1 files changed, 2265 insertions, 3338 deletions
diff --git a/drivers/video/sis/init.c b/drivers/video/sis/init.c
index ecfd72178dbb..2ab3868efde3 100644
--- a/drivers/video/sis/init.c
+++ b/drivers/video/sis/init.c
@@ -2,11 +2,12 @@
2/* $XdotOrg$ */ 2/* $XdotOrg$ */
3/* 3/*
4 * Mode initializing code (CRT1 section) for 4 * Mode initializing code (CRT1 section) for
5 * for SiS 300/305/540/630/730 and 5 * for SiS 300/305/540/630/730,
6 * SiS 315/550/650/M650/651/661FX/M661FX/740/741(GX)/M741/330/660/M660/760/M760 6 * SiS 315/550/[M]650/651/[M]661[FGM]X/[M]74x[GX]/330/[M]76x[GX],
7 * (Universal module for Linux kernel framebuffer and XFree86 4.x) 7 * XGI Volari V3XT/V5/V8, Z7
8 * (Universal module for Linux kernel framebuffer and X.org/XFree86 4.x)
8 * 9 *
9 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 10 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
10 * 11 *
11 * If distributed as part of the Linux kernel, the following license terms 12 * If distributed as part of the Linux kernel, the following license terms
12 * apply: 13 * apply:
@@ -53,17 +54,12 @@
53 * 54 *
54 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc. 55 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
55 * Used by permission. 56 * Used by permission.
56 *
57 * TW says: This code looks awful, I know. But please don't do anything about
58 * this otherwise debugging will be hell.
59 * The code is extremely fragile as regards the different chipsets, different
60 * video bridges and combinations thereof. If anything is changed, extreme
61 * care has to be taken that that change doesn't break it for other chipsets,
62 * bridges or combinations thereof.
63 * All comments in this file are by me, regardless if they are marked TW or not.
64 *
65 */ 57 */
66 58
59#ifdef HAVE_CONFIG_H
60#include "config.h"
61#endif
62
67#include "init.h" 63#include "init.h"
68 64
69#ifdef SIS300 65#ifdef SIS300
@@ -84,24 +80,13 @@
84 80
85#if defined(SIS300) || defined(SIS315H) 81#if defined(SIS300) || defined(SIS315H)
86static void 82static void
87InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 83InitCommonPointer(struct SiS_Private *SiS_Pr)
88{ 84{
85 SiS_Pr->SiS_SModeIDTable = SiS_SModeIDTable;
89 SiS_Pr->SiS_StResInfo = SiS_StResInfo; 86 SiS_Pr->SiS_StResInfo = SiS_StResInfo;
90 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo; 87 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
91 SiS_Pr->SiS_StandTable = SiS_StandTable; 88 SiS_Pr->SiS_StandTable = SiS_StandTable;
92 89
93 SiS_Pr->SiS_NTSCPhase = SiS_NTSCPhase;
94 SiS_Pr->SiS_PALPhase = SiS_PALPhase;
95 SiS_Pr->SiS_NTSCPhase2 = SiS_NTSCPhase2;
96 SiS_Pr->SiS_PALPhase2 = SiS_PALPhase2;
97 SiS_Pr->SiS_PALMPhase = SiS_PALMPhase;
98 SiS_Pr->SiS_PALNPhase = SiS_PALNPhase;
99 SiS_Pr->SiS_PALMPhase2 = SiS_PALMPhase2;
100 SiS_Pr->SiS_PALNPhase2 = SiS_PALNPhase2;
101 SiS_Pr->SiS_SpecialPhase = SiS_SpecialPhase;
102 SiS_Pr->SiS_SpecialPhaseM = SiS_SpecialPhaseM;
103 SiS_Pr->SiS_SpecialPhaseJ = SiS_SpecialPhaseJ;
104
105 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming; 90 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
106 SiS_Pr->SiS_PALTiming = SiS_PALTiming; 91 SiS_Pr->SiS_PALTiming = SiS_PALTiming;
107 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing; 92 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
@@ -137,6 +122,7 @@ InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
137 SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data; 122 SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
138 SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data; 123 SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
139 SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data; 124 SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data;
125 SiS_Pr->SiS_LCD1280x854Data = SiS_LCD1280x854Data;
140 SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data; 126 SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
141 SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data; 127 SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
142 SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data; 128 SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
@@ -145,67 +131,30 @@ InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
145 SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data; 131 SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
146 SiS_Pr->SiS_NoScaleData = SiS_NoScaleData; 132 SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
147 133
148 SiS_Pr->SiS_LVDS320x480Data_1 = SiS_LVDS320x480Data_1; 134 SiS_Pr->SiS_LVDS320x240Data_1 = SiS_LVDS320x240Data_1;
135 SiS_Pr->SiS_LVDS320x240Data_2 = SiS_LVDS320x240Data_2;
136 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
149 SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1; 137 SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
150 SiS_Pr->SiS_LVDS800x600Data_2 = SiS_LVDS800x600Data_2;
151 SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
152 SiS_Pr->SiS_LVDS1024x768Data_2 = SiS_LVDS1024x768Data_2;
153 SiS_Pr->SiS_LVDS1280x1024Data_1 = SiS_LVDS1280x1024Data_1;
154 SiS_Pr->SiS_LVDS1280x1024Data_2 = SiS_LVDS1280x1024Data_2;
155 SiS_Pr->SiS_LVDS1400x1050Data_1 = SiS_LVDS1400x1050Data_1;
156 SiS_Pr->SiS_LVDS1400x1050Data_2 = SiS_LVDS1400x1050Data_2;
157 SiS_Pr->SiS_LVDS1600x1200Data_1 = SiS_LVDS1600x1200Data_1;
158 SiS_Pr->SiS_LVDS1600x1200Data_2 = SiS_LVDS1600x1200Data_2;
159 SiS_Pr->SiS_LVDS1280x768Data_1 = SiS_LVDS1280x768Data_1;
160 SiS_Pr->SiS_LVDS1280x768Data_2 = SiS_LVDS1280x768Data_2;
161 SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1; 138 SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
162 SiS_Pr->SiS_LVDS1024x600Data_2 = SiS_LVDS1024x600Data_2; 139 SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
163 SiS_Pr->SiS_LVDS1152x768Data_1 = SiS_LVDS1152x768Data_1;
164 SiS_Pr->SiS_LVDS1152x768Data_2 = SiS_LVDS1152x768Data_2;
165 SiS_Pr->SiS_LVDSXXXxXXXData_1 = SiS_LVDSXXXxXXXData_1;
166 SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x960Data_1;
167 SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x960Data_2;
168 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
169 SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x1024Data_1;
170 SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x1024Data_2;
171 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
172 SiS_Pr->SiS_LVDS640x480Data_2 = SiS_LVDS640x480Data_2;
173
174 SiS_Pr->SiS_LVDS848x480Data_1 = SiS_LVDS848x480Data_1;
175 SiS_Pr->SiS_LVDS848x480Data_2 = SiS_LVDS848x480Data_2;
176 SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS_LVDSBARCO1024Data_1;
177 SiS_Pr->SiS_LVDSBARCO1024Data_2 = SiS_LVDSBARCO1024Data_2;
178 SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS_LVDSBARCO1366Data_1;
179 SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS_LVDSBARCO1366Data_2;
180 140
181 SiS_Pr->SiS_LVDSCRT11280x768_1 = SiS_LVDSCRT11280x768_1; 141 SiS_Pr->SiS_LVDSCRT1320x240_1 = SiS_LVDSCRT1320x240_1;
142 SiS_Pr->SiS_LVDSCRT1320x240_2 = SiS_LVDSCRT1320x240_2;
143 SiS_Pr->SiS_LVDSCRT1320x240_2_H = SiS_LVDSCRT1320x240_2_H;
144 SiS_Pr->SiS_LVDSCRT1320x240_3 = SiS_LVDSCRT1320x240_3;
145 SiS_Pr->SiS_LVDSCRT1320x240_3_H = SiS_LVDSCRT1320x240_3_H;
146 SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
147 SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
148#if 0
182 SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1; 149 SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
183 SiS_Pr->SiS_LVDSCRT11152x768_1 = SiS_LVDSCRT11152x768_1;
184 SiS_Pr->SiS_LVDSCRT11280x768_1_H = SiS_LVDSCRT11280x768_1_H;
185 SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H; 150 SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
186 SiS_Pr->SiS_LVDSCRT11152x768_1_H = SiS_LVDSCRT11152x768_1_H;
187 SiS_Pr->SiS_LVDSCRT11280x768_2 = SiS_LVDSCRT11280x768_2;
188 SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2; 151 SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
189 SiS_Pr->SiS_LVDSCRT11152x768_2 = SiS_LVDSCRT11152x768_2;
190 SiS_Pr->SiS_LVDSCRT11280x768_2_H = SiS_LVDSCRT11280x768_2_H;
191 SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H; 152 SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
192 SiS_Pr->SiS_LVDSCRT11152x768_2_H = SiS_LVDSCRT11152x768_2_H; 153#endif
193 SiS_Pr->SiS_LVDSCRT1320x480_1 = SiS_LVDSCRT1320x480_1;
194 SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
195 SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
196 SiS_Pr->SiS_LVDSCRT1640x480_2 = SiS_LVDSCRT1640x480_2;
197 SiS_Pr->SiS_LVDSCRT1640x480_2_H = SiS_LVDSCRT1640x480_2_H;
198 SiS_Pr->SiS_LVDSCRT1640x480_3 = SiS_LVDSCRT1640x480_3;
199 SiS_Pr->SiS_LVDSCRT1640x480_3_H = SiS_LVDSCRT1640x480_3_H;
200 154
201 SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData; 155 SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
202 SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData; 156 SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
203 157
204 SiS_Pr->SiS_CHTVUNTSCDesData = SiS_CHTVUNTSCDesData;
205 SiS_Pr->SiS_CHTVONTSCDesData = SiS_CHTVONTSCDesData;
206 SiS_Pr->SiS_CHTVUPALDesData = SiS_CHTVUPALDesData;
207 SiS_Pr->SiS_CHTVOPALDesData = SiS_CHTVOPALDesData;
208
209 SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */ 158 SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
210 SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */ 159 SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
211} 160}
@@ -213,50 +162,24 @@ InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
213 162
214#ifdef SIS300 163#ifdef SIS300
215static void 164static void
216InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 165InitTo300Pointer(struct SiS_Private *SiS_Pr)
217{ 166{
218 InitCommonPointer(SiS_Pr, HwInfo); 167 InitCommonPointer(SiS_Pr);
219 168
220 SiS_Pr->SiS_SModeIDTable = SiS300_SModeIDTable;
221 SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable; 169 SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
222 SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable; 170 SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
223 SiS_Pr->SiS_RefIndex = SiS300_RefIndex; 171 SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
224 SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table; 172 SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
225 if(HwInfo->jChipType == SIS_300) { 173 if(SiS_Pr->ChipType == SIS_300) {
226 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */ 174 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
227 } else { 175 } else {
228 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */ 176 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
229 } 177 }
230 SiS_Pr->SiS_VCLKData = SiS300_VCLKData; 178 SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
231 SiS_Pr->SiS_VBVCLKData = (SiS_VBVCLKDataStruct *)SiS300_VCLKData; 179 SiS_Pr->SiS_VBVCLKData = (struct SiS_VBVCLKData *)SiS300_VCLKData;
232 180
233 SiS_Pr->SiS_SR15 = SiS300_SR15; 181 SiS_Pr->SiS_SR15 = SiS300_SR15;
234 182
235#ifdef LINUX_KERNEL
236 SiS_Pr->pSiS_SR07 = &SiS300_SR07;
237 SiS_Pr->SiS_CR40 = SiS300_CR40;
238 SiS_Pr->SiS_CR49 = SiS300_CR49;
239 SiS_Pr->pSiS_SR1F = &SiS300_SR1F;
240 SiS_Pr->pSiS_SR21 = &SiS300_SR21;
241 SiS_Pr->pSiS_SR22 = &SiS300_SR22;
242 SiS_Pr->pSiS_SR23 = &SiS300_SR23;
243 SiS_Pr->pSiS_SR24 = &SiS300_SR24;
244 SiS_Pr->SiS_SR25 = SiS300_SR25;
245 SiS_Pr->pSiS_SR31 = &SiS300_SR31;
246 SiS_Pr->pSiS_SR32 = &SiS300_SR32;
247 SiS_Pr->pSiS_SR33 = &SiS300_SR33;
248 SiS_Pr->pSiS_CRT2Data_1_2 = &SiS300_CRT2Data_1_2;
249 SiS_Pr->pSiS_CRT2Data_4_D = &SiS300_CRT2Data_4_D;
250 SiS_Pr->pSiS_CRT2Data_4_E = &SiS300_CRT2Data_4_E;
251 SiS_Pr->pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
252 SiS_Pr->pSiS_RGBSenseData = &SiS300_RGBSenseData;
253 SiS_Pr->pSiS_VideoSenseData = &SiS300_VideoSenseData;
254 SiS_Pr->pSiS_YCSenseData = &SiS300_YCSenseData;
255 SiS_Pr->pSiS_RGBSenseData2 = &SiS300_RGBSenseData2;
256 SiS_Pr->pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
257 SiS_Pr->pSiS_YCSenseData2 = &SiS300_YCSenseData2;
258#endif
259
260 SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl; 183 SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
261 SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl; 184 SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
262 185
@@ -266,11 +189,8 @@ InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
266 SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data; 189 SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
267 190
268 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1; 191 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
269 SiS_Pr->SiS_CRT2Part2_1280x1024_1 = SiS300_CRT2Part2_1280x1024_1;
270 SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2; 192 SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
271 SiS_Pr->SiS_CRT2Part2_1280x1024_2 = SiS300_CRT2Part2_1280x1024_2;
272 SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3; 193 SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
273 SiS_Pr->SiS_CRT2Part2_1280x1024_3 = SiS300_CRT2Part2_1280x1024_3;
274 194
275 SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData; 195 SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
276 SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData; 196 SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
@@ -280,64 +200,16 @@ InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
280 SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */ 200 SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
281 SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData; 201 SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
282 202
283 SiS_Pr->SiS_PanelType00_1 = SiS300_PanelType00_1; 203 SiS_Pr->SiS_LVDS848x480Data_1 = SiS300_LVDS848x480Data_1;
284 SiS_Pr->SiS_PanelType01_1 = SiS300_PanelType01_1; 204 SiS_Pr->SiS_LVDS848x480Data_2 = SiS300_LVDS848x480Data_2;
285 SiS_Pr->SiS_PanelType02_1 = SiS300_PanelType02_1; 205 SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS300_LVDSBARCO1024Data_1;
286 SiS_Pr->SiS_PanelType03_1 = SiS300_PanelType03_1; 206 SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS300_LVDSBARCO1366Data_1;
287 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1; 207 SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS300_LVDSBARCO1366Data_2;
288 SiS_Pr->SiS_PanelType05_1 = SiS300_PanelType05_1; 208
289 SiS_Pr->SiS_PanelType06_1 = SiS300_PanelType06_1; 209 SiS_Pr->SiS_PanelType04_1a = SiS300_PanelType04_1a;
290 SiS_Pr->SiS_PanelType07_1 = SiS300_PanelType07_1; 210 SiS_Pr->SiS_PanelType04_2a = SiS300_PanelType04_2a;
291 SiS_Pr->SiS_PanelType08_1 = SiS300_PanelType08_1; 211 SiS_Pr->SiS_PanelType04_1b = SiS300_PanelType04_1b;
292 SiS_Pr->SiS_PanelType09_1 = SiS300_PanelType09_1; 212 SiS_Pr->SiS_PanelType04_2b = SiS300_PanelType04_2b;
293 SiS_Pr->SiS_PanelType0a_1 = SiS300_PanelType0a_1;
294 SiS_Pr->SiS_PanelType0b_1 = SiS300_PanelType0b_1;
295 SiS_Pr->SiS_PanelType0c_1 = SiS300_PanelType0c_1;
296 SiS_Pr->SiS_PanelType0d_1 = SiS300_PanelType0d_1;
297 SiS_Pr->SiS_PanelType0e_1 = SiS300_PanelType0e_1;
298 SiS_Pr->SiS_PanelType0f_1 = SiS300_PanelType0f_1;
299 SiS_Pr->SiS_PanelType00_2 = SiS300_PanelType00_2;
300 SiS_Pr->SiS_PanelType01_2 = SiS300_PanelType01_2;
301 SiS_Pr->SiS_PanelType02_2 = SiS300_PanelType02_2;
302 SiS_Pr->SiS_PanelType03_2 = SiS300_PanelType03_2;
303 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2;
304 SiS_Pr->SiS_PanelType05_2 = SiS300_PanelType05_2;
305 SiS_Pr->SiS_PanelType06_2 = SiS300_PanelType06_2;
306 SiS_Pr->SiS_PanelType07_2 = SiS300_PanelType07_2;
307 SiS_Pr->SiS_PanelType08_2 = SiS300_PanelType08_2;
308 SiS_Pr->SiS_PanelType09_2 = SiS300_PanelType09_2;
309 SiS_Pr->SiS_PanelType0a_2 = SiS300_PanelType0a_2;
310 SiS_Pr->SiS_PanelType0b_2 = SiS300_PanelType0b_2;
311 SiS_Pr->SiS_PanelType0c_2 = SiS300_PanelType0c_2;
312 SiS_Pr->SiS_PanelType0d_2 = SiS300_PanelType0d_2;
313 SiS_Pr->SiS_PanelType0e_2 = SiS300_PanelType0e_2;
314 SiS_Pr->SiS_PanelType0f_2 = SiS300_PanelType0f_2;
315 SiS_Pr->SiS_PanelTypeNS_1 = SiS300_PanelTypeNS_1;
316 SiS_Pr->SiS_PanelTypeNS_2 = SiS300_PanelTypeNS_2;
317
318 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) {
319 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1a;
320 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2a;
321 }
322 if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) {
323 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1b;
324 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2b;
325 }
326
327 SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS300_LVDSCRT1800x600_1;
328 SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS300_LVDSCRT1800x600_1_H;
329 SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS300_LVDSCRT1800x600_2;
330 SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS300_LVDSCRT1800x600_2_H;
331 SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS300_LVDSCRT11024x768_1;
332 SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS300_LVDSCRT11024x768_1_H;
333 SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS300_LVDSCRT11024x768_2;
334 SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS300_LVDSCRT11024x768_2_H;
335 SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS300_LVDSCRT11280x1024_1;
336 SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS300_LVDSCRT11280x1024_1_H;
337 SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS300_LVDSCRT11280x1024_2;
338 SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS300_LVDSCRT11280x1024_2_H;
339 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS300_LVDSCRT1XXXxXXX_1;
340 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS300_LVDSCRT1XXXxXXX_1_H;
341 213
342 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC; 214 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
343 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC; 215 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
@@ -367,64 +239,38 @@ InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
367 239
368#ifdef SIS315H 240#ifdef SIS315H
369static void 241static void
370InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 242InitTo310Pointer(struct SiS_Private *SiS_Pr)
371{ 243{
372 InitCommonPointer(SiS_Pr, HwInfo); 244 InitCommonPointer(SiS_Pr);
373 245
374 SiS_Pr->SiS_SModeIDTable = SiS310_SModeIDTable;
375 SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable; 246 SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
376 SiS_Pr->SiS_RefIndex = (SiS_Ext2Struct *)SiS310_RefIndex; 247 SiS_Pr->SiS_RefIndex = SiS310_RefIndex;
377 SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table; 248 SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
378 if(HwInfo->jChipType >= SIS_340) { 249 if(SiS_Pr->ChipType >= SIS_340) {
379 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 */ 250 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 + XGI */
380 } else if(HwInfo->jChipType >= SIS_761) { 251 } else if(SiS_Pr->ChipType >= SIS_761) {
381 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */ 252 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */
382 } else if(HwInfo->jChipType >= SIS_760) { 253 } else if(SiS_Pr->ChipType >= SIS_760) {
383 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */ 254 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
384 } else if(HwInfo->jChipType >= SIS_661) { 255 } else if(SiS_Pr->ChipType >= SIS_661) {
385 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */ 256 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
386 } else if(HwInfo->jChipType == SIS_330) { 257 } else if(SiS_Pr->ChipType == SIS_330) {
387 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */ 258 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
388 } else if(HwInfo->jChipType > SIS_315PRO) { 259 } else if(SiS_Pr->ChipType > SIS_315PRO) {
389 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */ 260 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
390 } else { 261 } else {
391 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */ 262 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
392 } 263 }
393 if(HwInfo->jChipType >= SIS_340) { 264 if(SiS_Pr->ChipType >= SIS_340) {
394 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340; 265 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340;
395 } else { 266 } else {
396 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1; 267 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
397 } 268 }
398 SiS_Pr->SiS_VCLKData = SiS310_VCLKData; 269 SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
399 SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData; 270 SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
400 271
401 SiS_Pr->SiS_SR15 = SiS310_SR15; 272 SiS_Pr->SiS_SR15 = SiS310_SR15;
402 273
403#ifdef LINUX_KERNEL
404 SiS_Pr->pSiS_SR07 = &SiS310_SR07;
405 SiS_Pr->SiS_CR40 = SiS310_CR40;
406 SiS_Pr->SiS_CR49 = SiS310_CR49;
407 SiS_Pr->pSiS_SR1F = &SiS310_SR1F;
408 SiS_Pr->pSiS_SR21 = &SiS310_SR21;
409 SiS_Pr->pSiS_SR22 = &SiS310_SR22;
410 SiS_Pr->pSiS_SR23 = &SiS310_SR23;
411 SiS_Pr->pSiS_SR24 = &SiS310_SR24;
412 SiS_Pr->SiS_SR25 = SiS310_SR25;
413 SiS_Pr->pSiS_SR31 = &SiS310_SR31;
414 SiS_Pr->pSiS_SR32 = &SiS310_SR32;
415 SiS_Pr->pSiS_SR33 = &SiS310_SR33;
416 SiS_Pr->pSiS_CRT2Data_1_2 = &SiS310_CRT2Data_1_2;
417 SiS_Pr->pSiS_CRT2Data_4_D = &SiS310_CRT2Data_4_D;
418 SiS_Pr->pSiS_CRT2Data_4_E = &SiS310_CRT2Data_4_E;
419 SiS_Pr->pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
420 SiS_Pr->pSiS_RGBSenseData = &SiS310_RGBSenseData;
421 SiS_Pr->pSiS_VideoSenseData = &SiS310_VideoSenseData;
422 SiS_Pr->pSiS_YCSenseData = &SiS310_YCSenseData;
423 SiS_Pr->pSiS_RGBSenseData2 = &SiS310_RGBSenseData2;
424 SiS_Pr->pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
425 SiS_Pr->pSiS_YCSenseData2 = &SiS310_YCSenseData2;
426#endif
427
428 SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl; 274 SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
429 SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS; 275 SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
430 276
@@ -435,41 +281,6 @@ InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
435 281
436 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1; 282 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
437 283
438 SiS_Pr->SiS_PanelType00_1 = SiS310_PanelType00_1;
439 SiS_Pr->SiS_PanelType01_1 = SiS310_PanelType01_1;
440 SiS_Pr->SiS_PanelType02_1 = SiS310_PanelType02_1;
441 SiS_Pr->SiS_PanelType03_1 = SiS310_PanelType03_1;
442 SiS_Pr->SiS_PanelType04_1 = SiS310_PanelType04_1;
443 SiS_Pr->SiS_PanelType05_1 = SiS310_PanelType05_1;
444 SiS_Pr->SiS_PanelType06_1 = SiS310_PanelType06_1;
445 SiS_Pr->SiS_PanelType07_1 = SiS310_PanelType07_1;
446 SiS_Pr->SiS_PanelType08_1 = SiS310_PanelType08_1;
447 SiS_Pr->SiS_PanelType09_1 = SiS310_PanelType09_1;
448 SiS_Pr->SiS_PanelType0a_1 = SiS310_PanelType0a_1;
449 SiS_Pr->SiS_PanelType0b_1 = SiS310_PanelType0b_1;
450 SiS_Pr->SiS_PanelType0c_1 = SiS310_PanelType0c_1;
451 SiS_Pr->SiS_PanelType0d_1 = SiS310_PanelType0d_1;
452 SiS_Pr->SiS_PanelType0e_1 = SiS310_PanelType0e_1;
453 SiS_Pr->SiS_PanelType0f_1 = SiS310_PanelType0f_1;
454 SiS_Pr->SiS_PanelType00_2 = SiS310_PanelType00_2;
455 SiS_Pr->SiS_PanelType01_2 = SiS310_PanelType01_2;
456 SiS_Pr->SiS_PanelType02_2 = SiS310_PanelType02_2;
457 SiS_Pr->SiS_PanelType03_2 = SiS310_PanelType03_2;
458 SiS_Pr->SiS_PanelType04_2 = SiS310_PanelType04_2;
459 SiS_Pr->SiS_PanelType05_2 = SiS310_PanelType05_2;
460 SiS_Pr->SiS_PanelType06_2 = SiS310_PanelType06_2;
461 SiS_Pr->SiS_PanelType07_2 = SiS310_PanelType07_2;
462 SiS_Pr->SiS_PanelType08_2 = SiS310_PanelType08_2;
463 SiS_Pr->SiS_PanelType09_2 = SiS310_PanelType09_2;
464 SiS_Pr->SiS_PanelType0a_2 = SiS310_PanelType0a_2;
465 SiS_Pr->SiS_PanelType0b_2 = SiS310_PanelType0b_2;
466 SiS_Pr->SiS_PanelType0c_2 = SiS310_PanelType0c_2;
467 SiS_Pr->SiS_PanelType0d_2 = SiS310_PanelType0d_2;
468 SiS_Pr->SiS_PanelType0e_2 = SiS310_PanelType0e_2;
469 SiS_Pr->SiS_PanelType0f_2 = SiS310_PanelType0f_2;
470 SiS_Pr->SiS_PanelTypeNS_1 = SiS310_PanelTypeNS_1;
471 SiS_Pr->SiS_PanelTypeNS_2 = SiS310_PanelTypeNS_2;
472
473 SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData; 284 SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
474 SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData; 285 SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
475 SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData; 286 SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
@@ -478,33 +289,11 @@ InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
478 SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData; 289 SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
479 SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData; 290 SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
480 291
481 SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS310_LVDSCRT1800x600_1; 292 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
482 SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS310_LVDSCRT11024x768_1; 293 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
483 SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS310_LVDSCRT11280x1024_1; 294 SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
484 SiS_Pr->SiS_LVDSCRT11400x1050_1 = SiS310_LVDSCRT11400x1050_1; 295 SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
485 SiS_Pr->SiS_LVDSCRT11600x1200_1 = SiS310_LVDSCRT11600x1200_1; 296 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
486 SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS310_LVDSCRT1800x600_1_H;
487 SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS310_LVDSCRT11024x768_1_H;
488 SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS310_LVDSCRT11280x1024_1_H;
489 SiS_Pr->SiS_LVDSCRT11400x1050_1_H = SiS310_LVDSCRT11400x1050_1_H;
490 SiS_Pr->SiS_LVDSCRT11600x1200_1_H = SiS310_LVDSCRT11600x1200_1_H;
491 SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS310_LVDSCRT1800x600_2;
492 SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS310_LVDSCRT11024x768_2;
493 SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS310_LVDSCRT11280x1024_2;
494 SiS_Pr->SiS_LVDSCRT11400x1050_2 = SiS310_LVDSCRT11400x1050_2;
495 SiS_Pr->SiS_LVDSCRT11600x1200_2 = SiS310_LVDSCRT11600x1200_2;
496 SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS310_LVDSCRT1800x600_2_H;
497 SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS310_LVDSCRT11024x768_2_H;
498 SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS310_LVDSCRT11280x1024_2_H;
499 SiS_Pr->SiS_LVDSCRT11400x1050_2_H = SiS310_LVDSCRT11400x1050_2_H;
500 SiS_Pr->SiS_LVDSCRT11600x1200_2_H = SiS310_LVDSCRT11600x1200_2_H;
501 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS310_LVDSCRT1XXXxXXX_1;
502 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS310_LVDSCRT1XXXxXXX_1_H;
503 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
504 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
505 SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
506 SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
507 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
508 297
509 SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC; 298 SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
510 SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC; 299 SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
@@ -528,208 +317,203 @@ InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
528} 317}
529#endif 318#endif
530 319
531static void 320BOOLEAN
532SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 321SiSInitPtr(struct SiS_Private *SiS_Pr)
533{ 322{
534 switch(HwInfo->jChipType) { 323 if(SiS_Pr->ChipType < SIS_315H) {
535#ifdef SIS315H
536 case SIS_315H:
537 case SIS_315:
538 case SIS_315PRO:
539 case SIS_550:
540 case SIS_650:
541 case SIS_740:
542 case SIS_330:
543 case SIS_661:
544 case SIS_741:
545 case SIS_660:
546 case SIS_760:
547 case SIS_761:
548 case SIS_340:
549 InitTo310Pointer(SiS_Pr, HwInfo);
550 break;
551#endif
552#ifdef SIS300 324#ifdef SIS300
553 case SIS_300: 325 InitTo300Pointer(SiS_Pr);
554 case SIS_540: 326#else
555 case SIS_630: 327 return FALSE;
556 case SIS_730: 328#endif
557 InitTo300Pointer(SiS_Pr, HwInfo); 329 } else {
558 break; 330#ifdef SIS315H
331 InitTo310Pointer(SiS_Pr);
332#else
333 return FALSE;
559#endif 334#endif
560 default:
561 break;
562 } 335 }
336 return TRUE;
563} 337}
564 338
565/*********************************************/ 339/*********************************************/
566/* HELPER: Get ModeID */ 340/* HELPER: Get ModeID */
567/*********************************************/ 341/*********************************************/
568 342
569#ifdef LINUX_XF86 343#ifndef SIS_XORG_XF86
570USHORT 344static
571SiS_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, 345#endif
572 int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight) 346unsigned short
347SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
348 int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight)
573{ 349{
574 USHORT ModeIndex = 0; 350 unsigned short ModeIndex = 0;
575 351
576 switch(HDisplay) 352 switch(HDisplay)
577 { 353 {
578 case 320: 354 case 320:
579 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth]; 355 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
580 else if(VDisplay == 240) { 356 else if(VDisplay == 240) {
581 if(FSTN) ModeIndex = ModeIndex_320x240_FSTN[Depth]; 357 if((VBFlags & CRT2_LCD) && (FSTN))
582 else ModeIndex = ModeIndex_320x240[Depth]; 358 ModeIndex = ModeIndex_320x240_FSTN[Depth];
583 } 359 else
584 break; 360 ModeIndex = ModeIndex_320x240[Depth];
585 case 400: 361 }
586 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth >= 600))) { 362 break;
587 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth]; 363 case 400:
588 } 364 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth >= 600))) {
589 break; 365 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
590 case 512: 366 }
591 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth >= 768))) { 367 break;
592 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth]; 368 case 512:
593 } 369 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth >= 768))) {
594 break; 370 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
595 case 640: 371 }
596 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth]; 372 break;
597 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth]; 373 case 640:
598 break; 374 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
599 case 720: 375 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
600 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth]; 376 break;
601 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth]; 377 case 720:
602 break; 378 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
603 case 768: 379 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
604 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth]; 380 break;
605 break; 381 case 768:
606 case 800: 382 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
607 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth]; 383 break;
608 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth]; 384 case 800:
609 break; 385 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
610 case 848: 386 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
611 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth]; 387 break;
612 break; 388 case 848:
613 case 856: 389 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
614 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth]; 390 break;
615 break; 391 case 856:
616 case 960: 392 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
617 if(VGAEngine == SIS_315_VGA) { 393 break;
618 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth]; 394 case 960:
619 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth]; 395 if(VGAEngine == SIS_315_VGA) {
620 } 396 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
621 break; 397 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
622 case 1024: 398 }
623 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth]; 399 break;
624 else if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth]; 400 case 1024:
625 else if(VGAEngine == SIS_300_VGA) { 401 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
626 if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth]; 402 else if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
627 } 403 else if(VGAEngine == SIS_300_VGA) {
628 break; 404 if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth];
629 case 1152: 405 }
630 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth]; 406 break;
631 if(VGAEngine == SIS_300_VGA) { 407 case 1152:
632 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth]; 408 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
633 } 409 if(VGAEngine == SIS_300_VGA) {
634 break; 410 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
635 case 1280: 411 }
636 switch(VDisplay) { 412 break;
637 case 720: 413 case 1280:
638 ModeIndex = ModeIndex_1280x720[Depth]; 414 switch(VDisplay) {
639 break; 415 case 720:
640 case 768: 416 ModeIndex = ModeIndex_1280x720[Depth];
641 if(VGAEngine == SIS_300_VGA) { 417 break;
642 ModeIndex = ModeIndex_300_1280x768[Depth]; 418 case 768:
643 } else { 419 if(VGAEngine == SIS_300_VGA) {
644 ModeIndex = ModeIndex_310_1280x768[Depth]; 420 ModeIndex = ModeIndex_300_1280x768[Depth];
645 } 421 } else {
646 break; 422 ModeIndex = ModeIndex_310_1280x768[Depth];
647 case 800: 423 }
648 if(VGAEngine == SIS_315_VGA) { 424 break;
649 ModeIndex = ModeIndex_1280x800[Depth]; 425 case 800:
650 } 426 if(VGAEngine == SIS_315_VGA) {
651 break; 427 ModeIndex = ModeIndex_1280x800[Depth];
652 case 960: 428 }
653 ModeIndex = ModeIndex_1280x960[Depth]; 429 break;
654 break; 430 case 854:
655 case 1024: 431 if(VGAEngine == SIS_315_VGA) {
656 ModeIndex = ModeIndex_1280x1024[Depth]; 432 ModeIndex = ModeIndex_1280x854[Depth];
657 break; 433 }
658 } 434 break;
659 break; 435 case 960:
660 case 1360: 436 ModeIndex = ModeIndex_1280x960[Depth];
661 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth]; 437 break;
662 if(VGAEngine == SIS_300_VGA) { 438 case 1024:
663 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth]; 439 ModeIndex = ModeIndex_1280x1024[Depth];
664 } 440 break;
665 break; 441 }
666 case 1400: 442 break;
667 if(VGAEngine == SIS_315_VGA) { 443 case 1360:
668 if(VDisplay == 1050) { 444 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
669 ModeIndex = ModeIndex_1400x1050[Depth]; 445 if(VGAEngine == SIS_300_VGA) {
670 } 446 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
671 } 447 }
672 break; 448 break;
673 case 1600: 449 case 1400:
674 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth]; 450 if(VGAEngine == SIS_315_VGA) {
675 break; 451 if(VDisplay == 1050) {
676 case 1680: 452 ModeIndex = ModeIndex_1400x1050[Depth];
677 if(VGAEngine == SIS_315_VGA) { 453 }
678 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth]; 454 }
679 } 455 break;
680 break; 456 case 1600:
681 case 1920: 457 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
682 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth]; 458 break;
683 else if(VGAEngine == SIS_315_VGA) { 459 case 1680:
684 if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth]; 460 if(VGAEngine == SIS_315_VGA) {
685 } 461 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
686 break; 462 }
687 case 2048: 463 break;
688 if(VDisplay == 1536) { 464 case 1920:
689 if(VGAEngine == SIS_300_VGA) { 465 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
690 ModeIndex = ModeIndex_300_2048x1536[Depth]; 466 else if(VGAEngine == SIS_315_VGA) {
691 } else { 467 if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth];
692 ModeIndex = ModeIndex_310_2048x1536[Depth]; 468 }
693 } 469 break;
694 } 470 case 2048:
695 break; 471 if(VDisplay == 1536) {
472 if(VGAEngine == SIS_300_VGA) {
473 ModeIndex = ModeIndex_300_2048x1536[Depth];
474 } else {
475 ModeIndex = ModeIndex_310_2048x1536[Depth];
476 }
477 }
478 break;
696 } 479 }
697 480
698 return(ModeIndex); 481 return ModeIndex;
699} 482}
700#endif
701 483
702USHORT 484unsigned short
703SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, 485SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
704 int Depth, BOOLEAN FSTN, USHORT CustomT, int LCDwidth, int LCDheight) 486 int Depth, BOOLEAN FSTN, unsigned short CustomT, int LCDwidth, int LCDheight,
487 unsigned int VBFlags2)
705{ 488{
706 USHORT ModeIndex = 0; 489 unsigned short ModeIndex = 0;
707 490
708 if(VBFlags & (VB_LVDS | VB_30xBDH)) { 491 if(VBFlags2 & (VB2_LVDS | VB2_30xBDH)) {
709 492
710 switch(HDisplay) 493 switch(HDisplay)
711 { 494 {
712 case 320: 495 case 320:
713 if(CustomT != CUT_PANEL848) { 496 if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
714 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth]; 497 if(VDisplay == 200) {
715 else if(VDisplay == 240) { 498 if(!FSTN) ModeIndex = ModeIndex_320x200[Depth];
499 } else if(VDisplay == 240) {
716 if(!FSTN) ModeIndex = ModeIndex_320x240[Depth]; 500 if(!FSTN) ModeIndex = ModeIndex_320x240[Depth];
717 else if(VGAEngine == SIS_315_VGA) { 501 else if(VGAEngine == SIS_315_VGA) {
718 ModeIndex = ModeIndex_320x240_FSTN[Depth]; 502 ModeIndex = ModeIndex_320x240_FSTN[Depth];
719 } 503 }
720 } 504 }
721 } 505 }
722 break; 506 break;
723 case 400: 507 case 400:
724 if(CustomT != CUT_PANEL848) { 508 if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
725 if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) { 509 if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 & VB2_TRUMPION))) {
726 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth]; 510 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
727 } 511 }
728 } 512 }
729 break; 513 break;
730 case 512: 514 case 512:
731 if(CustomT != CUT_PANEL848) { 515 if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
732 if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) { 516 if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 & VB2_TRUMPION))) {
733 if(LCDwidth >= 1024 && LCDwidth != 1152 && LCDheight >= 768) { 517 if(LCDwidth >= 1024 && LCDwidth != 1152 && LCDheight >= 768) {
734 if(VDisplay == 384) { 518 if(VDisplay == 384) {
735 ModeIndex = ModeIndex_512x384[Depth]; 519 ModeIndex = ModeIndex_512x384[Depth];
@@ -739,9 +523,10 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
739 } 523 }
740 break; 524 break;
741 case 640: 525 case 640:
742 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth]; 526 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
743 else if(VDisplay == 400) { 527 else if(VDisplay == 400) {
744 if(CustomT != CUT_PANEL848) ModeIndex = ModeIndex_640x400[Depth]; 528 if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856))
529 ModeIndex = ModeIndex_640x400[Depth];
745 } 530 }
746 break; 531 break;
747 case 800: 532 case 800:
@@ -752,6 +537,11 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
752 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth]; 537 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
753 } 538 }
754 break; 539 break;
540 case 856:
541 if(CustomT == CUT_PANEL856) {
542 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
543 }
544 break;
755 case 1024: 545 case 1024:
756 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth]; 546 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
757 else if(VGAEngine == SIS_300_VGA) { 547 else if(VGAEngine == SIS_300_VGA) {
@@ -762,7 +552,7 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
762 break; 552 break;
763 case 1152: 553 case 1152:
764 if(VGAEngine == SIS_300_VGA) { 554 if(VGAEngine == SIS_300_VGA) {
765 if((VDisplay == 768) && (LCDheight == 768)) { 555 if((VDisplay == 768) && (LCDheight == 768)) {
766 ModeIndex = ModeIndex_1152x768[Depth]; 556 ModeIndex = ModeIndex_1152x768[Depth];
767 } 557 }
768 } 558 }
@@ -770,49 +560,49 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
770 case 1280: 560 case 1280:
771 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth]; 561 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
772 else if(VGAEngine == SIS_315_VGA) { 562 else if(VGAEngine == SIS_315_VGA) {
773 if((VDisplay == 768) && (LCDheight == 768)) { 563 if((VDisplay == 768) && (LCDheight == 768)) {
774 ModeIndex = ModeIndex_310_1280x768[Depth]; 564 ModeIndex = ModeIndex_310_1280x768[Depth];
775 } 565 }
776 } 566 }
777 break; 567 break;
778 case 1360: 568 case 1360:
779 if(VGAEngine == SIS_300_VGA) { 569 if(VGAEngine == SIS_300_VGA) {
780 if(CustomT == CUT_BARCO1366) { 570 if(CustomT == CUT_BARCO1366) {
781 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth]; 571 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
782 } 572 }
783 } 573 }
784 if(CustomT == CUT_PANEL848) { 574 if(CustomT == CUT_PANEL848) {
785 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth]; 575 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
786 } 576 }
787 break; 577 break;
788 case 1400: 578 case 1400:
789 if(VGAEngine == SIS_315_VGA) { 579 if(VGAEngine == SIS_315_VGA) {
790 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth]; 580 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
791 } 581 }
792 break; 582 break;
793 case 1600: 583 case 1600:
794 if(VGAEngine == SIS_315_VGA) { 584 if(VGAEngine == SIS_315_VGA) {
795 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth]; 585 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
796 } 586 }
797 break; 587 break;
798 } 588 }
799 589
800 } else if(VBFlags & VB_SISBRIDGE) { 590 } else if(VBFlags2 & VB2_SISBRIDGE) {
801 591
802 switch(HDisplay) 592 switch(HDisplay)
803 { 593 {
804 case 320: 594 case 320:
805 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth]; 595 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
806 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth]; 596 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
807 break; 597 break;
808 case 400: 598 case 400:
809 if(LCDwidth >= 800 && LCDheight >= 600) { 599 if(LCDwidth >= 800 && LCDheight >= 600) {
810 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth]; 600 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
811 } 601 }
812 break; 602 break;
813 case 512: 603 case 512:
814 if(LCDwidth >= 1024 && LCDheight >= 768 && LCDwidth != 1152) { 604 if(LCDwidth >= 1024 && LCDheight >= 768 && LCDwidth != 1152) {
815 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth]; 605 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
816 } 606 }
817 break; 607 break;
818 case 640: 608 case 640:
@@ -821,96 +611,115 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
821 break; 611 break;
822 case 720: 612 case 720:
823 if(VGAEngine == SIS_315_VGA) { 613 if(VGAEngine == SIS_315_VGA) {
824 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth]; 614 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
825 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth]; 615 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
826 } 616 }
827 break; 617 break;
828 case 768: 618 case 768:
829 if(VGAEngine == SIS_315_VGA) { 619 if(VGAEngine == SIS_315_VGA) {
830 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth]; 620 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
831 } 621 }
832 break; 622 break;
833 case 800: 623 case 800:
834 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth]; 624 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
835 if(VGAEngine == SIS_315_VGA) { 625 if(VGAEngine == SIS_315_VGA) {
836 if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth]; 626 if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
837 } 627 }
838 break; 628 break;
839 case 848: 629 case 848:
840 if(VGAEngine == SIS_315_VGA) { 630 if(VGAEngine == SIS_315_VGA) {
841 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth]; 631 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
842 } 632 }
843 break; 633 break;
844 case 856: 634 case 856:
845 if(VGAEngine == SIS_315_VGA) { 635 if(VGAEngine == SIS_315_VGA) {
846 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth]; 636 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
847 } 637 }
848 break; 638 break;
849 case 960: 639 case 960:
850 if(VGAEngine == SIS_315_VGA) { 640 if(VGAEngine == SIS_315_VGA) {
851 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth]; 641 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
852 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth]; 642 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
853 } 643 }
854 break; 644 break;
855 case 1024: 645 case 1024:
856 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth]; 646 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
857 if(VGAEngine == SIS_315_VGA) { 647 if(VGAEngine == SIS_315_VGA) {
858 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth]; 648 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
859 } 649 }
860 break; 650 break;
861 case 1152: 651 case 1152:
862 if(VGAEngine == SIS_315_VGA) { 652 if(VGAEngine == SIS_315_VGA) {
863 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth]; 653 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
864 } 654 }
865 break; 655 break;
866 case 1280: 656 case 1280:
867 switch(VDisplay) { 657 switch(VDisplay) {
868 case 720: 658 case 720:
869 ModeIndex = ModeIndex_1280x720[Depth]; 659 ModeIndex = ModeIndex_1280x720[Depth];
870 case 768: 660 case 768:
871 if(VGAEngine == SIS_300_VGA) { 661 if(VGAEngine == SIS_300_VGA) {
872 ModeIndex = ModeIndex_300_1280x768[Depth]; 662 ModeIndex = ModeIndex_300_1280x768[Depth];
873 } else { 663 } else {
874 ModeIndex = ModeIndex_310_1280x768[Depth]; 664 ModeIndex = ModeIndex_310_1280x768[Depth];
875 } 665 }
876 break; 666 break;
877 case 800: 667 case 800:
878 if(VGAEngine == SIS_315_VGA) { 668 if(VGAEngine == SIS_315_VGA) {
879 ModeIndex = ModeIndex_1280x800[Depth]; 669 ModeIndex = ModeIndex_1280x800[Depth];
880 } 670 }
881 break; 671 break;
672 case 854:
673 if(VGAEngine == SIS_315_VGA) {
674 ModeIndex = ModeIndex_1280x854[Depth];
675 }
676 break;
882 case 960: 677 case 960:
883 ModeIndex = ModeIndex_1280x960[Depth]; 678 ModeIndex = ModeIndex_1280x960[Depth];
884 break; 679 break;
885 case 1024: 680 case 1024:
886 ModeIndex = ModeIndex_1280x1024[Depth]; 681 ModeIndex = ModeIndex_1280x1024[Depth];
887 break; 682 break;
888 } 683 }
889 break; 684 break;
890 case 1360: 685 case 1360:
891 if(VGAEngine == SIS_315_VGA) { 686 if(VGAEngine == SIS_315_VGA) { /* OVER1280 only? */
892 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth]; 687 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
893 } 688 }
894 break; 689 break;
895 case 1400: 690 case 1400:
896 if(VGAEngine == SIS_315_VGA) { 691 if(VGAEngine == SIS_315_VGA) {
897 if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) { 692 if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
898 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth]; 693 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
899 } 694 }
900 } 695 }
901 break; 696 break;
902 case 1600: 697 case 1600:
903 if(VGAEngine == SIS_315_VGA) { 698 if(VGAEngine == SIS_315_VGA) {
904 if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) { 699 if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
905 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth]; 700 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
906 } 701 }
907 } 702 }
908 break; 703 break;
909#ifndef VB_FORBID_CRT2LCD_OVER_1600 704#ifndef VB_FORBID_CRT2LCD_OVER_1600
910 case 1680: 705 case 1680:
911 if(VGAEngine == SIS_315_VGA) { 706 if(VGAEngine == SIS_315_VGA) {
912 if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) { 707 if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
913 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth]; 708 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
709 }
710 }
711 break;
712 case 1920:
713 if(VGAEngine == SIS_315_VGA) {
714 if(VBFlags2 & VB2_LCDOVER1600BRIDGE) {
715 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
716 }
717 }
718 break;
719 case 2048:
720 if(VGAEngine == SIS_315_VGA) {
721 if(VBFlags2 & VB2_LCDOVER1600BRIDGE) {
722 if(VDisplay == 1536) ModeIndex = ModeIndex_310_2048x1536[Depth];
914 } 723 }
915 } 724 }
916 break; 725 break;
@@ -921,16 +730,17 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
921 return ModeIndex; 730 return ModeIndex;
922} 731}
923 732
924USHORT 733unsigned short
925SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth) 734SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth,
735 unsigned int VBFlags2)
926{ 736{
927 USHORT ModeIndex = 0; 737 unsigned short ModeIndex = 0;
928 738
929 if(VBFlags & VB_CHRONTEL) { 739 if(VBFlags2 & VB2_CHRONTEL) {
930 740
931 switch(HDisplay) 741 switch(HDisplay)
932 { 742 {
933 case 512: 743 case 512:
934 if(VGAEngine == SIS_315_VGA) { 744 if(VGAEngine == SIS_315_VGA) {
935 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth]; 745 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
936 } 746 }
@@ -944,27 +754,27 @@ SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int D
944 break; 754 break;
945 case 1024: 755 case 1024:
946 if(VGAEngine == SIS_315_VGA) { 756 if(VGAEngine == SIS_315_VGA) {
947 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth]; 757 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
948 } 758 }
949 break; 759 break;
950 } 760 }
951 761
952 } else if(VBFlags & VB_SISTVBRIDGE) { 762 } else if(VBFlags2 & VB2_SISTVBRIDGE) {
953 763
954 switch(HDisplay) 764 switch(HDisplay)
955 { 765 {
956 case 320: 766 case 320:
957 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth]; 767 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
958 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth]; 768 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
959 break; 769 break;
960 case 400: 770 case 400:
961 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth]; 771 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
962 break; 772 break;
963 case 512: 773 case 512:
964 if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) || 774 if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) ||
965 (VBFlags & TV_HIVISION) || 775 (VBFlags & TV_HIVISION) ||
966 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) { 776 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
967 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth]; 777 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
968 } 778 }
969 break; 779 break;
970 case 640: 780 case 640:
@@ -973,34 +783,34 @@ SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int D
973 break; 783 break;
974 case 720: 784 case 720:
975 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) { 785 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
976 if(VDisplay == 480) { 786 if(VDisplay == 480) {
977 ModeIndex = ModeIndex_720x480[Depth]; 787 ModeIndex = ModeIndex_720x480[Depth];
978 } else if(VDisplay == 576) { 788 } else if(VDisplay == 576) {
979 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) || 789 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
980 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) 790 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) )
981 ModeIndex = ModeIndex_720x576[Depth]; 791 ModeIndex = ModeIndex_720x576[Depth];
982 } 792 }
983 } 793 }
984 break; 794 break;
985 case 768: 795 case 768:
986 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) { 796 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
987 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) || 797 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
988 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) { 798 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
989 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth]; 799 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
990 } 800 }
991 } 801 }
992 break; 802 break;
993 case 800: 803 case 800:
994 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth]; 804 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
995 else if(VDisplay == 480) { 805 else if(VDisplay == 480) {
996 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) { 806 if(!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P))) {
997 ModeIndex = ModeIndex_800x480[Depth]; 807 ModeIndex = ModeIndex_800x480[Depth];
998 } 808 }
999 } 809 }
1000 break; 810 break;
1001 case 960: 811 case 960:
1002 if(VGAEngine == SIS_315_VGA) { 812 if(VGAEngine == SIS_315_VGA) {
1003 if(VDisplay == 600) { 813 if(VDisplay == 600) {
1004 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) { 814 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1005 ModeIndex = ModeIndex_960x600[Depth]; 815 ModeIndex = ModeIndex_960x600[Depth];
1006 } 816 }
@@ -1009,25 +819,28 @@ SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int D
1009 break; 819 break;
1010 case 1024: 820 case 1024:
1011 if(VDisplay == 768) { 821 if(VDisplay == 768) {
1012 if(VBFlags & (VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)) { 822 if(VBFlags2 & VB2_30xBLV) {
1013 ModeIndex = ModeIndex_1024x768[Depth]; 823 ModeIndex = ModeIndex_1024x768[Depth];
1014 } 824 }
1015 } else if(VDisplay == 576) { 825 } else if(VDisplay == 576) {
1016 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) { 826 if( (VBFlags & TV_HIVISION) ||
827 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)) ||
828 ((VBFlags2 & VB2_30xBLV) &&
829 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL))) ) {
1017 ModeIndex = ModeIndex_1024x576[Depth]; 830 ModeIndex = ModeIndex_1024x576[Depth];
1018 } 831 }
1019 } 832 }
1020 break; 833 break;
1021 case 1280: 834 case 1280:
1022 if(VDisplay == 720) { 835 if(VDisplay == 720) {
1023 if((VBFlags & TV_HIVISION) || 836 if((VBFlags & TV_HIVISION) ||
1024 ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) { 837 ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) {
1025 ModeIndex = ModeIndex_1280x720[Depth]; 838 ModeIndex = ModeIndex_1280x720[Depth];
1026 } 839 }
1027 } else if(VDisplay == 1024) { 840 } else if(VDisplay == 1024) {
1028 if((VBFlags & TV_HIVISION) || 841 if((VBFlags & TV_HIVISION) ||
1029 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) { 842 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1030 ModeIndex = ModeIndex_1280x1024[Depth]; 843 ModeIndex = ModeIndex_1280x1024[Depth];
1031 } 844 }
1032 } 845 }
1033 break; 846 break;
@@ -1036,99 +849,31 @@ SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int D
1036 return ModeIndex; 849 return ModeIndex;
1037} 850}
1038 851
1039USHORT 852unsigned short
1040SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth) 853SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth,
854 unsigned int VBFlags2)
1041{ 855{
1042 USHORT ModeIndex = 0; 856 if(!(VBFlags2 & VB2_SISVGA2BRIDGE)) return 0;
1043 857
1044 if(!(VBFlags & (VB_301|VB_301B|VB_301C|VB_302B))) return 0; 858 if(HDisplay >= 1920) return 0;
1045 859
1046 switch(HDisplay) 860 switch(HDisplay)
1047 { 861 {
1048 case 320:
1049 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
1050 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
1051 break;
1052 case 400:
1053 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
1054 break;
1055 case 512:
1056 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
1057 break;
1058 case 640:
1059 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
1060 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
1061 break;
1062 case 720:
1063 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
1064 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
1065 break;
1066 case 768:
1067 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
1068 break;
1069 case 800:
1070 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
1071 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
1072 break;
1073 case 848:
1074 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
1075 break;
1076 case 856:
1077 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
1078 break;
1079 case 960:
1080 if(VGAEngine == SIS_315_VGA) {
1081 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
1082 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
1083 }
1084 break;
1085 case 1024:
1086 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
1087 else if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
1088 break;
1089 case 1152:
1090 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
1091 else if(VGAEngine == SIS_300_VGA) {
1092 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
1093 }
1094 break;
1095 case 1280:
1096 if(VDisplay == 768) {
1097 if(VGAEngine == SIS_300_VGA) {
1098 ModeIndex = ModeIndex_300_1280x768[Depth];
1099 } else {
1100 ModeIndex = ModeIndex_310_1280x768[Depth];
1101 }
1102 } else if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
1103 else if(VDisplay == 720) ModeIndex = ModeIndex_1280x720[Depth];
1104 else if(VDisplay == 800) ModeIndex = ModeIndex_1280x800[Depth];
1105 else if(VDisplay == 960) ModeIndex = ModeIndex_1280x960[Depth];
1106 break;
1107 case 1360:
1108 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
1109 break;
1110 case 1400:
1111 if(VGAEngine == SIS_315_VGA) {
1112 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
1113 }
1114 break;
1115 case 1600: 862 case 1600:
1116 if(VGAEngine == SIS_315_VGA) { 863 if(VDisplay == 1200) {
1117 if(VBFlags & (VB_301B|VB_301C|VB_302B)) { 864 if(VGAEngine != SIS_315_VGA) return 0;
1118 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth]; 865 if(!(VBFlags2 & VB2_30xB)) return 0;
1119 }
1120 } 866 }
1121 break; 867 break;
1122 case 1680: 868 case 1680:
1123 if(VGAEngine == SIS_315_VGA) { 869 if(VDisplay == 1050) {
1124 if(VBFlags & (VB_301B|VB_301C|VB_302B)) { 870 if(VGAEngine != SIS_315_VGA) return 0;
1125 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth]; 871 if(!(VBFlags2 & VB2_30xB)) return 0;
1126 }
1127 } 872 }
1128 break; 873 break;
1129 } 874 }
1130 875
1131 return ModeIndex; 876 return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth, FALSE, 0, 0);
1132} 877}
1133 878
1134 879
@@ -1137,83 +882,83 @@ SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int
1137/*********************************************/ 882/*********************************************/
1138 883
1139void 884void
1140SiS_SetReg(SISIOADDRESS port, USHORT index, USHORT data) 885SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data)
1141{ 886{
1142 OutPortByte(port,index); 887 OutPortByte(port, index);
1143 OutPortByte(port + 1,data); 888 OutPortByte(port + 1, data);
1144} 889}
1145 890
1146void 891void
1147SiS_SetRegByte(SISIOADDRESS port, USHORT data) 892SiS_SetRegByte(SISIOADDRESS port, unsigned short data)
1148{ 893{
1149 OutPortByte(port,data); 894 OutPortByte(port, data);
1150} 895}
1151 896
1152void 897void
1153SiS_SetRegShort(SISIOADDRESS port, USHORT data) 898SiS_SetRegShort(SISIOADDRESS port, unsigned short data)
1154{ 899{
1155 OutPortWord(port,data); 900 OutPortWord(port, data);
1156} 901}
1157 902
1158void 903void
1159SiS_SetRegLong(SISIOADDRESS port, ULONG data) 904SiS_SetRegLong(SISIOADDRESS port, unsigned int data)
1160{ 905{
1161 OutPortLong(port,data); 906 OutPortLong(port, data);
1162} 907}
1163 908
1164UCHAR 909unsigned char
1165SiS_GetReg(SISIOADDRESS port, USHORT index) 910SiS_GetReg(SISIOADDRESS port, unsigned short index)
1166{ 911{
1167 OutPortByte(port,index); 912 OutPortByte(port, index);
1168 return(InPortByte(port + 1)); 913 return(InPortByte(port + 1));
1169} 914}
1170 915
1171UCHAR 916unsigned char
1172SiS_GetRegByte(SISIOADDRESS port) 917SiS_GetRegByte(SISIOADDRESS port)
1173{ 918{
1174 return(InPortByte(port)); 919 return(InPortByte(port));
1175} 920}
1176 921
1177USHORT 922unsigned short
1178SiS_GetRegShort(SISIOADDRESS port) 923SiS_GetRegShort(SISIOADDRESS port)
1179{ 924{
1180 return(InPortWord(port)); 925 return(InPortWord(port));
1181} 926}
1182 927
1183ULONG 928unsigned int
1184SiS_GetRegLong(SISIOADDRESS port) 929SiS_GetRegLong(SISIOADDRESS port)
1185{ 930{
1186 return(InPortLong(port)); 931 return(InPortLong(port));
1187} 932}
1188 933
1189void 934void
1190SiS_SetRegANDOR(SISIOADDRESS Port,USHORT Index,USHORT DataAND,USHORT DataOR) 935SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND, unsigned short DataOR)
1191{ 936{
1192 USHORT temp; 937 unsigned short temp;
1193 938
1194 temp = SiS_GetReg(Port,Index); 939 temp = SiS_GetReg(Port, Index);
1195 temp = (temp & (DataAND)) | DataOR; 940 temp = (temp & (DataAND)) | DataOR;
1196 SiS_SetReg(Port,Index,temp); 941 SiS_SetReg(Port, Index, temp);
1197} 942}
1198 943
1199void 944void
1200SiS_SetRegAND(SISIOADDRESS Port,USHORT Index,USHORT DataAND) 945SiS_SetRegAND(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND)
1201{ 946{
1202 USHORT temp; 947 unsigned short temp;
1203 948
1204 temp = SiS_GetReg(Port,Index); 949 temp = SiS_GetReg(Port, Index);
1205 temp &= DataAND; 950 temp &= DataAND;
1206 SiS_SetReg(Port,Index,temp); 951 SiS_SetReg(Port, Index, temp);
1207} 952}
1208 953
1209void 954void
1210SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR) 955SiS_SetRegOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataOR)
1211{ 956{
1212 USHORT temp; 957 unsigned short temp;
1213 958
1214 temp = SiS_GetReg(Port,Index); 959 temp = SiS_GetReg(Port, Index);
1215 temp |= DataOR; 960 temp |= DataOR;
1216 SiS_SetReg(Port,Index,temp); 961 SiS_SetReg(Port, Index, temp);
1217} 962}
1218 963
1219/*********************************************/ 964/*********************************************/
@@ -1221,13 +966,13 @@ SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR)
1221/*********************************************/ 966/*********************************************/
1222 967
1223void 968void
1224SiS_DisplayOn(SiS_Private *SiS_Pr) 969SiS_DisplayOn(struct SiS_Private *SiS_Pr)
1225{ 970{
1226 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF); 971 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
1227} 972}
1228 973
1229void 974void
1230SiS_DisplayOff(SiS_Private *SiS_Pr) 975SiS_DisplayOff(struct SiS_Private *SiS_Pr)
1231{ 976{
1232 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20); 977 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
1233} 978}
@@ -1238,7 +983,7 @@ SiS_DisplayOff(SiS_Private *SiS_Pr)
1238/*********************************************/ 983/*********************************************/
1239 984
1240void 985void
1241SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr) 986SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
1242{ 987{
1243 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14; 988 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
1244 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24; 989 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
@@ -1251,16 +996,17 @@ SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
1251 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18; 996 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
1252 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19; 997 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
1253 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b; 998 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
999 SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
1254 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d; 1000 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
1255 SiS_Pr->SiS_P3da = BaseAddr + 0x2a; 1001 SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
1256 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04; /* Digital video interface registers (LCD) */ 1002 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
1257 SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10; /* 301 TV Encoder registers */ 1003 SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
1258 SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12; /* 301 Macrovision registers */ 1004 SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
1259 SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14; /* 301 VGA2 (and LCD) registers */ 1005 SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
1260 SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2; /* 301 palette address port registers */ 1006 SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
1261 SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14; /* DDC Port ( = P3C4, SR11/0A) */ 1007 SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;
1262 SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE; 1008 SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
1263 SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK; 1009 SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
1264} 1010}
1265 1011
1266/*********************************************/ 1012/*********************************************/
@@ -1268,7 +1014,7 @@ SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
1268/*********************************************/ 1014/*********************************************/
1269 1015
1270static void 1016static void
1271SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1017SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
1272{ 1018{
1273 unsigned char cr5f, temp1, temp2; 1019 unsigned char cr5f, temp1, temp2;
1274 1020
@@ -1276,9 +1022,9 @@ SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1276 /* (SR11 is used for DDC and in enable/disablebridge) */ 1022 /* (SR11 is used for DDC and in enable/disablebridge) */
1277 SiS_Pr->SiS_SensibleSR11 = FALSE; 1023 SiS_Pr->SiS_SensibleSR11 = FALSE;
1278 SiS_Pr->SiS_MyCR63 = 0x63; 1024 SiS_Pr->SiS_MyCR63 = 0x63;
1279 if(HwInfo->jChipType >= SIS_330) { 1025 if(SiS_Pr->ChipType >= SIS_330) {
1280 SiS_Pr->SiS_MyCR63 = 0x53; 1026 SiS_Pr->SiS_MyCR63 = 0x53;
1281 if(HwInfo->jChipType >= SIS_661) { 1027 if(SiS_Pr->ChipType >= SIS_661) {
1282 SiS_Pr->SiS_SensibleSR11 = TRUE; 1028 SiS_Pr->SiS_SensibleSR11 = TRUE;
1283 } 1029 }
1284 } 1030 }
@@ -1286,43 +1032,52 @@ SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1286 /* You should use the macros, not these flags directly */ 1032 /* You should use the macros, not these flags directly */
1287 1033
1288 SiS_Pr->SiS_SysFlags = 0; 1034 SiS_Pr->SiS_SysFlags = 0;
1289 if(HwInfo->jChipType == SIS_650) { 1035 if(SiS_Pr->ChipType == SIS_650) {
1290 cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0; 1036 cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
1291 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07); 1037 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
1292 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8; 1038 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1293 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8); 1039 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
1294 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8; 1040 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1295 if((!temp1) || (temp2)) { 1041 if((!temp1) || (temp2)) {
1296 switch(cr5f) { 1042 switch(cr5f) {
1297 case 0x80: 1043 case 0x80:
1298 case 0x90: 1044 case 0x90:
1299 case 0xc0: 1045 case 0xc0:
1300 SiS_Pr->SiS_SysFlags |= SF_IsM650; break; 1046 SiS_Pr->SiS_SysFlags |= SF_IsM650;
1047 break;
1301 case 0xa0: 1048 case 0xa0:
1302 case 0xb0: 1049 case 0xb0:
1303 case 0xe0: 1050 case 0xe0:
1304 SiS_Pr->SiS_SysFlags |= SF_Is651; break; 1051 SiS_Pr->SiS_SysFlags |= SF_Is651;
1052 break;
1305 } 1053 }
1306 } else { 1054 } else {
1307 switch(cr5f) { 1055 switch(cr5f) {
1308 case 0x90: 1056 case 0x90:
1309 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8; 1057 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1310 switch(temp1) { 1058 switch(temp1) {
1311 case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break; 1059 case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
1312 case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break; 1060 case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
1313 default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break; 1061 default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1314 } 1062 }
1315 break; 1063 break;
1316 case 0xb0: 1064 case 0xb0:
1317 SiS_Pr->SiS_SysFlags |= SF_Is652; break; 1065 SiS_Pr->SiS_SysFlags |= SF_Is652;
1066 break;
1318 default: 1067 default:
1319 SiS_Pr->SiS_SysFlags |= SF_IsM650; break; 1068 SiS_Pr->SiS_SysFlags |= SF_IsM650;
1069 break;
1320 } 1070 }
1321 } 1071 }
1322 } 1072 }
1323 if(HwInfo->jChipType == SIS_760) { 1073
1324 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78); 1074 if(SiS_Pr->ChipType >= SIS_760 && SiS_Pr->ChipType <= SIS_761) {
1325 if(temp1 & 0x30) SiS_Pr->SiS_SysFlags |= SF_760LFB; 1075 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x30) {
1076 SiS_Pr->SiS_SysFlags |= SF_760LFB;
1077 }
1078 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0xf0) {
1079 SiS_Pr->SiS_SysFlags |= SF_760UMA;
1080 }
1326 } 1081 }
1327} 1082}
1328 1083
@@ -1331,18 +1086,20 @@ SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1331/*********************************************/ 1086/*********************************************/
1332 1087
1333static void 1088static void
1334SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1089SiSInitPCIetc(struct SiS_Private *SiS_Pr)
1335{ 1090{
1336 switch(HwInfo->jChipType) { 1091 switch(SiS_Pr->ChipType) {
1092#ifdef SIS300
1337 case SIS_300: 1093 case SIS_300:
1338 case SIS_540: 1094 case SIS_540:
1339 case SIS_630: 1095 case SIS_630:
1340 case SIS_730: 1096 case SIS_730:
1341 /* Set - PCI LINEAR ADDRESSING ENABLE (0x80) 1097 /* Set - PCI LINEAR ADDRESSING ENABLE (0x80)
1342 * - RELOCATED VGA IO (0x20) 1098 * - RELOCATED VGA IO ENABLED (0x20)
1343 * - MMIO ENABLE (0x1) 1099 * - MMIO ENABLED (0x01)
1100 * Leave other bits untouched.
1344 */ 1101 */
1345 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1); 1102 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1346 /* - Enable 2D (0x40) 1103 /* - Enable 2D (0x40)
1347 * - Enable 3D (0x02) 1104 * - Enable 3D (0x02)
1348 * - Enable 3D Vertex command fetch (0x10) ? 1105 * - Enable 3D Vertex command fetch (0x10) ?
@@ -1350,6 +1107,8 @@ SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1350 */ 1107 */
1351 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A); 1108 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
1352 break; 1109 break;
1110#endif
1111#ifdef SIS315H
1353 case SIS_315H: 1112 case SIS_315H:
1354 case SIS_315: 1113 case SIS_315:
1355 case SIS_315PRO: 1114 case SIS_315PRO:
@@ -1362,21 +1121,30 @@ SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1362 case SIS_760: 1121 case SIS_760:
1363 case SIS_761: 1122 case SIS_761:
1364 case SIS_340: 1123 case SIS_340:
1365 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1); 1124 case XGI_40:
1366 /* - Enable 2D (0x40) 1125 /* See above */
1367 * - Enable 3D (0x02) 1126 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1127 /* - Enable 3D G/L transformation engine (0x80)
1128 * - Enable 2D (0x40)
1368 * - Enable 3D vertex command fetch (0x10) 1129 * - Enable 3D vertex command fetch (0x10)
1369 * - Enable 3D command parser (0x08) 1130 * - Enable 3D command parser (0x08)
1370 * - Enable 3D G/L transformation engine (0x80) 1131 * - Enable 3D (0x02)
1371 */ 1132 */
1372 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA); 1133 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
1373 break; 1134 break;
1135 case XGI_20:
1374 case SIS_550: 1136 case SIS_550:
1375 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1); 1137 /* See above */
1138 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1376 /* No 3D engine ! */ 1139 /* No 3D engine ! */
1377 /* - Enable 2D (0x40) 1140 /* - Enable 2D (0x40)
1141 * - disable 3D
1378 */ 1142 */
1379 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x40); 1143 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0x60,0x40);
1144 break;
1145#endif
1146 default:
1147 break;
1380 } 1148 }
1381} 1149}
1382 1150
@@ -1384,38 +1152,40 @@ SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1384/* HELPER: SetLVDSetc */ 1152/* HELPER: SetLVDSetc */
1385/*********************************************/ 1153/*********************************************/
1386 1154
1387static void 1155#ifdef SIS_LINUX_KERNEL
1388SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1156static
1157#endif
1158void
1159SiSSetLVDSetc(struct SiS_Private *SiS_Pr)
1389{ 1160{
1390 USHORT temp; 1161 unsigned short temp;
1391 1162
1392 SiS_Pr->SiS_IF_DEF_LVDS = 0; 1163 SiS_Pr->SiS_IF_DEF_LVDS = 0;
1393 SiS_Pr->SiS_IF_DEF_TRUMPION = 0; 1164 SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
1394 SiS_Pr->SiS_IF_DEF_CH70xx = 0; 1165 SiS_Pr->SiS_IF_DEF_CH70xx = 0;
1395 SiS_Pr->SiS_IF_DEF_DSTN = 0;
1396 SiS_Pr->SiS_IF_DEF_FSTN = 0;
1397 SiS_Pr->SiS_IF_DEF_CONEX = 0; 1166 SiS_Pr->SiS_IF_DEF_CONEX = 0;
1398 1167
1399 SiS_Pr->SiS_ChrontelInit = 0; 1168 SiS_Pr->SiS_ChrontelInit = 0;
1400 1169
1170 if(SiS_Pr->ChipType == XGI_20) return;
1171
1401 /* Check for SiS30x first */ 1172 /* Check for SiS30x first */
1402 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); 1173 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1403 if((temp == 1) || (temp == 2)) return; 1174 if((temp == 1) || (temp == 2)) return;
1404 1175
1405 switch(HwInfo->jChipType) { 1176 switch(SiS_Pr->ChipType) {
1406#ifdef SIS300 1177#ifdef SIS300
1407 case SIS_540: 1178 case SIS_540:
1408 case SIS_630: 1179 case SIS_630:
1409 case SIS_730: 1180 case SIS_730:
1410 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37); 1181 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
1411 temp = (temp & 0x0E) >> 1; 1182 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1412 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1; 1183 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
1413 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1; 1184 if((temp == 4) || (temp == 5)) {
1414 if((temp == 4) || (temp == 5)) {
1415 /* Save power status (and error check) - UNUSED */ 1185 /* Save power status (and error check) - UNUSED */
1416 SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e); 1186 SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
1417 SiS_Pr->SiS_IF_DEF_CH70xx = 1; 1187 SiS_Pr->SiS_IF_DEF_CH70xx = 1;
1418 } 1188 }
1419 break; 1189 break;
1420#endif 1190#endif
1421#ifdef SIS315H 1191#ifdef SIS315H
@@ -1423,26 +1193,26 @@ SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1423 case SIS_650: 1193 case SIS_650:
1424 case SIS_740: 1194 case SIS_740:
1425 case SIS_330: 1195 case SIS_330:
1426 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37); 1196 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
1427 temp = (temp & 0x0E) >> 1; 1197 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1428 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1; 1198 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1429 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2; 1199 break;
1430 break;
1431 case SIS_661: 1200 case SIS_661:
1432 case SIS_741: 1201 case SIS_741:
1433 case SIS_660: 1202 case SIS_660:
1434 case SIS_760: 1203 case SIS_760:
1435 case SIS_761: 1204 case SIS_761:
1436 case SIS_340: 1205 case SIS_340:
1437 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 1206 case XGI_20:
1438 temp = (temp & 0xe0) >> 5; 1207 case XGI_40:
1439 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1; 1208 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & 0xe0) >> 5;
1440 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2; 1209 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1441 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */ 1210 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1442 break; 1211 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
1212 break;
1443#endif 1213#endif
1444 default: 1214 default:
1445 break; 1215 break;
1446 } 1216 }
1447} 1217}
1448 1218
@@ -1451,35 +1221,55 @@ SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1451/*********************************************/ 1221/*********************************************/
1452 1222
1453void 1223void
1454SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable) 1224SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable)
1455{ 1225{
1456 SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0; 1226 SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
1457} 1227}
1458 1228
1459void 1229void
1460SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable) 1230SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable)
1461{ 1231{
1462 SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0; 1232 SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
1463} 1233}
1464 1234
1465/*********************************************/ 1235/*********************************************/
1236/* HELPER: Get modeflag */
1237/*********************************************/
1238
1239unsigned short
1240SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1241 unsigned short ModeIdIndex)
1242{
1243 if(SiS_Pr->UseCustomMode) {
1244 return SiS_Pr->CModeFlag;
1245 } else if(ModeNo <= 0x13) {
1246 return SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1247 } else {
1248 return SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1249 }
1250}
1251
1252/*********************************************/
1466/* HELPER: Determine ROM usage */ 1253/* HELPER: Determine ROM usage */
1467/*********************************************/ 1254/*********************************************/
1468 1255
1469BOOLEAN 1256BOOLEAN
1470SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1257SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr)
1471{ 1258{
1472 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 1259 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1473 USHORT romversoffs, romvmaj = 1, romvmin = 0; 1260 unsigned short romversoffs, romvmaj = 1, romvmin = 0;
1474 1261
1475 if(HwInfo->jChipType >= SIS_761) { 1262 if(SiS_Pr->ChipType >= XGI_20) {
1476 /* I very much assume 761 and 340 will use new layout */ 1263 /* XGI ROMs don't qualify */
1264 return FALSE;
1265 } else if(SiS_Pr->ChipType >= SIS_761) {
1266 /* I very much assume 761, 340 and newer will use new layout */
1477 return TRUE; 1267 return TRUE;
1478 } else if(HwInfo->jChipType >= SIS_661) { 1268 } else if(SiS_Pr->ChipType >= SIS_661) {
1479 if((ROMAddr[0x1a] == 'N') && 1269 if((ROMAddr[0x1a] == 'N') &&
1480 (ROMAddr[0x1b] == 'e') && 1270 (ROMAddr[0x1b] == 'e') &&
1481 (ROMAddr[0x1c] == 'w') && 1271 (ROMAddr[0x1c] == 'w') &&
1482 (ROMAddr[0x1d] == 'V')) { 1272 (ROMAddr[0x1d] == 'V')) {
1483 return TRUE; 1273 return TRUE;
1484 } 1274 }
1485 romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8); 1275 romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
@@ -1494,9 +1284,9 @@ SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1494 } 1284 }
1495 } else if(IS_SIS650740) { 1285 } else if(IS_SIS650740) {
1496 if((ROMAddr[0x1a] == 'N') && 1286 if((ROMAddr[0x1a] == 'N') &&
1497 (ROMAddr[0x1b] == 'e') && 1287 (ROMAddr[0x1b] == 'e') &&
1498 (ROMAddr[0x1c] == 'w') && 1288 (ROMAddr[0x1c] == 'w') &&
1499 (ROMAddr[0x1d] == 'V')) { 1289 (ROMAddr[0x1d] == 'V')) {
1500 return TRUE; 1290 return TRUE;
1501 } 1291 }
1502 } 1292 }
@@ -1504,45 +1294,50 @@ SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1504} 1294}
1505 1295
1506static void 1296static void
1507SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1297SiSDetermineROMUsage(struct SiS_Private *SiS_Pr)
1508{ 1298{
1509 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 1299 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1510 USHORT romptr = 0; 1300 unsigned short romptr = 0;
1511 1301
1512 SiS_Pr->SiS_UseROM = FALSE; 1302 SiS_Pr->SiS_UseROM = FALSE;
1513 SiS_Pr->SiS_ROMNew = FALSE; 1303 SiS_Pr->SiS_ROMNew = FALSE;
1304 SiS_Pr->SiS_PWDOffset = 0;
1514 1305
1515 if((ROMAddr) && (HwInfo->UseROM)) { 1306 if(SiS_Pr->ChipType >= XGI_20) return;
1516 if(HwInfo->jChipType == SIS_300) { 1307
1517 /* 300: We check if the code starts below 0x220 by 1308 if((ROMAddr) && (SiS_Pr->UseROM)) {
1309 if(SiS_Pr->ChipType == SIS_300) {
1310 /* 300: We check if the code starts below 0x220 by
1518 * checking the jmp instruction at the beginning 1311 * checking the jmp instruction at the beginning
1519 * of the BIOS image. 1312 * of the BIOS image.
1520 */ 1313 */
1521 if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a) 1314 if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
1522 SiS_Pr->SiS_UseROM = TRUE; 1315 SiS_Pr->SiS_UseROM = TRUE;
1523 } else if(HwInfo->jChipType < SIS_315H) { 1316 } else if(SiS_Pr->ChipType < SIS_315H) {
1524 /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps 1317 /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps
1525 * the others do as well 1318 * the others do as well
1526 */ 1319 */
1527 SiS_Pr->SiS_UseROM = TRUE; 1320 SiS_Pr->SiS_UseROM = TRUE;
1528 } else { 1321 } else {
1529 /* 315/330 series stick to the standard(s) */ 1322 /* 315/330 series stick to the standard(s) */
1530 SiS_Pr->SiS_UseROM = TRUE; 1323 SiS_Pr->SiS_UseROM = TRUE;
1531 if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr, HwInfo))) { 1324 if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) {
1532 SiS_Pr->SiS_EMIOffset = 14; 1325 SiS_Pr->SiS_EMIOffset = 14;
1326 SiS_Pr->SiS_PWDOffset = 17;
1533 SiS_Pr->SiS661LCD2TableSize = 36; 1327 SiS_Pr->SiS661LCD2TableSize = 36;
1534 /* Find out about LCD data table entry size */ 1328 /* Find out about LCD data table entry size */
1535 if((romptr = SISGETROMW(0x0102))) { 1329 if((romptr = SISGETROMW(0x0102))) {
1536 if(ROMAddr[romptr + (32 * 16)] == 0xff) 1330 if(ROMAddr[romptr + (32 * 16)] == 0xff)
1537 SiS_Pr->SiS661LCD2TableSize = 32; 1331 SiS_Pr->SiS661LCD2TableSize = 32;
1538 else if(ROMAddr[romptr + (34 * 16)] == 0xff) 1332 else if(ROMAddr[romptr + (34 * 16)] == 0xff)
1539 SiS_Pr->SiS661LCD2TableSize = 34; 1333 SiS_Pr->SiS661LCD2TableSize = 34;
1540 else if(ROMAddr[romptr + (36 * 16)] == 0xff) /* 0.94 */ 1334 else if(ROMAddr[romptr + (36 * 16)] == 0xff) /* 0.94, 2.05.00+ */
1541 SiS_Pr->SiS661LCD2TableSize = 36; 1335 SiS_Pr->SiS661LCD2TableSize = 36;
1542 else if( (ROMAddr[romptr + (38 * 16)] == 0xff) || /* 2.00.00 - 2.02.00 */ 1336 else if( (ROMAddr[romptr + (38 * 16)] == 0xff) || /* 2.00.00 - 2.02.00 */
1543 (ROMAddr[0x6F] & 0x01) ) { /* 2.03.00+ */ 1337 (ROMAddr[0x6F] & 0x01) ) { /* 2.03.00 - <2.05.00 */
1544 SiS_Pr->SiS661LCD2TableSize = 38; 1338 SiS_Pr->SiS661LCD2TableSize = 38; /* UMC data layout abandoned at 2.05.00 */
1545 SiS_Pr->SiS_EMIOffset = 16; 1339 SiS_Pr->SiS_EMIOffset = 16;
1340 SiS_Pr->SiS_PWDOffset = 19;
1546 } 1341 }
1547 } 1342 }
1548 } 1343 }
@@ -1555,9 +1350,9 @@ SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1555/*********************************************/ 1350/*********************************************/
1556 1351
1557static void 1352static void
1558SiS_SetSegRegLower(SiS_Private *SiS_Pr, USHORT value) 1353SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
1559{ 1354{
1560 USHORT temp; 1355 unsigned short temp;
1561 1356
1562 value &= 0x00ff; 1357 value &= 0x00ff;
1563 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0; 1358 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
@@ -1569,9 +1364,9 @@ SiS_SetSegRegLower(SiS_Private *SiS_Pr, USHORT value)
1569} 1364}
1570 1365
1571static void 1366static void
1572SiS_SetSegRegUpper(SiS_Private *SiS_Pr, USHORT value) 1367SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
1573{ 1368{
1574 USHORT temp; 1369 unsigned short temp;
1575 1370
1576 value &= 0x00ff; 1371 value &= 0x00ff;
1577 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f; 1372 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
@@ -1583,22 +1378,22 @@ SiS_SetSegRegUpper(SiS_Private *SiS_Pr, USHORT value)
1583} 1378}
1584 1379
1585static void 1380static void
1586SiS_SetSegmentReg(SiS_Private *SiS_Pr, USHORT value) 1381SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
1587{ 1382{
1588 SiS_SetSegRegLower(SiS_Pr, value); 1383 SiS_SetSegRegLower(SiS_Pr, value);
1589 SiS_SetSegRegUpper(SiS_Pr, value); 1384 SiS_SetSegRegUpper(SiS_Pr, value);
1590} 1385}
1591 1386
1592static void 1387static void
1593SiS_ResetSegmentReg(SiS_Private *SiS_Pr) 1388SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
1594{ 1389{
1595 SiS_SetSegmentReg(SiS_Pr, 0); 1390 SiS_SetSegmentReg(SiS_Pr, 0);
1596} 1391}
1597 1392
1598static void 1393static void
1599SiS_SetSegmentRegOver(SiS_Private *SiS_Pr, USHORT value) 1394SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
1600{ 1395{
1601 USHORT temp = value >> 8; 1396 unsigned short temp = value >> 8;
1602 1397
1603 temp &= 0x07; 1398 temp &= 0x07;
1604 temp |= (temp << 4); 1399 temp |= (temp << 4);
@@ -1607,15 +1402,15 @@ SiS_SetSegmentRegOver(SiS_Private *SiS_Pr, USHORT value)
1607} 1402}
1608 1403
1609static void 1404static void
1610SiS_ResetSegmentRegOver(SiS_Private *SiS_Pr) 1405SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
1611{ 1406{
1612 SiS_SetSegmentRegOver(SiS_Pr, 0); 1407 SiS_SetSegmentRegOver(SiS_Pr, 0);
1613} 1408}
1614 1409
1615static void 1410static void
1616SiS_ResetSegmentRegisters(SiS_Private *SiS_Pr,PSIS_HW_INFO HwInfo) 1411SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
1617{ 1412{
1618 if((IS_SIS65x) || (HwInfo->jChipType >= SIS_661)) { 1413 if((IS_SIS65x) || (SiS_Pr->ChipType >= SIS_661)) {
1619 SiS_ResetSegmentReg(SiS_Pr); 1414 SiS_ResetSegmentReg(SiS_Pr);
1620 SiS_ResetSegmentRegOver(SiS_Pr); 1415 SiS_ResetSegmentRegOver(SiS_Pr);
1621 } 1416 }
@@ -1625,89 +1420,86 @@ SiS_ResetSegmentRegisters(SiS_Private *SiS_Pr,PSIS_HW_INFO HwInfo)
1625/* HELPER: GetVBType */ 1420/* HELPER: GetVBType */
1626/*********************************************/ 1421/*********************************************/
1627 1422
1628static void 1423#ifdef SIS_LINUX_KERNEL
1629SiS_GetVBType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1424static
1425#endif
1426void
1427SiS_GetVBType(struct SiS_Private *SiS_Pr)
1630{ 1428{
1631 USHORT flag=0, rev=0, nolcd=0, p4_0f, p4_25, p4_27; 1429 unsigned short flag = 0, rev = 0, nolcd = 0;
1632 1430 unsigned short p4_0f, p4_25, p4_27;
1633 SiS_Pr->SiS_VBType = 0; 1431
1634 1432 SiS_Pr->SiS_VBType = 0;
1635 if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX)) 1433
1636 return; 1434 if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
1637 1435 return;
1638 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); 1436
1639 1437 if(SiS_Pr->ChipType == XGI_20)
1640 if(flag > 3) return; 1438 return;
1641 1439
1642 rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01); 1440 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1643 1441
1644 if(flag >= 2) { 1442 if(flag > 3)
1645 SiS_Pr->SiS_VBType = VB_SIS302B; 1443 return;
1646 } else if(flag == 1) { 1444
1647 if(rev >= 0xC0) { 1445 rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
1648 SiS_Pr->SiS_VBType = VB_SIS301C; 1446
1649 } else if(rev >= 0xB0) { 1447 if(flag >= 2) {
1650 SiS_Pr->SiS_VBType = VB_SIS301B; 1448 SiS_Pr->SiS_VBType = VB_SIS302B;
1651 /* Check if 30xB DH version (no LCD support, use Panel Link instead) */ 1449 } else if(flag == 1) {
1652 nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23); 1450 if(rev >= 0xC0) {
1653 if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD; 1451 SiS_Pr->SiS_VBType = VB_SIS301C;
1654 } else { 1452 } else if(rev >= 0xB0) {
1655 SiS_Pr->SiS_VBType = VB_SIS301; 1453 SiS_Pr->SiS_VBType = VB_SIS301B;
1656 } 1454 /* Check if 30xB DH version (no LCD support, use Panel Link instead) */
1657 } 1455 nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
1658 if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) { 1456 if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
1659 if(rev >= 0xE0) { 1457 } else {
1660 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39); 1458 SiS_Pr->SiS_VBType = VB_SIS301;
1661 if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV; 1459 }
1662 else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */ 1460 }
1663 } else if(rev >= 0xD0) { 1461 if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
1664 SiS_Pr->SiS_VBType = VB_SIS301LV; 1462 if(rev >= 0xE0) {
1665 } 1463 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
1666 } 1464 if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
1667 if(SiS_Pr->SiS_VBType & (VB_301C | VB_301LV | VB_302LV | VB_302ELV)) { 1465 else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
1668 p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f); 1466 } else if(rev >= 0xD0) {
1669 p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25); 1467 SiS_Pr->SiS_VBType = VB_SIS301LV;
1670 p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27); 1468 }
1671 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f); 1469 }
1672 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08); 1470 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV)) {
1673 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd); 1471 p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f);
1674 if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) { 1472 p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25);
1675 SiS_Pr->SiS_VBType |= VB_UMC; 1473 p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27);
1676 } 1474 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f);
1677 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27); 1475 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08);
1678 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25); 1476 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd);
1679 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f); 1477 if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) {
1680 } 1478 SiS_Pr->SiS_VBType |= VB_UMC;
1479 }
1480 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27);
1481 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25);
1482 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f);
1483 }
1681} 1484}
1682 1485
1683/*********************************************/ 1486/*********************************************/
1684/* HELPER: Check RAM size */ 1487/* HELPER: Check RAM size */
1685/*********************************************/ 1488/*********************************************/
1686 1489
1687#ifdef LINUX_KERNEL 1490#ifdef SIS_LINUX_KERNEL
1688static BOOLEAN 1491static BOOLEAN
1689SiS_CheckMemorySize(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 1492SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1690 USHORT ModeNo, USHORT ModeIdIndex) 1493 unsigned short ModeIdIndex)
1691{ 1494{
1692 USHORT AdapterMemSize = HwInfo->ulVideoMemorySize / (1024*1024); 1495 unsigned short AdapterMemSize = SiS_Pr->VideoMemorySize / (1024*1024);
1693 USHORT memorysize,modeflag; 1496 unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
1694 1497 unsigned short memorysize = ((modeflag & MemoryInfoFlag) >> MemorySizeShift) + 1;
1695 if(SiS_Pr->UseCustomMode) { 1498
1696 modeflag = SiS_Pr->CModeFlag; 1499 if(!AdapterMemSize) return TRUE;
1697 } else { 1500
1698 if(ModeNo <= 0x13) { 1501 if(AdapterMemSize < memorysize) return FALSE;
1699 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 1502 return TRUE;
1700 } else {
1701 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1702 }
1703 }
1704
1705 memorysize = modeflag & MemoryInfoFlag;
1706 memorysize >>= MemorySizeShift; /* Get required memory size */
1707 memorysize++;
1708
1709 if(AdapterMemSize < memorysize) return FALSE;
1710 return TRUE;
1711} 1503}
1712#endif 1504#endif
1713 1505
@@ -1716,63 +1508,65 @@ SiS_CheckMemorySize(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
1716/*********************************************/ 1508/*********************************************/
1717 1509
1718#ifdef SIS315H 1510#ifdef SIS315H
1719static UCHAR 1511static unsigned char
1720SiS_Get310DRAMType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1512SiS_Get310DRAMType(struct SiS_Private *SiS_Pr)
1721{ 1513{
1722 UCHAR data, temp; 1514 unsigned char data;
1723 1515
1724 if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) { 1516 if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
1725 data = (*SiS_Pr->pSiS_SoftSetting) & 0x03; 1517 data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
1726 } else { 1518 } else {
1727 if(HwInfo->jChipType >= SIS_340) { 1519 if(SiS_Pr->ChipType >= XGI_20) {
1728 /* TODO */ 1520 /* Do I need this? SR17 seems to be zero anyway... */
1729 data = 0; 1521 data = 0;
1730 } if(HwInfo->jChipType >= SIS_661) { 1522 } else if(SiS_Pr->ChipType >= SIS_340) {
1731 data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07; 1523 /* TODO */
1732 if(SiS_Pr->SiS_ROMNew) { 1524 data = 0;
1733 data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6); 1525 } if(SiS_Pr->ChipType >= SIS_661) {
1734 } 1526 if(SiS_Pr->SiS_ROMNew) {
1735 } else if(IS_SIS550650740) { 1527 data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
1736 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07; 1528 } else {
1737 } else { /* 315, 330 */ 1529 data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
1738 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03; 1530 }
1739 if(HwInfo->jChipType == SIS_330) { 1531 } else if(IS_SIS550650740) {
1740 if(data > 1) { 1532 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
1741 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30; 1533 } else { /* 315, 330 */
1742 switch(temp) { 1534 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
1743 case 0x00: data = 1; break; 1535 if(SiS_Pr->ChipType == SIS_330) {
1744 case 0x10: data = 3; break; 1536 if(data > 1) {
1745 case 0x20: data = 3; break; 1537 switch(SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30) {
1746 case 0x30: data = 2; break; 1538 case 0x00: data = 1; break;
1747 } 1539 case 0x10: data = 3; break;
1748 } else { 1540 case 0x20: data = 3; break;
1749 data = 0; 1541 case 0x30: data = 2; break;
1750 } 1542 }
1751 } 1543 } else {
1752 } 1544 data = 0;
1545 }
1546 }
1547 }
1753 } 1548 }
1754 1549
1755 return data; 1550 return data;
1756} 1551}
1757 1552
1758static USHORT 1553static unsigned short
1759SiS_GetMCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1554SiS_GetMCLK(struct SiS_Private *SiS_Pr)
1760{ 1555{
1761 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 1556 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1762 USHORT index; 1557 unsigned short index;
1763 1558
1764 index = SiS_Get310DRAMType(SiS_Pr, HwInfo); 1559 index = SiS_Get310DRAMType(SiS_Pr);
1765 if(HwInfo->jChipType >= SIS_661) { 1560 if(SiS_Pr->ChipType >= SIS_661) {
1766 if(SiS_Pr->SiS_ROMNew) { 1561 if(SiS_Pr->SiS_ROMNew) {
1767 return((USHORT)(SISGETROMW((0x90 + (index * 5) + 3)))); 1562 return((unsigned short)(SISGETROMW((0x90 + (index * 5) + 3))));
1768 } 1563 }
1769 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK); 1564 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1770 } else if(index >= 4) { 1565 } else if(index >= 4) {
1771 index -= 4; 1566 return(SiS_Pr->SiS_MCLKData_1[index - 4].CLOCK);
1772 return(SiS_Pr->SiS_MCLKData_1[index].CLOCK); 1567 } else {
1773 } else { 1568 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1774 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK); 1569 }
1775 }
1776} 1570}
1777#endif 1571#endif
1778 1572
@@ -1780,30 +1574,30 @@ SiS_GetMCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1780/* HELPER: ClearBuffer */ 1574/* HELPER: ClearBuffer */
1781/*********************************************/ 1575/*********************************************/
1782 1576
1783#ifdef LINUX_KERNEL 1577#ifdef SIS_LINUX_KERNEL
1784static void 1578static void
1785SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo) 1579SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1786{ 1580{
1787 UCHAR SISIOMEMTYPE *VideoMemoryAddress = HwInfo->pjVideoMemoryAddress; 1581 unsigned char SISIOMEMTYPE *memaddr = SiS_Pr->VideoMemoryAddress;
1788 ULONG AdapterMemorySize = HwInfo->ulVideoMemorySize; 1582 unsigned int memsize = SiS_Pr->VideoMemorySize;
1789 USHORT SISIOMEMTYPE *pBuffer; 1583 unsigned short SISIOMEMTYPE *pBuffer;
1790 int i; 1584 int i;
1791 1585
1792 if(SiS_Pr->SiS_ModeType >= ModeEGA) { 1586 if(!memaddr || !memsize) return;
1793 if(ModeNo > 0x13) { 1587
1794 SiS_SetMemory(VideoMemoryAddress, AdapterMemorySize, 0); 1588 if(SiS_Pr->SiS_ModeType >= ModeEGA) {
1795 } else { 1589 if(ModeNo > 0x13) {
1796 pBuffer = (USHORT SISIOMEMTYPE *)VideoMemoryAddress; 1590 SiS_SetMemory(memaddr, memsize, 0);
1797 for(i=0; i<0x4000; i++) writew(0x0000, &pBuffer[i]); 1591 } else {
1798 } 1592 pBuffer = (unsigned short SISIOMEMTYPE *)memaddr;
1799 } else { 1593 for(i = 0; i < 0x4000; i++) writew(0x0000, &pBuffer[i]);
1800 if(SiS_Pr->SiS_ModeType < ModeCGA) { 1594 }
1801 pBuffer = (USHORT SISIOMEMTYPE *)VideoMemoryAddress; 1595 } else if(SiS_Pr->SiS_ModeType < ModeCGA) {
1802 for(i=0; i<0x4000; i++) writew(0x0720, &pBuffer[i]); 1596 pBuffer = (unsigned short SISIOMEMTYPE *)memaddr;
1803 } else { 1597 for(i = 0; i < 0x4000; i++) writew(0x0720, &pBuffer[i]);
1804 SiS_SetMemory(VideoMemoryAddress, 0x8000, 0); 1598 } else {
1805 } 1599 SiS_SetMemory(memaddr, 0x8000, 0);
1806 } 1600 }
1807} 1601}
1808#endif 1602#endif
1809 1603
@@ -1812,35 +1606,36 @@ SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
1812/*********************************************/ 1606/*********************************************/
1813 1607
1814BOOLEAN 1608BOOLEAN
1815SiS_SearchModeID(SiS_Private *SiS_Pr, USHORT *ModeNo, USHORT *ModeIdIndex) 1609SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
1610 unsigned short *ModeIdIndex)
1816{ 1611{
1817 UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO; 1612 unsigned char VGAINFO = SiS_Pr->SiS_VGAINFO;
1818 1613
1819 if(*ModeNo <= 0x13) { 1614 if((*ModeNo) <= 0x13) {
1820 1615
1821 if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01; 1616 if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
1822 1617
1823 for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) { 1618 for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
1824 if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break; 1619 if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break;
1825 if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF) return FALSE; 1620 if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return FALSE;
1826 } 1621 }
1827 1622
1828 if(*ModeNo == 0x07) { 1623 if((*ModeNo) == 0x07) {
1829 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */ 1624 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
1830 /* else 350 lines */ 1625 /* else 350 lines */
1831 } 1626 }
1832 if(*ModeNo <= 0x03) { 1627 if((*ModeNo) <= 0x03) {
1833 if(!(VGAINFO & 0x80)) (*ModeIdIndex)++; 1628 if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
1834 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */ 1629 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
1835 /* else 350 lines */ 1630 /* else 350 lines */
1836 } 1631 }
1837 /* else 200 lines */ 1632 /* else 200 lines */
1838 1633
1839 } else { 1634 } else {
1840 1635
1841 for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) { 1636 for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
1842 if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break; 1637 if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break;
1843 if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF) return FALSE; 1638 if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return FALSE;
1844 } 1639 }
1845 1640
1846 } 1641 }
@@ -1851,10 +1646,10 @@ SiS_SearchModeID(SiS_Private *SiS_Pr, USHORT *ModeNo, USHORT *ModeIdIndex)
1851/* HELPER: GetModePtr */ 1646/* HELPER: GetModePtr */
1852/*********************************************/ 1647/*********************************************/
1853 1648
1854UCHAR 1649unsigned short
1855SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex) 1650SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
1856{ 1651{
1857 UCHAR index; 1652 unsigned short index;
1858 1653
1859 if(ModeNo <= 0x13) { 1654 if(ModeNo <= 0x13) {
1860 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex; 1655 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
@@ -1866,79 +1661,125 @@ SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex)
1866} 1661}
1867 1662
1868/*********************************************/ 1663/*********************************************/
1664/* HELPERS: Get some indices */
1665/*********************************************/
1666
1667unsigned short
1668SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
1669{
1670 if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
1671 if(UseWide == 1) {
1672 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_WIDE;
1673 } else {
1674 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_NORM;
1675 }
1676 } else {
1677 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK;
1678 }
1679}
1680
1681unsigned short
1682SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
1683{
1684 if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
1685 if(UseWide == 1) {
1686 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_WIDE;
1687 } else {
1688 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_NORM;
1689 }
1690 } else {
1691 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC;
1692 }
1693}
1694
1695/*********************************************/
1869/* HELPER: LowModeTests */ 1696/* HELPER: LowModeTests */
1870/*********************************************/ 1697/*********************************************/
1871 1698
1872static BOOLEAN 1699static BOOLEAN
1873SiS_DoLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo) 1700SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1874{ 1701{
1875 USHORT temp,temp1,temp2; 1702 unsigned short temp, temp1, temp2;
1876 1703
1877 if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12)) 1704 if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
1878 return(TRUE); 1705 return TRUE;
1879 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11); 1706 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11);
1880 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80); 1707 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
1881 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00); 1708 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1882 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55); 1709 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55);
1883 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00); 1710 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1884 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1); 1711 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1);
1885 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp); 1712 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp);
1886 if((HwInfo->jChipType >= SIS_315H) || 1713 if((SiS_Pr->ChipType >= SIS_315H) ||
1887 (HwInfo->jChipType == SIS_300)) { 1714 (SiS_Pr->ChipType == SIS_300)) {
1888 if(temp2 == 0x55) return(FALSE); 1715 if(temp2 == 0x55) return FALSE;
1889 else return(TRUE); 1716 else return TRUE;
1890 } else { 1717 } else {
1891 if(temp2 != 0x55) return(TRUE); 1718 if(temp2 != 0x55) return TRUE;
1892 else { 1719 else {
1893 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); 1720 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
1894 return(FALSE); 1721 return FALSE;
1895 } 1722 }
1896 } 1723 }
1897} 1724}
1898 1725
1899static void 1726static void
1900SiS_SetLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo) 1727SiS_SetLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1901{ 1728{
1902 if(SiS_DoLowModeTest(SiS_Pr, ModeNo, HwInfo)) { 1729 if(SiS_DoLowModeTest(SiS_Pr, ModeNo)) {
1903 SiS_Pr->SiS_SetFlag |= LowModeTests; 1730 SiS_Pr->SiS_SetFlag |= LowModeTests;
1904 } 1731 }
1905} 1732}
1906 1733
1907/*********************************************/ 1734/*********************************************/
1908/* HELPER: ENABLE CRT1 */ 1735/* HELPER: OPEN/CLOSE CRT1 CRTC */
1909/*********************************************/ 1736/*********************************************/
1910 1737
1911static void 1738static void
1912SiS_SetupCR5x(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1739SiS_OpenCRTC(struct SiS_Private *SiS_Pr)
1740{
1741 if(IS_SIS650) {
1742 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1743 if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20);
1744 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1745 } else if(IS_SIS661741660760) {
1746 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7);
1747 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1748 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1749 if(!SiS_Pr->SiS_ROMNew) {
1750 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
1751 }
1752 }
1753}
1754
1755static void
1756SiS_CloseCRTC(struct SiS_Private *SiS_Pr)
1913{ 1757{
1914 if(IS_SIS650) { 1758#if 0 /* This locks some CRTC registers. We don't want that. */
1915 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 1759 unsigned short temp1 = 0, temp2 = 0;
1916 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f); 1760
1917 if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20); 1761 if(IS_SIS661741660760) {
1918 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7); 1762 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
1919 } 1763 temp1 = 0xa0; temp2 = 0x08;
1920 } else if(IS_SIS661741660760) { 1764 }
1921 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7); 1765 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x51,0x1f,temp1);
1922 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f); 1766 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x56,0xe7,temp2);
1923 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7); 1767 }
1924 if(!SiS_Pr->SiS_ROMNew) { 1768#endif
1925 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
1926 }
1927 }
1928} 1769}
1929 1770
1930static void 1771static void
1931SiS_HandleCRT1(SiS_Private *SiS_Pr) 1772SiS_HandleCRT1(struct SiS_Private *SiS_Pr)
1932{ 1773{
1933 /* Enable CRT1 gating */ 1774 /* Enable CRT1 gating */
1934 SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf); 1775 SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf);
1935#if 0 1776#if 0
1936 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) { 1777 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) {
1937 if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) || 1778 if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) ||
1938 (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) { 1779 (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) {
1939 SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40); 1780 SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40);
1940 } 1781 }
1941 } 1782 }
1942#endif 1783#endif
1943} 1784}
1944 1785
@@ -1946,57 +1787,54 @@ SiS_HandleCRT1(SiS_Private *SiS_Pr)
1946/* HELPER: GetColorDepth */ 1787/* HELPER: GetColorDepth */
1947/*********************************************/ 1788/*********************************************/
1948 1789
1949USHORT 1790unsigned short
1950SiS_GetColorDepth(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex) 1791SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1792 unsigned short ModeIdIndex)
1951{ 1793{
1952 USHORT ColorDepth[6] = { 1, 2, 4, 4, 6, 8}; 1794 static const unsigned short ColorDepth[6] = { 1, 2, 4, 4, 6, 8 };
1953 SHORT index; 1795 unsigned short modeflag;
1954 USHORT modeflag; 1796 short index;
1955 1797
1956 /* Do NOT check UseCustomMode, will skrew up FIFO */ 1798 /* Do NOT check UseCustomMode, will skrew up FIFO */
1957 if(ModeNo == 0xfe) { 1799 if(ModeNo == 0xfe) {
1958 modeflag = SiS_Pr->CModeFlag; 1800 modeflag = SiS_Pr->CModeFlag;
1959 } else { 1801 } else if(ModeNo <= 0x13) {
1960 if(ModeNo <= 0x13) 1802 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1961 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 1803 } else {
1962 else 1804 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1963 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 1805 }
1964 } 1806
1965 1807 index = (modeflag & ModeTypeMask) - ModeEGA;
1966 index = (modeflag & ModeTypeMask) - ModeEGA; 1808 if(index < 0) index = 0;
1967 if(index < 0) index = 0; 1809 return ColorDepth[index];
1968 return(ColorDepth[index]);
1969} 1810}
1970 1811
1971/*********************************************/ 1812/*********************************************/
1972/* HELPER: GetOffset */ 1813/* HELPER: GetOffset */
1973/*********************************************/ 1814/*********************************************/
1974 1815
1975USHORT 1816unsigned short
1976SiS_GetOffset(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex, 1817SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1977 USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo) 1818 unsigned short ModeIdIndex, unsigned short RRTI)
1978{ 1819{
1979 USHORT xres, temp, colordepth, infoflag; 1820 unsigned short xres, temp, colordepth, infoflag;
1980 1821
1981 if(SiS_Pr->UseCustomMode) { 1822 if(SiS_Pr->UseCustomMode) {
1982 infoflag = SiS_Pr->CInfoFlag; 1823 infoflag = SiS_Pr->CInfoFlag;
1983 xres = SiS_Pr->CHDisplay; 1824 xres = SiS_Pr->CHDisplay;
1984 } else { 1825 } else {
1985 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 1826 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
1986 xres = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes; 1827 xres = SiS_Pr->SiS_RefIndex[RRTI].XRes;
1987 } 1828 }
1988 1829
1989 colordepth = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex); 1830 colordepth = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex);
1990 1831
1991 temp = xres / 16; 1832 temp = xres / 16;
1992 if(infoflag & InterlaceMode) temp <<= 1; 1833 if(infoflag & InterlaceMode) temp <<= 1;
1993 temp *= colordepth; 1834 temp *= colordepth;
1994 if(xres % 16) { 1835 if(xres % 16) temp += (colordepth >> 1);
1995 colordepth >>= 1; 1836
1996 temp += colordepth; 1837 return temp;
1997 }
1998
1999 return(temp);
2000} 1838}
2001 1839
2002/*********************************************/ 1840/*********************************************/
@@ -2004,55 +1842,29 @@ SiS_GetOffset(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
2004/*********************************************/ 1842/*********************************************/
2005 1843
2006static void 1844static void
2007SiS_SetSeqRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo) 1845SiS_SetSeqRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2008{ 1846{
2009 UCHAR SRdata; 1847 unsigned char SRdata;
2010 USHORT i; 1848 int i;
2011 1849
2012 SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03); /* Set SR0 */ 1850 SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03);
2013 1851
2014 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0]; 1852 /* or "display off" */
1853 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
2015 1854
2016 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 1855 /* determine whether to force x8 dotclock */
2017 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 1856 if((SiS_Pr->SiS_VBType & VB_SISVB) || (SiS_Pr->SiS_IF_DEF_LVDS)) {
2018 SRdata |= 0x01;
2019 }
2020 if(HwInfo->jChipType >= SIS_661) {
2021 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2022 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2023 SRdata |= 0x01; /* 8 dot clock */
2024 }
2025 }
2026 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2027 if(SiS_Pr->SiS_VBType & VB_NoLCD) {
2028 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2029 SRdata |= 0x01; /* 8 dot clock */
2030 }
2031 }
2032 }
2033 }
2034 1857
2035 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1858 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2036 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1859 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) SRdata |= 0x01;
2037 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 1860 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) SRdata |= 0x01;
2038 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2039 SRdata |= 0x01; /* 8 dot clock */
2040 }
2041 }
2042 }
2043 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2044 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2045 SRdata |= 0x01; /* 8 dot clock */
2046 }
2047 }
2048 }
2049 1861
2050 SRdata |= 0x20; /* screen off */ 1862 }
2051 1863
2052 SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata); 1864 SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata);
2053 1865
2054 for(i = 2; i <= 4; i++) { 1866 for(i = 2; i <= 4; i++) {
2055 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i-1]; 1867 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
2056 SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata); 1868 SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata);
2057 } 1869 }
2058} 1870}
@@ -2062,17 +1874,17 @@ SiS_SetSeqRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo)
2062/*********************************************/ 1874/*********************************************/
2063 1875
2064static void 1876static void
2065SiS_SetMiscRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo) 1877SiS_SetMiscRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2066{ 1878{
2067 UCHAR Miscdata; 1879 unsigned char Miscdata;
2068 1880
2069 Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC; 1881 Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
2070 1882
2071 if(HwInfo->jChipType < SIS_661) { 1883 if(SiS_Pr->ChipType < SIS_661) {
2072 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 1884 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
2073 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 1885 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2074 Miscdata |= 0x0C; 1886 Miscdata |= 0x0C;
2075 } 1887 }
2076 } 1888 }
2077 } 1889 }
2078 1890
@@ -2084,33 +1896,34 @@ SiS_SetMiscRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo
2084/*********************************************/ 1896/*********************************************/
2085 1897
2086static void 1898static void
2087SiS_SetCRTCRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 1899SiS_SetCRTCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2088 USHORT StandTableIndex)
2089{ 1900{
2090 UCHAR CRTCdata; 1901 unsigned char CRTCdata;
2091 USHORT i; 1902 unsigned short i;
2092 1903
2093 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* Unlock CRTC */ 1904 /* Unlock CRTC */
2094 1905 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
2095 for(i = 0; i <= 0x18; i++) { 1906
2096 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i]; 1907 for(i = 0; i <= 0x18; i++) {
2097 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata); /* Set CRTC(3d4) */ 1908 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
2098 } 1909 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
2099 if(HwInfo->jChipType >= SIS_661) { 1910 }
2100 SiS_SetupCR5x(SiS_Pr, HwInfo); 1911
2101 for(i = 0x13; i <= 0x14; i++) { 1912 if(SiS_Pr->ChipType >= SIS_661) {
2102 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i]; 1913 SiS_OpenCRTC(SiS_Pr);
2103 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata); 1914 for(i = 0x13; i <= 0x14; i++) {
2104 } 1915 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
2105 } else if( ( (HwInfo->jChipType == SIS_630) || 1916 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
2106 (HwInfo->jChipType == SIS_730) ) && 1917 }
2107 (HwInfo->jChipRevision >= 0x30) ) { /* for 630S0 */ 1918 } else if( ( (SiS_Pr->ChipType == SIS_630) ||
2108 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 1919 (SiS_Pr->ChipType == SIS_730) ) &&
2109 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) { 1920 (SiS_Pr->ChipRevision >= 0x30) ) {
2110 SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE); 1921 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2111 } 1922 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2112 } 1923 SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE);
2113 } 1924 }
1925 }
1926 }
2114} 1927}
2115 1928
2116/*********************************************/ 1929/*********************************************/
@@ -2118,64 +1931,58 @@ SiS_SetCRTCRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
2118/*********************************************/ 1931/*********************************************/
2119 1932
2120static void 1933static void
2121SiS_SetATTRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, 1934SiS_SetATTRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2122 PSIS_HW_INFO HwInfo)
2123{ 1935{
2124 UCHAR ARdata; 1936 unsigned char ARdata;
2125 USHORT i; 1937 unsigned short i;
2126 1938
2127 for(i = 0; i <= 0x13; i++) { 1939 for(i = 0; i <= 0x13; i++) {
2128 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i]; 1940 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
2129#if 0 1941
2130 if((i <= 0x0f) || (i == 0x11)) {
2131 if(ds:489 & 0x08) {
2132 continue;
2133 }
2134 }
2135#endif
2136 if(i == 0x13) { 1942 if(i == 0x13) {
2137 /* Pixel shift. If screen on LCD or TV is shifted left or right, 1943 /* Pixel shift. If screen on LCD or TV is shifted left or right,
2138 * this might be the cause. 1944 * this might be the cause.
2139 */ 1945 */
2140 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 1946 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
2141 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata=0; 1947 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata = 0;
2142 } 1948 }
2143 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1949 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2144 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1950 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
2145 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 1951 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
2146 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0; 1952 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
2147 } 1953 }
2148 } 1954 }
2149 } 1955 }
2150 if(HwInfo->jChipType >= SIS_661) { 1956 if(SiS_Pr->ChipType >= SIS_661) {
2151 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) { 1957 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) {
2152 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0; 1958 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
2153 } 1959 }
2154 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 1960 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2155 if(HwInfo->jChipType >= SIS_315H) { 1961 if(SiS_Pr->ChipType >= SIS_315H) {
2156 if(IS_SIS550650740660) { 1962 if(IS_SIS550650740660) {
2157 /* 315, 330 don't do this */ 1963 /* 315, 330 don't do this */
2158 if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { 1964 if(SiS_Pr->SiS_VBType & VB_SIS30xB) {
2159 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0; 1965 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
2160 } else { 1966 } else {
2161 ARdata = 0; 1967 ARdata = 0;
2162 } 1968 }
2163 } 1969 }
2164 } else { 1970 } else {
2165 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0; 1971 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
2166 } 1972 }
2167 } 1973 }
2168 } 1974 }
2169 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */ 1975 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
2170 SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */ 1976 SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */
2171 SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */ 1977 SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */
2172 } 1978 }
2173 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */ 1979
2174 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */ 1980 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
2175 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */ 1981 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */
1982 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */
2176 1983
2177 SiS_GetRegByte(SiS_Pr->SiS_P3da); 1984 SiS_GetRegByte(SiS_Pr->SiS_P3da);
2178 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */ 1985 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */
2179 SiS_GetRegByte(SiS_Pr->SiS_P3da); 1986 SiS_GetRegByte(SiS_Pr->SiS_P3da);
2180} 1987}
2181 1988
@@ -2184,10 +1991,10 @@ SiS_SetATTRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex,
2184/*********************************************/ 1991/*********************************************/
2185 1992
2186static void 1993static void
2187SiS_SetGRCRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex) 1994SiS_SetGRCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2188{ 1995{
2189 UCHAR GRdata; 1996 unsigned char GRdata;
2190 USHORT i; 1997 unsigned short i;
2191 1998
2192 for(i = 0; i <= 0x08; i++) { 1999 for(i = 0; i <= 0x08; i++) {
2193 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i]; 2000 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
@@ -2205,22 +2012,22 @@ SiS_SetGRCRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex)
2205/*********************************************/ 2012/*********************************************/
2206 2013
2207static void 2014static void
2208SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo) 2015SiS_ClearExt1Regs(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
2209{ 2016{
2210 USHORT i; 2017 unsigned short i;
2211 2018
2212 for(i = 0x0A; i <= 0x0E; i++) { 2019 for(i = 0x0A; i <= 0x0E; i++) {
2213 SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00); 2020 SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00);
2214 } 2021 }
2215 2022
2216 if(HwInfo->jChipType >= SIS_315H) { 2023 if(SiS_Pr->ChipType >= SIS_315H) {
2217 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE); 2024 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
2218 if(ModeNo <= 0x13) { 2025 if(ModeNo <= 0x13) {
2219 if(ModeNo == 0x06 || ModeNo >= 0x0e) { 2026 if(ModeNo == 0x06 || ModeNo >= 0x0e) {
2220 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20); 2027 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20);
2221 } 2028 }
2222 } 2029 }
2223 } 2030 }
2224} 2031}
2225 2032
2226/*********************************************/ 2033/*********************************************/
@@ -2228,32 +2035,24 @@ SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
2228/*********************************************/ 2035/*********************************************/
2229 2036
2230static void 2037static void
2231SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 2038SiS_ResetCRT1VCLK(struct SiS_Private *SiS_Pr)
2232{ 2039{
2233 if(HwInfo->jChipType >= SIS_315H) { 2040 if(SiS_Pr->ChipType >= SIS_315H) {
2234 if(HwInfo->jChipType < SIS_661) { 2041 if(SiS_Pr->ChipType < SIS_661) {
2235 if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return; 2042 if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return;
2236 } 2043 }
2237 } else { 2044 } else {
2238 if((SiS_Pr->SiS_IF_DEF_LVDS == 0) && 2045 if((SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
2239 (!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) { 2046 (!(SiS_Pr->SiS_VBType & VB_SIS30xBLV)) ) {
2240 return; 2047 return;
2241 } 2048 }
2242 } 2049 }
2243 2050
2244 if(HwInfo->jChipType >= SIS_315H) { 2051 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x20);
2245 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xCF,0x20);
2246 } else {
2247 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x20);
2248 }
2249 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B); 2052 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B);
2250 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C); 2053 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C);
2251 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80); 2054 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2252 if(HwInfo->jChipType >= SIS_315H) { 2055 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
2253 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
2254 } else {
2255 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x10);
2256 }
2257 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B); 2056 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B);
2258 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C); 2057 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C);
2259 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80); 2058 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
@@ -2264,19 +2063,19 @@ SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
2264/*********************************************/ 2063/*********************************************/
2265 2064
2266static void 2065static void
2267SiS_SetCRT1Sync(SiS_Private *SiS_Pr, USHORT RefreshRateTableIndex) 2066SiS_SetCRT1Sync(struct SiS_Private *SiS_Pr, unsigned short RRTI)
2268{ 2067{
2269 USHORT sync; 2068 unsigned short sync;
2270 2069
2271 if(SiS_Pr->UseCustomMode) { 2070 if(SiS_Pr->UseCustomMode) {
2272 sync = SiS_Pr->CInfoFlag >> 8; 2071 sync = SiS_Pr->CInfoFlag >> 8;
2273 } else { 2072 } else {
2274 sync = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8; 2073 sync = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag >> 8;
2275 } 2074 }
2276 2075
2277 sync &= 0xC0; 2076 sync &= 0xC0;
2278 sync |= 0x2f; 2077 sync |= 0x2f;
2279 SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync); 2078 SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync);
2280} 2079}
2281 2080
2282/*********************************************/ 2081/*********************************************/
@@ -2284,72 +2083,67 @@ SiS_SetCRT1Sync(SiS_Private *SiS_Pr, USHORT RefreshRateTableIndex)
2284/*********************************************/ 2083/*********************************************/
2285 2084
2286static void 2085static void
2287SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2086SiS_SetCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2288 USHORT RefreshRateTableIndex, 2087 unsigned short ModeIdIndex, unsigned short RRTI)
2289 PSIS_HW_INFO HwInfo)
2290{ 2088{
2291 UCHAR index; 2089 unsigned short temp, i, j, modeflag;
2292 USHORT temp,i,j,modeflag; 2090 unsigned char *crt1data = NULL;
2293 2091
2294 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* unlock cr0-7 */ 2092 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2295 2093
2296 if(SiS_Pr->UseCustomMode) { 2094 if(SiS_Pr->UseCustomMode) {
2297 2095
2298 modeflag = SiS_Pr->CModeFlag; 2096 crt1data = &SiS_Pr->CCRT1CRTC[0];
2299 2097
2300 for(i=0,j=0;i<=7;i++,j++) { 2098 } else {
2301 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 2099
2302 } 2100 temp = SiS_GetRefCRT1CRTC(SiS_Pr, RRTI, SiS_Pr->SiS_UseWide);
2303 for(j=0x10;i<=10;i++,j++) { 2101
2304 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 2102 /* Alternate for 1600x1200 LCDA */
2305 } 2103 if((temp == 0x20) && (SiS_Pr->Alternate1600x1200)) temp = 0x57;
2306 for(j=0x15;i<=12;i++,j++) { 2104
2307 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 2105 crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0];
2308 } 2106
2309 for(j=0x0A;i<=15;i++,j++) { 2107 }
2310 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]); 2108
2311 } 2109 /* unlock cr0-7 */
2312 2110 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
2313 temp = SiS_Pr->CCRT1CRTC[16] & 0xE0; 2111
2314 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp); 2112 for(i = 0, j = 0; i <= 7; i++, j++) {
2315 2113 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2316 temp = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5; 2114 }
2317 if(modeflag & DoubleScanMode) temp |= 0x80; 2115 for(j = 0x10; i <= 10; i++, j++) {
2318 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp); 2116 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2319 2117 }
2320 } else { 2118 for(j = 0x15; i <= 12; i++, j++) {
2321 2119 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2322 if(ModeNo <= 0x13) { 2120 }
2323 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 2121 for(j = 0x0A; i <= 15; i++, j++) {
2324 } else { 2122 SiS_SetReg(SiS_Pr->SiS_P3c4,j,crt1data[i]);
2325 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2123 }
2326 } 2124
2327 2125 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,crt1data[16] & 0xE0);
2328 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 2126
2329 2127 temp = (crt1data[16] & 0x01) << 5;
2330 for(i=0,j=0;i<=7;i++,j++) { 2128 if(modeflag & DoubleScanMode) temp |= 0x80;
2331 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]); 2129 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
2332 } 2130
2333 for(j=0x10;i<=10;i++,j++) { 2131 if(SiS_Pr->SiS_ModeType > ModeVGA) {
2334 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]); 2132 SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
2335 } 2133 }
2336 for(j=0x15;i<=12;i++,j++) { 2134
2337 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]); 2135#ifdef SIS315H
2338 } 2136 if(SiS_Pr->ChipType == XGI_20) {
2339 for(j=0x0A;i<=15;i++,j++) { 2137 SiS_SetReg(SiS_Pr->SiS_P3d4,0x04,crt1data[4] - 1);
2340 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]); 2138 if(!(temp = crt1data[5] & 0x1f)) {
2341 } 2139 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0c,0xfb);
2342 2140 }
2343 temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0; 2141 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x05,0xe0,((temp - 1) & 0x1f));
2344 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp); 2142 temp = (crt1data[16] >> 5) + 3;
2345 2143 if(temp > 7) temp -= 7;
2346 temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5; 2144 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0e,0x1f,(temp << 5));
2347 if(modeflag & DoubleScanMode) temp |= 0x80; 2145 }
2348 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp); 2146#endif
2349
2350 }
2351
2352 if(SiS_Pr->SiS_ModeType > ModeVGA) SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
2353} 2147}
2354 2148
2355/*********************************************/ 2149/*********************************************/
@@ -2359,33 +2153,32 @@ SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2359/*********************************************/ 2153/*********************************************/
2360 2154
2361static void 2155static void
2362SiS_SetCRT1Offset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2156SiS_SetCRT1Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2363 USHORT RefreshRateTableIndex, 2157 unsigned short ModeIdIndex, unsigned short RRTI)
2364 PSIS_HW_INFO HwInfo)
2365{ 2158{
2366 USHORT temp, DisplayUnit, infoflag; 2159 unsigned short temp, DisplayUnit, infoflag;
2367 2160
2368 if(SiS_Pr->UseCustomMode) { 2161 if(SiS_Pr->UseCustomMode) {
2369 infoflag = SiS_Pr->CInfoFlag; 2162 infoflag = SiS_Pr->CInfoFlag;
2370 } else { 2163 } else {
2371 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 2164 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
2372 } 2165 }
2373 2166
2374 DisplayUnit = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex, 2167 DisplayUnit = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2375 RefreshRateTableIndex,HwInfo);
2376 2168
2377 temp = (DisplayUnit >> 8) & 0x0f; 2169 temp = (DisplayUnit >> 8) & 0x0f;
2378 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp); 2170 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
2379 2171
2380 temp = DisplayUnit & 0xFF; 2172 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,DisplayUnit & 0xFF);
2381 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,temp);
2382 2173
2383 if(infoflag & InterlaceMode) DisplayUnit >>= 1; 2174 if(infoflag & InterlaceMode) DisplayUnit >>= 1;
2384 2175
2385 DisplayUnit <<= 5; 2176 DisplayUnit <<= 5;
2386 temp = (DisplayUnit & 0xff00) >> 8; 2177 temp = (DisplayUnit >> 8) + 1;
2387 if(DisplayUnit & 0xff) temp++; 2178 if(DisplayUnit & 0xff) temp++;
2388 temp++; 2179 if(SiS_Pr->ChipType == XGI_20) {
2180 if(ModeNo == 0x4a || ModeNo == 0x49) temp--;
2181 }
2389 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp); 2182 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp);
2390} 2183}
2391 2184
@@ -2394,39 +2187,49 @@ SiS_SetCRT1Offset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2394/*********************************************/ 2187/*********************************************/
2395 2188
2396static void 2189static void
2397SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2190SiS_SetCRT1VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2398 PSIS_HW_INFO HwInfo, USHORT RefreshRateTableIndex) 2191 unsigned short ModeIdIndex, unsigned short RRTI)
2399{ 2192{
2400 USHORT index=0, clka, clkb; 2193 unsigned short index = 0, clka, clkb;
2401 2194
2402 if(SiS_Pr->UseCustomMode) { 2195 if(SiS_Pr->UseCustomMode) {
2403 clka = SiS_Pr->CSR2B; 2196 clka = SiS_Pr->CSR2B;
2404 clkb = SiS_Pr->CSR2C; 2197 clkb = SiS_Pr->CSR2C;
2405 } else { 2198 } else {
2406 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 2199 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2407 if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 2200 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) &&
2408 clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A; 2201 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2409 clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B; 2202 /* Alternate for 1600x1200 LCDA */
2410 } else { 2203 if((index == 0x21) && (SiS_Pr->Alternate1600x1200)) index = 0x72;
2411 clka = SiS_Pr->SiS_VCLKData[index].SR2B; 2204 clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A;
2412 clkb = SiS_Pr->SiS_VCLKData[index].SR2C; 2205 clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B;
2413 } 2206 } else {
2414 } 2207 clka = SiS_Pr->SiS_VCLKData[index].SR2B;
2415 2208 clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
2416 if(HwInfo->jChipType >= SIS_315H) { 2209 }
2417 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF); 2210 }
2418 } else { 2211
2419 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x00); 2212 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
2420 } 2213
2421 2214 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,clka);
2422 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,clka); 2215 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
2423 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,clkb); 2216
2424 2217 if(SiS_Pr->ChipType >= SIS_315H) {
2425 if(HwInfo->jChipType >= SIS_315H) { 2218#ifdef SIS315H
2426 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01); 2219 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01);
2427 } else { 2220 if(SiS_Pr->ChipType == XGI_20) {
2428 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80); 2221 unsigned short mf = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2429 } 2222 if(mf & HalfDCLK) {
2223 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,SiS_GetReg(SiS_Pr->SiS_P3c4,0x2b));
2224 clkb = SiS_GetReg(SiS_Pr->SiS_P3c4,0x2c);
2225 clkb = (((clkb & 0x1f) << 1) + 1) | (clkb & 0xe0);
2226 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
2227 }
2228 }
2229#endif
2230 } else {
2231 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2232 }
2430} 2233}
2431 2234
2432/*********************************************/ 2235/*********************************************/
@@ -2434,415 +2237,358 @@ SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2434/*********************************************/ 2237/*********************************************/
2435 2238
2436#ifdef SIS300 2239#ifdef SIS300
2437static USHORT 2240void
2438SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key) 2241SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
2242 unsigned short *idx2)
2243{
2244 unsigned short temp1, temp2;
2245 static const unsigned char ThTiming[8] = {
2246 1, 2, 2, 3, 0, 1, 1, 2
2247 };
2248
2249 temp1 = temp2 = (SiS_GetReg(SiS_Pr->SiS_P3c4,0x18) & 0x62) >> 1;
2250 (*idx2) = (unsigned short)(ThTiming[((temp2 >> 3) | temp1) & 0x07]);
2251 (*idx1) = (unsigned short)(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6) & 0x03;
2252 (*idx1) |= (unsigned short)(((SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) >> 4) & 0x0c));
2253 (*idx1) <<= 1;
2254}
2255
2256static unsigned short
2257SiS_GetFIFOThresholdA300(unsigned short idx1, unsigned short idx2)
2258{
2259 static const unsigned char ThLowA[8 * 3] = {
2260 61, 3,52, 5,68, 7,100,11,
2261 43, 3,42, 5,54, 7, 78,11,
2262 34, 3,37, 5,47, 7, 67,11
2263 };
2264
2265 return (unsigned short)((ThLowA[idx1 + 1] * idx2) + ThLowA[idx1]);
2266}
2267
2268unsigned short
2269SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2)
2270{
2271 static const unsigned char ThLowB[8 * 3] = {
2272 81, 4,72, 6,88, 8,120,12,
2273 55, 4,54, 6,66, 8, 90,12,
2274 42, 4,45, 6,55, 8, 75,12
2275 };
2276
2277 return (unsigned short)((ThLowB[idx1 + 1] * idx2) + ThLowB[idx1]);
2278}
2279
2280static unsigned short
2281SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK,
2282 unsigned short colordepth, unsigned short key)
2439{ 2283{
2440 const UCHAR ThLowA[] = { 61, 3,52, 5,68, 7,100,11, 2284 unsigned short idx1, idx2;
2441 43, 3,42, 5,54, 7, 78,11, 2285 unsigned int longtemp = VCLK * colordepth;
2442 34, 3,37, 5,47, 7, 67,11 }; 2286
2443 2287 SiS_GetFIFOThresholdIndex300(SiS_Pr, &idx1, &idx2);
2444 const UCHAR ThLowB[] = { 81, 4,72, 6,88, 8,120,12, 2288
2445 55, 4,54, 6,66, 8, 90,12, 2289 if(key == 0) {
2446 42, 4,45, 6,55, 8, 75,12 }; 2290 longtemp *= SiS_GetFIFOThresholdA300(idx1, idx2);
2447 2291 } else {
2448 const UCHAR ThTiming[] = { 1, 2, 2, 3, 0, 1, 1, 2 }; 2292 longtemp *= SiS_GetFIFOThresholdB300(idx1, idx2);
2449 2293 }
2450 USHORT tempah, tempal, tempcl, tempbx, temp; 2294 idx1 = longtemp % (MCLK * 16);
2451 ULONG longtemp; 2295 longtemp /= (MCLK * 16);
2452 2296 if(idx1) longtemp++;
2453 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18); 2297 return (unsigned short)longtemp;
2454 tempah &= 0x62;
2455 tempah >>= 1;
2456 tempal = tempah;
2457 tempah >>= 3;
2458 tempal |= tempah;
2459 tempal &= 0x07;
2460 tempcl = ThTiming[tempal];
2461 tempbx = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
2462 tempbx >>= 6;
2463 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
2464 tempah >>= 4;
2465 tempah &= 0x0c;
2466 tempbx |= tempah;
2467 tempbx <<= 1;
2468 if(key == 0) {
2469 tempal = ThLowA[tempbx + 1];
2470 tempal *= tempcl;
2471 tempal += ThLowA[tempbx];
2472 } else {
2473 tempal = ThLowB[tempbx + 1];
2474 tempal *= tempcl;
2475 tempal += ThLowB[tempbx];
2476 }
2477 longtemp = tempal * VCLK * colordepth;
2478 temp = longtemp % (MCLK * 16);
2479 longtemp /= (MCLK * 16);
2480 if(temp) longtemp++;
2481 return((USHORT)longtemp);
2482} 2298}
2483 2299
2484static USHORT 2300static unsigned short
2485SiS_CalcDelay(SiS_Private *SiS_Pr, USHORT VCLK, USHORT colordepth, USHORT MCLK) 2301SiS_CalcDelay(struct SiS_Private *SiS_Pr, unsigned short VCLK,
2302 unsigned short colordepth, unsigned short MCLK)
2486{ 2303{
2487 USHORT tempax, tempbx; 2304 unsigned short temp1, temp2;
2488 2305
2489 tempbx = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0); 2306 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
2490 tempax = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1); 2307 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
2491 if(tempax < 4) tempax = 4; 2308 if(temp1 < 4) temp1 = 4;
2492 tempax -= 4; 2309 temp1 -= 4;
2493 if(tempbx < tempax) tempbx = tempax; 2310 if(temp2 < temp1) temp2 = temp1;
2494 return(tempbx); 2311 return temp2;
2495} 2312}
2496 2313
2497static void 2314static void
2498SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo, 2315SiS_SetCRT1FIFO_300(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2499 USHORT RefreshRateTableIndex) 2316 unsigned short RefreshRateTableIndex)
2317{
2318 unsigned short ThresholdLow = 0;
2319 unsigned short temp, index, VCLK, MCLK, colorth;
2320 static const unsigned short colortharray[6] = { 1, 1, 2, 2, 3, 4 };
2321
2322 if(ModeNo > 0x13) {
2323
2324 /* Get VCLK */
2325 if(SiS_Pr->UseCustomMode) {
2326 VCLK = SiS_Pr->CSRClock;
2327 } else {
2328 index = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
2329 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2330 }
2331
2332 /* Get half colordepth */
2333 colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
2334
2335 /* Get MCLK */
2336 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A) & 0x07;
2337 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
2338
2339 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xc3;
2340 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,temp);
2341
2342 do {
2343 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1;
2344 if(ThresholdLow < 0x13) break;
2345 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
2346 ThresholdLow = 0x13;
2347 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6;
2348 if(!temp) break;
2349 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,((temp - 1) << 6));
2350 } while(0);
2351
2352 } else ThresholdLow = 2;
2353
2354 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2355 temp = (ThresholdLow << 4) | 0x0f;
2356 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
2357
2358 temp = (ThresholdLow & 0x10) << 1;
2359 if(ModeNo > 0x13) temp |= 0x40;
2360 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
2361
2362 /* What is this? */
2363 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2364
2365 /* Write CRT/CPU threshold high */
2366 temp = ThresholdLow + 3;
2367 if(temp > 0x0f) temp = 0x0f;
2368 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
2369}
2370
2371unsigned short
2372SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index)
2500{ 2373{
2501 USHORT ThresholdLow = 0; 2374 static const unsigned char LatencyFactor[] = {
2502 USHORT index, VCLK, MCLK, colorth=0; 2375 97, 88, 86, 79, 77, 0, /* 64 bit BQ=2 */
2503 USHORT tempah, temp; 2376 0, 87, 85, 78, 76, 54, /* 64 bit BQ=1 */
2504 2377 97, 88, 86, 79, 77, 0, /* 128 bit BQ=2 */
2505 if(ModeNo > 0x13) { 2378 0, 79, 77, 70, 68, 48, /* 128 bit BQ=1 */
2506 2379 80, 72, 69, 63, 61, 0, /* 64 bit BQ=2 */
2507 if(SiS_Pr->UseCustomMode) { 2380 0, 70, 68, 61, 59, 37, /* 64 bit BQ=1 */
2508 VCLK = SiS_Pr->CSRClock; 2381 86, 77, 75, 68, 66, 0, /* 128 bit BQ=2 */
2509 } else { 2382 0, 68, 66, 59, 57, 37 /* 128 bit BQ=1 */
2510 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 2383 };
2511 index &= 0x3F; 2384 static const unsigned char LatencyFactor730[] = {
2512 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */ 2385 69, 63, 61,
2513 } 2386 86, 79, 77,
2514 2387 103, 96, 94,
2515 switch (SiS_Pr->SiS_ModeType - ModeEGA) { /* Get half colordepth */ 2388 120,113,111,
2516 case 0 : colorth = 1; break; 2389 137,130,128
2517 case 1 : colorth = 1; break; 2390 };
2518 case 2 : colorth = 2; break; 2391
2519 case 3 : colorth = 2; break; 2392 if(SiS_Pr->ChipType == SIS_730) {
2520 case 4 : colorth = 3; break; 2393 return (unsigned short)LatencyFactor730[index];
2521 case 5 : colorth = 4; break; 2394 } else {
2522 } 2395 return (unsigned short)LatencyFactor[index];
2523 2396 }
2524 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A);
2525 index &= 0x07;
2526 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
2527
2528 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
2529 tempah &= 0xc3;
2530 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,tempah);
2531
2532 do {
2533 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK);
2534 ThresholdLow++;
2535 if(ThresholdLow < 0x13) break;
2536 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
2537 ThresholdLow = 0x13;
2538 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
2539 tempah >>= 6;
2540 if(!(tempah)) break;
2541 tempah--;
2542 tempah <<= 6;
2543 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,tempah);
2544 } while(0);
2545
2546 } else ThresholdLow = 2;
2547
2548 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2549 temp = (ThresholdLow << 4) | 0x0f;
2550 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
2551
2552 temp = (ThresholdLow & 0x10) << 1;
2553 if(ModeNo > 0x13) temp |= 0x40;
2554 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
2555
2556 /* What is this? */
2557 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2558
2559 /* Write CRT/CPU threshold high */
2560 temp = ThresholdLow + 3;
2561 if(temp > 0x0f) temp = 0x0f;
2562 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
2563} 2397}
2564 2398
2565static USHORT 2399static unsigned short
2566SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR key, PSIS_HW_INFO HwInfo) 2400SiS_CalcDelay2(struct SiS_Private *SiS_Pr, unsigned char key)
2567{ 2401{
2568 USHORT data,index; 2402 unsigned short index;
2569 const UCHAR LatencyFactor[] = { 2403
2570 97, 88, 86, 79, 77, 00, /*; 64 bit BQ=2 */ 2404 if(SiS_Pr->ChipType == SIS_730) {
2571 00, 87, 85, 78, 76, 54, /*; 64 bit BQ=1 */ 2405 index = ((key & 0x0f) * 3) + ((key & 0xc0) >> 6);
2572 97, 88, 86, 79, 77, 00, /*; 128 bit BQ=2 */ 2406 } else {
2573 00, 79, 77, 70, 68, 48, /*; 128 bit BQ=1 */ 2407 index = (key & 0xe0) >> 5;
2574 80, 72, 69, 63, 61, 00, /*; 64 bit BQ=2 */ 2408 if(key & 0x10) index += 6;
2575 00, 70, 68, 61, 59, 37, /*; 64 bit BQ=1 */ 2409 if(!(key & 0x01)) index += 24;
2576 86, 77, 75, 68, 66, 00, /*; 128 bit BQ=2 */ 2410 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) & 0x80) index += 12;
2577 00, 68, 66, 59, 57, 37 /*; 128 bit BQ=1 */ 2411 }
2578 }; 2412 return SiS_GetLatencyFactor630(SiS_Pr, index);
2579 const UCHAR LatencyFactor730[] = {
2580 69, 63, 61,
2581 86, 79, 77,
2582 103, 96, 94,
2583 120,113,111,
2584 137,130,128, /* --- Table ends with this entry, data below */
2585 137,130,128, /* to avoid using illegal values */
2586 137,130,128,
2587 137,130,128,
2588 137,130,128,
2589 137,130,128,
2590 137,130,128,
2591 137,130,128,
2592 137,130,128,
2593 137,130,128,
2594 137,130,128,
2595 137,130,128,
2596 };
2597
2598 if(HwInfo->jChipType == SIS_730) {
2599 index = ((key & 0x0f) * 3) + ((key & 0xC0) >> 6);
2600 data = LatencyFactor730[index];
2601 } else {
2602 index = (key & 0xE0) >> 5;
2603 if(key & 0x10) index +=6;
2604 if(!(key & 0x01)) index += 24;
2605 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
2606 if(data & 0x0080) index += 12;
2607 data = LatencyFactor[index];
2608 }
2609 return(data);
2610} 2413}
2611 2414
2612static void 2415static void
2613SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, USHORT ModeNo, 2416SiS_SetCRT1FIFO_630(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2614 PSIS_HW_INFO HwInfo, 2417 unsigned short RefreshRateTableIndex)
2615 USHORT RefreshRateTableIndex)
2616{ 2418{
2617 USHORT i,index,data,VCLK,MCLK,colorth=0; 2419 unsigned short ThresholdLow = 0;
2618 ULONG B,eax,bl,data2; 2420 unsigned short i, data, VCLK, MCLK16, colorth = 0;
2619 USHORT ThresholdLow=0; 2421 unsigned int templ, datal;
2620 UCHAR FQBQData[]= { 2422 const unsigned char *queuedata = NULL;
2621 0x01,0x21,0x41,0x61,0x81, 2423 static const unsigned char FQBQData[21] = {
2622 0x31,0x51,0x71,0x91,0xb1, 2424 0x01,0x21,0x41,0x61,0x81,
2623 0x00,0x20,0x40,0x60,0x80, 2425 0x31,0x51,0x71,0x91,0xb1,
2624 0x30,0x50,0x70,0x90,0xb0, 2426 0x00,0x20,0x40,0x60,0x80,
2625 0xFF 2427 0x30,0x50,0x70,0x90,0xb0,
2626 }; 2428 0xff
2627 UCHAR FQBQData730[]= { 2429 };
2628 0x34,0x74,0xb4, 2430 static const unsigned char FQBQData730[16] = {
2629 0x23,0x63,0xa3, 2431 0x34,0x74,0xb4,
2630 0x12,0x52,0x92, 2432 0x23,0x63,0xa3,
2631 0x01,0x41,0x81, 2433 0x12,0x52,0x92,
2632 0x00,0x40,0x80, 2434 0x01,0x41,0x81,
2633 0xff 2435 0x00,0x40,0x80,
2634 }; 2436 0xff
2635 2437 };
2636 i=0; 2438 static const unsigned short colortharray[6] = {
2637 if(ModeNo > 0x13) { 2439 1, 1, 2, 2, 3, 4
2638 if(SiS_Pr->UseCustomMode) { 2440 };
2639 VCLK = SiS_Pr->CSRClock;
2640 } else {
2641 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2642 index &= 0x3F;
2643 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
2644 }
2645
2646 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A);
2647 index &= 0x07;
2648 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
2649
2650 data2 = SiS_Pr->SiS_ModeType - ModeEGA; /* Get half colordepth */
2651 switch (data2) {
2652 case 0 : colorth = 1; break;
2653 case 1 : colorth = 1; break;
2654 case 2 : colorth = 2; break;
2655 case 3 : colorth = 2; break;
2656 case 4 : colorth = 3; break;
2657 case 5 : colorth = 4; break;
2658 }
2659
2660 if(HwInfo->jChipType == SIS_730) {
2661
2662 do {
2663 B = SiS_CalcDelay2(SiS_Pr, FQBQData730[i], HwInfo) * VCLK * colorth;
2664 bl = B / (MCLK * 16);
2665
2666 if(B == bl * 16 * MCLK) {
2667 bl = bl + 1;
2668 } else {
2669 bl = bl + 2;
2670 }
2671
2672 if(bl > 0x13) {
2673 if(FQBQData730[i+1] == 0xFF) {
2674 ThresholdLow = 0x13;
2675 break;
2676 }
2677 i++;
2678 } else {
2679 ThresholdLow = bl;
2680 break;
2681 }
2682 } while(FQBQData730[i] != 0xFF);
2683 2441
2684 } else { 2442 i = 0;
2685 2443
2686 do { 2444 if(ModeNo > 0x13) {
2687 B = SiS_CalcDelay2(SiS_Pr, FQBQData[i], HwInfo) * VCLK * colorth;
2688 bl = B / (MCLK * 16);
2689 2445
2690 if(B == bl * 16 * MCLK) { 2446 /* Get VCLK */
2691 bl = bl + 1; 2447 if(SiS_Pr->UseCustomMode) {
2692 } else { 2448 VCLK = SiS_Pr->CSRClock;
2693 bl = bl + 2; 2449 } else {
2694 } 2450 data = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
2451 VCLK = SiS_Pr->SiS_VCLKData[data].CLOCK;
2452 }
2695 2453
2696 if(bl > 0x13) { 2454 /* Get MCLK * 16 */
2697 if(FQBQData[i+1] == 0xFF) { 2455 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A) & 0x07;
2698 ThresholdLow = 0x13; 2456 MCLK16 = SiS_Pr->SiS_MCLKData_0[data].CLOCK * 16;
2699 break; 2457
2700 } 2458 /* Get half colordepth */
2701 i++; 2459 colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
2702 } else { 2460
2703 ThresholdLow = bl; 2461 if(SiS_Pr->ChipType == SIS_730) {
2704 break; 2462 queuedata = &FQBQData730[0];
2705 } 2463 } else {
2706 } while(FQBQData[i] != 0xFF); 2464 queuedata = &FQBQData[0];
2707 } 2465 }
2708 } 2466
2709 else { 2467 do {
2710 if(HwInfo->jChipType == SIS_730) { 2468 templ = SiS_CalcDelay2(SiS_Pr, queuedata[i]) * VCLK * colorth;
2711 } else { 2469
2712 i = 9; 2470 datal = templ % MCLK16;
2713 } 2471 templ = (templ / MCLK16) + 1;
2714 ThresholdLow = 0x02; 2472 if(datal) templ++;
2715 } 2473
2474 if(templ > 0x13) {
2475 if(queuedata[i + 1] == 0xFF) {
2476 ThresholdLow = 0x13;
2477 break;
2478 }
2479 i++;
2480 } else {
2481 ThresholdLow = templ;
2482 break;
2483 }
2484 } while(queuedata[i] != 0xFF);
2485
2486 } else {
2487
2488 if(SiS_Pr->ChipType != SIS_730) i = 9;
2489 ThresholdLow = 0x02;
2490
2491 }
2492
2493 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2494 data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
2495 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
2496
2497 data = (ThresholdLow & 0x10) << 1;
2498 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
2499
2500 /* What is this? */
2501 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2502
2503 /* Write CRT/CPU threshold high (gap = 3) */
2504 data = ThresholdLow + 3;
2505 if(data > 0x0f) data = 0x0f;
2506 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
2716 2507
2717 /* Write foreground and background queue */ 2508 /* Write foreground and background queue */
2718 if(HwInfo->jChipType == SIS_730) { 2509#ifdef SIS_LINUX_KERNEL
2719 2510 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
2720 data2 = FQBQData730[i];
2721 data2 = (data2 & 0xC0) >> 5;
2722 data2 <<= 8;
2723
2724#ifdef LINUX_KERNEL
2725 SiS_SetRegLong(0xcf8,0x80000050);
2726 eax = SiS_GetRegLong(0xcfc);
2727 eax &= 0xfffff9ff;
2728 eax |= data2;
2729 SiS_SetRegLong(0xcfc,eax);
2730#else 2511#else
2731 /* We use pci functions X offers. We use pcitag 0, because 2512 templ = pciReadLong(0x00000000, 0x50);
2732 * we want to read/write to the host bridge (which is always
2733 * 00:00.0 on 630, 730 and 540), not the VGA device.
2734 */
2735 eax = pciReadLong(0x00000000, 0x50);
2736 eax &= 0xfffff9ff;
2737 eax |= data2;
2738 pciWriteLong(0x00000000, 0x50, eax);
2739#endif 2513#endif
2740 2514
2741 /* Write GUI grant timer (PCI config 0xA3) */ 2515 if(SiS_Pr->ChipType == SIS_730) {
2742 data2 = FQBQData730[i] << 8;
2743 data2 = (data2 & 0x0f00) | ((data2 & 0x3000) >> 8);
2744 data2 <<= 20;
2745
2746#ifdef LINUX_KERNEL
2747 SiS_SetRegLong(0xcf8,0x800000A0);
2748 eax = SiS_GetRegLong(0xcfc);
2749 eax &= 0x00ffffff;
2750 eax |= data2;
2751 SiS_SetRegLong(0xcfc,eax);
2752#else
2753 eax = pciReadLong(0x00000000, 0xA0);
2754 eax &= 0x00ffffff;
2755 eax |= data2;
2756 pciWriteLong(0x00000000, 0xA0, eax);
2757#endif
2758 2516
2759 } else { 2517 templ &= 0xfffff9ff;
2518 templ |= ((queuedata[i] & 0xc0) << 3);
2760 2519
2761 data2 = FQBQData[i]; 2520 } else {
2762 data2 = (data2 & 0xf0) >> 4;
2763 data2 <<= 24;
2764 2521
2765#ifdef LINUX_KERNEL 2522 templ &= 0xf0ffffff;
2766 SiS_SetRegLong(0xcf8,0x80000050); 2523 if( (ModeNo <= 0x13) &&
2767 eax = SiS_GetRegLong(0xcfc); 2524 (SiS_Pr->ChipType == SIS_630) &&
2768 eax &= 0xf0ffffff; 2525 (SiS_Pr->ChipRevision >= 0x30) ) {
2769 eax |= data2; 2526 templ |= 0x0b000000;
2770 SiS_SetRegLong(0xcfc,eax); 2527 } else {
2771#else 2528 templ |= ((queuedata[i] & 0xf0) << 20);
2772 eax = pciReadLong(0x00000000, 0x50); 2529 }
2773 eax &= 0xf0ffffff; 2530
2774 eax |= data2; 2531 }
2775 pciWriteLong(0x00000000, 0x50, eax);
2776#endif
2777 2532
2778 /* Write GUI grant timer (PCI config 0xA3) */ 2533#ifdef SIS_LINUX_KERNEL
2779 data2 = FQBQData[i]; 2534 sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ);
2780 data2 &= 0x0f; 2535 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0);
2781 data2 <<= 24;
2782
2783#ifdef LINUX_KERNEL
2784 SiS_SetRegLong(0xcf8,0x800000A0);
2785 eax = SiS_GetRegLong(0xcfc);
2786 eax &= 0xf0ffffff;
2787 eax |= data2;
2788 SiS_SetRegLong(0xcfc,eax);
2789#else 2536#else
2790 eax = pciReadLong(0x00000000, 0xA0); 2537 pciWriteLong(0x00000000, 0x50, templ);
2791 eax &= 0xf0ffffff; 2538 templ = pciReadLong(0x00000000, 0xA0);
2792 eax |= data2;
2793 pciWriteLong(0x00000000, 0xA0, eax);
2794#endif 2539#endif
2795 2540
2796 } 2541 /* GUI grant timer (PCI config 0xA3) */
2542 if(SiS_Pr->ChipType == SIS_730) {
2543
2544 templ &= 0x00ffffff;
2545 datal = queuedata[i] << 8;
2546 templ |= (((datal & 0x0f00) | ((datal & 0x3000) >> 8)) << 20);
2797 2547
2798 /* Write CRT/CPU threshold low, CRT/Engine threshold high */ 2548 } else {
2799 data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
2800 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
2801 2549
2802 data = (ThresholdLow & 0x10) << 1; 2550 templ &= 0xf0ffffff;
2803 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data); 2551 templ |= ((queuedata[i] & 0x0f) << 24);
2804 2552
2805 /* What is this? */ 2553 }
2806 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2807 2554
2808 /* Write CRT/CPU threshold high (gap = 3) */ 2555#ifdef SIS_LINUX_KERNEL
2809 data = ThresholdLow + 3; 2556 sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ);
2810 if(data > 0x0f) data = 0x0f; 2557#else
2811 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data); 2558 pciWriteLong(0x00000000, 0xA0, templ);
2812}
2813#endif 2559#endif
2560}
2561#endif /* SIS300 */
2814 2562
2815#ifdef SIS315H 2563#ifdef SIS315H
2816static void 2564static void
2817SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2565SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2818 PSIS_HW_INFO HwInfo)
2819{ 2566{
2820 USHORT modeflag; 2567 unsigned short modeflag;
2821 2568
2822 /* disable auto-threshold */ 2569 /* disable auto-threshold */
2823 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE); 2570 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);
2824 2571
2825 if(SiS_Pr->UseCustomMode) { 2572 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2826 modeflag = SiS_Pr->CModeFlag; 2573
2827 } else { 2574 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE);
2828 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2575 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
2829 } 2576 if(ModeNo > 0x13) {
2830 2577 if(SiS_Pr->ChipType >= XGI_20) {
2831 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE); 2578 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2832 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0); 2579 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2833 if(ModeNo > 0x13) { 2580 } else if(SiS_Pr->ChipType >= SIS_661) {
2834 if(HwInfo->jChipType >= SIS_661) { 2581 if(!(modeflag & HalfDCLK)) {
2835 if(!(modeflag & HalfDCLK)) { 2582 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2836 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34); 2583 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2837 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01); 2584 }
2838 } 2585 } else {
2839 } else { 2586 if((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
2840 if((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) { 2587 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2841 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34); 2588 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2842 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01); 2589 }
2843 } 2590 }
2844 } 2591 }
2845 }
2846} 2592}
2847#endif 2593#endif
2848 2594
@@ -2851,385 +2597,370 @@ SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2851/*********************************************/ 2597/*********************************************/
2852 2598
2853static void 2599static void
2854SiS_SetVCLKState(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 2600SiS_SetVCLKState(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2855 USHORT ModeNo, USHORT RefreshRateTableIndex, 2601 unsigned short RefreshRateTableIndex, unsigned short ModeIdIndex)
2856 USHORT ModeIdIndex)
2857{ 2602{
2858 USHORT data=0, VCLK=0, index=0; 2603 unsigned short data = 0, VCLK = 0, index = 0;
2859 2604
2860 if(ModeNo > 0x13) { 2605 if(ModeNo > 0x13) {
2861 if(SiS_Pr->UseCustomMode) { 2606 if(SiS_Pr->UseCustomMode) {
2862 VCLK = SiS_Pr->CSRClock; 2607 VCLK = SiS_Pr->CSRClock;
2863 } else { 2608 } else {
2864 index = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex, 2609 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2865 RefreshRateTableIndex,HwInfo); 2610 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2866 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; 2611 }
2867 } 2612 }
2868 }
2869
2870 if(HwInfo->jChipType < SIS_315H) {
2871
2872 if(VCLK > 150) data |= 0x80;
2873 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
2874
2875 data = 0x00;
2876 if(VCLK >= 150) data |= 0x08;
2877 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
2878 2613
2879 } else { 2614 if(SiS_Pr->ChipType < SIS_315H) {
2615#ifdef SIS300
2616 if(VCLK > 150) data |= 0x80;
2617 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
2880 2618
2881 if(VCLK >= 166) data |= 0x0c; 2619 data = 0x00;
2882 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data); 2620 if(VCLK >= 150) data |= 0x08;
2621 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
2622#endif
2623 } else if(SiS_Pr->ChipType < XGI_20) {
2624#ifdef SIS315H
2625 if(VCLK >= 166) data |= 0x0c;
2626 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2883 2627
2884 if(VCLK >= 166) { 2628 if(VCLK >= 166) {
2885 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7); 2629 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
2886 } 2630 }
2887 } 2631#endif
2632 } else {
2633#ifdef SIS315H
2634 if(VCLK >= 200) data |= 0x0c;
2635 if(SiS_Pr->ChipType == XGI_20) data &= ~0x04;
2636 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2637 if(SiS_Pr->ChipType != XGI_20) {
2638 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f) & 0xe7;
2639 if(VCLK < 200) data |= 0x10;
2640 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1f,data);
2641 }
2642#endif
2643 }
2888 2644
2889 /* DAC speed */ 2645 /* DAC speed */
2890 if(HwInfo->jChipType >= SIS_661) { 2646 if(SiS_Pr->ChipType >= SIS_661) {
2891 2647
2892 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10); 2648 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10);
2893 2649
2894 } else { 2650 } else {
2895 2651
2896 data = 0x03; 2652 data = 0x03;
2897 if((VCLK >= 135) && (VCLK < 160)) data = 0x02; 2653 if(VCLK >= 260) data = 0x00;
2898 else if((VCLK >= 160) && (VCLK < 260)) data = 0x01; 2654 else if(VCLK >= 160) data = 0x01;
2899 else if(VCLK >= 260) data = 0x00; 2655 else if(VCLK >= 135) data = 0x02;
2900 2656
2901 if(HwInfo->jChipType == SIS_540) { 2657 if(SiS_Pr->ChipType == SIS_540) {
2902 if((VCLK == 203) || (VCLK < 234)) data = 0x02; 2658 if((VCLK == 203) || (VCLK < 234)) data = 0x02;
2903 } 2659 }
2904 2660
2905 if(HwInfo->jChipType < SIS_315H) { 2661 if(SiS_Pr->ChipType < SIS_315H) {
2906 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data); 2662 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data);
2907 } else { 2663 } else {
2908 if(HwInfo->jChipType > SIS_315PRO) { 2664 if(SiS_Pr->ChipType > SIS_315PRO) {
2909 if(ModeNo > 0x13) data &= 0xfc; 2665 if(ModeNo > 0x13) data &= 0xfc;
2910 } 2666 }
2911 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data); 2667 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data);
2912 } 2668 }
2913 2669
2914 } 2670 }
2915} 2671}
2916 2672
2917static void 2673static void
2918SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 2674SiS_SetCRT1ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2919 USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex) 2675 unsigned short ModeIdIndex, unsigned short RRTI)
2920{ 2676{
2921 USHORT data,infoflag=0,modeflag; 2677 unsigned short data, infoflag = 0, modeflag, resindex;
2922 USHORT resindex,xres;
2923#ifdef SIS315H 2678#ifdef SIS315H
2924 USHORT data2,data3; 2679 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
2925 ULONG longdata; 2680 unsigned short data2, data3;
2926 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
2927#endif 2681#endif
2928 2682
2929 if(SiS_Pr->UseCustomMode) { 2683 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2930 modeflag = SiS_Pr->CModeFlag; 2684
2931 infoflag = SiS_Pr->CInfoFlag; 2685 if(SiS_Pr->UseCustomMode) {
2932 xres = SiS_Pr->CHDisplay; 2686 infoflag = SiS_Pr->CInfoFlag;
2933 } else { 2687 } else {
2934 resindex = SiS_GetResInfo(SiS_Pr,ModeNo,ModeIdIndex); 2688 resindex = SiS_GetResInfo(SiS_Pr, ModeNo, ModeIdIndex);
2935 if(ModeNo > 0x13) { 2689 if(ModeNo > 0x13) {
2936 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2690 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
2937 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 2691 }
2938 xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal; 2692 }
2939 } else { 2693
2940 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 2694 /* Disable DPMS */
2941 xres = SiS_Pr->SiS_StResInfo[resindex].HTotal; 2695 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F);
2942 } 2696
2943 } 2697 data = 0;
2944 2698 if(ModeNo > 0x13) {
2945 /* Disable DPMS */ 2699 if(SiS_Pr->SiS_ModeType > ModeEGA) {
2946 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F); 2700 data |= 0x02;
2947 2701 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
2948 data = 0; 2702 }
2949 if(ModeNo > 0x13) { 2703 if(infoflag & InterlaceMode) data |= 0x20;
2950 if(SiS_Pr->SiS_ModeType > ModeEGA) { 2704 }
2951 data |= 0x02; 2705 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data);
2952 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2); 2706
2953 } 2707 if(SiS_Pr->ChipType != SIS_300) {
2954 if(infoflag & InterlaceMode) data |= 0x20; 2708 data = 0;
2955 } 2709 if(infoflag & InterlaceMode) {
2956 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data); 2710 /* data = (Hsync / 8) - ((Htotal / 8) / 2) + 3 */
2957 2711 int hrs = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x04) |
2958 if(HwInfo->jChipType != SIS_300) { 2712 ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0xc0) << 2)) - 3;
2959 data = 0; 2713 int hto = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x00) |
2960 if(infoflag & InterlaceMode) { 2714 ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0x03) << 8)) + 5;
2961 if(xres <= 800) data = 0x0020; 2715 data = hrs - (hto >> 1) + 3;
2962 else if(xres <= 1024) data = 0x0035; 2716 }
2963 else data = 0x0048; 2717 SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,data);
2964 } 2718 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,((data >> 8) & 0x03));
2965 SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,(data & 0xFF)); 2719 }
2966 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,(data >> 8)); 2720
2967 } 2721 if(modeflag & HalfDCLK) {
2968 2722 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
2969 if(modeflag & HalfDCLK) { 2723 }
2970 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08); 2724
2971 } 2725 data = 0;
2972 2726 if(modeflag & LineCompareOff) data = 0x08;
2973 data = 0; 2727 if(SiS_Pr->ChipType == SIS_300) {
2974 if(modeflag & LineCompareOff) data = 0x08; 2728 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data);
2975 if(HwInfo->jChipType == SIS_300) { 2729 } else {
2976 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data); 2730 if(SiS_Pr->ChipType >= XGI_20) data |= 0x20;
2977 } else { 2731 if(SiS_Pr->SiS_ModeType == ModeEGA) {
2978 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data); 2732 if(ModeNo > 0x13) {
2979 if(SiS_Pr->SiS_ModeType == ModeEGA) { 2733 data |= 0x40;
2980 if(ModeNo > 0x13) { 2734 }
2981 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x40); 2735 }
2982 } 2736 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data);
2983 } 2737 }
2984 }
2985
2986 if(HwInfo->jChipType >= SIS_661) {
2987 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
2988 }
2989 2738
2990#ifdef SIS315H 2739#ifdef SIS315H
2991 if(HwInfo->jChipType == SIS_315PRO) { 2740 if(SiS_Pr->ChipType >= SIS_315H) {
2992 2741 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
2993 data = SiS_Get310DRAMType(SiS_Pr, HwInfo); 2742 }
2994 data = SiS_Pr->SiS_SR15[2][data];
2995 if(SiS_Pr->SiS_ModeType == ModeText) {
2996 data &= 0xc7;
2997 } else {
2998 data2 = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,
2999 RefreshRateTableIndex,HwInfo);
3000 data2 >>= 1;
3001 if(infoflag & InterlaceMode) data2 >>= 1;
3002 data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1;
3003 if(!data3) data3++;
3004 data2 /= data3;
3005 if(data2 >= 0x50) {
3006 data &= 0x0f;
3007 data |= 0x50;
3008 }
3009 }
3010 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
3011
3012 } else if( (HwInfo->jChipType == SIS_330) ||
3013 ((HwInfo->jChipType == SIS_760) && (SiS_Pr->SiS_SysFlags & SF_760LFB))) {
3014
3015 data = SiS_Get310DRAMType(SiS_Pr, HwInfo);
3016 if(HwInfo->jChipType == SIS_330) {
3017 data = SiS_Pr->SiS_SR15[2][data];
3018 } else {
3019 if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
3020 else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
3021 else data = 0xba;
3022 }
3023 if(SiS_Pr->SiS_ModeType <= ModeEGA) {
3024 data &= 0xc7;
3025 } else {
3026 if(SiS_Pr->UseCustomMode) {
3027 data2 = SiS_Pr->CSRClock;
3028 } else {
3029 data2 = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,
3030 RefreshRateTableIndex,HwInfo);
3031 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
3032 }
3033 2743
3034 data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1; 2744 if(SiS_Pr->ChipType == SIS_315PRO) {
3035 if(data3) data2 *= data3; 2745
3036 2746 data = SiS_Pr->SiS_SR15[(2 * 4) + SiS_Get310DRAMType(SiS_Pr)];
3037 longdata = SiS_GetMCLK(SiS_Pr, HwInfo) * 1024; 2747 if(SiS_Pr->SiS_ModeType == ModeText) {
3038 2748 data &= 0xc7;
3039 data2 = longdata / data2; 2749 } else {
3040 2750 data2 = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI) >> 1;
3041 if(HwInfo->jChipType == SIS_330) { 2751 if(infoflag & InterlaceMode) data2 >>= 1;
3042 if(SiS_Pr->SiS_ModeType != Mode16Bpp) { 2752 data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
3043 if (data2 >= 0x19c) data = 0xba; 2753 if(data3) data2 /= data3;
3044 else if(data2 >= 0x140) data = 0x7a; 2754 if(data2 >= 0x50) {
3045 else if(data2 >= 0x101) data = 0x3a; 2755 data &= 0x0f;
3046 else if(data2 >= 0xf5) data = 0x32; 2756 data |= 0x50;
3047 else if(data2 >= 0xe2) data = 0x2a; 2757 }
3048 else if(data2 >= 0xc4) data = 0x22; 2758 }
3049 else if(data2 >= 0xac) data = 0x1a; 2759 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
3050 else if(data2 >= 0x9e) data = 0x12; 2760
3051 else if(data2 >= 0x8e) data = 0x0a; 2761 } else if((SiS_Pr->ChipType == SIS_330) || (SiS_Pr->SiS_SysFlags & SF_760LFB)) {
3052 else data = 0x02; 2762
3053 } else { 2763 data = SiS_Get310DRAMType(SiS_Pr);
3054 if(data2 >= 0x127) data = 0xba; 2764 if(SiS_Pr->ChipType == SIS_330) {
3055 else data = 0x7a; 2765 data = SiS_Pr->SiS_SR15[(2 * 4) + data];
3056 } 2766 } else {
3057 } else { /* 760+LFB */ 2767 if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
3058 if (data2 >= 0x190) data = 0xba; 2768 else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
3059 else if(data2 >= 0xff) data = 0x7a; 2769 else data = 0xba;
3060 else if(data2 >= 0xd3) data = 0x3a; 2770 }
3061 else if(data2 >= 0xa9) data = 0x1a; 2771 if(SiS_Pr->SiS_ModeType <= ModeEGA) {
3062 else if(data2 >= 0x93) data = 0x0a; 2772 data &= 0xc7;
3063 else data = 0x02; 2773 } else {
3064 } 2774 if(SiS_Pr->UseCustomMode) {
3065 } 2775 data2 = SiS_Pr->CSRClock;
3066 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data); 2776 } else {
3067 } else if(HwInfo->jChipType == SIS_340) { 2777 data2 = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
3068 /* TODO */ 2778 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
3069 } 2779 }
2780
2781 data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
2782 if(data3) data2 *= data3;
2783
2784 data2 = ((unsigned int)(SiS_GetMCLK(SiS_Pr) * 1024)) / data2;
2785
2786 if(SiS_Pr->ChipType == SIS_330) {
2787 if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
2788 if (data2 >= 0x19c) data = 0xba;
2789 else if(data2 >= 0x140) data = 0x7a;
2790 else if(data2 >= 0x101) data = 0x3a;
2791 else if(data2 >= 0xf5) data = 0x32;
2792 else if(data2 >= 0xe2) data = 0x2a;
2793 else if(data2 >= 0xc4) data = 0x22;
2794 else if(data2 >= 0xac) data = 0x1a;
2795 else if(data2 >= 0x9e) data = 0x12;
2796 else if(data2 >= 0x8e) data = 0x0a;
2797 else data = 0x02;
2798 } else {
2799 if(data2 >= 0x127) data = 0xba;
2800 else data = 0x7a;
2801 }
2802 } else { /* 76x+LFB */
2803 if (data2 >= 0x190) data = 0xba;
2804 else if(data2 >= 0xff) data = 0x7a;
2805 else if(data2 >= 0xd3) data = 0x3a;
2806 else if(data2 >= 0xa9) data = 0x1a;
2807 else if(data2 >= 0x93) data = 0x0a;
2808 else data = 0x02;
2809 }
2810 }
2811 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
2812
2813 }
2814 /* XGI: Nothing. */
2815 /* TODO: Check SiS340 */
3070#endif 2816#endif
3071 2817
3072 data = 0x60; 2818 data = 0x60;
3073 if(SiS_Pr->SiS_ModeType != ModeText) { 2819 if(SiS_Pr->SiS_ModeType != ModeText) {
3074 data ^= 0x60; 2820 data ^= 0x60;
3075 if(SiS_Pr->SiS_ModeType != ModeEGA) { 2821 if(SiS_Pr->SiS_ModeType != ModeEGA) {
3076 data ^= 0xA0; 2822 data ^= 0xA0;
3077 } 2823 }
3078 } 2824 }
3079 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data); 2825 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
3080 2826
3081 SiS_SetVCLKState(SiS_Pr, HwInfo, ModeNo, RefreshRateTableIndex, ModeIdIndex); 2827 SiS_SetVCLKState(SiS_Pr, ModeNo, RRTI, ModeIdIndex);
3082 2828
3083#ifdef SIS315H 2829#ifdef SIS315H
3084 if(HwInfo->jChipType >= SIS_315H) { 2830 if(((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) ||
3085 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) { 2831 (SiS_Pr->ChipType == XGI_40)) {
3086 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c); 2832 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
3087 } else { 2833 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c);
3088 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c); 2834 } else {
3089 } 2835 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c);
3090 } 2836 }
2837 } else if(SiS_Pr->ChipType == XGI_20) {
2838 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
2839 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x33);
2840 } else {
2841 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x73);
2842 }
2843 SiS_SetReg(SiS_Pr->SiS_P3d4,0x51,0x02);
2844 }
3091#endif 2845#endif
3092} 2846}
3093 2847
3094/*********************************************/ 2848#ifdef SIS315H
3095/* LOAD DAC */
3096/*********************************************/
3097
3098#if 0
3099static void 2849static void
3100SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG port) 2850SiS_SetupDualChip(struct SiS_Private *SiS_Pr)
3101{ 2851{
2852#if 0
2853 /* TODO: Find out about IOAddress2 */
2854 SISIOADDRESS P2_3c2 = SiS_Pr->IOAddress2 + 0x12;
2855 SISIOADDRESS P2_3c4 = SiS_Pr->IOAddress2 + 0x14;
2856 SISIOADDRESS P2_3ce = SiS_Pr->IOAddress2 + 0x1e;
3102 int i; 2857 int i;
3103 2858
3104 OutPortByte(port, 0); 2859 if((SiS_Pr->ChipRevision != 0) ||
3105 port++; 2860 (!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x04)))
3106 for (i=0; i < (256 * 3); i++) { 2861 return;
3107 OutPortByte(port, 0); 2862
2863 for(i = 0; i <= 4; i++) { /* SR00 - SR04 */
2864 SiS_SetReg(P2_3c4,i,SiS_GetReg(SiS_Pr->SiS_P3c4,i));
3108 } 2865 }
2866 for(i = 0; i <= 8; i++) { /* GR00 - GR08 */
2867 SiS_SetReg(P2_3ce,i,SiS_GetReg(SiS_Pr->SiS_P3ce,i));
2868 }
2869 SiS_SetReg(P2_3c4,0x05,0x86);
2870 SiS_SetReg(P2_3c4,0x06,SiS_GetReg(SiS_Pr->SiS_P3c4,0x06)); /* SR06 */
2871 SiS_SetReg(P2_3c4,0x21,SiS_GetReg(SiS_Pr->SiS_P3c4,0x21)); /* SR21 */
2872 SiS_SetRegByte(P2_3c2,SiS_GetRegByte(SiS_Pr->SiS_P3cc)); /* MISC */
2873 SiS_SetReg(P2_3c4,0x05,0x00);
2874#endif
3109} 2875}
3110#endif 2876#endif
3111 2877
2878/*********************************************/
2879/* LOAD DAC */
2880/*********************************************/
2881
3112static void 2882static void
3113SiS_WriteDAC(SiS_Private *SiS_Pr, SISIOADDRESS DACData, USHORT shiftflag, 2883SiS_WriteDAC(struct SiS_Private *SiS_Pr, SISIOADDRESS DACData, unsigned short shiftflag,
3114 USHORT dl, USHORT ah, USHORT al, USHORT dh) 2884 unsigned short dl, unsigned short ah, unsigned short al, unsigned short dh)
3115{ 2885{
3116 USHORT temp,bh,bl; 2886 unsigned short d1, d2, d3;
3117 2887
3118 bh = ah; 2888 switch(dl) {
3119 bl = al; 2889 case 0: d1 = dh; d2 = ah; d3 = al; break;
3120 if(dl != 0) { 2890 case 1: d1 = ah; d2 = al; d3 = dh; break;
3121 temp = bh; 2891 default: d1 = al; d2 = dh; d3 = ah;
3122 bh = dh; 2892 }
3123 dh = temp; 2893 SiS_SetRegByte(DACData, (d1 << shiftflag));
3124 if(dl == 1) { 2894 SiS_SetRegByte(DACData, (d2 << shiftflag));
3125 temp = bl; 2895 SiS_SetRegByte(DACData, (d3 << shiftflag));
3126 bl = dh;
3127 dh = temp;
3128 } else {
3129 temp = bl;
3130 bl = bh;
3131 bh = temp;
3132 }
3133 }
3134 if(shiftflag) {
3135 dh <<= 2;
3136 bh <<= 2;
3137 bl <<= 2;
3138 }
3139 SiS_SetRegByte(DACData,(USHORT)dh);
3140 SiS_SetRegByte(DACData,(USHORT)bh);
3141 SiS_SetRegByte(DACData,(USHORT)bl);
3142} 2896}
3143 2897
3144void 2898void
3145SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 2899SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
3146 USHORT ModeNo, USHORT ModeIdIndex)
3147{ 2900{
3148 USHORT data,data2; 2901 unsigned short data, data2, time, i, j, k, m, n, o;
3149 USHORT time,i,j,k,m,n,o; 2902 unsigned short si, di, bx, sf;
3150 USHORT si,di,bx,dl,al,ah,dh;
3151 USHORT shiftflag;
3152 SISIOADDRESS DACAddr, DACData; 2903 SISIOADDRESS DACAddr, DACData;
3153 const USHORT *table = NULL; 2904 const unsigned char *table = NULL;
3154 2905
3155 if(ModeNo <= 0x13) { 2906 data = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex) & DACInfoFlag;
3156 data = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
3157 } else {
3158 if(SiS_Pr->UseCustomMode) {
3159 data = SiS_Pr->CModeFlag;
3160 } else {
3161 data = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3162 }
3163 }
3164 2907
3165 data &= DACInfoFlag; 2908 j = time = 64;
3166 time = 64; 2909 if(data == 0x00) table = SiS_MDA_DAC;
3167 if(data == 0x00) table = SiS_MDA_DAC; 2910 else if(data == 0x08) table = SiS_CGA_DAC;
3168 if(data == 0x08) table = SiS_CGA_DAC; 2911 else if(data == 0x10) table = SiS_EGA_DAC;
3169 if(data == 0x10) table = SiS_EGA_DAC; 2912 else if(data == 0x18) {
3170 if(data == 0x18) { 2913 j = 16;
3171 time = 256; 2914 time = 256;
3172 table = SiS_VGA_DAC; 2915 table = SiS_VGA_DAC;
3173 } 2916 }
3174 if(time == 256) j = 16;
3175 else j = time;
3176 2917
3177 if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */ 2918 if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */
3178 (SiS_Pr->SiS_VBType & VB_NoLCD) ) || 2919 (SiS_Pr->SiS_VBType & VB_NoLCD) ) ||
3179 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */ 2920 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */
3180 (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */ 2921 (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */
2922 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3181 DACAddr = SiS_Pr->SiS_P3c8; 2923 DACAddr = SiS_Pr->SiS_P3c8;
3182 DACData = SiS_Pr->SiS_P3c9; 2924 DACData = SiS_Pr->SiS_P3c9;
3183 shiftflag = 0; 2925 sf = 0;
3184 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3185 } else { 2926 } else {
3186 shiftflag = 1;
3187 DACAddr = SiS_Pr->SiS_Part5Port; 2927 DACAddr = SiS_Pr->SiS_Part5Port;
3188 DACData = SiS_Pr->SiS_Part5Port + 1; 2928 DACData = SiS_Pr->SiS_Part5Port + 1;
2929 sf = 2;
3189 } 2930 }
3190 2931
3191 SiS_SetRegByte(DACAddr,0x00); 2932 SiS_SetRegByte(DACAddr,0x00);
3192 2933
3193 for(i=0; i<j; i++) { 2934 for(i = 0; i < j; i++) {
3194 data = table[i]; 2935 data = table[i];
3195 for(k=0; k<3; k++) { 2936 for(k = 0; k < 3; k++) {
3196 data2 = 0; 2937 data2 = 0;
3197 if(data & 0x01) data2 = 0x2A; 2938 if(data & 0x01) data2 += 0x2A;
3198 if(data & 0x02) data2 += 0x15; 2939 if(data & 0x02) data2 += 0x15;
3199 if(shiftflag) data2 <<= 2; 2940 SiS_SetRegByte(DACData, (data2 << sf));
3200 SiS_SetRegByte(DACData, data2);
3201 data >>= 2; 2941 data >>= 2;
3202 } 2942 }
3203 } 2943 }
3204 2944
3205 if(time == 256) { 2945 if(time == 256) {
3206 for(i = 16; i < 32; i++) { 2946 for(i = 16; i < 32; i++) {
3207 data = table[i]; 2947 data = table[i] << sf;
3208 if(shiftflag) data <<= 2;
3209 for(k = 0; k < 3; k++) SiS_SetRegByte(DACData, data); 2948 for(k = 0; k < 3; k++) SiS_SetRegByte(DACData, data);
3210 } 2949 }
3211 si = 32; 2950 si = 32;
3212 for(m = 0; m < 9; m++) { 2951 for(m = 0; m < 9; m++) {
3213 di = si; 2952 di = si;
3214 bx = si + 4; 2953 bx = si + 4;
3215 dl = 0; 2954 for(n = 0; n < 3; n++) {
3216 for(n = 0; n < 3; n++) { 2955 for(o = 0; o < 5; o++) {
3217 for(o = 0; o < 5; o++) { 2956 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[bx], table[si]);
3218 dh = table[si];
3219 ah = table[di];
3220 al = table[bx];
3221 si++; 2957 si++;
3222 SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
3223 } 2958 }
3224 si -= 2; 2959 si -= 2;
3225 for(o = 0; o < 3; o++) { 2960 for(o = 0; o < 3; o++) {
3226 dh = table[bx]; 2961 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[si], table[bx]);
3227 ah = table[di];
3228 al = table[si];
3229 si--; 2962 si--;
3230 SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
3231 } 2963 }
3232 dl++;
3233 } /* for n < 3 */ 2964 } /* for n < 3 */
3234 si += 5; 2965 si += 5;
3235 } /* for m < 9 */ 2966 } /* for m < 9 */
@@ -3241,89 +2972,114 @@ SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
3241/*********************************************/ 2972/*********************************************/
3242 2973
3243static void 2974static void
3244SiS_SetCRT1Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 2975SiS_SetCRT1Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
3245 USHORT ModeNo, USHORT ModeIdIndex)
3246{ 2976{
3247 USHORT StandTableIndex,RefreshRateTableIndex; 2977 unsigned short StandTableIndex, RefreshRateTableIndex;
3248 2978
3249 SiS_Pr->SiS_CRT1Mode = ModeNo; 2979 SiS_Pr->SiS_CRT1Mode = ModeNo;
3250 StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex); 2980
3251 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 2981 StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex);
3252 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) { 2982
3253 SiS_DisableBridge(SiS_Pr, HwInfo); 2983 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
3254 } 2984 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) {
3255 } 2985 SiS_DisableBridge(SiS_Pr);
3256 2986 }
3257 SiS_ResetSegmentRegisters(SiS_Pr, HwInfo); 2987 }
3258 2988
3259 SiS_SetSeqRegs(SiS_Pr, StandTableIndex, HwInfo); 2989 SiS_ResetSegmentRegisters(SiS_Pr);
3260 SiS_SetMiscRegs(SiS_Pr, StandTableIndex, HwInfo); 2990
3261 SiS_SetCRTCRegs(SiS_Pr, HwInfo, StandTableIndex); 2991 SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
3262 SiS_SetATTRegs(SiS_Pr, StandTableIndex, HwInfo); 2992 SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
3263 SiS_SetGRCRegs(SiS_Pr, StandTableIndex); 2993 SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
3264 SiS_ClearExt1Regs(SiS_Pr, HwInfo, ModeNo); 2994 SiS_SetATTRegs(SiS_Pr, StandTableIndex);
3265 SiS_ResetCRT1VCLK(SiS_Pr, HwInfo); 2995 SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
3266 2996 SiS_ClearExt1Regs(SiS_Pr, ModeNo);
3267 SiS_Pr->SiS_SelectCRT2Rate = 0; 2997 SiS_ResetCRT1VCLK(SiS_Pr);
3268 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); 2998
3269 2999 SiS_Pr->SiS_SelectCRT2Rate = 0;
3270#ifdef LINUX_XF86 3000 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
3271 xf86DrvMsgVerb(0, X_PROBED, 4, "(init: VBType=0x%04x, VBInfo=0x%04x)\n", 3001
3002#ifdef SIS_XORG_XF86
3003 xf86DrvMsgVerb(0, X_PROBED, 4, "(init: VBType=0x%04x, VBInfo=0x%04x)\n",
3272 SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo); 3004 SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo);
3273#endif 3005#endif
3274 3006
3275 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) { 3007 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
3276 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 3008 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
3277 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; 3009 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
3278 } 3010 }
3279 } 3011 }
3280 3012
3281 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 3013 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3282 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; 3014 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
3283 } 3015 }
3284 3016
3285 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3017 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
3286 3018
3287 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3019 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
3288 SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2; 3020 SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
3289 } 3021 }
3290 3022
3291 if(RefreshRateTableIndex != 0xFFFF) { 3023 if(RefreshRateTableIndex != 0xFFFF) {
3292 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex); 3024 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
3293 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3025 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3294 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3026 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3295 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex); 3027 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3296 } 3028 }
3297 3029
3030 switch(SiS_Pr->ChipType) {
3298#ifdef SIS300 3031#ifdef SIS300
3299 if(HwInfo->jChipType == SIS_300) { 3032 case SIS_300:
3300 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo,HwInfo,RefreshRateTableIndex); 3033 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo, RefreshRateTableIndex);
3301 } else if((HwInfo->jChipType == SIS_630) || 3034 break;
3302 (HwInfo->jChipType == SIS_730) || 3035 case SIS_540:
3303 (HwInfo->jChipType == SIS_540)) { 3036 case SIS_630:
3304 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, HwInfo, RefreshRateTableIndex); 3037 case SIS_730:
3305 } 3038 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, RefreshRateTableIndex);
3039 break;
3306#endif 3040#endif
3041 default:
3307#ifdef SIS315H 3042#ifdef SIS315H
3308 if(HwInfo->jChipType >= SIS_315H) { 3043 if(SiS_Pr->ChipType == XGI_20) {
3309 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3044 unsigned char sr2b = 0, sr2c = 0;
3310 } 3045 switch(ModeNo) {
3046 case 0x00:
3047 case 0x01: sr2b = 0x4e; sr2c = 0xe9; break;
3048 case 0x04:
3049 case 0x05:
3050 case 0x0d: sr2b = 0x1b; sr2c = 0xe3; break;
3051 }
3052 if(sr2b) {
3053 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,sr2b);
3054 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,sr2c);
3055 SiS_SetRegByte(SiS_Pr->SiS_P3c2,(SiS_GetRegByte(SiS_Pr->SiS_P3cc) | 0x0c));
3056 }
3057 }
3058 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
3311#endif 3059#endif
3060 break;
3061 }
3062
3063 SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3312 3064
3313 SiS_SetCRT1ModeRegs(SiS_Pr, HwInfo, ModeNo, ModeIdIndex, RefreshRateTableIndex); 3065#ifdef SIS315H
3066 if(SiS_Pr->ChipType == XGI_40) {
3067 SiS_SetupDualChip(SiS_Pr);
3068 }
3069#endif
3314 3070
3315 SiS_LoadDAC(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 3071 SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
3316 3072
3317#ifdef LINUX_KERNEL 3073#ifdef SIS_LINUX_KERNEL
3318 if(SiS_Pr->SiS_flag_clearbuffer) { 3074 if(SiS_Pr->SiS_flag_clearbuffer) {
3319 SiS_ClearBuffer(SiS_Pr,HwInfo,ModeNo); 3075 SiS_ClearBuffer(SiS_Pr, ModeNo);
3320 } 3076 }
3321#endif 3077#endif
3322 3078
3323 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) { 3079 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) {
3324 SiS_WaitRetrace1(SiS_Pr); 3080 SiS_WaitRetrace1(SiS_Pr);
3325 SiS_DisplayOn(SiS_Pr); 3081 SiS_DisplayOn(SiS_Pr);
3326 } 3082 }
3327} 3083}
3328 3084
3329/*********************************************/ 3085/*********************************************/
@@ -3331,33 +3087,62 @@ SiS_SetCRT1Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
3331/*********************************************/ 3087/*********************************************/
3332 3088
3333static void 3089static void
3334SiS_ResetVB(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 3090SiS_InitVB(struct SiS_Private *SiS_Pr)
3091{
3092 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3093
3094 SiS_Pr->Init_P4_0E = 0;
3095 if(SiS_Pr->SiS_ROMNew) {
3096 SiS_Pr->Init_P4_0E = ROMAddr[0x82];
3097 } else if(SiS_Pr->ChipType >= XGI_40) {
3098 if(SiS_Pr->SiS_XGIROM) {
3099 SiS_Pr->Init_P4_0E = ROMAddr[0x80];
3100 }
3101 }
3102}
3103
3104static void
3105SiS_ResetVB(struct SiS_Private *SiS_Pr)
3335{ 3106{
3336 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 3107#ifdef SIS315H
3337 USHORT temp; 3108 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3109 unsigned short temp;
3338 3110
3339 /* VB programming clock */ 3111 /* VB programming clock */
3340 if(SiS_Pr->SiS_UseROM) { 3112 if(SiS_Pr->SiS_UseROM) {
3341 if(HwInfo->jChipType < SIS_330) { 3113 if(SiS_Pr->ChipType < SIS_330) {
3342 temp = ROMAddr[VB310Data_1_2_Offset] | 0x40; 3114 temp = ROMAddr[VB310Data_1_2_Offset] | 0x40;
3343 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40; 3115 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3344 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp); 3116 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3345 } else if(HwInfo->jChipType >= SIS_661) { 3117 } else if(SiS_Pr->ChipType >= SIS_661 && SiS_Pr->ChipType < XGI_20) {
3346 temp = ROMAddr[0x7e] | 0x40; 3118 temp = ROMAddr[0x7e] | 0x40;
3347 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40; 3119 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3348 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp); 3120 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3349 } 3121 }
3122 } else if(SiS_Pr->ChipType >= XGI_40) {
3123 temp = 0x40;
3124 if(SiS_Pr->SiS_XGIROM) temp |= ROMAddr[0x7e];
3125 /* Can we do this on any chipset? */
3126 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3350 } 3127 }
3128#endif
3351} 3129}
3352 3130
3353/*********************************************/ 3131/*********************************************/
3354/* HELPER: SET VIDEO REGISTERS */ 3132/* HELPER: SET VIDEO/CAPTURE REGISTERS */
3355/*********************************************/ 3133/*********************************************/
3356 3134
3357static void 3135static void
3358SiS_StrangeStuff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 3136SiS_StrangeStuff(struct SiS_Private *SiS_Pr)
3359{ 3137{
3360 if((IS_SIS651) || (IS_SISM650)) { 3138 /* SiS65x and XGI set up some sort of "lock mode" for text
3139 * which locks CRT2 in some way to CRT1 timing. Disable
3140 * this here.
3141 */
3142#ifdef SIS315H
3143 if((IS_SIS651) || (IS_SISM650) ||
3144 SiS_Pr->ChipType == SIS_340 ||
3145 SiS_Pr->ChipType == XGI_40) {
3361 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */ 3146 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */
3362 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00); 3147 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00);
3363 SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */ 3148 SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */
@@ -3365,49 +3150,99 @@ SiS_StrangeStuff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
3365 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef); 3150 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef);
3366 } 3151 }
3367 /* !!! This does not support modes < 0x13 !!! */ 3152 /* !!! This does not support modes < 0x13 !!! */
3153#endif
3368} 3154}
3369 3155
3370/*********************************************/ 3156/*********************************************/
3371/* XFree86: SET SCREEN PITCH */ 3157/* HELPER: SET AGP TIMING FOR SiS760 */
3372/*********************************************/ 3158/*********************************************/
3373 3159
3374#ifdef LINUX_XF86
3375static void 3160static void
3376SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3161SiS_Handle760(struct SiS_Private *SiS_Pr)
3162{
3163#ifdef SIS315H
3164 unsigned int somebase;
3165 unsigned char temp1, temp2, temp3;
3166
3167 if( (SiS_Pr->ChipType != SIS_760) ||
3168 ((SiS_GetReg(SiS_Pr->SiS_P3d4, 0x5c) & 0xf8) != 0x80) ||
3169 (!(SiS_Pr->SiS_SysFlags & SF_760LFB)) ||
3170 (!(SiS_Pr->SiS_SysFlags & SF_760UMA)) )
3171 return;
3172
3173#ifdef SIS_LINUX_KERNEL
3174 somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74);
3175#else
3176 somebase = pciReadWord(0x00001000, 0x74);
3177#endif
3178 somebase &= 0xffff;
3179
3180 if(somebase == 0) return;
3181
3182 temp3 = SiS_GetRegByte((somebase + 0x85)) & 0xb7;
3183
3184 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
3185 temp1 = 0x21;
3186 temp2 = 0x03;
3187 temp3 |= 0x08;
3188 } else {
3189 temp1 = 0x25;
3190 temp2 = 0x0b;
3191 }
3192
3193#ifdef SIS_LINUX_KERNEL
3194 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1);
3195 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2);
3196#else
3197 pciWriteByte(0x00000000, 0x7e, temp1);
3198 pciWriteByte(0x00000000, 0x8d, temp2);
3199#endif
3200
3201 SiS_SetRegByte((somebase + 0x85), temp3);
3202#endif
3203}
3204
3205/*********************************************/
3206/* X.org/XFree86: SET SCREEN PITCH */
3207/*********************************************/
3208
3209#ifdef SIS_XORG_XF86
3210static void
3211SiS_SetPitchCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3377{ 3212{
3378 SISPtr pSiS = SISPTR(pScrn); 3213 SISPtr pSiS = SISPTR(pScrn);
3379 UShort HDisplay = pSiS->scrnPitch >> 3; 3214 unsigned short HDisplay = pSiS->scrnPitch >> 3;
3380 3215
3381 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF)); 3216 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF));
3382 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay>>8)); 3217 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay >> 8));
3383} 3218}
3384 3219
3385static void 3220static void
3386SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3221SiS_SetPitchCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3387{ 3222{
3388 SISPtr pSiS = SISPTR(pScrn); 3223 SISPtr pSiS = SISPTR(pScrn);
3389 UShort HDisplay = pSiS->scrnPitch2 >> 3; 3224 unsigned short HDisplay = pSiS->scrnPitch2 >> 3;
3390 3225
3391 /* Unlock CRT2 */ 3226 /* Unlock CRT2 */
3392 if(pSiS->VGAEngine == SIS_315_VGA) 3227 if(pSiS->VGAEngine == SIS_315_VGA)
3393 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01); 3228 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01);
3394 else 3229 else
3395 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01); 3230 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01);
3396 3231
3397 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF)); 3232 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF));
3398 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8)); 3233 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8));
3399} 3234}
3400 3235
3401static void 3236static void
3402SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3237SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3403{ 3238{
3404 SISPtr pSiS = SISPTR(pScrn); 3239 SISPtr pSiS = SISPTR(pScrn);
3405 BOOLEAN isslavemode = FALSE; 3240 BOOLEAN isslavemode = FALSE;
3406 3241
3407 if( (pSiS->VBFlags & VB_VIDEOBRIDGE) && 3242 if( (pSiS->VBFlags2 & VB2_VIDEOBRIDGE) &&
3408 ( ((pSiS->VGAEngine == SIS_300_VGA) && 3243 ( ((pSiS->VGAEngine == SIS_300_VGA) &&
3409 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) || 3244 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
3410 ((pSiS->VGAEngine == SIS_315_VGA) && 3245 ((pSiS->VGAEngine == SIS_315_VGA) &&
3411 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) { 3246 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) {
3412 isslavemode = TRUE; 3247 isslavemode = TRUE;
3413 } 3248 }
@@ -3427,59 +3262,59 @@ SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3427/* SiSSetMode() */ 3262/* SiSSetMode() */
3428/*********************************************/ 3263/*********************************************/
3429 3264
3430#ifdef LINUX_XF86 3265#ifdef SIS_XORG_XF86
3431/* We need pScrn for setting the pitch correctly */ 3266/* We need pScrn for setting the pitch correctly */
3432BOOLEAN 3267BOOLEAN
3433SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch) 3268SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, BOOLEAN dosetpitch)
3434#else 3269#else
3435BOOLEAN 3270BOOLEAN
3436SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo) 3271SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
3437#endif 3272#endif
3438{ 3273{
3439 USHORT ModeIdIndex; 3274 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3440 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress; 3275 unsigned short RealModeNo, ModeIdIndex;
3441 unsigned char backupreg=0; 3276 unsigned char backupreg = 0;
3442#ifdef LINUX_KERNEL 3277#ifdef SIS_LINUX_KERNEL
3443 USHORT KeepLockReg; 3278 unsigned short KeepLockReg;
3444 ULONG temp;
3445 3279
3446 SiS_Pr->UseCustomMode = FALSE; 3280 SiS_Pr->UseCustomMode = FALSE;
3447 SiS_Pr->CRT1UsesCustomMode = FALSE; 3281 SiS_Pr->CRT1UsesCustomMode = FALSE;
3448#endif 3282#endif
3449 3283
3284 SiS_Pr->SiS_flag_clearbuffer = 0;
3285
3450 if(SiS_Pr->UseCustomMode) { 3286 if(SiS_Pr->UseCustomMode) {
3451 ModeNo = 0xfe; 3287 ModeNo = 0xfe;
3288 } else {
3289#ifdef SIS_LINUX_KERNEL
3290 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
3291#endif
3292 ModeNo &= 0x7f;
3452 } 3293 }
3453 3294
3454 SiSInitPtr(SiS_Pr, HwInfo); 3295 /* Don't use FSTN mode for CRT1 */
3296 RealModeNo = ModeNo;
3297 if(ModeNo == 0x5b) ModeNo = 0x56;
3298
3299 SiSInitPtr(SiS_Pr);
3455 SiSRegInit(SiS_Pr, BaseAddr); 3300 SiSRegInit(SiS_Pr, BaseAddr);
3456 SiS_GetSysFlags(SiS_Pr, HwInfo); 3301 SiS_GetSysFlags(SiS_Pr);
3457 3302
3458#if defined(LINUX_XF86) && (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__)) 3303 SiS_Pr->SiS_VGAINFO = 0x11;
3304#if defined(SIS_XORG_XF86) && (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__))
3459 if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3305 if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3460 else
3461#endif
3462 SiS_Pr->SiS_VGAINFO = 0x11;
3463
3464 SiSInitPCIetc(SiS_Pr, HwInfo);
3465 SiSSetLVDSetc(SiS_Pr, HwInfo);
3466 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3467
3468 SiS_Pr->SiS_flag_clearbuffer = 0;
3469
3470 if(!SiS_Pr->UseCustomMode) {
3471#ifdef LINUX_KERNEL
3472 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
3473#endif 3306#endif
3474 ModeNo &= 0x7f;
3475 }
3476 3307
3477#ifdef LINUX_KERNEL 3308#ifdef SIS_LINUX_KERNEL
3478 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05); 3309 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
3479#endif 3310#endif
3480 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3311 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3481 3312
3482 SiS_UnLockCRT2(SiS_Pr, HwInfo); 3313 SiSInitPCIetc(SiS_Pr);
3314 SiSSetLVDSetc(SiS_Pr);
3315 SiSDetermineROMUsage(SiS_Pr);
3316
3317 SiS_UnLockCRT2(SiS_Pr);
3483 3318
3484 if(!SiS_Pr->UseCustomMode) { 3319 if(!SiS_Pr->UseCustomMode) {
3485 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; 3320 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
@@ -3487,13 +3322,13 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3487 ModeIdIndex = 0; 3322 ModeIdIndex = 0;
3488 } 3323 }
3489 3324
3490 SiS_GetVBType(SiS_Pr, HwInfo); 3325 SiS_GetVBType(SiS_Pr);
3491 3326
3492 /* Init/restore some VB registers */ 3327 /* Init/restore some VB registers */
3493 3328 SiS_InitVB(SiS_Pr);
3494 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3329 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3495 if(HwInfo->jChipType >= SIS_315H) { 3330 if(SiS_Pr->ChipType >= SIS_315H) {
3496 SiS_ResetVB(SiS_Pr, HwInfo); 3331 SiS_ResetVB(SiS_Pr);
3497 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10); 3332 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3498 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c); 3333 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3499 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3334 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
@@ -3503,21 +3338,20 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3503 } 3338 }
3504 3339
3505 /* Get VB information (connectors, connected devices) */ 3340 /* Get VB information (connectors, connected devices) */
3506 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, (SiS_Pr->UseCustomMode) ? 0 : 1); 3341 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, (SiS_Pr->UseCustomMode) ? 0 : 1);
3507 SiS_SetYPbPr(SiS_Pr, HwInfo); 3342 SiS_SetYPbPr(SiS_Pr);
3508 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3343 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3509 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3344 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3510 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo); 3345 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3511 3346
3512#ifdef LINUX_KERNEL 3347#ifdef SIS_LINUX_KERNEL
3513 /* 3. Check memory size (Kernel framebuffer driver only) */ 3348 /* Check memory size (kernel framebuffer driver only) */
3514 temp = SiS_CheckMemorySize(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 3349 if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) {
3515 if(!temp) return(0); 3350 return FALSE;
3351 }
3516#endif 3352#endif
3517 3353
3518 if(HwInfo->jChipType >= SIS_315H) { 3354 SiS_OpenCRTC(SiS_Pr);
3519 SiS_SetupCR5x(SiS_Pr, HwInfo);
3520 }
3521 3355
3522 if(SiS_Pr->UseCustomMode) { 3356 if(SiS_Pr->UseCustomMode) {
3523 SiS_Pr->CRT1UsesCustomMode = TRUE; 3357 SiS_Pr->CRT1UsesCustomMode = TRUE;
@@ -3530,38 +3364,41 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3530 /* Set mode on CRT1 */ 3364 /* Set mode on CRT1 */
3531 if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) || 3365 if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) ||
3532 (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) { 3366 (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) {
3533 SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 3367 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
3534 } 3368 }
3535 3369
3536 /* Set mode on CRT2 */ 3370 /* Set mode on CRT2 */
3537 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) { 3371 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) {
3538 if( (SiS_Pr->SiS_VBType & VB_SISVB) || 3372 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3539 (SiS_Pr->SiS_IF_DEF_LVDS == 1) || 3373 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3540 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) || 3374 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3541 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) { 3375 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3542 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo); 3376 SiS_SetCRT2Group(SiS_Pr, RealModeNo);
3543 } 3377 }
3544 } 3378 }
3545 3379
3546 SiS_HandleCRT1(SiS_Pr); 3380 SiS_HandleCRT1(SiS_Pr);
3547 3381
3548 SiS_StrangeStuff(SiS_Pr, HwInfo); 3382 SiS_StrangeStuff(SiS_Pr);
3549 3383
3550 SiS_DisplayOn(SiS_Pr); 3384 SiS_DisplayOn(SiS_Pr);
3551 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3385 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3552 3386
3553 if(HwInfo->jChipType >= SIS_315H) { 3387#ifdef SIS315H
3388 if(SiS_Pr->ChipType >= SIS_315H) {
3554 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 3389 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3555 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) { 3390 if(!(SiS_IsDualEdge(SiS_Pr))) {
3556 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); 3391 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3557 } 3392 }
3558 } 3393 }
3559 } 3394 }
3395#endif
3560 3396
3561 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3397 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3562 if(HwInfo->jChipType >= SIS_315H) { 3398 if(SiS_Pr->ChipType >= SIS_315H) {
3563 if(!SiS_Pr->SiS_ROMNew) { 3399#ifdef SIS315H
3564 if(SiS_IsVAMode(SiS_Pr,HwInfo)) { 3400 if(!SiS_Pr->SiS_ROMNew) {
3401 if(SiS_IsVAMode(SiS_Pr)) {
3565 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); 3402 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3566 } else { 3403 } else {
3567 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE); 3404 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
@@ -3574,23 +3411,24 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3574 if((ModeNo == 0x03) || (ModeNo == 0x10)) { 3411 if((ModeNo == 0x03) || (ModeNo == 0x10)) {
3575 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80); 3412 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
3576 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08); 3413 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
3577 } 3414 }
3578 } 3415 }
3579 3416
3580 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) { 3417 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3581 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc); 3418 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3582 } 3419 }
3583 } else if((HwInfo->jChipType == SIS_630) || 3420#endif
3584 (HwInfo->jChipType == SIS_730)) { 3421 } else if((SiS_Pr->ChipType == SIS_630) ||
3585 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg); 3422 (SiS_Pr->ChipType == SIS_730)) {
3423 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3586 } 3424 }
3587 } 3425 }
3588 3426
3589#ifdef LINUX_XF86 3427#ifdef SIS_XORG_XF86
3590 if(pScrn) { 3428 if(pScrn) {
3591 /* SetPitch: Adapt to virtual size & position */ 3429 /* SetPitch: Adapt to virtual size & position */
3592 if((ModeNo > 0x13) && (dosetpitch)) { 3430 if((ModeNo > 0x13) && (dosetpitch)) {
3593 SiS_SetPitch(SiS_Pr, pScrn); 3431 SiS_SetPitch(SiS_Pr, pScrn);
3594 } 3432 }
3595 3433
3596 /* Backup/Set ModeNo in BIOS scratch area */ 3434 /* Backup/Set ModeNo in BIOS scratch area */
@@ -3598,33 +3436,37 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3598 } 3436 }
3599#endif 3437#endif
3600 3438
3601#ifdef LINUX_KERNEL /* We never lock registers in XF86 */ 3439 SiS_CloseCRTC(SiS_Pr);
3602 if(KeepLockReg == 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3440
3603 else SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00); 3441 SiS_Handle760(SiS_Pr);
3442
3443#ifdef SIS_LINUX_KERNEL
3444 /* We never lock registers in XF86 */
3445 if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00);
3604#endif 3446#endif
3605 3447
3606 return TRUE; 3448 return TRUE;
3607} 3449}
3608 3450
3609/*********************************************/ 3451/*********************************************/
3610/* XFree86: SiSBIOSSetMode() */ 3452/* X.org/XFree86: SiSBIOSSetMode() */
3611/* for non-Dual-Head mode */ 3453/* for non-Dual-Head mode */
3612/*********************************************/ 3454/*********************************************/
3613 3455
3614#ifdef LINUX_XF86 3456#ifdef SIS_XORG_XF86
3615BOOLEAN 3457BOOLEAN
3616SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn, 3458SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3617 DisplayModePtr mode, BOOLEAN IsCustom) 3459 DisplayModePtr mode, BOOLEAN IsCustom)
3618{ 3460{
3619 SISPtr pSiS = SISPTR(pScrn); 3461 SISPtr pSiS = SISPTR(pScrn);
3620 UShort ModeNo = 0; 3462 unsigned short ModeNo = 0;
3621 3463
3622 SiS_Pr->UseCustomMode = FALSE; 3464 SiS_Pr->UseCustomMode = FALSE;
3623 3465
3624 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { 3466 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3625 3467
3626 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n", 3468 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n",
3627 SiS_Pr->CHDisplay, 3469 SiS_Pr->CHDisplay,
3628 (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 : 3470 (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 :
3629 (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 : 3471 (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 :
3630 SiS_Pr->CVDisplay))); 3472 SiS_Pr->CVDisplay)));
@@ -3632,32 +3474,33 @@ SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3632 } else { 3474 } else {
3633 3475
3634 /* Don't need vbflags here; checks done earlier */ 3476 /* Don't need vbflags here; checks done earlier */
3635 ModeNo = SiS_GetModeNumber(pScrn, mode, 0); 3477 ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags);
3636 if(!ModeNo) return FALSE; 3478 if(!ModeNo) return FALSE;
3637 3479
3638 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo); 3480 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo);
3639 3481
3640 } 3482 }
3641 3483
3642 return(SiSSetMode(SiS_Pr, HwInfo, pScrn, ModeNo, TRUE)); 3484 return(SiSSetMode(SiS_Pr, pScrn, ModeNo, TRUE));
3643} 3485}
3644 3486
3645/*********************************************/ 3487/*********************************************/
3646/* XFree86: SiSBIOSSetModeCRT2() */ 3488/* X.org/XFree86: SiSBIOSSetModeCRT2() */
3647/* for Dual-Head modes */ 3489/* for Dual-Head modes */
3648/*********************************************/ 3490/*********************************************/
3491
3649BOOLEAN 3492BOOLEAN
3650SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn, 3493SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3651 DisplayModePtr mode, BOOLEAN IsCustom) 3494 DisplayModePtr mode, BOOLEAN IsCustom)
3652{ 3495{
3653 USHORT ModeIdIndex; 3496 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3654 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress; 3497 SISPtr pSiS = SISPTR(pScrn);
3655 UShort ModeNo = 0;
3656 unsigned char backupreg=0;
3657 SISPtr pSiS = SISPTR(pScrn);
3658#ifdef SISDUALHEAD 3498#ifdef SISDUALHEAD
3659 SISEntPtr pSiSEnt = pSiS->entityPrivate; 3499 SISEntPtr pSiSEnt = pSiS->entityPrivate;
3660#endif 3500#endif
3501 unsigned short ModeIdIndex;
3502 unsigned short ModeNo = 0;
3503 unsigned char backupreg = 0;
3661 3504
3662 SiS_Pr->UseCustomMode = FALSE; 3505 SiS_Pr->UseCustomMode = FALSE;
3663 3506
@@ -3672,22 +3515,25 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3672 3515
3673 } else { 3516 } else {
3674 3517
3675 ModeNo = SiS_GetModeNumber(pScrn, mode, 0); 3518 ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags);
3676 if(!ModeNo) return FALSE; 3519 if(!ModeNo) return FALSE;
3677 3520
3678 } 3521 }
3679 3522
3680 SiSRegInit(SiS_Pr, BaseAddr); 3523 SiSRegInit(SiS_Pr, BaseAddr);
3681 SiSInitPtr(SiS_Pr, HwInfo); 3524 SiSInitPtr(SiS_Pr);
3682 SiS_GetSysFlags(SiS_Pr, HwInfo); 3525 SiS_GetSysFlags(SiS_Pr);
3683#if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__)) 3526#if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__)
3684 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3527 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3685#else 3528#else
3686 SiS_Pr->SiS_VGAINFO = 0x11; 3529 SiS_Pr->SiS_VGAINFO = 0x11;
3687#endif 3530#endif
3688 SiSInitPCIetc(SiS_Pr, HwInfo); 3531
3689 SiSSetLVDSetc(SiS_Pr, HwInfo); 3532 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3690 SiSDetermineROMUsage(SiS_Pr, HwInfo); 3533
3534 SiSInitPCIetc(SiS_Pr);
3535 SiSSetLVDSetc(SiS_Pr);
3536 SiSDetermineROMUsage(SiS_Pr);
3691 3537
3692 /* Save mode info so we can set it from within SetMode for CRT1 */ 3538 /* Save mode info so we can set it from within SetMode for CRT1 */
3693#ifdef SISDUALHEAD 3539#ifdef SISDUALHEAD
@@ -3700,23 +3546,20 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3700 pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3546 pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3701 pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3547 pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3702#if 0 3548#if 0
3703 /* We can't set CRT2 mode before CRT1 mode is set */ 3549 /* We can't set CRT2 mode before CRT1 mode is set - says who...? */
3704 if(pSiSEnt->CRT1ModeNo == -1) { 3550 if(pSiSEnt->CRT1ModeNo == -1) {
3705 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3551 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3706 "Setting CRT2 mode delayed until after setting CRT1 mode\n"); 3552 "Setting CRT2 mode delayed until after setting CRT1 mode\n");
3707 return TRUE; 3553 return TRUE;
3708 } 3554 }
3709#endif 3555#endif
3710 pSiSEnt->CRT2ModeSet = TRUE; 3556 pSiSEnt->CRT2ModeSet = TRUE;
3711 } 3557 }
3712#endif 3558#endif
3713 3559
3714 /* We don't clear the buffer in X */
3715 SiS_Pr->SiS_flag_clearbuffer=0;
3716
3717 if(SiS_Pr->UseCustomMode) { 3560 if(SiS_Pr->UseCustomMode) {
3718 3561
3719 USHORT temptemp = SiS_Pr->CVDisplay; 3562 unsigned short temptemp = SiS_Pr->CVDisplay;
3720 3563
3721 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1; 3564 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3722 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1; 3565 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
@@ -3728,13 +3571,11 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3728 } else { 3571 } else {
3729 3572
3730 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3573 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3731 "Setting standard mode 0x%x on CRT2\n", ModeNo); 3574 "Setting standard mode 0x%x on CRT2\n", ModeNo);
3732 3575
3733 } 3576 }
3734 3577
3735 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3578 SiS_UnLockCRT2(SiS_Pr);
3736
3737 SiS_UnLockCRT2(SiS_Pr, HwInfo);
3738 3579
3739 if(!SiS_Pr->UseCustomMode) { 3580 if(!SiS_Pr->UseCustomMode) {
3740 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; 3581 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
@@ -3742,56 +3583,59 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3742 ModeIdIndex = 0; 3583 ModeIdIndex = 0;
3743 } 3584 }
3744 3585
3745 SiS_GetVBType(SiS_Pr, HwInfo); 3586 SiS_GetVBType(SiS_Pr);
3746 3587
3747 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3588 SiS_InitVB(SiS_Pr);
3748 if(HwInfo->jChipType >= SIS_315H) { 3589 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3749 SiS_ResetVB(SiS_Pr, HwInfo); 3590 if(SiS_Pr->ChipType >= SIS_315H) {
3591 SiS_ResetVB(SiS_Pr);
3750 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10); 3592 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3751 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c); 3593 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3752 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3594 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3753 } else { 3595 } else {
3754 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3596 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3755 } 3597 }
3756 } 3598 }
3757 3599
3758 /* Get VB information (connectors, connected devices) */ 3600 /* Get VB information (connectors, connected devices) */
3759 if(!SiS_Pr->UseCustomMode) { 3601 if(!SiS_Pr->UseCustomMode) {
3760 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 1); 3602 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 1);
3761 } else { 3603 } else {
3762 /* If this is a custom mode, we don't check the modeflag for CRT2Mode */ 3604 /* If this is a custom mode, we don't check the modeflag for CRT2Mode */
3763 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0); 3605 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 0);
3764 } 3606 }
3765 SiS_SetYPbPr(SiS_Pr, HwInfo); 3607 SiS_SetYPbPr(SiS_Pr);
3766 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3608 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3767 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3609 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3768 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo); 3610 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3611
3612 SiS_ResetSegmentRegisters(SiS_Pr);
3769 3613
3770 /* Set mode on CRT2 */ 3614 /* Set mode on CRT2 */
3771 if( (SiS_Pr->SiS_VBType & VB_SISVB) || 3615 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3772 (SiS_Pr->SiS_IF_DEF_LVDS == 1) || 3616 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3773 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) || 3617 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3774 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) { 3618 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3775 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo); 3619 SiS_SetCRT2Group(SiS_Pr, ModeNo);
3776 } 3620 }
3777 3621
3778 SiS_StrangeStuff(SiS_Pr, HwInfo); 3622 SiS_StrangeStuff(SiS_Pr);
3779 3623
3780 SiS_DisplayOn(SiS_Pr); 3624 SiS_DisplayOn(SiS_Pr);
3781 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3625 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3782 3626
3783 if(HwInfo->jChipType >= SIS_315H) { 3627 if(SiS_Pr->ChipType >= SIS_315H) {
3784 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 3628 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3785 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) { 3629 if(!(SiS_IsDualEdge(SiS_Pr))) {
3786 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); 3630 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3787 } 3631 }
3788 } 3632 }
3789 } 3633 }
3790 3634
3791 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3635 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3792 if(HwInfo->jChipType >= SIS_315H) { 3636 if(SiS_Pr->ChipType >= SIS_315H) {
3793 if(!SiS_Pr->SiS_ROMNew) { 3637 if(!SiS_Pr->SiS_ROMNew) {
3794 if(SiS_IsVAMode(SiS_Pr,HwInfo)) { 3638 if(SiS_IsVAMode(SiS_Pr)) {
3795 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); 3639 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3796 } else { 3640 } else {
3797 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE); 3641 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
@@ -3803,8 +3647,8 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3803 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) { 3647 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3804 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc); 3648 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3805 } 3649 }
3806 } else if((HwInfo->jChipType == SIS_630) || 3650 } else if((SiS_Pr->ChipType == SIS_630) ||
3807 (HwInfo->jChipType == SIS_730)) { 3651 (SiS_Pr->ChipType == SIS_730)) {
3808 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg); 3652 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3809 } 3653 }
3810 } 3654 }
@@ -3812,25 +3656,27 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3812 /* SetPitch: Adapt to virtual size & position */ 3656 /* SetPitch: Adapt to virtual size & position */
3813 SiS_SetPitchCRT2(SiS_Pr, pScrn); 3657 SiS_SetPitchCRT2(SiS_Pr, pScrn);
3814 3658
3659 SiS_Handle760(SiS_Pr);
3660
3815 return TRUE; 3661 return TRUE;
3816} 3662}
3817 3663
3818/*********************************************/ 3664/*********************************************/
3819/* XFree86: SiSBIOSSetModeCRT1() */ 3665/* X.org/XFree86: SiSBIOSSetModeCRT1() */
3820/* for Dual-Head modes */ 3666/* for Dual-Head modes */
3821/*********************************************/ 3667/*********************************************/
3822 3668
3823BOOLEAN 3669BOOLEAN
3824SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn, 3670SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3825 DisplayModePtr mode, BOOLEAN IsCustom) 3671 DisplayModePtr mode, BOOLEAN IsCustom)
3826{ 3672{
3673 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3827 SISPtr pSiS = SISPTR(pScrn); 3674 SISPtr pSiS = SISPTR(pScrn);
3828 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress; 3675 unsigned short ModeIdIndex, ModeNo = 0;
3829 USHORT ModeIdIndex, ModeNo=0; 3676 unsigned char backupreg = 0;
3830 UCHAR backupreg=0;
3831#ifdef SISDUALHEAD 3677#ifdef SISDUALHEAD
3832 SISEntPtr pSiSEnt = pSiS->entityPrivate; 3678 SISEntPtr pSiSEnt = pSiS->entityPrivate;
3833 UCHAR backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0; 3679 unsigned char backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0;
3834 BOOLEAN backupcustom; 3680 BOOLEAN backupcustom;
3835#endif 3681#endif
3836 3682
@@ -3838,43 +3684,41 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3838 3684
3839 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { 3685 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3840 3686
3841 USHORT temptemp = SiS_Pr->CVDisplay; 3687 unsigned short temptemp = SiS_Pr->CVDisplay;
3842 3688
3843 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1; 3689 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3844 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1; 3690 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
3845 3691
3846 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3692 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3847 "Setting custom mode %dx%d on CRT1\n", 3693 "Setting custom mode %dx%d on CRT1\n",
3848 SiS_Pr->CHDisplay, temptemp); 3694 SiS_Pr->CHDisplay, temptemp);
3849 ModeNo = 0xfe; 3695 ModeNo = 0xfe;
3850 3696
3851 } else { 3697 } else {
3852 3698
3853 ModeNo = SiS_GetModeNumber(pScrn, mode, 0); 3699 ModeNo = SiS_GetModeNumber(pScrn, mode, 0); /* don't give VBFlags */
3854 if(!ModeNo) return FALSE; 3700 if(!ModeNo) return FALSE;
3855 3701
3856 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3702 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3857 "Setting standard mode 0x%x on CRT1\n", ModeNo); 3703 "Setting standard mode 0x%x on CRT1\n", ModeNo);
3858 } 3704 }
3859 3705
3860 SiSInitPtr(SiS_Pr, HwInfo); 3706 SiSInitPtr(SiS_Pr);
3861 SiSRegInit(SiS_Pr, BaseAddr); 3707 SiSRegInit(SiS_Pr, BaseAddr);
3862 SiS_GetSysFlags(SiS_Pr, HwInfo); 3708 SiS_GetSysFlags(SiS_Pr);
3863#if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__)) 3709#if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__)
3864 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3710 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3865#else 3711#else
3866 SiS_Pr->SiS_VGAINFO = 0x11; 3712 SiS_Pr->SiS_VGAINFO = 0x11;
3867#endif 3713#endif
3868 SiSInitPCIetc(SiS_Pr, HwInfo);
3869 SiSSetLVDSetc(SiS_Pr, HwInfo);
3870 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3871
3872 /* We don't clear the buffer in X */
3873 SiS_Pr->SiS_flag_clearbuffer = 0;
3874 3714
3875 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3715 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3876 3716
3877 SiS_UnLockCRT2(SiS_Pr, HwInfo); 3717 SiSInitPCIetc(SiS_Pr);
3718 SiSSetLVDSetc(SiS_Pr);
3719 SiSDetermineROMUsage(SiS_Pr);
3720
3721 SiS_UnLockCRT2(SiS_Pr);
3878 3722
3879 if(!SiS_Pr->UseCustomMode) { 3723 if(!SiS_Pr->UseCustomMode) {
3880 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; 3724 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
@@ -3883,10 +3727,11 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3883 } 3727 }
3884 3728
3885 /* Determine VBType */ 3729 /* Determine VBType */
3886 SiS_GetVBType(SiS_Pr, HwInfo); 3730 SiS_GetVBType(SiS_Pr);
3887 3731
3888 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3732 SiS_InitVB(SiS_Pr);
3889 if(HwInfo->jChipType >= SIS_315H) { 3733 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3734 if(SiS_Pr->ChipType >= SIS_315H) {
3890 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3735 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3891 } else { 3736 } else {
3892 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3737 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
@@ -3895,25 +3740,29 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3895 3740
3896 /* Get VB information (connectors, connected devices) */ 3741 /* Get VB information (connectors, connected devices) */
3897 /* (We don't care if the current mode is a CRT2 mode) */ 3742 /* (We don't care if the current mode is a CRT2 mode) */
3898 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0); 3743 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 0);
3899 SiS_SetYPbPr(SiS_Pr, HwInfo); 3744 SiS_SetYPbPr(SiS_Pr);
3900 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3745 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3901 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3746 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3902 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo); 3747 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3903 3748
3904 if(HwInfo->jChipType >= SIS_315H) { 3749 SiS_OpenCRTC(SiS_Pr);
3905 SiS_SetupCR5x(SiS_Pr, HwInfo);
3906 }
3907 3750
3908 /* Set mode on CRT1 */ 3751 /* Set mode on CRT1 */
3909 SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 3752 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
3910 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 3753 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3911 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo); 3754 SiS_SetCRT2Group(SiS_Pr, ModeNo);
3912 } 3755 }
3913 3756
3914 /* SetPitch: Adapt to virtual size & position */ 3757 /* SetPitch: Adapt to virtual size & position */
3915 SiS_SetPitchCRT1(SiS_Pr, pScrn); 3758 SiS_SetPitchCRT1(SiS_Pr, pScrn);
3916 3759
3760 SiS_HandleCRT1(SiS_Pr);
3761
3762 SiS_StrangeStuff(SiS_Pr);
3763
3764 SiS_CloseCRTC(SiS_Pr);
3765
3917#ifdef SISDUALHEAD 3766#ifdef SISDUALHEAD
3918 if(pSiS->DualHeadMode) { 3767 if(pSiS->DualHeadMode) {
3919 pSiSEnt->CRT1ModeNo = ModeNo; 3768 pSiSEnt->CRT1ModeNo = ModeNo;
@@ -3933,7 +3782,7 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3933#ifdef SISDUALHEAD 3782#ifdef SISDUALHEAD
3934 if(pSiS->DualHeadMode) { 3783 if(pSiS->DualHeadMode) {
3935 if(pSiSEnt->CRT2ModeNo != -1) { 3784 if(pSiSEnt->CRT2ModeNo != -1) {
3936 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3785 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3937 "(Re-)Setting mode for CRT2\n"); 3786 "(Re-)Setting mode for CRT2\n");
3938 backupcustom = SiS_Pr->UseCustomMode; 3787 backupcustom = SiS_Pr->UseCustomMode;
3939 backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 3788 backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
@@ -3952,9 +3801,11 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3952 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35); 3801 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35);
3953 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38); 3802 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38);
3954 } 3803 }
3955 SiSBIOSSetModeCRT2(SiS_Pr, HwInfo, pSiSEnt->pScrn_1, 3804
3805 SiSBIOSSetModeCRT2(SiS_Pr, pSiSEnt->pScrn_1,
3956 pSiSEnt->CRT2DMode, pSiSEnt->CRT2IsCustom); 3806 pSiSEnt->CRT2DMode, pSiSEnt->CRT2IsCustom);
3957 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30); 3807
3808 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30);
3958 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31); 3809 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31);
3959 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35); 3810 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35);
3960 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38); 3811 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38);
@@ -3970,22 +3821,20 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3970 * possibly overwritten 3821 * possibly overwritten
3971 */ 3822 */
3972 3823
3973 SiS_HandleCRT1(SiS_Pr);
3974
3975 SiS_StrangeStuff(SiS_Pr, HwInfo);
3976
3977 SiS_DisplayOn(SiS_Pr); 3824 SiS_DisplayOn(SiS_Pr);
3978 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3825 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3979 3826
3980 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3827 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3981 if(HwInfo->jChipType >= SIS_315H) { 3828 if(SiS_Pr->ChipType >= SIS_315H) {
3982 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg); 3829 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3983 } else if((HwInfo->jChipType == SIS_630) || 3830 } else if((SiS_Pr->ChipType == SIS_630) ||
3984 (HwInfo->jChipType == SIS_730)) { 3831 (SiS_Pr->ChipType == SIS_730)) {
3985 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg); 3832 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3986 } 3833 }
3987 } 3834 }
3988 3835
3836 SiS_Handle760(SiS_Pr);
3837
3989 /* Backup/Set ModeNo in BIOS scratch area */ 3838 /* Backup/Set ModeNo in BIOS scratch area */
3990 SiS_GetSetModeID(pScrn,ModeNo); 3839 SiS_GetSetModeID(pScrn,ModeNo);
3991 3840
@@ -3993,84 +3842,6 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3993} 3842}
3994#endif /* Linux_XF86 */ 3843#endif /* Linux_XF86 */
3995 3844
3996
3997#ifdef LINUX_XF86
3998BOOLEAN
3999SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4000{
4001 const USHORT PanelTypeTable300[16] = {
4002 0xc101, 0xc117, 0x0121, 0xc135, 0xc142, 0xc152, 0xc162, 0xc072,
4003 0xc181, 0xc192, 0xc1a1, 0xc1b6, 0xc1c2, 0xc0d2, 0xc1e2, 0xc1f2
4004 };
4005 const USHORT PanelTypeTable31030x[16] = {
4006 0xc102, 0xc112, 0x0122, 0xc132, 0xc142, 0xc152, 0xc169, 0xc179,
4007 0x0189, 0xc192, 0xc1a2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
4008 };
4009 const USHORT PanelTypeTable310LVDS[16] = {
4010 0xc111, 0xc122, 0xc133, 0xc144, 0xc155, 0xc166, 0xc177, 0xc188,
4011 0xc199, 0xc0aa, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
4012 };
4013 USHORT tempax,tempbx,temp;
4014
4015 if(HwInfo->jChipType < SIS_315H) {
4016
4017 tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18);
4018 tempbx = tempax & 0x0F;
4019 if(!(tempax & 0x10)){
4020 if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
4021 tempbx = 0;
4022 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x38);
4023 if(temp & 0x40) tempbx |= 0x08;
4024 if(temp & 0x20) tempbx |= 0x02;
4025 if(temp & 0x01) tempbx |= 0x01;
4026 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x39);
4027 if(temp & 0x80) tempbx |= 0x04;
4028 } else {
4029 return 0;
4030 }
4031 }
4032 tempbx = PanelTypeTable300[tempbx];
4033 tempbx |= LCDSync;
4034 temp = tempbx & 0x00FF;
4035 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
4036 temp = (tempbx & 0xFF00) >> 8;
4037 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
4038
4039 } else {
4040
4041 if(HwInfo->jChipType >= SIS_661) return 0;
4042
4043 tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1a);
4044 tempax &= 0x1e;
4045 tempax >>= 1;
4046 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
4047 if(tempax == 0) {
4048 /* TODO: Include HUGE detection routine
4049 (Probably not worth bothering)
4050 */
4051 return 0;
4052 }
4053 temp = tempax & 0xff;
4054 tempax--;
4055 tempbx = PanelTypeTable310LVDS[tempax];
4056 } else {
4057 tempbx = PanelTypeTable31030x[tempax];
4058 temp = tempbx & 0xff;
4059 }
4060 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
4061 tempbx = (tempbx & 0xff00) >> 8;
4062 temp = tempbx & 0xc1;
4063 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
4064 if(SiS_Pr->SiS_VBType & VB_SISVB) {
4065 temp = tempbx & 0x04;
4066 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x39,0xfb,temp);
4067 }
4068
4069 }
4070 return 1;
4071}
4072#endif
4073
4074#ifndef GETBITSTR 3845#ifndef GETBITSTR
4075#define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l)) 3846#define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l))
4076#define GENMASK(mask) BITMASK(1?mask,0?mask) 3847#define GENMASK(mask) BITMASK(1?mask,0?mask)
@@ -4078,26 +3849,28 @@ SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4078#define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to)) 3849#define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to))
4079#endif 3850#endif
4080 3851
4081static void 3852void
4082SiS_CalcCRRegisters(SiS_Private *SiS_Pr, int depth) 3853SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth)
4083{ 3854{
3855 int x = 1; /* Fix sync */
3856
4084 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */ 3857 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */
4085 SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */ 3858 SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */
4086 SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */ 3859 SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */
4087 SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */ 3860 SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */
4088 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */ 3861 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */
4089 SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */ 3862 SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */
4090 (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F); 3863 (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
4091 3864
4092 SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */ 3865 SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */
4093 SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */ 3866 SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */
4094 | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7) 3867 | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
4095 | ((SiS_Pr->CVSyncStart & 0x100) >> 6) 3868 | (((SiS_Pr->CVSyncStart - x) & 0x100) >> 6)
4096 | (((SiS_Pr->CVBlankStart - 1) & 0x100) >> 5) 3869 | (((SiS_Pr->CVBlankStart- 1) & 0x100) >> 5)
4097 | 0x10 3870 | 0x10
4098 | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4) 3871 | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4)
4099 | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3) 3872 | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
4100 | ((SiS_Pr->CVSyncStart & 0x200) >> 2); 3873 | (((SiS_Pr->CVSyncStart - x) & 0x200) >> 2);
4101 3874
4102 SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */ 3875 SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */
4103 3876
@@ -4106,55 +3879,44 @@ SiS_CalcCRRegisters(SiS_Private *SiS_Pr, int depth)
4106 else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40; 3879 else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40;
4107 } 3880 }
4108 3881
4109#if 0 3882 SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart - x) & 0xFF; /* CR10 */
4110 if (mode->VScan >= 32) 3883 SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd - x) & 0x0F) | 0x80; /* CR11 */
4111 regp->CRTC[9] |= 0x1F;
4112 else if (mode->VScan > 1)
4113 regp->CRTC[9] |= mode->VScan - 1;
4114#endif
4115
4116 SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart ) & 0xFF; /* CR10 */
4117 SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd ) & 0x0F) | 0x80; /* CR11 */
4118 SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */ 3884 SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */
4119 SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */ 3885 SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */
4120 SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */ 3886 SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */
4121 3887
4122 SiS_Pr->CCRT1CRTC[13] = /* SRA */ 3888 SiS_Pr->CCRT1CRTC[13] = /* SRA */
4123 GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) | 3889 GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) |
4124 GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) | 3890 GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) |
4125 GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) | 3891 GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
4126 GETBITSTR((SiS_Pr->CVSyncStart ), 10:10, 3:3) | 3892 GETBITSTR((SiS_Pr->CVSyncStart -x), 10:10, 3:3) |
4127 GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) | 3893 GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) |
4128 GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ; 3894 GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ;
4129 3895
4130 SiS_Pr->CCRT1CRTC[14] = /* SRB */ 3896 SiS_Pr->CCRT1CRTC[14] = /* SRB */
4131 GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) | 3897 GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) |
4132 GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) | 3898 GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) |
4133 GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) | 3899 GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
4134 GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ; 3900 GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ;
4135 3901
4136 3902
4137 SiS_Pr->CCRT1CRTC[15] = /* SRC */ 3903 SiS_Pr->CCRT1CRTC[15] = /* SRC */
4138 GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) | 3904 GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
4139 GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ; 3905 GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ;
4140} 3906}
4141 3907
4142void 3908void
4143SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex) 3909SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
3910 unsigned short ModeIdIndex)
4144{ 3911{
4145 USHORT modeflag, tempax, tempbx, VGAHDE = SiS_Pr->SiS_VGAHDE; 3912 unsigned short modeflag, tempax, tempbx = 0, remaining = 0;
4146 int i,j; 3913 unsigned short VGAHDE = SiS_Pr->SiS_VGAHDE;
3914 int i, j;
4147 3915
4148 /* 1:1 data: use data set by setcrt1crtc() */ 3916 /* 1:1 data: use data set by setcrt1crtc() */
4149 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return; 3917 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
4150 3918
4151 if(ModeNo <= 0x13) { 3919 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
4152 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
4153 } else if(SiS_Pr->UseCustomMode) {
4154 modeflag = SiS_Pr->CModeFlag;
4155 } else {
4156 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4157 }
4158 3920
4159 if(modeflag & HalfDCLK) VGAHDE >>= 1; 3921 if(modeflag & HalfDCLK) VGAHDE >>= 1;
4160 3922
@@ -4164,32 +3926,91 @@ SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
4164 SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE; 3926 SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE;
4165 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE; 3927 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE;
4166 3928
4167 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes; 3929 if(SiS_Pr->ChipType < SIS_315H) {
4168 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */ 3930#ifdef SIS300
4169 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3931 tempbx = SiS_Pr->SiS_VGAHT;
4170 tempax = SiS_Pr->PanelXRes; 3932 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3933 tempbx = SiS_Pr->PanelHT;
3934 }
3935 if(modeflag & HalfDCLK) tempbx >>= 1;
3936 remaining = tempbx % 8;
3937#endif
3938 } else {
3939#ifdef SIS315H
3940 /* OK for LCDA, LVDS */
3941 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes;
3942 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */
3943 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3944 tempax = SiS_Pr->PanelXRes;
3945 }
3946 tempbx += tempax;
3947 if(modeflag & HalfDCLK) tempbx -= VGAHDE;
3948#endif
4171 } 3949 }
4172 tempbx += tempax;
4173 if(modeflag & HalfDCLK) tempbx -= VGAHDE;
4174 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx; 3950 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx;
4175 3951
4176 tempax = VGAHDE; 3952 if(SiS_Pr->ChipType < SIS_315H) {
4177 tempbx = SiS_Pr->CHTotal; 3953#ifdef SIS300
4178 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3954 if(SiS_Pr->SiS_VGAHDE == SiS_Pr->PanelXRes) {
4179 tempbx = SiS_Pr->PanelXRes; 3955 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE + ((SiS_Pr->PanelHRS + 1) & ~1);
4180 if(modeflag & HalfDCLK) tempbx >>= 1; 3956 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + SiS_Pr->PanelHRE;
4181 tempax += ((tempbx - tempax) >> 1); 3957 if(modeflag & HalfDCLK) {
3958 SiS_Pr->CHSyncStart >>= 1;
3959 SiS_Pr->CHSyncEnd >>= 1;
3960 }
3961 } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3962 tempax = (SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE) >> 1;
3963 tempbx = (SiS_Pr->PanelHRS + 1) & ~1;
3964 if(modeflag & HalfDCLK) {
3965 tempax >>= 1;
3966 tempbx >>= 1;
3967 }
3968 SiS_Pr->CHSyncStart = (VGAHDE + tempax + tempbx + 7) & ~7;
3969 tempax = SiS_Pr->PanelHRE + 7;
3970 if(modeflag & HalfDCLK) tempax >>= 1;
3971 SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + tempax) & ~7;
3972 } else {
3973 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE;
3974 if(modeflag & HalfDCLK) {
3975 SiS_Pr->CHSyncStart >>= 1;
3976 tempax = ((SiS_Pr->CHTotal - SiS_Pr->CHSyncStart) / 3) << 1;
3977 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + tempax;
3978 } else {
3979 SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + (SiS_Pr->CHTotal / 10) + 7) & ~7;
3980 SiS_Pr->CHSyncStart += 8;
3981 }
3982 }
3983#endif
3984 } else {
3985#ifdef SIS315H
3986 tempax = VGAHDE;
3987 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3988 tempbx = SiS_Pr->PanelXRes;
3989 if(modeflag & HalfDCLK) tempbx >>= 1;
3990 tempax += ((tempbx - tempax) >> 1);
3991 }
3992 tempax += SiS_Pr->PanelHRS;
3993 SiS_Pr->CHSyncStart = tempax;
3994 tempax += SiS_Pr->PanelHRE;
3995 SiS_Pr->CHSyncEnd = tempax;
3996#endif
4182 } 3997 }
4183 3998
4184 tempax += SiS_Pr->PanelHRS;
4185 SiS_Pr->CHSyncStart = tempax;
4186 tempax += SiS_Pr->PanelHRE;
4187 SiS_Pr->CHSyncEnd = tempax;
4188
4189 tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes; 3999 tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes;
4190 tempax = SiS_Pr->SiS_VGAVDE; 4000 tempax = SiS_Pr->SiS_VGAVDE;
4191 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 4001 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4192 tempax = SiS_Pr->PanelYRes; 4002 tempax = SiS_Pr->PanelYRes;
4003 } else if(SiS_Pr->ChipType < SIS_315H) {
4004#ifdef SIS300
4005 /* Stupid hack for 640x400/320x200 */
4006 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
4007 if((tempax + tempbx) == 438) tempbx += 16;
4008 } else if((SiS_Pr->SiS_LCDResInfo == Panel_800x600) ||
4009 (SiS_Pr->SiS_LCDResInfo == Panel_1024x600)) {
4010 tempax = 0;
4011 tempbx = SiS_Pr->SiS_VGAVT;
4012 }
4013#endif
4193 } 4014 }
4194 SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax; 4015 SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax;
4195 4016
@@ -4201,22 +4022,28 @@ SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
4201 SiS_Pr->CVSyncStart = tempax; 4022 SiS_Pr->CVSyncStart = tempax;
4202 tempax += SiS_Pr->PanelVRE; 4023 tempax += SiS_Pr->PanelVRE;
4203 SiS_Pr->CVSyncEnd = tempax; 4024 SiS_Pr->CVSyncEnd = tempax;
4025 if(SiS_Pr->ChipType < SIS_315H) {
4026 SiS_Pr->CVSyncStart--;
4027 SiS_Pr->CVSyncEnd--;
4028 }
4204 4029
4205 SiS_CalcCRRegisters(SiS_Pr, 8); 4030 SiS_CalcCRRegisters(SiS_Pr, 8);
4031 SiS_Pr->CCRT1CRTC[15] &= ~0xF8;
4032 SiS_Pr->CCRT1CRTC[15] |= (remaining << 4);
4206 SiS_Pr->CCRT1CRTC[16] &= ~0xE0; 4033 SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
4207 4034
4208 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); 4035 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
4209 4036
4210 for(i=0,j=0;i<=7;i++,j++) { 4037 for(i = 0, j = 0; i <= 7; i++, j++) {
4211 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 4038 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4212 } 4039 }
4213 for(j=0x10;i<=10;i++,j++) { 4040 for(j = 0x10; i <= 10; i++, j++) {
4214 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 4041 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4215 } 4042 }
4216 for(j=0x15;i<=12;i++,j++) { 4043 for(j = 0x15; i <= 12; i++, j++) {
4217 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 4044 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4218 } 4045 }
4219 for(j=0x0A;i<=15;i++,j++) { 4046 for(j = 0x0A; i <= 15; i++, j++) {
4220 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]); 4047 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
4221 } 4048 }
4222 4049
@@ -4227,1092 +4054,192 @@ SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
4227 if(modeflag & DoubleScanMode) tempax |= 0x80; 4054 if(modeflag & DoubleScanMode) tempax |= 0x80;
4228 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax); 4055 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax);
4229 4056
4057#ifdef SIS_XORG_XF86
4230#ifdef TWDEBUG 4058#ifdef TWDEBUG
4231 xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n", 4059 xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n",
4232 SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal, 4060 SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal,
4233 SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal, 4061 SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal,
4234 SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd); 4062 SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd);
4235
4236 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n", 4063 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4237 SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1], 4064 SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1],
4238 SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3], 4065 SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3],
4239 SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5], 4066 SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5],
4240 SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]); 4067 SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]);
4241 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n", 4068 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4242 SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9], 4069 SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9],
4243 SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11], 4070 SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11],
4244 SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13], 4071 SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13],
4245 SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]); 4072 SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]);
4246 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]); 4073 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]);
4247#endif 4074#endif
4075#endif
4248} 4076}
4249 4077
4250#ifdef LINUX_XF86
4251
4252void 4078void
4253SiS_MakeClockRegs(ScrnInfoPtr pScrn, int clock, UCHAR *p2b, UCHAR *p2c) 4079SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,
4254{ 4080 int xres, int yres,
4255 int out_n, out_dn, out_div, out_sbit, out_scale; 4081#ifdef SIS_XORG_XF86
4256 unsigned int vclk[5]; 4082 DisplayModePtr current
4257
4258#define Midx 0
4259#define Nidx 1
4260#define VLDidx 2
4261#define Pidx 3
4262#define PSNidx 4
4263
4264 if(SiS_compute_vclk(clock, &out_n, &out_dn, &out_div, &out_sbit, &out_scale)) {
4265 (*p2b) = (out_div == 2) ? 0x80 : 0x00;
4266 (*p2b) |= ((out_n - 1) & 0x7f);
4267 (*p2c) = (out_dn - 1) & 0x1f;
4268 (*p2c) |= (((out_scale - 1) & 3) << 5);
4269 (*p2c) |= ((out_sbit & 0x01) << 7);
4270#ifdef TWDEBUG
4271 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sb %d sc %d\n",
4272 clock, out_n, out_dn, out_div, out_sbit, out_scale);
4273#endif 4083#endif
4274 } else { 4084#ifdef SIS_LINUX_KERNEL
4275 SiSCalcClock(pScrn, clock, 2, vclk); 4085 struct fb_var_screeninfo *var, BOOLEAN writeres
4276 (*p2b) = (vclk[VLDidx] == 2) ? 0x80 : 0x00;
4277 (*p2b) |= (vclk[Midx] - 1) & 0x7f;
4278 (*p2c) = (vclk[Nidx] - 1) & 0x1f;
4279 if(vclk[Pidx] <= 4) {
4280 /* postscale 1,2,3,4 */
4281 (*p2c) |= ((vclk[Pidx] - 1) & 3) << 5;
4282 } else {
4283 /* postscale 6,8 */
4284 (*p2c) |= (((vclk[Pidx] / 2) - 1) & 3) << 5;
4285 (*p2c) |= 0x80;
4286 }
4287#ifdef TWDEBUG
4288 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sc %d\n",
4289 clock, vclk[Midx], vclk[Nidx], vclk[VLDidx], vclk[Pidx]);
4290#endif 4086#endif
4291 } 4087)
4292}
4293
4294#endif
4295
4296/* ================ XFREE86/X.ORG ================= */
4297
4298/* Helper functions */
4299
4300#ifdef LINUX_XF86
4301
4302USHORT
4303SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
4304{ 4088{
4305 SISPtr pSiS = SISPTR(pScrn); 4089 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
4306 int depth = pSiS->CurrentLayout.bitsPerPixel; 4090 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
4307 4091 unsigned char sr_data, cr_data, cr_data2;
4308 pSiS->SiS_Pr->CModeFlag = 0; 4092 int A, B, C, D, E, F, temp;
4309
4310 pSiS->SiS_Pr->CDClock = mode->Clock;
4311
4312 pSiS->SiS_Pr->CHDisplay = mode->HDisplay;
4313 pSiS->SiS_Pr->CHSyncStart = mode->HSyncStart;
4314 pSiS->SiS_Pr->CHSyncEnd = mode->HSyncEnd;
4315 pSiS->SiS_Pr->CHTotal = mode->HTotal;
4316
4317 pSiS->SiS_Pr->CVDisplay = mode->VDisplay;
4318 pSiS->SiS_Pr->CVSyncStart = mode->VSyncStart;
4319 pSiS->SiS_Pr->CVSyncEnd = mode->VSyncEnd;
4320 pSiS->SiS_Pr->CVTotal = mode->VTotal;
4321
4322 pSiS->SiS_Pr->CFlags = mode->Flags;
4323
4324 if(pSiS->SiS_Pr->CFlags & V_INTERLACE) {
4325 pSiS->SiS_Pr->CVDisplay >>= 1;
4326 pSiS->SiS_Pr->CVSyncStart >>= 1;
4327 pSiS->SiS_Pr->CVSyncEnd >>= 1;
4328 pSiS->SiS_Pr->CVTotal >>= 1;
4329 }
4330 if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) {
4331 /* pSiS->SiS_Pr->CDClock <<= 1; */
4332 pSiS->SiS_Pr->CVDisplay <<= 1;
4333 pSiS->SiS_Pr->CVSyncStart <<= 1;
4334 pSiS->SiS_Pr->CVSyncEnd <<= 1;
4335 pSiS->SiS_Pr->CVTotal <<= 1;
4336 }
4337
4338 pSiS->SiS_Pr->CHBlankStart = pSiS->SiS_Pr->CHDisplay;
4339 pSiS->SiS_Pr->CHBlankEnd = pSiS->SiS_Pr->CHTotal;
4340 pSiS->SiS_Pr->CVBlankStart = pSiS->SiS_Pr->CVSyncStart - 1;
4341 pSiS->SiS_Pr->CVBlankEnd = pSiS->SiS_Pr->CVTotal;
4342 4093
4343 SiS_MakeClockRegs(pScrn, pSiS->SiS_Pr->CDClock, &pSiS->SiS_Pr->CSR2B, &pSiS->SiS_Pr->CSR2C); 4094 sr_data = crdata[14];
4344 4095
4345 pSiS->SiS_Pr->CSRClock = (pSiS->SiS_Pr->CDClock / 1000) + 1; 4096 /* Horizontal total */
4097 HT = crdata[0] | ((unsigned short)(sr_data & 0x03) << 8);
4098 A = HT + 5;
4346 4099
4347 SiS_CalcCRRegisters(pSiS->SiS_Pr, depth); 4100 /* Horizontal display enable end */
4101 HDE = crdata[1] | ((unsigned short)(sr_data & 0x0C) << 6);
4102 E = HDE + 1;
4348 4103
4349 switch(depth) { 4104 /* Horizontal retrace (=sync) start */
4350 case 8: pSiS->SiS_Pr->CModeFlag |= 0x223b; break; 4105 HRS = crdata[4] | ((unsigned short)(sr_data & 0xC0) << 2);
4351 case 16: pSiS->SiS_Pr->CModeFlag |= 0x227d; break; 4106 F = HRS - E - 3;
4352 case 32: pSiS->SiS_Pr->CModeFlag |= 0x22ff; break;
4353 default: return 0;
4354 }
4355 4107
4356 if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) 4108 /* Horizontal blank start */
4357 pSiS->SiS_Pr->CModeFlag |= DoubleScanMode; 4109 HBS = crdata[2] | ((unsigned short)(sr_data & 0x30) << 4);
4358 4110
4359 if((pSiS->SiS_Pr->CVDisplay >= 1024) || 4111 sr_data = crdata[15];
4360 (pSiS->SiS_Pr->CVTotal >= 1024) || 4112 cr_data = crdata[5];
4361 (pSiS->SiS_Pr->CHDisplay >= 1024))
4362 pSiS->SiS_Pr->CModeFlag |= LineCompareOff;
4363 4113
4364 if(pSiS->SiS_Pr->CFlags & V_CLKDIV2) 4114 /* Horizontal blank end */
4365 pSiS->SiS_Pr->CModeFlag |= HalfDCLK; 4115 HBE = (crdata[3] & 0x1f) |
4116 ((unsigned short)(cr_data & 0x80) >> 2) |
4117 ((unsigned short)(sr_data & 0x03) << 6);
4366 4118
4367 pSiS->SiS_Pr->CInfoFlag = 0x0007; 4119 /* Horizontal retrace (=sync) end */
4120 HRE = (cr_data & 0x1f) | ((sr_data & 0x04) << 3);
4368 4121
4369 if(pSiS->SiS_Pr->CFlags & V_NHSYNC) 4122 temp = HBE - ((E - 1) & 255);
4370 pSiS->SiS_Pr->CInfoFlag |= 0x4000; 4123 B = (temp > 0) ? temp : (temp + 256);
4371 4124
4372 if(pSiS->SiS_Pr->CFlags & V_NVSYNC) 4125 temp = HRE - ((E + F + 3) & 63);
4373 pSiS->SiS_Pr->CInfoFlag |= 0x8000; 4126 C = (temp > 0) ? temp : (temp + 64);
4374 4127
4375 if(pSiS->SiS_Pr->CFlags & V_INTERLACE) 4128 D = B - F - C;
4376 pSiS->SiS_Pr->CInfoFlag |= InterlaceMode;
4377 4129
4378 pSiS->SiS_Pr->UseCustomMode = TRUE; 4130#ifdef SIS_XORG_XF86
4131 current->HDisplay = (E * 8);
4132 current->HSyncStart = (E * 8) + (F * 8);
4133 current->HSyncEnd = (E * 8) + (F * 8) + (C * 8);
4134 current->HTotal = (E * 8) + (F * 8) + (C * 8) + (D * 8);
4379#ifdef TWDEBUG 4135#ifdef TWDEBUG
4380 xf86DrvMsg(0, X_INFO, "Custom mode %dx%d:\n", 4136 xf86DrvMsg(0, X_INFO,
4381 pSiS->SiS_Pr->CHDisplay,pSiS->SiS_Pr->CVDisplay); 4137 "H: A %d B %d C %d D %d E %d F %d HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
4382 xf86DrvMsg(0, X_INFO, "Modeflag %04x, Infoflag %04x\n", 4138 A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
4383 pSiS->SiS_Pr->CModeFlag, pSiS->SiS_Pr->CInfoFlag);
4384 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4385 pSiS->SiS_Pr->CCRT1CRTC[0], pSiS->SiS_Pr->CCRT1CRTC[1],
4386 pSiS->SiS_Pr->CCRT1CRTC[2], pSiS->SiS_Pr->CCRT1CRTC[3],
4387 pSiS->SiS_Pr->CCRT1CRTC[4], pSiS->SiS_Pr->CCRT1CRTC[5],
4388 pSiS->SiS_Pr->CCRT1CRTC[6], pSiS->SiS_Pr->CCRT1CRTC[7]);
4389 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4390 pSiS->SiS_Pr->CCRT1CRTC[8], pSiS->SiS_Pr->CCRT1CRTC[9],
4391 pSiS->SiS_Pr->CCRT1CRTC[10], pSiS->SiS_Pr->CCRT1CRTC[11],
4392 pSiS->SiS_Pr->CCRT1CRTC[12], pSiS->SiS_Pr->CCRT1CRTC[13],
4393 pSiS->SiS_Pr->CCRT1CRTC[14], pSiS->SiS_Pr->CCRT1CRTC[15]);
4394 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", pSiS->SiS_Pr->CCRT1CRTC[16]);
4395 xf86DrvMsg(0, X_INFO, "Clock: 0x%02x, 0x%02x, %d\n",
4396 pSiS->SiS_Pr->CSR2B, pSiS->SiS_Pr->CSR2C, pSiS->SiS_Pr->CSRClock);
4397#endif
4398 return 1;
4399}
4400
4401int
4402SiS_FindPanelFromDB(SISPtr pSiS, USHORT panelvendor, USHORT panelproduct, int *maxx, int *maxy, int *prefx, int *prefy)
4403{
4404 int i, j;
4405 BOOLEAN done = FALSE;
4406
4407 i = 0;
4408 while((!done) && (SiS_PlasmaTable[i].vendor) && panelvendor) {
4409 if(SiS_PlasmaTable[i].vendor == panelvendor) {
4410 for(j=0; j<SiS_PlasmaTable[i].productnum; j++) {
4411 if(SiS_PlasmaTable[i].product[j] == panelproduct) {
4412 if(SiS_PlasmaTable[i].maxx && SiS_PlasmaTable[i].maxy) {
4413 (*maxx) = (int)SiS_PlasmaTable[i].maxx;
4414 (*maxy) = (int)SiS_PlasmaTable[i].maxy;
4415 (*prefx) = (int)SiS_PlasmaTable[i].prefx;
4416 (*prefy) = (int)SiS_PlasmaTable[i].prefy;
4417 done = TRUE;
4418 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
4419 "Identified %s, correcting max X res %d, max Y res %d\n",
4420 SiS_PlasmaTable[i].plasmaname,
4421 SiS_PlasmaTable[i].maxx, SiS_PlasmaTable[i].maxy);
4422 break;
4423 }
4424 }
4425 }
4426 }
4427 i++;
4428 }
4429 return (done) ? 1 : 0;
4430}
4431
4432/* Build a list of supported modes:
4433 * Built-in modes for which we have all data are M_T_DEFAULT,
4434 * modes derived from DDC or database data are M_T_BUILTIN
4435 */
4436DisplayModePtr
4437SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN includelcdmodes, BOOLEAN isfordvi)
4438{
4439 SISPtr pSiS = SISPTR(pScrn);
4440 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
4441 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
4442 unsigned char sr_data, cr_data, cr_data2, cr_data3;
4443 unsigned char sr2b, sr2c;
4444 float num, denum, postscalar, divider;
4445 int A, B, C, D, E, F, temp, i, j, k, l, index, vclkindex;
4446 DisplayModePtr new = NULL, current = NULL, first = NULL;
4447 BOOLEAN done = FALSE;
4448#if 0
4449 DisplayModePtr backup = NULL;
4450#endif
4451
4452 pSiS->backupmodelist = NULL;
4453 pSiS->AddedPlasmaModes = FALSE;
4454
4455 /* Initialize our pointers */
4456 if(pSiS->VGAEngine == SIS_300_VGA) {
4457#ifdef SIS300
4458 InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4459#else 4139#else
4460 return NULL; 4140 (void)VBS; (void)HBS; (void)A;
4461#endif 4141#endif
4462 } else if(pSiS->VGAEngine == SIS_315_VGA) {
4463#ifdef SIS315H
4464 InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4465#else
4466 return NULL;
4467#endif
4468 } else return NULL;
4469
4470 i = 0;
4471 while(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag != 0xFFFF) {
4472
4473 index = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRT1CRTC;
4474
4475 /* 0x5a (320x240) is a pure FTSN mode, not DSTN! */
4476 if((!pSiS->FSTN) &&
4477 (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID == 0x5a)) {
4478 i++;
4479 continue;
4480 }
4481 if((pSiS->FSTN) &&
4482 (pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
4483 (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240) &&
4484 (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID != 0x5a)) {
4485 i++;
4486 continue;
4487 }
4488
4489 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4490 memset(new, 0, sizeof(DisplayModeRec));
4491 if(!(new->name = xalloc(10))) {
4492 xfree(new);
4493 return first;
4494 }
4495 if(!first) first = new;
4496 if(current) {
4497 current->next = new;
4498 new->prev = current;
4499 }
4500
4501 current = new;
4502
4503 sprintf(current->name, "%dx%d", pSiS->SiS_Pr->SiS_RefIndex[i].XRes,
4504 pSiS->SiS_Pr->SiS_RefIndex[i].YRes);
4505
4506 current->status = MODE_OK;
4507
4508 current->type = M_T_DEFAULT;
4509
4510 vclkindex = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRTVCLK;
4511 if(pSiS->VGAEngine == SIS_300_VGA) vclkindex &= 0x3F;
4512
4513 sr2b = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
4514 sr2c = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
4515
4516 divider = (sr2b & 0x80) ? 2.0 : 1.0;
4517 postscalar = (sr2c & 0x80) ?
4518 ( (((sr2c >> 5) & 0x03) == 0x02) ? 6.0 : 8.0) : (((sr2c >> 5) & 0x03) + 1.0);
4519 num = (sr2b & 0x7f) + 1.0;
4520 denum = (sr2c & 0x1f) + 1.0;
4521
4522#ifdef TWDEBUG
4523 xf86DrvMsg(0, X_INFO, "------------\n");
4524 xf86DrvMsg(0, X_INFO, "sr2b: %x sr2c %x div %f ps %f num %f denum %f\n",
4525 sr2b, sr2c, divider, postscalar, num, denum);
4526#endif 4142#endif
4527 4143#ifdef SIS_LINUX_KERNEL
4528 current->Clock = (int)(14318 * (divider / postscalar) * (num / denum)); 4144 if(writeres) var->xres = xres = E * 8;
4529 4145 var->left_margin = D * 8;
4530 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[14]; 4146 var->right_margin = F * 8;
4531 /* inSISIDXREG(SISSR, 0x0b, sr_data); */ 4147 var->hsync_len = C * 8;
4532
4533 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[0];
4534 /* inSISIDXREG(SISCR, 0x00, cr_data); */
4535
4536 /* Horizontal total */
4537 HT = (cr_data & 0xff) |
4538 ((unsigned short) (sr_data & 0x03) << 8);
4539 A = HT + 5;
4540
4541 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[1];
4542 /* inSISIDXREG(SISCR, 0x01, cr_data); */
4543
4544 /* Horizontal display enable end */
4545 HDE = (cr_data & 0xff) |
4546 ((unsigned short) (sr_data & 0x0C) << 6);
4547 E = HDE + 1; /* 0x80 0x64 */
4548
4549 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[4];
4550 /* inSISIDXREG(SISCR, 0x04, cr_data); */
4551
4552 /* Horizontal retrace (=sync) start */
4553 HRS = (cr_data & 0xff) |
4554 ((unsigned short) (sr_data & 0xC0) << 2);
4555 F = HRS - E - 3; /* 0x06 0x06 */
4556
4557 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[2];
4558 /* inSISIDXREG(SISCR, 0x02, cr_data); */
4559
4560 /* Horizontal blank start */
4561 HBS = (cr_data & 0xff) |
4562 ((unsigned short) (sr_data & 0x30) << 4);
4563
4564 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[15];
4565 /* inSISIDXREG(SISSR, 0x0c, sr_data); */
4566
4567 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[3];
4568 /* inSISIDXREG(SISCR, 0x03, cr_data); */
4569
4570 cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[5];
4571 /* inSISIDXREG(SISCR, 0x05, cr_data2); */
4572
4573 /* Horizontal blank end */
4574 HBE = (cr_data & 0x1f) |
4575 ((unsigned short) (cr_data2 & 0x80) >> 2) |
4576 ((unsigned short) (sr_data & 0x03) << 6);
4577
4578 /* Horizontal retrace (=sync) end */
4579 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
4580
4581 temp = HBE - ((E - 1) & 255);
4582 B = (temp > 0) ? temp : (temp + 256);
4583
4584 temp = HRE - ((E + F + 3) & 63);
4585 C = (temp > 0) ? temp : (temp + 64); /* 0x0b 0x0b */
4586
4587 D = B - F - C;
4588
4589 if((pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
4590 ((pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 200) ||
4591 (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240))) {
4592
4593 /* Terrible hack, but correct CRTC data for
4594 * these modes only produces a black screen...
4595 * (HRE is 0, leading into a too large C and
4596 * a negative D. The CRT controller does not
4597 * seem to like correcting HRE to 50
4598 */
4599 current->HDisplay = 320;
4600 current->HSyncStart = 328;
4601 current->HSyncEnd = 376;
4602 current->HTotal = 400;
4603
4604 } else {
4605
4606 current->HDisplay = (E * 8);
4607 current->HSyncStart = (E * 8) + (F * 8);
4608 current->HSyncEnd = (E * 8) + (F * 8) + (C * 8);
4609 current->HTotal = (E * 8) + (F * 8) + (C * 8) + (D * 8);
4610
4611 }
4612
4613#ifdef TWDEBUG
4614 xf86DrvMsg(0, X_INFO,
4615 "H: A %d B %d C %d D %d E %d F %d HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
4616 A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
4617#endif 4148#endif
4618 4149
4619 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[13]; 4150 /* Vertical */
4620 /* inSISIDXREG(SISSR, 0x0A, sr_data); */ 4151 sr_data = crdata[13];
4621 4152 cr_data = crdata[7];
4622 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[6]; 4153
4623 /* inSISIDXREG(SISCR, 0x06, cr_data); */ 4154 /* Vertical total */
4624 4155 VT = crdata[6] |
4625 cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[7]; 4156 ((unsigned short)(cr_data & 0x01) << 8) |
4626 /* inSISIDXREG(SISCR, 0x07, cr_data2); */ 4157 ((unsigned short)(cr_data & 0x20) << 4) |
4627 4158 ((unsigned short)(sr_data & 0x01) << 10);
4628 /* Vertical total */ 4159 A = VT + 2;
4629 VT = (cr_data & 0xFF) | 4160
4630 ((unsigned short) (cr_data2 & 0x01) << 8) | 4161 /* Vertical display enable end */
4631 ((unsigned short)(cr_data2 & 0x20) << 4) | 4162 VDE = crdata[10] |
4632 ((unsigned short) (sr_data & 0x01) << 10); 4163 ((unsigned short)(cr_data & 0x02) << 7) |
4633 A = VT + 2; 4164 ((unsigned short)(cr_data & 0x40) << 3) |
4634 4165 ((unsigned short)(sr_data & 0x02) << 9);
4635 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[10]; 4166 E = VDE + 1;
4636 /* inSISIDXREG(SISCR, 0x12, cr_data); */ 4167
4637 4168 /* Vertical retrace (=sync) start */
4638 /* Vertical display enable end */ 4169 VRS = crdata[8] |
4639 VDE = (cr_data & 0xff) | 4170 ((unsigned short)(cr_data & 0x04) << 6) |
4640 ((unsigned short) (cr_data2 & 0x02) << 7) | 4171 ((unsigned short)(cr_data & 0x80) << 2) |
4641 ((unsigned short) (cr_data2 & 0x40) << 3) | 4172 ((unsigned short)(sr_data & 0x08) << 7);
4642 ((unsigned short) (sr_data & 0x02) << 9); 4173 F = VRS + 1 - E;
4643 E = VDE + 1; 4174
4644 4175 cr_data2 = (crdata[16] & 0x01) << 5;
4645 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[8]; 4176
4646 /* inSISIDXREG(SISCR, 0x10, cr_data); */ 4177 /* Vertical blank start */
4647 4178 VBS = crdata[11] |
4648 /* Vertical retrace (=sync) start */ 4179 ((unsigned short)(cr_data & 0x08) << 5) |
4649 VRS = (cr_data & 0xff) | 4180 ((unsigned short)(cr_data2 & 0x20) << 4) |
4650 ((unsigned short) (cr_data2 & 0x04) << 6) | 4181 ((unsigned short)(sr_data & 0x04) << 8);
4651 ((unsigned short) (cr_data2 & 0x80) << 2) | 4182
4652 ((unsigned short) (sr_data & 0x08) << 7); 4183 /* Vertical blank end */
4653 F = VRS + 1 - E; 4184 VBE = crdata[12] | ((unsigned short)(sr_data & 0x10) << 4);
4654 4185 temp = VBE - ((E - 1) & 511);
4655 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[11]; 4186 B = (temp > 0) ? temp : (temp + 512);
4656 /* inSISIDXREG(SISCR, 0x15, cr_data); */ 4187
4657 4188 /* Vertical retrace (=sync) end */
4658 cr_data3 = (pSiS->SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5; 4189 VRE = (crdata[9] & 0x0f) | ((sr_data & 0x20) >> 1);
4659 /* inSISIDXREG(SISCR, 0x09, cr_data3); */ 4190 temp = VRE - ((E + F - 1) & 31);
4660 4191 C = (temp > 0) ? temp : (temp + 32);
4661 /* Vertical blank start */ 4192
4662 VBS = (cr_data & 0xff) | 4193 D = B - F - C;
4663 ((unsigned short) (cr_data2 & 0x08) << 5) | 4194
4664 ((unsigned short) (cr_data3 & 0x20) << 4) | 4195#ifdef SIS_XORG_XF86
4665 ((unsigned short) (sr_data & 0x04) << 8); 4196 current->VDisplay = VDE + 1;
4666 4197 current->VSyncStart = VRS + 1;
4667 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[12]; 4198 current->VSyncEnd = ((VRS & ~0x1f) | VRE) + 1;
4668 /* inSISIDXREG(SISCR, 0x16, cr_data); */ 4199 if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
4669 4200 current->VTotal = E + D + C + F;
4670 /* Vertical blank end */
4671 VBE = (cr_data & 0xff) |
4672 ((unsigned short) (sr_data & 0x10) << 4);
4673 temp = VBE - ((E - 1) & 511);
4674 B = (temp > 0) ? temp : (temp + 512);
4675
4676 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[9];
4677 /* inSISIDXREG(SISCR, 0x11, cr_data); */
4678
4679 /* Vertical retrace (=sync) end */
4680 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
4681 temp = VRE - ((E + F - 1) & 31);
4682 C = (temp > 0) ? temp : (temp + 32);
4683
4684 D = B - F - C;
4685
4686 current->VDisplay = VDE + 1;
4687 current->VSyncStart = VRS + 1;
4688 current->VSyncEnd = ((VRS & ~0x1f) | VRE) + 1;
4689 if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
4690 current->VTotal = E + D + C + F;
4691
4692#if 0 4201#if 0
4693 current->VDisplay = E; 4202 current->VDisplay = E;
4694 current->VSyncStart = E + D; 4203 current->VSyncStart = E + D;
4695 current->VSyncEnd = E + D + C; 4204 current->VSyncEnd = E + D + C;
4696 current->VTotal = E + D + C + F; 4205 current->VTotal = E + D + C + F;
4697#endif 4206#endif
4698
4699#ifdef TWDEBUG 4207#ifdef TWDEBUG
4700 xf86DrvMsg(0, X_INFO, 4208 xf86DrvMsg(0, X_INFO,
4701 "V: A %d B %d C %d D %d E %d F %d VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n", 4209 "V: A %d B %d C %d D %d E %d F %d VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n",
4702 A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE); 4210 A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE);
4703#endif 4211#endif
4704
4705 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x4000)
4706 current->Flags |= V_NHSYNC;
4707 else
4708 current->Flags |= V_PHSYNC;
4709
4710 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x8000)
4711 current->Flags |= V_NVSYNC;
4712 else
4713 current->Flags |= V_PVSYNC;
4714
4715 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x0080)
4716 current->Flags |= V_INTERLACE;
4717
4718 j = 0;
4719 while(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
4720 if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
4721 pSiS->SiS_Pr->SiS_RefIndex[i].ModeID) {
4722 if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
4723 current->Flags |= V_DBLSCAN;
4724 }
4725 break;
4726 }
4727 j++;
4728 }
4729
4730 if(current->Flags & V_INTERLACE) {
4731 current->VDisplay <<= 1;
4732 current->VSyncStart <<= 1;
4733 current->VSyncEnd <<= 1;
4734 current->VTotal <<= 1;
4735 current->VTotal |= 1;
4736 }
4737 if(current->Flags & V_DBLSCAN) {
4738 current->Clock >>= 1;
4739 current->VDisplay >>= 1;
4740 current->VSyncStart >>= 1;
4741 current->VSyncEnd >>= 1;
4742 current->VTotal >>= 1;
4743 }
4744
4745#ifdef TWDEBUG
4746 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
4747 "Built-in: %s %.2f %d %d %d %d %d %d %d %d\n",
4748 current->name, (float)current->Clock / 1000,
4749 current->HDisplay, current->HSyncStart, current->HSyncEnd, current->HTotal,
4750 current->VDisplay, current->VSyncStart, current->VSyncEnd, current->VTotal);
4751#else
4752 (void)VBS; (void)HBS; (void)A;
4753#endif 4212#endif
4754 4213#ifdef SIS_LINUX_KERNEL
4755 i++; 4214 if(writeres) var->yres = yres = E;
4756 } 4215 var->upper_margin = D;
4757 4216 var->lower_margin = F;
4758 /* Add non-standard LCD modes for panel's detailed timings */ 4217 var->vsync_len = C;
4759
4760 if(!includelcdmodes) return first;
4761
4762 if(pSiS->SiS_Pr->CP_Vendor) {
4763 xf86DrvMsg(0, X_INFO, "Checking database for vendor %x, product %x\n",
4764 pSiS->SiS_Pr->CP_Vendor, pSiS->SiS_Pr->CP_Product);
4765 }
4766
4767 i = 0;
4768 while((!done) && (SiS_PlasmaTable[i].vendor) && (pSiS->SiS_Pr->CP_Vendor)) {
4769
4770 if(SiS_PlasmaTable[i].vendor == pSiS->SiS_Pr->CP_Vendor) {
4771
4772 for(j=0; j<SiS_PlasmaTable[i].productnum; j++) {
4773
4774 if(SiS_PlasmaTable[i].product[j] == pSiS->SiS_Pr->CP_Product) {
4775
4776 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
4777 "Identified %s panel, adding specific modes\n",
4778 SiS_PlasmaTable[i].plasmaname);
4779
4780 for(k=0; k<SiS_PlasmaTable[i].modenum; k++) {
4781
4782 if(isfordvi) {
4783 if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x80)) continue;
4784 } else {
4785 if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x40)) continue;
4786 }
4787
4788 l = SiS_PlasmaTable[i].plasmamodes[k] & 0x3f;
4789
4790 if(pSiS->VBFlags & (VB_301|VB_301B|VB_302B|VB_301LV)) {
4791 if(isfordvi) {
4792 if(SiS_PlasmaMode[l].VDisplay > 1024) continue;
4793 }
4794 }
4795
4796 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4797
4798 memset(new, 0, sizeof(DisplayModeRec));
4799 if(!(new->name = xalloc(12))) {
4800 xfree(new);
4801 return first;
4802 }
4803 if(!first) first = new;
4804 if(current) {
4805 current->next = new;
4806 new->prev = current;
4807 }
4808
4809 current = new;
4810
4811 pSiS->AddedPlasmaModes = TRUE;
4812
4813 strcpy(current->name, SiS_PlasmaMode[l].name);
4814 /* sprintf(current->name, "%dx%d", SiS_PlasmaMode[l].HDisplay,
4815 SiS_PlasmaMode[l].VDisplay); */
4816
4817 current->status = MODE_OK;
4818
4819 current->type = M_T_BUILTIN;
4820
4821 current->Clock = SiS_PlasmaMode[l].clock;
4822 current->SynthClock = current->Clock;
4823
4824 current->HDisplay = SiS_PlasmaMode[l].HDisplay;
4825 current->HSyncStart = current->HDisplay + SiS_PlasmaMode[l].HFrontPorch;
4826 current->HSyncEnd = current->HSyncStart + SiS_PlasmaMode[l].HSyncWidth;
4827 current->HTotal = SiS_PlasmaMode[l].HTotal;
4828
4829 current->VDisplay = SiS_PlasmaMode[l].VDisplay;
4830 current->VSyncStart = current->VDisplay + SiS_PlasmaMode[l].VFrontPorch;
4831 current->VSyncEnd = current->VSyncStart + SiS_PlasmaMode[l].VSyncWidth;
4832 current->VTotal = SiS_PlasmaMode[l].VTotal;
4833
4834 current->CrtcHDisplay = current->HDisplay;
4835 current->CrtcHBlankStart = current->HSyncStart;
4836 current->CrtcHSyncStart = current->HSyncStart;
4837 current->CrtcHSyncEnd = current->HSyncEnd;
4838 current->CrtcHBlankEnd = current->HSyncEnd;
4839 current->CrtcHTotal = current->HTotal;
4840
4841 current->CrtcVDisplay = current->VDisplay;
4842 current->CrtcVBlankStart = current->VSyncStart;
4843 current->CrtcVSyncStart = current->VSyncStart;
4844 current->CrtcVSyncEnd = current->VSyncEnd;
4845 current->CrtcVBlankEnd = current->VSyncEnd;
4846 current->CrtcVTotal = current->VTotal;
4847
4848 if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_HSYNCP)
4849 current->Flags |= V_PHSYNC;
4850 else
4851 current->Flags |= V_NHSYNC;
4852
4853 if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_VSYNCP)
4854 current->Flags |= V_PVSYNC;
4855 else
4856 current->Flags |= V_NVSYNC;
4857
4858 if(current->HDisplay > pSiS->LCDwidth)
4859 pSiS->LCDwidth = pSiS->SiS_Pr->CP_MaxX = current->HDisplay;
4860 if(current->VDisplay > pSiS->LCDheight)
4861 pSiS->LCDheight = pSiS->SiS_Pr->CP_MaxY = current->VDisplay;
4862
4863 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
4864 "\tAdding \"%s\" to list of built-in modes\n", current->name);
4865
4866 }
4867 done = TRUE;
4868 break;
4869 }
4870 }
4871 }
4872
4873 i++;
4874
4875 }
4876
4877 if(pSiS->SiS_Pr->CP_HaveCustomData) {
4878
4879 for(i=0; i<7; i++) {
4880
4881 if(pSiS->SiS_Pr->CP_DataValid[i]) {
4882
4883 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4884
4885 memset(new, 0, sizeof(DisplayModeRec));
4886 if(!(new->name = xalloc(10))) {
4887 xfree(new);
4888 return first;
4889 }
4890 if(!first) first = new;
4891 if(current) {
4892 current->next = new;
4893 new->prev = current;
4894 }
4895
4896 current = new;
4897
4898 sprintf(current->name, "%dx%d", pSiS->SiS_Pr->CP_HDisplay[i],
4899 pSiS->SiS_Pr->CP_VDisplay[i]);
4900
4901 current->status = MODE_OK;
4902
4903 current->type = M_T_BUILTIN;
4904
4905 current->Clock = pSiS->SiS_Pr->CP_Clock[i];
4906 current->SynthClock = current->Clock;
4907
4908 current->HDisplay = pSiS->SiS_Pr->CP_HDisplay[i];
4909 current->HSyncStart = pSiS->SiS_Pr->CP_HSyncStart[i];
4910 current->HSyncEnd = pSiS->SiS_Pr->CP_HSyncEnd[i];
4911 current->HTotal = pSiS->SiS_Pr->CP_HTotal[i];
4912
4913 current->VDisplay = pSiS->SiS_Pr->CP_VDisplay[i];
4914 current->VSyncStart = pSiS->SiS_Pr->CP_VSyncStart[i];
4915 current->VSyncEnd = pSiS->SiS_Pr->CP_VSyncEnd[i];
4916 current->VTotal = pSiS->SiS_Pr->CP_VTotal[i];
4917
4918 current->CrtcHDisplay = current->HDisplay;
4919 current->CrtcHBlankStart = pSiS->SiS_Pr->CP_HBlankStart[i];
4920 current->CrtcHSyncStart = current->HSyncStart;
4921 current->CrtcHSyncEnd = current->HSyncEnd;
4922 current->CrtcHBlankEnd = pSiS->SiS_Pr->CP_HBlankEnd[i];
4923 current->CrtcHTotal = current->HTotal;
4924
4925 current->CrtcVDisplay = current->VDisplay;
4926 current->CrtcVBlankStart = pSiS->SiS_Pr->CP_VBlankStart[i];
4927 current->CrtcVSyncStart = current->VSyncStart;
4928 current->CrtcVSyncEnd = current->VSyncEnd;
4929 current->CrtcVBlankEnd = pSiS->SiS_Pr->CP_VBlankEnd[i];
4930 current->CrtcVTotal = current->VTotal;
4931
4932 if(pSiS->SiS_Pr->CP_SyncValid[i]) {
4933 if(pSiS->SiS_Pr->CP_HSync_P[i])
4934 current->Flags |= V_PHSYNC;
4935 else
4936 current->Flags |= V_NHSYNC;
4937
4938 if(pSiS->SiS_Pr->CP_VSync_P[i])
4939 current->Flags |= V_PVSYNC;
4940 else
4941 current->Flags |= V_NVSYNC;
4942 } else {
4943 /* No sync data? Use positive sync... */
4944 current->Flags |= V_PHSYNC;
4945 current->Flags |= V_PVSYNC;
4946 }
4947 }
4948 }
4949 }
4950
4951 return first;
4952
4953}
4954
4955/* Translate a mode number into the VESA pendant */
4956int
4957SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber)
4958{
4959 SISPtr pSiS = SISPTR(pScrn);
4960 int i = 0;
4961
4962 /* Initialize our pointers */
4963 if(pSiS->VGAEngine == SIS_300_VGA) {
4964#ifdef SIS300
4965 InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4966#else
4967 return -1;
4968#endif
4969 } else if(pSiS->VGAEngine == SIS_315_VGA) {
4970#ifdef SIS315H
4971 InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4972#else
4973 return -1;
4974#endif 4218#endif
4975 } else return -1;
4976
4977 if(modenumber <= 0x13) return modenumber;
4978 4219
4979#ifdef SIS315H 4220 if((xres == 320) && ((yres == 200) || (yres == 240))) {
4980 if(pSiS->ROM661New) { 4221 /* Terrible hack, but correct CRTC data for
4981 while(SiS_EModeIDTable661[i].Ext_ModeID != 0xff) { 4222 * these modes only produces a black screen...
4982 if(SiS_EModeIDTable661[i].Ext_ModeID == modenumber) { 4223 * (HRE is 0, leading into a too large C and
4983 return (int)SiS_EModeIDTable661[i].Ext_VESAID; 4224 * a negative D. The CRT controller does not
4984 } 4225 * seem to like correcting HRE to 50)
4985 i++; 4226 */
4986 } 4227#ifdef SIS_XORG_XF86
4987 } else { 4228 current->HDisplay = 320;
4229 current->HSyncStart = 328;
4230 current->HSyncEnd = 376;
4231 current->HTotal = 400;
4988#endif 4232#endif
4989 while(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID != 0xff) { 4233#ifdef SIS_LINUX_KERNEL
4990 if(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID == modenumber) { 4234 var->left_margin = (400 - 376);
4991 return (int)pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_VESAID; 4235 var->right_margin = (328 - 320);
4992 } 4236 var->hsync_len = (376 - 328);
4993 i++;
4994 }
4995#ifdef SIS315H
4996 }
4997#endif 4237#endif
4998 return -1;
4999}
5000 4238
5001/* Translate a new BIOS mode number into the driver's pendant */
5002int
5003SiSTranslateToOldMode(int modenumber)
5004{
5005#ifdef SIS315H
5006 int i = 0;
5007
5008 while(SiS_EModeIDTable661[i].Ext_ModeID != 0xff) {
5009 if(SiS_EModeIDTable661[i].Ext_ModeID == modenumber) {
5010 if(SiS_EModeIDTable661[i].Ext_MyModeID)
5011 return (int)SiS_EModeIDTable661[i].Ext_MyModeID;
5012 else
5013 return modenumber;
5014 }
5015 i++;
5016 } 4239 }
5017#endif
5018 return modenumber;
5019}
5020
5021#endif /* Xfree86 */
5022
5023#ifdef LINUX_KERNEL
5024int
5025sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5026 unsigned char modeno, unsigned char rateindex)
5027{
5028 USHORT ModeNo = modeno;
5029 USHORT ModeIdIndex = 0, ClockIndex = 0;
5030 USHORT RefreshRateTableIndex = 0;
5031 int Clock;
5032
5033 if(HwInfo->jChipType < SIS_315H) {
5034#ifdef SIS300
5035 InitTo300Pointer(SiS_Pr, HwInfo);
5036#else
5037 return 65 * 1000;
5038#endif
5039 } else {
5040#ifdef SIS315H
5041 InitTo310Pointer(SiS_Pr, HwInfo);
5042#else
5043 return 65 * 1000;
5044#endif
5045 }
5046
5047 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {;
5048 printk(KERN_ERR "Could not find mode %x\n", ModeNo);
5049 return 65 * 1000;
5050 }
5051
5052 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5053 RefreshRateTableIndex += (rateindex - 1);
5054 ClockIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
5055 if(HwInfo->jChipType < SIS_315H) {
5056 ClockIndex &= 0x3F;
5057 }
5058 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
5059
5060 return(Clock);
5061}
5062
5063BOOLEAN
5064sisfb_gettotalfrommode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5065 unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex)
5066{
5067 USHORT ModeNo = modeno;
5068 USHORT ModeIdIndex = 0, CRT1Index = 0;
5069 USHORT RefreshRateTableIndex = 0;
5070 unsigned char sr_data, cr_data, cr_data2;
5071
5072 if(HwInfo->jChipType < SIS_315H) {
5073#ifdef SIS300
5074 InitTo300Pointer(SiS_Pr, HwInfo);
5075#else
5076 return FALSE;
5077#endif
5078 } else {
5079#ifdef SIS315H
5080 InitTo310Pointer(SiS_Pr, HwInfo);
5081#else
5082 return FALSE;
5083#endif
5084 }
5085
5086 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
5087
5088 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5089 RefreshRateTableIndex += (rateindex - 1);
5090 CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
5091
5092 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
5093 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
5094 *htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
5095 4240
5096 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
5097 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
5098 cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
5099 *vtotal = ((cr_data & 0xFF) |
5100 ((unsigned short)(cr_data2 & 0x01) << 8) |
5101 ((unsigned short)(cr_data2 & 0x20) << 4) |
5102 ((unsigned short)(sr_data & 0x01) << 10)) + 2;
5103
5104 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & InterlaceMode)
5105 *vtotal *= 2;
5106
5107 return TRUE;
5108} 4241}
5109 4242
5110int
5111sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5112 unsigned char modeno, unsigned char rateindex,
5113 struct fb_var_screeninfo *var)
5114{
5115 USHORT ModeNo = modeno;
5116 USHORT ModeIdIndex = 0, index = 0;
5117 USHORT RefreshRateTableIndex = 0;
5118 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
5119 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
5120 unsigned char sr_data, cr_data, cr_data2, cr_data3;
5121 int A, B, C, D, E, F, temp, j;
5122
5123 if(HwInfo->jChipType < SIS_315H) {
5124#ifdef SIS300
5125 InitTo300Pointer(SiS_Pr, HwInfo);
5126#else
5127 return 0;
5128#endif
5129 } else {
5130#ifdef SIS315H
5131 InitTo310Pointer(SiS_Pr, HwInfo);
5132#else
5133 return 0;
5134#endif
5135 }
5136
5137 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
5138
5139 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5140 RefreshRateTableIndex += (rateindex - 1);
5141 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
5142
5143 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[14];
5144
5145 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[0];
5146
5147 /* Horizontal total */
5148 HT = (cr_data & 0xff) |
5149 ((unsigned short) (sr_data & 0x03) << 8);
5150 A = HT + 5;
5151
5152 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[1];
5153
5154 /* Horizontal display enable end */
5155 HDE = (cr_data & 0xff) |
5156 ((unsigned short) (sr_data & 0x0C) << 6);
5157 E = HDE + 1;
5158
5159 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[4];
5160
5161 /* Horizontal retrace (=sync) start */
5162 HRS = (cr_data & 0xff) |
5163 ((unsigned short) (sr_data & 0xC0) << 2);
5164 F = HRS - E - 3;
5165
5166 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[2];
5167
5168 /* Horizontal blank start */
5169 HBS = (cr_data & 0xff) |
5170 ((unsigned short) (sr_data & 0x30) << 4);
5171
5172 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[15];
5173
5174 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[3];
5175
5176 cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[5];
5177
5178 /* Horizontal blank end */
5179 HBE = (cr_data & 0x1f) |
5180 ((unsigned short) (cr_data2 & 0x80) >> 2) |
5181 ((unsigned short) (sr_data & 0x03) << 6);
5182
5183 /* Horizontal retrace (=sync) end */
5184 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
5185 4243
5186 temp = HBE - ((E - 1) & 255);
5187 B = (temp > 0) ? temp : (temp + 256);
5188 4244
5189 temp = HRE - ((E + F + 3) & 63);
5190 C = (temp > 0) ? temp : (temp + 64);
5191
5192 D = B - F - C;
5193
5194 if((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes == 320) &&
5195 ((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 200) ||
5196 (SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 240))) {
5197
5198 /* Terrible hack, but the correct CRTC data for
5199 * these modes only produces a black screen...
5200 */
5201 var->left_margin = (400 - 376);
5202 var->right_margin = (328 - 320);
5203 var->hsync_len = (376 - 328);
5204
5205 } else {
5206
5207 var->left_margin = D * 8;
5208 var->right_margin = F * 8;
5209 var->hsync_len = C * 8;
5210
5211 }
5212
5213 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[13];
5214
5215 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[6];
5216
5217 cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[7];
5218
5219 /* Vertical total */
5220 VT = (cr_data & 0xFF) |
5221 ((unsigned short) (cr_data2 & 0x01) << 8) |
5222 ((unsigned short)(cr_data2 & 0x20) << 4) |
5223 ((unsigned short) (sr_data & 0x01) << 10);
5224 A = VT + 2;
5225
5226 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[10];
5227
5228 /* Vertical display enable end */
5229 VDE = (cr_data & 0xff) |
5230 ((unsigned short) (cr_data2 & 0x02) << 7) |
5231 ((unsigned short) (cr_data2 & 0x40) << 3) |
5232 ((unsigned short) (sr_data & 0x02) << 9);
5233 E = VDE + 1;
5234
5235 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[8];
5236
5237 /* Vertical retrace (=sync) start */
5238 VRS = (cr_data & 0xff) |
5239 ((unsigned short) (cr_data2 & 0x04) << 6) |
5240 ((unsigned short) (cr_data2 & 0x80) << 2) |
5241 ((unsigned short) (sr_data & 0x08) << 7);
5242 F = VRS + 1 - E;
5243
5244 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[11];
5245
5246 cr_data3 = (SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
5247
5248 /* Vertical blank start */
5249 VBS = (cr_data & 0xff) |
5250 ((unsigned short) (cr_data2 & 0x08) << 5) |
5251 ((unsigned short) (cr_data3 & 0x20) << 4) |
5252 ((unsigned short) (sr_data & 0x04) << 8);
5253
5254 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[12];
5255
5256 /* Vertical blank end */
5257 VBE = (cr_data & 0xff) |
5258 ((unsigned short) (sr_data & 0x10) << 4);
5259 temp = VBE - ((E - 1) & 511);
5260 B = (temp > 0) ? temp : (temp + 512);
5261
5262 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[9];
5263
5264 /* Vertical retrace (=sync) end */
5265 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
5266 temp = VRE - ((E + F - 1) & 31);
5267 C = (temp > 0) ? temp : (temp + 32);
5268
5269 D = B - F - C;
5270
5271 var->upper_margin = D;
5272 var->lower_margin = F;
5273 var->vsync_len = C;
5274
5275 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
5276 var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
5277 else
5278 var->sync |= FB_SYNC_VERT_HIGH_ACT;
5279
5280 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
5281 var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
5282 else
5283 var->sync |= FB_SYNC_HOR_HIGH_ACT;
5284
5285 var->vmode = FB_VMODE_NONINTERLACED;
5286 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
5287 var->vmode = FB_VMODE_INTERLACED;
5288 else {
5289 j = 0;
5290 while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
5291 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
5292 SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].ModeID) {
5293 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
5294 var->vmode = FB_VMODE_DOUBLE;
5295 }
5296 break;
5297 }
5298 j++;
5299 }
5300 }
5301
5302 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
5303#if 0 /* Do this? */
5304 var->upper_margin <<= 1;
5305 var->lower_margin <<= 1;
5306 var->vsync_len <<= 1;
5307#endif
5308 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
5309 var->upper_margin >>= 1;
5310 var->lower_margin >>= 1;
5311 var->vsync_len >>= 1;
5312 }
5313
5314 return 1;
5315}
5316
5317#endif
5318 4245
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-11 16:35:38 -0500