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path: root/drivers/video/riva/rivafb-i2c.c
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Diffstat (limited to 'drivers/video/riva/rivafb-i2c.c')
-rw-r--r--drivers/video/riva/rivafb-i2c.c214
1 files changed, 214 insertions, 0 deletions
diff --git a/drivers/video/riva/rivafb-i2c.c b/drivers/video/riva/rivafb-i2c.c
new file mode 100644
index 000000000000..da1334dfd51d
--- /dev/null
+++ b/drivers/video/riva/rivafb-i2c.c
@@ -0,0 +1,214 @@
1/*
2 * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c
3 *
4 * Maintained by Ani Joshi <ajoshi@shell.unixbox.com>
5 *
6 * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
7 *
8 * Based on radeonfb-i2c.c
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
13 */
14
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/sched.h>
19#include <linux/delay.h>
20#include <linux/pci.h>
21#include <linux/fb.h>
22#include <linux/jiffies.h>
23
24#include <asm/io.h>
25
26#include "rivafb.h"
27#include "../edid.h"
28
29#define RIVA_DDC 0x50
30
31static void riva_gpio_setscl(void* data, int state)
32{
33 struct riva_i2c_chan *chan = (struct riva_i2c_chan *)data;
34 struct riva_par *par = chan->par;
35 u32 val;
36
37 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
38 val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
39
40 if (state)
41 val |= 0x20;
42 else
43 val &= ~0x20;
44
45 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
46 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
47}
48
49static void riva_gpio_setsda(void* data, int state)
50{
51 struct riva_i2c_chan *chan = (struct riva_i2c_chan *)data;
52 struct riva_par *par = chan->par;
53 u32 val;
54
55 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
56 val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
57
58 if (state)
59 val |= 0x10;
60 else
61 val &= ~0x10;
62
63 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
64 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
65}
66
67static int riva_gpio_getscl(void* data)
68{
69 struct riva_i2c_chan *chan = (struct riva_i2c_chan *)data;
70 struct riva_par *par = chan->par;
71 u32 val = 0;
72
73 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
74 if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x04)
75 val = 1;
76
77 val = VGA_RD08(par->riva.PCIO, 0x3d5);
78
79 return val;
80}
81
82static int riva_gpio_getsda(void* data)
83{
84 struct riva_i2c_chan *chan = (struct riva_i2c_chan *)data;
85 struct riva_par *par = chan->par;
86 u32 val = 0;
87
88 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
89 if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x08)
90 val = 1;
91
92 return val;
93}
94
95#define I2C_ALGO_RIVA 0x0e0000
96static int riva_setup_i2c_bus(struct riva_i2c_chan *chan, const char *name)
97{
98 int rc;
99
100 strcpy(chan->adapter.name, name);
101 chan->adapter.owner = THIS_MODULE;
102 chan->adapter.id = I2C_ALGO_RIVA;
103 chan->adapter.algo_data = &chan->algo;
104 chan->adapter.dev.parent = &chan->par->pdev->dev;
105 chan->algo.setsda = riva_gpio_setsda;
106 chan->algo.setscl = riva_gpio_setscl;
107 chan->algo.getsda = riva_gpio_getsda;
108 chan->algo.getscl = riva_gpio_getscl;
109 chan->algo.udelay = 40;
110 chan->algo.timeout = msecs_to_jiffies(2);
111 chan->algo.data = chan;
112
113 i2c_set_adapdata(&chan->adapter, chan);
114
115 /* Raise SCL and SDA */
116 riva_gpio_setsda(chan, 1);
117 riva_gpio_setscl(chan, 1);
118 udelay(20);
119
120 rc = i2c_bit_add_bus(&chan->adapter);
121 if (rc == 0)
122 dev_dbg(&chan->par->pdev->dev, "I2C bus %s registered.\n", name);
123 else {
124 dev_warn(&chan->par->pdev->dev,
125 "Failed to register I2C bus %s.\n", name);
126 chan->par = NULL;
127 }
128
129 return rc;
130}
131
132void riva_create_i2c_busses(struct riva_par *par)
133{
134 par->bus = 3;
135
136 par->chan[0].par = par;
137 par->chan[1].par = par;
138 par->chan[2].par = par;
139
140 par->chan[0].ddc_base = 0x3e;
141 par->chan[1].ddc_base = 0x36;
142 par->chan[2].ddc_base = 0x50;
143 riva_setup_i2c_bus(&par->chan[0], "BUS1");
144 riva_setup_i2c_bus(&par->chan[1], "BUS2");
145 riva_setup_i2c_bus(&par->chan[2], "BUS3");
146}
147
148void riva_delete_i2c_busses(struct riva_par *par)
149{
150 if (par->chan[0].par)
151 i2c_bit_del_bus(&par->chan[0].adapter);
152 par->chan[0].par = NULL;
153
154 if (par->chan[1].par)
155 i2c_bit_del_bus(&par->chan[1].adapter);
156 par->chan[1].par = NULL;
157
158 if (par->chan[2].par)
159 i2c_bit_del_bus(&par->chan[2].adapter);
160 par->chan[2].par = NULL;
161}
162
163static u8 *riva_do_probe_i2c_edid(struct riva_i2c_chan *chan)
164{
165 u8 start = 0x0;
166 struct i2c_msg msgs[] = {
167 {
168 .addr = RIVA_DDC,
169 .len = 1,
170 .buf = &start,
171 }, {
172 .addr = RIVA_DDC,
173 .flags = I2C_M_RD,
174 .len = EDID_LENGTH,
175 },
176 };
177 u8 *buf;
178
179 if (!chan->par)
180 return NULL;
181
182 buf = kmalloc(EDID_LENGTH, GFP_KERNEL);
183 if (!buf) {
184 dev_warn(&chan->par->pdev->dev, "Out of memory!\n");
185 return NULL;
186 }
187 msgs[1].buf = buf;
188
189 if (i2c_transfer(&chan->adapter, msgs, 2) == 2)
190 return buf;
191 dev_dbg(&chan->par->pdev->dev, "Unable to read EDID block.\n");
192 kfree(buf);
193 return NULL;
194}
195
196int riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid)
197{
198 u8 *edid = NULL;
199 int i;
200
201 for (i = 0; i < 3; i++) {
202 /* Do the real work */
203 edid = riva_do_probe_i2c_edid(&par->chan[conn-1]);
204 if (edid)
205 break;
206 }
207 if (out_edid)
208 *out_edid = edid;
209 if (!edid)
210 return 1;
211
212 return 0;
213}
214