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Diffstat (limited to 'drivers/video/pxafb.h')
-rw-r--r--drivers/video/pxafb.h70
1 files changed, 50 insertions, 20 deletions
diff --git a/drivers/video/pxafb.h b/drivers/video/pxafb.h
index d920b8a14c35..8238dc826429 100644
--- a/drivers/video/pxafb.h
+++ b/drivers/video/pxafb.h
@@ -21,14 +21,6 @@
21 * for more details. 21 * for more details.
22 */ 22 */
23 23
24/* Shadows for LCD controller registers */
25struct pxafb_lcd_reg {
26 unsigned int lccr0;
27 unsigned int lccr1;
28 unsigned int lccr2;
29 unsigned int lccr3;
30};
31
32/* PXA LCD DMA descriptor */ 24/* PXA LCD DMA descriptor */
33struct pxafb_dma_descriptor { 25struct pxafb_dma_descriptor {
34 unsigned int fdadr; 26 unsigned int fdadr;
@@ -37,11 +29,49 @@ struct pxafb_dma_descriptor {
37 unsigned int ldcmd; 29 unsigned int ldcmd;
38}; 30};
39 31
32enum {
33 PAL_NONE = -1,
34 PAL_BASE = 0,
35 PAL_OV1 = 1,
36 PAL_OV2 = 2,
37 PAL_MAX,
38};
39
40enum {
41 DMA_BASE = 0,
42 DMA_UPPER = 0,
43 DMA_LOWER = 1,
44 DMA_OV1 = 1,
45 DMA_OV2_Y = 2,
46 DMA_OV2_Cb = 3,
47 DMA_OV2_Cr = 4,
48 DMA_CURSOR = 5,
49 DMA_CMD = 6,
50 DMA_MAX,
51};
52
53/* maximum palette size - 256 entries, each 4 bytes long */
54#define PALETTE_SIZE (256 * 4)
55#define CMD_BUFF_SIZE (1024 * 50)
56
57struct pxafb_dma_buff {
58 unsigned char palette[PAL_MAX * PALETTE_SIZE];
59 uint16_t cmd_buff[CMD_BUFF_SIZE];
60 struct pxafb_dma_descriptor pal_desc[PAL_MAX];
61 struct pxafb_dma_descriptor dma_desc[DMA_MAX];
62};
63
40struct pxafb_info { 64struct pxafb_info {
41 struct fb_info fb; 65 struct fb_info fb;
42 struct device *dev; 66 struct device *dev;
43 struct clk *clk; 67 struct clk *clk;
44 68
69 void __iomem *mmio_base;
70
71 struct pxafb_dma_buff *dma_buff;
72 dma_addr_t dma_buff_phys;
73 dma_addr_t fdadr[DMA_MAX];
74
45 /* 75 /*
46 * These are the addresses we mapped 76 * These are the addresses we mapped
47 * the framebuffer memory region to. 77 * the framebuffer memory region to.
@@ -55,19 +85,8 @@ struct pxafb_info {
55 u_char * screen_cpu; /* virtual address of frame buffer */ 85 u_char * screen_cpu; /* virtual address of frame buffer */
56 dma_addr_t screen_dma; /* physical address of frame buffer */ 86 dma_addr_t screen_dma; /* physical address of frame buffer */
57 u16 * palette_cpu; /* virtual address of palette memory */ 87 u16 * palette_cpu; /* virtual address of palette memory */
58 dma_addr_t palette_dma; /* physical address of palette memory */
59 u_int palette_size; 88 u_int palette_size;
60 89 ssize_t video_offset;
61 /* DMA descriptors */
62 struct pxafb_dma_descriptor * dmadesc_fblow_cpu;
63 dma_addr_t dmadesc_fblow_dma;
64 struct pxafb_dma_descriptor * dmadesc_fbhigh_cpu;
65 dma_addr_t dmadesc_fbhigh_dma;
66 struct pxafb_dma_descriptor * dmadesc_palette_cpu;
67 dma_addr_t dmadesc_palette_dma;
68
69 dma_addr_t fdadr0;
70 dma_addr_t fdadr1;
71 90
72 u_int lccr0; 91 u_int lccr0;
73 u_int lccr3; 92 u_int lccr3;
@@ -81,6 +100,7 @@ struct pxafb_info {
81 u_int reg_lccr2; 100 u_int reg_lccr2;
82 u_int reg_lccr3; 101 u_int reg_lccr3;
83 u_int reg_lccr4; 102 u_int reg_lccr4;
103 u_int reg_cmdcr;
84 104
85 unsigned long hsync_time; 105 unsigned long hsync_time;
86 106
@@ -90,6 +110,16 @@ struct pxafb_info {
90 wait_queue_head_t ctrlr_wait; 110 wait_queue_head_t ctrlr_wait;
91 struct work_struct task; 111 struct work_struct task;
92 112
113 struct completion disable_done;
114
115#ifdef CONFIG_FB_PXA_SMARTPANEL
116 uint16_t *smart_cmds;
117 size_t n_smart_cmds;
118 struct completion command_done;
119 struct completion refresh_done;
120 struct task_struct *smart_thread;
121#endif
122
93#ifdef CONFIG_CPU_FREQ 123#ifdef CONFIG_CPU_FREQ
94 struct notifier_block freq_transition; 124 struct notifier_block freq_transition;
95 struct notifier_block freq_policy; 125 struct notifier_block freq_policy;