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diff --git a/drivers/video/pvr2fb.c b/drivers/video/pvr2fb.c
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1/* drivers/video/pvr2fb.c
2 *
3 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega
4 * Dreamcast.
5 *
6 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>
7 * Copyright (c) 2001, 2002, 2003, 2004, 2005 Paul Mundt <lethal@linux-sh.org>
8 *
9 * This file is part of the LinuxDC project (linuxdc.sourceforge.net).
10 *
11 */
12
13/*
14 * This driver is mostly based on the excellent amifb and vfb sources. It uses
15 * an odd scheme for converting hardware values to/from framebuffer values,
16 * here are some hacked-up formulas:
17 *
18 * The Dreamcast has screen offsets from each side of its four borders and
19 * the start offsets of the display window. I used these values to calculate
20 * 'pseudo' values (think of them as placeholders) for the fb video mode, so
21 * that when it came time to convert these values back into their hardware
22 * values, I could just add mode- specific offsets to get the correct mode
23 * settings:
24 *
25 * left_margin = diwstart_h - borderstart_h;
26 * right_margin = borderstop_h - (diwstart_h + xres);
27 * upper_margin = diwstart_v - borderstart_v;
28 * lower_margin = borderstop_v - (diwstart_h + yres);
29 *
30 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
31 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
32 *
33 * Then, when it's time to convert back to hardware settings, the only
34 * constants are the borderstart_* offsets, all other values are derived from
35 * the fb video mode:
36 *
37 * // PAL
38 * borderstart_h = 116;
39 * borderstart_v = 44;
40 * ...
41 * borderstop_h = borderstart_h + hsync_total - hsync_len;
42 * ...
43 * diwstart_v = borderstart_v - upper_margin;
44 *
45 * However, in the current implementation, the borderstart values haven't had
46 * the benefit of being fully researched, so some modes may be broken.
47 */
48
49#undef DEBUG
50
51#include <linux/module.h>
52#include <linux/kernel.h>
53#include <linux/errno.h>
54#include <linux/string.h>
55#include <linux/mm.h>
56#include <linux/tty.h>
57#include <linux/slab.h>
58#include <linux/delay.h>
59#include <linux/config.h>
60#include <linux/interrupt.h>
61#include <linux/fb.h>
62#include <linux/init.h>
63#include <linux/pci.h>
64
65#ifdef CONFIG_SH_DREAMCAST
66#include <asm/machvec.h>
67#include <asm/mach/sysasic.h>
68#endif
69
70#ifdef CONFIG_SH_DMA
71#include <linux/pagemap.h>
72#include <asm/mach/dma.h>
73#include <asm/dma.h>
74#endif
75
76#ifdef CONFIG_SH_STORE_QUEUES
77#include <asm/uaccess.h>
78#include <asm/cpu/sq.h>
79#endif
80
81#ifndef PCI_DEVICE_ID_NEC_NEON250
82# define PCI_DEVICE_ID_NEC_NEON250 0x0067
83#endif
84
85/* 2D video registers */
86#define DISP_BASE par->mmio_base
87#define DISP_BRDRCOLR (DISP_BASE + 0x40)
88#define DISP_DIWMODE (DISP_BASE + 0x44)
89#define DISP_DIWADDRL (DISP_BASE + 0x50)
90#define DISP_DIWADDRS (DISP_BASE + 0x54)
91#define DISP_DIWSIZE (DISP_BASE + 0x5c)
92#define DISP_SYNCCONF (DISP_BASE + 0xd0)
93#define DISP_BRDRHORZ (DISP_BASE + 0xd4)
94#define DISP_SYNCSIZE (DISP_BASE + 0xd8)
95#define DISP_BRDRVERT (DISP_BASE + 0xdc)
96#define DISP_DIWCONF (DISP_BASE + 0xe8)
97#define DISP_DIWHSTRT (DISP_BASE + 0xec)
98#define DISP_DIWVSTRT (DISP_BASE + 0xf0)
99
100/* Pixel clocks, one for TV output, doubled for VGA output */
101#define TV_CLK 74239
102#define VGA_CLK 37119
103
104/* This is for 60Hz - the VTOTAL is doubled for interlaced modes */
105#define PAL_HTOTAL 863
106#define PAL_VTOTAL 312
107#define NTSC_HTOTAL 857
108#define NTSC_VTOTAL 262
109
110/* Supported cable types */
111enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE };
112
113/* Supported video output types */
114enum { VO_PAL, VO_NTSC, VO_VGA };
115
116/* Supported palette types */
117enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 };
118
119struct pvr2_params { unsigned int val; char *name; };
120static struct pvr2_params cables[] __initdata = {
121 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" },
122};
123
124static struct pvr2_params outputs[] __initdata = {
125 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" },
126};
127
128/*
129 * This describes the current video mode
130 */
131
132static struct pvr2fb_par {
133 unsigned int hsync_total; /* Clocks/line */
134 unsigned int vsync_total; /* Lines/field */
135 unsigned int borderstart_h;
136 unsigned int borderstop_h;
137 unsigned int borderstart_v;
138 unsigned int borderstop_v;
139 unsigned int diwstart_h; /* Horizontal offset of the display field */
140 unsigned int diwstart_v; /* Vertical offset of the display field, for
141 interlaced modes, this is the long field */
142 unsigned long disp_start; /* Address of image within VRAM */
143 unsigned char is_interlaced; /* Is the display interlaced? */
144 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */
145 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */
146
147 unsigned long mmio_base; /* MMIO base */
148} *currentpar;
149
150static struct fb_info *fb_info;
151
152static struct fb_fix_screeninfo pvr2_fix __initdata = {
153 .id = "NEC PowerVR2",
154 .type = FB_TYPE_PACKED_PIXELS,
155 .visual = FB_VISUAL_TRUECOLOR,
156 .ypanstep = 1,
157 .ywrapstep = 1,
158 .accel = FB_ACCEL_NONE,
159};
160
161static struct fb_var_screeninfo pvr2_var __initdata = {
162 .xres = 640,
163 .yres = 480,
164 .xres_virtual = 640,
165 .yres_virtual = 480,
166 .bits_per_pixel =16,
167 .red = { 11, 5, 0 },
168 .green = { 5, 6, 0 },
169 .blue = { 0, 5, 0 },
170 .activate = FB_ACTIVATE_NOW,
171 .height = -1,
172 .width = -1,
173 .vmode = FB_VMODE_NONINTERLACED,
174};
175
176static int cable_type = CT_VGA;
177static int video_output = VO_VGA;
178
179static int nopan = 0;
180static int nowrap = 1;
181
182/*
183 * We do all updating, blanking, etc. during the vertical retrace period
184 */
185static unsigned int do_vmode_full = 0; /* Change the video mode */
186static unsigned int do_vmode_pan = 0; /* Update the video mode */
187static short do_blank = 0; /* (Un)Blank the screen */
188
189static unsigned int is_blanked = 0; /* Is the screen blanked? */
190
191#ifdef CONFIG_SH_STORE_QUEUES
192static struct sq_mapping *pvr2fb_map;
193#endif
194
195#ifdef CONFIG_SH_DMA
196static unsigned int shdma = PVR2_CASCADE_CHAN;
197static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS;
198#endif
199
200/* Interface used by the world */
201
202int pvr2fb_setup(char*);
203
204static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue,
205 unsigned int transp, struct fb_info *info);
206static int pvr2fb_blank(int blank, struct fb_info *info);
207static unsigned long get_line_length(int xres_virtual, int bpp);
208static void set_color_bitfields(struct fb_var_screeninfo *var);
209static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
210static int pvr2fb_set_par(struct fb_info *info);
211static void pvr2_update_display(struct fb_info *info);
212static void pvr2_init_display(struct fb_info *info);
213static void pvr2_do_blank(void);
214static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id, struct pt_regs *fp);
215static int pvr2_init_cable(void);
216static int pvr2_get_param(const struct pvr2_params *p, const char *s,
217 int val, int size);
218static ssize_t pvr2fb_write(struct file *file, const char *buf,
219 size_t count, loff_t *ppos);
220
221static struct fb_ops pvr2fb_ops = {
222 .owner = THIS_MODULE,
223 .fb_setcolreg = pvr2fb_setcolreg,
224 .fb_blank = pvr2fb_blank,
225 .fb_check_var = pvr2fb_check_var,
226 .fb_set_par = pvr2fb_set_par,
227#ifdef CONFIG_SH_DMA
228 .fb_write = pvr2fb_write,
229#endif
230 .fb_fillrect = cfb_fillrect,
231 .fb_copyarea = cfb_copyarea,
232 .fb_imageblit = cfb_imageblit,
233 .fb_cursor = soft_cursor,
234};
235
236static struct fb_videomode pvr2_modedb[] __initdata = {
237 /*
238 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with
239 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and
240 * NTSC, so it shouldn't be a problem (I hope).
241 */
242
243 {
244 /* 640x480 @ 60Hz interlaced (NTSC) */
245 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26,
246 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP
247 }, {
248 /* 640x240 @ 60Hz (NTSC) */
249 /* XXX: Broken! Don't use... */
250 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22,
251 FB_SYNC_BROADCAST, FB_VMODE_YWRAP
252 }, {
253 /* 640x480 @ 60hz (VGA) */
254 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26,
255 0, FB_VMODE_YWRAP
256 },
257};
258
259#define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb)
260
261#define DEFMODE_NTSC 0
262#define DEFMODE_PAL 0
263#define DEFMODE_VGA 2
264
265static int defmode = DEFMODE_NTSC;
266static char *mode_option __initdata = NULL;
267
268static inline void pvr2fb_set_pal_type(unsigned int type)
269{
270 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par;
271
272 fb_writel(type, par->mmio_base + 0x108);
273}
274
275static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par,
276 unsigned int regno,
277 unsigned int val)
278{
279 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));
280}
281
282static int pvr2fb_blank(int blank, struct fb_info *info)
283{
284 do_blank = blank ? blank : -1;
285 return 0;
286}
287
288static inline unsigned long get_line_length(int xres_virtual, int bpp)
289{
290 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3);
291}
292
293static void set_color_bitfields(struct fb_var_screeninfo *var)
294{
295 switch (var->bits_per_pixel) {
296 case 16: /* RGB 565 */
297 pvr2fb_set_pal_type(PAL_RGB565);
298 var->red.offset = 11; var->red.length = 5;
299 var->green.offset = 5; var->green.length = 6;
300 var->blue.offset = 0; var->blue.length = 5;
301 var->transp.offset = 0; var->transp.length = 0;
302 break;
303 case 24: /* RGB 888 */
304 var->red.offset = 16; var->red.length = 8;
305 var->green.offset = 8; var->green.length = 8;
306 var->blue.offset = 0; var->blue.length = 8;
307 var->transp.offset = 0; var->transp.length = 0;
308 break;
309 case 32: /* ARGB 8888 */
310 pvr2fb_set_pal_type(PAL_ARGB8888);
311 var->red.offset = 16; var->red.length = 8;
312 var->green.offset = 8; var->green.length = 8;
313 var->blue.offset = 0; var->blue.length = 8;
314 var->transp.offset = 24; var->transp.length = 8;
315 break;
316 }
317}
318
319static int pvr2fb_setcolreg(unsigned int regno, unsigned int red,
320 unsigned int green, unsigned int blue,
321 unsigned int transp, struct fb_info *info)
322{
323 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
324 unsigned int tmp;
325
326 if (regno > info->cmap.len)
327 return 1;
328
329 /*
330 * We only support the hardware palette for 16 and 32bpp. It's also
331 * expected that the palette format has been set by the time we get
332 * here, so we don't waste time setting it again.
333 */
334 switch (info->var.bits_per_pixel) {
335 case 16: /* RGB 565 */
336 tmp = (red & 0xf800) |
337 ((green & 0xfc00) >> 5) |
338 ((blue & 0xf800) >> 11);
339
340 pvr2fb_set_pal_entry(par, regno, tmp);
341 ((u16*)(info->pseudo_palette))[regno] = tmp;
342 break;
343 case 24: /* RGB 888 */
344 red >>= 8; green >>= 8; blue >>= 8;
345 ((u32*)(info->pseudo_palette))[regno] = (red << 16) | (green << 8) | blue;
346 break;
347 case 32: /* ARGB 8888 */
348 red >>= 8; green >>= 8; blue >>= 8;
349 tmp = (transp << 24) | (red << 16) | (green << 8) | blue;
350
351 pvr2fb_set_pal_entry(par, regno, tmp);
352 ((u32*)(info->pseudo_palette))[regno] = tmp;
353 break;
354 default:
355 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel);
356 return 1;
357 }
358
359 return 0;
360}
361
362static int pvr2fb_set_par(struct fb_info *info)
363{
364 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
365 struct fb_var_screeninfo *var = &info->var;
366 unsigned long line_length;
367 unsigned int vtotal;
368
369 /*
370 * XXX: It's possible that a user could use a VGA box, change the cable
371 * type in hardware (i.e. switch from VGA<->composite), then change
372 * modes (i.e. switching to another VT). If that happens we should
373 * automagically change the output format to cope, but currently I
374 * don't have a VGA box to make sure this works properly.
375 */
376 cable_type = pvr2_init_cable();
377 if (cable_type == CT_VGA && video_output != VO_VGA)
378 video_output = VO_VGA;
379
380 var->vmode &= FB_VMODE_MASK;
381 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA)
382 par->is_interlaced = 1;
383 /*
384 * XXX: Need to be more creative with this (i.e. allow doublecan for
385 * PAL/NTSC output).
386 */
387 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA)
388 par->is_doublescan = 1;
389
390 par->hsync_total = var->left_margin + var->xres + var->right_margin +
391 var->hsync_len;
392 par->vsync_total = var->upper_margin + var->yres + var->lower_margin +
393 var->vsync_len;
394
395 if (var->sync & FB_SYNC_BROADCAST) {
396 vtotal = par->vsync_total;
397 if (par->is_interlaced)
398 vtotal /= 2;
399 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
400 /* XXX: Check for start values here... */
401 /* XXX: Check hardware for PAL-compatibility */
402 par->borderstart_h = 116;
403 par->borderstart_v = 44;
404 } else {
405 /* NTSC video output */
406 par->borderstart_h = 126;
407 par->borderstart_v = 18;
408 }
409 } else {
410 /* VGA mode */
411 /* XXX: What else needs to be checked? */
412 /*
413 * XXX: We have a little freedom in VGA modes, what ranges
414 * should be here (i.e. hsync/vsync totals, etc.)?
415 */
416 par->borderstart_h = 126;
417 par->borderstart_v = 40;
418 }
419
420 /* Calculate the remainding offsets */
421 par->diwstart_h = par->borderstart_h + var->left_margin;
422 par->diwstart_v = par->borderstart_v + var->upper_margin;
423 par->borderstop_h = par->diwstart_h + var->xres +
424 var->right_margin;
425 par->borderstop_v = par->diwstart_v + var->yres +
426 var->lower_margin;
427
428 if (!par->is_interlaced)
429 par->borderstop_v /= 2;
430 if (info->var.xres < 640)
431 par->is_lowres = 1;
432
433 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
434 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length;
435 info->fix.line_length = line_length;
436 return 0;
437}
438
439static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
440{
441 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
442 unsigned int vtotal, hsync_total;
443 unsigned long line_length;
444
445 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) {
446 pr_debug("Invalid pixclock value %d\n", var->pixclock);
447 return -EINVAL;
448 }
449
450 if (var->xres < 320)
451 var->xres = 320;
452 if (var->yres < 240)
453 var->yres = 240;
454 if (var->xres_virtual < var->xres)
455 var->xres_virtual = var->xres;
456 if (var->yres_virtual < var->yres)
457 var->yres_virtual = var->yres;
458
459 if (var->bits_per_pixel <= 16)
460 var->bits_per_pixel = 16;
461 else if (var->bits_per_pixel <= 24)
462 var->bits_per_pixel = 24;
463 else if (var->bits_per_pixel <= 32)
464 var->bits_per_pixel = 32;
465
466 set_color_bitfields(var);
467
468 if (var->vmode & FB_VMODE_YWRAP) {
469 if (var->xoffset || var->yoffset < 0 ||
470 var->yoffset >= var->yres_virtual) {
471 var->xoffset = var->yoffset = 0;
472 } else {
473 if (var->xoffset > var->xres_virtual - var->xres ||
474 var->yoffset > var->yres_virtual - var->yres ||
475 var->xoffset < 0 || var->yoffset < 0)
476 var->xoffset = var->yoffset = 0;
477 }
478 } else {
479 var->xoffset = var->yoffset = 0;
480 }
481
482 /*
483 * XXX: Need to be more creative with this (i.e. allow doublecan for
484 * PAL/NTSC output).
485 */
486 if (var->yres < 480 && video_output == VO_VGA)
487 var->vmode |= FB_VMODE_DOUBLE;
488
489 if (video_output != VO_VGA) {
490 var->sync |= FB_SYNC_BROADCAST;
491 var->vmode |= FB_VMODE_INTERLACED;
492 } else {
493 var->sync &= ~FB_SYNC_BROADCAST;
494 var->vmode &= ~FB_VMODE_INTERLACED;
495 var->vmode |= pvr2_var.vmode;
496 }
497
498 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) {
499 var->right_margin = par->borderstop_h -
500 (par->diwstart_h + var->xres);
501 var->left_margin = par->diwstart_h - par->borderstart_h;
502 var->hsync_len = par->borderstart_h +
503 (par->hsync_total - par->borderstop_h);
504
505 var->upper_margin = par->diwstart_v - par->borderstart_v;
506 var->lower_margin = par->borderstop_v -
507 (par->diwstart_v + var->yres);
508 var->vsync_len = par->borderstop_v +
509 (par->vsync_total - par->borderstop_v);
510 }
511
512 hsync_total = var->left_margin + var->xres + var->right_margin +
513 var->hsync_len;
514 vtotal = var->upper_margin + var->yres + var->lower_margin +
515 var->vsync_len;
516
517 if (var->sync & FB_SYNC_BROADCAST) {
518 if (var->vmode & FB_VMODE_INTERLACED)
519 vtotal /= 2;
520 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
521 /* PAL video output */
522 /* XXX: Should be using a range here ... ? */
523 if (hsync_total != PAL_HTOTAL) {
524 pr_debug("invalid hsync total for PAL\n");
525 return -EINVAL;
526 }
527 } else {
528 /* NTSC video output */
529 if (hsync_total != NTSC_HTOTAL) {
530 pr_debug("invalid hsync total for NTSC\n");
531 return -EINVAL;
532 }
533 }
534 }
535
536 /* Check memory sizes */
537 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
538 if (line_length * var->yres_virtual > info->fix.smem_len)
539 return -ENOMEM;
540
541 return 0;
542}
543
544static void pvr2_update_display(struct fb_info *info)
545{
546 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
547 struct fb_var_screeninfo *var = &info->var;
548
549 /* Update the start address of the display image */
550 fb_writel(par->disp_start, DISP_DIWADDRL);
551 fb_writel(par->disp_start +
552 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
553 DISP_DIWADDRS);
554}
555
556/*
557 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't
558 * very stable. It's probably due to the fact that a lot of the 2D video
559 * registers are still undocumented.
560 */
561
562static void pvr2_init_display(struct fb_info *info)
563{
564 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
565 struct fb_var_screeninfo *var = &info->var;
566 unsigned int diw_height, diw_width, diw_modulo = 1;
567 unsigned int bytesperpixel = var->bits_per_pixel >> 3;
568
569 /* hsync and vsync totals */
570 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE);
571
572 /* column height, modulo, row width */
573 /* since we're "panning" within vram, we need to offset things based
574 * on the offset from the virtual x start to our real gfx. */
575 if (video_output != VO_VGA && par->is_interlaced)
576 diw_modulo += info->fix.line_length / 4;
577 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres);
578 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4;
579 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width,
580 DISP_DIWSIZE);
581
582 /* display address, long and short fields */
583 fb_writel(par->disp_start, DISP_DIWADDRL);
584 fb_writel(par->disp_start +
585 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
586 DISP_DIWADDRS);
587
588 /* border horizontal, border vertical, border color */
589 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ);
590 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT);
591 fb_writel(0, DISP_BRDRCOLR);
592
593 /* display window start position */
594 fb_writel(par->diwstart_h, DISP_DIWHSTRT);
595 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT);
596
597 /* misc. settings */
598 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF);
599
600 /* clock doubler (for VGA), scan doubler, display enable */
601 fb_writel(((video_output == VO_VGA) << 23) |
602 (par->is_doublescan << 1) | 1, DISP_DIWMODE);
603
604 /* bits per pixel */
605 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE);
606
607 /* video enable, color sync, interlace,
608 * hsync and vsync polarity (currently unused) */
609 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF);
610}
611
612/* Simulate blanking by making the border cover the entire screen */
613
614#define BLANK_BIT (1<<3)
615
616static void pvr2_do_blank(void)
617{
618 struct pvr2fb_par *par = currentpar;
619 unsigned long diwconf;
620
621 diwconf = fb_readl(DISP_DIWCONF);
622 if (do_blank > 0)
623 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF);
624 else
625 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF);
626
627 is_blanked = do_blank > 0 ? do_blank : 0;
628}
629
630static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id, struct pt_regs *fp)
631{
632 struct fb_info *info = dev_id;
633
634 if (do_vmode_pan || do_vmode_full)
635 pvr2_update_display(info);
636 if (do_vmode_full)
637 pvr2_init_display(info);
638 if (do_vmode_pan)
639 do_vmode_pan = 0;
640 if (do_vmode_full)
641 do_vmode_full = 0;
642 if (do_blank) {
643 pvr2_do_blank();
644 do_blank = 0;
645 }
646 return IRQ_HANDLED;
647}
648
649/*
650 * Determine the cable type and initialize the cable output format. Don't do
651 * anything if the cable type has been overidden (via "cable:XX").
652 */
653
654#define PCTRA 0xff80002c
655#define PDTRA 0xff800030
656#define VOUTC 0xa0702c00
657
658static int pvr2_init_cable(void)
659{
660 if (cable_type < 0) {
661 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000,
662 PCTRA);
663 cable_type = (fb_readw(PDTRA) >> 8) & 3;
664 }
665
666 /* Now select the output format (either composite or other) */
667 /* XXX: Save the previous val first, as this reg is also AICA
668 related */
669 if (cable_type == CT_COMPOSITE)
670 fb_writel(3 << 8, VOUTC);
671 else
672 fb_writel(0, VOUTC);
673
674 return cable_type;
675}
676
677#ifdef CONFIG_SH_DMA
678static ssize_t pvr2fb_write(struct file *file, const char *buf,
679 size_t count, loff_t *ppos)
680{
681 unsigned long dst, start, end, len;
682 unsigned int nr_pages;
683 struct page **pages;
684 int ret, i;
685
686 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT;
687
688 pages = kmalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
689 if (!pages)
690 return -ENOMEM;
691
692 down_read(&current->mm->mmap_sem);
693 ret = get_user_pages(current, current->mm, (unsigned long)buf,
694 nr_pages, WRITE, 0, pages, NULL);
695 up_read(&current->mm->mmap_sem);
696
697 if (ret < nr_pages) {
698 nr_pages = ret;
699 ret = -EINVAL;
700 goto out_unmap;
701 }
702
703 dma_configure_channel(shdma, 0x12c1);
704
705 dst = (unsigned long)fb_info->screen_base + *ppos;
706 start = (unsigned long)page_address(pages[0]);
707 end = (unsigned long)page_address(pages[nr_pages]);
708 len = nr_pages << PAGE_SHIFT;
709
710 /* Half-assed contig check */
711 if (start + len == end) {
712 /* As we do this in one shot, it's either all or nothing.. */
713 if ((*ppos + len) > fb_info->fix.smem_len) {
714 ret = -ENOSPC;
715 goto out_unmap;
716 }
717
718 dma_write(shdma, start, 0, len);
719 dma_write(pvr2dma, 0, dst, len);
720 dma_wait_for_completion(pvr2dma);
721
722 goto out;
723 }
724
725 /* Not contiguous, writeout per-page instead.. */
726 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) {
727 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) {
728 ret = -ENOSPC;
729 goto out_unmap;
730 }
731
732 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0);
733 dma_write_page(pvr2dma, 0, dst);
734 dma_wait_for_completion(pvr2dma);
735 }
736
737out:
738 *ppos += count;
739 ret = count;
740
741out_unmap:
742 for (i = 0; i < nr_pages; i++)
743 page_cache_release(pages[i]);
744
745 kfree(pages);
746
747 return ret;
748}
749#endif /* CONFIG_SH_DMA */
750
751/**
752 * pvr2fb_common_init
753 *
754 * Common init code for the PVR2 chips.
755 *
756 * This mostly takes care of the common aspects of the fb setup and
757 * registration. It's expected that the board-specific init code has
758 * already setup pvr2_fix with something meaningful at this point.
759 *
760 * Device info reporting is also done here, as well as picking a sane
761 * default from the modedb. For board-specific modelines, simply define
762 * a per-board modedb.
763 *
764 * Also worth noting is that the cable and video output types are likely
765 * always going to be VGA for the PCI-based PVR2 boards, but we leave this
766 * in for flexibility anyways. Who knows, maybe someone has tv-out on a
767 * PCI-based version of these things ;-)
768 */
769static int __init pvr2fb_common_init(void)
770{
771 struct pvr2fb_par *par = currentpar;
772 unsigned long modememused, rev;
773
774 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start,
775 pvr2_fix.smem_len);
776
777 if (!fb_info->screen_base) {
778 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n");
779 goto out_err;
780 }
781
782 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start,
783 pvr2_fix.mmio_len);
784 if (!par->mmio_base) {
785 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n");
786 goto out_err;
787 }
788
789 fb_memset((unsigned long)fb_info->screen_base, 0, pvr2_fix.smem_len);
790
791 pvr2_fix.ypanstep = nopan ? 0 : 1;
792 pvr2_fix.ywrapstep = nowrap ? 0 : 1;
793
794 fb_info->fbops = &pvr2fb_ops;
795 fb_info->fix = pvr2_fix;
796 fb_info->par = currentpar;
797 fb_info->pseudo_palette = (void *)(fb_info->par + 1);
798 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
799
800 if (video_output == VO_VGA)
801 defmode = DEFMODE_VGA;
802
803 if (!mode_option)
804 mode_option = "640x480@60";
805
806 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb,
807 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16))
808 fb_info->var = pvr2_var;
809
810 fb_alloc_cmap(&fb_info->cmap, 256, 0);
811
812 if (register_framebuffer(fb_info) < 0)
813 goto out_err;
814
815 modememused = get_line_length(fb_info->var.xres_virtual,
816 fb_info->var.bits_per_pixel);
817 modememused *= fb_info->var.yres_virtual;
818
819 rev = fb_readl(par->mmio_base + 0x04);
820
821 printk("fb%d: %s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n",
822 fb_info->node, fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f,
823 modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10));
824 printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",
825 fb_info->node, fb_info->var.xres, fb_info->var.yres,
826 fb_info->var.bits_per_pixel,
827 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),
828 (char *)pvr2_get_param(cables, NULL, cable_type, 3),
829 (char *)pvr2_get_param(outputs, NULL, video_output, 3));
830
831#ifdef CONFIG_SH_STORE_QUEUES
832 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node);
833
834 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
835 fb_info->fix.id);
836
837 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n",
838 fb_info->node, pvr2fb_map->sq_addr);
839#endif
840
841 return 0;
842
843out_err:
844 if (fb_info->screen_base)
845 iounmap(fb_info->screen_base);
846 if (par->mmio_base)
847 iounmap((void *)par->mmio_base);
848
849 return -ENXIO;
850}
851
852#ifdef CONFIG_SH_DREAMCAST
853static int __init pvr2fb_dc_init(void)
854{
855 if (!mach_is_dreamcast())
856 return -ENXIO;
857
858 /* Make a guess at the monitor based on the attached cable */
859 if (pvr2_init_cable() == CT_VGA) {
860 fb_info->monspecs.hfmin = 30000;
861 fb_info->monspecs.hfmax = 70000;
862 fb_info->monspecs.vfmin = 60;
863 fb_info->monspecs.vfmax = 60;
864 } else {
865 /* Not VGA, using a TV (taken from acornfb) */
866 fb_info->monspecs.hfmin = 15469;
867 fb_info->monspecs.hfmax = 15781;
868 fb_info->monspecs.vfmin = 49;
869 fb_info->monspecs.vfmax = 51;
870 }
871
872 /*
873 * XXX: This needs to pull default video output via BIOS or other means
874 */
875 if (video_output < 0) {
876 if (cable_type == CT_VGA) {
877 video_output = VO_VGA;
878 } else {
879 video_output = VO_NTSC;
880 }
881 }
882
883 /*
884 * Nothing exciting about the DC PVR2 .. only a measly 8MiB.
885 */
886 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */
887 pvr2_fix.smem_len = 8 << 20;
888
889 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */
890 pvr2_fix.mmio_len = 0x2000;
891
892 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, 0,
893 "pvr2 VBL handler", fb_info)) {
894 return -EBUSY;
895 }
896
897#ifdef CONFIG_SH_DMA
898 if (request_dma(pvr2dma, "pvr2") != 0) {
899 free_irq(HW_EVENT_VSYNC, 0);
900 return -EBUSY;
901 }
902#endif
903
904 return pvr2fb_common_init();
905}
906
907static void pvr2fb_dc_exit(void)
908{
909 free_irq(HW_EVENT_VSYNC, 0);
910#ifdef CONFIG_SH_DMA
911 free_dma(pvr2dma);
912#endif
913}
914#endif /* CONFIG_SH_DREAMCAST */
915
916#ifdef CONFIG_PCI
917static int __devinit pvr2fb_pci_probe(struct pci_dev *pdev,
918 const struct pci_device_id *ent)
919{
920 int ret;
921
922 ret = pci_enable_device(pdev);
923 if (ret) {
924 printk(KERN_ERR "pvr2fb: PCI enable failed\n");
925 return ret;
926 }
927
928 ret = pci_request_regions(pdev, "pvr2fb");
929 if (ret) {
930 printk(KERN_ERR "pvr2fb: PCI request regions failed\n");
931 return ret;
932 }
933
934 /*
935 * Slightly more exciting than the DC PVR2 .. 16MiB!
936 */
937 pvr2_fix.smem_start = pci_resource_start(pdev, 0);
938 pvr2_fix.smem_len = pci_resource_len(pdev, 0);
939
940 pvr2_fix.mmio_start = pci_resource_start(pdev, 1);
941 pvr2_fix.mmio_len = pci_resource_len(pdev, 1);
942
943 fb_info->device = &pdev->dev;
944
945 return pvr2fb_common_init();
946}
947
948static void __devexit pvr2fb_pci_remove(struct pci_dev *pdev)
949{
950 pci_release_regions(pdev);
951}
952
953static struct pci_device_id pvr2fb_pci_tbl[] __devinitdata = {
954 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250,
955 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
956 { 0, },
957};
958
959MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl);
960
961static struct pci_driver pvr2fb_pci_driver = {
962 .name = "pvr2fb",
963 .id_table = pvr2fb_pci_tbl,
964 .probe = pvr2fb_pci_probe,
965 .remove = __devexit_p(pvr2fb_pci_remove),
966};
967
968static int __init pvr2fb_pci_init(void)
969{
970 return pci_register_driver(&pvr2fb_pci_driver);
971}
972
973static void pvr2fb_pci_exit(void)
974{
975 pci_unregister_driver(&pvr2fb_pci_driver);
976}
977#endif /* CONFIG_PCI */
978
979static int __init pvr2_get_param(const struct pvr2_params *p, const char *s,
980 int val, int size)
981{
982 int i;
983
984 for (i = 0 ; i < size ; i++ ) {
985 if (s != NULL) {
986 if (!strnicmp(p[i].name, s, strlen(s)))
987 return p[i].val;
988 } else {
989 if (p[i].val == val)
990 return (int)p[i].name;
991 }
992 }
993 return -1;
994}
995
996/*
997 * Parse command arguments. Supported arguments are:
998 * inverse Use inverse color maps
999 * cable:composite|rgb|vga Override the video cable type
1000 * output:NTSC|PAL|VGA Override the video output format
1001 *
1002 * <xres>x<yres>[-<bpp>][@<refresh>] or,
1003 * <name>[-<bpp>][@<refresh>] Startup using this video mode
1004 */
1005
1006#ifndef MODULE
1007int __init pvr2fb_setup(char *options)
1008{
1009 char *this_opt;
1010 char cable_arg[80];
1011 char output_arg[80];
1012
1013 if (!options || !*options)
1014 return 0;
1015
1016 while ((this_opt = strsep(&options, ","))) {
1017 if (!*this_opt)
1018 continue;
1019 if (!strcmp(this_opt, "inverse")) {
1020 fb_invert_cmaps();
1021 } else if (!strncmp(this_opt, "cable:", 6)) {
1022 strcpy(cable_arg, this_opt + 6);
1023 } else if (!strncmp(this_opt, "output:", 7)) {
1024 strcpy(output_arg, this_opt + 7);
1025 } else if (!strncmp(this_opt, "nopan", 5)) {
1026 nopan = 1;
1027 } else if (!strncmp(this_opt, "nowrap", 6)) {
1028 nowrap = 1;
1029 } else {
1030 mode_option = this_opt;
1031 }
1032 }
1033
1034 if (*cable_arg)
1035 cable_type = pvr2_get_param(cables, cable_arg, 0, 3);
1036 if (*output_arg)
1037 video_output = pvr2_get_param(outputs, output_arg, 0, 3);
1038
1039 return 0;
1040}
1041#endif
1042
1043static struct pvr2_board {
1044 int (*init)(void);
1045 void (*exit)(void);
1046 char name[16];
1047} board_list[] = {
1048#ifdef CONFIG_SH_DREAMCAST
1049 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },
1050#endif
1051#ifdef CONFIG_PCI
1052 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" },
1053#endif
1054 { 0, },
1055};
1056
1057int __init pvr2fb_init(void)
1058{
1059 int i, ret = -ENODEV;
1060 int size;
1061
1062#ifndef MODULE
1063 char *option = NULL;
1064
1065 if (fb_get_options("pvr2fb", &option))
1066 return -ENODEV;
1067 pvr2fb_setup(option);
1068#endif
1069 size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32);
1070
1071 fb_info = kmalloc(size, GFP_KERNEL);
1072 if (!fb_info) {
1073 printk(KERN_ERR "Failed to allocate memory for fb_info\n");
1074 return -ENOMEM;
1075 }
1076
1077 memset(fb_info, 0, size);
1078
1079 currentpar = (struct pvr2fb_par *)(fb_info + 1);
1080
1081 for (i = 0; i < ARRAY_SIZE(board_list); i++) {
1082 struct pvr2_board *pvr_board = board_list + i;
1083
1084 if (!pvr_board->init)
1085 continue;
1086
1087 ret = pvr_board->init();
1088
1089 if (ret != 0) {
1090 printk(KERN_ERR "pvr2fb: Failed init of %s device\n",
1091 pvr_board->name);
1092 kfree(fb_info);
1093 break;
1094 }
1095 }
1096
1097 return ret;
1098}
1099
1100static void __exit pvr2fb_exit(void)
1101{
1102 int i;
1103
1104 for (i = 0; i < ARRAY_SIZE(board_list); i++) {
1105 struct pvr2_board *pvr_board = board_list + i;
1106
1107 if (pvr_board->exit)
1108 pvr_board->exit();
1109 }
1110
1111#ifdef CONFIG_SH_STORE_QUEUES
1112 sq_unmap(pvr2fb_map);
1113#endif
1114
1115 unregister_framebuffer(fb_info);
1116 kfree(fb_info);
1117}
1118
1119module_init(pvr2fb_init);
1120module_exit(pvr2fb_exit);
1121
1122MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
1123MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards");
1124MODULE_LICENSE("GPL");
1125
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 04:02:39 -0500