2 files changed, 24 insertions, 35 deletions

diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 67548839ff51..fedbd2c8e97a 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -494,6 +494,7 @@ int dispc_runtime_get(void)
         WARN_ON(r < 0);
         return r < 0 ? r : 0;
 }
+EXPORT_SYMBOL(dispc_runtime_get);
 
 void dispc_runtime_put(void)
 {
@@ -504,11 +505,13 @@ void dispc_runtime_put(void)
         r = pm_runtime_put_sync(&dispc.pdev->dev);
         WARN_ON(r < 0 && r != -ENOSYS);
 }
+EXPORT_SYMBOL(dispc_runtime_put);
 
 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel)
 {
         return mgr_desc[channel].vsync_irq;
 }
+EXPORT_SYMBOL(dispc_mgr_get_vsync_irq);
 
 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel)
 {
@@ -517,11 +520,13 @@ u32 dispc_mgr_get_framedone_irq(enum omap_channel channel)
 
         return mgr_desc[channel].framedone_irq;
 }
+EXPORT_SYMBOL(dispc_mgr_get_framedone_irq);
 
 u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel)
 {
         return mgr_desc[channel].sync_lost_irq;
 }
+EXPORT_SYMBOL(dispc_mgr_get_sync_lost_irq);
 
 u32 dispc_wb_get_framedone_irq(void)
 {
@@ -532,6 +537,7 @@ bool dispc_mgr_go_busy(enum omap_channel channel)
 {
         return mgr_fld_read(channel, DISPC_MGR_FLD_GO) == 1;
 }
+EXPORT_SYMBOL(dispc_mgr_go_busy);
 
 void dispc_mgr_go(enum omap_channel channel)
 {
@@ -542,6 +548,7 @@ void dispc_mgr_go(enum omap_channel channel)
 
         mgr_fld_write(channel, DISPC_MGR_FLD_GO, 1);
 }
+EXPORT_SYMBOL(dispc_mgr_go);
 
 bool dispc_wb_go_busy(void)
 {
@@ -945,6 +952,7 @@ void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel)
         }
         dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val);
 }
+EXPORT_SYMBOL(dispc_ovl_set_channel_out);
 
 static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane)
 {
@@ -2359,6 +2367,7 @@ int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
                         &five_taps, x_predecim, y_predecim, pos_x,
                         oi->rotation_type, false);
 }
+EXPORT_SYMBOL(dispc_ovl_check);
 
 static int dispc_ovl_setup_common(enum omap_plane plane,
                 enum omap_overlay_caps caps, u32 paddr, u32 p_uv_addr,
@@ -2539,6 +2548,7 @@ int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
 
         return r;
 }
+EXPORT_SYMBOL(dispc_ovl_setup);
 
 int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
                 bool mem_to_mem, const struct omap_video_timings *mgr_timings)
@@ -2599,11 +2609,13 @@ int dispc_ovl_enable(enum omap_plane plane, bool enable)
 
         return 0;
 }
+EXPORT_SYMBOL(dispc_ovl_enable);
 
 bool dispc_ovl_enabled(enum omap_plane plane)
 {
         return REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0);
 }
+EXPORT_SYMBOL(dispc_ovl_enabled);
 
 void dispc_mgr_enable(enum omap_channel channel, bool enable)
 {
@@ -2611,11 +2623,13 @@ void dispc_mgr_enable(enum omap_channel channel, bool enable)
         /* flush posted write */
         mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE);
 }
+EXPORT_SYMBOL(dispc_mgr_enable);
 
 bool dispc_mgr_is_enabled(enum omap_channel channel)
 {
         return !!mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE);
 }
+EXPORT_SYMBOL(dispc_mgr_is_enabled);
 
 void dispc_wb_enable(bool enable)
 {
@@ -2712,6 +2726,7 @@ void dispc_mgr_setup(enum omap_channel channel,
                 dispc_mgr_set_cpr_coef(channel, &info->cpr_coefs);
         }
 }
+EXPORT_SYMBOL(dispc_mgr_setup);
 
 static void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines)
 {
@@ -2788,6 +2803,7 @@ void dispc_mgr_set_lcd_config(enum omap_channel channel,
 
         dispc_mgr_set_lcd_type_tft(channel);
 }
+EXPORT_SYMBOL(dispc_mgr_set_lcd_config);
 
 static bool _dispc_mgr_size_ok(u16 width, u16 height)
 {
@@ -2926,6 +2942,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
 
         dispc_mgr_set_size(channel, t.x_res, t.y_res);
 }
+EXPORT_SYMBOL(dispc_mgr_set_timings);
 
 static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div,
                 u16 pck_div)
@@ -3389,16 +3406,19 @@ u32 dispc_read_irqstatus(void)
 {
         return dispc_read_reg(DISPC_IRQSTATUS);
 }
+EXPORT_SYMBOL(dispc_read_irqstatus);
 
 void dispc_clear_irqstatus(u32 mask)
 {
         dispc_write_reg(DISPC_IRQSTATUS, mask);
 }
+EXPORT_SYMBOL(dispc_clear_irqstatus);
 
 u32 dispc_read_irqenable(void)
 {
         return dispc_read_reg(DISPC_IRQENABLE);
 }
+EXPORT_SYMBOL(dispc_read_irqenable);
 
 void dispc_write_irqenable(u32 mask)
 {
@@ -3409,6 +3429,7 @@ void dispc_write_irqenable(u32 mask)
 
         dispc_write_reg(DISPC_IRQENABLE, mask);
 }
+EXPORT_SYMBOL(dispc_write_irqenable);
 
 void dispc_enable_sidle(void)
 {
@@ -3584,11 +3605,13 @@ int dispc_request_irq(irq_handler_t handler, void *dev_id)
         return devm_request_irq(&dispc.pdev->dev, dispc.irq, handler,
                              IRQF_SHARED, "OMAP DISPC", dev_id);
 }
+EXPORT_SYMBOL(dispc_request_irq);
 
 void dispc_free_irq(void *dev_id)
 {
         devm_free_irq(&dispc.pdev->dev, dispc.irq, dev_id);
 }
+EXPORT_SYMBOL(dispc_free_irq);
 
 /* DISPC HW IP initialisation */
 static int __init omap_dispchw_probe(struct platform_device *pdev)
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 1d8483cbe395..ebe9e08b2a91 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -365,16 +365,6 @@ void dpi_uninit_platform_driver(void) __exit;
 int dispc_init_platform_driver(void) __init;
 void dispc_uninit_platform_driver(void) __exit;
 void dispc_dump_clocks(struct seq_file *s);
-u32 dispc_read_irqstatus(void);
-void dispc_clear_irqstatus(u32 mask);
-u32 dispc_read_irqenable(void);
-void dispc_write_irqenable(u32 mask);
-
-int dispc_request_irq(irq_handler_t handler, void *dev_id);
-void dispc_free_irq(void *dev_id);
-
-int dispc_runtime_get(void);
-void dispc_runtime_put(void);
 
 void dispc_enable_sidle(void);
 void dispc_disable_sidle(void);
@@ -398,29 +388,7 @@ void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
 void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
                 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
                 bool manual_update);
-int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
-                bool replication, const struct omap_video_timings *mgr_timings,
-                bool mem_to_mem);
-int dispc_ovl_enable(enum omap_plane plane, bool enable);
-bool dispc_ovl_enabled(enum omap_plane plane);
-void dispc_ovl_set_channel_out(enum omap_plane plane,
-                enum omap_channel channel);
-int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
-                const struct omap_overlay_info *oi,
-                const struct omap_video_timings *timings,
-                int *x_predecim, int *y_predecim);
-
-u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
-u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
-u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
-bool dispc_mgr_go_busy(enum omap_channel channel);
-void dispc_mgr_go(enum omap_channel channel);
-void dispc_mgr_enable(enum omap_channel channel, bool enable);
-bool dispc_mgr_is_enabled(enum omap_channel channel);
-void dispc_mgr_set_lcd_config(enum omap_channel channel,
-                const struct dss_lcd_mgr_config *config);
-void dispc_mgr_set_timings(enum omap_channel channel,
-                const struct omap_video_timings *timings);
+
 unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
 unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
 unsigned long dispc_core_clk_rate(void);
@@ -428,8 +396,6 @@ void dispc_mgr_set_clock_div(enum omap_channel channel,
                 const struct dispc_clock_info *cinfo);
 int dispc_mgr_get_clock_div(enum omap_channel channel,
                 struct dispc_clock_info *cinfo);
-void dispc_mgr_setup(enum omap_channel channel,
-                const struct omap_overlay_manager_info *info);
 
 u32 dispc_wb_get_framedone_irq(void);
 bool dispc_wb_go_busy(void);