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path: root/drivers/video/omap2/dss/dss.h
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Diffstat (limited to 'drivers/video/omap2/dss/dss.h')
-rw-r--r--drivers/video/omap2/dss/dss.h54
1 files changed, 40 insertions, 14 deletions
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index dd1092ceaeef..f67afe76f217 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -152,6 +152,25 @@ struct dsi_clock_info {
152 u16 lp_clk_div; 152 u16 lp_clk_div;
153}; 153};
154 154
155struct reg_field {
156 u16 reg;
157 u8 high;
158 u8 low;
159};
160
161struct dss_lcd_mgr_config {
162 enum dss_io_pad_mode io_pad_mode;
163
164 bool stallmode;
165 bool fifohandcheck;
166
167 struct dispc_clock_info clock_info;
168
169 int video_port_width;
170
171 int lcden_sig_polarity;
172};
173
155struct seq_file; 174struct seq_file;
156struct platform_device; 175struct platform_device;
157 176
@@ -188,6 +207,8 @@ int dss_mgr_set_device(struct omap_overlay_manager *mgr,
188int dss_mgr_unset_device(struct omap_overlay_manager *mgr); 207int dss_mgr_unset_device(struct omap_overlay_manager *mgr);
189void dss_mgr_set_timings(struct omap_overlay_manager *mgr, 208void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
190 struct omap_video_timings *timings); 209 struct omap_video_timings *timings);
210void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
211 const struct dss_lcd_mgr_config *config);
191const struct omap_video_timings *dss_mgr_get_timings(struct omap_overlay_manager *mgr); 212const struct omap_video_timings *dss_mgr_get_timings(struct omap_overlay_manager *mgr);
192 213
193bool dss_ovl_is_enabled(struct omap_overlay *ovl); 214bool dss_ovl_is_enabled(struct omap_overlay *ovl);
@@ -210,8 +231,6 @@ void dss_init_device(struct platform_device *pdev,
210 struct omap_dss_device *dssdev); 231 struct omap_dss_device *dssdev);
211void dss_uninit_device(struct platform_device *pdev, 232void dss_uninit_device(struct platform_device *pdev,
212 struct omap_dss_device *dssdev); 233 struct omap_dss_device *dssdev);
213bool dss_use_replication(struct omap_dss_device *dssdev,
214 enum omap_color_mode mode);
215 234
216/* manager */ 235/* manager */
217int dss_init_overlay_managers(struct platform_device *pdev); 236int dss_init_overlay_managers(struct platform_device *pdev);
@@ -223,8 +242,18 @@ int dss_mgr_check_timings(struct omap_overlay_manager *mgr,
223int dss_mgr_check(struct omap_overlay_manager *mgr, 242int dss_mgr_check(struct omap_overlay_manager *mgr,
224 struct omap_overlay_manager_info *info, 243 struct omap_overlay_manager_info *info,
225 const struct omap_video_timings *mgr_timings, 244 const struct omap_video_timings *mgr_timings,
245 const struct dss_lcd_mgr_config *config,
226 struct omap_overlay_info **overlay_infos); 246 struct omap_overlay_info **overlay_infos);
227 247
248static inline bool dss_mgr_is_lcd(enum omap_channel id)
249{
250 if (id == OMAP_DSS_CHANNEL_LCD || id == OMAP_DSS_CHANNEL_LCD2 ||
251 id == OMAP_DSS_CHANNEL_LCD3)
252 return true;
253 else
254 return false;
255}
256
228/* overlay */ 257/* overlay */
229void dss_init_overlays(struct platform_device *pdev); 258void dss_init_overlays(struct platform_device *pdev);
230void dss_uninit_overlays(struct platform_device *pdev); 259void dss_uninit_overlays(struct platform_device *pdev);
@@ -234,6 +263,8 @@ int dss_ovl_simple_check(struct omap_overlay *ovl,
234 const struct omap_overlay_info *info); 263 const struct omap_overlay_info *info);
235int dss_ovl_check(struct omap_overlay *ovl, struct omap_overlay_info *info, 264int dss_ovl_check(struct omap_overlay *ovl, struct omap_overlay_info *info,
236 const struct omap_video_timings *mgr_timings); 265 const struct omap_video_timings *mgr_timings);
266bool dss_ovl_use_replication(struct dss_lcd_mgr_config config,
267 enum omap_color_mode mode);
237 268
238/* DSS */ 269/* DSS */
239int dss_init_platform_driver(void) __init; 270int dss_init_platform_driver(void) __init;
@@ -268,8 +299,7 @@ unsigned long dss_get_dpll4_rate(void);
268int dss_calc_clock_rates(struct dss_clock_info *cinfo); 299int dss_calc_clock_rates(struct dss_clock_info *cinfo);
269int dss_set_clock_div(struct dss_clock_info *cinfo); 300int dss_set_clock_div(struct dss_clock_info *cinfo);
270int dss_get_clock_div(struct dss_clock_info *cinfo); 301int dss_get_clock_div(struct dss_clock_info *cinfo);
271int dss_calc_clock_div(bool is_tft, unsigned long req_pck, 302int dss_calc_clock_div(unsigned long req_pck, struct dss_clock_info *dss_cinfo,
272 struct dss_clock_info *dss_cinfo,
273 struct dispc_clock_info *dispc_cinfo); 303 struct dispc_clock_info *dispc_cinfo);
274 304
275/* SDI */ 305/* SDI */
@@ -296,7 +326,7 @@ u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
296unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev); 326unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev);
297int dsi_pll_set_clock_div(struct platform_device *dsidev, 327int dsi_pll_set_clock_div(struct platform_device *dsidev,
298 struct dsi_clock_info *cinfo); 328 struct dsi_clock_info *cinfo);
299int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft, 329int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
300 unsigned long req_pck, struct dsi_clock_info *cinfo, 330 unsigned long req_pck, struct dsi_clock_info *cinfo,
301 struct dispc_clock_info *dispc_cinfo); 331 struct dispc_clock_info *dispc_cinfo);
302int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk, 332int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
@@ -330,7 +360,7 @@ static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
330 return -ENODEV; 360 return -ENODEV;
331} 361}
332static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, 362static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
333 bool is_tft, unsigned long req_pck, 363 unsigned long req_pck,
334 struct dsi_clock_info *dsi_cinfo, 364 struct dsi_clock_info *dsi_cinfo,
335 struct dispc_clock_info *dispc_cinfo) 365 struct dispc_clock_info *dispc_cinfo)
336{ 366{
@@ -387,7 +417,7 @@ void dispc_set_loadmode(enum omap_dss_load_mode mode);
387bool dispc_mgr_timings_ok(enum omap_channel channel, 417bool dispc_mgr_timings_ok(enum omap_channel channel,
388 const struct omap_video_timings *timings); 418 const struct omap_video_timings *timings);
389unsigned long dispc_fclk_rate(void); 419unsigned long dispc_fclk_rate(void);
390void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck, 420void dispc_find_clk_divs(unsigned long req_pck, unsigned long fck,
391 struct dispc_clock_info *cinfo); 421 struct dispc_clock_info *cinfo);
392int dispc_calc_clock_rates(unsigned long dispc_fclk_rate, 422int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
393 struct dispc_clock_info *cinfo); 423 struct dispc_clock_info *cinfo);
@@ -398,8 +428,7 @@ void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
398 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge, 428 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
399 bool manual_update); 429 bool manual_update);
400int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi, 430int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
401 bool ilace, bool replication, 431 bool replication, const struct omap_video_timings *mgr_timings);
402 const struct omap_video_timings *mgr_timings);
403int dispc_ovl_enable(enum omap_plane plane, bool enable); 432int dispc_ovl_enable(enum omap_plane plane, bool enable);
404void dispc_ovl_set_channel_out(enum omap_plane plane, 433void dispc_ovl_set_channel_out(enum omap_plane plane,
405 enum omap_channel channel); 434 enum omap_channel channel);
@@ -415,16 +444,13 @@ bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
415void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode); 444void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode);
416void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable); 445void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
417void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines); 446void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
418void dispc_mgr_set_lcd_display_type(enum omap_channel channel, 447void dispc_mgr_set_lcd_type_tft(enum omap_channel channel);
419 enum omap_lcd_display_type type);
420void dispc_mgr_set_timings(enum omap_channel channel, 448void dispc_mgr_set_timings(enum omap_channel channel,
421 struct omap_video_timings *timings); 449 struct omap_video_timings *timings);
422void dispc_mgr_set_pol_freq(enum omap_channel channel,
423 enum omap_panel_config config, u8 acbi, u8 acb);
424unsigned long dispc_mgr_lclk_rate(enum omap_channel channel); 450unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
425unsigned long dispc_mgr_pclk_rate(enum omap_channel channel); 451unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
426unsigned long dispc_core_clk_rate(void); 452unsigned long dispc_core_clk_rate(void);
427int dispc_mgr_set_clock_div(enum omap_channel channel, 453void dispc_mgr_set_clock_div(enum omap_channel channel,
428 struct dispc_clock_info *cinfo); 454 struct dispc_clock_info *cinfo);
429int dispc_mgr_get_clock_div(enum omap_channel channel, 455int dispc_mgr_get_clock_div(enum omap_channel channel,
430 struct dispc_clock_info *cinfo); 456 struct dispc_clock_info *cinfo);