diff options
Diffstat (limited to 'drivers/video/omap2/dss/dss.h')
-rw-r--r-- | drivers/video/omap2/dss/dss.h | 370 |
1 files changed, 370 insertions, 0 deletions
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h new file mode 100644 index 000000000000..8da5ac42151b --- /dev/null +++ b/drivers/video/omap2/dss/dss.h | |||
@@ -0,0 +1,370 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/omap2/dss/dss.h | ||
3 | * | ||
4 | * Copyright (C) 2009 Nokia Corporation | ||
5 | * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> | ||
6 | * | ||
7 | * Some code and ideas taken from drivers/video/omap/ driver | ||
8 | * by Imre Deak. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License version 2 as published by | ||
12 | * the Free Software Foundation. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
15 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
17 | * more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License along with | ||
20 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
21 | */ | ||
22 | |||
23 | #ifndef __OMAP2_DSS_H | ||
24 | #define __OMAP2_DSS_H | ||
25 | |||
26 | #ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT | ||
27 | #define DEBUG | ||
28 | #endif | ||
29 | |||
30 | #ifdef DEBUG | ||
31 | extern unsigned int dss_debug; | ||
32 | #ifdef DSS_SUBSYS_NAME | ||
33 | #define DSSDBG(format, ...) \ | ||
34 | if (dss_debug) \ | ||
35 | printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \ | ||
36 | ## __VA_ARGS__) | ||
37 | #else | ||
38 | #define DSSDBG(format, ...) \ | ||
39 | if (dss_debug) \ | ||
40 | printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__) | ||
41 | #endif | ||
42 | |||
43 | #ifdef DSS_SUBSYS_NAME | ||
44 | #define DSSDBGF(format, ...) \ | ||
45 | if (dss_debug) \ | ||
46 | printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \ | ||
47 | ": %s(" format ")\n", \ | ||
48 | __func__, \ | ||
49 | ## __VA_ARGS__) | ||
50 | #else | ||
51 | #define DSSDBGF(format, ...) \ | ||
52 | if (dss_debug) \ | ||
53 | printk(KERN_DEBUG "omapdss: " \ | ||
54 | ": %s(" format ")\n", \ | ||
55 | __func__, \ | ||
56 | ## __VA_ARGS__) | ||
57 | #endif | ||
58 | |||
59 | #else /* DEBUG */ | ||
60 | #define DSSDBG(format, ...) | ||
61 | #define DSSDBGF(format, ...) | ||
62 | #endif | ||
63 | |||
64 | |||
65 | #ifdef DSS_SUBSYS_NAME | ||
66 | #define DSSERR(format, ...) \ | ||
67 | printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \ | ||
68 | ## __VA_ARGS__) | ||
69 | #else | ||
70 | #define DSSERR(format, ...) \ | ||
71 | printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__) | ||
72 | #endif | ||
73 | |||
74 | #ifdef DSS_SUBSYS_NAME | ||
75 | #define DSSINFO(format, ...) \ | ||
76 | printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \ | ||
77 | ## __VA_ARGS__) | ||
78 | #else | ||
79 | #define DSSINFO(format, ...) \ | ||
80 | printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__) | ||
81 | #endif | ||
82 | |||
83 | #ifdef DSS_SUBSYS_NAME | ||
84 | #define DSSWARN(format, ...) \ | ||
85 | printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \ | ||
86 | ## __VA_ARGS__) | ||
87 | #else | ||
88 | #define DSSWARN(format, ...) \ | ||
89 | printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__) | ||
90 | #endif | ||
91 | |||
92 | /* OMAP TRM gives bitfields as start:end, where start is the higher bit | ||
93 | number. For example 7:0 */ | ||
94 | #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end)) | ||
95 | #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) | ||
96 | #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end)) | ||
97 | #define FLD_MOD(orig, val, start, end) \ | ||
98 | (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end)) | ||
99 | |||
100 | #define DISPC_MAX_FCK 173000000 | ||
101 | |||
102 | enum omap_burst_size { | ||
103 | OMAP_DSS_BURST_4x32 = 0, | ||
104 | OMAP_DSS_BURST_8x32 = 1, | ||
105 | OMAP_DSS_BURST_16x32 = 2, | ||
106 | }; | ||
107 | |||
108 | enum omap_parallel_interface_mode { | ||
109 | OMAP_DSS_PARALLELMODE_BYPASS, /* MIPI DPI */ | ||
110 | OMAP_DSS_PARALLELMODE_RFBI, /* MIPI DBI */ | ||
111 | OMAP_DSS_PARALLELMODE_DSI, | ||
112 | }; | ||
113 | |||
114 | enum dss_clock { | ||
115 | DSS_CLK_ICK = 1 << 0, | ||
116 | DSS_CLK_FCK1 = 1 << 1, | ||
117 | DSS_CLK_FCK2 = 1 << 2, | ||
118 | DSS_CLK_54M = 1 << 3, | ||
119 | DSS_CLK_96M = 1 << 4, | ||
120 | }; | ||
121 | |||
122 | struct dss_clock_info { | ||
123 | /* rates that we get with dividers below */ | ||
124 | unsigned long fck; | ||
125 | |||
126 | /* dividers */ | ||
127 | u16 fck_div; | ||
128 | }; | ||
129 | |||
130 | struct dispc_clock_info { | ||
131 | /* rates that we get with dividers below */ | ||
132 | unsigned long lck; | ||
133 | unsigned long pck; | ||
134 | |||
135 | /* dividers */ | ||
136 | u16 lck_div; | ||
137 | u16 pck_div; | ||
138 | }; | ||
139 | |||
140 | struct dsi_clock_info { | ||
141 | /* rates that we get with dividers below */ | ||
142 | unsigned long fint; | ||
143 | unsigned long clkin4ddr; | ||
144 | unsigned long clkin; | ||
145 | unsigned long dsi1_pll_fclk; | ||
146 | unsigned long dsi2_pll_fclk; | ||
147 | |||
148 | unsigned long lp_clk; | ||
149 | |||
150 | /* dividers */ | ||
151 | u16 regn; | ||
152 | u16 regm; | ||
153 | u16 regm3; | ||
154 | u16 regm4; | ||
155 | |||
156 | u16 lp_clk_div; | ||
157 | |||
158 | u8 highfreq; | ||
159 | bool use_dss2_fck; | ||
160 | }; | ||
161 | |||
162 | struct seq_file; | ||
163 | struct platform_device; | ||
164 | |||
165 | /* core */ | ||
166 | void dss_clk_enable(enum dss_clock clks); | ||
167 | void dss_clk_disable(enum dss_clock clks); | ||
168 | unsigned long dss_clk_get_rate(enum dss_clock clk); | ||
169 | int dss_need_ctx_restore(void); | ||
170 | void dss_dump_clocks(struct seq_file *s); | ||
171 | struct bus_type *dss_get_bus(void); | ||
172 | |||
173 | /* display */ | ||
174 | int dss_suspend_all_devices(void); | ||
175 | int dss_resume_all_devices(void); | ||
176 | void dss_disable_all_devices(void); | ||
177 | |||
178 | void dss_init_device(struct platform_device *pdev, | ||
179 | struct omap_dss_device *dssdev); | ||
180 | void dss_uninit_device(struct platform_device *pdev, | ||
181 | struct omap_dss_device *dssdev); | ||
182 | bool dss_use_replication(struct omap_dss_device *dssdev, | ||
183 | enum omap_color_mode mode); | ||
184 | void default_get_overlay_fifo_thresholds(enum omap_plane plane, | ||
185 | u32 fifo_size, enum omap_burst_size *burst_size, | ||
186 | u32 *fifo_low, u32 *fifo_high); | ||
187 | |||
188 | /* manager */ | ||
189 | int dss_init_overlay_managers(struct platform_device *pdev); | ||
190 | void dss_uninit_overlay_managers(struct platform_device *pdev); | ||
191 | int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl); | ||
192 | void dss_setup_partial_planes(struct omap_dss_device *dssdev, | ||
193 | u16 *x, u16 *y, u16 *w, u16 *h); | ||
194 | void dss_start_update(struct omap_dss_device *dssdev); | ||
195 | |||
196 | /* overlay */ | ||
197 | void dss_init_overlays(struct platform_device *pdev); | ||
198 | void dss_uninit_overlays(struct platform_device *pdev); | ||
199 | int dss_check_overlay(struct omap_overlay *ovl, struct omap_dss_device *dssdev); | ||
200 | void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr); | ||
201 | #ifdef L4_EXAMPLE | ||
202 | void dss_overlay_setup_l4_manager(struct omap_overlay_manager *mgr); | ||
203 | #endif | ||
204 | void dss_recheck_connections(struct omap_dss_device *dssdev, bool force); | ||
205 | |||
206 | /* DSS */ | ||
207 | int dss_init(bool skip_init); | ||
208 | void dss_exit(void); | ||
209 | |||
210 | void dss_save_context(void); | ||
211 | void dss_restore_context(void); | ||
212 | |||
213 | void dss_dump_regs(struct seq_file *s); | ||
214 | |||
215 | void dss_sdi_init(u8 datapairs); | ||
216 | int dss_sdi_enable(void); | ||
217 | void dss_sdi_disable(void); | ||
218 | |||
219 | void dss_select_clk_source(bool dsi, bool dispc); | ||
220 | int dss_get_dsi_clk_source(void); | ||
221 | int dss_get_dispc_clk_source(void); | ||
222 | void dss_set_venc_output(enum omap_dss_venc_type type); | ||
223 | void dss_set_dac_pwrdn_bgz(bool enable); | ||
224 | |||
225 | unsigned long dss_get_dpll4_rate(void); | ||
226 | int dss_calc_clock_rates(struct dss_clock_info *cinfo); | ||
227 | int dss_set_clock_div(struct dss_clock_info *cinfo); | ||
228 | int dss_get_clock_div(struct dss_clock_info *cinfo); | ||
229 | int dss_calc_clock_div(bool is_tft, unsigned long req_pck, | ||
230 | struct dss_clock_info *dss_cinfo, | ||
231 | struct dispc_clock_info *dispc_cinfo); | ||
232 | |||
233 | /* SDI */ | ||
234 | int sdi_init(bool skip_init); | ||
235 | void sdi_exit(void); | ||
236 | int sdi_init_display(struct omap_dss_device *display); | ||
237 | |||
238 | /* DSI */ | ||
239 | int dsi_init(struct platform_device *pdev); | ||
240 | void dsi_exit(void); | ||
241 | |||
242 | void dsi_dump_clocks(struct seq_file *s); | ||
243 | void dsi_dump_regs(struct seq_file *s); | ||
244 | |||
245 | void dsi_save_context(void); | ||
246 | void dsi_restore_context(void); | ||
247 | |||
248 | int dsi_init_display(struct omap_dss_device *display); | ||
249 | void dsi_irq_handler(void); | ||
250 | unsigned long dsi_get_dsi1_pll_rate(void); | ||
251 | int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo); | ||
252 | int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck, | ||
253 | struct dsi_clock_info *cinfo, | ||
254 | struct dispc_clock_info *dispc_cinfo); | ||
255 | int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk, | ||
256 | bool enable_hsdiv); | ||
257 | void dsi_pll_uninit(void); | ||
258 | void dsi_get_overlay_fifo_thresholds(enum omap_plane plane, | ||
259 | u32 fifo_size, enum omap_burst_size *burst_size, | ||
260 | u32 *fifo_low, u32 *fifo_high); | ||
261 | |||
262 | /* DPI */ | ||
263 | int dpi_init(void); | ||
264 | void dpi_exit(void); | ||
265 | int dpi_init_display(struct omap_dss_device *dssdev); | ||
266 | |||
267 | /* DISPC */ | ||
268 | int dispc_init(void); | ||
269 | void dispc_exit(void); | ||
270 | void dispc_dump_clocks(struct seq_file *s); | ||
271 | void dispc_dump_regs(struct seq_file *s); | ||
272 | void dispc_irq_handler(void); | ||
273 | void dispc_fake_vsync_irq(void); | ||
274 | |||
275 | void dispc_save_context(void); | ||
276 | void dispc_restore_context(void); | ||
277 | |||
278 | void dispc_enable_sidle(void); | ||
279 | void dispc_disable_sidle(void); | ||
280 | |||
281 | void dispc_lcd_enable_signal_polarity(bool act_high); | ||
282 | void dispc_lcd_enable_signal(bool enable); | ||
283 | void dispc_pck_free_enable(bool enable); | ||
284 | void dispc_enable_fifohandcheck(bool enable); | ||
285 | |||
286 | void dispc_set_lcd_size(u16 width, u16 height); | ||
287 | void dispc_set_digit_size(u16 width, u16 height); | ||
288 | u32 dispc_get_plane_fifo_size(enum omap_plane plane); | ||
289 | void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high); | ||
290 | void dispc_enable_fifomerge(bool enable); | ||
291 | void dispc_set_burst_size(enum omap_plane plane, | ||
292 | enum omap_burst_size burst_size); | ||
293 | |||
294 | void dispc_set_plane_ba0(enum omap_plane plane, u32 paddr); | ||
295 | void dispc_set_plane_ba1(enum omap_plane plane, u32 paddr); | ||
296 | void dispc_set_plane_pos(enum omap_plane plane, u16 x, u16 y); | ||
297 | void dispc_set_plane_size(enum omap_plane plane, u16 width, u16 height); | ||
298 | void dispc_set_channel_out(enum omap_plane plane, | ||
299 | enum omap_channel channel_out); | ||
300 | |||
301 | int dispc_setup_plane(enum omap_plane plane, | ||
302 | u32 paddr, u16 screen_width, | ||
303 | u16 pos_x, u16 pos_y, | ||
304 | u16 width, u16 height, | ||
305 | u16 out_width, u16 out_height, | ||
306 | enum omap_color_mode color_mode, | ||
307 | bool ilace, | ||
308 | enum omap_dss_rotation_type rotation_type, | ||
309 | u8 rotation, bool mirror, | ||
310 | u8 global_alpha); | ||
311 | |||
312 | bool dispc_go_busy(enum omap_channel channel); | ||
313 | void dispc_go(enum omap_channel channel); | ||
314 | void dispc_enable_lcd_out(bool enable); | ||
315 | void dispc_enable_digit_out(bool enable); | ||
316 | int dispc_enable_plane(enum omap_plane plane, bool enable); | ||
317 | void dispc_enable_replication(enum omap_plane plane, bool enable); | ||
318 | |||
319 | void dispc_set_parallel_interface_mode(enum omap_parallel_interface_mode mode); | ||
320 | void dispc_set_tft_data_lines(u8 data_lines); | ||
321 | void dispc_set_lcd_display_type(enum omap_lcd_display_type type); | ||
322 | void dispc_set_loadmode(enum omap_dss_load_mode mode); | ||
323 | |||
324 | void dispc_set_default_color(enum omap_channel channel, u32 color); | ||
325 | u32 dispc_get_default_color(enum omap_channel channel); | ||
326 | void dispc_set_trans_key(enum omap_channel ch, | ||
327 | enum omap_dss_trans_key_type type, | ||
328 | u32 trans_key); | ||
329 | void dispc_get_trans_key(enum omap_channel ch, | ||
330 | enum omap_dss_trans_key_type *type, | ||
331 | u32 *trans_key); | ||
332 | void dispc_enable_trans_key(enum omap_channel ch, bool enable); | ||
333 | void dispc_enable_alpha_blending(enum omap_channel ch, bool enable); | ||
334 | bool dispc_trans_key_enabled(enum omap_channel ch); | ||
335 | bool dispc_alpha_blending_enabled(enum omap_channel ch); | ||
336 | |||
337 | bool dispc_lcd_timings_ok(struct omap_video_timings *timings); | ||
338 | void dispc_set_lcd_timings(struct omap_video_timings *timings); | ||
339 | unsigned long dispc_fclk_rate(void); | ||
340 | unsigned long dispc_lclk_rate(void); | ||
341 | unsigned long dispc_pclk_rate(void); | ||
342 | void dispc_set_pol_freq(enum omap_panel_config config, u8 acbi, u8 acb); | ||
343 | void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck, | ||
344 | struct dispc_clock_info *cinfo); | ||
345 | int dispc_calc_clock_rates(unsigned long dispc_fclk_rate, | ||
346 | struct dispc_clock_info *cinfo); | ||
347 | int dispc_set_clock_div(struct dispc_clock_info *cinfo); | ||
348 | int dispc_get_clock_div(struct dispc_clock_info *cinfo); | ||
349 | |||
350 | |||
351 | /* VENC */ | ||
352 | int venc_init(struct platform_device *pdev); | ||
353 | void venc_exit(void); | ||
354 | void venc_dump_regs(struct seq_file *s); | ||
355 | int venc_init_display(struct omap_dss_device *display); | ||
356 | |||
357 | /* RFBI */ | ||
358 | int rfbi_init(void); | ||
359 | void rfbi_exit(void); | ||
360 | void rfbi_dump_regs(struct seq_file *s); | ||
361 | |||
362 | int rfbi_configure(int rfbi_module, int bpp, int lines); | ||
363 | void rfbi_enable_rfbi(bool enable); | ||
364 | void rfbi_transfer_area(u16 width, u16 height, | ||
365 | void (callback)(void *data), void *data); | ||
366 | void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t); | ||
367 | unsigned long rfbi_get_max_tx_rate(void); | ||
368 | int rfbi_init_display(struct omap_dss_device *display); | ||
369 | |||
370 | #endif | ||