diff options
Diffstat (limited to 'drivers/video/omap2/dss/Kconfig')
-rw-r--r-- | drivers/video/omap2/dss/Kconfig | 33 |
1 files changed, 24 insertions, 9 deletions
diff --git a/drivers/video/omap2/dss/Kconfig b/drivers/video/omap2/dss/Kconfig index bfc5da0e9700..6b3e2da11419 100644 --- a/drivers/video/omap2/dss/Kconfig +++ b/drivers/video/omap2/dss/Kconfig | |||
@@ -80,7 +80,7 @@ config OMAP2_DSS_SDI | |||
80 | 80 | ||
81 | config OMAP2_DSS_DSI | 81 | config OMAP2_DSS_DSI |
82 | bool "DSI support" | 82 | bool "DSI support" |
83 | depends on ARCH_OMAP3 | 83 | depends on ARCH_OMAP3 || ARCH_OMAP4 |
84 | default n | 84 | default n |
85 | help | 85 | help |
86 | MIPI DSI (Display Serial Interface) support. | 86 | MIPI DSI (Display Serial Interface) support. |
@@ -90,14 +90,6 @@ config OMAP2_DSS_DSI | |||
90 | 90 | ||
91 | See http://www.mipi.org/ for DSI spesifications. | 91 | See http://www.mipi.org/ for DSI spesifications. |
92 | 92 | ||
93 | config OMAP2_DSS_USE_DSI_PLL | ||
94 | bool "Use DSI PLL for PCLK (EXPERIMENTAL)" | ||
95 | default n | ||
96 | depends on OMAP2_DSS_DSI | ||
97 | help | ||
98 | Use DSI PLL to generate pixel clock. Currently only for DPI output. | ||
99 | DSI PLL can be used to generate higher and more precise pixel clocks. | ||
100 | |||
101 | config OMAP2_DSS_FAKE_VSYNC | 93 | config OMAP2_DSS_FAKE_VSYNC |
102 | bool "Fake VSYNC irq from manual update displays" | 94 | bool "Fake VSYNC irq from manual update displays" |
103 | default n | 95 | default n |
@@ -125,4 +117,27 @@ config OMAP2_DSS_MIN_FCK_PER_PCK | |||
125 | Max FCK is 173MHz, so this doesn't work if your PCK | 117 | Max FCK is 173MHz, so this doesn't work if your PCK |
126 | is very high. | 118 | is very high. |
127 | 119 | ||
120 | config OMAP2_DSS_SLEEP_BEFORE_RESET | ||
121 | bool "Sleep 50ms before DSS reset" | ||
122 | default y | ||
123 | help | ||
124 | For some unknown reason we may get SYNC_LOST errors from the display | ||
125 | subsystem at initialization time if we don't sleep before resetting | ||
126 | the DSS. See the source (dss.c) for more comments. | ||
127 | |||
128 | However, 50ms is quite long time to sleep, and with some | ||
129 | configurations the SYNC_LOST may never happen, so the sleep can | ||
130 | be disabled here. | ||
131 | |||
132 | config OMAP2_DSS_SLEEP_AFTER_VENC_RESET | ||
133 | bool "Sleep 20ms after VENC reset" | ||
134 | default y | ||
135 | help | ||
136 | There is a 20ms sleep after VENC reset which seemed to fix the | ||
137 | reset. The reason for the bug is unclear, and it's also unclear | ||
138 | on what platforms this happens. | ||
139 | |||
140 | This option enables the sleep, and is enabled by default. You can | ||
141 | disable the sleep if it doesn't cause problems on your platform. | ||
142 | |||
128 | endif | 143 | endif |