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-rw-r--r--drivers/video/matrox/matroxfb_base.c2589
1 files changed, 2589 insertions, 0 deletions
diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c
new file mode 100644
index 000000000000..98e00d8601e5
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@@ -0,0 +1,2589 @@
1/*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writting this driver)
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
102/* make checkconfig does not check included files... */
103#include <linux/config.h>
104#include <linux/version.h>
105
106#include "matroxfb_base.h"
107#include "matroxfb_misc.h"
108#include "matroxfb_accel.h"
109#include "matroxfb_DAC1064.h"
110#include "matroxfb_Ti3026.h"
111#include "matroxfb_maven.h"
112#include "matroxfb_crtc2.h"
113#include "matroxfb_g450.h"
114#include <linux/matroxfb.h>
115#include <linux/interrupt.h>
116#include <asm/uaccess.h>
117
118#ifdef CONFIG_PPC_PMAC
119unsigned char nvram_read_byte(int);
120static int default_vmode = VMODE_NVRAM;
121static int default_cmode = CMODE_NVRAM;
122#endif
123
124static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
125
126/* --------------------------------------------------------------------- */
127
128/*
129 * card parameters
130 */
131
132/* --------------------------------------------------------------------- */
133
134static struct fb_var_screeninfo vesafb_defined = {
135 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
136 0,0, /* virtual -> visible no offset */
137 8, /* depth -> load bits_per_pixel */
138 0, /* greyscale ? */
139 {0,0,0}, /* R */
140 {0,0,0}, /* G */
141 {0,0,0}, /* B */
142 {0,0,0}, /* transparency */
143 0, /* standard pixel format */
144 FB_ACTIVATE_NOW,
145 -1,-1,
146 FB_ACCELF_TEXT, /* accel flags */
147 39721L,48L,16L,33L,10L,
148 96L,2L,~0, /* No sync info */
149 FB_VMODE_NONINTERLACED,
150 0, {0,0,0,0,0}
151};
152
153
154
155/* --------------------------------------------------------------------- */
156static void update_crtc2(WPMINFO unsigned int pos) {
157 struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
158
159 /* Make sure that displays are compatible */
160 if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
161 && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
162 && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
163 ) {
164 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
165 case 16:
166 case 32:
167 pos = pos * 8;
168 if (info->interlaced) {
169 mga_outl(0x3C2C, pos);
170 mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
171 } else {
172 mga_outl(0x3C28, pos);
173 }
174 break;
175 }
176 }
177}
178
179static void matroxfb_crtc1_panpos(WPMINFO2) {
180 if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
181 unsigned long flags;
182 int panpos;
183
184 matroxfb_DAC_lock_irqsave(flags);
185 panpos = ACCESS_FBINFO(crtc1.panpos);
186 if (panpos >= 0) {
187 unsigned int extvga_reg;
188
189 ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
190 extvga_reg = mga_inb(M_EXTVGA_INDEX);
191 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
192 if (extvga_reg != 0x00) {
193 mga_outb(M_EXTVGA_INDEX, extvga_reg);
194 }
195 }
196 matroxfb_DAC_unlock_irqrestore(flags);
197 }
198}
199
200static irqreturn_t matrox_irq(int irq, void *dev_id, struct pt_regs *fp)
201{
202 u_int32_t status;
203 int handled = 0;
204
205 MINFO_FROM(dev_id);
206
207 status = mga_inl(M_STATUS);
208
209 if (status & 0x20) {
210 mga_outl(M_ICLEAR, 0x20);
211 ACCESS_FBINFO(crtc1.vsync.cnt)++;
212 matroxfb_crtc1_panpos(PMINFO2);
213 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
214 handled = 1;
215 }
216 if (status & 0x200) {
217 mga_outl(M_ICLEAR, 0x200);
218 ACCESS_FBINFO(crtc2.vsync.cnt)++;
219 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
220 handled = 1;
221 }
222 return IRQ_RETVAL(handled);
223}
224
225int matroxfb_enable_irq(WPMINFO int reenable) {
226 u_int32_t bm;
227
228 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
229 bm = 0x220;
230 else
231 bm = 0x020;
232
233 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
234 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
235 SA_SHIRQ, "matroxfb", MINFO)) {
236 clear_bit(0, &ACCESS_FBINFO(irq_flags));
237 return -EINVAL;
238 }
239 /* Clear any pending field interrupts */
240 mga_outl(M_ICLEAR, bm);
241 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
242 } else if (reenable) {
243 u_int32_t ien;
244
245 ien = mga_inl(M_IEN);
246 if ((ien & bm) != bm) {
247 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
248 mga_outl(M_IEN, ien | bm);
249 }
250 }
251 return 0;
252}
253
254static void matroxfb_disable_irq(WPMINFO2) {
255 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
256 /* Flush pending pan-at-vbl request... */
257 matroxfb_crtc1_panpos(PMINFO2);
258 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
259 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
260 else
261 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
262 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
263 }
264}
265
266int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
267 wait_queue_t __wait;
268 struct matrox_vsync *vs;
269 unsigned int cnt;
270 int ret;
271
272 switch (crtc) {
273 case 0:
274 vs = &ACCESS_FBINFO(crtc1.vsync);
275 break;
276 case 1:
277 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
278 return -ENODEV;
279 }
280 vs = &ACCESS_FBINFO(crtc2.vsync);
281 break;
282 default:
283 return -ENODEV;
284 }
285 ret = matroxfb_enable_irq(PMINFO 0);
286 if (ret) {
287 return ret;
288 }
289 init_waitqueue_entry(&__wait, current);
290
291 cnt = vs->cnt;
292 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
293 if (ret < 0) {
294 return ret;
295 }
296 if (ret == 0) {
297 matroxfb_enable_irq(PMINFO 1);
298 return -ETIMEDOUT;
299 }
300 return 0;
301}
302
303/* --------------------------------------------------------------------- */
304
305static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
306 unsigned int pos;
307 unsigned short p0, p1, p2;
308#ifdef CONFIG_FB_MATROX_32MB
309 unsigned int p3;
310#endif
311 int vbl;
312 unsigned long flags;
313
314 CRITFLAGS
315
316 DBG(__FUNCTION__)
317
318 if (ACCESS_FBINFO(dead))
319 return;
320
321 ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
322 ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
323 pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
324 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
325 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
326 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
327 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
328#ifdef CONFIG_FB_MATROX_32MB
329 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
330#endif
331
332 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
333 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
334
335 CRITBEGIN
336
337 matroxfb_DAC_lock_irqsave(flags);
338 mga_setr(M_CRTC_INDEX, 0x0D, p0);
339 mga_setr(M_CRTC_INDEX, 0x0C, p1);
340#ifdef CONFIG_FB_MATROX_32MB
341 if (ACCESS_FBINFO(devflags.support32MB))
342 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
343#endif
344 if (vbl) {
345 ACCESS_FBINFO(crtc1.panpos) = p2;
346 } else {
347 /* Abort any pending change */
348 ACCESS_FBINFO(crtc1.panpos) = -1;
349 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
350 }
351 matroxfb_DAC_unlock_irqrestore(flags);
352
353 update_crtc2(PMINFO pos);
354
355 CRITEND
356}
357
358static void matroxfb_remove(WPMINFO int dummy) {
359 /* Currently we are holding big kernel lock on all dead & usecount updates.
360 * Destroy everything after all users release it. Especially do not unregister
361 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
362 * for device unplugged when in use.
363 * In future we should point mmio.vbase & video.vbase somewhere where we can
364 * write data without causing too much damage...
365 */
366
367 ACCESS_FBINFO(dead) = 1;
368 if (ACCESS_FBINFO(usecount)) {
369 /* destroy it later */
370 return;
371 }
372 matroxfb_unregister_device(MINFO);
373 unregister_framebuffer(&ACCESS_FBINFO(fbcon));
374 matroxfb_g450_shutdown(PMINFO2);
375#ifdef CONFIG_MTRR
376 if (ACCESS_FBINFO(mtrr.vram_valid))
377 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
378#endif
379 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
380 mga_iounmap(ACCESS_FBINFO(video.vbase));
381 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
382 release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
383#ifdef CONFIG_FB_MATROX_MULTIHEAD
384 kfree(minfo);
385#endif
386}
387
388 /*
389 * Open/Release the frame buffer device
390 */
391
392static int matroxfb_open(struct fb_info *info, int user)
393{
394 MINFO_FROM_INFO(info);
395
396 DBG_LOOP(__FUNCTION__)
397
398 if (ACCESS_FBINFO(dead)) {
399 return -ENXIO;
400 }
401 ACCESS_FBINFO(usecount)++;
402 if (user) {
403 ACCESS_FBINFO(userusecount)++;
404 }
405 return(0);
406}
407
408static int matroxfb_release(struct fb_info *info, int user)
409{
410 MINFO_FROM_INFO(info);
411
412 DBG_LOOP(__FUNCTION__)
413
414 if (user) {
415 if (0 == --ACCESS_FBINFO(userusecount)) {
416 matroxfb_disable_irq(PMINFO2);
417 }
418 }
419 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
420 matroxfb_remove(PMINFO 0);
421 }
422 return(0);
423}
424
425static int matroxfb_pan_display(struct fb_var_screeninfo *var,
426 struct fb_info* info) {
427 MINFO_FROM_INFO(info);
428
429 DBG(__FUNCTION__)
430
431 matrox_pan_var(PMINFO var);
432 return 0;
433}
434
435static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
436 int bppshft2;
437
438 DBG(__FUNCTION__)
439
440 bppshft2 = bpp;
441 if (!bppshft2) {
442 return 8;
443 }
444 if (isInterleave(MINFO))
445 bppshft2 >>= 1;
446 if (ACCESS_FBINFO(devflags.video64bits))
447 bppshft2 >>= 1;
448 return bppshft2;
449}
450
451static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
452 int over;
453 int rounding;
454
455 DBG(__FUNCTION__)
456
457 switch (bpp) {
458 case 0: return xres;
459 case 4: rounding = 128;
460 break;
461 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
462 break;
463 case 16: rounding = 32;
464 break;
465 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
466 break;
467 default: rounding = 16;
468 /* on G400, 16 really does not work */
469 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
470 rounding = 32;
471 break;
472 }
473 if (isInterleave(MINFO)) {
474 rounding *= 2;
475 }
476 over = xres % rounding;
477 if (over)
478 xres += rounding-over;
479 return xres;
480}
481
482static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
483 const int* width;
484 int xres_new;
485
486 DBG(__FUNCTION__)
487
488 if (!bpp) return xres;
489
490 width = ACCESS_FBINFO(capable.vxres);
491
492 if (ACCESS_FBINFO(devflags.precise_width)) {
493 while (*width) {
494 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
495 break;
496 }
497 width++;
498 }
499 xres_new = *width;
500 } else {
501 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
502 }
503 if (!xres_new) return 0;
504 if (xres != xres_new) {
505 printk(KERN_INFO "matroxfb: cannot set xres to %d, rounded up to %d\n", xres, xres_new);
506 }
507 return xres_new;
508}
509
510static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
511
512 DBG(__FUNCTION__)
513
514 switch (var->bits_per_pixel) {
515 case 4:
516 return 16; /* pseudocolor... 16 entries HW palette */
517 case 8:
518 return 256; /* pseudocolor... 256 entries HW palette */
519 case 16:
520 return 16; /* directcolor... 16 entries SW palette */
521 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
522 case 24:
523 return 16; /* directcolor... 16 entries SW palette */
524 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
525 case 32:
526 return 16; /* directcolor... 16 entries SW palette */
527 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
528 }
529 return 16; /* return something reasonable... or panic()? */
530}
531
532static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
533 struct RGBT {
534 unsigned char bpp;
535 struct {
536 unsigned char offset,
537 length;
538 } red,
539 green,
540 blue,
541 transp;
542 signed char visual;
543 };
544 static const struct RGBT table[]= {
545 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
546 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
547 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
548 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
549 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
550 };
551 struct RGBT const *rgbt;
552 unsigned int bpp = var->bits_per_pixel;
553 unsigned int vramlen;
554 unsigned int memlen;
555
556 DBG(__FUNCTION__)
557
558 switch (bpp) {
559 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
560 break;
561 case 8: break;
562 case 16: break;
563 case 24: break;
564 case 32: break;
565 default: return -EINVAL;
566 }
567 *ydstorg = 0;
568 vramlen = ACCESS_FBINFO(video.len_usable);
569 if (var->yres_virtual < var->yres)
570 var->yres_virtual = var->yres;
571 if (var->xres_virtual < var->xres)
572 var->xres_virtual = var->xres;
573
574 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
575 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
576 if (memlen > vramlen) {
577 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
578 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
579 }
580 /* There is hardware bug that no line can cross 4MB boundary */
581 /* give up for CFB24, it is impossible to easy workaround it */
582 /* for other try to do something */
583 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
584 if (bpp == 24) {
585 /* sorry */
586 } else {
587 unsigned int linelen;
588 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
589 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
590 unsigned int max_yres;
591
592 while (m1) {
593 int t;
594
595 while (m2 >= m1) m2 -= m1;
596 t = m1;
597 m1 = m2;
598 m2 = t;
599 }
600 m2 = linelen * PAGE_SIZE / m2;
601 *ydstorg = m2 = 0x400000 % m2;
602 max_yres = (vramlen - m2) / linelen;
603 if (var->yres_virtual > max_yres)
604 var->yres_virtual = max_yres;
605 }
606 }
607 /* YDSTLEN contains only signed 16bit value */
608 if (var->yres_virtual > 32767)
609 var->yres_virtual = 32767;
610 /* we must round yres/xres down, we already rounded y/xres_virtual up
611 if it was possible. We should return -EINVAL, but I disagree */
612 if (var->yres_virtual < var->yres)
613 var->yres = var->yres_virtual;
614 if (var->xres_virtual < var->xres)
615 var->xres = var->xres_virtual;
616 if (var->xoffset + var->xres > var->xres_virtual)
617 var->xoffset = var->xres_virtual - var->xres;
618 if (var->yoffset + var->yres > var->yres_virtual)
619 var->yoffset = var->yres_virtual - var->yres;
620
621 if (bpp == 16 && var->green.length == 5) {
622 bpp--; /* an artifical value - 15 */
623 }
624
625 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
626#define SETCLR(clr)\
627 var->clr.offset = rgbt->clr.offset;\
628 var->clr.length = rgbt->clr.length
629 SETCLR(red);
630 SETCLR(green);
631 SETCLR(blue);
632 SETCLR(transp);
633#undef SETCLR
634 *visual = rgbt->visual;
635
636 if (bpp > 8)
637 dprintk("matroxfb: truecolor: "
638 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
639 var->transp.length, var->red.length, var->green.length, var->blue.length,
640 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
641
642 *video_cmap_len = matroxfb_get_cmap_len(var);
643 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
644 var->xres_virtual, var->yres_virtual);
645 return 0;
646}
647
648static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
649 unsigned blue, unsigned transp,
650 struct fb_info *fb_info)
651{
652#ifdef CONFIG_FB_MATROX_MULTIHEAD
653 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
654#endif
655
656 DBG(__FUNCTION__)
657
658 /*
659 * Set a single color register. The values supplied are
660 * already rounded down to the hardware's capabilities
661 * (according to the entries in the `var' structure). Return
662 * != 0 for invalid regno.
663 */
664
665 if (regno >= ACCESS_FBINFO(curr.cmap_len))
666 return 1;
667
668 if (ACCESS_FBINFO(fbcon).var.grayscale) {
669 /* gray = 0.30*R + 0.59*G + 0.11*B */
670 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
671 }
672
673 red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
674 green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
675 blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
676 transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
677
678 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
679 case 4:
680 case 8:
681 mga_outb(M_DAC_REG, regno);
682 mga_outb(M_DAC_VAL, red);
683 mga_outb(M_DAC_VAL, green);
684 mga_outb(M_DAC_VAL, blue);
685 break;
686 case 16:
687 {
688 u_int16_t col =
689 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
690 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
691 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
692 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
693 ACCESS_FBINFO(cmap[regno]) = col | (col << 16);
694 }
695 break;
696 case 24:
697 case 32:
698 ACCESS_FBINFO(cmap[regno]) =
699 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
700 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
701 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
702 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
703 break;
704 }
705 return 0;
706}
707
708static void matroxfb_init_fix(WPMINFO2)
709{
710 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
711 DBG(__FUNCTION__)
712
713 strcpy(fix->id,"MATROX");
714
715 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
716 fix->ypanstep = 1;
717 fix->ywrapstep = 0;
718 fix->mmio_start = ACCESS_FBINFO(mmio.base);
719 fix->mmio_len = ACCESS_FBINFO(mmio.len);
720 fix->accel = ACCESS_FBINFO(devflags.accelerator);
721}
722
723static void matroxfb_update_fix(WPMINFO2)
724{
725 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
726 DBG(__FUNCTION__)
727
728 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
729 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
730}
731
732static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
733{
734 int err;
735 int visual;
736 int cmap_len;
737 unsigned int ydstorg;
738 MINFO_FROM_INFO(info);
739
740 if (ACCESS_FBINFO(dead)) {
741 return -ENXIO;
742 }
743 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
744 return err;
745 return 0;
746}
747
748static int matroxfb_set_par(struct fb_info *info)
749{
750 int err;
751 int visual;
752 int cmap_len;
753 unsigned int ydstorg;
754 struct fb_var_screeninfo *var;
755 MINFO_FROM_INFO(info);
756
757 DBG(__FUNCTION__)
758
759 if (ACCESS_FBINFO(dead)) {
760 return -ENXIO;
761 }
762
763 var = &info->var;
764 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
765 return err;
766 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
767 matroxfb_update_fix(PMINFO2);
768 ACCESS_FBINFO(fbcon).fix.visual = visual;
769 ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
770 ACCESS_FBINFO(fbcon).fix.type_aux = 0;
771 ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
772 {
773 unsigned int pos;
774
775 ACCESS_FBINFO(curr.cmap_len) = cmap_len;
776 ydstorg += ACCESS_FBINFO(devflags.ydstorg);
777 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
778 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
779 if (var->bits_per_pixel == 4)
780 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
781 else
782 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
783 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
784 { struct my_timming mt;
785 struct matrox_hw_state* hw;
786 int out;
787
788 matroxfb_var2my(var, &mt);
789 mt.crtc = MATROXFB_SRC_CRTC1;
790 /* CRTC1 delays */
791 switch (var->bits_per_pixel) {
792 case 0: mt.delay = 31 + 0; break;
793 case 16: mt.delay = 21 + 8; break;
794 case 24: mt.delay = 17 + 8; break;
795 case 32: mt.delay = 16 + 8; break;
796 default: mt.delay = 31 + 8; break;
797 }
798
799 hw = &ACCESS_FBINFO(hw);
800
801 down_read(&ACCESS_FBINFO(altout).lock);
802 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
803 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
804 ACCESS_FBINFO(outputs[out]).output->compute) {
805 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
806 }
807 }
808 up_read(&ACCESS_FBINFO(altout).lock);
809 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
810 ACCESS_FBINFO(crtc1).mnp = mt.mnp;
811 ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
812 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
813 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
814
815 hw->CRTC[0x0D] = pos & 0xFF;
816 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
817 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
818 hw->CRTCEXT[8] = pos >> 21;
819 ACCESS_FBINFO(hw_switch->restore(PMINFO2));
820 update_crtc2(PMINFO pos);
821 down_read(&ACCESS_FBINFO(altout).lock);
822 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
823 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
824 ACCESS_FBINFO(outputs[out]).output->program) {
825 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
826 }
827 }
828 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
829 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
830 ACCESS_FBINFO(outputs[out]).output->start) {
831 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
832 }
833 }
834 up_read(&ACCESS_FBINFO(altout).lock);
835 matrox_cfbX_init(PMINFO2);
836 }
837 }
838 ACCESS_FBINFO(initialized) = 1;
839 return 0;
840}
841
842static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
843{
844 unsigned int sts1;
845
846 matroxfb_enable_irq(PMINFO 0);
847 memset(vblank, 0, sizeof(*vblank));
848 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
849 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
850 sts1 = mga_inb(M_INSTS1);
851 vblank->vcount = mga_inl(M_VCOUNT);
852 /* BTW, on my PIII/450 with G400, reading M_INSTS1
853 byte makes this call about 12% slower (1.70 vs. 2.05 us
854 per ioctl()) */
855 if (sts1 & 1)
856 vblank->flags |= FB_VBLANK_HBLANKING;
857 if (sts1 & 8)
858 vblank->flags |= FB_VBLANK_VSYNCING;
859 if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
860 vblank->flags |= FB_VBLANK_VBLANKING;
861 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
862 vblank->flags |= FB_VBLANK_HAVE_COUNT;
863 /* Only one writer, aligned int value...
864 it should work without lock and without atomic_t */
865 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
866 }
867 return 0;
868}
869
870static struct matrox_altout panellink_output = {
871 .name = "Panellink output",
872};
873
874static int matroxfb_ioctl(struct inode *inode, struct file *file,
875 unsigned int cmd, unsigned long arg,
876 struct fb_info *info)
877{
878 void __user *argp = (void __user *)arg;
879 MINFO_FROM_INFO(info);
880
881 DBG(__FUNCTION__)
882
883 if (ACCESS_FBINFO(dead)) {
884 return -ENXIO;
885 }
886
887 switch (cmd) {
888 case FBIOGET_VBLANK:
889 {
890 struct fb_vblank vblank;
891 int err;
892
893 err = matroxfb_get_vblank(PMINFO &vblank);
894 if (err)
895 return err;
896 if (copy_to_user(argp, &vblank, sizeof(vblank)))
897 return -EFAULT;
898 return 0;
899 }
900 case FBIO_WAITFORVSYNC:
901 {
902 u_int32_t crt;
903
904 if (get_user(crt, (u_int32_t __user *)arg))
905 return -EFAULT;
906
907 return matroxfb_wait_for_sync(PMINFO crt);
908 }
909 case MATROXFB_SET_OUTPUT_MODE:
910 {
911 struct matroxioc_output_mode mom;
912 struct matrox_altout *oproc;
913 int val;
914
915 if (copy_from_user(&mom, argp, sizeof(mom)))
916 return -EFAULT;
917 if (mom.output >= MATROXFB_MAX_OUTPUTS)
918 return -ENXIO;
919 down_read(&ACCESS_FBINFO(altout.lock));
920 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
921 if (!oproc) {
922 val = -ENXIO;
923 } else if (!oproc->verifymode) {
924 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
925 val = 0;
926 } else {
927 val = -EINVAL;
928 }
929 } else {
930 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
931 }
932 if (!val) {
933 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
934 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
935 val = 1;
936 }
937 }
938 up_read(&ACCESS_FBINFO(altout.lock));
939 if (val != 1)
940 return val;
941 switch (ACCESS_FBINFO(outputs[mom.output]).src) {
942 case MATROXFB_SRC_CRTC1:
943 matroxfb_set_par(info);
944 break;
945 case MATROXFB_SRC_CRTC2:
946 {
947 struct matroxfb_dh_fb_info* crtc2;
948
949 down_read(&ACCESS_FBINFO(crtc2.lock));
950 crtc2 = ACCESS_FBINFO(crtc2.info);
951 if (crtc2)
952 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
953 up_read(&ACCESS_FBINFO(crtc2.lock));
954 }
955 break;
956 }
957 return 0;
958 }
959 case MATROXFB_GET_OUTPUT_MODE:
960 {
961 struct matroxioc_output_mode mom;
962 struct matrox_altout *oproc;
963 int val;
964
965 if (copy_from_user(&mom, argp, sizeof(mom)))
966 return -EFAULT;
967 if (mom.output >= MATROXFB_MAX_OUTPUTS)
968 return -ENXIO;
969 down_read(&ACCESS_FBINFO(altout.lock));
970 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
971 if (!oproc) {
972 val = -ENXIO;
973 } else {
974 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
975 val = 0;
976 }
977 up_read(&ACCESS_FBINFO(altout.lock));
978 if (val)
979 return val;
980 if (copy_to_user(argp, &mom, sizeof(mom)))
981 return -EFAULT;
982 return 0;
983 }
984 case MATROXFB_SET_OUTPUT_CONNECTION:
985 {
986 u_int32_t tmp;
987 int i;
988 int changes;
989
990 if (copy_from_user(&tmp, argp, sizeof(tmp)))
991 return -EFAULT;
992 for (i = 0; i < 32; i++) {
993 if (tmp & (1 << i)) {
994 if (i >= MATROXFB_MAX_OUTPUTS)
995 return -ENXIO;
996 if (!ACCESS_FBINFO(outputs[i]).output)
997 return -ENXIO;
998 switch (ACCESS_FBINFO(outputs[i]).src) {
999 case MATROXFB_SRC_NONE:
1000 case MATROXFB_SRC_CRTC1:
1001 break;
1002 default:
1003 return -EBUSY;
1004 }
1005 }
1006 }
1007 if (ACCESS_FBINFO(devflags.panellink)) {
1008 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1009 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1010 return -EINVAL;
1011 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1012 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
1013 return -EBUSY;
1014 }
1015 }
1016 }
1017 }
1018 changes = 0;
1019 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1020 if (tmp & (1 << i)) {
1021 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
1022 changes = 1;
1023 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
1024 }
1025 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1026 changes = 1;
1027 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
1028 }
1029 }
1030 if (!changes)
1031 return 0;
1032 matroxfb_set_par(info);
1033 return 0;
1034 }
1035 case MATROXFB_GET_OUTPUT_CONNECTION:
1036 {
1037 u_int32_t conn = 0;
1038 int i;
1039
1040 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1041 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1042 conn |= 1 << i;
1043 }
1044 }
1045 if (put_user(conn, (u_int32_t __user *)arg))
1046 return -EFAULT;
1047 return 0;
1048 }
1049 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1050 {
1051 u_int32_t conn = 0;
1052 int i;
1053
1054 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1055 if (ACCESS_FBINFO(outputs[i]).output) {
1056 switch (ACCESS_FBINFO(outputs[i]).src) {
1057 case MATROXFB_SRC_NONE:
1058 case MATROXFB_SRC_CRTC1:
1059 conn |= 1 << i;
1060 break;
1061 }
1062 }
1063 }
1064 if (ACCESS_FBINFO(devflags.panellink)) {
1065 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1066 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1067 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1068 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1069 }
1070 if (put_user(conn, (u_int32_t __user *)arg))
1071 return -EFAULT;
1072 return 0;
1073 }
1074 case MATROXFB_GET_ALL_OUTPUTS:
1075 {
1076 u_int32_t conn = 0;
1077 int i;
1078
1079 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1080 if (ACCESS_FBINFO(outputs[i]).output) {
1081 conn |= 1 << i;
1082 }
1083 }
1084 if (put_user(conn, (u_int32_t __user *)arg))
1085 return -EFAULT;
1086 return 0;
1087 }
1088 case VIDIOC_QUERYCAP:
1089 {
1090 struct v4l2_capability r;
1091
1092 memset(&r, 0, sizeof(r));
1093 strcpy(r.driver, "matroxfb");
1094 strcpy(r.card, "Matrox");
1095 sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
1096 r.version = KERNEL_VERSION(1,0,0);
1097 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1098 if (copy_to_user(argp, &r, sizeof(r)))
1099 return -EFAULT;
1100 return 0;
1101
1102 }
1103 case VIDIOC_QUERYCTRL:
1104 {
1105 struct v4l2_queryctrl qctrl;
1106 int err;
1107
1108 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1109 return -EFAULT;
1110
1111 down_read(&ACCESS_FBINFO(altout).lock);
1112 if (!ACCESS_FBINFO(outputs[1]).output) {
1113 err = -ENXIO;
1114 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
1115 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
1116 } else {
1117 err = -EINVAL;
1118 }
1119 up_read(&ACCESS_FBINFO(altout).lock);
1120 if (err >= 0 &&
1121 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1122 return -EFAULT;
1123 return err;
1124 }
1125 case VIDIOC_G_CTRL:
1126 {
1127 struct v4l2_control ctrl;
1128 int err;
1129
1130 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1131 return -EFAULT;
1132
1133 down_read(&ACCESS_FBINFO(altout).lock);
1134 if (!ACCESS_FBINFO(outputs[1]).output) {
1135 err = -ENXIO;
1136 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
1137 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1138 } else {
1139 err = -EINVAL;
1140 }
1141 up_read(&ACCESS_FBINFO(altout).lock);
1142 if (err >= 0 &&
1143 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1144 return -EFAULT;
1145 return err;
1146 }
1147 case VIDIOC_S_CTRL_OLD:
1148 case VIDIOC_S_CTRL:
1149 {
1150 struct v4l2_control ctrl;
1151 int err;
1152
1153 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1154 return -EFAULT;
1155
1156 down_read(&ACCESS_FBINFO(altout).lock);
1157 if (!ACCESS_FBINFO(outputs[1]).output) {
1158 err = -ENXIO;
1159 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
1160 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1161 } else {
1162 err = -EINVAL;
1163 }
1164 up_read(&ACCESS_FBINFO(altout).lock);
1165 return err;
1166 }
1167 }
1168 return -ENOTTY;
1169}
1170
1171/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1172
1173static int matroxfb_blank(int blank, struct fb_info *info)
1174{
1175 int seq;
1176 int crtc;
1177 CRITFLAGS
1178 MINFO_FROM_INFO(info);
1179
1180 DBG(__FUNCTION__)
1181
1182 if (ACCESS_FBINFO(dead))
1183 return 1;
1184
1185 switch (blank) {
1186 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1187 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1188 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1189 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1190 default: seq = 0x00; crtc = 0x00; break;
1191 }
1192
1193 CRITBEGIN
1194
1195 mga_outb(M_SEQ_INDEX, 1);
1196 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1197 mga_outb(M_EXTVGA_INDEX, 1);
1198 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1199
1200 CRITEND
1201 return 0;
1202}
1203
1204static struct fb_ops matroxfb_ops = {
1205 .owner = THIS_MODULE,
1206 .fb_open = matroxfb_open,
1207 .fb_release = matroxfb_release,
1208 .fb_check_var = matroxfb_check_var,
1209 .fb_set_par = matroxfb_set_par,
1210 .fb_setcolreg = matroxfb_setcolreg,
1211 .fb_pan_display =matroxfb_pan_display,
1212 .fb_blank = matroxfb_blank,
1213 .fb_ioctl = matroxfb_ioctl,
1214/* .fb_fillrect = <set by matrox_cfbX_init>, */
1215/* .fb_copyarea = <set by matrox_cfbX_init>, */
1216/* .fb_imageblit = <set by matrox_cfbX_init>, */
1217/* .fb_cursor = <set by matrox_cfbX_init>, */
1218};
1219
1220#define RSDepth(X) (((X) >> 8) & 0x0F)
1221#define RS8bpp 0x1
1222#define RS15bpp 0x2
1223#define RS16bpp 0x3
1224#define RS32bpp 0x4
1225#define RS4bpp 0x5
1226#define RS24bpp 0x6
1227#define RSText 0x7
1228#define RSText8 0x8
1229/* 9-F */
1230static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1231 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1232 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1233 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1234 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1235 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1236 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1237 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1238 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1239};
1240
1241/* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1242static unsigned int mem; /* "matrox:mem:xxxxxM" */
1243static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1244static int inv24; /* "matrox:inv24" */
1245static int cross4MB = -1; /* "matrox:cross4MB" */
1246static int disabled; /* "matrox:disabled" */
1247static int noaccel; /* "matrox:noaccel" */
1248static int nopan; /* "matrox:nopan" */
1249static int no_pci_retry; /* "matrox:nopciretry" */
1250static int novga; /* "matrox:novga" */
1251static int nobios; /* "matrox:nobios" */
1252static int noinit = 1; /* "matrox:init" */
1253static int inverse; /* "matrox:inverse" */
1254static int sgram; /* "matrox:sgram" */
1255#ifdef CONFIG_MTRR
1256static int mtrr = 1; /* "matrox:nomtrr" */
1257#endif
1258static int grayscale; /* "matrox:grayscale" */
1259static int dev = -1; /* "matrox:dev:xxxxx" */
1260static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1261static int depth = -1; /* "matrox:depth:xxxxx" */
1262static unsigned int xres; /* "matrox:xres:xxxxx" */
1263static unsigned int yres; /* "matrox:yres:xxxxx" */
1264static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1265static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1266static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1267static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1268static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1269static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1270static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1271static int sync = -1; /* "matrox:sync:xxxxx" */
1272static unsigned int fv; /* "matrox:fv:xxxxx" */
1273static unsigned int fh; /* "matrox:fh:xxxxxk" */
1274static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1275static int dfp; /* "matrox:dfp */
1276static int dfp_type = -1; /* "matrox:dfp:xxx */
1277static int memtype = -1; /* "matrox:memtype:xxx" */
1278static char outputs[8]; /* "matrox:outputs:xxx" */
1279
1280#ifndef MODULE
1281static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1282#endif
1283
1284static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
1285 vaddr_t vm;
1286 unsigned int offs;
1287 unsigned int offs2;
1288 unsigned char store;
1289 unsigned char bytes[32];
1290 unsigned char* tmp;
1291
1292 DBG(__FUNCTION__)
1293
1294 vm = ACCESS_FBINFO(video.vbase);
1295 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1296 /* at least 2MB */
1297 if (maxSize < 0x0200000) return 0;
1298 if (maxSize > 0x2000000) maxSize = 0x2000000;
1299
1300 mga_outb(M_EXTVGA_INDEX, 0x03);
1301 mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) | 0x80);
1302
1303 store = mga_readb(vm, 0x1234);
1304 tmp = bytes;
1305 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1306 *tmp++ = mga_readb(vm, offs);
1307 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1308 mga_writeb(vm, offs, 0x02);
1309 if (ACCESS_FBINFO(features.accel.has_cacheflush))
1310 mga_outb(M_CACHEFLUSH, 0x00);
1311 else
1312 mga_writeb(vm, 0x1234, 0x99);
1313 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1314 if (mga_readb(vm, offs) != 0x02)
1315 break;
1316 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1317 if (mga_readb(vm, offs))
1318 break;
1319 }
1320 tmp = bytes;
1321 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1322 mga_writeb(vm, offs2, *tmp++);
1323 mga_writeb(vm, 0x1234, store);
1324
1325 mga_outb(M_EXTVGA_INDEX, 0x03);
1326 mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) & ~0x80);
1327
1328 *realSize = offs - 0x100000;
1329#ifdef CONFIG_FB_MATROX_MILLENIUM
1330 ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF));
1331#endif
1332 return 1;
1333}
1334
1335struct video_board {
1336 int maxvram;
1337 int maxdisplayable;
1338 int accelID;
1339 struct matrox_switch* lowlevel;
1340 };
1341#ifdef CONFIG_FB_MATROX_MILLENIUM
1342static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1343static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1344static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1345#endif /* CONFIG_FB_MATROX_MILLENIUM */
1346#ifdef CONFIG_FB_MATROX_MYSTIQUE
1347static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1348#endif /* CONFIG_FB_MATROX_MYSTIQUE */
1349#ifdef CONFIG_FB_MATROX_G
1350static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1351static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1352#ifdef CONFIG_FB_MATROX_32MB
1353/* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1354 whole 32MB */
1355static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1356#else
1357static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1358#endif
1359#endif
1360
1361#define DEVF_VIDEO64BIT 0x0001
1362#define DEVF_SWAPS 0x0002
1363#define DEVF_SRCORG 0x0004
1364#define DEVF_DUALHEAD 0x0008
1365#define DEVF_CROSS4MB 0x0010
1366#define DEVF_TEXT4B 0x0020
1367/* #define DEVF_recycled 0x0040 */
1368/* #define DEVF_recycled 0x0080 */
1369#define DEVF_SUPPORT32MB 0x0100
1370#define DEVF_ANY_VXRES 0x0200
1371#define DEVF_TEXT16B 0x0400
1372#define DEVF_CRTC2 0x0800
1373#define DEVF_MAVEN_CAPABLE 0x1000
1374#define DEVF_PANELLINK_CAPABLE 0x2000
1375#define DEVF_G450DAC 0x4000
1376
1377#define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1378#define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1379#define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1380#define DEVF_G200 (DEVF_G2CORE)
1381#define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1382/* if you'll find how to drive DFP... */
1383#define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1384#define DEVF_G550 (DEVF_G450)
1385
1386static struct board {
1387 unsigned short vendor, device, rev, svid, sid;
1388 unsigned int flags;
1389 unsigned int maxclk;
1390 enum mga_chip chip;
1391 struct video_board* base;
1392 const char* name;
1393 } dev_list[] = {
1394#ifdef CONFIG_FB_MATROX_MILLENIUM
1395 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1396 0, 0,
1397 DEVF_TEXT4B,
1398 230000,
1399 MGA_2064,
1400 &vbMillennium,
1401 "Millennium (PCI)"},
1402 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1403 0, 0,
1404 DEVF_SWAPS,
1405 220000,
1406 MGA_2164,
1407 &vbMillennium2,
1408 "Millennium II (PCI)"},
1409 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1410 0, 0,
1411 DEVF_SWAPS,
1412 250000,
1413 MGA_2164,
1414 &vbMillennium2A,
1415 "Millennium II (AGP)"},
1416#endif
1417#ifdef CONFIG_FB_MATROX_MYSTIQUE
1418 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1419 0, 0,
1420 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1421 180000,
1422 MGA_1064,
1423 &vbMystique,
1424 "Mystique (PCI)"},
1425 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1426 0, 0,
1427 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1428 220000,
1429 MGA_1164,
1430 &vbMystique,
1431 "Mystique 220 (PCI)"},
1432#endif
1433#ifdef CONFIG_FB_MATROX_G
1434 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1435 0, 0,
1436 DEVF_G100,
1437 230000,
1438 MGA_G100,
1439 &vbG100,
1440 "MGA-G100 (PCI)"},
1441 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1442 0, 0,
1443 DEVF_G100,
1444 230000,
1445 MGA_G100,
1446 &vbG100,
1447 "MGA-G100 (AGP)"},
1448 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1449 0, 0,
1450 DEVF_G200,
1451 250000,
1452 MGA_G200,
1453 &vbG200,
1454 "MGA-G200 (PCI)"},
1455 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1456 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1457 DEVF_G200,
1458 220000,
1459 MGA_G200,
1460 &vbG200,
1461 "MGA-G200 (AGP)"},
1462 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1463 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1464 DEVF_G200,
1465 230000,
1466 MGA_G200,
1467 &vbG200,
1468 "Mystique G200 (AGP)"},
1469 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1470 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1471 DEVF_G200,
1472 250000,
1473 MGA_G200,
1474 &vbG200,
1475 "Millennium G200 (AGP)"},
1476 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1477 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1478 DEVF_G200,
1479 230000,
1480 MGA_G200,
1481 &vbG200,
1482 "Marvel G200 (AGP)"},
1483 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1484 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1485 DEVF_G200,
1486 230000,
1487 MGA_G200,
1488 &vbG200,
1489 "MGA-G200 (AGP)"},
1490 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1491 0, 0,
1492 DEVF_G200,
1493 230000,
1494 MGA_G200,
1495 &vbG200,
1496 "G200 (AGP)"},
1497 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1498 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1499 DEVF_G400,
1500 360000,
1501 MGA_G400,
1502 &vbG400,
1503 "Millennium G400 MAX (AGP)"},
1504 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1505 0, 0,
1506 DEVF_G400,
1507 300000,
1508 MGA_G400,
1509 &vbG400,
1510 "G400 (AGP)"},
1511 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1512 0, 0,
1513 DEVF_G450,
1514 360000,
1515 MGA_G450,
1516 &vbG400,
1517 "G450"},
1518 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1519 0, 0,
1520 DEVF_G550,
1521 360000,
1522 MGA_G550,
1523 &vbG400,
1524 "G550"},
1525#endif
1526 {0, 0, 0xFF,
1527 0, 0,
1528 0,
1529 0,
1530 0,
1531 NULL,
1532 NULL}};
1533
1534#ifndef MODULE
1535static struct fb_videomode defaultmode = {
1536 /* 640x480 @ 60Hz, 31.5 kHz */
1537 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1538 0, FB_VMODE_NONINTERLACED
1539};
1540#endif /* !MODULE */
1541
1542static int hotplug = 0;
1543
1544static void setDefaultOutputs(WPMINFO2) {
1545 unsigned int i;
1546 const char* ptr;
1547
1548 ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1;
1549 if (ACCESS_FBINFO(devflags.g450dac)) {
1550 ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1;
1551 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1552 } else if (dfp) {
1553 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1554 }
1555 ptr = outputs;
1556 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1557 char c = *ptr++;
1558
1559 if (c == 0) {
1560 break;
1561 }
1562 if (c == '0') {
1563 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE;
1564 } else if (c == '1') {
1565 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1;
1566 } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) {
1567 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2;
1568 } else {
1569 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1570 break;
1571 }
1572 }
1573 /* Nullify this option for subsequent adapters */
1574 outputs[0] = 0;
1575}
1576
1577static int initMatrox2(WPMINFO struct board* b){
1578 unsigned long ctrlptr_phys = 0;
1579 unsigned long video_base_phys = 0;
1580 unsigned int memsize;
1581 int err;
1582
1583 static struct pci_device_id intel_82437[] = {
1584 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1585 { },
1586 };
1587
1588 DBG(__FUNCTION__)
1589
1590 /* set default values... */
1591 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1592
1593 ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
1594 ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
1595 ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
1596
1597 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1598 ACCESS_FBINFO(capable.plnwt) = 1;
1599 ACCESS_FBINFO(chip) = b->chip;
1600 ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
1601 ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
1602 if (b->flags & DEVF_TEXT4B) {
1603 ACCESS_FBINFO(devflags.vgastep) = 4;
1604 ACCESS_FBINFO(devflags.textmode) = 4;
1605 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1606 } else if (b->flags & DEVF_TEXT16B) {
1607 ACCESS_FBINFO(devflags.vgastep) = 16;
1608 ACCESS_FBINFO(devflags.textmode) = 1;
1609 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1610 } else {
1611 ACCESS_FBINFO(devflags.vgastep) = 8;
1612 ACCESS_FBINFO(devflags.textmode) = 1;
1613 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
1614 }
1615#ifdef CONFIG_FB_MATROX_32MB
1616 ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
1617#endif
1618 ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
1619 ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
1620 ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1621 ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
1622 ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
1623 ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
1624 ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
1625 ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
1626 setDefaultOutputs(PMINFO2);
1627 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1628 ACCESS_FBINFO(outputs[2]).data = MINFO;
1629 ACCESS_FBINFO(outputs[2]).output = &panellink_output;
1630 ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src;
1631 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
1632 ACCESS_FBINFO(devflags.panellink) = 1;
1633 }
1634
1635 if (ACCESS_FBINFO(capable.cross4MB) < 0)
1636 ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
1637 if (b->flags & DEVF_SWAPS) {
1638 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1639 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1640 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
1641 } else {
1642 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1643 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1644 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
1645 }
1646 err = -EINVAL;
1647 if (!ctrlptr_phys) {
1648 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1649 goto fail;
1650 }
1651 if (!video_base_phys) {
1652 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1653 goto fail;
1654 }
1655 memsize = b->base->maxvram;
1656 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1657 goto fail;
1658 }
1659 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1660 goto failCtrlMR;
1661 }
1662 ACCESS_FBINFO(video.len_maximum) = memsize;
1663 /* convert mem (autodetect k, M) */
1664 if (mem < 1024) mem *= 1024;
1665 if (mem < 0x00100000) mem *= 1024;
1666
1667 if (mem && (mem < memsize))
1668 memsize = mem;
1669 err = -ENOMEM;
1670 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
1671 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1672 goto failVideoMR;
1673 }
1674 ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
1675 ACCESS_FBINFO(mmio.len) = 16384;
1676 ACCESS_FBINFO(video.base) = video_base_phys;
1677 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
1678 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1679 video_base_phys, memsize);
1680 goto failCtrlIO;
1681 }
1682 {
1683 u_int32_t cmd;
1684 u_int32_t mga_option;
1685
1686 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option);
1687 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd);
1688 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1689 mga_option |= MX_OPTION_BSWAP;
1690 /* disable palette snooping */
1691 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1692 if (pci_dev_present(intel_82437)) {
1693 if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
1694 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1695 }
1696 mga_option |= 0x20000000;
1697 ACCESS_FBINFO(devflags.nopciretry) = 1;
1698 }
1699 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
1700 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
1701 ACCESS_FBINFO(hw).MXoptionReg = mga_option;
1702
1703 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1704 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1705 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
1706 }
1707
1708 err = -ENXIO;
1709 matroxfb_read_pins(PMINFO2);
1710 if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
1711 goto failVideoIO;
1712 }
1713
1714 err = -ENOMEM;
1715 if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) {
1716 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1717 goto failVideoIO;
1718 }
1719 ACCESS_FBINFO(devflags.ydstorg) = 0;
1720
1721 ACCESS_FBINFO(video.base) = video_base_phys;
1722 ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
1723 if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
1724 ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
1725#ifdef CONFIG_MTRR
1726 if (mtrr) {
1727 ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
1728 ACCESS_FBINFO(mtrr.vram_valid) = 1;
1729 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1730 }
1731#endif /* CONFIG_MTRR */
1732
1733 if (!ACCESS_FBINFO(devflags.novga))
1734 request_region(0x3C0, 32, "matrox");
1735 matroxfb_g450_connect(PMINFO2);
1736 ACCESS_FBINFO(hw_switch->reset(PMINFO2));
1737
1738 ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
1739 ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
1740 ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
1741 ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
1742 ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
1743
1744 /* static settings */
1745 vesafb_defined.red = colors[depth-1].red;
1746 vesafb_defined.green = colors[depth-1].green;
1747 vesafb_defined.blue = colors[depth-1].blue;
1748 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1749 vesafb_defined.grayscale = grayscale;
1750 vesafb_defined.vmode = 0;
1751 if (noaccel)
1752 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1753
1754 ACCESS_FBINFO(fbops) = matroxfb_ops;
1755 ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
1756 ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
1757 /* after __init time we are like module... no logo */
1758 ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1759 ACCESS_FBINFO(fbcon.flags) |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1760 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1761 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1762 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1763 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1764 FBINFO_HWACCEL_YPAN; /* And vertical panning */
1765 ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
1766 fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
1767
1768#ifndef MODULE
1769 /* mode database is marked __init!!! */
1770 if (!hotplug) {
1771 fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
1772 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1773 }
1774#endif /* !MODULE */
1775
1776 /* mode modifiers */
1777 if (hslen)
1778 vesafb_defined.hsync_len = hslen;
1779 if (vslen)
1780 vesafb_defined.vsync_len = vslen;
1781 if (left != ~0)
1782 vesafb_defined.left_margin = left;
1783 if (right != ~0)
1784 vesafb_defined.right_margin = right;
1785 if (upper != ~0)
1786 vesafb_defined.upper_margin = upper;
1787 if (lower != ~0)
1788 vesafb_defined.lower_margin = lower;
1789 if (xres)
1790 vesafb_defined.xres = xres;
1791 if (yres)
1792 vesafb_defined.yres = yres;
1793 if (sync != -1)
1794 vesafb_defined.sync = sync;
1795 else if (vesafb_defined.sync == ~0) {
1796 vesafb_defined.sync = 0;
1797 if (yres < 400)
1798 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1799 else if (yres < 480)
1800 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1801 }
1802
1803 /* fv, fh, maxclk limits was specified */
1804 {
1805 unsigned int tmp;
1806
1807 if (fv) {
1808 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1809 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1810 if ((tmp < fh) || (fh == 0)) fh = tmp;
1811 }
1812 if (fh) {
1813 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1814 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1815 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1816 }
1817 tmp = (maxclk + 499) / 500;
1818 if (tmp) {
1819 tmp = (2000000000 + tmp) / tmp;
1820 if (tmp > pixclock) pixclock = tmp;
1821 }
1822 }
1823 if (pixclock) {
1824 if (pixclock < 2000) /* > 500MHz */
1825 pixclock = 4000; /* 250MHz */
1826 if (pixclock > 1000000)
1827 pixclock = 1000000; /* 1MHz */
1828 vesafb_defined.pixclock = pixclock;
1829 }
1830
1831 /* FIXME: Where to move this?! */
1832#if defined(CONFIG_PPC_PMAC)
1833#ifndef MODULE
1834 if (_machine == _MACH_Pmac) {
1835 struct fb_var_screeninfo var;
1836 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1837 default_vmode = VMODE_640_480_60;
1838#ifdef CONFIG_NVRAM
1839 if (default_cmode == CMODE_NVRAM)
1840 default_cmode = nvram_read_byte(NV_CMODE);
1841#endif
1842 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1843 default_cmode = CMODE_8;
1844 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1845 var.accel_flags = vesafb_defined.accel_flags;
1846 var.xoffset = var.yoffset = 0;
1847 /* Note: mac_vmode_to_var() does not set all parameters */
1848 vesafb_defined = var;
1849 }
1850 }
1851#endif /* !MODULE */
1852#endif /* CONFIG_PPC_PMAC */
1853 vesafb_defined.xres_virtual = vesafb_defined.xres;
1854 if (nopan) {
1855 vesafb_defined.yres_virtual = vesafb_defined.yres;
1856 } else {
1857 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1858 to yres_virtual * xres_virtual < 2^32 */
1859 }
1860 matroxfb_init_fix(PMINFO2);
1861 /* Normalize values (namely yres_virtual) */
1862 matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon));
1863 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1864 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1865 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1866 * anyway. But we at least tried... */
1867 ACCESS_FBINFO(fbcon.var) = vesafb_defined;
1868 err = -EINVAL;
1869
1870 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1871 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1872 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1873 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1874 ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
1875
1876/* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1877 * and we do not want currcon == 0 for subsequent framebuffers */
1878
1879 ACCESS_FBINFO(fbcon).device = &ACCESS_FBINFO(pcidev)->dev;
1880 if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
1881 goto failVideoIO;
1882 }
1883 printk("fb%d: %s frame buffer device\n",
1884 ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
1885
1886 /* there is no console on this fb... but we have to initialize hardware
1887 * until someone tells me what is proper thing to do */
1888 if (!ACCESS_FBINFO(initialized)) {
1889 printk(KERN_INFO "fb%d: initializing hardware\n",
1890 ACCESS_FBINFO(fbcon.node));
1891 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1892 * already before, so register_framebuffer works correctly. */
1893 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1894 fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
1895 }
1896
1897 return 0;
1898failVideoIO:;
1899 matroxfb_g450_shutdown(PMINFO2);
1900 mga_iounmap(ACCESS_FBINFO(video.vbase));
1901failCtrlIO:;
1902 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
1903failVideoMR:;
1904 release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
1905failCtrlMR:;
1906 release_mem_region(ctrlptr_phys, 16384);
1907fail:;
1908 return err;
1909}
1910
1911static LIST_HEAD(matroxfb_list);
1912static LIST_HEAD(matroxfb_driver_list);
1913
1914#define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1915#define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1916int matroxfb_register_driver(struct matroxfb_driver* drv) {
1917 struct matrox_fb_info* minfo;
1918
1919 list_add(&drv->node, &matroxfb_driver_list);
1920 for (minfo = matroxfb_l(matroxfb_list.next);
1921 minfo != matroxfb_l(&matroxfb_list);
1922 minfo = matroxfb_l(minfo->next_fb.next)) {
1923 void* p;
1924
1925 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1926 continue;
1927 p = drv->probe(minfo);
1928 if (p) {
1929 minfo->drivers_data[minfo->drivers_count] = p;
1930 minfo->drivers[minfo->drivers_count++] = drv;
1931 }
1932 }
1933 return 0;
1934}
1935
1936void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1937 struct matrox_fb_info* minfo;
1938
1939 list_del(&drv->node);
1940 for (minfo = matroxfb_l(matroxfb_list.next);
1941 minfo != matroxfb_l(&matroxfb_list);
1942 minfo = matroxfb_l(minfo->next_fb.next)) {
1943 int i;
1944
1945 for (i = 0; i < minfo->drivers_count; ) {
1946 if (minfo->drivers[i] == drv) {
1947 if (drv && drv->remove)
1948 drv->remove(minfo, minfo->drivers_data[i]);
1949 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1950 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1951 } else
1952 i++;
1953 }
1954 }
1955}
1956
1957static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1958 struct matroxfb_driver* drv;
1959 int i = 0;
1960 list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
1961 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1962 drv != matroxfb_driver_l(&matroxfb_driver_list);
1963 drv = matroxfb_driver_l(drv->node.next)) {
1964 if (drv && drv->probe) {
1965 void *p = drv->probe(minfo);
1966 if (p) {
1967 minfo->drivers_data[i] = p;
1968 minfo->drivers[i++] = drv;
1969 if (i == MATROXFB_MAX_FB_DRIVERS)
1970 break;
1971 }
1972 }
1973 }
1974 minfo->drivers_count = i;
1975}
1976
1977static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
1978 int i;
1979
1980 list_del(&ACCESS_FBINFO(next_fb));
1981 for (i = 0; i < minfo->drivers_count; i++) {
1982 struct matroxfb_driver* drv = minfo->drivers[i];
1983
1984 if (drv && drv->remove)
1985 drv->remove(minfo, minfo->drivers_data[i]);
1986 }
1987}
1988
1989static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
1990 struct board* b;
1991 u_int8_t rev;
1992 u_int16_t svid;
1993 u_int16_t sid;
1994 struct matrox_fb_info* minfo;
1995 int err;
1996 u_int32_t cmd;
1997#ifndef CONFIG_FB_MATROX_MULTIHEAD
1998 static int registered = 0;
1999#endif
2000 DBG(__FUNCTION__)
2001
2002 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
2003 svid = pdev->subsystem_vendor;
2004 sid = pdev->subsystem_device;
2005 for (b = dev_list; b->vendor; b++) {
2006 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < rev)) continue;
2007 if (b->svid)
2008 if ((b->svid != svid) || (b->sid != sid)) continue;
2009 break;
2010 }
2011 /* not match... */
2012 if (!b->vendor)
2013 return -1;
2014 if (dev > 0) {
2015 /* not requested one... */
2016 dev--;
2017 return -1;
2018 }
2019 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2020 if (pci_enable_device(pdev)) {
2021 return -1;
2022 }
2023
2024#ifdef CONFIG_FB_MATROX_MULTIHEAD
2025 minfo = (struct matrox_fb_info*)kmalloc(sizeof(*minfo), GFP_KERNEL);
2026 if (!minfo)
2027 return -1;
2028#else
2029 if (registered) /* singlehead driver... */
2030 return -1;
2031 minfo = &matroxfb_global_mxinfo;
2032#endif
2033 memset(MINFO, 0, sizeof(*MINFO));
2034
2035 ACCESS_FBINFO(pcidev) = pdev;
2036 ACCESS_FBINFO(dead) = 0;
2037 ACCESS_FBINFO(usecount) = 0;
2038 ACCESS_FBINFO(userusecount) = 0;
2039
2040 pci_set_drvdata(pdev, MINFO);
2041 /* DEVFLAGS */
2042 ACCESS_FBINFO(devflags.memtype) = memtype;
2043 if (memtype != -1)
2044 noinit = 0;
2045 if (cmd & PCI_COMMAND_MEMORY) {
2046 ACCESS_FBINFO(devflags.novga) = novga;
2047 ACCESS_FBINFO(devflags.nobios) = nobios;
2048 ACCESS_FBINFO(devflags.noinit) = noinit;
2049 /* subsequent heads always needs initialization and must not enable BIOS */
2050 novga = 1;
2051 nobios = 1;
2052 noinit = 0;
2053 } else {
2054 ACCESS_FBINFO(devflags.novga) = 1;
2055 ACCESS_FBINFO(devflags.nobios) = 1;
2056 ACCESS_FBINFO(devflags.noinit) = 0;
2057 }
2058
2059 ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
2060 ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
2061 ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
2062 ACCESS_FBINFO(devflags.sgram) = sgram;
2063 ACCESS_FBINFO(capable.cross4MB) = cross4MB;
2064
2065 spin_lock_init(&ACCESS_FBINFO(lock.DAC));
2066 spin_lock_init(&ACCESS_FBINFO(lock.accel));
2067 init_rwsem(&ACCESS_FBINFO(crtc2.lock));
2068 init_rwsem(&ACCESS_FBINFO(altout.lock));
2069 ACCESS_FBINFO(irq_flags) = 0;
2070 init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
2071 init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
2072 ACCESS_FBINFO(crtc1.panpos) = -1;
2073
2074 err = initMatrox2(PMINFO b);
2075 if (!err) {
2076#ifndef CONFIG_FB_MATROX_MULTIHEAD
2077 registered = 1;
2078#endif
2079 matroxfb_register_device(MINFO);
2080 return 0;
2081 }
2082#ifdef CONFIG_FB_MATROX_MULTIHEAD
2083 kfree(minfo);
2084#endif
2085 return -1;
2086}
2087
2088static void pci_remove_matrox(struct pci_dev* pdev) {
2089 struct matrox_fb_info* minfo;
2090
2091 minfo = pci_get_drvdata(pdev);
2092 matroxfb_remove(PMINFO 1);
2093}
2094
2095static struct pci_device_id matroxfb_devices[] = {
2096#ifdef CONFIG_FB_MATROX_MILLENIUM
2097 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2098 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2099 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2100 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2101 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2102 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2103#endif
2104#ifdef CONFIG_FB_MATROX_MYSTIQUE
2105 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2106 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2107#endif
2108#ifdef CONFIG_FB_MATROX_G
2109 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2111 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2113 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2115 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2116 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2117 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2118 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2119 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2120 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2121#endif
2122 {0, 0,
2123 0, 0, 0, 0, 0}
2124};
2125
2126MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2127
2128
2129static struct pci_driver matroxfb_driver = {
2130 .name = "matroxfb",
2131 .id_table = matroxfb_devices,
2132 .probe = matroxfb_probe,
2133 .remove = pci_remove_matrox,
2134};
2135
2136/* **************************** init-time only **************************** */
2137
2138#define RSResolution(X) ((X) & 0x0F)
2139#define RS640x400 1
2140#define RS640x480 2
2141#define RS800x600 3
2142#define RS1024x768 4
2143#define RS1280x1024 5
2144#define RS1600x1200 6
2145#define RS768x576 7
2146#define RS960x720 8
2147#define RS1152x864 9
2148#define RS1408x1056 10
2149#define RS640x350 11
2150#define RS1056x344 12 /* 132 x 43 text */
2151#define RS1056x400 13 /* 132 x 50 text */
2152#define RS1056x480 14 /* 132 x 60 text */
2153#define RSNoxNo 15
2154/* 10-FF */
2155static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2156 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2157 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2158 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2159 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2160 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2161 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2162 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2163 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2164 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2165 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2166 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2167 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2168 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2169 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2170 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2171};
2172
2173#define RSCreate(X,Y) ((X) | ((Y) << 8))
2174static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2175/* default must be first */
2176 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2177 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2178 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2179 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2180 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2181 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2182 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2183 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2184 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2185 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2186 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2187 { 0x110, RSCreate(RS640x480, RS15bpp) },
2188 { 0x181, RSCreate(RS768x576, RS15bpp) },
2189 { 0x113, RSCreate(RS800x600, RS15bpp) },
2190 { 0x189, RSCreate(RS960x720, RS15bpp) },
2191 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2192 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2193 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2194 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2195 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2196 { 0x111, RSCreate(RS640x480, RS16bpp) },
2197 { 0x182, RSCreate(RS768x576, RS16bpp) },
2198 { 0x114, RSCreate(RS800x600, RS16bpp) },
2199 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2200 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2201 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2202 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2203 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2204 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2205 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2206 { 0x184, RSCreate(RS768x576, RS24bpp) },
2207 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2208 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2209 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2210 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2211 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2212 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2213 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2214 { 0x112, RSCreate(RS640x480, RS32bpp) },
2215 { 0x183, RSCreate(RS768x576, RS32bpp) },
2216 { 0x115, RSCreate(RS800x600, RS32bpp) },
2217 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2218 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2219 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2220 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2221 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2222 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2223 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2224 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2225 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2226 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2227 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2228 { 0, 0 }};
2229
2230static void __init matroxfb_init_params(void) {
2231 /* fh from kHz to Hz */
2232 if (fh < 1000)
2233 fh *= 1000; /* 1kHz minimum */
2234 /* maxclk */
2235 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2236 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2237 /* fix VESA number */
2238 if (vesa != ~0)
2239 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2240
2241 /* static settings */
2242 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2243 if (RSptr->vesa == vesa) break;
2244 }
2245 if (!RSptr->vesa) {
2246 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2247 RSptr = vesamap;
2248 }
2249 {
2250 int res = RSResolution(RSptr->info)-1;
2251 if (left == ~0)
2252 left = timmings[res].left;
2253 if (!xres)
2254 xres = timmings[res].xres;
2255 if (right == ~0)
2256 right = timmings[res].right;
2257 if (!hslen)
2258 hslen = timmings[res].hslen;
2259 if (upper == ~0)
2260 upper = timmings[res].upper;
2261 if (!yres)
2262 yres = timmings[res].yres;
2263 if (lower == ~0)
2264 lower = timmings[res].lower;
2265 if (!vslen)
2266 vslen = timmings[res].vslen;
2267 if (!(fv||fh||maxclk||pixclock))
2268 fv = timmings[res].vfreq;
2269 if (depth == -1)
2270 depth = RSDepth(RSptr->info);
2271 }
2272}
2273
2274static void __init matrox_init(void) {
2275 matroxfb_init_params();
2276 pci_register_driver(&matroxfb_driver);
2277 dev = -1; /* accept all new devices... */
2278}
2279
2280/* **************************** exit-time only **************************** */
2281
2282static void __exit matrox_done(void) {
2283 pci_unregister_driver(&matroxfb_driver);
2284}
2285
2286#ifndef MODULE
2287
2288/* ************************* init in-kernel code ************************** */
2289
2290static int __init matroxfb_setup(char *options) {
2291 char *this_opt;
2292
2293 DBG(__FUNCTION__)
2294
2295 if (!options || !*options)
2296 return 0;
2297
2298 while ((this_opt = strsep(&options, ",")) != NULL) {
2299 if (!*this_opt) continue;
2300
2301 dprintk("matroxfb_setup: option %s\n", this_opt);
2302
2303 if (!strncmp(this_opt, "dev:", 4))
2304 dev = simple_strtoul(this_opt+4, NULL, 0);
2305 else if (!strncmp(this_opt, "depth:", 6)) {
2306 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2307 case 0: depth = RSText; break;
2308 case 4: depth = RS4bpp; break;
2309 case 8: depth = RS8bpp; break;
2310 case 15:depth = RS15bpp; break;
2311 case 16:depth = RS16bpp; break;
2312 case 24:depth = RS24bpp; break;
2313 case 32:depth = RS32bpp; break;
2314 default:
2315 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2316 }
2317 } else if (!strncmp(this_opt, "xres:", 5))
2318 xres = simple_strtoul(this_opt+5, NULL, 0);
2319 else if (!strncmp(this_opt, "yres:", 5))
2320 yres = simple_strtoul(this_opt+5, NULL, 0);
2321 else if (!strncmp(this_opt, "vslen:", 6))
2322 vslen = simple_strtoul(this_opt+6, NULL, 0);
2323 else if (!strncmp(this_opt, "hslen:", 6))
2324 hslen = simple_strtoul(this_opt+6, NULL, 0);
2325 else if (!strncmp(this_opt, "left:", 5))
2326 left = simple_strtoul(this_opt+5, NULL, 0);
2327 else if (!strncmp(this_opt, "right:", 6))
2328 right = simple_strtoul(this_opt+6, NULL, 0);
2329 else if (!strncmp(this_opt, "upper:", 6))
2330 upper = simple_strtoul(this_opt+6, NULL, 0);
2331 else if (!strncmp(this_opt, "lower:", 6))
2332 lower = simple_strtoul(this_opt+6, NULL, 0);
2333 else if (!strncmp(this_opt, "pixclock:", 9))
2334 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2335 else if (!strncmp(this_opt, "sync:", 5))
2336 sync = simple_strtoul(this_opt+5, NULL, 0);
2337 else if (!strncmp(this_opt, "vesa:", 5))
2338 vesa = simple_strtoul(this_opt+5, NULL, 0);
2339 else if (!strncmp(this_opt, "maxclk:", 7))
2340 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2341 else if (!strncmp(this_opt, "fh:", 3))
2342 fh = simple_strtoul(this_opt+3, NULL, 0);
2343 else if (!strncmp(this_opt, "fv:", 3))
2344 fv = simple_strtoul(this_opt+3, NULL, 0);
2345 else if (!strncmp(this_opt, "mem:", 4))
2346 mem = simple_strtoul(this_opt+4, NULL, 0);
2347 else if (!strncmp(this_opt, "mode:", 5))
2348 strlcpy(videomode, this_opt+5, sizeof(videomode));
2349 else if (!strncmp(this_opt, "outputs:", 8))
2350 strlcpy(outputs, this_opt+8, sizeof(outputs));
2351 else if (!strncmp(this_opt, "dfp:", 4)) {
2352 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2353 dfp = 1;
2354 }
2355#ifdef CONFIG_PPC_PMAC
2356 else if (!strncmp(this_opt, "vmode:", 6)) {
2357 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2358 if (vmode > 0 && vmode <= VMODE_MAX)
2359 default_vmode = vmode;
2360 } else if (!strncmp(this_opt, "cmode:", 6)) {
2361 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2362 switch (cmode) {
2363 case 0:
2364 case 8:
2365 default_cmode = CMODE_8;
2366 break;
2367 case 15:
2368 case 16:
2369 default_cmode = CMODE_16;
2370 break;
2371 case 24:
2372 case 32:
2373 default_cmode = CMODE_32;
2374 break;
2375 }
2376 }
2377#endif
2378 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2379 disabled = 1;
2380 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2381 disabled = 0;
2382 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2383 sgram = 1;
2384 else if (!strcmp(this_opt, "sdram"))
2385 sgram = 0;
2386 else if (!strncmp(this_opt, "memtype:", 8))
2387 memtype = simple_strtoul(this_opt+8, NULL, 0);
2388 else {
2389 int value = 1;
2390
2391 if (!strncmp(this_opt, "no", 2)) {
2392 value = 0;
2393 this_opt += 2;
2394 }
2395 if (! strcmp(this_opt, "inverse"))
2396 inverse = value;
2397 else if (!strcmp(this_opt, "accel"))
2398 noaccel = !value;
2399 else if (!strcmp(this_opt, "pan"))
2400 nopan = !value;
2401 else if (!strcmp(this_opt, "pciretry"))
2402 no_pci_retry = !value;
2403 else if (!strcmp(this_opt, "vga"))
2404 novga = !value;
2405 else if (!strcmp(this_opt, "bios"))
2406 nobios = !value;
2407 else if (!strcmp(this_opt, "init"))
2408 noinit = !value;
2409#ifdef CONFIG_MTRR
2410 else if (!strcmp(this_opt, "mtrr"))
2411 mtrr = value;
2412#endif
2413 else if (!strcmp(this_opt, "inv24"))
2414 inv24 = value;
2415 else if (!strcmp(this_opt, "cross4MB"))
2416 cross4MB = value;
2417 else if (!strcmp(this_opt, "grayscale"))
2418 grayscale = value;
2419 else if (!strcmp(this_opt, "dfp"))
2420 dfp = value;
2421 else {
2422 strlcpy(videomode, this_opt, sizeof(videomode));
2423 }
2424 }
2425 }
2426 return 0;
2427}
2428
2429static int __initdata initialized = 0;
2430
2431static int __init matroxfb_init(void)
2432{
2433 char *option = NULL;
2434
2435 DBG(__FUNCTION__)
2436
2437 if (fb_get_options("matroxfb", &option))
2438 return -ENODEV;
2439 matroxfb_setup(option);
2440
2441 if (disabled)
2442 return -ENXIO;
2443 if (!initialized) {
2444 initialized = 1;
2445 matrox_init();
2446 }
2447 hotplug = 1;
2448 /* never return failure, user can hotplug matrox later... */
2449 return 0;
2450}
2451
2452module_init(matroxfb_init);
2453
2454#else
2455
2456/* *************************** init module code **************************** */
2457
2458MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2459MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2460MODULE_LICENSE("GPL");
2461
2462module_param(mem, int, 0);
2463MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2464module_param(disabled, int, 0);
2465MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2466module_param(noaccel, int, 0);
2467MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2468module_param(nopan, int, 0);
2469MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2470module_param(no_pci_retry, int, 0);
2471MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2472module_param(novga, int, 0);
2473MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2474module_param(nobios, int, 0);
2475MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2476module_param(noinit, int, 0);
2477MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2478module_param(memtype, int, 0);
2479MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2480#ifdef CONFIG_MTRR
2481module_param(mtrr, int, 0);
2482MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2483#endif
2484module_param(sgram, int, 0);
2485MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2486module_param(inv24, int, 0);
2487MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2488module_param(inverse, int, 0);
2489MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2490#ifdef CONFIG_FB_MATROX_MULTIHEAD
2491module_param(dev, int, 0);
2492MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2493#else
2494module_param(dev, int, 0);
2495MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
2496#endif
2497module_param(vesa, int, 0);
2498MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2499module_param(xres, int, 0);
2500MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2501module_param(yres, int, 0);
2502MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2503module_param(upper, int, 0);
2504MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2505module_param(lower, int, 0);
2506MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2507module_param(vslen, int, 0);
2508MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2509module_param(left, int, 0);
2510MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2511module_param(right, int, 0);
2512MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2513module_param(hslen, int, 0);
2514MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2515module_param(pixclock, int, 0);
2516MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2517module_param(sync, int, 0);
2518MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2519module_param(depth, int, 0);
2520MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2521module_param(maxclk, int, 0);
2522MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2523module_param(fh, int, 0);
2524MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2525module_param(fv, int, 0);
2526MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2527"You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n");
2528module_param(grayscale, int, 0);
2529MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2530module_param(cross4MB, int, 0);
2531MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2532module_param(dfp, int, 0);
2533MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2534module_param(dfp_type, int, 0);
2535MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2536module_param_string(outputs, outputs, sizeof(outputs), 0);
2537MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2538#ifdef CONFIG_PPC_PMAC
2539module_param_named(vmode, default_vmode, int, 0);
2540MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2541module_param_named(cmode, default_cmode, int, 0);
2542MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2543#endif
2544
2545int __init init_module(void){
2546
2547 DBG(__FUNCTION__)
2548
2549 if (disabled)
2550 return -ENXIO;
2551
2552 if (depth == 0)
2553 depth = RSText;
2554 else if (depth == 4)
2555 depth = RS4bpp;
2556 else if (depth == 8)
2557 depth = RS8bpp;
2558 else if (depth == 15)
2559 depth = RS15bpp;
2560 else if (depth == 16)
2561 depth = RS16bpp;
2562 else if (depth == 24)
2563 depth = RS24bpp;
2564 else if (depth == 32)
2565 depth = RS32bpp;
2566 else if (depth != -1) {
2567 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2568 depth = -1;
2569 }
2570 matrox_init();
2571 /* never return failure; user can hotplug matrox later... */
2572 return 0;
2573}
2574#endif /* MODULE */
2575
2576module_exit(matrox_done);
2577EXPORT_SYMBOL(matroxfb_register_driver);
2578EXPORT_SYMBOL(matroxfb_unregister_driver);
2579EXPORT_SYMBOL(matroxfb_wait_for_sync);
2580EXPORT_SYMBOL(matroxfb_enable_irq);
2581
2582/*
2583 * Overrides for Emacs so that we follow Linus's tabbing style.
2584 * ---------------------------------------------------------------------------
2585 * Local variables:
2586 * c-basic-offset: 8
2587 * End:
2588 */
2589
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 04:27:43 -0500