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path: root/drivers/video/matrox/g450_pll.c
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Diffstat (limited to 'drivers/video/matrox/g450_pll.c')
-rw-r--r--drivers/video/matrox/g450_pll.c23
1 files changed, 13 insertions, 10 deletions
diff --git a/drivers/video/matrox/g450_pll.c b/drivers/video/matrox/g450_pll.c
index 7c76e079ca7d..d42346e7fdda 100644
--- a/drivers/video/matrox/g450_pll.c
+++ b/drivers/video/matrox/g450_pll.c
@@ -331,16 +331,19 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
331 tmp |= M1064_XPIXCLKCTRL_PLL_UP; 331 tmp |= M1064_XPIXCLKCTRL_PLL_UP;
332 } 332 }
333 matroxfb_DAC_out(PMINFO M1064_XPIXCLKCTRL, tmp); 333 matroxfb_DAC_out(PMINFO M1064_XPIXCLKCTRL, tmp);
334#ifdef __powerpc__ 334 /* DVI PLL preferred for frequencies up to
335 /* This is necessary to avoid jitter on PowerPC 335 panel link max, standard PLL otherwise */
336 * (OpenFirmware) systems, but apparently 336 if (fout >= MINFO->max_pixel_clock_panellink)
337 * introduces jitter, at least on a x86-64 337 tmp = 0;
338 * using DVI. 338 else tmp =
339 * A simple workaround is disable for non-PPC. 339 M1064_XDVICLKCTRL_DVIDATAPATHSEL |
340 */ 340 M1064_XDVICLKCTRL_C1DVICLKSEL |
341 matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL, 0); 341 M1064_XDVICLKCTRL_C1DVICLKEN |
342#endif /* __powerpc__ */ 342 M1064_XDVICLKCTRL_DVILOOPCTL |
343 matroxfb_DAC_out(PMINFO M1064_XPWRCTRL, xpwrctrl); 343 M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
344 matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL,tmp);
345 matroxfb_DAC_out(PMINFO M1064_XPWRCTRL,
346 xpwrctrl);
344 347
345 matroxfb_DAC_unlock_irqrestore(flags); 348 matroxfb_DAC_unlock_irqrestore(flags);
346 } 349 }