diff options
Diffstat (limited to 'drivers/video/matrox/g450_pll.c')
-rw-r--r-- | drivers/video/matrox/g450_pll.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/video/matrox/g450_pll.c b/drivers/video/matrox/g450_pll.c index d42346e7fdda..8c75427ad96f 100644 --- a/drivers/video/matrox/g450_pll.c +++ b/drivers/video/matrox/g450_pll.c | |||
@@ -30,7 +30,7 @@ static unsigned int g450_mnp2vco(CPMINFO unsigned int mnp) { | |||
30 | 30 | ||
31 | m = ((mnp >> 16) & 0x0FF) + 1; | 31 | m = ((mnp >> 16) & 0x0FF) + 1; |
32 | n = ((mnp >> 7) & 0x1FE) + 4; | 32 | n = ((mnp >> 7) & 0x1FE) + 4; |
33 | return (ACCESS_FBINFO(features).pll.ref_freq * n + (m >> 1)) / m; | 33 | return (minfo->features.pll.ref_freq * n + (m >> 1)) / m; |
34 | } | 34 | } |
35 | 35 | ||
36 | unsigned int g450_mnp2f(CPMINFO unsigned int mnp) { | 36 | unsigned int g450_mnp2f(CPMINFO unsigned int mnp) { |
@@ -90,7 +90,7 @@ static unsigned int g450_nextpll(CPMINFO const struct matrox_pll_limits* pi, uns | |||
90 | } else { | 90 | } else { |
91 | m--; | 91 | m--; |
92 | } | 92 | } |
93 | n = ((tvco * (m+1) + ACCESS_FBINFO(features).pll.ref_freq) / (ACCESS_FBINFO(features).pll.ref_freq * 2)) - 2; | 93 | n = ((tvco * (m+1) + minfo->features.pll.ref_freq) / (minfo->features.pll.ref_freq * 2)) - 2; |
94 | } while (n < 0x03 || n > 0x7A); | 94 | } while (n < 0x03 || n > 0x7A); |
95 | return (m << 16) | (n << 8) | p; | 95 | return (m << 16) | (n << 8) | p; |
96 | } | 96 | } |
@@ -333,7 +333,7 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll, | |||
333 | matroxfb_DAC_out(PMINFO M1064_XPIXCLKCTRL, tmp); | 333 | matroxfb_DAC_out(PMINFO M1064_XPIXCLKCTRL, tmp); |
334 | /* DVI PLL preferred for frequencies up to | 334 | /* DVI PLL preferred for frequencies up to |
335 | panel link max, standard PLL otherwise */ | 335 | panel link max, standard PLL otherwise */ |
336 | if (fout >= MINFO->max_pixel_clock_panellink) | 336 | if (fout >= minfo->max_pixel_clock_panellink) |
337 | tmp = 0; | 337 | tmp = 0; |
338 | else tmp = | 338 | else tmp = |
339 | M1064_XDVICLKCTRL_DVIDATAPATHSEL | | 339 | M1064_XDVICLKCTRL_DVIDATAPATHSEL | |
@@ -363,20 +363,20 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll, | |||
363 | } | 363 | } |
364 | mga_outb(M_MISC_REG, misc); | 364 | mga_outb(M_MISC_REG, misc); |
365 | } | 365 | } |
366 | pi = &ACCESS_FBINFO(limits.pixel); | 366 | pi = &minfo->limits.pixel; |
367 | ci = &ACCESS_FBINFO(cache.pixel); | 367 | ci = &minfo->cache.pixel; |
368 | break; | 368 | break; |
369 | case M_SYSTEM_PLL: | 369 | case M_SYSTEM_PLL: |
370 | { | 370 | { |
371 | u_int32_t opt; | 371 | u_int32_t opt; |
372 | 372 | ||
373 | pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &opt); | 373 | pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &opt); |
374 | if (!(opt & 0x20)) { | 374 | if (!(opt & 0x20)) { |
375 | pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, opt | 0x20); | 375 | pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, opt | 0x20); |
376 | } | 376 | } |
377 | } | 377 | } |
378 | pi = &ACCESS_FBINFO(limits.system); | 378 | pi = &minfo->limits.system; |
379 | ci = &ACCESS_FBINFO(cache.system); | 379 | ci = &minfo->cache.system; |
380 | break; | 380 | break; |
381 | case M_VIDEO_PLL: | 381 | case M_VIDEO_PLL: |
382 | { | 382 | { |
@@ -395,8 +395,8 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll, | |||
395 | pixel_vco = g450_mnp2vco(PMINFO mnp); | 395 | pixel_vco = g450_mnp2vco(PMINFO mnp); |
396 | matroxfb_DAC_unlock_irqrestore(flags); | 396 | matroxfb_DAC_unlock_irqrestore(flags); |
397 | } | 397 | } |
398 | pi = &ACCESS_FBINFO(limits.video); | 398 | pi = &minfo->limits.video; |
399 | ci = &ACCESS_FBINFO(cache.video); | 399 | ci = &minfo->cache.video; |
400 | break; | 400 | break; |
401 | default: | 401 | default: |
402 | return -EINVAL; | 402 | return -EINVAL; |
@@ -475,7 +475,7 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll, | |||
475 | mnp = g450_findworkingpll(PMINFO pll, mnparray, mnpcount); | 475 | mnp = g450_findworkingpll(PMINFO pll, mnparray, mnpcount); |
476 | g450_addcache(ci, mnparray[0], mnp); | 476 | g450_addcache(ci, mnparray[0], mnp); |
477 | } | 477 | } |
478 | updatehwstate_clk(&ACCESS_FBINFO(hw), mnp, pll); | 478 | updatehwstate_clk(&minfo->hw, mnp, pll); |
479 | matroxfb_DAC_unlock_irqrestore(flags); | 479 | matroxfb_DAC_unlock_irqrestore(flags); |
480 | return mnp; | 480 | return mnp; |
481 | } | 481 | } |