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path: root/drivers/video/intelfb/intelfbhw.h
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Diffstat (limited to 'drivers/video/intelfb/intelfbhw.h')
-rw-r--r--drivers/video/intelfb/intelfbhw.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/video/intelfb/intelfbhw.h b/drivers/video/intelfb/intelfbhw.h
index 10acda098b71..8c54ba8fbdda 100644
--- a/drivers/video/intelfb/intelfbhw.h
+++ b/drivers/video/intelfb/intelfbhw.h
@@ -88,6 +88,19 @@
88#define INSTDONE 0x2090 88#define INSTDONE 0x2090
89#define PRI_RING_EMPTY 1 89#define PRI_RING_EMPTY 1
90 90
91#define HWSTAM 0x2098
92#define IER 0x20A0
93#define IIR 0x20A4
94#define IMR 0x20A8
95#define VSYNC_PIPE_A_INTERRUPT (1 << 7)
96#define PIPE_A_EVENT_INTERRUPT (1 << 4)
97#define VSYNC_PIPE_B_INTERRUPT (1 << 5)
98#define PIPE_B_EVENT_INTERRUPT (1 << 4)
99#define HOST_PORT_EVENT_INTERRUPT (1 << 3)
100#define CAPTURE_EVENT_INTERRUPT (1 << 2)
101#define USER_DEFINED_INTERRUPT (1 << 1)
102#define BREAKPOINT_INTERRUPT 1
103
91#define INSTPM 0x20c0 104#define INSTPM 0x20c0
92#define SYNC_FLUSH_ENABLE (1 << 5) 105#define SYNC_FLUSH_ENABLE (1 << 5)
93 106
@@ -113,6 +126,12 @@
113#define FW_DISPC_BL_SHIFT 8 126#define FW_DISPC_BL_SHIFT 8
114#define FW_DISPC_BL_MASK 0x7 127#define FW_DISPC_BL_MASK 0x7
115 128
129#define GPIOA 0x5010
130#define GPIOB 0x5014
131#define GPIOC 0x5018 // this may be external DDC on i830
132#define GPIOD 0x501C // this is DVO DDC
133#define GPIOE 0x5020 // this is DVO i2C
134#define GPIOF 0x5024
116 135
117/* PLL registers */ 136/* PLL registers */
118#define VGA0_DIVISOR 0x06000 137#define VGA0_DIVISOR 0x06000
@@ -468,9 +487,12 @@
468 487
469/* I/O macros */ 488/* I/O macros */
470#define INREG8(addr) readb((u8 __iomem *)(dinfo->mmio_base + (addr))) 489#define INREG8(addr) readb((u8 __iomem *)(dinfo->mmio_base + (addr)))
490#define INREG16(addr) readw((u16 __iomem *)(dinfo->mmio_base + (addr)))
471#define INREG(addr) readl((u32 __iomem *)(dinfo->mmio_base + (addr))) 491#define INREG(addr) readl((u32 __iomem *)(dinfo->mmio_base + (addr)))
472#define OUTREG8(addr, val) writeb((val),(u8 __iomem *)(dinfo->mmio_base + \ 492#define OUTREG8(addr, val) writeb((val),(u8 __iomem *)(dinfo->mmio_base + \
473 (addr))) 493 (addr)))
494#define OUTREG16(addr, val) writew((val),(u16 __iomem *)(dinfo->mmio_base + \
495 (addr)))
474#define OUTREG(addr, val) writel((val),(u32 __iomem *)(dinfo->mmio_base + \ 496#define OUTREG(addr, val) writel((val),(u32 __iomem *)(dinfo->mmio_base + \
475 (addr))) 497 (addr)))
476 498
@@ -545,5 +567,8 @@ extern void intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg,
545extern void intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, 567extern void intelfbhw_cursor_load(struct intelfb_info *dinfo, int width,
546 int height, u8 *data); 568 int height, u8 *data);
547extern void intelfbhw_cursor_reset(struct intelfb_info *dinfo); 569extern void intelfbhw_cursor_reset(struct intelfb_info *dinfo);
570extern int intelfbhw_enable_irq(struct intelfb_info *dinfo, int reenable);
571extern void intelfbhw_disable_irq(struct intelfb_info *dinfo);
572extern int intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe);
548 573
549#endif /* _INTELFBHW_H */ 574#endif /* _INTELFBHW_H */