diff options
Diffstat (limited to 'drivers/video/intelfb/intelfbhw.c')
| -rw-r--r-- | drivers/video/intelfb/intelfbhw.c | 47 |
1 files changed, 30 insertions, 17 deletions
diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c index 0689f97c5238..81627466804e 100644 --- a/drivers/video/intelfb/intelfbhw.c +++ b/drivers/video/intelfb/intelfbhw.c | |||
| @@ -469,6 +469,32 @@ void intelfbhw_do_blank(int blank, struct fb_info *info) | |||
| 469 | } | 469 | } |
| 470 | 470 | ||
| 471 | 471 | ||
| 472 | /* Check which pipe is connected to an active display plane. */ | ||
| 473 | int intelfbhw_active_pipe(const struct intelfb_hwstate *hw) | ||
| 474 | { | ||
| 475 | int pipe = -1; | ||
| 476 | |||
| 477 | /* keep old default behaviour - prefer PIPE_A */ | ||
| 478 | if (hw->disp_b_ctrl & DISPPLANE_PLANE_ENABLE) { | ||
| 479 | pipe = (hw->disp_b_ctrl >> DISPPLANE_SEL_PIPE_SHIFT); | ||
| 480 | pipe &= PIPE_MASK; | ||
| 481 | if (unlikely(pipe == PIPE_A)) | ||
| 482 | return PIPE_A; | ||
| 483 | } | ||
| 484 | if (hw->disp_a_ctrl & DISPPLANE_PLANE_ENABLE) { | ||
| 485 | pipe = (hw->disp_a_ctrl >> DISPPLANE_SEL_PIPE_SHIFT); | ||
| 486 | pipe &= PIPE_MASK; | ||
| 487 | if (likely(pipe == PIPE_A)) | ||
| 488 | return PIPE_A; | ||
| 489 | } | ||
| 490 | /* Impossible that no pipe is selected - return PIPE_A */ | ||
| 491 | WARN_ON(pipe == -1); | ||
| 492 | if (unlikely(pipe == -1)) | ||
| 493 | pipe = PIPE_A; | ||
| 494 | |||
| 495 | return pipe; | ||
| 496 | } | ||
| 497 | |||
| 472 | void intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno, | 498 | void intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno, |
| 473 | unsigned red, unsigned green, unsigned blue, | 499 | unsigned red, unsigned green, unsigned blue, |
| 474 | unsigned transp) | 500 | unsigned transp) |
| @@ -1019,7 +1045,7 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo, | |||
| 1019 | struct intelfb_hwstate *hw, | 1045 | struct intelfb_hwstate *hw, |
| 1020 | struct fb_var_screeninfo *var) | 1046 | struct fb_var_screeninfo *var) |
| 1021 | { | 1047 | { |
| 1022 | int pipe = PIPE_A; | 1048 | int pipe = intelfbhw_active_pipe(hw); |
| 1023 | u32 *dpll, *fp0, *fp1; | 1049 | u32 *dpll, *fp0, *fp1; |
| 1024 | u32 m1, m2, n, p1, p2, clock_target, clock; | 1050 | u32 m1, m2, n, p1, p2, clock_target, clock; |
| 1025 | u32 hsync_start, hsync_end, hblank_start, hblank_end, htotal, hactive; | 1051 | u32 hsync_start, hsync_end, hblank_start, hblank_end, htotal, hactive; |
| @@ -1033,12 +1059,6 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo, | |||
| 1033 | /* Disable VGA */ | 1059 | /* Disable VGA */ |
| 1034 | hw->vgacntrl |= VGA_DISABLE; | 1060 | hw->vgacntrl |= VGA_DISABLE; |
| 1035 | 1061 | ||
| 1036 | /* Check whether pipe A or pipe B is enabled. */ | ||
| 1037 | if (hw->pipe_a_conf & PIPECONF_ENABLE) | ||
| 1038 | pipe = PIPE_A; | ||
| 1039 | else if (hw->pipe_b_conf & PIPECONF_ENABLE) | ||
| 1040 | pipe = PIPE_B; | ||
| 1041 | |||
| 1042 | /* Set which pipe's registers will be set. */ | 1062 | /* Set which pipe's registers will be set. */ |
| 1043 | if (pipe == PIPE_B) { | 1063 | if (pipe == PIPE_B) { |
| 1044 | dpll = &hw->dpll_b; | 1064 | dpll = &hw->dpll_b; |
| @@ -1262,7 +1282,6 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo, | |||
| 1262 | int intelfbhw_program_mode(struct intelfb_info *dinfo, | 1282 | int intelfbhw_program_mode(struct intelfb_info *dinfo, |
| 1263 | const struct intelfb_hwstate *hw, int blank) | 1283 | const struct intelfb_hwstate *hw, int blank) |
| 1264 | { | 1284 | { |
| 1265 | int pipe = PIPE_A; | ||
| 1266 | u32 tmp; | 1285 | u32 tmp; |
| 1267 | const u32 *dpll, *fp0, *fp1, *pipe_conf; | 1286 | const u32 *dpll, *fp0, *fp1, *pipe_conf; |
| 1268 | const u32 *hs, *ht, *hb, *vs, *vt, *vb, *ss; | 1287 | const u32 *hs, *ht, *hb, *vs, *vt, *vb, *ss; |
| @@ -1272,7 +1291,7 @@ int intelfbhw_program_mode(struct intelfb_info *dinfo, | |||
| 1272 | u32 src_size_reg; | 1291 | u32 src_size_reg; |
| 1273 | u32 count, tmp_val[3]; | 1292 | u32 count, tmp_val[3]; |
| 1274 | 1293 | ||
| 1275 | /* Assume single pipe, display plane A, analog CRT. */ | 1294 | /* Assume single pipe */ |
| 1276 | 1295 | ||
| 1277 | #if VERBOSE > 0 | 1296 | #if VERBOSE > 0 |
| 1278 | DBG_MSG("intelfbhw_program_mode\n"); | 1297 | DBG_MSG("intelfbhw_program_mode\n"); |
| @@ -1283,15 +1302,9 @@ int intelfbhw_program_mode(struct intelfb_info *dinfo, | |||
| 1283 | tmp |= VGA_DISABLE; | 1302 | tmp |= VGA_DISABLE; |
| 1284 | OUTREG(VGACNTRL, tmp); | 1303 | OUTREG(VGACNTRL, tmp); |
| 1285 | 1304 | ||
| 1286 | /* Check whether pipe A or pipe B is enabled. */ | 1305 | dinfo->pipe = intelfbhw_active_pipe(hw); |
| 1287 | if (hw->pipe_a_conf & PIPECONF_ENABLE) | ||
| 1288 | pipe = PIPE_A; | ||
| 1289 | else if (hw->pipe_b_conf & PIPECONF_ENABLE) | ||
| 1290 | pipe = PIPE_B; | ||
| 1291 | |||
| 1292 | dinfo->pipe = pipe; | ||
| 1293 | 1306 | ||
| 1294 | if (pipe == PIPE_B) { | 1307 | if (dinfo->pipe == PIPE_B) { |
| 1295 | dpll = &hw->dpll_b; | 1308 | dpll = &hw->dpll_b; |
| 1296 | fp0 = &hw->fpb0; | 1309 | fp0 = &hw->fpb0; |
| 1297 | fp1 = &hw->fpb1; | 1310 | fp1 = &hw->fpb1; |
