diff options
Diffstat (limited to 'drivers/video/imxfb.c')
-rw-r--r-- | drivers/video/imxfb.c | 468 |
1 files changed, 267 insertions, 201 deletions
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index ccd986140c95..d58c68cd456e 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/video/imxfb.c | ||
3 | * | ||
4 | * Freescale i.MX Frame Buffer device driver | 2 | * Freescale i.MX Frame Buffer device driver |
5 | * | 3 | * |
6 | * Copyright (C) 2004 Sascha Hauer, Pengutronix | 4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix |
@@ -16,7 +14,6 @@ | |||
16 | * linux-arm-kernel@lists.arm.linux.org.uk | 14 | * linux-arm-kernel@lists.arm.linux.org.uk |
17 | */ | 15 | */ |
18 | 16 | ||
19 | //#define DEBUG 1 | ||
20 | 17 | ||
21 | #include <linux/module.h> | 18 | #include <linux/module.h> |
22 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
@@ -32,9 +29,8 @@ | |||
32 | #include <linux/cpufreq.h> | 29 | #include <linux/cpufreq.h> |
33 | #include <linux/platform_device.h> | 30 | #include <linux/platform_device.h> |
34 | #include <linux/dma-mapping.h> | 31 | #include <linux/dma-mapping.h> |
32 | #include <linux/io.h> | ||
35 | 33 | ||
36 | #include <mach/hardware.h> | ||
37 | #include <asm/io.h> | ||
38 | #include <mach/imxfb.h> | 34 | #include <mach/imxfb.h> |
39 | 35 | ||
40 | /* | 36 | /* |
@@ -42,23 +38,150 @@ | |||
42 | */ | 38 | */ |
43 | #define DEBUG_VAR 1 | 39 | #define DEBUG_VAR 1 |
44 | 40 | ||
45 | #include "imxfb.h" | 41 | #define DRIVER_NAME "imx-fb" |
42 | |||
43 | #define LCDC_SSA 0x00 | ||
44 | |||
45 | #define LCDC_SIZE 0x04 | ||
46 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | ||
47 | #define SIZE_YMAX(y) ((y) & 0x1ff) | ||
48 | |||
49 | #define LCDC_VPW 0x08 | ||
50 | #define VPW_VPW(x) ((x) & 0x3ff) | ||
51 | |||
52 | #define LCDC_CPOS 0x0C | ||
53 | #define CPOS_CC1 (1<<31) | ||
54 | #define CPOS_CC0 (1<<30) | ||
55 | #define CPOS_OP (1<<28) | ||
56 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | ||
57 | #define CPOS_CYP(y) ((y) & 0x1ff) | ||
58 | |||
59 | #define LCDC_LCWHB 0x10 | ||
60 | #define LCWHB_BK_EN (1<<31) | ||
61 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | ||
62 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | ||
63 | #define LCWHB_BD(x) ((x) & 0xff) | ||
64 | |||
65 | #define LCDC_LCHCC 0x14 | ||
66 | #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) | ||
67 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) | ||
68 | #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) | ||
69 | |||
70 | #define LCDC_PCR 0x18 | ||
71 | |||
72 | #define LCDC_HCR 0x1C | ||
73 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | ||
74 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | ||
75 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | ||
76 | |||
77 | #define LCDC_VCR 0x20 | ||
78 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | ||
79 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | ||
80 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | ||
81 | |||
82 | #define LCDC_POS 0x24 | ||
83 | #define POS_POS(x) ((x) & 1f) | ||
84 | |||
85 | #define LCDC_LSCR1 0x28 | ||
86 | /* bit fields in imxfb.h */ | ||
87 | |||
88 | #define LCDC_PWMR 0x2C | ||
89 | /* bit fields in imxfb.h */ | ||
90 | |||
91 | #define LCDC_DMACR 0x30 | ||
92 | /* bit fields in imxfb.h */ | ||
93 | |||
94 | #define LCDC_RMCR 0x34 | ||
95 | #define RMCR_LCDC_EN (1<<1) | ||
96 | #define RMCR_SELF_REF (1<<0) | ||
97 | |||
98 | #define LCDC_LCDICR 0x38 | ||
99 | #define LCDICR_INT_SYN (1<<2) | ||
100 | #define LCDICR_INT_CON (1) | ||
101 | |||
102 | #define LCDC_LCDISR 0x40 | ||
103 | #define LCDISR_UDR_ERR (1<<3) | ||
104 | #define LCDISR_ERR_RES (1<<2) | ||
105 | #define LCDISR_EOF (1<<1) | ||
106 | #define LCDISR_BOF (1<<0) | ||
107 | |||
108 | /* | ||
109 | * These are the bitfields for each | ||
110 | * display depth that we support. | ||
111 | */ | ||
112 | struct imxfb_rgb { | ||
113 | struct fb_bitfield red; | ||
114 | struct fb_bitfield green; | ||
115 | struct fb_bitfield blue; | ||
116 | struct fb_bitfield transp; | ||
117 | }; | ||
118 | |||
119 | struct imxfb_info { | ||
120 | struct platform_device *pdev; | ||
121 | void __iomem *regs; | ||
46 | 122 | ||
47 | static struct imxfb_rgb def_rgb_16 = { | 123 | u_int max_bpp; |
48 | .red = { .offset = 8, .length = 4, }, | 124 | u_int max_xres; |
49 | .green = { .offset = 4, .length = 4, }, | 125 | u_int max_yres; |
50 | .blue = { .offset = 0, .length = 4, }, | 126 | |
51 | .transp = { .offset = 0, .length = 0, }, | 127 | /* |
128 | * These are the addresses we mapped | ||
129 | * the framebuffer memory region to. | ||
130 | */ | ||
131 | dma_addr_t map_dma; | ||
132 | u_char *map_cpu; | ||
133 | u_int map_size; | ||
134 | |||
135 | u_char *screen_cpu; | ||
136 | dma_addr_t screen_dma; | ||
137 | u_int palette_size; | ||
138 | |||
139 | dma_addr_t dbar1; | ||
140 | dma_addr_t dbar2; | ||
141 | |||
142 | u_int pcr; | ||
143 | u_int pwmr; | ||
144 | u_int lscr1; | ||
145 | u_int dmacr; | ||
146 | u_int cmap_inverse:1, | ||
147 | cmap_static:1, | ||
148 | unused:30; | ||
149 | |||
150 | void (*lcd_power)(int); | ||
151 | void (*backlight_power)(int); | ||
152 | }; | ||
153 | |||
154 | #define IMX_NAME "IMX" | ||
155 | |||
156 | /* | ||
157 | * Minimum X and Y resolutions | ||
158 | */ | ||
159 | #define MIN_XRES 64 | ||
160 | #define MIN_YRES 64 | ||
161 | |||
162 | static struct imxfb_rgb def_rgb_16_tft = { | ||
163 | .red = {.offset = 11, .length = 5,}, | ||
164 | .green = {.offset = 5, .length = 6,}, | ||
165 | .blue = {.offset = 0, .length = 5,}, | ||
166 | .transp = {.offset = 0, .length = 0,}, | ||
167 | }; | ||
168 | |||
169 | static struct imxfb_rgb def_rgb_16_stn = { | ||
170 | .red = {.offset = 8, .length = 4,}, | ||
171 | .green = {.offset = 4, .length = 4,}, | ||
172 | .blue = {.offset = 0, .length = 4,}, | ||
173 | .transp = {.offset = 0, .length = 0,}, | ||
52 | }; | 174 | }; |
53 | 175 | ||
54 | static struct imxfb_rgb def_rgb_8 = { | 176 | static struct imxfb_rgb def_rgb_8 = { |
55 | .red = { .offset = 0, .length = 8, }, | 177 | .red = {.offset = 0, .length = 8,}, |
56 | .green = { .offset = 0, .length = 8, }, | 178 | .green = {.offset = 0, .length = 8,}, |
57 | .blue = { .offset = 0, .length = 8, }, | 179 | .blue = {.offset = 0, .length = 8,}, |
58 | .transp = { .offset = 0, .length = 0, }, | 180 | .transp = {.offset = 0, .length = 0,}, |
59 | }; | 181 | }; |
60 | 182 | ||
61 | static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info); | 183 | static int imxfb_activate_var(struct fb_var_screeninfo *var, |
184 | struct fb_info *info); | ||
62 | 185 | ||
63 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | 186 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) |
64 | { | 187 | { |
@@ -67,10 +190,8 @@ static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |||
67 | return chan << bf->offset; | 190 | return chan << bf->offset; |
68 | } | 191 | } |
69 | 192 | ||
70 | #define LCDC_PALETTE(x) __REG2(IMX_LCDC_BASE+0x800, (x)<<2) | 193 | static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
71 | static int | 194 | u_int trans, struct fb_info *info) |
72 | imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, | ||
73 | u_int trans, struct fb_info *info) | ||
74 | { | 195 | { |
75 | struct imxfb_info *fbi = info->par; | 196 | struct imxfb_info *fbi = info->par; |
76 | u_int val, ret = 1; | 197 | u_int val, ret = 1; |
@@ -81,14 +202,13 @@ imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, | |||
81 | (CNVT_TOHW(green,4) << 4) | | 202 | (CNVT_TOHW(green,4) << 4) | |
82 | CNVT_TOHW(blue, 4); | 203 | CNVT_TOHW(blue, 4); |
83 | 204 | ||
84 | LCDC_PALETTE(regno) = val; | 205 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
85 | ret = 0; | 206 | ret = 0; |
86 | } | 207 | } |
87 | return ret; | 208 | return ret; |
88 | } | 209 | } |
89 | 210 | ||
90 | static int | 211 | static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
91 | imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
92 | u_int trans, struct fb_info *info) | 212 | u_int trans, struct fb_info *info) |
93 | { | 213 | { |
94 | struct imxfb_info *fbi = info->par; | 214 | struct imxfb_info *fbi = info->par; |
@@ -148,11 +268,10 @@ imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |||
148 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, | 268 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, |
149 | * bitfields, horizontal timing, vertical timing. | 269 | * bitfields, horizontal timing, vertical timing. |
150 | */ | 270 | */ |
151 | static int | 271 | static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
152 | imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | ||
153 | { | 272 | { |
154 | struct imxfb_info *fbi = info->par; | 273 | struct imxfb_info *fbi = info->par; |
155 | int rgbidx; | 274 | struct imxfb_rgb *rgb; |
156 | 275 | ||
157 | if (var->xres < MIN_XRES) | 276 | if (var->xres < MIN_XRES) |
158 | var->xres = MIN_XRES; | 277 | var->xres = MIN_XRES; |
@@ -168,23 +287,25 @@ imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |||
168 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); | 287 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); |
169 | switch (var->bits_per_pixel) { | 288 | switch (var->bits_per_pixel) { |
170 | case 16: | 289 | case 16: |
171 | rgbidx = RGB_16; | 290 | default: |
291 | if (readl(fbi->regs + LCDC_PCR) & PCR_TFT) | ||
292 | rgb = &def_rgb_16_tft; | ||
293 | else | ||
294 | rgb = &def_rgb_16_stn; | ||
172 | break; | 295 | break; |
173 | case 8: | 296 | case 8: |
174 | rgbidx = RGB_8; | 297 | rgb = &def_rgb_8; |
175 | break; | 298 | break; |
176 | default: | ||
177 | rgbidx = RGB_16; | ||
178 | } | 299 | } |
179 | 300 | ||
180 | /* | 301 | /* |
181 | * Copy the RGB parameters for this display | 302 | * Copy the RGB parameters for this display |
182 | * from the machine specific parameters. | 303 | * from the machine specific parameters. |
183 | */ | 304 | */ |
184 | var->red = fbi->rgb[rgbidx]->red; | 305 | var->red = rgb->red; |
185 | var->green = fbi->rgb[rgbidx]->green; | 306 | var->green = rgb->green; |
186 | var->blue = fbi->rgb[rgbidx]->blue; | 307 | var->blue = rgb->blue; |
187 | var->transp = fbi->rgb[rgbidx]->transp; | 308 | var->transp = rgb->transp; |
188 | 309 | ||
189 | pr_debug("RGBT length = %d:%d:%d:%d\n", | 310 | pr_debug("RGBT length = %d:%d:%d:%d\n", |
190 | var->red.length, var->green.length, var->blue.length, | 311 | var->red.length, var->green.length, var->blue.length, |
@@ -221,8 +342,7 @@ static int imxfb_set_par(struct fb_info *info) | |||
221 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; | 342 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; |
222 | } | 343 | } |
223 | 344 | ||
224 | info->fix.line_length = var->xres_virtual * | 345 | info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; |
225 | var->bits_per_pixel / 8; | ||
226 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; | 346 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
227 | 347 | ||
228 | imxfb_activate_var(var, info); | 348 | imxfb_activate_var(var, info); |
@@ -235,22 +355,27 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) | |||
235 | pr_debug("Enabling LCD controller\n"); | 355 | pr_debug("Enabling LCD controller\n"); |
236 | 356 | ||
237 | /* initialize LCDC */ | 357 | /* initialize LCDC */ |
238 | LCDC_RMCR &= ~RMCR_LCDC_EN; /* just to be safe... */ | 358 | writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN, |
359 | fbi->regs + LCDC_RMCR); /* just to be safe... */ | ||
360 | |||
361 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); | ||
239 | 362 | ||
240 | LCDC_SSA = fbi->screen_dma; | ||
241 | /* physical screen start address */ | 363 | /* physical screen start address */ |
242 | LCDC_VPW = VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4); | 364 | writel(VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4), |
365 | fbi->regs + LCDC_VPW); | ||
243 | 366 | ||
244 | LCDC_POS = 0x00000000; /* panning offset 0 (0 pixel offset) */ | 367 | /* panning offset 0 (0 pixel offset) */ |
368 | writel(0x00000000, fbi->regs + LCDC_POS); | ||
245 | 369 | ||
246 | /* disable hardware cursor */ | 370 | /* disable hardware cursor */ |
247 | LCDC_CPOS &= ~(CPOS_CC0 | CPOS_CC1); | 371 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
372 | fbi->regs + LCDC_CPOS); | ||
248 | 373 | ||
249 | LCDC_RMCR = RMCR_LCDC_EN; | 374 | writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); |
250 | 375 | ||
251 | if(fbi->backlight_power) | 376 | if (fbi->backlight_power) |
252 | fbi->backlight_power(1); | 377 | fbi->backlight_power(1); |
253 | if(fbi->lcd_power) | 378 | if (fbi->lcd_power) |
254 | fbi->lcd_power(1); | 379 | fbi->lcd_power(1); |
255 | } | 380 | } |
256 | 381 | ||
@@ -258,12 +383,12 @@ static void imxfb_disable_controller(struct imxfb_info *fbi) | |||
258 | { | 383 | { |
259 | pr_debug("Disabling LCD controller\n"); | 384 | pr_debug("Disabling LCD controller\n"); |
260 | 385 | ||
261 | if(fbi->backlight_power) | 386 | if (fbi->backlight_power) |
262 | fbi->backlight_power(0); | 387 | fbi->backlight_power(0); |
263 | if(fbi->lcd_power) | 388 | if (fbi->lcd_power) |
264 | fbi->lcd_power(0); | 389 | fbi->lcd_power(0); |
265 | 390 | ||
266 | LCDC_RMCR = 0; | 391 | writel(0, fbi->regs + LCDC_RMCR); |
267 | } | 392 | } |
268 | 393 | ||
269 | static int imxfb_blank(int blank, struct fb_info *info) | 394 | static int imxfb_blank(int blank, struct fb_info *info) |
@@ -340,74 +465,26 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf | |||
340 | info->fix.id, var->lower_margin); | 465 | info->fix.id, var->lower_margin); |
341 | #endif | 466 | #endif |
342 | 467 | ||
343 | LCDC_HCR = HCR_H_WIDTH(var->hsync_len) | | 468 | writel(HCR_H_WIDTH(var->hsync_len) | |
344 | HCR_H_WAIT_1(var->left_margin) | | 469 | HCR_H_WAIT_1(var->right_margin) | |
345 | HCR_H_WAIT_2(var->right_margin); | 470 | HCR_H_WAIT_2(var->left_margin), |
471 | fbi->regs + LCDC_HCR); | ||
346 | 472 | ||
347 | LCDC_VCR = VCR_V_WIDTH(var->vsync_len) | | 473 | writel(VCR_V_WIDTH(var->vsync_len) | |
348 | VCR_V_WAIT_1(var->upper_margin) | | 474 | VCR_V_WAIT_1(var->lower_margin) | |
349 | VCR_V_WAIT_2(var->lower_margin); | 475 | VCR_V_WAIT_2(var->upper_margin), |
476 | fbi->regs + LCDC_VCR); | ||
350 | 477 | ||
351 | LCDC_SIZE = SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres); | 478 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
352 | LCDC_PCR = fbi->pcr; | 479 | fbi->regs + LCDC_SIZE); |
353 | LCDC_PWMR = fbi->pwmr; | 480 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
354 | LCDC_LSCR1 = fbi->lscr1; | 481 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); |
355 | LCDC_DMACR = fbi->dmacr; | 482 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); |
483 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | ||
356 | 484 | ||
357 | return 0; | 485 | return 0; |
358 | } | 486 | } |
359 | 487 | ||
360 | static void imxfb_setup_gpio(struct imxfb_info *fbi) | ||
361 | { | ||
362 | int width; | ||
363 | |||
364 | LCDC_RMCR &= ~(RMCR_LCDC_EN | RMCR_SELF_REF); | ||
365 | |||
366 | if( fbi->pcr & PCR_TFT ) | ||
367 | width = 16; | ||
368 | else | ||
369 | width = 1 << ((fbi->pcr >> 28) & 0x3); | ||
370 | |||
371 | switch(width) { | ||
372 | case 16: | ||
373 | imx_gpio_mode(PD30_PF_LD15); | ||
374 | imx_gpio_mode(PD29_PF_LD14); | ||
375 | imx_gpio_mode(PD28_PF_LD13); | ||
376 | imx_gpio_mode(PD27_PF_LD12); | ||
377 | imx_gpio_mode(PD26_PF_LD11); | ||
378 | imx_gpio_mode(PD25_PF_LD10); | ||
379 | imx_gpio_mode(PD24_PF_LD9); | ||
380 | imx_gpio_mode(PD23_PF_LD8); | ||
381 | case 8: | ||
382 | imx_gpio_mode(PD22_PF_LD7); | ||
383 | imx_gpio_mode(PD21_PF_LD6); | ||
384 | imx_gpio_mode(PD20_PF_LD5); | ||
385 | imx_gpio_mode(PD19_PF_LD4); | ||
386 | case 4: | ||
387 | imx_gpio_mode(PD18_PF_LD3); | ||
388 | imx_gpio_mode(PD17_PF_LD2); | ||
389 | case 2: | ||
390 | imx_gpio_mode(PD16_PF_LD1); | ||
391 | case 1: | ||
392 | imx_gpio_mode(PD15_PF_LD0); | ||
393 | } | ||
394 | |||
395 | /* initialize GPIOs */ | ||
396 | imx_gpio_mode(PD6_PF_LSCLK); | ||
397 | imx_gpio_mode(PD11_PF_CONTRAST); | ||
398 | imx_gpio_mode(PD14_PF_FLM_VSYNC); | ||
399 | imx_gpio_mode(PD13_PF_LP_HSYNC); | ||
400 | imx_gpio_mode(PD12_PF_ACD_OE); | ||
401 | |||
402 | /* These are only needed for Sharp HR TFT displays */ | ||
403 | if (fbi->pcr & PCR_SHARP) { | ||
404 | imx_gpio_mode(PD7_PF_REV); | ||
405 | imx_gpio_mode(PD8_PF_CLS); | ||
406 | imx_gpio_mode(PD9_PF_PS); | ||
407 | imx_gpio_mode(PD10_PF_SPL_SPR); | ||
408 | } | ||
409 | } | ||
410 | |||
411 | #ifdef CONFIG_PM | 488 | #ifdef CONFIG_PM |
412 | /* | 489 | /* |
413 | * Power management hooks. Note that we won't be called from IRQ context, | 490 | * Power management hooks. Note that we won't be called from IRQ context, |
@@ -416,7 +493,8 @@ static void imxfb_setup_gpio(struct imxfb_info *fbi) | |||
416 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) | 493 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) |
417 | { | 494 | { |
418 | struct imxfb_info *fbi = platform_get_drvdata(dev); | 495 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
419 | pr_debug("%s\n",__func__); | 496 | |
497 | pr_debug("%s\n", __func__); | ||
420 | 498 | ||
421 | imxfb_disable_controller(fbi); | 499 | imxfb_disable_controller(fbi); |
422 | return 0; | 500 | return 0; |
@@ -425,7 +503,8 @@ static int imxfb_suspend(struct platform_device *dev, pm_message_t state) | |||
425 | static int imxfb_resume(struct platform_device *dev) | 503 | static int imxfb_resume(struct platform_device *dev) |
426 | { | 504 | { |
427 | struct imxfb_info *fbi = platform_get_drvdata(dev); | 505 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
428 | pr_debug("%s\n",__func__); | 506 | |
507 | pr_debug("%s\n", __func__); | ||
429 | 508 | ||
430 | imxfb_enable_controller(fbi); | 509 | imxfb_enable_controller(fbi); |
431 | return 0; | 510 | return 0; |
@@ -435,149 +514,136 @@ static int imxfb_resume(struct platform_device *dev) | |||
435 | #define imxfb_resume NULL | 514 | #define imxfb_resume NULL |
436 | #endif | 515 | #endif |
437 | 516 | ||
438 | static int __init imxfb_init_fbinfo(struct device *dev) | 517 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
439 | { | 518 | { |
440 | struct imxfb_mach_info *inf = dev->platform_data; | 519 | struct imx_fb_platform_data *pdata = pdev->dev.platform_data; |
441 | struct fb_info *info = dev_get_drvdata(dev); | 520 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
442 | struct imxfb_info *fbi = info->par; | 521 | struct imxfb_info *fbi = info->par; |
443 | 522 | ||
444 | pr_debug("%s\n",__func__); | 523 | pr_debug("%s\n",__func__); |
445 | 524 | ||
446 | info->pseudo_palette = kmalloc( sizeof(u32) * 16, GFP_KERNEL); | 525 | info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); |
447 | if (!info->pseudo_palette) | 526 | if (!info->pseudo_palette) |
448 | return -ENOMEM; | 527 | return -ENOMEM; |
449 | 528 | ||
450 | memset(fbi, 0, sizeof(struct imxfb_info)); | 529 | memset(fbi, 0, sizeof(struct imxfb_info)); |
451 | fbi->dev = dev; | ||
452 | 530 | ||
453 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | 531 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); |
454 | 532 | ||
455 | info->fix.type = FB_TYPE_PACKED_PIXELS; | 533 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
456 | info->fix.type_aux = 0; | 534 | info->fix.type_aux = 0; |
457 | info->fix.xpanstep = 0; | 535 | info->fix.xpanstep = 0; |
458 | info->fix.ypanstep = 0; | 536 | info->fix.ypanstep = 0; |
459 | info->fix.ywrapstep = 0; | 537 | info->fix.ywrapstep = 0; |
460 | info->fix.accel = FB_ACCEL_NONE; | 538 | info->fix.accel = FB_ACCEL_NONE; |
461 | 539 | ||
462 | info->var.nonstd = 0; | 540 | info->var.nonstd = 0; |
463 | info->var.activate = FB_ACTIVATE_NOW; | 541 | info->var.activate = FB_ACTIVATE_NOW; |
464 | info->var.height = -1; | 542 | info->var.height = -1; |
465 | info->var.width = -1; | 543 | info->var.width = -1; |
466 | info->var.accel_flags = 0; | 544 | info->var.accel_flags = 0; |
467 | info->var.vmode = FB_VMODE_NONINTERLACED; | 545 | info->var.vmode = FB_VMODE_NONINTERLACED; |
468 | 546 | ||
469 | info->fbops = &imxfb_ops; | 547 | info->fbops = &imxfb_ops; |
470 | info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST; | 548 | info->flags = FBINFO_FLAG_DEFAULT | |
471 | 549 | FBINFO_READS_FAST; | |
472 | fbi->rgb[RGB_16] = &def_rgb_16; | 550 | |
473 | fbi->rgb[RGB_8] = &def_rgb_8; | 551 | fbi->max_xres = pdata->xres; |
474 | 552 | info->var.xres = pdata->xres; | |
475 | fbi->max_xres = inf->xres; | 553 | info->var.xres_virtual = pdata->xres; |
476 | info->var.xres = inf->xres; | 554 | fbi->max_yres = pdata->yres; |
477 | info->var.xres_virtual = inf->xres; | 555 | info->var.yres = pdata->yres; |
478 | fbi->max_yres = inf->yres; | 556 | info->var.yres_virtual = pdata->yres; |
479 | info->var.yres = inf->yres; | 557 | fbi->max_bpp = pdata->bpp; |
480 | info->var.yres_virtual = inf->yres; | 558 | info->var.bits_per_pixel = pdata->bpp; |
481 | fbi->max_bpp = inf->bpp; | 559 | info->var.nonstd = pdata->nonstd; |
482 | info->var.bits_per_pixel = inf->bpp; | 560 | info->var.pixclock = pdata->pixclock; |
483 | info->var.nonstd = inf->nonstd; | 561 | info->var.hsync_len = pdata->hsync_len; |
484 | info->var.pixclock = inf->pixclock; | 562 | info->var.left_margin = pdata->left_margin; |
485 | info->var.hsync_len = inf->hsync_len; | 563 | info->var.right_margin = pdata->right_margin; |
486 | info->var.left_margin = inf->left_margin; | 564 | info->var.vsync_len = pdata->vsync_len; |
487 | info->var.right_margin = inf->right_margin; | 565 | info->var.upper_margin = pdata->upper_margin; |
488 | info->var.vsync_len = inf->vsync_len; | 566 | info->var.lower_margin = pdata->lower_margin; |
489 | info->var.upper_margin = inf->upper_margin; | 567 | info->var.sync = pdata->sync; |
490 | info->var.lower_margin = inf->lower_margin; | 568 | info->var.grayscale = pdata->cmap_greyscale; |
491 | info->var.sync = inf->sync; | 569 | fbi->cmap_inverse = pdata->cmap_inverse; |
492 | info->var.grayscale = inf->cmap_greyscale; | 570 | fbi->cmap_static = pdata->cmap_static; |
493 | fbi->cmap_inverse = inf->cmap_inverse; | 571 | fbi->pcr = pdata->pcr; |
494 | fbi->cmap_static = inf->cmap_static; | 572 | fbi->lscr1 = pdata->lscr1; |
495 | fbi->pcr = inf->pcr; | 573 | fbi->dmacr = pdata->dmacr; |
496 | fbi->lscr1 = inf->lscr1; | 574 | fbi->pwmr = pdata->pwmr; |
497 | fbi->dmacr = inf->dmacr; | 575 | fbi->lcd_power = pdata->lcd_power; |
498 | fbi->pwmr = inf->pwmr; | 576 | fbi->backlight_power = pdata->backlight_power; |
499 | fbi->lcd_power = inf->lcd_power; | ||
500 | fbi->backlight_power = inf->backlight_power; | ||
501 | info->fix.smem_len = fbi->max_xres * fbi->max_yres * | 577 | info->fix.smem_len = fbi->max_xres * fbi->max_yres * |
502 | fbi->max_bpp / 8; | 578 | fbi->max_bpp / 8; |
503 | 579 | ||
504 | return 0; | 580 | return 0; |
505 | } | 581 | } |
506 | 582 | ||
507 | /* | ||
508 | * Allocates the DRAM memory for the frame buffer. This buffer is | ||
509 | * remapped into a non-cached, non-buffered, memory region to | ||
510 | * allow pixel writes to occur without flushing the cache. | ||
511 | * Once this area is remapped, all virtual memory access to the | ||
512 | * video memory should occur at the new region. | ||
513 | */ | ||
514 | static int __init imxfb_map_video_memory(struct fb_info *info) | ||
515 | { | ||
516 | struct imxfb_info *fbi = info->par; | ||
517 | |||
518 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); | ||
519 | fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size, | ||
520 | &fbi->map_dma,GFP_KERNEL); | ||
521 | |||
522 | if (fbi->map_cpu) { | ||
523 | info->screen_base = fbi->map_cpu; | ||
524 | fbi->screen_cpu = fbi->map_cpu; | ||
525 | fbi->screen_dma = fbi->map_dma; | ||
526 | info->fix.smem_start = fbi->screen_dma; | ||
527 | } | ||
528 | |||
529 | return fbi->map_cpu ? 0 : -ENOMEM; | ||
530 | } | ||
531 | |||
532 | static int __init imxfb_probe(struct platform_device *pdev) | 583 | static int __init imxfb_probe(struct platform_device *pdev) |
533 | { | 584 | { |
534 | struct imxfb_info *fbi; | 585 | struct imxfb_info *fbi; |
535 | struct fb_info *info; | 586 | struct fb_info *info; |
536 | struct imxfb_mach_info *inf; | 587 | struct imx_fb_platform_data *pdata; |
537 | struct resource *res; | 588 | struct resource *res; |
538 | int ret; | 589 | int ret; |
539 | 590 | ||
540 | printk("i.MX Framebuffer driver\n"); | 591 | printk("i.MX Framebuffer driver\n"); |
541 | 592 | ||
542 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 593 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
543 | if(!res) | 594 | if (!res) |
544 | return -ENODEV; | 595 | return -ENODEV; |
545 | 596 | ||
546 | inf = pdev->dev.platform_data; | 597 | pdata = pdev->dev.platform_data; |
547 | if(!inf) { | 598 | if (!pdata) { |
548 | dev_err(&pdev->dev,"No platform_data available\n"); | 599 | dev_err(&pdev->dev,"No platform_data available\n"); |
549 | return -ENOMEM; | 600 | return -ENOMEM; |
550 | } | 601 | } |
551 | 602 | ||
552 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); | 603 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); |
553 | if(!info) | 604 | if (!info) |
554 | return -ENOMEM; | 605 | return -ENOMEM; |
555 | 606 | ||
556 | fbi = info->par; | 607 | fbi = info->par; |
557 | 608 | ||
558 | platform_set_drvdata(pdev, info); | 609 | platform_set_drvdata(pdev, info); |
559 | 610 | ||
560 | ret = imxfb_init_fbinfo(&pdev->dev); | 611 | ret = imxfb_init_fbinfo(pdev); |
561 | if( ret < 0 ) | 612 | if (ret < 0) |
562 | goto failed_init; | 613 | goto failed_init; |
563 | 614 | ||
564 | res = request_mem_region(res->start, res->end - res->start + 1, "IMXFB"); | 615 | res = request_mem_region(res->start, resource_size(res), |
616 | DRIVER_NAME); | ||
565 | if (!res) { | 617 | if (!res) { |
566 | ret = -EBUSY; | 618 | ret = -EBUSY; |
567 | goto failed_regs; | 619 | goto failed_req; |
620 | } | ||
621 | |||
622 | fbi->regs = ioremap(res->start, resource_size(res)); | ||
623 | if (fbi->regs == NULL) { | ||
624 | printk(KERN_ERR"Cannot map frame buffer registers\n"); | ||
625 | goto failed_ioremap; | ||
568 | } | 626 | } |
569 | 627 | ||
570 | if (!inf->fixed_screen_cpu) { | 628 | if (!pdata->fixed_screen_cpu) { |
571 | ret = imxfb_map_video_memory(info); | 629 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
572 | if (ret) { | 630 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, |
631 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | ||
632 | |||
633 | if (!fbi->map_cpu) { | ||
573 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); | 634 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
574 | ret = -ENOMEM; | 635 | ret = -ENOMEM; |
575 | goto failed_map; | 636 | goto failed_map; |
576 | } | 637 | } |
638 | |||
639 | info->screen_base = fbi->map_cpu; | ||
640 | fbi->screen_cpu = fbi->map_cpu; | ||
641 | fbi->screen_dma = fbi->map_dma; | ||
642 | info->fix.smem_start = fbi->screen_dma; | ||
577 | } else { | 643 | } else { |
578 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | 644 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ |
579 | fbi->map_cpu = inf->fixed_screen_cpu; | 645 | fbi->map_cpu = pdata->fixed_screen_cpu; |
580 | fbi->map_dma = inf->fixed_screen_dma; | 646 | fbi->map_dma = pdata->fixed_screen_dma; |
581 | info->screen_base = fbi->map_cpu; | 647 | info->screen_base = fbi->map_cpu; |
582 | fbi->screen_cpu = fbi->map_cpu; | 648 | fbi->screen_cpu = fbi->map_cpu; |
583 | fbi->screen_dma = fbi->map_dma; | 649 | fbi->screen_dma = fbi->map_dma; |
@@ -590,12 +656,10 @@ static int __init imxfb_probe(struct platform_device *pdev) | |||
590 | */ | 656 | */ |
591 | imxfb_check_var(&info->var, info); | 657 | imxfb_check_var(&info->var, info); |
592 | 658 | ||
593 | ret = fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0); | 659 | ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); |
594 | if (ret < 0) | 660 | if (ret < 0) |
595 | goto failed_cmap; | 661 | goto failed_cmap; |
596 | 662 | ||
597 | imxfb_setup_gpio(fbi); | ||
598 | |||
599 | imxfb_set_par(info); | 663 | imxfb_set_par(info); |
600 | ret = register_framebuffer(info); | 664 | ret = register_framebuffer(info); |
601 | if (ret < 0) { | 665 | if (ret < 0) { |
@@ -610,20 +674,22 @@ static int __init imxfb_probe(struct platform_device *pdev) | |||
610 | failed_register: | 674 | failed_register: |
611 | fb_dealloc_cmap(&info->cmap); | 675 | fb_dealloc_cmap(&info->cmap); |
612 | failed_cmap: | 676 | failed_cmap: |
613 | if (!inf->fixed_screen_cpu) | 677 | if (!pdata->fixed_screen_cpu) |
614 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, | 678 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
615 | fbi->map_dma); | 679 | fbi->map_dma); |
616 | failed_map: | 680 | failed_map: |
617 | kfree(info->pseudo_palette); | 681 | iounmap(fbi->regs); |
618 | failed_regs: | 682 | failed_ioremap: |
619 | release_mem_region(res->start, res->end - res->start); | 683 | release_mem_region(res->start, res->end - res->start); |
684 | failed_req: | ||
685 | kfree(info->pseudo_palette); | ||
620 | failed_init: | 686 | failed_init: |
621 | platform_set_drvdata(pdev, NULL); | 687 | platform_set_drvdata(pdev, NULL); |
622 | framebuffer_release(info); | 688 | framebuffer_release(info); |
623 | return ret; | 689 | return ret; |
624 | } | 690 | } |
625 | 691 | ||
626 | static int imxfb_remove(struct platform_device *pdev) | 692 | static int __devexit imxfb_remove(struct platform_device *pdev) |
627 | { | 693 | { |
628 | struct fb_info *info = platform_get_drvdata(pdev); | 694 | struct fb_info *info = platform_get_drvdata(pdev); |
629 | struct imxfb_info *fbi = info->par; | 695 | struct imxfb_info *fbi = info->par; |
@@ -639,6 +705,7 @@ static int imxfb_remove(struct platform_device *pdev) | |||
639 | kfree(info->pseudo_palette); | 705 | kfree(info->pseudo_palette); |
640 | framebuffer_release(info); | 706 | framebuffer_release(info); |
641 | 707 | ||
708 | iounmap(fbi->regs); | ||
642 | release_mem_region(res->start, res->end - res->start + 1); | 709 | release_mem_region(res->start, res->end - res->start + 1); |
643 | platform_set_drvdata(pdev, NULL); | 710 | platform_set_drvdata(pdev, NULL); |
644 | 711 | ||
@@ -653,19 +720,18 @@ void imxfb_shutdown(struct platform_device * dev) | |||
653 | } | 720 | } |
654 | 721 | ||
655 | static struct platform_driver imxfb_driver = { | 722 | static struct platform_driver imxfb_driver = { |
656 | .probe = imxfb_probe, | ||
657 | .suspend = imxfb_suspend, | 723 | .suspend = imxfb_suspend, |
658 | .resume = imxfb_resume, | 724 | .resume = imxfb_resume, |
659 | .remove = imxfb_remove, | 725 | .remove = __devexit_p(imxfb_remove), |
660 | .shutdown = imxfb_shutdown, | 726 | .shutdown = imxfb_shutdown, |
661 | .driver = { | 727 | .driver = { |
662 | .name = "imx-fb", | 728 | .name = DRIVER_NAME, |
663 | }, | 729 | }, |
664 | }; | 730 | }; |
665 | 731 | ||
666 | int __init imxfb_init(void) | 732 | int __init imxfb_init(void) |
667 | { | 733 | { |
668 | return platform_driver_register(&imxfb_driver); | 734 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
669 | } | 735 | } |
670 | 736 | ||
671 | static void __exit imxfb_cleanup(void) | 737 | static void __exit imxfb_cleanup(void) |