diff options
Diffstat (limited to 'drivers/video/imsttfb.c')
| -rw-r--r-- | drivers/video/imsttfb.c | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/drivers/video/imsttfb.c b/drivers/video/imsttfb.c index 7db42542eb19..f73c642b50c2 100644 --- a/drivers/video/imsttfb.c +++ b/drivers/video/imsttfb.c | |||
| @@ -440,9 +440,9 @@ getclkMHz(struct imstt_par *par) | |||
| 440 | static void | 440 | static void |
| 441 | setclkMHz(struct imstt_par *par, __u32 MHz) | 441 | setclkMHz(struct imstt_par *par, __u32 MHz) |
| 442 | { | 442 | { |
| 443 | __u32 clk_m, clk_n, clk_p, x, stage, spilled; | 443 | __u32 clk_m, clk_n, x, stage, spilled; |
| 444 | 444 | ||
| 445 | clk_m = clk_n = clk_p = 0; | 445 | clk_m = clk_n = 0; |
| 446 | stage = spilled = 0; | 446 | stage = spilled = 0; |
| 447 | for (;;) { | 447 | for (;;) { |
| 448 | switch (stage) { | 448 | switch (stage) { |
| @@ -453,7 +453,7 @@ setclkMHz(struct imstt_par *par, __u32 MHz) | |||
| 453 | clk_n++; | 453 | clk_n++; |
| 454 | break; | 454 | break; |
| 455 | } | 455 | } |
| 456 | x = 20 * (clk_m + 1) / ((clk_n + 1) * (clk_p ? 2 * clk_p : 1)); | 456 | x = 20 * (clk_m + 1) / (clk_n + 1); |
| 457 | if (x == MHz) | 457 | if (x == MHz) |
| 458 | break; | 458 | break; |
| 459 | if (x > MHz) { | 459 | if (x > MHz) { |
| @@ -466,7 +466,7 @@ setclkMHz(struct imstt_par *par, __u32 MHz) | |||
| 466 | 466 | ||
| 467 | par->init.pclk_m = clk_m; | 467 | par->init.pclk_m = clk_m; |
| 468 | par->init.pclk_n = clk_n; | 468 | par->init.pclk_n = clk_n; |
| 469 | par->init.pclk_p = clk_p; | 469 | par->init.pclk_p = 0; |
| 470 | } | 470 | } |
| 471 | 471 | ||
| 472 | static struct imstt_regvals * | 472 | static struct imstt_regvals * |
| @@ -1372,18 +1372,24 @@ init_imstt(struct fb_info *info) | |||
| 1372 | write_reg_le32(par->dc_regs, STGCTL, tmp & ~0x1); | 1372 | write_reg_le32(par->dc_regs, STGCTL, tmp & ~0x1); |
| 1373 | write_reg_le32(par->dc_regs, SSR, 0); | 1373 | write_reg_le32(par->dc_regs, SSR, 0); |
| 1374 | 1374 | ||
| 1375 | /* set default values for DAC registers */ | 1375 | /* set default values for DAC registers */ |
| 1376 | if (par->ramdac == IBM) { | 1376 | if (par->ramdac == IBM) { |
| 1377 | par->cmap_regs[PPMASK] = 0xff; eieio(); | 1377 | par->cmap_regs[PPMASK] = 0xff; |
| 1378 | par->cmap_regs[PIDXHI] = 0; eieio(); | 1378 | eieio(); |
| 1379 | for (i = 0; i < sizeof(ibm_initregs) / sizeof(*ibm_initregs); i++) { | 1379 | par->cmap_regs[PIDXHI] = 0; |
| 1380 | par->cmap_regs[PIDXLO] = ibm_initregs[i].addr; eieio(); | 1380 | eieio(); |
| 1381 | par->cmap_regs[PIDXDATA] = ibm_initregs[i].value; eieio(); | 1381 | for (i = 0; i < ARRAY_SIZE(ibm_initregs); i++) { |
| 1382 | par->cmap_regs[PIDXLO] = ibm_initregs[i].addr; | ||
| 1383 | eieio(); | ||
| 1384 | par->cmap_regs[PIDXDATA] = ibm_initregs[i].value; | ||
| 1385 | eieio(); | ||
| 1382 | } | 1386 | } |
| 1383 | } else { | 1387 | } else { |
| 1384 | for (i = 0; i < sizeof(tvp_initregs) / sizeof(*tvp_initregs); i++) { | 1388 | for (i = 0; i < ARRAY_SIZE(tvp_initregs); i++) { |
| 1385 | par->cmap_regs[TVPADDRW] = tvp_initregs[i].addr; eieio(); | 1389 | par->cmap_regs[TVPADDRW] = tvp_initregs[i].addr; |
| 1386 | par->cmap_regs[TVPIDATA] = tvp_initregs[i].value; eieio(); | 1390 | eieio(); |
| 1391 | par->cmap_regs[TVPIDATA] = tvp_initregs[i].value; | ||
| 1392 | eieio(); | ||
| 1387 | } | 1393 | } |
| 1388 | } | 1394 | } |
| 1389 | 1395 | ||
