aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video/igafb.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/video/igafb.c')
-rw-r--r--drivers/video/igafb.c579
1 files changed, 579 insertions, 0 deletions
diff --git a/drivers/video/igafb.c b/drivers/video/igafb.c
new file mode 100644
index 000000000000..e326f44f652d
--- /dev/null
+++ b/drivers/video/igafb.c
@@ -0,0 +1,579 @@
1/*
2 * linux/drivers/video/igafb.c -- Frame buffer device for IGA 1682
3 *
4 * Copyright (C) 1998 Vladimir Roganov and Gleb Raiko
5 *
6 * This driver is partly based on the Frame buffer device for ATI Mach64
7 * and partially on VESA-related code.
8 *
9 * Copyright (C) 1997-1998 Geert Uytterhoeven
10 * Copyright (C) 1998 Bernd Harries
11 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file COPYING in the main directory of this archive for
15 * more details.
16 */
17
18/******************************************************************************
19
20 TODO:
21 Despite of IGA Card has advanced graphic acceleration,
22 initial version is almost dummy and does not support it.
23 Support for video modes and acceleration must be added
24 together with accelerated X-Windows driver implementation.
25
26 Most important thing at this moment is that we have working
27 JavaEngine1 console & X with new console interface.
28
29******************************************************************************/
30
31#include <linux/module.h>
32#include <linux/kernel.h>
33#include <linux/errno.h>
34#include <linux/string.h>
35#include <linux/mm.h>
36#include <linux/tty.h>
37#include <linux/slab.h>
38#include <linux/vmalloc.h>
39#include <linux/delay.h>
40#include <linux/interrupt.h>
41#include <linux/fb.h>
42#include <linux/init.h>
43#include <linux/pci.h>
44#include <linux/nvram.h>
45
46#include <asm/io.h>
47
48#ifdef __sparc__
49#include <asm/pbm.h>
50#include <asm/pcic.h>
51#endif
52
53#include <video/iga.h>
54
55struct pci_mmap_map {
56 unsigned long voff;
57 unsigned long poff;
58 unsigned long size;
59 unsigned long prot_flag;
60 unsigned long prot_mask;
61};
62
63struct iga_par {
64 struct pci_mmap_map *mmap_map;
65 unsigned long frame_buffer_phys;
66 unsigned long io_base;
67};
68
69struct fb_info fb_info;
70
71struct fb_fix_screeninfo igafb_fix __initdata = {
72 .id = "IGA 1682",
73 .type = FB_TYPE_PACKED_PIXELS,
74 .mmio_len = 1000
75};
76
77struct fb_var_screeninfo default_var = {
78 /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
79 .xres = 640,
80 .yres = 480,
81 .xres_virtual = 640,
82 .yres_virtual = 480,
83 .bits_per_pixel = 8,
84 .red = {0, 8, 0 },
85 .green = {0, 8, 0 },
86 .blue = {0, 8, 0 },
87 .height = -1,
88 .width = -1,
89 .accel_flags = FB_ACCEL_NONE,
90 .pixclock = 39722,
91 .left_margin = 48,
92 .right_margin = 16,
93 .upper_margin = 33,
94 .lower_margin = 10,
95 .hsync_len = 96,
96 .vsync_len = 2,
97 .vmode = FB_VMODE_NONINTERLACED
98};
99
100#ifdef __sparc__
101struct fb_var_screeninfo default_var_1024x768 __initdata = {
102 /* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */
103 .xres = 1024,
104 .yres = 768,
105 .xres_virtual = 1024,
106 .yres_virtual = 768,
107 .bits_per_pixel = 8,
108 .red = {0, 8, 0 },
109 .green = {0, 8, 0 },
110 .blue = {0, 8, 0 },
111 .height = -1,
112 .width = -1,
113 .accel_flags = FB_ACCEL_NONE,
114 .pixclock = 12699,
115 .left_margin = 176,
116 .right_margin = 16,
117 .upper_margin = 28,
118 .lower_margin = 1,
119 .hsync_len = 96,
120 .vsync_len = 3,
121 .vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
122};
123
124struct fb_var_screeninfo default_var_1152x900 __initdata = {
125 /* 1152x900, 76 Hz, Non-Interlaced (110.0 MHz dotclock) */
126 .xres = 1152,
127 .yres = 900,
128 .xres_virtual = 1152,
129 .yres_virtual = 900,
130 .bits_per_pixel = 8,
131 .red = { 0, 8, 0 },
132 .green = { 0, 8, 0 },
133 .blue = { 0, 8, 0 },
134 .height = -1,
135 .width = -1,
136 .accel_flags = FB_ACCEL_NONE,
137 .pixclock = 9091,
138 .left_margin = 234,
139 .right_margin = 24,
140 .upper_margin = 34,
141 .lower_margin = 3,
142 .hsync_len = 100,
143 .vsync_len = 3,
144 .vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
145};
146
147struct fb_var_screeninfo default_var_1280x1024 __initdata = {
148 /* 1280x1024, 75 Hz, Non-Interlaced (135.00 MHz dotclock) */
149 .xres = 1280,
150 .yres = 1024,
151 .xres_virtual = 1280,
152 .yres_virtual = 1024,
153 .bits_per_pixel = 8,
154 .red = {0, 8, 0 },
155 .green = {0, 8, 0 },
156 .blue = {0, 8, 0 },
157 .height = -1,
158 .width = -1,
159 .accel_flags = 0,
160 .pixclock = 7408,
161 .left_margin = 248,
162 .right_margin = 16,
163 .upper_margin = 38,
164 .lower_margin = 1,
165 .hsync_len = 144,
166 .vsync_len = 3,
167 .vmode = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
168};
169
170/*
171 * Memory-mapped I/O functions for Sparc PCI
172 *
173 * On sparc we happen to access I/O with memory mapped functions too.
174 */
175#define pci_inb(par, reg) readb(par->io_base+(reg))
176#define pci_outb(par, val, reg) writeb(val, par->io_base+(reg))
177
178static inline unsigned int iga_inb(struct iga_par *par, unsigned int reg,
179 unsigned int idx)
180{
181 pci_outb(par, idx, reg);
182 return pci_inb(par, reg + 1);
183}
184
185static inline void iga_outb(struct iga_par *par, unsigned char val,
186 unsigned int reg, unsigned int idx )
187{
188 pci_outb(par, idx, reg);
189 pci_outb(par, val, reg+1);
190}
191
192#endif /* __sparc__ */
193
194/*
195 * Very important functionality for the JavaEngine1 computer:
196 * make screen border black (usign special IGA registers)
197 */
198static void iga_blank_border(struct iga_par *par)
199{
200 int i;
201#if 0
202 /*
203 * PROM does this for us, so keep this code as a reminder
204 * about required read from 0x3DA and writing of 0x20 in the end.
205 */
206 (void) pci_inb(par, 0x3DA); /* required for every access */
207 pci_outb(par, IGA_IDX_VGA_OVERSCAN, IGA_ATTR_CTL);
208 (void) pci_inb(par, IGA_ATTR_CTL+1);
209 pci_outb(par, 0x38, IGA_ATTR_CTL);
210 pci_outb(par, 0x20, IGA_ATTR_CTL); /* re-enable visual */
211#endif
212 /*
213 * This does not work as it was designed because the overscan
214 * color is looked up in the palette. Therefore, under X11
215 * overscan changes color.
216 */
217 for (i=0; i < 3; i++)
218 iga_outb(par, 0, IGA_EXT_CNTRL, IGA_IDX_OVERSCAN_COLOR + i);
219}
220
221#ifdef __sparc__
222static int igafb_mmap(struct fb_info *info, struct file *file,
223 struct vm_area_struct *vma)
224{
225 struct iga_par *par = (struct iga_par *)info->par;
226 unsigned int size, page, map_size = 0;
227 unsigned long map_offset = 0;
228 int i;
229
230 if (!par->mmap_map)
231 return -ENXIO;
232
233 size = vma->vm_end - vma->vm_start;
234
235 /* To stop the swapper from even considering these pages. */
236 vma->vm_flags |= (VM_SHM | VM_LOCKED);
237
238 /* Each page, see which map applies */
239 for (page = 0; page < size; ) {
240 map_size = 0;
241 for (i = 0; par->mmap_map[i].size; i++) {
242 unsigned long start = par->mmap_map[i].voff;
243 unsigned long end = start + par->mmap_map[i].size;
244 unsigned long offset = (vma->vm_pgoff << PAGE_SHIFT) + page;
245
246 if (start > offset)
247 continue;
248 if (offset >= end)
249 continue;
250
251 map_size = par->mmap_map[i].size - (offset - start);
252 map_offset = par->mmap_map[i].poff + (offset - start);
253 break;
254 }
255 if (!map_size) {
256 page += PAGE_SIZE;
257 continue;
258 }
259 if (page + map_size > size)
260 map_size = size - page;
261
262 pgprot_val(vma->vm_page_prot) &= ~(par->mmap_map[i].prot_mask);
263 pgprot_val(vma->vm_page_prot) |= par->mmap_map[i].prot_flag;
264
265 if (remap_pfn_range(vma, vma->vm_start + page,
266 map_offset >> PAGE_SHIFT, map_size, vma->vm_page_prot))
267 return -EAGAIN;
268
269 page += map_size;
270 }
271
272 if (!map_size)
273 return -EINVAL;
274
275 vma->vm_flags |= VM_IO;
276 return 0;
277}
278#endif /* __sparc__ */
279
280static int igafb_setcolreg(unsigned regno, unsigned red, unsigned green,
281 unsigned blue, unsigned transp,
282 struct fb_info *info)
283{
284 /*
285 * Set a single color register. The values supplied are
286 * already rounded down to the hardware's capabilities
287 * (according to the entries in the `var' structure). Return
288 * != 0 for invalid regno.
289 */
290 struct iga_par *par = (struct iga_par *)info->par;
291
292 if (regno >= info->cmap.len)
293 return 1;
294
295 pci_outb(par, regno, DAC_W_INDEX);
296 pci_outb(par, red, DAC_DATA);
297 pci_outb(par, green, DAC_DATA);
298 pci_outb(par, blue, DAC_DATA);
299
300 if (regno < 16) {
301 switch (info->var.bits_per_pixel) {
302 case 16:
303 ((u16*)(info->pseudo_palette))[regno] =
304 (regno << 10) | (regno << 5) | regno;
305 break;
306 case 24:
307 ((u32*)(info->pseudo_palette))[regno] =
308 (regno << 16) | (regno << 8) | regno;
309 break;
310 case 32:
311 { int i;
312 i = (regno << 8) | regno;
313 ((u32*)(info->pseudo_palette))[regno] = (i << 16) | i;
314 }
315 break;
316 }
317 }
318 return 0;
319}
320
321/*
322 * Framebuffer option structure
323 */
324static struct fb_ops igafb_ops = {
325 .owner = THIS_MODULE,
326 .fb_setcolreg = igafb_setcolreg,
327 .fb_fillrect = cfb_fillrect,
328 .fb_copyarea = cfb_copyarea,
329 .fb_imageblit = cfb_imageblit,
330#ifdef __sparc__
331 .fb_mmap = igafb_mmap,
332#endif
333};
334
335static int __init iga_init(struct fb_info *info, struct iga_par *par)
336{
337 char vramsz = iga_inb(par, IGA_EXT_CNTRL, IGA_IDX_EXT_BUS_CNTL)
338 & MEM_SIZE_ALIAS;
339 int video_cmap_len;
340
341 switch (vramsz) {
342 case MEM_SIZE_1M:
343 info->fix.smem_len = 0x100000;
344 break;
345 case MEM_SIZE_2M:
346 info->fix.smem_len = 0x200000;
347 break;
348 case MEM_SIZE_4M:
349 case MEM_SIZE_RESERVED:
350 info->fix.smem_len = 0x400000;
351 break;
352 }
353
354 if (info->var.bits_per_pixel > 8)
355 video_cmap_len = 16;
356 else
357 video_cmap_len = 256;
358
359 info->fbops = &igafb_ops;
360 info->flags = FBINFO_DEFAULT;
361
362 fb_alloc_cmap(&info->cmap, video_cmap_len, 0);
363
364 if (register_framebuffer(info) < 0)
365 return 0;
366
367 printk("fb%d: %s frame buffer device at 0x%08lx [%dMB VRAM]\n",
368 info->node, info->fix.id,
369 par->frame_buffer_phys, info->fix.smem_len >> 20);
370
371 iga_blank_border(par);
372 return 1;
373}
374
375int __init igafb_init(void)
376{
377 extern int con_is_present(void);
378 struct fb_info *info;
379 struct pci_dev *pdev;
380 struct iga_par *par;
381 unsigned long addr;
382 int size, iga2000 = 0;
383
384 if (fb_get_options("igafb", NULL))
385 return -ENODEV;
386
387 /* Do not attach when we have a serial console. */
388 if (!con_is_present())
389 return -ENXIO;
390
391 pdev = pci_find_device(PCI_VENDOR_ID_INTERG,
392 PCI_DEVICE_ID_INTERG_1682, 0);
393 if (pdev == NULL) {
394 /*
395 * XXX We tried to use cyber2000fb.c for IGS 2000.
396 * But it does not initialize the chip in JavaStation-E, alas.
397 */
398 pdev = pci_find_device(PCI_VENDOR_ID_INTERG, 0x2000, 0);
399 if(pdev == NULL) {
400 return -ENXIO;
401 }
402 iga2000 = 1;
403 }
404
405 size = sizeof(struct fb_info) + sizeof(struct iga_par) + sizeof(u32)*16;
406
407 info = kmalloc(size, GFP_ATOMIC);
408 if (!info) {
409 printk("igafb_init: can't alloc fb_info\n");
410 return -ENOMEM;
411 }
412 memset(info, 0, size);
413
414 par = (struct iga_par *) (info + 1);
415
416
417 if ((addr = pdev->resource[0].start) == 0) {
418 printk("igafb_init: no memory start\n");
419 kfree(info);
420 return -ENXIO;
421 }
422
423 if ((info->screen_base = ioremap(addr, 1024*1024*2)) == 0) {
424 printk("igafb_init: can't remap %lx[2M]\n", addr);
425 kfree(info);
426 return -ENXIO;
427 }
428
429 par->frame_buffer_phys = addr & PCI_BASE_ADDRESS_MEM_MASK;
430
431#ifdef __sparc__
432 /*
433 * The following is sparc specific and this is why:
434 *
435 * IGS2000 has its I/O memory mapped and we want
436 * to generate memory cycles on PCI, e.g. do ioremap(),
437 * then readb/writeb() as in Documentation/IO-mapping.txt.
438 *
439 * IGS1682 is more traditional, it responds to PCI I/O
440 * cycles, so we want to access it with inb()/outb().
441 *
442 * On sparc, PCIC converts CPU memory access within
443 * phys window 0x3000xxxx into PCI I/O cycles. Therefore
444 * we may use readb/writeb to access them with IGS1682.
445 *
446 * We do not take io_base_phys from resource[n].start
447 * on IGS1682 because that chip is BROKEN. It does not
448 * have a base register for I/O. We just "know" what its
449 * I/O addresses are.
450 */
451 if (iga2000) {
452 igafb_fix.mmio_start = par->frame_buffer_phys | 0x00800000;
453 } else {
454 igafb_fix.mmio_start = 0x30000000; /* XXX */
455 }
456 if ((par->io_base = (int) ioremap(igafb_fix.mmio_start, igafb_fix.smem_len)) == 0) {
457 printk("igafb_init: can't remap %lx[4K]\n", igafb_fix.mmio_start);
458 iounmap((void *)info->screen_base);
459 kfree(info);
460 return -ENXIO;
461 }
462
463 /*
464 * Figure mmap addresses from PCI config space.
465 * We need two regions: for video memory and for I/O ports.
466 * Later one can add region for video coprocessor registers.
467 * However, mmap routine loops until size != 0, so we put
468 * one additional region with size == 0.
469 */
470
471 par->mmap_map = kmalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC);
472 if (!par->mmap_map) {
473 printk("igafb_init: can't alloc mmap_map\n");
474 iounmap((void *)par->io_base);
475 iounmap(info->screen_base);
476 kfree(info);
477 return -ENOMEM;
478 }
479
480 memset(par->mmap_map, 0, 4 * sizeof(*par->mmap_map));
481
482 /*
483 * Set default vmode and cmode from PROM properties.
484 */
485 {
486 struct pcidev_cookie *cookie = pdev->sysdata;
487 int node = cookie->prom_node;
488 int width = prom_getintdefault(node, "width", 1024);
489 int height = prom_getintdefault(node, "height", 768);
490 int depth = prom_getintdefault(node, "depth", 8);
491 switch (width) {
492 case 1024:
493 if (height == 768)
494 default_var = default_var_1024x768;
495 break;
496 case 1152:
497 if (height == 900)
498 default_var = default_var_1152x900;
499 break;
500 case 1280:
501 if (height == 1024)
502 default_var = default_var_1280x1024;
503 break;
504 default:
505 break;
506 }
507
508 switch (depth) {
509 case 8:
510 default_var.bits_per_pixel = 8;
511 break;
512 case 16:
513 default_var.bits_per_pixel = 16;
514 break;
515 case 24:
516 default_var.bits_per_pixel = 24;
517 break;
518 case 32:
519 default_var.bits_per_pixel = 32;
520 break;
521 default:
522 break;
523 }
524 }
525
526#endif
527 igafb_fix.smem_start = (unsigned long) info->screen_base;
528 igafb_fix.line_length = default_var.xres*(default_var.bits_per_pixel/8);
529 igafb_fix.visual = default_var.bits_per_pixel <= 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
530
531 info->var = default_var;
532 info->fix = igafb_fix;
533 info->pseudo_palette = (void *)(par + 1);
534 info->device = &pdev->dev;
535
536 if (!iga_init(info, par)) {
537 iounmap((void *)par->io_base);
538 iounmap(info->screen_base);
539 kfree(par->mmap_map);
540 kfree(info);
541 }
542
543#ifdef __sparc__
544 /*
545 * Add /dev/fb mmap values.
546 */
547
548 /* First region is for video memory */
549 par->mmap_map[0].voff = 0x0;
550 par->mmap_map[0].poff = par->frame_buffer_phys & PAGE_MASK;
551 par->mmap_map[0].size = info->fix.smem_len & PAGE_MASK;
552 par->mmap_map[0].prot_mask = SRMMU_CACHE;
553 par->mmap_map[0].prot_flag = SRMMU_WRITE;
554
555 /* Second region is for I/O ports */
556 par->mmap_map[1].voff = par->frame_buffer_phys & PAGE_MASK;
557 par->mmap_map[1].poff = info->fix.smem_start & PAGE_MASK;
558 par->mmap_map[1].size = PAGE_SIZE * 2; /* X wants 2 pages */
559 par->mmap_map[1].prot_mask = SRMMU_CACHE;
560 par->mmap_map[1].prot_flag = SRMMU_WRITE;
561#endif /* __sparc__ */
562
563 return 0;
564}
565
566int __init igafb_setup(char *options)
567{
568 char *this_opt;
569
570 if (!options || !*options)
571 return 0;
572
573 while ((this_opt = strsep(&options, ",")) != NULL) {
574 }
575 return 0;
576}
577
578module_init(igafb_init);
579MODULE_LICENSE("GPL");