diff options
Diffstat (limited to 'drivers/video/geode/video_gx.c')
-rw-r--r-- | drivers/video/geode/video_gx.c | 41 |
1 files changed, 21 insertions, 20 deletions
diff --git a/drivers/video/geode/video_gx.c b/drivers/video/geode/video_gx.c index cfe2c80b025d..e45d94143da0 100644 --- a/drivers/video/geode/video_gx.c +++ b/drivers/video/geode/video_gx.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include "geodefb.h" | 21 | #include "geodefb.h" |
22 | #include "video_gx.h" | 22 | #include "video_gx.h" |
23 | #include "gxfb.h" | ||
23 | 24 | ||
24 | 25 | ||
25 | /* | 26 | /* |
@@ -192,16 +193,16 @@ gx_configure_tft(struct fb_info *info) | |||
192 | 193 | ||
193 | /* Turn off the panel */ | 194 | /* Turn off the panel */ |
194 | 195 | ||
195 | fp = readl(par->vid_regs + GX_FP_PM); | 196 | fp = read_fp(par, GX_FP_PM); |
196 | fp &= ~GX_FP_PM_P; | 197 | fp &= ~GX_FP_PM_P; |
197 | writel(fp, par->vid_regs + GX_FP_PM); | 198 | write_fp(par, GX_FP_PM, fp); |
198 | 199 | ||
199 | /* Set timing 1 */ | 200 | /* Set timing 1 */ |
200 | 201 | ||
201 | fp = readl(par->vid_regs + GX_FP_PT1); | 202 | fp = read_fp(par, GX_FP_PT1); |
202 | fp &= GX_FP_PT1_VSIZE_MASK; | 203 | fp &= GX_FP_PT1_VSIZE_MASK; |
203 | fp |= info->var.yres << GX_FP_PT1_VSIZE_SHIFT; | 204 | fp |= info->var.yres << GX_FP_PT1_VSIZE_SHIFT; |
204 | writel(fp, par->vid_regs + GX_FP_PT1); | 205 | write_fp(par, GX_FP_PT1, fp); |
205 | 206 | ||
206 | /* Timing 2 */ | 207 | /* Timing 2 */ |
207 | /* Set bits that are always on for TFT */ | 208 | /* Set bits that are always on for TFT */ |
@@ -216,22 +217,22 @@ gx_configure_tft(struct fb_info *info) | |||
216 | if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) | 217 | if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) |
217 | fp |= GX_FP_PT2_HSP; | 218 | fp |= GX_FP_PT2_HSP; |
218 | 219 | ||
219 | writel(fp, par->vid_regs + GX_FP_PT2); | 220 | write_fp(par, GX_FP_PT2, fp); |
220 | 221 | ||
221 | /* Set the dither control */ | 222 | /* Set the dither control */ |
222 | writel(0x70, par->vid_regs + GX_FP_DFC); | 223 | write_fp(par, GX_FP_DFC, 0x70); |
223 | 224 | ||
224 | /* Enable the FP data and power (in case the BIOS didn't) */ | 225 | /* Enable the FP data and power (in case the BIOS didn't) */ |
225 | 226 | ||
226 | fp = readl(par->vid_regs + GX_DCFG); | 227 | fp = read_vp(par, GX_DCFG); |
227 | fp |= GX_DCFG_FP_PWR_EN | GX_DCFG_FP_DATA_EN; | 228 | fp |= GX_DCFG_FP_PWR_EN | GX_DCFG_FP_DATA_EN; |
228 | writel(fp, par->vid_regs + GX_DCFG); | 229 | write_vp(par, GX_DCFG, fp); |
229 | 230 | ||
230 | /* Unblank the panel */ | 231 | /* Unblank the panel */ |
231 | 232 | ||
232 | fp = readl(par->vid_regs + GX_FP_PM); | 233 | fp = read_fp(par, GX_FP_PM); |
233 | fp |= GX_FP_PM_P; | 234 | fp |= GX_FP_PM_P; |
234 | writel(fp, par->vid_regs + GX_FP_PM); | 235 | write_fp(par, GX_FP_PM, fp); |
235 | } | 236 | } |
236 | 237 | ||
237 | static void gx_configure_display(struct fb_info *info) | 238 | static void gx_configure_display(struct fb_info *info) |
@@ -240,11 +241,11 @@ static void gx_configure_display(struct fb_info *info) | |||
240 | u32 dcfg, misc; | 241 | u32 dcfg, misc; |
241 | 242 | ||
242 | /* Write the display configuration */ | 243 | /* Write the display configuration */ |
243 | dcfg = readl(par->vid_regs + GX_DCFG); | 244 | dcfg = read_vp(par, GX_DCFG); |
244 | 245 | ||
245 | /* Disable hsync and vsync */ | 246 | /* Disable hsync and vsync */ |
246 | dcfg &= ~(GX_DCFG_VSYNC_EN | GX_DCFG_HSYNC_EN); | 247 | dcfg &= ~(GX_DCFG_VSYNC_EN | GX_DCFG_HSYNC_EN); |
247 | writel(dcfg, par->vid_regs + GX_DCFG); | 248 | write_vp(par, GX_DCFG, dcfg); |
248 | 249 | ||
249 | /* Clear bits from existing mode. */ | 250 | /* Clear bits from existing mode. */ |
250 | dcfg &= ~(GX_DCFG_CRT_SYNC_SKW_MASK | 251 | dcfg &= ~(GX_DCFG_CRT_SYNC_SKW_MASK |
@@ -257,7 +258,7 @@ static void gx_configure_display(struct fb_info *info) | |||
257 | /* Enable hsync and vsync. */ | 258 | /* Enable hsync and vsync. */ |
258 | dcfg |= GX_DCFG_HSYNC_EN | GX_DCFG_VSYNC_EN; | 259 | dcfg |= GX_DCFG_HSYNC_EN | GX_DCFG_VSYNC_EN; |
259 | 260 | ||
260 | misc = readl(par->vid_regs + GX_MISC); | 261 | misc = read_vp(par, GX_MISC); |
261 | 262 | ||
262 | /* Disable gamma correction */ | 263 | /* Disable gamma correction */ |
263 | misc |= GX_MISC_GAM_EN; | 264 | misc |= GX_MISC_GAM_EN; |
@@ -266,7 +267,7 @@ static void gx_configure_display(struct fb_info *info) | |||
266 | 267 | ||
267 | /* Power up the CRT DACs */ | 268 | /* Power up the CRT DACs */ |
268 | misc &= ~(GX_MISC_A_PWRDN | GX_MISC_DAC_PWRDN); | 269 | misc &= ~(GX_MISC_A_PWRDN | GX_MISC_DAC_PWRDN); |
269 | writel(misc, par->vid_regs + GX_MISC); | 270 | write_vp(par, GX_MISC, misc); |
270 | 271 | ||
271 | /* Only change the sync polarities if we are running | 272 | /* Only change the sync polarities if we are running |
272 | * in CRT mode. The FP polarities will be handled in | 273 | * in CRT mode. The FP polarities will be handled in |
@@ -278,7 +279,7 @@ static void gx_configure_display(struct fb_info *info) | |||
278 | } else { | 279 | } else { |
279 | /* Power down the CRT DACs if in FP mode */ | 280 | /* Power down the CRT DACs if in FP mode */ |
280 | misc |= (GX_MISC_A_PWRDN | GX_MISC_DAC_PWRDN); | 281 | misc |= (GX_MISC_A_PWRDN | GX_MISC_DAC_PWRDN); |
281 | writel(misc, par->vid_regs + GX_MISC); | 282 | write_vp(par, GX_MISC, misc); |
282 | } | 283 | } |
283 | 284 | ||
284 | /* Enable the display logic */ | 285 | /* Enable the display logic */ |
@@ -288,7 +289,7 @@ static void gx_configure_display(struct fb_info *info) | |||
288 | 289 | ||
289 | /* Enable the external DAC VREF? */ | 290 | /* Enable the external DAC VREF? */ |
290 | 291 | ||
291 | writel(dcfg, par->vid_regs + GX_DCFG); | 292 | write_vp(par, GX_DCFG, dcfg); |
292 | 293 | ||
293 | /* Set up the flat panel (if it is enabled) */ | 294 | /* Set up the flat panel (if it is enabled) */ |
294 | 295 | ||
@@ -322,7 +323,7 @@ static int gx_blank_display(struct fb_info *info, int blank_mode) | |||
322 | default: | 323 | default: |
323 | return -EINVAL; | 324 | return -EINVAL; |
324 | } | 325 | } |
325 | dcfg = readl(par->vid_regs + GX_DCFG); | 326 | dcfg = read_vp(par, GX_DCFG); |
326 | dcfg &= ~(GX_DCFG_DAC_BL_EN | 327 | dcfg &= ~(GX_DCFG_DAC_BL_EN |
327 | | GX_DCFG_HSYNC_EN | GX_DCFG_VSYNC_EN); | 328 | | GX_DCFG_HSYNC_EN | GX_DCFG_VSYNC_EN); |
328 | if (!blank) | 329 | if (!blank) |
@@ -331,17 +332,17 @@ static int gx_blank_display(struct fb_info *info, int blank_mode) | |||
331 | dcfg |= GX_DCFG_HSYNC_EN; | 332 | dcfg |= GX_DCFG_HSYNC_EN; |
332 | if (vsync) | 333 | if (vsync) |
333 | dcfg |= GX_DCFG_VSYNC_EN; | 334 | dcfg |= GX_DCFG_VSYNC_EN; |
334 | writel(dcfg, par->vid_regs + GX_DCFG); | 335 | write_vp(par, GX_DCFG, dcfg); |
335 | 336 | ||
336 | /* Power on/off flat panel. */ | 337 | /* Power on/off flat panel. */ |
337 | 338 | ||
338 | if (par->enable_crt == 0) { | 339 | if (par->enable_crt == 0) { |
339 | fp_pm = readl(par->vid_regs + GX_FP_PM); | 340 | fp_pm = read_fp(par, GX_FP_PM); |
340 | if (blank_mode == FB_BLANK_POWERDOWN) | 341 | if (blank_mode == FB_BLANK_POWERDOWN) |
341 | fp_pm &= ~GX_FP_PM_P; | 342 | fp_pm &= ~GX_FP_PM_P; |
342 | else | 343 | else |
343 | fp_pm |= GX_FP_PM_P; | 344 | fp_pm |= GX_FP_PM_P; |
344 | writel(fp_pm, par->vid_regs + GX_FP_PM); | 345 | write_fp(par, GX_FP_PM, fp_pm); |
345 | } | 346 | } |
346 | 347 | ||
347 | return 0; | 348 | return 0; |