diff options
Diffstat (limited to 'drivers/video/dnfb.c')
-rw-r--r-- | drivers/video/dnfb.c | 302 |
1 files changed, 302 insertions, 0 deletions
diff --git a/drivers/video/dnfb.c b/drivers/video/dnfb.c new file mode 100644 index 000000000000..1dbb82dca40b --- /dev/null +++ b/drivers/video/dnfb.c | |||
@@ -0,0 +1,302 @@ | |||
1 | #include <linux/kernel.h> | ||
2 | #include <linux/errno.h> | ||
3 | #include <linux/string.h> | ||
4 | #include <linux/mm.h> | ||
5 | #include <linux/tty.h> | ||
6 | #include <linux/slab.h> | ||
7 | #include <linux/delay.h> | ||
8 | #include <linux/interrupt.h> | ||
9 | #include <asm/setup.h> | ||
10 | #include <asm/system.h> | ||
11 | #include <asm/irq.h> | ||
12 | #include <asm/amigahw.h> | ||
13 | #include <asm/amigaints.h> | ||
14 | #include <asm/apollohw.h> | ||
15 | #include <linux/fb.h> | ||
16 | #include <linux/module.h> | ||
17 | |||
18 | /* apollo video HW definitions */ | ||
19 | |||
20 | /* | ||
21 | * Control Registers. IOBASE + $x | ||
22 | * | ||
23 | * Note: these are the Memory/IO BASE definitions for a mono card set to the | ||
24 | * alternate address | ||
25 | * | ||
26 | * Control 3A and 3B serve identical functions except that 3A | ||
27 | * deals with control 1 and 3b deals with Color LUT reg. | ||
28 | */ | ||
29 | |||
30 | #define AP_IOBASE 0x3b0 /* Base address of 1 plane board. */ | ||
31 | #define AP_STATUS isaIO2mem(AP_IOBASE+0) /* Status register. Read */ | ||
32 | #define AP_WRITE_ENABLE isaIO2mem(AP_IOBASE+0) /* Write Enable Register Write */ | ||
33 | #define AP_DEVICE_ID isaIO2mem(AP_IOBASE+1) /* Device ID Register. Read */ | ||
34 | #define AP_ROP_1 isaIO2mem(AP_IOBASE+2) /* Raster Operation reg. Write Word */ | ||
35 | #define AP_DIAG_MEM_REQ isaIO2mem(AP_IOBASE+4) /* Diagnostic Memory Request. Write Word */ | ||
36 | #define AP_CONTROL_0 isaIO2mem(AP_IOBASE+8) /* Control Register 0. Read/Write */ | ||
37 | #define AP_CONTROL_1 isaIO2mem(AP_IOBASE+0xa) /* Control Register 1. Read/Write */ | ||
38 | #define AP_CONTROL_3A isaIO2mem(AP_IOBASE+0xe) /* Control Register 3a. Read/Write */ | ||
39 | #define AP_CONTROL_2 isaIO2mem(AP_IOBASE+0xc) /* Control Register 2. Read/Write */ | ||
40 | |||
41 | |||
42 | #define FRAME_BUFFER_START 0x0FA0000 | ||
43 | #define FRAME_BUFFER_LEN 0x40000 | ||
44 | |||
45 | /* CREG 0 */ | ||
46 | #define VECTOR_MODE 0x40 /* 010x.xxxx */ | ||
47 | #define DBLT_MODE 0x80 /* 100x.xxxx */ | ||
48 | #define NORMAL_MODE 0xE0 /* 111x.xxxx */ | ||
49 | #define SHIFT_BITS 0x1F /* xxx1.1111 */ | ||
50 | /* other bits are Shift value */ | ||
51 | |||
52 | /* CREG 1 */ | ||
53 | #define AD_BLT 0x80 /* 1xxx.xxxx */ | ||
54 | #define NORMAL 0x80 /* 1xxx.xxxx */ /* What is happening here ?? */ | ||
55 | #define INVERSE 0x00 /* 0xxx.xxxx */ /* Clearing this reverses the screen */ | ||
56 | #define PIX_BLT 0x00 /* 0xxx.xxxx */ | ||
57 | |||
58 | #define AD_HIBIT 0x40 /* xIxx.xxxx */ | ||
59 | |||
60 | #define ROP_EN 0x10 /* xxx1.xxxx */ | ||
61 | #define DST_EQ_SRC 0x00 /* xxx0.xxxx */ | ||
62 | #define nRESET_SYNC 0x08 /* xxxx.1xxx */ | ||
63 | #define SYNC_ENAB 0x02 /* xxxx.xx1x */ | ||
64 | |||
65 | #define BLANK_DISP 0x00 /* xxxx.xxx0 */ | ||
66 | #define ENAB_DISP 0x01 /* xxxx.xxx1 */ | ||
67 | |||
68 | #define NORM_CREG1 (nRESET_SYNC | SYNC_ENAB | ENAB_DISP) /* no reset sync */ | ||
69 | |||
70 | /* CREG 2 */ | ||
71 | |||
72 | /* | ||
73 | * Following 3 defines are common to 1, 4 and 8 plane. | ||
74 | */ | ||
75 | |||
76 | #define S_DATA_1s 0x00 /* 00xx.xxxx */ /* set source to all 1's -- vector drawing */ | ||
77 | #define S_DATA_PIX 0x40 /* 01xx.xxxx */ /* takes source from ls-bits and replicates over 16 bits */ | ||
78 | #define S_DATA_PLN 0xC0 /* 11xx.xxxx */ /* normal, each data access =16-bits in | ||
79 | one plane of image mem */ | ||
80 | |||
81 | /* CREG 3A/CREG 3B */ | ||
82 | # define RESET_CREG 0x80 /* 1000.0000 */ | ||
83 | |||
84 | /* ROP REG - all one nibble */ | ||
85 | /* ********* NOTE : this is used r0,r1,r2,r3 *********** */ | ||
86 | #define ROP(r2,r3,r0,r1) ( (U_SHORT)((r0)|((r1)<<4)|((r2)<<8)|((r3)<<12)) ) | ||
87 | #define DEST_ZERO 0x0 | ||
88 | #define SRC_AND_DEST 0x1 | ||
89 | #define SRC_AND_nDEST 0x2 | ||
90 | #define SRC 0x3 | ||
91 | #define nSRC_AND_DEST 0x4 | ||
92 | #define DEST 0x5 | ||
93 | #define SRC_XOR_DEST 0x6 | ||
94 | #define SRC_OR_DEST 0x7 | ||
95 | #define SRC_NOR_DEST 0x8 | ||
96 | #define SRC_XNOR_DEST 0x9 | ||
97 | #define nDEST 0xA | ||
98 | #define SRC_OR_nDEST 0xB | ||
99 | #define nSRC 0xC | ||
100 | #define nSRC_OR_DEST 0xD | ||
101 | #define SRC_NAND_DEST 0xE | ||
102 | #define DEST_ONE 0xF | ||
103 | |||
104 | #define SWAP(A) ((A>>8) | ((A&0xff) <<8)) | ||
105 | |||
106 | /* frame buffer operations */ | ||
107 | |||
108 | static int dnfb_blank(int blank, struct fb_info *info); | ||
109 | static void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area); | ||
110 | |||
111 | static struct fb_ops dn_fb_ops = { | ||
112 | .owner = THIS_MODULE, | ||
113 | .fb_blank = dnfb_blank, | ||
114 | .fb_fillrect = cfb_fillrect, | ||
115 | .fb_copyarea = dnfb_copyarea, | ||
116 | .fb_imageblit = cfb_imageblit, | ||
117 | .fb_cursor = soft_cursor, | ||
118 | }; | ||
119 | |||
120 | struct fb_var_screeninfo dnfb_var __devinitdata = { | ||
121 | .xres = 1280, | ||
122 | .yres = 1024, | ||
123 | .xres_virtual = 2048, | ||
124 | .yres_virtual = 1024, | ||
125 | .bits_per_pixel = 1, | ||
126 | .height = -1, | ||
127 | .width = -1, | ||
128 | .vmode = FB_VMODE_NONINTERLACED, | ||
129 | }; | ||
130 | |||
131 | static struct fb_fix_screeninfo dnfb_fix __devinitdata = { | ||
132 | .id = "Apollo Mono", | ||
133 | .smem_start = (FRAME_BUFFER_START + IO_BASE), | ||
134 | .smem_len = FRAME_BUFFER_LEN, | ||
135 | .type = FB_TYPE_PACKED_PIXELS, | ||
136 | .visual = FB_VISUAL_MONO10, | ||
137 | .line_length = 256, | ||
138 | }; | ||
139 | |||
140 | static int dnfb_blank(int blank, struct fb_info *info) | ||
141 | { | ||
142 | if (blank) | ||
143 | out_8(AP_CONTROL_3A, 0x0); | ||
144 | else | ||
145 | out_8(AP_CONTROL_3A, 0x1); | ||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | static | ||
150 | void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | ||
151 | { | ||
152 | |||
153 | int incr, y_delta, pre_read = 0, x_end, x_word_count; | ||
154 | uint start_mask, end_mask, dest; | ||
155 | ushort *src, dummy; | ||
156 | short i, j; | ||
157 | |||
158 | incr = (area->dy <= area->sy) ? 1 : -1; | ||
159 | |||
160 | src = (ushort *)(info->screen_base + area->sy * info->fix.line_length + | ||
161 | (area->sx >> 4)); | ||
162 | dest = area->dy * (info->fix.line_length >> 1) + (area->dx >> 4); | ||
163 | |||
164 | if (incr > 0) { | ||
165 | y_delta = (info->fix.line_length * 8) - area->sx - area->width; | ||
166 | x_end = area->dx + area->width - 1; | ||
167 | x_word_count = (x_end >> 4) - (area->dx >> 4) + 1; | ||
168 | start_mask = 0xffff0000 >> (area->dx & 0xf); | ||
169 | end_mask = 0x7ffff >> (x_end & 0xf); | ||
170 | out_8(AP_CONTROL_0, | ||
171 | (((area->dx & 0xf) - (area->sx & 0xf)) % 16) | (0x4 << 5)); | ||
172 | if ((area->dx & 0xf) < (area->sx & 0xf)) | ||
173 | pre_read = 1; | ||
174 | } else { | ||
175 | y_delta = -((info->fix.line_length * 8) - area->sx - area->width); | ||
176 | x_end = area->dx - area->width + 1; | ||
177 | x_word_count = (area->dx >> 4) - (x_end >> 4) + 1; | ||
178 | start_mask = 0x7ffff >> (area->dx & 0xf); | ||
179 | end_mask = 0xffff0000 >> (x_end & 0xf); | ||
180 | out_8(AP_CONTROL_0, | ||
181 | ((-((area->sx & 0xf) - (area->dx & 0xf))) % 16) | | ||
182 | (0x4 << 5)); | ||
183 | if ((area->dx & 0xf) > (area->sx & 0xf)) | ||
184 | pre_read = 1; | ||
185 | } | ||
186 | |||
187 | for (i = 0; i < area->height; i++) { | ||
188 | |||
189 | out_8(AP_CONTROL_3A, 0xc | (dest >> 16)); | ||
190 | |||
191 | if (pre_read) { | ||
192 | dummy = *src; | ||
193 | src += incr; | ||
194 | } | ||
195 | |||
196 | if (x_word_count) { | ||
197 | out_8(AP_WRITE_ENABLE, start_mask); | ||
198 | *src = dest; | ||
199 | src += incr; | ||
200 | dest += incr; | ||
201 | out_8(AP_WRITE_ENABLE, 0); | ||
202 | |||
203 | for (j = 1; j < (x_word_count - 1); j++) { | ||
204 | *src = dest; | ||
205 | src += incr; | ||
206 | dest += incr; | ||
207 | } | ||
208 | |||
209 | out_8(AP_WRITE_ENABLE, start_mask); | ||
210 | *src = dest; | ||
211 | dest += incr; | ||
212 | src += incr; | ||
213 | } else { | ||
214 | out_8(AP_WRITE_ENABLE, start_mask | end_mask); | ||
215 | *src = dest; | ||
216 | dest += incr; | ||
217 | src += incr; | ||
218 | } | ||
219 | src += (y_delta / 16); | ||
220 | dest += (y_delta / 16); | ||
221 | } | ||
222 | out_8(AP_CONTROL_0, NORMAL_MODE); | ||
223 | } | ||
224 | |||
225 | /* | ||
226 | * Initialization | ||
227 | */ | ||
228 | |||
229 | static int __devinit dnfb_probe(struct device *device) | ||
230 | { | ||
231 | struct platform_device *dev = to_platform_device(device); | ||
232 | struct fb_info *info; | ||
233 | int err = 0; | ||
234 | |||
235 | info = framebuffer_alloc(0, &dev->dev); | ||
236 | if (!info) | ||
237 | return -ENOMEM; | ||
238 | |||
239 | info->fbops = &dn_fb_ops; | ||
240 | info->fix = dnfb_fix; | ||
241 | info->var = dnfb_var; | ||
242 | info->var.red.length = 1; | ||
243 | info->var.red.offset = 0; | ||
244 | info->var.green = info->var.blue = info->var.red; | ||
245 | info->screen_base = (u_char *) info->fix.smem_start; | ||
246 | |||
247 | err = fb_alloc_cmap(&info->cmap, 2, 0); | ||
248 | if (err < 0) { | ||
249 | framebuffer_release(info); | ||
250 | return err; | ||
251 | } | ||
252 | |||
253 | err = register_framebuffer(info); | ||
254 | if (err < 0) { | ||
255 | fb_dealloc_cmap(&info->cmap); | ||
256 | framebuffer_release(info); | ||
257 | return err; | ||
258 | } | ||
259 | dev_set_drvdata(&dev->dev, info); | ||
260 | |||
261 | /* now we have registered we can safely setup the hardware */ | ||
262 | out_8(AP_CONTROL_3A, RESET_CREG); | ||
263 | out_be16(AP_WRITE_ENABLE, 0x0); | ||
264 | out_8(AP_CONTROL_0, NORMAL_MODE); | ||
265 | out_8(AP_CONTROL_1, (AD_BLT | DST_EQ_SRC | NORM_CREG1)); | ||
266 | out_8(AP_CONTROL_2, S_DATA_PLN); | ||
267 | out_be16(AP_ROP_1, SWAP(0x3)); | ||
268 | |||
269 | printk("apollo frame buffer alive and kicking !\n"); | ||
270 | return err; | ||
271 | } | ||
272 | |||
273 | static struct device_driver dnfb_driver = { | ||
274 | .name = "dnfb", | ||
275 | .bus = &platform_bus_type, | ||
276 | .probe = dnfb_probe, | ||
277 | }; | ||
278 | |||
279 | static struct platform_device dnfb_device = { | ||
280 | .name = "dnfb", | ||
281 | }; | ||
282 | |||
283 | int __init dnfb_init(void) | ||
284 | { | ||
285 | int ret; | ||
286 | |||
287 | if (fb_get_options("dnfb", NULL)) | ||
288 | return -ENODEV; | ||
289 | |||
290 | ret = driver_register(&dnfb_driver); | ||
291 | |||
292 | if (!ret) { | ||
293 | ret = platform_device_register(&dnfb_device); | ||
294 | if (ret) | ||
295 | driver_unregister(&dnfb_driver); | ||
296 | } | ||
297 | return ret; | ||
298 | } | ||
299 | |||
300 | module_init(dnfb_init); | ||
301 | |||
302 | MODULE_LICENSE("GPL"); | ||