diff options
Diffstat (limited to 'drivers/video/cirrusfb.c')
-rw-r--r-- | drivers/video/cirrusfb.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c index 378d60e01902..53572c0f3474 100644 --- a/drivers/video/cirrusfb.c +++ b/drivers/video/cirrusfb.c | |||
@@ -694,7 +694,8 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
694 | struct cirrusfb_regs regs; | 694 | struct cirrusfb_regs regs; |
695 | u8 __iomem *regbase = cinfo->regbase; | 695 | u8 __iomem *regbase = cinfo->regbase; |
696 | unsigned char tmp; | 696 | unsigned char tmp; |
697 | int offset = 0, err; | 697 | int err; |
698 | int pitch; | ||
698 | const struct cirrusfb_board_info_rec *bi; | 699 | const struct cirrusfb_board_info_rec *bi; |
699 | int hdispend, hsyncstart, hsyncend, htotal; | 700 | int hdispend, hsyncstart, hsyncend, htotal; |
700 | int yres, vdispend, vsyncstart, vsyncend, vtotal; | 701 | int yres, vdispend, vsyncstart, vsyncend, vtotal; |
@@ -1027,7 +1028,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1027 | vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x06); | 1028 | vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x06); |
1028 | /* plane mask: only write to first plane */ | 1029 | /* plane mask: only write to first plane */ |
1029 | vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0x01); | 1030 | vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0x01); |
1030 | offset = var->xres_virtual / 16; | ||
1031 | } | 1031 | } |
1032 | 1032 | ||
1033 | /****************************************************** | 1033 | /****************************************************** |
@@ -1113,7 +1113,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1113 | vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a); | 1113 | vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a); |
1114 | /* plane mask: enable writing to all 4 planes */ | 1114 | /* plane mask: enable writing to all 4 planes */ |
1115 | vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff); | 1115 | vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff); |
1116 | offset = var->xres_virtual / 8; | ||
1117 | } | 1116 | } |
1118 | 1117 | ||
1119 | /****************************************************** | 1118 | /****************************************************** |
@@ -1190,7 +1189,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1190 | vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a); | 1189 | vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a); |
1191 | /* plane mask: enable writing to all 4 planes */ | 1190 | /* plane mask: enable writing to all 4 planes */ |
1192 | vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff); | 1191 | vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff); |
1193 | offset = var->xres_virtual / 4; | ||
1194 | } | 1192 | } |
1195 | 1193 | ||
1196 | /****************************************************** | 1194 | /****************************************************** |
@@ -1263,7 +1261,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1263 | vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a); | 1261 | vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a); |
1264 | /* plane mask: enable writing to all 4 planes */ | 1262 | /* plane mask: enable writing to all 4 planes */ |
1265 | vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff); | 1263 | vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff); |
1266 | offset = var->xres_virtual / 4; | ||
1267 | } | 1264 | } |
1268 | 1265 | ||
1269 | /****************************************************** | 1266 | /****************************************************** |
@@ -1277,9 +1274,10 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1277 | "What's this? requested color depth == %d.\n", | 1274 | "What's this? requested color depth == %d.\n", |
1278 | var->bits_per_pixel); | 1275 | var->bits_per_pixel); |
1279 | 1276 | ||
1280 | vga_wcrt(regbase, VGA_CRTC_OFFSET, offset & 0xff); | 1277 | pitch = info->fix.line_length >> 3; |
1278 | vga_wcrt(regbase, VGA_CRTC_OFFSET, pitch & 0xff); | ||
1281 | tmp = 0x22; | 1279 | tmp = 0x22; |
1282 | if (offset & 0x100) | 1280 | if (pitch & 0x100) |
1283 | tmp |= 0x10; /* offset overflow bit */ | 1281 | tmp |= 0x10; /* offset overflow bit */ |
1284 | 1282 | ||
1285 | /* screen start addr #16-18, fastpagemode cycles */ | 1283 | /* screen start addr #16-18, fastpagemode cycles */ |
@@ -1287,7 +1285,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1287 | 1285 | ||
1288 | /* screen start address bit 19 */ | 1286 | /* screen start address bit 19 */ |
1289 | if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) | 1287 | if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) |
1290 | vga_wcrt(regbase, CL_CRT1D, 0x00); | 1288 | vga_wcrt(regbase, CL_CRT1D, (pitch >> 9) & 1); |
1291 | 1289 | ||
1292 | if (cinfo->btype == BT_LAGUNA || | 1290 | if (cinfo->btype == BT_LAGUNA || |
1293 | cinfo->btype == BT_GD5480) { | 1291 | cinfo->btype == BT_GD5480) { |