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-rw-r--r--drivers/video/cg6.c244
1 files changed, 118 insertions, 126 deletions
diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c
index ee9046db9c7d..137e475bbd92 100644
--- a/drivers/video/cg6.c
+++ b/drivers/video/cg6.c
@@ -19,7 +19,6 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/prom.h>
23#include <asm/of_device.h> 22#include <asm/of_device.h>
24#include <asm/fbio.h> 23#include <asm/fbio.h>
25 24
@@ -65,41 +64,41 @@ static struct fb_ops cg6_ops = {
65 * The FBC could be the frame buffer control 64 * The FBC could be the frame buffer control
66 * The FHC could is the frame buffer hardware control. 65 * The FHC could is the frame buffer hardware control.
67 */ 66 */
68#define CG6_ROM_OFFSET 0x0UL 67#define CG6_ROM_OFFSET 0x0UL
69#define CG6_BROOKTREE_OFFSET 0x200000UL 68#define CG6_BROOKTREE_OFFSET 0x200000UL
70#define CG6_DHC_OFFSET 0x240000UL 69#define CG6_DHC_OFFSET 0x240000UL
71#define CG6_ALT_OFFSET 0x280000UL 70#define CG6_ALT_OFFSET 0x280000UL
72#define CG6_FHC_OFFSET 0x300000UL 71#define CG6_FHC_OFFSET 0x300000UL
73#define CG6_THC_OFFSET 0x301000UL 72#define CG6_THC_OFFSET 0x301000UL
74#define CG6_FBC_OFFSET 0x700000UL 73#define CG6_FBC_OFFSET 0x700000UL
75#define CG6_TEC_OFFSET 0x701000UL 74#define CG6_TEC_OFFSET 0x701000UL
76#define CG6_RAM_OFFSET 0x800000UL 75#define CG6_RAM_OFFSET 0x800000UL
77 76
78/* FHC definitions */ 77/* FHC definitions */
79#define CG6_FHC_FBID_SHIFT 24 78#define CG6_FHC_FBID_SHIFT 24
80#define CG6_FHC_FBID_MASK 255 79#define CG6_FHC_FBID_MASK 255
81#define CG6_FHC_REV_SHIFT 20 80#define CG6_FHC_REV_SHIFT 20
82#define CG6_FHC_REV_MASK 15 81#define CG6_FHC_REV_MASK 15
83#define CG6_FHC_FROP_DISABLE (1 << 19) 82#define CG6_FHC_FROP_DISABLE (1 << 19)
84#define CG6_FHC_ROW_DISABLE (1 << 18) 83#define CG6_FHC_ROW_DISABLE (1 << 18)
85#define CG6_FHC_SRC_DISABLE (1 << 17) 84#define CG6_FHC_SRC_DISABLE (1 << 17)
86#define CG6_FHC_DST_DISABLE (1 << 16) 85#define CG6_FHC_DST_DISABLE (1 << 16)
87#define CG6_FHC_RESET (1 << 15) 86#define CG6_FHC_RESET (1 << 15)
88#define CG6_FHC_LITTLE_ENDIAN (1 << 13) 87#define CG6_FHC_LITTLE_ENDIAN (1 << 13)
89#define CG6_FHC_RES_MASK (3 << 11) 88#define CG6_FHC_RES_MASK (3 << 11)
90#define CG6_FHC_1024 (0 << 11) 89#define CG6_FHC_1024 (0 << 11)
91#define CG6_FHC_1152 (1 << 11) 90#define CG6_FHC_1152 (1 << 11)
92#define CG6_FHC_1280 (2 << 11) 91#define CG6_FHC_1280 (2 << 11)
93#define CG6_FHC_1600 (3 << 11) 92#define CG6_FHC_1600 (3 << 11)
94#define CG6_FHC_CPU_MASK (3 << 9) 93#define CG6_FHC_CPU_MASK (3 << 9)
95#define CG6_FHC_CPU_SPARC (0 << 9) 94#define CG6_FHC_CPU_SPARC (0 << 9)
96#define CG6_FHC_CPU_68020 (1 << 9) 95#define CG6_FHC_CPU_68020 (1 << 9)
97#define CG6_FHC_CPU_386 (2 << 9) 96#define CG6_FHC_CPU_386 (2 << 9)
98#define CG6_FHC_TEST (1 << 8) 97#define CG6_FHC_TEST (1 << 8)
99#define CG6_FHC_TEST_X_SHIFT 4 98#define CG6_FHC_TEST_X_SHIFT 4
100#define CG6_FHC_TEST_X_MASK 15 99#define CG6_FHC_TEST_X_MASK 15
101#define CG6_FHC_TEST_Y_SHIFT 0 100#define CG6_FHC_TEST_Y_SHIFT 0
102#define CG6_FHC_TEST_Y_MASK 15 101#define CG6_FHC_TEST_Y_MASK 15
103 102
104/* FBC mode definitions */ 103/* FBC mode definitions */
105#define CG6_FBC_BLIT_IGNORE 0x00000000 104#define CG6_FBC_BLIT_IGNORE 0x00000000
@@ -150,17 +149,17 @@ static struct fb_ops cg6_ops = {
150#define CG6_FBC_INDEX_MASK 0x00000030 149#define CG6_FBC_INDEX_MASK 0x00000030
151 150
152/* THC definitions */ 151/* THC definitions */
153#define CG6_THC_MISC_REV_SHIFT 16 152#define CG6_THC_MISC_REV_SHIFT 16
154#define CG6_THC_MISC_REV_MASK 15 153#define CG6_THC_MISC_REV_MASK 15
155#define CG6_THC_MISC_RESET (1 << 12) 154#define CG6_THC_MISC_RESET (1 << 12)
156#define CG6_THC_MISC_VIDEO (1 << 10) 155#define CG6_THC_MISC_VIDEO (1 << 10)
157#define CG6_THC_MISC_SYNC (1 << 9) 156#define CG6_THC_MISC_SYNC (1 << 9)
158#define CG6_THC_MISC_VSYNC (1 << 8) 157#define CG6_THC_MISC_VSYNC (1 << 8)
159#define CG6_THC_MISC_SYNC_ENAB (1 << 7) 158#define CG6_THC_MISC_SYNC_ENAB (1 << 7)
160#define CG6_THC_MISC_CURS_RES (1 << 6) 159#define CG6_THC_MISC_CURS_RES (1 << 6)
161#define CG6_THC_MISC_INT_ENAB (1 << 5) 160#define CG6_THC_MISC_INT_ENAB (1 << 5)
162#define CG6_THC_MISC_INT (1 << 4) 161#define CG6_THC_MISC_INT (1 << 4)
163#define CG6_THC_MISC_INIT 0x9f 162#define CG6_THC_MISC_INIT 0x9f
164 163
165/* The contents are unknown */ 164/* The contents are unknown */
166struct cg6_tec { 165struct cg6_tec {
@@ -170,25 +169,25 @@ struct cg6_tec {
170}; 169};
171 170
172struct cg6_thc { 171struct cg6_thc {
173 u32 thc_pad0[512]; 172 u32 thc_pad0[512];
174 u32 thc_hs; /* hsync timing */ 173 u32 thc_hs; /* hsync timing */
175 u32 thc_hsdvs; 174 u32 thc_hsdvs;
176 u32 thc_hd; 175 u32 thc_hd;
177 u32 thc_vs; /* vsync timing */ 176 u32 thc_vs; /* vsync timing */
178 u32 thc_vd; 177 u32 thc_vd;
179 u32 thc_refresh; 178 u32 thc_refresh;
180 u32 thc_misc; 179 u32 thc_misc;
181 u32 thc_pad1[56]; 180 u32 thc_pad1[56];
182 u32 thc_cursxy; /* cursor x,y position (16 bits each) */ 181 u32 thc_cursxy; /* cursor x,y position (16 bits each) */
183 u32 thc_cursmask[32]; /* cursor mask bits */ 182 u32 thc_cursmask[32]; /* cursor mask bits */
184 u32 thc_cursbits[32]; /* what to show where mask enabled */ 183 u32 thc_cursbits[32]; /* what to show where mask enabled */
185}; 184};
186 185
187struct cg6_fbc { 186struct cg6_fbc {
188 u32 xxx0[1]; 187 u32 xxx0[1];
189 u32 mode; 188 u32 mode;
190 u32 clip; 189 u32 clip;
191 u32 xxx1[1]; 190 u32 xxx1[1];
192 u32 s; 191 u32 s;
193 u32 draw; 192 u32 draw;
194 u32 blit; 193 u32 blit;
@@ -243,10 +242,10 @@ struct cg6_fbc {
243}; 242};
244 243
245struct bt_regs { 244struct bt_regs {
246 u32 addr; 245 u32 addr;
247 u32 color_map; 246 u32 color_map;
248 u32 control; 247 u32 control;
249 u32 cursor; 248 u32 cursor;
250}; 249};
251 250
252struct cg6_par { 251struct cg6_par {
@@ -267,7 +266,7 @@ struct cg6_par {
267 266
268static int cg6_sync(struct fb_info *info) 267static int cg6_sync(struct fb_info *info)
269{ 268{
270 struct cg6_par *par = (struct cg6_par *) info->par; 269 struct cg6_par *par = (struct cg6_par *)info->par;
271 struct cg6_fbc __iomem *fbc = par->fbc; 270 struct cg6_fbc __iomem *fbc = par->fbc;
272 int limit = 10000; 271 int limit = 10000;
273 272
@@ -281,16 +280,14 @@ static int cg6_sync(struct fb_info *info)
281} 280}
282 281
283/** 282/**
284 * cg6_fillrect - REQUIRED function. Can use generic routines if 283 * cg6_fillrect - Draws a rectangle on the screen.
285 * non acclerated hardware and packed pixel based.
286 * Draws a rectangle on the screen.
287 * 284 *
288 * @info: frame buffer structure that represents a single frame buffer 285 * @info: frame buffer structure that represents a single frame buffer
289 * @rect: structure defining the rectagle and operation. 286 * @rect: structure defining the rectagle and operation.
290 */ 287 */
291static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 288static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
292{ 289{
293 struct cg6_par *par = (struct cg6_par *) info->par; 290 struct cg6_par *par = (struct cg6_par *)info->par;
294 struct cg6_fbc __iomem *fbc = par->fbc; 291 struct cg6_fbc __iomem *fbc = par->fbc;
295 unsigned long flags; 292 unsigned long flags;
296 s32 val; 293 s32 val;
@@ -316,16 +313,14 @@ static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
316} 313}
317 314
318/** 315/**
319 * cg6_imageblit - REQUIRED function. Can use generic routines if 316 * cg6_imageblit - Copies a image from system memory to the screen.
320 * non acclerated hardware and packed pixel based.
321 * Copies a image from system memory to the screen.
322 * 317 *
323 * @info: frame buffer structure that represents a single frame buffer 318 * @info: frame buffer structure that represents a single frame buffer
324 * @image: structure defining the image. 319 * @image: structure defining the image.
325 */ 320 */
326static void cg6_imageblit(struct fb_info *info, const struct fb_image *image) 321static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
327{ 322{
328 struct cg6_par *par = (struct cg6_par *) info->par; 323 struct cg6_par *par = (struct cg6_par *)info->par;
329 struct cg6_fbc __iomem *fbc = par->fbc; 324 struct cg6_fbc __iomem *fbc = par->fbc;
330 const u8 *data = image->data; 325 const u8 *data = image->data;
331 unsigned long flags; 326 unsigned long flags;
@@ -363,7 +358,7 @@ static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
363 sbus_writel(y, &fbc->y0); 358 sbus_writel(y, &fbc->y0);
364 sbus_writel(x, &fbc->x0); 359 sbus_writel(x, &fbc->x0);
365 sbus_writel(x + 32 - 1, &fbc->x1); 360 sbus_writel(x + 32 - 1, &fbc->x1);
366 361
367 val = ((u32)data[0] << 24) | 362 val = ((u32)data[0] << 24) |
368 ((u32)data[1] << 16) | 363 ((u32)data[1] << 16) |
369 ((u32)data[2] << 8) | 364 ((u32)data[2] << 8) |
@@ -404,19 +399,20 @@ static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
404} 399}
405 400
406/** 401/**
407 * cg6_setcolreg - Optional function. Sets a color register. 402 * cg6_setcolreg - Sets a color register.
408 * @regno: boolean, 0 copy local, 1 get_user() function 403 *
409 * @red: frame buffer colormap structure 404 * @regno: boolean, 0 copy local, 1 get_user() function
410 * @green: The green value which can be up to 16 bits wide 405 * @red: frame buffer colormap structure
411 * @blue: The blue value which can be up to 16 bits wide. 406 * @green: The green value which can be up to 16 bits wide
412 * @transp: If supported the alpha value which can be up to 16 bits wide. 407 * @blue: The blue value which can be up to 16 bits wide.
413 * @info: frame buffer info structure 408 * @transp: If supported the alpha value which can be up to 16 bits wide.
409 * @info: frame buffer info structure
414 */ 410 */
415static int cg6_setcolreg(unsigned regno, 411static int cg6_setcolreg(unsigned regno,
416 unsigned red, unsigned green, unsigned blue, 412 unsigned red, unsigned green, unsigned blue,
417 unsigned transp, struct fb_info *info) 413 unsigned transp, struct fb_info *info)
418{ 414{
419 struct cg6_par *par = (struct cg6_par *) info->par; 415 struct cg6_par *par = (struct cg6_par *)info->par;
420 struct bt_regs __iomem *bt = par->bt; 416 struct bt_regs __iomem *bt = par->bt;
421 unsigned long flags; 417 unsigned long flags;
422 418
@@ -440,25 +436,24 @@ static int cg6_setcolreg(unsigned regno,
440} 436}
441 437
442/** 438/**
443 * cg6_blank - Optional function. Blanks the display. 439 * cg6_blank - Blanks the display.
444 * @blank_mode: the blank mode we want. 440 *
445 * @info: frame buffer structure that represents a single frame buffer 441 * @blank_mode: the blank mode we want.
442 * @info: frame buffer structure that represents a single frame buffer
446 */ 443 */
447static int 444static int cg6_blank(int blank, struct fb_info *info)
448cg6_blank(int blank, struct fb_info *info)
449{ 445{
450 struct cg6_par *par = (struct cg6_par *) info->par; 446 struct cg6_par *par = (struct cg6_par *)info->par;
451 struct cg6_thc __iomem *thc = par->thc; 447 struct cg6_thc __iomem *thc = par->thc;
452 unsigned long flags; 448 unsigned long flags;
453 u32 val; 449 u32 val;
454 450
455 spin_lock_irqsave(&par->lock, flags); 451 spin_lock_irqsave(&par->lock, flags);
452 val = sbus_readl(&thc->thc_misc);
456 453
457 switch (blank) { 454 switch (blank) {
458 case FB_BLANK_UNBLANK: /* Unblanking */ 455 case FB_BLANK_UNBLANK: /* Unblanking */
459 val = sbus_readl(&thc->thc_misc);
460 val |= CG6_THC_MISC_VIDEO; 456 val |= CG6_THC_MISC_VIDEO;
461 sbus_writel(val, &thc->thc_misc);
462 par->flags &= ~CG6_FLAG_BLANKED; 457 par->flags &= ~CG6_FLAG_BLANKED;
463 break; 458 break;
464 459
@@ -466,13 +461,12 @@ cg6_blank(int blank, struct fb_info *info)
466 case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ 461 case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
467 case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ 462 case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
468 case FB_BLANK_POWERDOWN: /* Poweroff */ 463 case FB_BLANK_POWERDOWN: /* Poweroff */
469 val = sbus_readl(&thc->thc_misc);
470 val &= ~CG6_THC_MISC_VIDEO; 464 val &= ~CG6_THC_MISC_VIDEO;
471 sbus_writel(val, &thc->thc_misc);
472 par->flags |= CG6_FLAG_BLANKED; 465 par->flags |= CG6_FLAG_BLANKED;
473 break; 466 break;
474 } 467 }
475 468
469 sbus_writel(val, &thc->thc_misc);
476 spin_unlock_irqrestore(&par->lock, flags); 470 spin_unlock_irqrestore(&par->lock, flags);
477 471
478 return 0; 472 return 0;
@@ -533,7 +527,7 @@ static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma)
533 527
534static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) 528static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
535{ 529{
536 struct cg6_par *par = (struct cg6_par *) info->par; 530 struct cg6_par *par = (struct cg6_par *)info->par;
537 531
538 return sbusfb_ioctl_helper(cmd, arg, info, 532 return sbusfb_ioctl_helper(cmd, arg, info,
539 FBTYPE_SUNFAST_COLOR, 8, par->fbsize); 533 FBTYPE_SUNFAST_COLOR, 8, par->fbsize);
@@ -543,15 +537,14 @@ static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
543 * Initialisation 537 * Initialisation
544 */ 538 */
545 539
546static void 540static void __devinit cg6_init_fix(struct fb_info *info, int linebytes)
547cg6_init_fix(struct fb_info *info, int linebytes)
548{ 541{
549 struct cg6_par *par = (struct cg6_par *)info->par; 542 struct cg6_par *par = (struct cg6_par *)info->par;
550 const char *cg6_cpu_name, *cg6_card_name; 543 const char *cg6_cpu_name, *cg6_card_name;
551 u32 conf; 544 u32 conf;
552 545
553 conf = sbus_readl(par->fhc); 546 conf = sbus_readl(par->fhc);
554 switch(conf & CG6_FHC_CPU_MASK) { 547 switch (conf & CG6_FHC_CPU_MASK) {
555 case CG6_FHC_CPU_SPARC: 548 case CG6_FHC_CPU_SPARC:
556 cg6_cpu_name = "sparc"; 549 cg6_cpu_name = "sparc";
557 break; 550 break;
@@ -563,21 +556,19 @@ cg6_init_fix(struct fb_info *info, int linebytes)
563 break; 556 break;
564 }; 557 };
565 if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) { 558 if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) {
566 if (par->fbsize <= 0x100000) { 559 if (par->fbsize <= 0x100000)
567 cg6_card_name = "TGX"; 560 cg6_card_name = "TGX";
568 } else { 561 else
569 cg6_card_name = "TGX+"; 562 cg6_card_name = "TGX+";
570 }
571 } else { 563 } else {
572 if (par->fbsize <= 0x100000) { 564 if (par->fbsize <= 0x100000)
573 cg6_card_name = "GX"; 565 cg6_card_name = "GX";
574 } else { 566 else
575 cg6_card_name = "GX+"; 567 cg6_card_name = "GX+";
576 }
577 } 568 }
578 569
579 sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name); 570 sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name);
580 info->fix.id[sizeof(info->fix.id)-1] = 0; 571 info->fix.id[sizeof(info->fix.id) - 1] = 0;
581 572
582 info->fix.type = FB_TYPE_PACKED_PIXELS; 573 info->fix.type = FB_TYPE_PACKED_PIXELS;
583 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 574 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -588,28 +579,28 @@ cg6_init_fix(struct fb_info *info, int linebytes)
588} 579}
589 580
590/* Initialize Brooktree DAC */ 581/* Initialize Brooktree DAC */
591static void cg6_bt_init(struct cg6_par *par) 582static void __devinit cg6_bt_init(struct cg6_par *par)
592{ 583{
593 struct bt_regs __iomem *bt = par->bt; 584 struct bt_regs __iomem *bt = par->bt;
594 585
595 sbus_writel(0x04 << 24, &bt->addr); /* color planes */ 586 sbus_writel(0x04 << 24, &bt->addr); /* color planes */
596 sbus_writel(0xff << 24, &bt->control); 587 sbus_writel(0xff << 24, &bt->control);
597 sbus_writel(0x05 << 24, &bt->addr); 588 sbus_writel(0x05 << 24, &bt->addr);
598 sbus_writel(0x00 << 24, &bt->control); 589 sbus_writel(0x00 << 24, &bt->control);
599 sbus_writel(0x06 << 24, &bt->addr); /* overlay plane */ 590 sbus_writel(0x06 << 24, &bt->addr); /* overlay plane */
600 sbus_writel(0x73 << 24, &bt->control); 591 sbus_writel(0x73 << 24, &bt->control);
601 sbus_writel(0x07 << 24, &bt->addr); 592 sbus_writel(0x07 << 24, &bt->addr);
602 sbus_writel(0x00 << 24, &bt->control); 593 sbus_writel(0x00 << 24, &bt->control);
603} 594}
604 595
605static void cg6_chip_init(struct fb_info *info) 596static void __devinit cg6_chip_init(struct fb_info *info)
606{ 597{
607 struct cg6_par *par = (struct cg6_par *) info->par; 598 struct cg6_par *par = (struct cg6_par *)info->par;
608 struct cg6_tec __iomem *tec = par->tec; 599 struct cg6_tec __iomem *tec = par->tec;
609 struct cg6_fbc __iomem *fbc = par->fbc; 600 struct cg6_fbc __iomem *fbc = par->fbc;
610 u32 rev, conf, mode; 601 u32 rev, conf, mode;
611 int i; 602 int i;
612 603
613 /* Turn off stuff in the Transform Engine. */ 604 /* Turn off stuff in the Transform Engine. */
614 sbus_writel(0, &tec->tec_matrix); 605 sbus_writel(0, &tec->tec_matrix);
615 sbus_writel(0, &tec->tec_clip); 606 sbus_writel(0, &tec->tec_clip);
@@ -635,13 +626,13 @@ static void cg6_chip_init(struct fb_info *info)
635 i = sbus_readl(&fbc->s); 626 i = sbus_readl(&fbc->s);
636 } while (i & 0x10000000); 627 } while (i & 0x10000000);
637 mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK | 628 mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK |
638 CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK | 629 CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK |
639 CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK | 630 CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK |
640 CG6_FBC_BDISP_MASK); 631 CG6_FBC_BDISP_MASK);
641 mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 | 632 mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 |
642 CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE | 633 CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE |
643 CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 | 634 CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 |
644 CG6_FBC_BDISP_0); 635 CG6_FBC_BDISP_0);
645 sbus_writel(mode, &fbc->mode); 636 sbus_writel(mode, &fbc->mode);
646 637
647 sbus_writel(0, &fbc->clip); 638 sbus_writel(0, &fbc->clip);
@@ -671,7 +662,8 @@ static void cg6_unmap_regs(struct of_device *op, struct fb_info *info,
671 of_iounmap(&op->resource[0], info->screen_base, par->fbsize); 662 of_iounmap(&op->resource[0], info->screen_base, par->fbsize);
672} 663}
673 664
674static int __devinit cg6_probe(struct of_device *op, const struct of_device_id *match) 665static int __devinit cg6_probe(struct of_device *op,
666 const struct of_device_id *match)
675{ 667{
676 struct device_node *dp = op->node; 668 struct device_node *dp = op->node;
677 struct fb_info *info; 669 struct fb_info *info;
@@ -705,22 +697,22 @@ static int __devinit cg6_probe(struct of_device *op, const struct of_device_id *
705 par->fbsize *= 4; 697 par->fbsize *= 4;
706 698
707 par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET, 699 par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
708 4096, "cgsix fbc"); 700 4096, "cgsix fbc");
709 par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET, 701 par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET,
710 sizeof(struct cg6_tec), "cgsix tec"); 702 sizeof(struct cg6_tec), "cgsix tec");
711 par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET, 703 par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET,
712 sizeof(struct cg6_thc), "cgsix thc"); 704 sizeof(struct cg6_thc), "cgsix thc");
713 par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET, 705 par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET,
714 sizeof(struct bt_regs), "cgsix dac"); 706 sizeof(struct bt_regs), "cgsix dac");
715 par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET, 707 par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET,
716 sizeof(u32), "cgsix fhc"); 708 sizeof(u32), "cgsix fhc");
717 709
718 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT | 710 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
719 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; 711 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
720 info->fbops = &cg6_ops; 712 info->fbops = &cg6_ops;
721 713
722 info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET, 714 info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
723 par->fbsize, "cgsix ram"); 715 par->fbsize, "cgsix ram");
724 if (!par->fbc || !par->tec || !par->thc || 716 if (!par->fbc || !par->tec || !par->thc ||
725 !par->bt || !par->fhc || !info->screen_base) 717 !par->bt || !par->fhc || !info->screen_base)
726 goto out_unmap_regs; 718 goto out_unmap_regs;