diff options
Diffstat (limited to 'drivers/video/carminefb_regs.h')
-rw-r--r-- | drivers/video/carminefb_regs.h | 159 |
1 files changed, 159 insertions, 0 deletions
diff --git a/drivers/video/carminefb_regs.h b/drivers/video/carminefb_regs.h new file mode 100644 index 000000000000..045215600b73 --- /dev/null +++ b/drivers/video/carminefb_regs.h | |||
@@ -0,0 +1,159 @@ | |||
1 | #ifndef _CARMINEFB_REGS_H | ||
2 | #define _CARMINEFB_REGS_H | ||
3 | |||
4 | #define CARMINE_OVERLAY_EXT_MODE (0x00000002) | ||
5 | #define CARMINE_GRAPH_REG (0x00000000) | ||
6 | #define CARMINE_DISP0_REG (0x00100000) | ||
7 | #define CARMINE_DISP1_REG (0x00140000) | ||
8 | #define CARMINE_WB_REG (0x00180000) | ||
9 | #define CARMINE_DCTL_REG (0x00300000) | ||
10 | #define CARMINE_CTL_REG (0x00400000) | ||
11 | #define CARMINE_WINDOW_MODE (0x00000001) | ||
12 | #define CARMINE_EXTEND_MODE (CARMINE_WINDOW_MODE | \ | ||
13 | CARMINE_OVERLAY_EXT_MODE) | ||
14 | #define CARMINE_L0E (1 << 16) | ||
15 | #define CARMINE_L2E (1 << 18) | ||
16 | #define CARMINE_DEN (1 << 31) | ||
17 | |||
18 | #define CARMINE_EXT_CMODE_DIRECT24_RGBA (0xC0000000) | ||
19 | #define CARMINE_DCTL_REG_MODE_ADD (0x00) | ||
20 | #define CARMINE_DCTL_REG_SETTIME1_EMODE (0x04) | ||
21 | #define CARMINE_DCTL_REG_REFRESH_SETTIME2 (0x08) | ||
22 | #define CARMINE_DCTL_REG_RSV0_STATES (0x0C) | ||
23 | #define CARMINE_DCTL_REG_RSV2_RSV1 (0x10) | ||
24 | #define CARMINE_DCTL_REG_DDRIF2_DDRIF1 (0x14) | ||
25 | #define CARMINE_DCTL_REG_IOCONT1_IOCONT0 (0x24) | ||
26 | #define CARMINE_DCTL_REG_STATES_MASK (0x000F) | ||
27 | #define CARMINE_DCTL_INIT_WAIT_INTERVAL (1) | ||
28 | #define CARMINE_DCTL_INIT_WAIT_LIMIT (5000) | ||
29 | #define CARMINE_WB_REG_WBM_DEFAULT (0x0001c020) | ||
30 | #define CARMINE_DISP_REG_L0RM (0x1880) | ||
31 | #define CARMINE_DISP_REG_L0PX (0x1884) | ||
32 | #define CARMINE_DISP_REG_L0PY (0x1888) | ||
33 | #define CARMINE_DISP_REG_L2RM (0x18A0) | ||
34 | #define CARMINE_DISP_REG_L2PX (0x18A4) | ||
35 | #define CARMINE_DISP_REG_L2PY (0x18A8) | ||
36 | #define CARMINE_DISP_REG_L3RM (0x18B0) | ||
37 | #define CARMINE_DISP_REG_L3PX (0x18B4) | ||
38 | #define CARMINE_DISP_REG_L3PY (0x18B8) | ||
39 | #define CARMINE_DISP_REG_L4RM (0x18C0) | ||
40 | #define CARMINE_DISP_REG_L4PX (0x18C4) | ||
41 | #define CARMINE_DISP_REG_L4PY (0x18C8) | ||
42 | #define CARMINE_DISP_REG_L5RM (0x18D0) | ||
43 | #define CARMINE_DISP_REG_L5PX (0x18D4) | ||
44 | #define CARMINE_DISP_REG_L5PY (0x18D8) | ||
45 | #define CARMINE_DISP_REG_L6RM (0x1924) | ||
46 | #define CARMINE_DISP_REG_L6PX (0x1928) | ||
47 | #define CARMINE_DISP_REG_L6PY (0x192C) | ||
48 | #define CARMINE_DISP_REG_L7RM (0x1964) | ||
49 | #define CARMINE_DISP_REG_L7PX (0x1968) | ||
50 | #define CARMINE_DISP_REG_L7PY (0x196C) | ||
51 | #define CARMINE_WB_REG_WBM (0x0004) | ||
52 | #define CARMINE_DISP_HTP_SHIFT (16) | ||
53 | #define CARMINE_DISP_HDB_SHIFT (16) | ||
54 | #define CARMINE_DISP_HSW_SHIFT (16) | ||
55 | #define CARMINE_DISP_VSW_SHIFT (24) | ||
56 | #define CARMINE_DISP_VTR_SHIFT (16) | ||
57 | #define CARMINE_DISP_VDP_SHIFT (16) | ||
58 | #define CARMINE_CURSOR_CUTZ_MASK (0x00000100) | ||
59 | #define CARMINE_CURSOR0_PRIORITY_MASK (0x00010000) | ||
60 | #define CARMINE_CURSOR1_PRIORITY_MASK (0x00020000) | ||
61 | #define CARMINE_DISP_WIDTH_SHIFT (16) | ||
62 | #define CARMINE_DISP_WIN_H_SHIFT (16) | ||
63 | #define CARMINE_DISP_REG_H_TOTAL (0x0004) | ||
64 | #define CARMINE_DISP_REG_H_PERIOD (0x0008) | ||
65 | #define CARMINE_DISP_REG_V_H_W_H_POS (0x000C) | ||
66 | #define CARMINE_DISP_REG_V_TOTAL (0x0010) | ||
67 | #define CARMINE_DISP_REG_V_PERIOD_POS (0x0014) | ||
68 | #define CARMINE_DISP_REG_L0_MODE_W_H (0x0020) | ||
69 | #define CARMINE_DISP_REG_L0_ORG_ADR (0x0024) | ||
70 | #define CARMINE_DISP_REG_L0_DISP_ADR (0x0028) | ||
71 | #define CARMINE_DISP_REG_L0_DISP_POS (0x002C) | ||
72 | #define CARMINE_DISP_REG_L1_WIDTH (0x0030) | ||
73 | #define CARMINE_DISP_REG_L1_ORG_ADR (0x0034) | ||
74 | #define CARMINE_DISP_REG_L2_MODE_W_H (0x0040) | ||
75 | #define CARMINE_DISP_REG_L2_ORG_ADR1 (0x0044) | ||
76 | #define CARMINE_DISP_REG_L2_DISP_ADR1 (0x0048) | ||
77 | #define CARMINE_DISP_REG_L2_DISP_POS (0x0054) | ||
78 | #define CARMINE_DISP_REG_L3_MODE_W_H (0x0058) | ||
79 | #define CARMINE_DISP_REG_L3_ORG_ADR1 (0x005C) | ||
80 | #define CARMINE_DISP_REG_L3_DISP_ADR1 (0x0060) | ||
81 | #define CARMINE_DISP_REG_L3_DISP_POS (0x006C) | ||
82 | #define CARMINE_DISP_REG_L4_MODE_W_H (0x0070) | ||
83 | #define CARMINE_DISP_REG_L4_ORG_ADR1 (0x0074) | ||
84 | #define CARMINE_DISP_REG_L4_DISP_ADR1 (0x0078) | ||
85 | #define CARMINE_DISP_REG_L4_DISP_POS (0x0084) | ||
86 | #define CARMINE_DISP_REG_L5_MODE_W_H (0x0088) | ||
87 | #define CARMINE_DISP_REG_L5_ORG_ADR1 (0x008C) | ||
88 | #define CARMINE_DISP_REG_L5_DISP_ADR1 (0x0090) | ||
89 | #define CARMINE_DISP_REG_L5_DISP_POS (0x009C) | ||
90 | #define CARMINE_DISP_REG_CURSOR_MODE (0x00A0) | ||
91 | #define CARMINE_DISP_REG_CUR1_POS (0x00A8) | ||
92 | #define CARMINE_DISP_REG_CUR2_POS (0x00B0) | ||
93 | #define CARMINE_DISP_REG_C_TRANS (0x00BC) | ||
94 | #define CARMINE_DISP_REG_MLMR_TRANS (0x00C0) | ||
95 | #define CARMINE_DISP_REG_L0_EXT_MODE (0x0110) | ||
96 | #define CARMINE_DISP_REG_L0_WIN_POS (0x0114) | ||
97 | #define CARMINE_DISP_REG_L0_WIN_SIZE (0x0118) | ||
98 | #define CARMINE_DISP_REG_L1_EXT_MODE (0x0120) | ||
99 | #define CARMINE_DISP_REG_L1_WIN_POS (0x0124) | ||
100 | #define CARMINE_DISP_REG_L1_WIN_SIZE (0x0128) | ||
101 | #define CARMINE_DISP_REG_L2_EXT_MODE (0x0130) | ||
102 | #define CARMINE_DISP_REG_L2_WIN_POS (0x0134) | ||
103 | #define CARMINE_DISP_REG_L2_WIN_SIZE (0x0138) | ||
104 | #define CARMINE_DISP_REG_L3_EXT_MODE (0x0140) | ||
105 | #define CARMINE_DISP_REG_L3_WIN_POS (0x0144) | ||
106 | #define CARMINE_DISP_REG_L3_WIN_SIZE (0x0148) | ||
107 | #define CARMINE_DISP_REG_L4_EXT_MODE (0x0150) | ||
108 | #define CARMINE_DISP_REG_L4_WIN_POS (0x0154) | ||
109 | #define CARMINE_DISP_REG_L4_WIN_SIZE (0x0158) | ||
110 | #define CARMINE_DISP_REG_L5_EXT_MODE (0x0160) | ||
111 | #define CARMINE_DISP_REG_L5_WIN_POS (0x0164) | ||
112 | #define CARMINE_DISP_REG_L5_WIN_SIZE (0x0168) | ||
113 | #define CARMINE_DISP_REG_L6_EXT_MODE (0x1918) | ||
114 | #define CARMINE_DISP_REG_L6_WIN_POS (0x191c) | ||
115 | #define CARMINE_DISP_REG_L6_WIN_SIZE (0x1920) | ||
116 | #define CARMINE_DISP_REG_L7_EXT_MODE (0x1958) | ||
117 | #define CARMINE_DISP_REG_L7_WIN_POS (0x195c) | ||
118 | #define CARMINE_DISP_REG_L7_WIN_SIZE (0x1960) | ||
119 | #define CARMINE_DISP_REG_BLEND_MODE_L0 (0x00B4) | ||
120 | #define CARMINE_DISP_REG_BLEND_MODE_L1 (0x0188) | ||
121 | #define CARMINE_DISP_REG_BLEND_MODE_L2 (0x018C) | ||
122 | #define CARMINE_DISP_REG_BLEND_MODE_L3 (0x0190) | ||
123 | #define CARMINE_DISP_REG_BLEND_MODE_L4 (0x0194) | ||
124 | #define CARMINE_DISP_REG_BLEND_MODE_L5 (0x0198) | ||
125 | #define CARMINE_DISP_REG_BLEND_MODE_L6 (0x1990) | ||
126 | #define CARMINE_DISP_REG_BLEND_MODE_L7 (0x1994) | ||
127 | #define CARMINE_DISP_REG_L0_TRANS (0x01A0) | ||
128 | #define CARMINE_DISP_REG_L1_TRANS (0x01A4) | ||
129 | #define CARMINE_DISP_REG_L2_TRANS (0x01A8) | ||
130 | #define CARMINE_DISP_REG_L3_TRANS (0x01AC) | ||
131 | #define CARMINE_DISP_REG_L4_TRANS (0x01B0) | ||
132 | #define CARMINE_DISP_REG_L5_TRANS (0x01B4) | ||
133 | #define CARMINE_DISP_REG_L6_TRANS (0x1998) | ||
134 | #define CARMINE_DISP_REG_L7_TRANS (0x199c) | ||
135 | #define CARMINE_EXTEND_MODE_MASK (0x00000003) | ||
136 | #define CARMINE_DISP_DCM_MASK (0x0000FFFF) | ||
137 | #define CARMINE_DISP_REG_DCM1 (0x0100) | ||
138 | #define CARMINE_DISP_WIDTH_UNIT (64) | ||
139 | #define CARMINE_DISP_REG_L6_MODE_W_H (0x1900) | ||
140 | #define CARMINE_DISP_REG_L6_ORG_ADR1 (0x1904) | ||
141 | #define CARMINE_DISP_REG_L6_DISP_ADR0 (0x1908) | ||
142 | #define CARMINE_DISP_REG_L6_DISP_POS (0x1914) | ||
143 | #define CARMINE_DISP_REG_L7_MODE_W_H (0x1940) | ||
144 | #define CARMINE_DISP_REG_L7_ORG_ADR1 (0x1944) | ||
145 | #define CARMINE_DISP_REG_L7_DISP_ADR0 (0x1948) | ||
146 | #define CARMINE_DISP_REG_L7_DISP_POS (0x1954) | ||
147 | #define CARMINE_CTL_REG_CLOCK_ENABLE (0x000C) | ||
148 | #define CARMINE_CTL_REG_SOFTWARE_RESET (0x0010) | ||
149 | #define CARMINE_CTL_REG_IST_MASK_ALL (0x07FFFFFF) | ||
150 | #define CARMINE_GRAPH_REG_VRINTM (0x00028064) | ||
151 | #define CARMINE_GRAPH_REG_VRERRM (0x0002806C) | ||
152 | #define CARMINE_GRAPH_REG_DC_OFFSET_PX (0x0004005C) | ||
153 | #define CARMINE_GRAPH_REG_DC_OFFSET_PY (0x00040060) | ||
154 | #define CARMINE_GRAPH_REG_DC_OFFSET_LX (0x00040064) | ||
155 | #define CARMINE_GRAPH_REG_DC_OFFSET_LY (0x00040068) | ||
156 | #define CARMINE_GRAPH_REG_DC_OFFSET_TX (0x0004006C) | ||
157 | #define CARMINE_GRAPH_REG_DC_OFFSET_TY (0x00040070) | ||
158 | |||
159 | #endif | ||