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-rw-r--r--drivers/video/aty/aty128fb.c7
-rw-r--r--drivers/video/aty/radeon_monitor.c4
-rw-r--r--drivers/video/aty/radeon_pm.c19
3 files changed, 23 insertions, 7 deletions
diff --git a/drivers/video/aty/aty128fb.c b/drivers/video/aty/aty128fb.c
index bfc8a93b2c73..620c9a934e0e 100644
--- a/drivers/video/aty/aty128fb.c
+++ b/drivers/video/aty/aty128fb.c
@@ -1326,7 +1326,7 @@ static int aty128_var_to_pll(u32 period_in_ps, struct aty128_pll *pll,
1326 unsigned char post_dividers[] = {1,2,4,8,3,6,12}; 1326 unsigned char post_dividers[] = {1,2,4,8,3,6,12};
1327 u32 output_freq; 1327 u32 output_freq;
1328 u32 vclk; /* in .01 MHz */ 1328 u32 vclk; /* in .01 MHz */
1329 int i; 1329 int i = 0;
1330 u32 n, d; 1330 u32 n, d;
1331 1331
1332 vclk = 100000000 / period_in_ps; /* convert units to 10 kHz */ 1332 vclk = 100000000 / period_in_ps; /* convert units to 10 kHz */
@@ -1340,15 +1340,16 @@ static int aty128_var_to_pll(u32 period_in_ps, struct aty128_pll *pll,
1340 /* now, find an acceptable divider */ 1340 /* now, find an acceptable divider */
1341 for (i = 0; i < sizeof(post_dividers); i++) { 1341 for (i = 0; i < sizeof(post_dividers); i++) {
1342 output_freq = post_dividers[i] * vclk; 1342 output_freq = post_dividers[i] * vclk;
1343 if (output_freq >= c.ppll_min && output_freq <= c.ppll_max) 1343 if (output_freq >= c.ppll_min && output_freq <= c.ppll_max) {
1344 pll->post_divider = post_dividers[i];
1344 break; 1345 break;
1346 }
1345 } 1347 }
1346 1348
1347 /* calculate feedback divider */ 1349 /* calculate feedback divider */
1348 n = c.ref_divider * output_freq; 1350 n = c.ref_divider * output_freq;
1349 d = c.ref_clk; 1351 d = c.ref_clk;
1350 1352
1351 pll->post_divider = post_dividers[i];
1352 pll->feedback_divider = round_div(n, d); 1353 pll->feedback_divider = round_div(n, d);
1353 pll->vclk = vclk; 1354 pll->vclk = vclk;
1354 1355
diff --git a/drivers/video/aty/radeon_monitor.c b/drivers/video/aty/radeon_monitor.c
index 7f9838dceab5..98c05bc0de44 100644
--- a/drivers/video/aty/radeon_monitor.c
+++ b/drivers/video/aty/radeon_monitor.c
@@ -396,6 +396,10 @@ static int __devinit radeon_parse_monitor_layout(struct radeonfb_info *rinfo,
396 s1[i] = *s; 396 s1[i] = *s;
397 i++; 397 i++;
398 } 398 }
399
400 if (i > 4)
401 i = 4;
402
399 } while (*s++); 403 } while (*s++);
400 if (second) 404 if (second)
401 s2[i] = 0; 405 s2[i] = 0;
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c
index 556895e99645..1f8d805c61e5 100644
--- a/drivers/video/aty/radeon_pm.c
+++ b/drivers/video/aty/radeon_pm.c
@@ -1321,8 +1321,6 @@ static void radeon_pm_full_reset_sdram(struct radeonfb_info *rinfo)
1321 mdelay( 15); 1321 mdelay( 15);
1322} 1322}
1323 1323
1324#ifdef CONFIG_PPC_OF
1325
1326static void radeon_pm_reset_pad_ctlr_strength(struct radeonfb_info *rinfo) 1324static void radeon_pm_reset_pad_ctlr_strength(struct radeonfb_info *rinfo)
1327{ 1325{
1328 u32 tmp, tmp2; 1326 u32 tmp, tmp2;
@@ -1836,6 +1834,8 @@ static void radeon_reinitialize_M10(struct radeonfb_info *rinfo)
1836 radeon_pm_m10_enable_lvds_spread_spectrum(rinfo); 1834 radeon_pm_m10_enable_lvds_spread_spectrum(rinfo);
1837} 1835}
1838 1836
1837#ifdef CONFIG_PPC_OF
1838
1839static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo) 1839static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo)
1840{ 1840{
1841 OUTREG(MC_CNTL, rinfo->save_regs[46]); 1841 OUTREG(MC_CNTL, rinfo->save_regs[46]);
@@ -2728,13 +2728,23 @@ void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk)
2728 printk("radeonfb: Dynamic Clock Power Management disabled\n"); 2728 printk("radeonfb: Dynamic Clock Power Management disabled\n");
2729 } 2729 }
2730 2730
2731#if defined(CONFIG_PM)
2731 /* Check if we can power manage on suspend/resume. We can do 2732 /* Check if we can power manage on suspend/resume. We can do
2732 * D2 on M6, M7 and M9, and we can resume from D3 cold a few other 2733 * D2 on M6, M7 and M9, and we can resume from D3 cold a few other
2733 * "Mac" cards, but that's all. We need more infos about what the 2734 * "Mac" cards, but that's all. We need more infos about what the
2734 * BIOS does tho. Right now, all this PM stuff is pmac-only for that 2735 * BIOS does tho. Right now, all this PM stuff is pmac-only for that
2735 * reason. --BenH 2736 * reason. --BenH
2736 */ 2737 */
2737#if defined(CONFIG_PM) && defined(CONFIG_PPC_PMAC) 2738 /* Special case for Samsung P35 laptops
2739 */
2740 if ((rinfo->pdev->vendor == PCI_VENDOR_ID_ATI) &&
2741 (rinfo->pdev->device == PCI_CHIP_RV350_NP) &&
2742 (rinfo->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG) &&
2743 (rinfo->pdev->subsystem_device == 0xc00c)) {
2744 rinfo->reinit_func = radeon_reinitialize_M10;
2745 rinfo->pm_mode |= radeon_pm_off;
2746 }
2747#if defined(CONFIG_PPC_PMAC)
2738 if (_machine == _MACH_Pmac && rinfo->of_node) { 2748 if (_machine == _MACH_Pmac && rinfo->of_node) {
2739 if (rinfo->is_mobility && rinfo->pm_reg && 2749 if (rinfo->is_mobility && rinfo->pm_reg &&
2740 rinfo->family <= CHIP_FAMILY_RV250) 2750 rinfo->family <= CHIP_FAMILY_RV250)
@@ -2778,7 +2788,8 @@ void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk)
2778 OUTREG(TV_DAC_CNTL, INREG(TV_DAC_CNTL) | 0x07000000); 2788 OUTREG(TV_DAC_CNTL, INREG(TV_DAC_CNTL) | 0x07000000);
2779#endif 2789#endif
2780 } 2790 }
2781#endif /* defined(CONFIG_PM) && defined(CONFIG_PPC_PMAC) */ 2791#endif /* defined(CONFIG_PPC_PMAC) */
2792#endif /* defined(CONFIG_PM) */
2782} 2793}
2783 2794
2784void radeonfb_pm_exit(struct radeonfb_info *rinfo) 2795void radeonfb_pm_exit(struct radeonfb_info *rinfo)