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-rw-r--r--drivers/video/aty/radeon_base.c2
-rw-r--r--drivers/video/aty/radeon_pm.c14
-rw-r--r--drivers/video/aty/radeonfb.h2
-rw-r--r--drivers/video/aty/xlinit.c8
4 files changed, 16 insertions, 10 deletions
diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c
index 046b47860266..8a24a66d9ba8 100644
--- a/drivers/video/aty/radeon_base.c
+++ b/drivers/video/aty/radeon_base.c
@@ -475,7 +475,7 @@ static int __devinit radeon_probe_pll_params(struct radeonfb_info *rinfo)
475 */ 475 */
476 476
477 /* Flush PCI buffers ? */ 477 /* Flush PCI buffers ? */
478 tmp = INREG(DEVICE_ID); 478 tmp = INREG16(DEVICE_ID);
479 479
480 local_irq_disable(); 480 local_irq_disable();
481 481
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c
index 59a1b6f85067..097d668c4fe5 100644
--- a/drivers/video/aty/radeon_pm.c
+++ b/drivers/video/aty/radeon_pm.c
@@ -62,9 +62,9 @@ static void radeon_pm_disable_dynamic_mode(struct radeonfb_info *rinfo)
62 OUTPLL(pllSCLK_CNTL, tmp); 62 OUTPLL(pllSCLK_CNTL, tmp);
63 return; 63 return;
64 } 64 }
65 /* RV350 (M10) */ 65 /* RV350 (M10/M11) */
66 if (rinfo->family == CHIP_FAMILY_RV350) { 66 if (rinfo->family == CHIP_FAMILY_RV350) {
67 /* for RV350/M10, no delays are required. */ 67 /* for RV350/M10/M11, no delays are required. */
68 tmp = INPLL(pllSCLK_CNTL2); 68 tmp = INPLL(pllSCLK_CNTL2);
69 tmp |= (SCLK_CNTL2__R300_FORCE_TCL | 69 tmp |= (SCLK_CNTL2__R300_FORCE_TCL |
70 SCLK_CNTL2__R300_FORCE_GA | 70 SCLK_CNTL2__R300_FORCE_GA |
@@ -248,7 +248,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo)
248 return; 248 return;
249 } 249 }
250 250
251 /* M10 */ 251 /* M10/M11 */
252 if (rinfo->family == CHIP_FAMILY_RV350) { 252 if (rinfo->family == CHIP_FAMILY_RV350) {
253 tmp = INPLL(pllSCLK_CNTL2); 253 tmp = INPLL(pllSCLK_CNTL2);
254 tmp &= ~(SCLK_CNTL2__R300_FORCE_TCL | 254 tmp &= ~(SCLK_CNTL2__R300_FORCE_TCL |
@@ -1155,7 +1155,7 @@ static void radeon_pm_full_reset_sdram(struct radeonfb_info *rinfo)
1155 OUTREG( CRTC_GEN_CNTL, (crtcGenCntl | CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B) ); 1155 OUTREG( CRTC_GEN_CNTL, (crtcGenCntl | CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B) );
1156 OUTREG( CRTC2_GEN_CNTL, (crtcGenCntl2 | CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B) ); 1156 OUTREG( CRTC2_GEN_CNTL, (crtcGenCntl2 | CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B) );
1157 1157
1158 /* This is the code for the Aluminium PowerBooks M10 */ 1158 /* This is the code for the Aluminium PowerBooks M10 / iBooks M11 */
1159 if (rinfo->family == CHIP_FAMILY_RV350) { 1159 if (rinfo->family == CHIP_FAMILY_RV350) {
1160 u32 sdram_mode_reg = rinfo->save_regs[35]; 1160 u32 sdram_mode_reg = rinfo->save_regs[35];
1161 static u32 default_mrtable[] = 1161 static u32 default_mrtable[] =
@@ -2741,9 +2741,11 @@ void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk)
2741 rinfo->pm_mode |= radeon_pm_d2; 2741 rinfo->pm_mode |= radeon_pm_d2;
2742 2742
2743 /* We can restart Jasper (M10 chip in albooks), BlueStone (7500 chip 2743 /* We can restart Jasper (M10 chip in albooks), BlueStone (7500 chip
2744 * in some desktop G4s), and Via (M9+ chip on iBook G4) 2744 * in some desktop G4s), Via (M9+ chip on iBook G4) and
2745 * Snowy (M11 chip on iBook G4 manufactured after July 2005)
2745 */ 2746 */
2746 if (!strcmp(rinfo->of_node->name, "ATY,JasperParent")) { 2747 if (!strcmp(rinfo->of_node->name, "ATY,JasperParent") ||
2748 !strcmp(rinfo->of_node->name, "ATY,SnowyParent")) {
2747 rinfo->reinit_func = radeon_reinitialize_M10; 2749 rinfo->reinit_func = radeon_reinitialize_M10;
2748 rinfo->pm_mode |= radeon_pm_off; 2750 rinfo->pm_mode |= radeon_pm_off;
2749 } 2751 }
diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h
index 659bc9f62244..01b8b2f78514 100644
--- a/drivers/video/aty/radeonfb.h
+++ b/drivers/video/aty/radeonfb.h
@@ -395,6 +395,8 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms)
395 395
396#define INREG8(addr) readb((rinfo->mmio_base)+addr) 396#define INREG8(addr) readb((rinfo->mmio_base)+addr)
397#define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) 397#define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
398#define INREG16(addr) readw((rinfo->mmio_base)+addr)
399#define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr)
398#define INREG(addr) readl((rinfo->mmio_base)+addr) 400#define INREG(addr) readl((rinfo->mmio_base)+addr)
399#define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) 401#define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)
400 402
diff --git a/drivers/video/aty/xlinit.c b/drivers/video/aty/xlinit.c
index 0bea0d8d7821..a085cbf74ecb 100644
--- a/drivers/video/aty/xlinit.c
+++ b/drivers/video/aty/xlinit.c
@@ -253,9 +253,11 @@ int atyfb_xl_init(struct fb_info *info)
253 aty_st_le32(0xFC, 0x00000000, par); 253 aty_st_le32(0xFC, 0x00000000, par);
254 254
255#if defined (CONFIG_FB_ATY_GENERIC_LCD) 255#if defined (CONFIG_FB_ATY_GENERIC_LCD)
256 int i; 256 {
257 for (i=0; i<sizeof(lcd_tbl)/sizeof(lcd_tbl_t); i++) { 257 int i;
258 aty_st_lcd(lcd_tbl[i].lcd_reg, lcd_tbl[i].val, par); 258
259 for (i = 0; i < ARRAY_SIZE(lcd_tbl); i++)
260 aty_st_lcd(lcd_tbl[i].lcd_reg, lcd_tbl[i].val, par);
259 } 261 }
260#endif 262#endif
261 263