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path: root/drivers/video/aty/mach64_ct.c
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Diffstat (limited to 'drivers/video/aty/mach64_ct.c')
-rw-r--r--drivers/video/aty/mach64_ct.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/video/aty/mach64_ct.c b/drivers/video/aty/mach64_ct.c
index cc9e9779b75f..c50c7cf26fe9 100644
--- a/drivers/video/aty/mach64_ct.c
+++ b/drivers/video/aty/mach64_ct.c
@@ -197,7 +197,7 @@ static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll)
197 pll->dsp_config = (dsp_precision << 20) | (pll->dsp_loop_latency << 16) | dsp_xclks; 197 pll->dsp_config = (dsp_precision << 20) | (pll->dsp_loop_latency << 16) | dsp_xclks;
198#ifdef DEBUG 198#ifdef DEBUG
199 printk("atyfb(%s): dsp_config 0x%08x, dsp_on_off 0x%08x\n", 199 printk("atyfb(%s): dsp_config 0x%08x, dsp_on_off 0x%08x\n",
200 __FUNCTION__, pll->dsp_config, pll->dsp_on_off); 200 __func__, pll->dsp_config, pll->dsp_on_off);
201#endif 201#endif
202 return 0; 202 return 0;
203} 203}
@@ -225,7 +225,7 @@ static int aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per, struct pll
225 (par->ref_clk_per * pll->pll_ref_div); 225 (par->ref_clk_per * pll->pll_ref_div);
226#ifdef DEBUG 226#ifdef DEBUG
227 printk("atyfb(%s): pllvclk=%d MHz, vclk=%d MHz\n", 227 printk("atyfb(%s): pllvclk=%d MHz, vclk=%d MHz\n",
228 __FUNCTION__, pllvclk, pllvclk / pll->vclk_post_div_real); 228 __func__, pllvclk, pllvclk / pll->vclk_post_div_real);
229#endif 229#endif
230 pll->pll_vclk_cntl = 0x03; /* VCLK = PLL_VCLK/VCLKx_POST */ 230 pll->pll_vclk_cntl = 0x03; /* VCLK = PLL_VCLK/VCLKx_POST */
231 231
@@ -269,7 +269,7 @@ static u32 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pl
269 } 269 }
270#endif 270#endif
271#ifdef DEBUG 271#ifdef DEBUG
272 printk("atyfb(%s): calculated 0x%08X(%i)\n", __FUNCTION__, ret, ret); 272 printk("atyfb(%s): calculated 0x%08X(%i)\n", __func__, ret, ret);
273#endif 273#endif
274 return ret; 274 return ret;
275} 275}
@@ -284,11 +284,11 @@ void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll)
284#ifdef DEBUG 284#ifdef DEBUG
285 printk("atyfb(%s): about to program:\n" 285 printk("atyfb(%s): about to program:\n"
286 "pll_ext_cntl=0x%02x pll_gen_cntl=0x%02x pll_vclk_cntl=0x%02x\n", 286 "pll_ext_cntl=0x%02x pll_gen_cntl=0x%02x pll_vclk_cntl=0x%02x\n",
287 __FUNCTION__, 287 __func__,
288 pll->ct.pll_ext_cntl, pll->ct.pll_gen_cntl, pll->ct.pll_vclk_cntl); 288 pll->ct.pll_ext_cntl, pll->ct.pll_gen_cntl, pll->ct.pll_vclk_cntl);
289 289
290 printk("atyfb(%s): setting clock %lu for FeedBackDivider %i, ReferenceDivider %i, PostDivider %i(%i)\n", 290 printk("atyfb(%s): setting clock %lu for FeedBackDivider %i, ReferenceDivider %i, PostDivider %i(%i)\n",
291 __FUNCTION__, 291 __func__,
292 par->clk_wr_offset, pll->ct.vclk_fb_div, 292 par->clk_wr_offset, pll->ct.vclk_fb_div,
293 pll->ct.pll_ref_div, pll->ct.vclk_post_div, pll->ct.vclk_post_div_real); 293 pll->ct.pll_ref_div, pll->ct.vclk_post_div, pll->ct.vclk_post_div_real);
294#endif 294#endif
@@ -428,7 +428,7 @@ static int __devinit aty_init_pll_ct(const struct fb_info *info,
428 428
429#ifdef DEBUG 429#ifdef DEBUG
430 printk("atyfb(%s): mclk_fb_mult=%d, xclk_post_div=%d\n", 430 printk("atyfb(%s): mclk_fb_mult=%d, xclk_post_div=%d\n",
431 __FUNCTION__, pll->ct.mclk_fb_mult, pll->ct.xclk_post_div); 431 __func__, pll->ct.mclk_fb_mult, pll->ct.xclk_post_div);
432#endif 432#endif
433 433
434 memcntl = aty_ld_le32(MEM_CNTL, par); 434 memcntl = aty_ld_le32(MEM_CNTL, par);
@@ -540,7 +540,7 @@ static int __devinit aty_init_pll_ct(const struct fb_info *info,
540 pllmclk = (1000000 * pll->ct.mclk_fb_mult * pll->ct.mclk_fb_div) / 540 pllmclk = (1000000 * pll->ct.mclk_fb_mult * pll->ct.mclk_fb_div) /
541 (par->ref_clk_per * pll->ct.pll_ref_div); 541 (par->ref_clk_per * pll->ct.pll_ref_div);
542 printk("atyfb(%s): pllmclk=%d MHz, xclk=%d MHz\n", 542 printk("atyfb(%s): pllmclk=%d MHz, xclk=%d MHz\n",
543 __FUNCTION__, pllmclk, pllmclk / pll->ct.xclk_post_div_real); 543 __func__, pllmclk, pllmclk / pll->ct.xclk_post_div_real);
544#endif 544#endif
545 545
546 if (M64_HAS(SDRAM_MAGIC_PLL) && (par->ram_type >= SDRAM)) 546 if (M64_HAS(SDRAM_MAGIC_PLL) && (par->ram_type >= SDRAM))
@@ -581,7 +581,7 @@ static int __devinit aty_init_pll_ct(const struct fb_info *info,
581 pllsclk = (1000000 * 2 * pll->ct.sclk_fb_div) / 581 pllsclk = (1000000 * 2 * pll->ct.sclk_fb_div) /
582 (par->ref_clk_per * pll->ct.pll_ref_div); 582 (par->ref_clk_per * pll->ct.pll_ref_div);
583 printk("atyfb(%s): use sclk, pllsclk=%d MHz, sclk=mclk=%d MHz\n", 583 printk("atyfb(%s): use sclk, pllsclk=%d MHz, sclk=mclk=%d MHz\n",
584 __FUNCTION__, pllsclk, pllsclk / sclk_post_div_real); 584 __func__, pllsclk, pllsclk / sclk_post_div_real);
585#endif 585#endif
586 } 586 }
587 587