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path: root/drivers/video/atmel_lcdfb.c
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Diffstat (limited to 'drivers/video/atmel_lcdfb.c')
-rw-r--r--drivers/video/atmel_lcdfb.c62
1 files changed, 54 insertions, 8 deletions
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index e1d5bd0c98c4..69ec93ce436a 100644
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -79,6 +79,29 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
79 .accel = FB_ACCEL_NONE, 79 .accel = FB_ACCEL_NONE,
80}; 80};
81 81
82static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
83{
84 unsigned long value;
85
86 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
87 return xres;
88
89 value = xres;
90 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
91 /* STN display */
92 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
93 value *= 3;
94 }
95 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
96 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
97 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
98 value = DIV_ROUND_UP(value, 4);
99 else
100 value = DIV_ROUND_UP(value, 8);
101 }
102
103 return value;
104}
82 105
83static void atmel_lcdfb_update_dma(struct fb_info *info, 106static void atmel_lcdfb_update_dma(struct fb_info *info,
84 struct fb_var_screeninfo *var) 107 struct fb_var_screeninfo *var)
@@ -181,6 +204,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
181 var->xoffset = var->yoffset = 0; 204 var->xoffset = var->yoffset = 0;
182 205
183 switch (var->bits_per_pixel) { 206 switch (var->bits_per_pixel) {
207 case 1:
184 case 2: 208 case 2:
185 case 4: 209 case 4:
186 case 8: 210 case 8:
@@ -228,8 +252,10 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
228static int atmel_lcdfb_set_par(struct fb_info *info) 252static int atmel_lcdfb_set_par(struct fb_info *info)
229{ 253{
230 struct atmel_lcdfb_info *sinfo = info->par; 254 struct atmel_lcdfb_info *sinfo = info->par;
255 unsigned long hozval_linesz;
231 unsigned long value; 256 unsigned long value;
232 unsigned long clk_value_khz; 257 unsigned long clk_value_khz;
258 unsigned long bits_per_line;
233 259
234 dev_dbg(info->device, "%s:\n", __func__); 260 dev_dbg(info->device, "%s:\n", __func__);
235 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n", 261 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
@@ -241,12 +267,15 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
241 267
242 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); 268 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
243 269
244 if (info->var.bits_per_pixel <= 8) 270 if (info->var.bits_per_pixel == 1)
271 info->fix.visual = FB_VISUAL_MONO01;
272 else if (info->var.bits_per_pixel <= 8)
245 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 273 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
246 else 274 else
247 info->fix.visual = FB_VISUAL_TRUECOLOR; 275 info->fix.visual = FB_VISUAL_TRUECOLOR;
248 276
249 info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8); 277 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
278 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
250 279
251 /* Re-initialize the DMA engine... */ 280 /* Re-initialize the DMA engine... */
252 dev_dbg(info->device, " * update DMA engine\n"); 281 dev_dbg(info->device, " * update DMA engine\n");
@@ -262,18 +291,21 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
262 /* Set pixel clock */ 291 /* Set pixel clock */
263 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 292 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
264 293
265 value = clk_value_khz / PICOS2KHZ(info->var.pixclock); 294 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
266
267 if (clk_value_khz % PICOS2KHZ(info->var.pixclock))
268 value++;
269 295
270 value = (value / 2) - 1; 296 value = (value / 2) - 1;
297 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value);
271 298
272 if (value <= 0) { 299 if (value <= 0) {
273 dev_notice(info->device, "Bypassing pixel clock divider\n"); 300 dev_notice(info->device, "Bypassing pixel clock divider\n");
274 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); 301 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
275 } else 302 } else {
276 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET); 303 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
304 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
305 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
306 PICOS2KHZ(info->var.pixclock));
307 }
308
277 309
278 /* Initialize control register 2 */ 310 /* Initialize control register 2 */
279 value = sinfo->default_lcdcon2; 311 value = sinfo->default_lcdcon2;
@@ -311,9 +343,14 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
311 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value); 343 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
312 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value); 344 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
313 345
346 /* Horizontal value (aka line size) */
347 hozval_linesz = compute_hozval(info->var.xres,
348 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
349
314 /* Display size */ 350 /* Display size */
315 value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET; 351 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
316 value |= info->var.yres - 1; 352 value |= info->var.yres - 1;
353 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
317 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value); 354 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
318 355
319 /* FIFO Threshold: Use formula from data sheet */ 356 /* FIFO Threshold: Use formula from data sheet */
@@ -421,6 +458,15 @@ static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
421 ret = 0; 458 ret = 0;
422 } 459 }
423 break; 460 break;
461
462 case FB_VISUAL_MONO01:
463 if (regno < 2) {
464 val = (regno == 0) ? 0x00 : 0x1F;
465 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
466 ret = 0;
467 }
468 break;
469
424 } 470 }
425 471
426 return ret; 472 return ret;