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-rw-r--r--drivers/usb/core/hcd-pci.c38
-rw-r--r--drivers/usb/core/hub.c1
-rw-r--r--drivers/usb/host/ehci-hcd.c160
-rw-r--r--drivers/usb/host/ehci-hub.c7
-rw-r--r--drivers/usb/host/ehci-pci.c359
-rw-r--r--drivers/usb/host/ohci-pci.c36
-rw-r--r--drivers/usb/media/sn9c102_core.c2
-rw-r--r--drivers/usb/serial/ftdi_sio.c2
-rw-r--r--drivers/usb/serial/ftdi_sio.h7
-rw-r--r--drivers/usb/serial/ipw.c1
-rw-r--r--drivers/usb/storage/unusual_devs.h9
11 files changed, 316 insertions, 306 deletions
diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c
index 7feb829362d6..5131d88e8c5b 100644
--- a/drivers/usb/core/hcd-pci.c
+++ b/drivers/usb/core/hcd-pci.c
@@ -20,9 +20,17 @@
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/pci.h> 22#include <linux/pci.h>
23#include <linux/usb.h>
24
23#include <asm/io.h> 25#include <asm/io.h>
24#include <asm/irq.h> 26#include <asm/irq.h>
25#include <linux/usb.h> 27
28#ifdef CONFIG_PPC_PMAC
29#include <asm/machdep.h>
30#include <asm/pmac_feature.h>
31#include <asm/pci-bridge.h>
32#include <asm/prom.h>
33#endif
26 34
27#include "usb.h" 35#include "usb.h"
28#include "hcd.h" 36#include "hcd.h"
@@ -277,8 +285,22 @@ int usb_hcd_pci_suspend (struct pci_dev *dev, pm_message_t message)
277 } 285 }
278 286
279done: 287done:
280 if (retval == 0) 288 if (retval == 0) {
281 dev->dev.power.power_state = PMSG_SUSPEND; 289 dev->dev.power.power_state = PMSG_SUSPEND;
290
291#ifdef CONFIG_PPC_PMAC
292 /* Disable ASIC clocks for USB */
293 if (_machine == _MACH_Pmac) {
294 struct device_node *of_node;
295
296 of_node = pci_device_to_OF_node (dev);
297 if (of_node)
298 pmac_call_feature(PMAC_FTR_USB_ENABLE,
299 of_node, 0, 0);
300 }
301#endif
302 }
303
282 return retval; 304 return retval;
283} 305}
284EXPORT_SYMBOL (usb_hcd_pci_suspend); 306EXPORT_SYMBOL (usb_hcd_pci_suspend);
@@ -301,6 +323,18 @@ int usb_hcd_pci_resume (struct pci_dev *dev)
301 return 0; 323 return 0;
302 } 324 }
303 325
326#ifdef CONFIG_PPC_PMAC
327 /* Reenable ASIC clocks for USB */
328 if (_machine == _MACH_Pmac) {
329 struct device_node *of_node;
330
331 of_node = pci_device_to_OF_node (dev);
332 if (of_node)
333 pmac_call_feature (PMAC_FTR_USB_ENABLE,
334 of_node, 0, 1);
335 }
336#endif
337
304 /* NOTE: chip docs cover clean "real suspend" cases (what Linux 338 /* NOTE: chip docs cover clean "real suspend" cases (what Linux
305 * calls "standby", "suspend to RAM", and so on). There are also 339 * calls "standby", "suspend to RAM", and so on). There are also
306 * dirty cases when swsusp fakes a suspend in "shutdown" mode. 340 * dirty cases when swsusp fakes a suspend in "shutdown" mode.
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 840727948d84..f78bd124d290 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -1669,7 +1669,6 @@ int usb_suspend_device(struct usb_device *udev)
1669 return 0; 1669 return 0;
1670#endif 1670#endif
1671} 1671}
1672EXPORT_SYMBOL_GPL(usb_suspend_device);
1673 1672
1674/* 1673/*
1675 * If the USB "suspend" state is in use (rather than "global suspend"), 1674 * If the USB "suspend" state is in use (rather than "global suspend"),
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index af3c05eb86fc..29f52a44b928 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -411,50 +411,39 @@ static void ehci_stop (struct usb_hcd *hcd)
411 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status)); 411 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
412} 412}
413 413
414static int ehci_run (struct usb_hcd *hcd) 414/* one-time init, only for memory state */
415static int ehci_init(struct usb_hcd *hcd)
415{ 416{
416 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 417 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
417 u32 temp; 418 u32 temp;
418 int retval; 419 int retval;
419 u32 hcc_params; 420 u32 hcc_params;
420 int first; 421
421 422 spin_lock_init(&ehci->lock);
422 /* skip some things on restart paths */ 423
423 first = (ehci->watchdog.data == 0); 424 init_timer(&ehci->watchdog);
424 if (first) { 425 ehci->watchdog.function = ehci_watchdog;
425 init_timer (&ehci->watchdog); 426 ehci->watchdog.data = (unsigned long) ehci;
426 ehci->watchdog.function = ehci_watchdog;
427 ehci->watchdog.data = (unsigned long) ehci;
428 }
429 427
430 /* 428 /*
431 * hw default: 1K periodic list heads, one per frame. 429 * hw default: 1K periodic list heads, one per frame.
432 * periodic_size can shrink by USBCMD update if hcc_params allows. 430 * periodic_size can shrink by USBCMD update if hcc_params allows.
433 */ 431 */
434 ehci->periodic_size = DEFAULT_I_TDPS; 432 ehci->periodic_size = DEFAULT_I_TDPS;
435 if (first && (retval = ehci_mem_init (ehci, GFP_KERNEL)) < 0) 433 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
436 return retval; 434 return retval;
437 435
438 /* controllers may cache some of the periodic schedule ... */ 436 /* controllers may cache some of the periodic schedule ... */
439 hcc_params = readl (&ehci->caps->hcc_params); 437 hcc_params = readl(&ehci->caps->hcc_params);
440 if (HCC_ISOC_CACHE (hcc_params)) // full frame cache 438 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
441 ehci->i_thresh = 8; 439 ehci->i_thresh = 8;
442 else // N microframes cached 440 else // N microframes cached
443 ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params); 441 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
444 442
445 ehci->reclaim = NULL; 443 ehci->reclaim = NULL;
446 ehci->reclaim_ready = 0; 444 ehci->reclaim_ready = 0;
447 ehci->next_uframe = -1; 445 ehci->next_uframe = -1;
448 446
449 /* controller state: unknown --> reset */
450
451 /* EHCI spec section 4.1 */
452 if ((retval = ehci_reset (ehci)) != 0) {
453 ehci_mem_cleanup (ehci);
454 return retval;
455 }
456 writel (ehci->periodic_dma, &ehci->regs->frame_list);
457
458 /* 447 /*
459 * dedicate a qh for the async ring head, since we couldn't unlink 448 * dedicate a qh for the async ring head, since we couldn't unlink
460 * a 'real' qh without stopping the async schedule [4.8]. use it 449 * a 'real' qh without stopping the async schedule [4.8]. use it
@@ -462,37 +451,13 @@ static int ehci_run (struct usb_hcd *hcd)
462 * its dummy is used in hw_alt_next of many tds, to prevent the qh 451 * its dummy is used in hw_alt_next of many tds, to prevent the qh
463 * from automatically advancing to the next td after short reads. 452 * from automatically advancing to the next td after short reads.
464 */ 453 */
465 if (first) { 454 ehci->async->qh_next.qh = NULL;
466 ehci->async->qh_next.qh = NULL; 455 ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma);
467 ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma); 456 ehci->async->hw_info1 = cpu_to_le32(QH_HEAD);
468 ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD); 457 ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT);
469 ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT); 458 ehci->async->hw_qtd_next = EHCI_LIST_END;
470 ehci->async->hw_qtd_next = EHCI_LIST_END; 459 ehci->async->qh_state = QH_STATE_LINKED;
471 ehci->async->qh_state = QH_STATE_LINKED; 460 ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma);
472 ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma);
473 }
474 writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
475
476 /*
477 * hcc_params controls whether ehci->regs->segment must (!!!)
478 * be used; it constrains QH/ITD/SITD and QTD locations.
479 * pci_pool consistent memory always uses segment zero.
480 * streaming mappings for I/O buffers, like pci_map_single(),
481 * can return segments above 4GB, if the device allows.
482 *
483 * NOTE: the dma mask is visible through dma_supported(), so
484 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
485 * Scsi_Host.highmem_io, and so forth. It's readonly to all
486 * host side drivers though.
487 */
488 if (HCC_64BIT_ADDR (hcc_params)) {
489 writel (0, &ehci->regs->segment);
490#if 0
491// this is deeply broken on almost all architectures
492 if (!dma_set_mask (hcd->self.controller, DMA_64BIT_MASK))
493 ehci_info (ehci, "enabled 64bit DMA\n");
494#endif
495 }
496 461
497 /* clear interrupt enables, set irq latency */ 462 /* clear interrupt enables, set irq latency */
498 if (log2_irq_thresh < 0 || log2_irq_thresh > 6) 463 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
@@ -507,13 +472,13 @@ static int ehci_run (struct usb_hcd *hcd)
507 * make problems: throughput reduction (!), data errors... 472 * make problems: throughput reduction (!), data errors...
508 */ 473 */
509 if (park) { 474 if (park) {
510 park = min (park, (unsigned) 3); 475 park = min(park, (unsigned) 3);
511 temp |= CMD_PARK; 476 temp |= CMD_PARK;
512 temp |= park << 8; 477 temp |= park << 8;
513 } 478 }
514 ehci_info (ehci, "park %d\n", park); 479 ehci_dbg(ehci, "park %d\n", park);
515 } 480 }
516 if (HCC_PGM_FRAMELISTLEN (hcc_params)) { 481 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
517 /* periodic schedule size can be smaller than default */ 482 /* periodic schedule size can be smaller than default */
518 temp &= ~(3 << 2); 483 temp &= ~(3 << 2);
519 temp |= (EHCI_TUNE_FLS << 2); 484 temp |= (EHCI_TUNE_FLS << 2);
@@ -521,16 +486,63 @@ static int ehci_run (struct usb_hcd *hcd)
521 case 0: ehci->periodic_size = 1024; break; 486 case 0: ehci->periodic_size = 1024; break;
522 case 1: ehci->periodic_size = 512; break; 487 case 1: ehci->periodic_size = 512; break;
523 case 2: ehci->periodic_size = 256; break; 488 case 2: ehci->periodic_size = 256; break;
524 default: BUG (); 489 default: BUG();
525 } 490 }
526 } 491 }
492 ehci->command = temp;
493
494 ehci->reboot_notifier.notifier_call = ehci_reboot;
495 register_reboot_notifier(&ehci->reboot_notifier);
496
497 return 0;
498}
499
500/* start HC running; it's halted, ehci_init() has been run (once) */
501static int ehci_run (struct usb_hcd *hcd)
502{
503 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
504 int retval;
505 u32 temp;
506 u32 hcc_params;
507
508 /* EHCI spec section 4.1 */
509 if ((retval = ehci_reset(ehci)) != 0) {
510 unregister_reboot_notifier(&ehci->reboot_notifier);
511 ehci_mem_cleanup(ehci);
512 return retval;
513 }
514 writel(ehci->periodic_dma, &ehci->regs->frame_list);
515 writel((u32)ehci->async->qh_dma, &ehci->regs->async_next);
516
517 /*
518 * hcc_params controls whether ehci->regs->segment must (!!!)
519 * be used; it constrains QH/ITD/SITD and QTD locations.
520 * pci_pool consistent memory always uses segment zero.
521 * streaming mappings for I/O buffers, like pci_map_single(),
522 * can return segments above 4GB, if the device allows.
523 *
524 * NOTE: the dma mask is visible through dma_supported(), so
525 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
526 * Scsi_Host.highmem_io, and so forth. It's readonly to all
527 * host side drivers though.
528 */
529 hcc_params = readl(&ehci->caps->hcc_params);
530 if (HCC_64BIT_ADDR(hcc_params)) {
531 writel(0, &ehci->regs->segment);
532#if 0
533// this is deeply broken on almost all architectures
534 if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
535 ehci_info(ehci, "enabled 64bit DMA\n");
536#endif
537 }
538
539
527 // Philips, Intel, and maybe others need CMD_RUN before the 540 // Philips, Intel, and maybe others need CMD_RUN before the
528 // root hub will detect new devices (why?); NEC doesn't 541 // root hub will detect new devices (why?); NEC doesn't
529 temp |= CMD_RUN; 542 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
530 writel (temp, &ehci->regs->command); 543 ehci->command |= CMD_RUN;
531 dbg_cmd (ehci, "init", temp); 544 writel (ehci->command, &ehci->regs->command);
532 545 dbg_cmd (ehci, "init", ehci->command);
533 /* set async sleep time = 10 us ... ? */
534 546
535 /* 547 /*
536 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices 548 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
@@ -538,26 +550,23 @@ static int ehci_run (struct usb_hcd *hcd)
538 * involved with the root hub. (Except where one is integrated, 550 * involved with the root hub. (Except where one is integrated,
539 * and there's no companion controller unless maybe for USB OTG.) 551 * and there's no companion controller unless maybe for USB OTG.)
540 */ 552 */
541 if (first) {
542 ehci->reboot_notifier.notifier_call = ehci_reboot;
543 register_reboot_notifier (&ehci->reboot_notifier);
544 }
545
546 hcd->state = HC_STATE_RUNNING; 553 hcd->state = HC_STATE_RUNNING;
547 writel (FLAG_CF, &ehci->regs->configured_flag); 554 writel (FLAG_CF, &ehci->regs->configured_flag);
548 readl (&ehci->regs->command); /* unblock posted write */ 555 readl (&ehci->regs->command); /* unblock posted writes */
549 556
550 temp = HC_VERSION(readl (&ehci->caps->hc_capbase)); 557 temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
551 ehci_info (ehci, 558 ehci_info (ehci,
552 "USB %x.%x %s, EHCI %x.%02x, driver %s\n", 559 "USB %x.%x started, EHCI %x.%02x, driver %s\n",
553 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), 560 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
554 first ? "initialized" : "restarted",
555 temp >> 8, temp & 0xff, DRIVER_VERSION); 561 temp >> 8, temp & 0xff, DRIVER_VERSION);
556 562
557 writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */ 563 writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */
558 564
559 if (first) 565 /* GRR this is run-once init(), being done every time the HC starts.
560 create_debug_files (ehci); 566 * So long as they're part of class devices, we can't do it init()
567 * since the class device isn't created that early.
568 */
569 create_debug_files(ehci);
561 570
562 return 0; 571 return 0;
563} 572}
@@ -636,9 +645,8 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
636 * stop that signaling. 645 * stop that signaling.
637 */ 646 */
638 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20); 647 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
639 mod_timer (&hcd->rh_timer,
640 ehci->reset_done [i] + 1);
641 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); 648 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
649 usb_hcd_resume_root_hub(hcd);
642 } 650 }
643 } 651 }
644 652
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 88cb4ada686e..82caf336e9b6 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -94,6 +94,13 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
94 msleep(5); 94 msleep(5);
95 spin_lock_irq (&ehci->lock); 95 spin_lock_irq (&ehci->lock);
96 96
97 /* Ideally and we've got a real resume here, and no port's power
98 * was lost. (For PCI, that means Vaux was maintained.) But we
99 * could instead be restoring a swsusp snapshot -- so that BIOS was
100 * the last user of the controller, not reset/pm hardware keeping
101 * state we gave to it.
102 */
103
97 /* re-init operational registers in case we lost power */ 104 /* re-init operational registers in case we lost power */
98 if (readl (&ehci->regs->intr_enable) == 0) { 105 if (readl (&ehci->regs->intr_enable) == 0) {
99 /* at least some APM implementations will try to deliver 106 /* at least some APM implementations will try to deliver
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index dfd9bd0b1828..441c26064b44 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -27,7 +27,7 @@
27/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/... 27/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
28 * off the controller (maybe it can boot from highspeed USB disks). 28 * off the controller (maybe it can boot from highspeed USB disks).
29 */ 29 */
30static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) 30static int bios_handoff(struct ehci_hcd *ehci, int where, u32 cap)
31{ 31{
32 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 32 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
33 33
@@ -48,7 +48,7 @@ static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
48 where, cap); 48 where, cap);
49 // some BIOS versions seem buggy... 49 // some BIOS versions seem buggy...
50 // return 1; 50 // return 1;
51 ehci_warn (ehci, "continuing after BIOS bug...\n"); 51 ehci_warn(ehci, "continuing after BIOS bug...\n");
52 /* disable all SMIs, and clear "BIOS owns" flag */ 52 /* disable all SMIs, and clear "BIOS owns" flag */
53 pci_write_config_dword(pdev, where + 4, 0); 53 pci_write_config_dword(pdev, where + 4, 0);
54 pci_write_config_byte(pdev, where + 2, 0); 54 pci_write_config_byte(pdev, where + 2, 0);
@@ -58,96 +58,47 @@ static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
58 return 0; 58 return 0;
59} 59}
60 60
61/* called by khubd or root hub init threads */ 61/* called after powerup, by probe or system-pm "wakeup" */
62static int ehci_pci_reset (struct usb_hcd *hcd) 62static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev)
63{ 63{
64 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
65 u32 temp; 64 u32 temp;
65 int retval;
66 unsigned count = 256/4; 66 unsigned count = 256/4;
67 67
68 spin_lock_init (&ehci->lock); 68 /* optional debug port, normally in the first BAR */
69 69 temp = pci_find_capability(pdev, 0x0a);
70 ehci->caps = hcd->regs; 70 if (temp) {
71 ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase)); 71 pci_read_config_dword(pdev, temp, &temp);
72 dbg_hcs_params (ehci, "reset"); 72 temp >>= 16;
73 dbg_hcc_params (ehci, "reset"); 73 if ((temp & (3 << 13)) == (1 << 13)) {
74 74 temp &= 0x1fff;
75 /* cache this readonly data; minimize chip reads */ 75 ehci->debug = ehci_to_hcd(ehci)->regs + temp;
76 ehci->hcs_params = readl (&ehci->caps->hcs_params); 76 temp = readl(&ehci->debug->control);
77 77 ehci_info(ehci, "debug port %d%s\n",
78 if (hcd->self.controller->bus == &pci_bus_type) { 78 HCS_DEBUG_PORT(ehci->hcs_params),
79 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 79 (temp & DBGP_ENABLED)
80 80 ? " IN USE"
81 switch (pdev->vendor) { 81 : "");
82 case PCI_VENDOR_ID_TDI: 82 if (!(temp & DBGP_ENABLED))
83 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { 83 ehci->debug = NULL;
84 ehci->is_tdi_rh_tt = 1;
85 tdi_reset (ehci);
86 }
87 break;
88 case PCI_VENDOR_ID_AMD:
89 /* AMD8111 EHCI doesn't work, according to AMD errata */
90 if (pdev->device == 0x7463) {
91 ehci_info (ehci, "ignoring AMD8111 (errata)\n");
92 return -EIO;
93 }
94 break;
95 case PCI_VENDOR_ID_NVIDIA:
96 /* NVidia reports that certain chips don't handle
97 * QH, ITD, or SITD addresses above 2GB. (But TD,
98 * data buffer, and periodic schedule are normal.)
99 */
100 switch (pdev->device) {
101 case 0x003c: /* MCP04 */
102 case 0x005b: /* CK804 */
103 case 0x00d8: /* CK8 */
104 case 0x00e8: /* CK8S */
105 if (pci_set_consistent_dma_mask(pdev,
106 DMA_31BIT_MASK) < 0)
107 ehci_warn (ehci, "can't enable NVidia "
108 "workaround for >2GB RAM\n");
109 break;
110 }
111 break;
112 }
113
114 /* optional debug port, normally in the first BAR */
115 temp = pci_find_capability (pdev, 0x0a);
116 if (temp) {
117 pci_read_config_dword(pdev, temp, &temp);
118 temp >>= 16;
119 if ((temp & (3 << 13)) == (1 << 13)) {
120 temp &= 0x1fff;
121 ehci->debug = hcd->regs + temp;
122 temp = readl (&ehci->debug->control);
123 ehci_info (ehci, "debug port %d%s\n",
124 HCS_DEBUG_PORT(ehci->hcs_params),
125 (temp & DBGP_ENABLED)
126 ? " IN USE"
127 : "");
128 if (!(temp & DBGP_ENABLED))
129 ehci->debug = NULL;
130 }
131 } 84 }
85 }
132 86
133 temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); 87 temp = HCC_EXT_CAPS(readl(&ehci->caps->hcc_params));
134 } else
135 temp = 0;
136 88
137 /* EHCI 0.96 and later may have "extended capabilities" */ 89 /* EHCI 0.96 and later may have "extended capabilities" */
138 while (temp && count--) { 90 while (temp && count--) {
139 u32 cap; 91 u32 cap;
140 92
141 pci_read_config_dword (to_pci_dev(hcd->self.controller), 93 pci_read_config_dword(pdev, temp, &cap);
142 temp, &cap); 94 ehci_dbg(ehci, "capability %04x at %02x\n", cap, temp);
143 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
144 switch (cap & 0xff) { 95 switch (cap & 0xff) {
145 case 1: /* BIOS/SMM/... handoff */ 96 case 1: /* BIOS/SMM/... handoff */
146 if (bios_handoff (ehci, temp, cap) != 0) 97 if (bios_handoff(ehci, temp, cap) != 0)
147 return -EOPNOTSUPP; 98 return -EOPNOTSUPP;
148 break; 99 break;
149 case 0: /* illegal reserved capability */ 100 case 0: /* illegal reserved capability */
150 ehci_warn (ehci, "illegal capability!\n"); 101 ehci_dbg(ehci, "illegal capability!\n");
151 cap = 0; 102 cap = 0;
152 /* FALLTHROUGH */ 103 /* FALLTHROUGH */
153 default: /* unknown */ 104 default: /* unknown */
@@ -156,77 +107,109 @@ static int ehci_pci_reset (struct usb_hcd *hcd)
156 temp = (cap >> 8) & 0xff; 107 temp = (cap >> 8) & 0xff;
157 } 108 }
158 if (!count) { 109 if (!count) {
159 ehci_err (ehci, "bogus capabilities ... PCI problems!\n"); 110 ehci_err(ehci, "bogus capabilities ... PCI problems!\n");
160 return -EIO; 111 return -EIO;
161 } 112 }
162 if (ehci_is_TDI(ehci))
163 ehci_reset (ehci);
164 113
165 ehci_port_power (ehci, 0); 114 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
115 retval = pci_set_mwi(pdev);
116 if (!retval)
117 ehci_dbg(ehci, "MWI active\n");
118
119 ehci_port_power(ehci, 0);
120
121 return 0;
122}
123
124/* called by khubd or root hub (re)init threads; leaves HC in halt state */
125static int ehci_pci_reset(struct usb_hcd *hcd)
126{
127 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
128 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
129 u32 temp;
130 int retval;
131
132 ehci->caps = hcd->regs;
133 ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase));
134 dbg_hcs_params(ehci, "reset");
135 dbg_hcc_params(ehci, "reset");
136
137 /* cache this readonly data; minimize chip reads */
138 ehci->hcs_params = readl(&ehci->caps->hcs_params);
139
140 retval = ehci_halt(ehci);
141 if (retval)
142 return retval;
143
144 /* NOTE: only the parts below this line are PCI-specific */
145
146 switch (pdev->vendor) {
147 case PCI_VENDOR_ID_TDI:
148 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
149 ehci->is_tdi_rh_tt = 1;
150 tdi_reset(ehci);
151 }
152 break;
153 case PCI_VENDOR_ID_AMD:
154 /* AMD8111 EHCI doesn't work, according to AMD errata */
155 if (pdev->device == 0x7463) {
156 ehci_info(ehci, "ignoring AMD8111 (errata)\n");
157 return -EIO;
158 }
159 break;
160 case PCI_VENDOR_ID_NVIDIA:
161 /* NVidia reports that certain chips don't handle
162 * QH, ITD, or SITD addresses above 2GB. (But TD,
163 * data buffer, and periodic schedule are normal.)
164 */
165 switch (pdev->device) {
166 case 0x003c: /* MCP04 */
167 case 0x005b: /* CK804 */
168 case 0x00d8: /* CK8 */
169 case 0x00e8: /* CK8S */
170 if (pci_set_consistent_dma_mask(pdev,
171 DMA_31BIT_MASK) < 0)
172 ehci_warn(ehci, "can't enable NVidia "
173 "workaround for >2GB RAM\n");
174 break;
175 }
176 break;
177 }
178
179 if (ehci_is_TDI(ehci))
180 ehci_reset(ehci);
166 181
167 /* at least the Genesys GL880S needs fixup here */ 182 /* at least the Genesys GL880S needs fixup here */
168 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); 183 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
169 temp &= 0x0f; 184 temp &= 0x0f;
170 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { 185 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
171 ehci_dbg (ehci, "bogus port configuration: " 186 ehci_dbg(ehci, "bogus port configuration: "
172 "cc=%d x pcc=%d < ports=%d\n", 187 "cc=%d x pcc=%d < ports=%d\n",
173 HCS_N_CC(ehci->hcs_params), 188 HCS_N_CC(ehci->hcs_params),
174 HCS_N_PCC(ehci->hcs_params), 189 HCS_N_PCC(ehci->hcs_params),
175 HCS_N_PORTS(ehci->hcs_params)); 190 HCS_N_PORTS(ehci->hcs_params));
176 191
177 if (hcd->self.controller->bus == &pci_bus_type) { 192 switch (pdev->vendor) {
178 struct pci_dev *pdev; 193 case 0x17a0: /* GENESYS */
179 194 /* GL880S: should be PORTS=2 */
180 pdev = to_pci_dev(hcd->self.controller); 195 temp |= (ehci->hcs_params & ~0xf);
181 switch (pdev->vendor) { 196 ehci->hcs_params = temp;
182 case 0x17a0: /* GENESYS */ 197 break;
183 /* GL880S: should be PORTS=2 */ 198 case PCI_VENDOR_ID_NVIDIA:
184 temp |= (ehci->hcs_params & ~0xf); 199 /* NF4: should be PCC=10 */
185 ehci->hcs_params = temp; 200 break;
186 break;
187 case PCI_VENDOR_ID_NVIDIA:
188 /* NF4: should be PCC=10 */
189 break;
190 }
191 } 201 }
192 } 202 }
193 203
194 /* force HC to halt state */ 204 /* Serial Bus Release Number is at PCI 0x60 offset */
195 return ehci_halt (ehci); 205 pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
196}
197
198static int ehci_pci_start (struct usb_hcd *hcd)
199{
200 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
201 int result = 0;
202
203 if (hcd->self.controller->bus == &pci_bus_type) {
204 struct pci_dev *pdev;
205 u16 port_wake;
206
207 pdev = to_pci_dev(hcd->self.controller);
208
209 /* Serial Bus Release Number is at PCI 0x60 offset */
210 pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
211
212 /* port wake capability, reported by boot firmware */
213 pci_read_config_word(pdev, 0x62, &port_wake);
214 hcd->can_wakeup = (port_wake & 1) != 0;
215 206
216 /* help hc dma work well with cachelines */ 207 /* REVISIT: per-port wake capability (PCI 0x62) currently unused */
217 result = pci_set_mwi(pdev);
218 if (result)
219 ehci_dbg(ehci, "unable to enable MWI - not fatal.\n");
220 }
221
222 return ehci_run (hcd);
223}
224 208
225/* always called by thread; normally rmmod */ 209 retval = ehci_pci_reinit(ehci, pdev);
226 210
227static void ehci_pci_stop (struct usb_hcd *hcd) 211 /* finish init */
228{ 212 return ehci_init(hcd);
229 ehci_stop (hcd);
230} 213}
231 214
232/*-------------------------------------------------------------------------*/ 215/*-------------------------------------------------------------------------*/
@@ -235,90 +218,88 @@ static void ehci_pci_stop (struct usb_hcd *hcd)
235 218
236/* suspend/resume, section 4.3 */ 219/* suspend/resume, section 4.3 */
237 220
238/* These routines rely on the bus (pci, platform, etc) 221/* These routines rely on the PCI bus glue
239 * to handle powerdown and wakeup, and currently also on 222 * to handle powerdown and wakeup, and currently also on
240 * transceivers that don't need any software attention to set up 223 * transceivers that don't need any software attention to set up
241 * the right sort of wakeup. 224 * the right sort of wakeup.
225 * Also they depend on separate root hub suspend/resume.
242 */ 226 */
243 227
244static int ehci_pci_suspend (struct usb_hcd *hcd, pm_message_t message) 228static int ehci_pci_suspend(struct usb_hcd *hcd, pm_message_t message)
245{ 229{
246 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 230 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
247 231
248 if (time_before (jiffies, ehci->next_statechange)) 232 if (time_before(jiffies, ehci->next_statechange))
249 msleep (100); 233 msleep(10);
250 234
251#ifdef CONFIG_USB_SUSPEND 235 // could save FLADJ in case of Vaux power loss
252 (void) usb_suspend_device (hcd->self.root_hub);
253#else
254 usb_lock_device (hcd->self.root_hub);
255 (void) ehci_bus_suspend (hcd);
256 usb_unlock_device (hcd->self.root_hub);
257#endif
258
259 // save (PCI) FLADJ in case of Vaux power loss
260 // ... we'd only use it to handle clock skew 236 // ... we'd only use it to handle clock skew
261 237
262 return 0; 238 return 0;
263} 239}
264 240
265static int ehci_pci_resume (struct usb_hcd *hcd) 241static int ehci_pci_resume(struct usb_hcd *hcd)
266{ 242{
267 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 243 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
268 unsigned port; 244 unsigned port;
269 struct usb_device *root = hcd->self.root_hub; 245 struct usb_device *root = hcd->self.root_hub;
246 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
270 int retval = -EINVAL; 247 int retval = -EINVAL;
271 248
272 // maybe restore (PCI) FLADJ 249 // maybe restore FLADJ
273 250
274 if (time_before (jiffies, ehci->next_statechange)) 251 if (time_before(jiffies, ehci->next_statechange))
275 msleep (100); 252 msleep(100);
253
254 /* If CF is clear, we lost PCI Vaux power and need to restart. */
255 if (readl(&ehci->regs->configured_flag) != FLAG_CF)
256 goto restart;
276 257
277 /* If any port is suspended (or owned by the companion), 258 /* If any port is suspended (or owned by the companion),
278 * we know we can/must resume the HC (and mustn't reset it). 259 * we know we can/must resume the HC (and mustn't reset it).
260 * We just defer that to the root hub code.
279 */ 261 */
280 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) { 262 for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) {
281 u32 status; 263 u32 status;
282 port--; 264 port--;
283 status = readl (&ehci->regs->port_status [port]); 265 status = readl(&ehci->regs->port_status [port]);
284 if (!(status & PORT_POWER)) 266 if (!(status & PORT_POWER))
285 continue; 267 continue;
286 if (status & (PORT_SUSPEND | PORT_OWNER)) { 268 if (status & (PORT_SUSPEND | PORT_RESUME | PORT_OWNER)) {
287 down (&hcd->self.root_hub->serialize); 269 usb_hcd_resume_root_hub(hcd);
288 retval = ehci_bus_resume (hcd); 270 return 0;
289 up (&hcd->self.root_hub->serialize);
290 break;
291 } 271 }
272 }
273
274restart:
275 ehci_dbg(ehci, "lost power, restarting\n");
276 for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) {
277 port--;
292 if (!root->children [port]) 278 if (!root->children [port])
293 continue; 279 continue;
294 dbg_port (ehci, __FUNCTION__, port + 1, status); 280 usb_set_device_state(root->children[port],
295 usb_set_device_state (root->children[port],
296 USB_STATE_NOTATTACHED); 281 USB_STATE_NOTATTACHED);
297 } 282 }
298 283
299 /* Else reset, to cope with power loss or flush-to-storage 284 /* Else reset, to cope with power loss or flush-to-storage
300 * style "resume" having activated BIOS during reboot. 285 * style "resume" having let BIOS kick in during reboot.
301 */ 286 */
302 if (port == 0) { 287 (void) ehci_halt(ehci);
303 (void) ehci_halt (ehci); 288 (void) ehci_reset(ehci);
304 (void) ehci_reset (ehci); 289 (void) ehci_pci_reinit(ehci, pdev);
305 (void) ehci_pci_reset (hcd); 290
306 291 /* emptying the schedule aborts any urbs */
307 /* emptying the schedule aborts any urbs */ 292 spin_lock_irq(&ehci->lock);
308 spin_lock_irq (&ehci->lock); 293 if (ehci->reclaim)
309 if (ehci->reclaim) 294 ehci->reclaim_ready = 1;
310 ehci->reclaim_ready = 1; 295 ehci_work(ehci, NULL);
311 ehci_work (ehci, NULL); 296 spin_unlock_irq(&ehci->lock);
312 spin_unlock_irq (&ehci->lock); 297
313 298 /* restart; khubd will disconnect devices */
314 /* restart; khubd will disconnect devices */ 299 retval = ehci_run(hcd);
315 retval = ehci_run (hcd); 300
316 301 /* here we "know" root ports should always stay powered */
317 /* here we "know" root ports should always stay powered; 302 ehci_port_power(ehci, 1);
318 * but some controllers may lose all power.
319 */
320 ehci_port_power (ehci, 1);
321 }
322 303
323 return retval; 304 return retval;
324} 305}
@@ -339,12 +320,12 @@ static const struct hc_driver ehci_pci_hc_driver = {
339 * basic lifecycle operations 320 * basic lifecycle operations
340 */ 321 */
341 .reset = ehci_pci_reset, 322 .reset = ehci_pci_reset,
342 .start = ehci_pci_start, 323 .start = ehci_run,
343#ifdef CONFIG_PM 324#ifdef CONFIG_PM
344 .suspend = ehci_pci_suspend, 325 .suspend = ehci_pci_suspend,
345 .resume = ehci_pci_resume, 326 .resume = ehci_pci_resume,
346#endif 327#endif
347 .stop = ehci_pci_stop, 328 .stop = ehci_stop,
348 329
349 /* 330 /*
350 * managing i/o requests and associated device resources 331 * managing i/o requests and associated device resources
@@ -377,7 +358,7 @@ static const struct pci_device_id pci_ids [] = { {
377 }, 358 },
378 { /* end: all zeroes */ } 359 { /* end: all zeroes */ }
379}; 360};
380MODULE_DEVICE_TABLE (pci, pci_ids); 361MODULE_DEVICE_TABLE(pci, pci_ids);
381 362
382/* pci driver glue; this is a "new style" PCI driver module */ 363/* pci driver glue; this is a "new style" PCI driver module */
383static struct pci_driver ehci_pci_driver = { 364static struct pci_driver ehci_pci_driver = {
@@ -393,22 +374,22 @@ static struct pci_driver ehci_pci_driver = {
393#endif 374#endif
394}; 375};
395 376
396static int __init ehci_hcd_pci_init (void) 377static int __init ehci_hcd_pci_init(void)
397{ 378{
398 if (usb_disabled()) 379 if (usb_disabled())
399 return -ENODEV; 380 return -ENODEV;
400 381
401 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", 382 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
402 hcd_name, 383 hcd_name,
403 sizeof (struct ehci_qh), sizeof (struct ehci_qtd), 384 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
404 sizeof (struct ehci_itd), sizeof (struct ehci_sitd)); 385 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
405 386
406 return pci_register_driver (&ehci_pci_driver); 387 return pci_register_driver(&ehci_pci_driver);
407} 388}
408module_init (ehci_hcd_pci_init); 389module_init(ehci_hcd_pci_init);
409 390
410static void __exit ehci_hcd_pci_cleanup (void) 391static void __exit ehci_hcd_pci_cleanup(void)
411{ 392{
412 pci_unregister_driver (&ehci_pci_driver); 393 pci_unregister_driver(&ehci_pci_driver);
413} 394}
414module_exit (ehci_hcd_pci_cleanup); 395module_exit(ehci_hcd_pci_cleanup);
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
index a59e536441e1..5f22e6590cd1 100644
--- a/drivers/usb/host/ohci-pci.c
+++ b/drivers/usb/host/ohci-pci.c
@@ -14,15 +14,6 @@
14 * This file is licenced under the GPL. 14 * This file is licenced under the GPL.
15 */ 15 */
16 16
17#include <linux/jiffies.h>
18
19#ifdef CONFIG_PPC_PMAC
20#include <asm/machdep.h>
21#include <asm/pmac_feature.h>
22#include <asm/pci-bridge.h>
23#include <asm/prom.h>
24#endif
25
26#ifndef CONFIG_PCI 17#ifndef CONFIG_PCI
27#error "This file is PCI bus glue. CONFIG_PCI must be defined." 18#error "This file is PCI bus glue. CONFIG_PCI must be defined."
28#endif 19#endif
@@ -115,39 +106,12 @@ ohci_pci_start (struct usb_hcd *hcd)
115static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message) 106static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
116{ 107{
117 /* root hub was already suspended */ 108 /* root hub was already suspended */
118
119 /* FIXME these PMAC things get called in the wrong places. ASIC
120 * clocks should be turned off AFTER entering D3, and on BEFORE
121 * trying to enter D0. Evidently the PCI layer doesn't currently
122 * provide the right sort of platform hooks for this ...
123 */
124#ifdef CONFIG_PPC_PMAC
125 if (_machine == _MACH_Pmac) {
126 struct device_node *of_node;
127
128 /* Disable USB PAD & cell clock */
129 of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller));
130 if (of_node)
131 pmac_call_feature(PMAC_FTR_USB_ENABLE, of_node, 0, 0);
132 }
133#endif /* CONFIG_PPC_PMAC */
134 return 0; 109 return 0;
135} 110}
136 111
137 112
138static int ohci_pci_resume (struct usb_hcd *hcd) 113static int ohci_pci_resume (struct usb_hcd *hcd)
139{ 114{
140#ifdef CONFIG_PPC_PMAC
141 if (_machine == _MACH_Pmac) {
142 struct device_node *of_node;
143
144 /* Re-enable USB PAD & cell clock */
145 of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller));
146 if (of_node)
147 pmac_call_feature (PMAC_FTR_USB_ENABLE, of_node, 0, 1);
148 }
149#endif /* CONFIG_PPC_PMAC */
150
151 usb_hcd_resume_root_hub(hcd); 115 usb_hcd_resume_root_hub(hcd);
152 return 0; 116 return 0;
153} 117}
diff --git a/drivers/usb/media/sn9c102_core.c b/drivers/usb/media/sn9c102_core.c
index cf8cfbabefde..b2e66e3b90aa 100644
--- a/drivers/usb/media/sn9c102_core.c
+++ b/drivers/usb/media/sn9c102_core.c
@@ -199,7 +199,7 @@ static void sn9c102_release_buffers(struct sn9c102_device* cam)
199{ 199{
200 if (cam->nbuffers) { 200 if (cam->nbuffers) {
201 rvfree(cam->frame[0].bufmem, 201 rvfree(cam->frame[0].bufmem,
202 cam->nbuffers * cam->frame[0].buf.length); 202 cam->nbuffers * PAGE_ALIGN(cam->frame[0].buf.length));
203 cam->nbuffers = 0; 203 cam->nbuffers = 0;
204 } 204 }
205} 205}
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 61204bf7cd78..06e04b442ff1 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -475,6 +475,8 @@ static struct usb_device_id id_table_combined [] = {
475 { USB_DEVICE(FTDI_VID, FTDI_ARTEMIS_PID) }, 475 { USB_DEVICE(FTDI_VID, FTDI_ARTEMIS_PID) },
476 { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16_PID) }, 476 { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16_PID) },
477 { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16HR_PID) }, 477 { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16HR_PID) },
478 { USB_DEVICE(KOBIL_VID, KOBIL_CONV_B1_PID) },
479 { USB_DEVICE(KOBIL_VID, KOBIL_CONV_KAAN_PID) },
478 { }, /* Optional parameter entry */ 480 { }, /* Optional parameter entry */
479 { } /* Terminating entry */ 481 { } /* Terminating entry */
480}; 482};
diff --git a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h
index ddb63df31ce6..773ea3eca086 100644
--- a/drivers/usb/serial/ftdi_sio.h
+++ b/drivers/usb/serial/ftdi_sio.h
@@ -128,6 +128,13 @@
128#define SEALEVEL_2803_8_PID 0X2883 /* SeaLINK+8 (2803) Port 8 */ 128#define SEALEVEL_2803_8_PID 0X2883 /* SeaLINK+8 (2803) Port 8 */
129 129
130/* 130/*
131 * The following are the values for two KOBIL chipcard terminals.
132 */
133#define KOBIL_VID 0x0d46 /* KOBIL Vendor ID */
134#define KOBIL_CONV_B1_PID 0x2020 /* KOBIL Konverter for B1 */
135#define KOBIL_CONV_KAAN_PID 0x2021 /* KOBIL_Konverter for KAAN */
136
137/*
131 * DSS-20 Sync Station for Sony Ericsson P800 138 * DSS-20 Sync Station for Sony Ericsson P800
132 */ 139 */
133 140
diff --git a/drivers/usb/serial/ipw.c b/drivers/usb/serial/ipw.c
index a02fada85362..7744b8148bc5 100644
--- a/drivers/usb/serial/ipw.c
+++ b/drivers/usb/serial/ipw.c
@@ -46,7 +46,6 @@
46#include <linux/module.h> 46#include <linux/module.h>
47#include <linux/spinlock.h> 47#include <linux/spinlock.h>
48#include <linux/usb.h> 48#include <linux/usb.h>
49#include <linux/usb.h>
50#include <asm/uaccess.h> 49#include <asm/uaccess.h>
51#include "usb-serial.h" 50#include "usb-serial.h"
52 51
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
index 0a9858f69a9b..f5f47a34b168 100644
--- a/drivers/usb/storage/unusual_devs.h
+++ b/drivers/usb/storage/unusual_devs.h
@@ -1118,6 +1118,15 @@ UNUSUAL_DEV( 0x2735, 0x100b, 0x0000, 0x9999,
1118 US_SC_DEVICE, US_PR_DEVICE, NULL, 1118 US_SC_DEVICE, US_PR_DEVICE, NULL,
1119 US_FL_GO_SLOW ), 1119 US_FL_GO_SLOW ),
1120 1120
1121/*
1122 * David Härdeman <david@2gen.com>
1123 * The key makes the SCSI stack print confusing (but harmless) messages
1124 */
1125UNUSUAL_DEV( 0x4146, 0xba01, 0x0100, 0x0100,
1126 "Iomega",
1127 "Micro Mini 1GB",
1128 US_SC_DEVICE, US_PR_DEVICE, NULL, US_FL_NOT_LOCKABLE ),
1129
1121#ifdef CONFIG_USB_STORAGE_SDDR55 1130#ifdef CONFIG_USB_STORAGE_SDDR55
1122UNUSUAL_DEV( 0x55aa, 0xa103, 0x0000, 0x9999, 1131UNUSUAL_DEV( 0x55aa, 0xa103, 0x0000, 0x9999,
1123 "Sandisk", 1132 "Sandisk",
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-15 22:11:40 -0500