diff options
Diffstat (limited to 'drivers/usb/storage/shuttle_usbat.h')
-rw-r--r-- | drivers/usb/storage/shuttle_usbat.h | 66 |
1 files changed, 33 insertions, 33 deletions
diff --git a/drivers/usb/storage/shuttle_usbat.h b/drivers/usb/storage/shuttle_usbat.h index 5b8e867e2ae5..25e7d8b340b8 100644 --- a/drivers/usb/storage/shuttle_usbat.h +++ b/drivers/usb/storage/shuttle_usbat.h | |||
@@ -55,8 +55,8 @@ | |||
55 | #define USBAT_UIO_WRITE 0 | 55 | #define USBAT_UIO_WRITE 0 |
56 | 56 | ||
57 | /* Qualifier bits */ | 57 | /* Qualifier bits */ |
58 | #define USBAT_QUAL_FCQ 0x20 // full compare | 58 | #define USBAT_QUAL_FCQ 0x20 /* full compare */ |
59 | #define USBAT_QUAL_ALQ 0x10 // auto load subcount | 59 | #define USBAT_QUAL_ALQ 0x10 /* auto load subcount */ |
60 | 60 | ||
61 | /* USBAT Flash Media status types */ | 61 | /* USBAT Flash Media status types */ |
62 | #define USBAT_FLASH_MEDIA_NONE 0 | 62 | #define USBAT_FLASH_MEDIA_NONE 0 |
@@ -67,39 +67,39 @@ | |||
67 | #define USBAT_FLASH_MEDIA_CHANGED 1 | 67 | #define USBAT_FLASH_MEDIA_CHANGED 1 |
68 | 68 | ||
69 | /* USBAT ATA registers */ | 69 | /* USBAT ATA registers */ |
70 | #define USBAT_ATA_DATA 0x10 // read/write data (R/W) | 70 | #define USBAT_ATA_DATA 0x10 /* read/write data (R/W) */ |
71 | #define USBAT_ATA_FEATURES 0x11 // set features (W) | 71 | #define USBAT_ATA_FEATURES 0x11 /* set features (W) */ |
72 | #define USBAT_ATA_ERROR 0x11 // error (R) | 72 | #define USBAT_ATA_ERROR 0x11 /* error (R) */ |
73 | #define USBAT_ATA_SECCNT 0x12 // sector count (R/W) | 73 | #define USBAT_ATA_SECCNT 0x12 /* sector count (R/W) */ |
74 | #define USBAT_ATA_SECNUM 0x13 // sector number (R/W) | 74 | #define USBAT_ATA_SECNUM 0x13 /* sector number (R/W) */ |
75 | #define USBAT_ATA_LBA_ME 0x14 // cylinder low (R/W) | 75 | #define USBAT_ATA_LBA_ME 0x14 /* cylinder low (R/W) */ |
76 | #define USBAT_ATA_LBA_HI 0x15 // cylinder high (R/W) | 76 | #define USBAT_ATA_LBA_HI 0x15 /* cylinder high (R/W) */ |
77 | #define USBAT_ATA_DEVICE 0x16 // head/device selection (R/W) | 77 | #define USBAT_ATA_DEVICE 0x16 /* head/device selection (R/W) */ |
78 | #define USBAT_ATA_STATUS 0x17 // device status (R) | 78 | #define USBAT_ATA_STATUS 0x17 /* device status (R) */ |
79 | #define USBAT_ATA_CMD 0x17 // device command (W) | 79 | #define USBAT_ATA_CMD 0x17 /* device command (W) */ |
80 | #define USBAT_ATA_ALTSTATUS 0x0E // status (no clear IRQ) (R) | 80 | #define USBAT_ATA_ALTSTATUS 0x0E /* status (no clear IRQ) (R) */ |
81 | 81 | ||
82 | /* USBAT User I/O Data registers */ | 82 | /* USBAT User I/O Data registers */ |
83 | #define USBAT_UIO_EPAD 0x80 // Enable Peripheral Control Signals | 83 | #define USBAT_UIO_EPAD 0x80 /* Enable Peripheral Control Signals */ |
84 | #define USBAT_UIO_CDT 0x40 // Card Detect (Read Only) | 84 | #define USBAT_UIO_CDT 0x40 /* Card Detect (Read Only) */ |
85 | // CDT = ACKD & !UI1 & !UI0 | 85 | /* CDT = ACKD & !UI1 & !UI0 */ |
86 | #define USBAT_UIO_1 0x20 // I/O 1 | 86 | #define USBAT_UIO_1 0x20 /* I/O 1 */ |
87 | #define USBAT_UIO_0 0x10 // I/O 0 | 87 | #define USBAT_UIO_0 0x10 /* I/O 0 */ |
88 | #define USBAT_UIO_EPP_ATA 0x08 // 1=EPP mode, 0=ATA mode | 88 | #define USBAT_UIO_EPP_ATA 0x08 /* 1=EPP mode, 0=ATA mode */ |
89 | #define USBAT_UIO_UI1 0x04 // Input 1 | 89 | #define USBAT_UIO_UI1 0x04 /* Input 1 */ |
90 | #define USBAT_UIO_UI0 0x02 // Input 0 | 90 | #define USBAT_UIO_UI0 0x02 /* Input 0 */ |
91 | #define USBAT_UIO_INTR_ACK 0x01 // Interrupt (ATA & ISA)/Acknowledge (EPP) | 91 | #define USBAT_UIO_INTR_ACK 0x01 /* Interrupt (ATA/ISA)/Acknowledge (EPP) */ |
92 | 92 | ||
93 | /* USBAT User I/O Enable registers */ | 93 | /* USBAT User I/O Enable registers */ |
94 | #define USBAT_UIO_DRVRST 0x80 // Reset Peripheral | 94 | #define USBAT_UIO_DRVRST 0x80 /* Reset Peripheral */ |
95 | #define USBAT_UIO_ACKD 0x40 // Enable Card Detect | 95 | #define USBAT_UIO_ACKD 0x40 /* Enable Card Detect */ |
96 | #define USBAT_UIO_OE1 0x20 // I/O 1 set=output/clr=input | 96 | #define USBAT_UIO_OE1 0x20 /* I/O 1 set=output/clr=input */ |
97 | // If ACKD=1, set OE1 to 1 also. | 97 | /* If ACKD=1, set OE1 to 1 also. */ |
98 | #define USBAT_UIO_OE0 0x10 // I/O 0 set=output/clr=input | 98 | #define USBAT_UIO_OE0 0x10 /* I/O 0 set=output/clr=input */ |
99 | #define USBAT_UIO_ADPRST 0x01 // Reset SCM chip | 99 | #define USBAT_UIO_ADPRST 0x01 /* Reset SCM chip */ |
100 | 100 | ||
101 | /* USBAT Features */ | 101 | /* USBAT Features */ |
102 | #define USBAT_FEAT_ETEN 0x80 // External trigger enable | 102 | #define USBAT_FEAT_ETEN 0x80 /* External trigger enable */ |
103 | #define USBAT_FEAT_U1 0x08 | 103 | #define USBAT_FEAT_U1 0x08 |
104 | #define USBAT_FEAT_U0 0x04 | 104 | #define USBAT_FEAT_U0 0x04 |
105 | #define USBAT_FEAT_ET1 0x02 | 105 | #define USBAT_FEAT_ET1 0x02 |
@@ -112,12 +112,12 @@ struct usbat_info { | |||
112 | int devicetype; | 112 | int devicetype; |
113 | 113 | ||
114 | /* Used for Flash readers only */ | 114 | /* Used for Flash readers only */ |
115 | unsigned long sectors; // total sector count | 115 | unsigned long sectors; /* total sector count */ |
116 | unsigned long ssize; // sector size in bytes | 116 | unsigned long ssize; /* sector size in bytes */ |
117 | 117 | ||
118 | unsigned char sense_key; | 118 | unsigned char sense_key; |
119 | unsigned long sense_asc; // additional sense code | 119 | unsigned long sense_asc; /* additional sense code */ |
120 | unsigned long sense_ascq; // additional sense code qualifier | 120 | unsigned long sense_ascq; /* additional sense code qualifier */ |
121 | }; | 121 | }; |
122 | 122 | ||
123 | #endif | 123 | #endif |