aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/usb/musb/musb_regs.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/usb/musb/musb_regs.h')
-rw-r--r--drivers/usb/musb/musb_regs.h101
1 files changed, 100 insertions, 1 deletions
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index 473a94ef905f..292894a2c247 100644
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
@@ -72,6 +72,10 @@
72#define MUSB_DEVCTL_HR 0x02 72#define MUSB_DEVCTL_HR 0x02
73#define MUSB_DEVCTL_SESSION 0x01 73#define MUSB_DEVCTL_SESSION 0x01
74 74
75/* MUSB ULPI VBUSCONTROL */
76#define MUSB_ULPI_USE_EXTVBUS 0x01
77#define MUSB_ULPI_USE_EXTVBUSIND 0x02
78
75/* TESTMODE */ 79/* TESTMODE */
76#define MUSB_TEST_FORCE_HOST 0x80 80#define MUSB_TEST_FORCE_HOST 0x80
77#define MUSB_TEST_FIFO_ACCESS 0x40 81#define MUSB_TEST_FIFO_ACCESS 0x40
@@ -246,6 +250,7 @@
246 250
247/* REVISIT: vctrl/vstatus: optional vendor utmi+phy register at 0x68 */ 251/* REVISIT: vctrl/vstatus: optional vendor utmi+phy register at 0x68 */
248#define MUSB_HWVERS 0x6C /* 8 bit */ 252#define MUSB_HWVERS 0x6C /* 8 bit */
253#define MUSB_ULPI_BUSCONTROL 0x70 /* 8 bit */
249 254
250#define MUSB_EPINFO 0x78 /* 8 bit */ 255#define MUSB_EPINFO 0x78 /* 8 bit */
251#define MUSB_RAMINFO 0x79 /* 8 bit */ 256#define MUSB_RAMINFO 0x79 /* 8 bit */
@@ -321,6 +326,26 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
321 musb_writew(mbase, MUSB_RXFIFOADD, c_off); 326 musb_writew(mbase, MUSB_RXFIFOADD, c_off);
322} 327}
323 328
329static inline u8 musb_read_txfifosz(void __iomem *mbase)
330{
331 return musb_readb(mbase, MUSB_TXFIFOSZ);
332}
333
334static inline u16 musb_read_txfifoadd(void __iomem *mbase)
335{
336 return musb_readw(mbase, MUSB_TXFIFOADD);
337}
338
339static inline u8 musb_read_rxfifosz(void __iomem *mbase)
340{
341 return musb_readb(mbase, MUSB_RXFIFOSZ);
342}
343
344static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
345{
346 return musb_readw(mbase, MUSB_RXFIFOADD);
347}
348
324static inline u8 musb_read_configdata(void __iomem *mbase) 349static inline u8 musb_read_configdata(void __iomem *mbase)
325{ 350{
326 musb_writeb(mbase, MUSB_INDEX, 0); 351 musb_writeb(mbase, MUSB_INDEX, 0);
@@ -376,6 +401,36 @@ static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum,
376 qh_h_port_reg); 401 qh_h_port_reg);
377} 402}
378 403
404static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)
405{
406 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXFUNCADDR));
407}
408
409static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)
410{
411 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXHUBADDR));
412}
413
414static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)
415{
416 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXHUBPORT));
417}
418
419static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum)
420{
421 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXFUNCADDR));
422}
423
424static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum)
425{
426 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBADDR));
427}
428
429static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum)
430{
431 return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBPORT));
432}
433
379#else /* CONFIG_BLACKFIN */ 434#else /* CONFIG_BLACKFIN */
380 435
381#define USB_BASE USB_FADDR 436#define USB_BASE USB_FADDR
@@ -455,6 +510,22 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
455{ 510{
456} 511}
457 512
513static inline u8 musb_read_txfifosz(void __iomem *mbase)
514{
515}
516
517static inline u16 musb_read_txfifoadd(void __iomem *mbase)
518{
519}
520
521static inline u8 musb_read_rxfifosz(void __iomem *mbase)
522{
523}
524
525static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
526{
527}
528
458static inline u8 musb_read_configdata(void __iomem *mbase) 529static inline u8 musb_read_configdata(void __iomem *mbase)
459{ 530{
460 return 0; 531 return 0;
@@ -462,7 +533,11 @@ static inline u8 musb_read_configdata(void __iomem *mbase)
462 533
463static inline u16 musb_read_hwvers(void __iomem *mbase) 534static inline u16 musb_read_hwvers(void __iomem *mbase)
464{ 535{
465 return 0; 536 /*
537 * This register is invisible on Blackfin, actually the MUSB
538 * RTL version of Blackfin is 1.9, so just harcode its value.
539 */
540 return MUSB_HWVERS_1900;
466} 541}
467 542
468static inline void __iomem *musb_read_target_reg_base(u8 i, void __iomem *mbase) 543static inline void __iomem *musb_read_target_reg_base(u8 i, void __iomem *mbase)
@@ -500,6 +575,30 @@ static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum,
500{ 575{
501} 576}
502 577
578static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)
579{
580}
581
582static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)
583{
584}
585
586static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)
587{
588}
589
590static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum)
591{
592}
593
594static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum)
595{
596}
597
598static inline void musb_read_txhubport(void __iomem *mbase, u8 epnum)
599{
600}
601
503#endif /* CONFIG_BLACKFIN */ 602#endif /* CONFIG_BLACKFIN */
504 603
505#endif /* __MUSB_REGS_H__ */ 604#endif /* __MUSB_REGS_H__ */